1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/slot-gpio.h>
28 #include <linux/mmc/sdhci-pci-data.h>
31 #include "sdhci-pci.h"
32 #include "sdhci-pci-o2micro.h"
34 /*****************************************************************************\
36 * Hardware specific quirk handling *
38 \*****************************************************************************/
40 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
42 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
43 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
44 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
48 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
51 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT
)
52 & SDHCI_TIMEOUT_CLK_MASK
) |
54 ((0x21 << SDHCI_CLOCK_BASE_SHIFT
)
55 & SDHCI_CLOCK_BASE_MASK
) |
57 SDHCI_TIMEOUT_CLK_UNIT
|
64 static int ricoh_mmc_resume(struct sdhci_pci_chip
*chip
)
66 /* Apply a delay to allow controller to settle */
67 /* Otherwise it becomes confused if card state changed
73 static const struct sdhci_pci_fixes sdhci_ricoh
= {
75 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
76 SDHCI_QUIRK_FORCE_DMA
|
77 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
80 static const struct sdhci_pci_fixes sdhci_ricoh_mmc
= {
81 .probe_slot
= ricoh_mmc_probe_slot
,
82 .resume
= ricoh_mmc_resume
,
83 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
84 SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
85 SDHCI_QUIRK_NO_CARD_NO_RESET
|
86 SDHCI_QUIRK_MISSING_CAPS
89 static const struct sdhci_pci_fixes sdhci_ene_712
= {
90 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
91 SDHCI_QUIRK_BROKEN_DMA
,
94 static const struct sdhci_pci_fixes sdhci_ene_714
= {
95 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
96 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
97 SDHCI_QUIRK_BROKEN_DMA
,
100 static const struct sdhci_pci_fixes sdhci_cafe
= {
101 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
102 SDHCI_QUIRK_NO_BUSY_IRQ
|
103 SDHCI_QUIRK_BROKEN_CARD_DETECTION
|
104 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
107 static const struct sdhci_pci_fixes sdhci_intel_qrk
= {
108 .quirks
= SDHCI_QUIRK_NO_HISPD_BIT
,
111 static int mrst_hc_probe_slot(struct sdhci_pci_slot
*slot
)
113 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
118 * ADMA operation is disabled for Moorestown platform due to
121 static int mrst_hc_probe(struct sdhci_pci_chip
*chip
)
124 * slots number is fixed here for MRST as SDIO3/5 are never used and
125 * have hardware bugs.
131 static int pch_hc_probe_slot(struct sdhci_pci_slot
*slot
)
133 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
137 #ifdef CONFIG_PM_RUNTIME
139 static irqreturn_t
sdhci_pci_sd_cd(int irq
, void *dev_id
)
141 struct sdhci_pci_slot
*slot
= dev_id
;
142 struct sdhci_host
*host
= slot
->host
;
144 mmc_detect_change(host
->mmc
, msecs_to_jiffies(200));
148 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
150 int err
, irq
, gpio
= slot
->cd_gpio
;
152 slot
->cd_gpio
= -EINVAL
;
153 slot
->cd_irq
= -EINVAL
;
155 if (!gpio_is_valid(gpio
))
158 err
= gpio_request(gpio
, "sd_cd");
162 err
= gpio_direction_input(gpio
);
166 irq
= gpio_to_irq(gpio
);
170 err
= request_irq(irq
, sdhci_pci_sd_cd
, IRQF_TRIGGER_RISING
|
171 IRQF_TRIGGER_FALLING
, "sd_cd", slot
);
175 slot
->cd_gpio
= gpio
;
183 dev_warn(&slot
->chip
->pdev
->dev
, "failed to setup card detect wake up\n");
186 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
188 if (slot
->cd_irq
>= 0)
189 free_irq(slot
->cd_irq
, slot
);
190 if (gpio_is_valid(slot
->cd_gpio
))
191 gpio_free(slot
->cd_gpio
);
196 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
200 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
206 static int mfd_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
208 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
;
209 slot
->host
->mmc
->caps2
|= MMC_CAP2_BOOTPART_NOACC
|
210 MMC_CAP2_HC_ERASE_SZ
;
214 static int mfd_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
216 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
220 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0
= {
221 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
222 .probe_slot
= mrst_hc_probe_slot
,
225 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2
= {
226 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
227 .probe
= mrst_hc_probe
,
230 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd
= {
231 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
232 .allow_runtime_pm
= true,
233 .own_cd_for_runtime_pm
= true,
236 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio
= {
237 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
238 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
239 .allow_runtime_pm
= true,
240 .probe_slot
= mfd_sdio_probe_slot
,
243 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc
= {
244 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
245 .allow_runtime_pm
= true,
246 .probe_slot
= mfd_emmc_probe_slot
,
249 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio
= {
250 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
,
251 .probe_slot
= pch_hc_probe_slot
,
254 static void sdhci_pci_int_hw_reset(struct sdhci_host
*host
)
258 reg
= sdhci_readb(host
, SDHCI_POWER_CONTROL
);
260 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
261 /* For eMMC, minimum is 1us but give it 9us for good measure */
264 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
265 /* For eMMC, minimum is 200us but give it 300us for good measure */
266 usleep_range(300, 1000);
269 static int byt_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
271 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
|
272 MMC_CAP_HW_RESET
| MMC_CAP_1_8V_DDR
;
273 slot
->host
->mmc
->caps2
|= MMC_CAP2_HC_ERASE_SZ
;
274 slot
->hw_reset
= sdhci_pci_int_hw_reset
;
275 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_INTEL_BSW_EMMC
)
276 slot
->host
->timeout_clk
= 1000; /* 1000 kHz i.e. 1 MHz */
280 static int byt_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
282 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
286 static int byt_sd_probe_slot(struct sdhci_pci_slot
*slot
)
288 slot
->cd_con_id
= NULL
;
290 slot
->cd_override_level
= true;
294 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc
= {
295 .allow_runtime_pm
= true,
296 .probe_slot
= byt_emmc_probe_slot
,
297 .quirks2
= SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
298 SDHCI_QUIRK2_STOP_WITH_TC
,
301 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio
= {
302 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
|
303 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
,
304 .allow_runtime_pm
= true,
305 .probe_slot
= byt_sdio_probe_slot
,
308 static const struct sdhci_pci_fixes sdhci_intel_byt_sd
= {
309 .quirks2
= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON
|
310 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
311 SDHCI_QUIRK2_STOP_WITH_TC
,
312 .allow_runtime_pm
= true,
313 .own_cd_for_runtime_pm
= true,
314 .probe_slot
= byt_sd_probe_slot
,
317 /* Define Host controllers for Intel Merrifield platform */
318 #define INTEL_MRFL_EMMC_0 0
319 #define INTEL_MRFL_EMMC_1 1
321 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
323 if ((PCI_FUNC(slot
->chip
->pdev
->devfn
) != INTEL_MRFL_EMMC_0
) &&
324 (PCI_FUNC(slot
->chip
->pdev
->devfn
) != INTEL_MRFL_EMMC_1
))
325 /* SD support is not ready yet */
328 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
|
334 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc
= {
335 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
336 .quirks2
= SDHCI_QUIRK2_BROKEN_HS200
|
337 SDHCI_QUIRK2_PRESET_VALUE_BROKEN
,
338 .allow_runtime_pm
= true,
339 .probe_slot
= intel_mrfl_mmc_probe_slot
,
342 /* O2Micro extra registers */
343 #define O2_SD_LOCK_WP 0xD3
344 #define O2_SD_MULTI_VCC3V 0xEE
345 #define O2_SD_CLKREQ 0xEC
346 #define O2_SD_CAPS 0xE0
347 #define O2_SD_ADMA1 0xE2
348 #define O2_SD_ADMA2 0xE7
349 #define O2_SD_INF_MOD 0xF1
351 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
356 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
361 * Turn PMOS on [bit 0], set over current detection to 2.4 V
362 * [bit 1:2] and enable over current debouncing [bit 6].
369 ret
= pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
376 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
381 if (chip
->pdev
->revision
== 0) {
382 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
383 SDHCI_QUIRK_32BIT_DMA_SIZE
|
384 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
385 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
386 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
390 * JMicron chips can have two interfaces to the same hardware
391 * in order to work around limitations in Microsoft's driver.
392 * We need to make sure we only bind to one of them.
394 * This code assumes two things:
396 * 1. The PCI code adds subfunctions in order.
398 * 2. The MMC interface has a lower subfunction number
399 * than the SD interface.
401 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
)
402 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
;
403 else if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
)
404 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
;
407 struct pci_dev
*sd_dev
;
410 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
411 mmcdev
, sd_dev
)) != NULL
) {
412 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
413 PCI_SLOT(sd_dev
->devfn
)) &&
414 (chip
->pdev
->bus
== sd_dev
->bus
))
420 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
421 "secondary interface.\n");
427 * JMicron chips need a bit of a nudge to enable the power
430 ret
= jmicron_pmos(chip
, 1);
432 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
436 /* quirk for unsable RO-detection on JM388 chips */
437 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
||
438 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
439 chip
->quirks
|= SDHCI_QUIRK_UNSTABLE_RO_DETECT
;
444 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
448 scratch
= readb(host
->ioaddr
+ 0xC0);
455 writeb(scratch
, host
->ioaddr
+ 0xC0);
458 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
460 if (slot
->chip
->pdev
->revision
== 0) {
463 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
464 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
465 SDHCI_VENDOR_VER_SHIFT
;
468 * Older versions of the chip have lots of nasty glitches
469 * in the ADMA engine. It's best just to avoid it
473 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
476 /* JM388 MMC doesn't support 1.8V while SD supports it */
477 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
478 slot
->host
->ocr_avail_sd
= MMC_VDD_32_33
| MMC_VDD_33_34
|
479 MMC_VDD_29_30
| MMC_VDD_30_31
|
480 MMC_VDD_165_195
; /* allow 1.8V */
481 slot
->host
->ocr_avail_mmc
= MMC_VDD_32_33
| MMC_VDD_33_34
|
482 MMC_VDD_29_30
| MMC_VDD_30_31
; /* no 1.8V for MMC */
486 * The secondary interface requires a bit set to get the
489 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
490 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
491 jmicron_enable_mmc(slot
->host
, 1);
493 slot
->host
->mmc
->caps
|= MMC_CAP_BUS_WIDTH_TEST
;
498 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
503 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
504 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
505 jmicron_enable_mmc(slot
->host
, 0);
508 static int jmicron_suspend(struct sdhci_pci_chip
*chip
)
512 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
513 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
514 for (i
= 0; i
< chip
->num_slots
; i
++)
515 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
521 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
525 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
526 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
527 for (i
= 0; i
< chip
->num_slots
; i
++)
528 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
531 ret
= jmicron_pmos(chip
, 1);
533 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
540 static const struct sdhci_pci_fixes sdhci_o2
= {
541 .probe
= sdhci_pci_o2_probe
,
542 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
543 .probe_slot
= sdhci_pci_o2_probe_slot
,
544 .resume
= sdhci_pci_o2_resume
,
547 static const struct sdhci_pci_fixes sdhci_jmicron
= {
548 .probe
= jmicron_probe
,
550 .probe_slot
= jmicron_probe_slot
,
551 .remove_slot
= jmicron_remove_slot
,
553 .suspend
= jmicron_suspend
,
554 .resume
= jmicron_resume
,
557 /* SysKonnect CardBus2SDIO extra registers */
558 #define SYSKT_CTRL 0x200
559 #define SYSKT_RDFIFO_STAT 0x204
560 #define SYSKT_WRFIFO_STAT 0x208
561 #define SYSKT_POWER_DATA 0x20c
562 #define SYSKT_POWER_330 0xef
563 #define SYSKT_POWER_300 0xf8
564 #define SYSKT_POWER_184 0xcc
565 #define SYSKT_POWER_CMD 0x20d
566 #define SYSKT_POWER_START (1 << 7)
567 #define SYSKT_POWER_STATUS 0x20e
568 #define SYSKT_POWER_STATUS_OK (1 << 0)
569 #define SYSKT_BOARD_REV 0x210
570 #define SYSKT_CHIP_REV 0x211
571 #define SYSKT_CONF_DATA 0x212
572 #define SYSKT_CONF_DATA_1V8 (1 << 2)
573 #define SYSKT_CONF_DATA_2V5 (1 << 1)
574 #define SYSKT_CONF_DATA_3V3 (1 << 0)
576 static int syskt_probe(struct sdhci_pci_chip
*chip
)
578 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
579 chip
->pdev
->class &= ~0x0000FF;
580 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
585 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
589 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
590 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
591 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
592 "board rev %d.%d, chip rev %d.%d\n",
593 board_rev
>> 4, board_rev
& 0xf,
594 chip_rev
>> 4, chip_rev
& 0xf);
595 if (chip_rev
>= 0x20)
596 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
598 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
599 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
601 tm
= 10; /* Wait max 1 ms */
603 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
604 if (ps
& SYSKT_POWER_STATUS_OK
)
609 dev_err(&slot
->chip
->pdev
->dev
,
610 "power regulator never stabilized");
611 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
618 static const struct sdhci_pci_fixes sdhci_syskt
= {
619 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
620 .probe
= syskt_probe
,
621 .probe_slot
= syskt_probe_slot
,
624 static int via_probe(struct sdhci_pci_chip
*chip
)
626 if (chip
->pdev
->revision
== 0x10)
627 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
632 static const struct sdhci_pci_fixes sdhci_via
= {
636 static int rtsx_probe_slot(struct sdhci_pci_slot
*slot
)
638 slot
->host
->mmc
->caps2
|= MMC_CAP2_HS200
;
642 static const struct sdhci_pci_fixes sdhci_rtsx
= {
643 .quirks2
= SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
644 SDHCI_QUIRK2_BROKEN_DDR50
,
645 .probe_slot
= rtsx_probe_slot
,
648 static const struct pci_device_id pci_ids
[] = {
650 .vendor
= PCI_VENDOR_ID_RICOH
,
651 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
652 .subvendor
= PCI_ANY_ID
,
653 .subdevice
= PCI_ANY_ID
,
654 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
658 .vendor
= PCI_VENDOR_ID_RICOH
,
660 .subvendor
= PCI_ANY_ID
,
661 .subdevice
= PCI_ANY_ID
,
662 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
666 .vendor
= PCI_VENDOR_ID_RICOH
,
668 .subvendor
= PCI_ANY_ID
,
669 .subdevice
= PCI_ANY_ID
,
670 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
674 .vendor
= PCI_VENDOR_ID_RICOH
,
676 .subvendor
= PCI_ANY_ID
,
677 .subdevice
= PCI_ANY_ID
,
678 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
682 .vendor
= PCI_VENDOR_ID_ENE
,
683 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
684 .subvendor
= PCI_ANY_ID
,
685 .subdevice
= PCI_ANY_ID
,
686 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
690 .vendor
= PCI_VENDOR_ID_ENE
,
691 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
692 .subvendor
= PCI_ANY_ID
,
693 .subdevice
= PCI_ANY_ID
,
694 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
698 .vendor
= PCI_VENDOR_ID_ENE
,
699 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
700 .subvendor
= PCI_ANY_ID
,
701 .subdevice
= PCI_ANY_ID
,
702 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
706 .vendor
= PCI_VENDOR_ID_ENE
,
707 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
708 .subvendor
= PCI_ANY_ID
,
709 .subdevice
= PCI_ANY_ID
,
710 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
714 .vendor
= PCI_VENDOR_ID_MARVELL
,
715 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
716 .subvendor
= PCI_ANY_ID
,
717 .subdevice
= PCI_ANY_ID
,
718 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
722 .vendor
= PCI_VENDOR_ID_JMICRON
,
723 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
724 .subvendor
= PCI_ANY_ID
,
725 .subdevice
= PCI_ANY_ID
,
726 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
730 .vendor
= PCI_VENDOR_ID_JMICRON
,
731 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
732 .subvendor
= PCI_ANY_ID
,
733 .subdevice
= PCI_ANY_ID
,
734 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
738 .vendor
= PCI_VENDOR_ID_JMICRON
,
739 .device
= PCI_DEVICE_ID_JMICRON_JMB388_SD
,
740 .subvendor
= PCI_ANY_ID
,
741 .subdevice
= PCI_ANY_ID
,
742 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
746 .vendor
= PCI_VENDOR_ID_JMICRON
,
747 .device
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
,
748 .subvendor
= PCI_ANY_ID
,
749 .subdevice
= PCI_ANY_ID
,
750 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
754 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
756 .subvendor
= PCI_ANY_ID
,
757 .subdevice
= PCI_ANY_ID
,
758 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
762 .vendor
= PCI_VENDOR_ID_VIA
,
764 .subvendor
= PCI_ANY_ID
,
765 .subdevice
= PCI_ANY_ID
,
766 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
770 .vendor
= PCI_VENDOR_ID_REALTEK
,
772 .subvendor
= PCI_ANY_ID
,
773 .subdevice
= PCI_ANY_ID
,
774 .driver_data
= (kernel_ulong_t
)&sdhci_rtsx
,
778 .vendor
= PCI_VENDOR_ID_INTEL
,
779 .device
= PCI_DEVICE_ID_INTEL_QRK_SD
,
780 .subvendor
= PCI_ANY_ID
,
781 .subdevice
= PCI_ANY_ID
,
782 .driver_data
= (kernel_ulong_t
)&sdhci_intel_qrk
,
786 .vendor
= PCI_VENDOR_ID_INTEL
,
787 .device
= PCI_DEVICE_ID_INTEL_MRST_SD0
,
788 .subvendor
= PCI_ANY_ID
,
789 .subdevice
= PCI_ANY_ID
,
790 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc0
,
794 .vendor
= PCI_VENDOR_ID_INTEL
,
795 .device
= PCI_DEVICE_ID_INTEL_MRST_SD1
,
796 .subvendor
= PCI_ANY_ID
,
797 .subdevice
= PCI_ANY_ID
,
798 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
802 .vendor
= PCI_VENDOR_ID_INTEL
,
803 .device
= PCI_DEVICE_ID_INTEL_MRST_SD2
,
804 .subvendor
= PCI_ANY_ID
,
805 .subdevice
= PCI_ANY_ID
,
806 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
810 .vendor
= PCI_VENDOR_ID_INTEL
,
811 .device
= PCI_DEVICE_ID_INTEL_MFD_SD
,
812 .subvendor
= PCI_ANY_ID
,
813 .subdevice
= PCI_ANY_ID
,
814 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
818 .vendor
= PCI_VENDOR_ID_INTEL
,
819 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO1
,
820 .subvendor
= PCI_ANY_ID
,
821 .subdevice
= PCI_ANY_ID
,
822 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
826 .vendor
= PCI_VENDOR_ID_INTEL
,
827 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO2
,
828 .subvendor
= PCI_ANY_ID
,
829 .subdevice
= PCI_ANY_ID
,
830 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
834 .vendor
= PCI_VENDOR_ID_INTEL
,
835 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC0
,
836 .subvendor
= PCI_ANY_ID
,
837 .subdevice
= PCI_ANY_ID
,
838 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
842 .vendor
= PCI_VENDOR_ID_INTEL
,
843 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC1
,
844 .subvendor
= PCI_ANY_ID
,
845 .subdevice
= PCI_ANY_ID
,
846 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
850 .vendor
= PCI_VENDOR_ID_INTEL
,
851 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO0
,
852 .subvendor
= PCI_ANY_ID
,
853 .subdevice
= PCI_ANY_ID
,
854 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
858 .vendor
= PCI_VENDOR_ID_INTEL
,
859 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO1
,
860 .subvendor
= PCI_ANY_ID
,
861 .subdevice
= PCI_ANY_ID
,
862 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
866 .vendor
= PCI_VENDOR_ID_INTEL
,
867 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC
,
868 .subvendor
= PCI_ANY_ID
,
869 .subdevice
= PCI_ANY_ID
,
870 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
874 .vendor
= PCI_VENDOR_ID_INTEL
,
875 .device
= PCI_DEVICE_ID_INTEL_BYT_SDIO
,
876 .subvendor
= PCI_ANY_ID
,
877 .subdevice
= PCI_ANY_ID
,
878 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
882 .vendor
= PCI_VENDOR_ID_INTEL
,
883 .device
= PCI_DEVICE_ID_INTEL_BYT_SD
,
884 .subvendor
= PCI_ANY_ID
,
885 .subdevice
= PCI_ANY_ID
,
886 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
890 .vendor
= PCI_VENDOR_ID_INTEL
,
891 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC2
,
892 .subvendor
= PCI_ANY_ID
,
893 .subdevice
= PCI_ANY_ID
,
894 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
898 .vendor
= PCI_VENDOR_ID_INTEL
,
899 .device
= PCI_DEVICE_ID_INTEL_BSW_EMMC
,
900 .subvendor
= PCI_ANY_ID
,
901 .subdevice
= PCI_ANY_ID
,
902 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
906 .vendor
= PCI_VENDOR_ID_INTEL
,
907 .device
= PCI_DEVICE_ID_INTEL_BSW_SDIO
,
908 .subvendor
= PCI_ANY_ID
,
909 .subdevice
= PCI_ANY_ID
,
910 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
914 .vendor
= PCI_VENDOR_ID_INTEL
,
915 .device
= PCI_DEVICE_ID_INTEL_BSW_SD
,
916 .subvendor
= PCI_ANY_ID
,
917 .subdevice
= PCI_ANY_ID
,
918 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
922 .vendor
= PCI_VENDOR_ID_INTEL
,
923 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO0
,
924 .subvendor
= PCI_ANY_ID
,
925 .subdevice
= PCI_ANY_ID
,
926 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
930 .vendor
= PCI_VENDOR_ID_INTEL
,
931 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO1
,
932 .subvendor
= PCI_ANY_ID
,
933 .subdevice
= PCI_ANY_ID
,
934 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
938 .vendor
= PCI_VENDOR_ID_INTEL
,
939 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO2
,
940 .subvendor
= PCI_ANY_ID
,
941 .subdevice
= PCI_ANY_ID
,
942 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
946 .vendor
= PCI_VENDOR_ID_INTEL
,
947 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC0
,
948 .subvendor
= PCI_ANY_ID
,
949 .subdevice
= PCI_ANY_ID
,
950 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
954 .vendor
= PCI_VENDOR_ID_INTEL
,
955 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC1
,
956 .subvendor
= PCI_ANY_ID
,
957 .subdevice
= PCI_ANY_ID
,
958 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
962 .vendor
= PCI_VENDOR_ID_INTEL
,
963 .device
= PCI_DEVICE_ID_INTEL_MRFL_MMC
,
964 .subvendor
= PCI_ANY_ID
,
965 .subdevice
= PCI_ANY_ID
,
966 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrfl_mmc
,
969 .vendor
= PCI_VENDOR_ID_O2
,
970 .device
= PCI_DEVICE_ID_O2_8120
,
971 .subvendor
= PCI_ANY_ID
,
972 .subdevice
= PCI_ANY_ID
,
973 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
977 .vendor
= PCI_VENDOR_ID_O2
,
978 .device
= PCI_DEVICE_ID_O2_8220
,
979 .subvendor
= PCI_ANY_ID
,
980 .subdevice
= PCI_ANY_ID
,
981 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
985 .vendor
= PCI_VENDOR_ID_O2
,
986 .device
= PCI_DEVICE_ID_O2_8221
,
987 .subvendor
= PCI_ANY_ID
,
988 .subdevice
= PCI_ANY_ID
,
989 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
993 .vendor
= PCI_VENDOR_ID_O2
,
994 .device
= PCI_DEVICE_ID_O2_8320
,
995 .subvendor
= PCI_ANY_ID
,
996 .subdevice
= PCI_ANY_ID
,
997 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1001 .vendor
= PCI_VENDOR_ID_O2
,
1002 .device
= PCI_DEVICE_ID_O2_8321
,
1003 .subvendor
= PCI_ANY_ID
,
1004 .subdevice
= PCI_ANY_ID
,
1005 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1009 .vendor
= PCI_VENDOR_ID_O2
,
1010 .device
= PCI_DEVICE_ID_O2_FUJIN2
,
1011 .subvendor
= PCI_ANY_ID
,
1012 .subdevice
= PCI_ANY_ID
,
1013 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1017 .vendor
= PCI_VENDOR_ID_O2
,
1018 .device
= PCI_DEVICE_ID_O2_SDS0
,
1019 .subvendor
= PCI_ANY_ID
,
1020 .subdevice
= PCI_ANY_ID
,
1021 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1025 .vendor
= PCI_VENDOR_ID_O2
,
1026 .device
= PCI_DEVICE_ID_O2_SDS1
,
1027 .subvendor
= PCI_ANY_ID
,
1028 .subdevice
= PCI_ANY_ID
,
1029 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1033 .vendor
= PCI_VENDOR_ID_O2
,
1034 .device
= PCI_DEVICE_ID_O2_SEABIRD0
,
1035 .subvendor
= PCI_ANY_ID
,
1036 .subdevice
= PCI_ANY_ID
,
1037 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1041 .vendor
= PCI_VENDOR_ID_O2
,
1042 .device
= PCI_DEVICE_ID_O2_SEABIRD1
,
1043 .subvendor
= PCI_ANY_ID
,
1044 .subdevice
= PCI_ANY_ID
,
1045 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1048 { /* Generic SD host controller */
1049 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
1052 { /* end: all zeroes */ },
1055 MODULE_DEVICE_TABLE(pci
, pci_ids
);
1057 /*****************************************************************************\
1059 * SDHCI core callbacks *
1061 \*****************************************************************************/
1063 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
1065 struct sdhci_pci_slot
*slot
;
1066 struct pci_dev
*pdev
;
1069 slot
= sdhci_priv(host
);
1070 pdev
= slot
->chip
->pdev
;
1072 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
1073 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
1074 (host
->flags
& SDHCI_USE_SDMA
)) {
1075 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
1076 "doesn't fully claim to support it.\n");
1079 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1083 pci_set_master(pdev
);
1088 static void sdhci_pci_set_bus_width(struct sdhci_host
*host
, int width
)
1092 ctrl
= sdhci_readb(host
, SDHCI_HOST_CONTROL
);
1095 case MMC_BUS_WIDTH_8
:
1096 ctrl
|= SDHCI_CTRL_8BITBUS
;
1097 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
1099 case MMC_BUS_WIDTH_4
:
1100 ctrl
|= SDHCI_CTRL_4BITBUS
;
1101 ctrl
&= ~SDHCI_CTRL_8BITBUS
;
1104 ctrl
&= ~(SDHCI_CTRL_8BITBUS
| SDHCI_CTRL_4BITBUS
);
1108 sdhci_writeb(host
, ctrl
, SDHCI_HOST_CONTROL
);
1111 static void sdhci_pci_gpio_hw_reset(struct sdhci_host
*host
)
1113 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1114 int rst_n_gpio
= slot
->rst_n_gpio
;
1116 if (!gpio_is_valid(rst_n_gpio
))
1118 gpio_set_value_cansleep(rst_n_gpio
, 0);
1119 /* For eMMC, minimum is 1us but give it 10us for good measure */
1121 gpio_set_value_cansleep(rst_n_gpio
, 1);
1122 /* For eMMC, minimum is 200us but give it 300us for good measure */
1123 usleep_range(300, 1000);
1126 static void sdhci_pci_hw_reset(struct sdhci_host
*host
)
1128 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1131 slot
->hw_reset(host
);
1134 static const struct sdhci_ops sdhci_pci_ops
= {
1135 .set_clock
= sdhci_set_clock
,
1136 .enable_dma
= sdhci_pci_enable_dma
,
1137 .set_bus_width
= sdhci_pci_set_bus_width
,
1138 .reset
= sdhci_reset
,
1139 .set_uhs_signaling
= sdhci_set_uhs_signaling
,
1140 .hw_reset
= sdhci_pci_hw_reset
,
1143 /*****************************************************************************\
1147 \*****************************************************************************/
1151 static int sdhci_pci_suspend(struct device
*dev
)
1153 struct pci_dev
*pdev
= to_pci_dev(dev
);
1154 struct sdhci_pci_chip
*chip
;
1155 struct sdhci_pci_slot
*slot
;
1156 mmc_pm_flag_t slot_pm_flags
;
1157 mmc_pm_flag_t pm_flags
= 0;
1160 chip
= pci_get_drvdata(pdev
);
1164 for (i
= 0; i
< chip
->num_slots
; i
++) {
1165 slot
= chip
->slots
[i
];
1169 ret
= sdhci_suspend_host(slot
->host
);
1172 goto err_pci_suspend
;
1174 slot_pm_flags
= slot
->host
->mmc
->pm_flags
;
1175 if (slot_pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1176 sdhci_enable_irq_wakeups(slot
->host
);
1178 pm_flags
|= slot_pm_flags
;
1181 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1182 ret
= chip
->fixes
->suspend(chip
);
1184 goto err_pci_suspend
;
1187 if (pm_flags
& MMC_PM_KEEP_POWER
) {
1188 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1189 device_init_wakeup(dev
, true);
1191 device_init_wakeup(dev
, false);
1193 device_init_wakeup(dev
, false);
1199 sdhci_resume_host(chip
->slots
[i
]->host
);
1203 static int sdhci_pci_resume(struct device
*dev
)
1205 struct pci_dev
*pdev
= to_pci_dev(dev
);
1206 struct sdhci_pci_chip
*chip
;
1207 struct sdhci_pci_slot
*slot
;
1210 chip
= pci_get_drvdata(pdev
);
1214 if (chip
->fixes
&& chip
->fixes
->resume
) {
1215 ret
= chip
->fixes
->resume(chip
);
1220 for (i
= 0; i
< chip
->num_slots
; i
++) {
1221 slot
= chip
->slots
[i
];
1225 ret
= sdhci_resume_host(slot
->host
);
1233 #else /* CONFIG_PM */
1235 #define sdhci_pci_suspend NULL
1236 #define sdhci_pci_resume NULL
1238 #endif /* CONFIG_PM */
1240 #ifdef CONFIG_PM_RUNTIME
1242 static int sdhci_pci_runtime_suspend(struct device
*dev
)
1244 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1245 struct sdhci_pci_chip
*chip
;
1246 struct sdhci_pci_slot
*slot
;
1249 chip
= pci_get_drvdata(pdev
);
1253 for (i
= 0; i
< chip
->num_slots
; i
++) {
1254 slot
= chip
->slots
[i
];
1258 ret
= sdhci_runtime_suspend_host(slot
->host
);
1261 goto err_pci_runtime_suspend
;
1264 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1265 ret
= chip
->fixes
->suspend(chip
);
1267 goto err_pci_runtime_suspend
;
1272 err_pci_runtime_suspend
:
1274 sdhci_runtime_resume_host(chip
->slots
[i
]->host
);
1278 static int sdhci_pci_runtime_resume(struct device
*dev
)
1280 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1281 struct sdhci_pci_chip
*chip
;
1282 struct sdhci_pci_slot
*slot
;
1285 chip
= pci_get_drvdata(pdev
);
1289 if (chip
->fixes
&& chip
->fixes
->resume
) {
1290 ret
= chip
->fixes
->resume(chip
);
1295 for (i
= 0; i
< chip
->num_slots
; i
++) {
1296 slot
= chip
->slots
[i
];
1300 ret
= sdhci_runtime_resume_host(slot
->host
);
1308 static int sdhci_pci_runtime_idle(struct device
*dev
)
1315 static const struct dev_pm_ops sdhci_pci_pm_ops
= {
1316 .suspend
= sdhci_pci_suspend
,
1317 .resume
= sdhci_pci_resume
,
1318 SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend
,
1319 sdhci_pci_runtime_resume
, sdhci_pci_runtime_idle
)
1322 /*****************************************************************************\
1324 * Device probing/removal *
1326 \*****************************************************************************/
1328 static struct sdhci_pci_slot
*sdhci_pci_probe_slot(
1329 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int first_bar
,
1332 struct sdhci_pci_slot
*slot
;
1333 struct sdhci_host
*host
;
1334 int ret
, bar
= first_bar
+ slotno
;
1336 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
1337 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
1338 return ERR_PTR(-ENODEV
);
1341 if (pci_resource_len(pdev
, bar
) < 0x100) {
1342 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
1343 "experience problems.\n");
1346 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1347 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
1348 return ERR_PTR(-ENODEV
);
1351 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1352 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
1353 return ERR_PTR(-ENODEV
);
1356 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
1358 dev_err(&pdev
->dev
, "cannot allocate host\n");
1359 return ERR_CAST(host
);
1362 slot
= sdhci_priv(host
);
1366 slot
->pci_bar
= bar
;
1367 slot
->rst_n_gpio
= -EINVAL
;
1368 slot
->cd_gpio
= -EINVAL
;
1371 /* Retrieve platform data if there is any */
1372 if (*sdhci_pci_get_data
)
1373 slot
->data
= sdhci_pci_get_data(pdev
, slotno
);
1376 if (slot
->data
->setup
) {
1377 ret
= slot
->data
->setup(slot
->data
);
1379 dev_err(&pdev
->dev
, "platform setup failed\n");
1383 slot
->rst_n_gpio
= slot
->data
->rst_n_gpio
;
1384 slot
->cd_gpio
= slot
->data
->cd_gpio
;
1387 host
->hw_name
= "PCI";
1388 host
->ops
= &sdhci_pci_ops
;
1389 host
->quirks
= chip
->quirks
;
1390 host
->quirks2
= chip
->quirks2
;
1392 host
->irq
= pdev
->irq
;
1394 ret
= pci_request_region(pdev
, bar
, mmc_hostname(host
->mmc
));
1396 dev_err(&pdev
->dev
, "cannot request region\n");
1400 host
->ioaddr
= pci_ioremap_bar(pdev
, bar
);
1401 if (!host
->ioaddr
) {
1402 dev_err(&pdev
->dev
, "failed to remap registers\n");
1407 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
1408 ret
= chip
->fixes
->probe_slot(slot
);
1413 if (gpio_is_valid(slot
->rst_n_gpio
)) {
1414 if (!gpio_request(slot
->rst_n_gpio
, "eMMC_reset")) {
1415 gpio_direction_output(slot
->rst_n_gpio
, 1);
1416 slot
->host
->mmc
->caps
|= MMC_CAP_HW_RESET
;
1417 slot
->hw_reset
= sdhci_pci_gpio_hw_reset
;
1419 dev_warn(&pdev
->dev
, "failed to request rst_n_gpio\n");
1420 slot
->rst_n_gpio
= -EINVAL
;
1424 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
1425 host
->mmc
->slotno
= slotno
;
1426 host
->mmc
->caps2
|= MMC_CAP2_NO_PRESCAN_POWERUP
;
1428 if (slot
->cd_idx
>= 0 &&
1429 mmc_gpiod_request_cd(host
->mmc
, slot
->cd_con_id
, slot
->cd_idx
,
1430 slot
->cd_override_level
, 0, NULL
)) {
1431 dev_warn(&pdev
->dev
, "failed to setup card detect gpio\n");
1435 ret
= sdhci_add_host(host
);
1439 sdhci_pci_add_own_cd(slot
);
1442 * Check if the chip needs a separate GPIO for card detect to wake up
1443 * from runtime suspend. If it is not there, don't allow runtime PM.
1444 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1446 if (chip
->fixes
&& chip
->fixes
->own_cd_for_runtime_pm
&&
1447 !gpio_is_valid(slot
->cd_gpio
) && slot
->cd_idx
< 0)
1448 chip
->allow_runtime_pm
= false;
1453 if (gpio_is_valid(slot
->rst_n_gpio
))
1454 gpio_free(slot
->rst_n_gpio
);
1456 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
1457 chip
->fixes
->remove_slot(slot
, 0);
1460 iounmap(host
->ioaddr
);
1463 pci_release_region(pdev
, bar
);
1466 if (slot
->data
&& slot
->data
->cleanup
)
1467 slot
->data
->cleanup(slot
->data
);
1470 sdhci_free_host(host
);
1472 return ERR_PTR(ret
);
1475 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
1480 sdhci_pci_remove_own_cd(slot
);
1483 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
1484 if (scratch
== (u32
)-1)
1487 sdhci_remove_host(slot
->host
, dead
);
1489 if (gpio_is_valid(slot
->rst_n_gpio
))
1490 gpio_free(slot
->rst_n_gpio
);
1492 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
1493 slot
->chip
->fixes
->remove_slot(slot
, dead
);
1495 if (slot
->data
&& slot
->data
->cleanup
)
1496 slot
->data
->cleanup(slot
->data
);
1498 pci_release_region(slot
->chip
->pdev
, slot
->pci_bar
);
1500 sdhci_free_host(slot
->host
);
1503 static void sdhci_pci_runtime_pm_allow(struct device
*dev
)
1505 pm_runtime_put_noidle(dev
);
1506 pm_runtime_allow(dev
);
1507 pm_runtime_set_autosuspend_delay(dev
, 50);
1508 pm_runtime_use_autosuspend(dev
);
1509 pm_suspend_ignore_children(dev
, 1);
1512 static void sdhci_pci_runtime_pm_forbid(struct device
*dev
)
1514 pm_runtime_forbid(dev
);
1515 pm_runtime_get_noresume(dev
);
1518 static int sdhci_pci_probe(struct pci_dev
*pdev
,
1519 const struct pci_device_id
*ent
)
1521 struct sdhci_pci_chip
*chip
;
1522 struct sdhci_pci_slot
*slot
;
1524 u8 slots
, first_bar
;
1527 BUG_ON(pdev
== NULL
);
1528 BUG_ON(ent
== NULL
);
1530 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1531 (int)pdev
->vendor
, (int)pdev
->device
, (int)pdev
->revision
);
1533 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1537 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1538 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
1542 BUG_ON(slots
> MAX_SLOTS
);
1544 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1548 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1550 if (first_bar
> 5) {
1551 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
1555 ret
= pci_enable_device(pdev
);
1559 chip
= kzalloc(sizeof(struct sdhci_pci_chip
), GFP_KERNEL
);
1566 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
1568 chip
->quirks
= chip
->fixes
->quirks
;
1569 chip
->quirks2
= chip
->fixes
->quirks2
;
1570 chip
->allow_runtime_pm
= chip
->fixes
->allow_runtime_pm
;
1572 chip
->num_slots
= slots
;
1574 pci_set_drvdata(pdev
, chip
);
1576 if (chip
->fixes
&& chip
->fixes
->probe
) {
1577 ret
= chip
->fixes
->probe(chip
);
1582 slots
= chip
->num_slots
; /* Quirk may have changed this */
1584 for (i
= 0; i
< slots
; i
++) {
1585 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
, i
);
1587 for (i
--; i
>= 0; i
--)
1588 sdhci_pci_remove_slot(chip
->slots
[i
]);
1589 ret
= PTR_ERR(slot
);
1593 chip
->slots
[i
] = slot
;
1596 if (chip
->allow_runtime_pm
)
1597 sdhci_pci_runtime_pm_allow(&pdev
->dev
);
1602 pci_set_drvdata(pdev
, NULL
);
1606 pci_disable_device(pdev
);
1610 static void sdhci_pci_remove(struct pci_dev
*pdev
)
1613 struct sdhci_pci_chip
*chip
;
1615 chip
= pci_get_drvdata(pdev
);
1618 if (chip
->allow_runtime_pm
)
1619 sdhci_pci_runtime_pm_forbid(&pdev
->dev
);
1621 for (i
= 0; i
< chip
->num_slots
; i
++)
1622 sdhci_pci_remove_slot(chip
->slots
[i
]);
1624 pci_set_drvdata(pdev
, NULL
);
1628 pci_disable_device(pdev
);
1631 static struct pci_driver sdhci_driver
= {
1632 .name
= "sdhci-pci",
1633 .id_table
= pci_ids
,
1634 .probe
= sdhci_pci_probe
,
1635 .remove
= sdhci_pci_remove
,
1637 .pm
= &sdhci_pci_pm_ops
1641 module_pci_driver(sdhci_driver
);
1643 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1644 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1645 MODULE_LICENSE("GPL");