drivers/mmc/host/sdhci-s3c.c

   1 /* linux/drivers/mmc/host/sdhci-s3c.c
   2  *
   3  * Copyright 2008 Openmoko Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * SDHCI (HSMMC) support for Samsung SoC
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/slab.h>
  19 #include <linux/clk.h>
  20 #include <linux/io.h>
  21 #include <linux/gpio.h>
  22 #include <linux/module.h>
  23 #include <linux/of.h>
  24 #include <linux/of_gpio.h>
  25 #include <linux/pm.h>
  26 #include <linux/pm_runtime.h>
  27 #include <linux/pinctrl/consumer.h>
  28
  29 #include <linux/mmc/host.h>
  30
  31 #include <plat/sdhci.h>
  32 #include <plat/regs-sdhci.h>
  33
  34 #include "sdhci.h"
  35
  36 #define MAX_BUS_CLK     (4)
  37
  38 /* Number of gpio's used is max data bus width + command and clock lines */
  39 #define NUM_GPIOS(x)    (x + 2)
  40
  41 /**
  42  * struct sdhci_s3c - S3C SDHCI instance
  43  * @host: The SDHCI host created
  44  * @pdev: The platform device we where created from.
  45  * @ioarea: The resource created when we claimed the IO area.
  46  * @pdata: The platform data for this controller.
  47  * @cur_clk: The index of the current bus clock.
  48  * @gpios: List of gpio numbers parsed from device tree.
  49  * @clk_io: The clock for the internal bus interface.
  50  * @clk_bus: The clocks that are available for the SD/MMC bus clock.
  51  */
  52 struct sdhci_s3c {
  53         struct sdhci_host       *host;
  54         struct platform_device  *pdev;
  55         struct resource         *ioarea;
  56         struct s3c_sdhci_platdata *pdata;
  57         unsigned int            cur_clk;
  58         int                     ext_cd_irq;
  59         int                     ext_cd_gpio;
  60         int                     *gpios;
  61         struct pinctrl          *pctrl;
  62
  63         struct clk              *clk_io;
  64         struct clk              *clk_bus[MAX_BUS_CLK];
  65 };
  66
  67 /**
  68  * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
  69  * @sdhci_quirks: sdhci host specific quirks.
  70  *
  71  * Specifies platform specific configuration of sdhci controller.
  72  * Note: A structure for driver specific platform data is used for future
  73  * expansion of its usage.
  74  */
  75 struct sdhci_s3c_drv_data {
  76         unsigned int    sdhci_quirks;
  77 };
  78
  79 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
  80 {
  81         return sdhci_priv(host);
  82 }
  83
  84 /**
  85  * get_curclk - convert ctrl2 register to clock source number
  86  * @ctrl2: Control2 register value.
  87  */
  88 static u32 get_curclk(u32 ctrl2)
  89 {
  90         ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  91         ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  92
  93         return ctrl2;
  94 }
  95
  96 static void sdhci_s3c_check_sclk(struct sdhci_host *host)
  97 {
  98         struct sdhci_s3c *ourhost = to_s3c(host);
  99         u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
 100
 101         if (get_curclk(tmp) != ourhost->cur_clk) {
 102                 dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
 103
 104                 tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
 105                 tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
 106                 writel(tmp, host->ioaddr + S3C_SDHCI_CONTROL2);
 107         }
 108 }
 109
 110 /**
 111  * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
 112  * @host: The SDHCI host instance.
 113  *
 114  * Callback to return the maximum clock rate acheivable by the controller.
 115 */
 116 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
 117 {
 118         struct sdhci_s3c *ourhost = to_s3c(host);
 119         struct clk *busclk;
 120         unsigned int rate, max;
 121         int clk;
 122
 123         /* note, a reset will reset the clock source */
 124
 125         sdhci_s3c_check_sclk(host);
 126
 127         for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
 128                 busclk = ourhost->clk_bus[clk];
 129                 if (!busclk)
 130                         continue;
 131
 132                 rate = clk_get_rate(busclk);
 133                 if (rate > max)
 134                         max = rate;
 135         }
 136
 137         return max;
 138 }
 139
 140 /**
 141  * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
 142  * @ourhost: Our SDHCI instance.
 143  * @src: The source clock index.
 144  * @wanted: The clock frequency wanted.
 145  */
 146 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
 147                                              unsigned int src,
 148                                              unsigned int wanted)
 149 {
 150         unsigned long rate;
 151         struct clk *clksrc = ourhost->clk_bus[src];
 152         int div;
 153
 154         if (!clksrc)
 155                 return UINT_MAX;
 156
 157         /*
 158          * If controller uses a non-standard clock division, find the best clock
 159          * speed possible with selected clock source and skip the division.
 160          */
 161         if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
 162                 rate = clk_round_rate(clksrc, wanted);
 163                 return wanted - rate;
 164         }
 165
 166         rate = clk_get_rate(clksrc);
 167
 168         for (div = 1; div < 256; div *= 2) {
 169                 if ((rate / div) <= wanted)
 170                         break;
 171         }
 172
 173         dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
 174                 src, rate, wanted, rate / div);
 175
 176         return wanted - (rate / div);
 177 }
 178
 179 /**
 180  * sdhci_s3c_set_clock - callback on clock change
 181  * @host: The SDHCI host being changed
 182  * @clock: The clock rate being requested.
 183  *
 184  * When the card's clock is going to be changed, look at the new frequency
 185  * and find the best clock source to go with it.
 186 */
 187 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 188 {
 189         struct sdhci_s3c *ourhost = to_s3c(host);
 190         unsigned int best = UINT_MAX;
 191         unsigned int delta;
 192         int best_src = 0;
 193         int src;
 194         u32 ctrl;
 195
 196         /* don't bother if the clock is going off. */
 197         if (clock == 0)
 198                 return;
 199
 200         for (src = 0; src < MAX_BUS_CLK; src++) {
 201                 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
 202                 if (delta < best) {
 203                         best = delta;
 204                         best_src = src;
 205                 }
 206         }
 207
 208         dev_dbg(&ourhost->pdev->dev,
 209                 "selected source %d, clock %d, delta %d\n",
 210                  best_src, clock, best);
 211
 212         /* select the new clock source */
 213         if (ourhost->cur_clk != best_src) {
 214                 struct clk *clk = ourhost->clk_bus[best_src];
 215
 216                 clk_prepare_enable(clk);
 217                 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
 218
 219                 /* turn clock off to card before changing clock source */
 220                 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 221
 222                 ourhost->cur_clk = best_src;
 223                 host->max_clk = clk_get_rate(clk);
 224
 225                 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
 226                 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
 227                 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
 228                 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 229         }
 230
 231         /* reprogram default hardware configuration */
 232         writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
 233                 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
 234
 235         ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
 236         ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
 237                   S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
 238                   S3C_SDHCI_CTRL2_ENFBCLKRX |
 239                   S3C_SDHCI_CTRL2_DFCNT_NONE |
 240                   S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
 241         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 242
 243         /* reconfigure the controller for new clock rate */
 244         ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
 245         if (clock < 25 * 1000000)
 246                 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
 247         writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 248 }
 249
 250 /**
 251  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
 252  * @host: The SDHCI host being queried
 253  *
 254  * To init mmc host properly a minimal clock value is needed. For high system
 255  * bus clock's values the standard formula gives values out of allowed range.
 256  * The clock still can be set to lower values, if clock source other then
 257  * system bus is selected.
 258 */
 259 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
 260 {
 261         struct sdhci_s3c *ourhost = to_s3c(host);
 262         unsigned int delta, min = UINT_MAX;
 263         int src;
 264
 265         for (src = 0; src < MAX_BUS_CLK; src++) {
 266                 delta = sdhci_s3c_consider_clock(ourhost, src, 0);
 267                 if (delta == UINT_MAX)
 268                         continue;
 269                 /* delta is a negative value in this case */
 270                 if (-delta < min)
 271                         min = -delta;
 272         }
 273         return min;
 274 }
 275
 276 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
 277 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
 278 {
 279         struct sdhci_s3c *ourhost = to_s3c(host);
 280
 281         return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);
 282 }
 283
 284 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
 285 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
 286 {
 287         struct sdhci_s3c *ourhost = to_s3c(host);
 288
 289         /*
 290          * initial clock can be in the frequency range of
 291          * 100KHz-400KHz, so we set it as max value.
 292          */
 293         return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000);
 294 }
 295
 296 /* sdhci_cmu_set_clock - callback on clock change.*/
 297 static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
 298 {
 299         struct sdhci_s3c *ourhost = to_s3c(host);
 300         struct device *dev = &ourhost->pdev->dev;
 301         unsigned long timeout;
 302         u16 clk = 0;
 303
 304         /* don't bother if the clock is going off */
 305         if (clock == 0)
 306                 return;
 307
 308         sdhci_s3c_set_clock(host, clock);
 309
 310         clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
 311
 312         host->clock = clock;
 313
 314         clk = SDHCI_CLOCK_INT_EN;
 315         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 316
 317         /* Wait max 20 ms */
 318         timeout = 20;
 319         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 320                 & SDHCI_CLOCK_INT_STABLE)) {
 321                 if (timeout == 0) {
 322                         dev_err(dev, "%s: Internal clock never stabilised.\n",
 323                                 mmc_hostname(host->mmc));
 324                         return;
 325                 }
 326                 timeout--;
 327                 mdelay(1);
 328         }
 329
 330         clk |= SDHCI_CLOCK_CARD_EN;
 331         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 332 }
 333
 334 /**
 335  * sdhci_s3c_platform_8bit_width - support 8bit buswidth
 336  * @host: The SDHCI host being queried
 337  * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
 338  *
 339  * We have 8-bit width support but is not a v3 controller.
 340  * So we add platform_8bit_width() and support 8bit width.
 341  */
 342 static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
 343 {
 344         u8 ctrl;
 345
 346         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 347
 348         switch (width) {
 349         case MMC_BUS_WIDTH_8:
 350                 ctrl |= SDHCI_CTRL_8BITBUS;
 351                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 352                 break;
 353         case MMC_BUS_WIDTH_4:
 354                 ctrl |= SDHCI_CTRL_4BITBUS;
 355                 ctrl &= ~SDHCI_CTRL_8BITBUS;
 356                 break;
 357         default:
 358                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 359                 ctrl &= ~SDHCI_CTRL_8BITBUS;
 360                 break;
 361         }
 362
 363         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 364
 365         return 0;
 366 }
 367
 368 static struct sdhci_ops sdhci_s3c_ops = {
 369         .get_max_clock          = sdhci_s3c_get_max_clk,
 370         .set_clock              = sdhci_s3c_set_clock,
 371         .get_min_clock          = sdhci_s3c_get_min_clock,
 372         .platform_8bit_width    = sdhci_s3c_platform_8bit_width,
 373 };
 374
 375 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
 376 {
 377         struct sdhci_host *host = platform_get_drvdata(dev);
 378 #ifdef CONFIG_PM_RUNTIME
 379         struct sdhci_s3c *sc = sdhci_priv(host);
 380 #endif
 381         unsigned long flags;
 382
 383         if (host) {
 384                 spin_lock_irqsave(&host->lock, flags);
 385                 if (state) {
 386                         dev_dbg(&dev->dev, "card inserted.\n");
 387 #ifdef CONFIG_PM_RUNTIME
 388                         clk_prepare_enable(sc->clk_io);
 389 #endif
 390                         host->flags &= ~SDHCI_DEVICE_DEAD;
 391                         host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 392                 } else {
 393                         dev_dbg(&dev->dev, "card removed.\n");
 394                         host->flags |= SDHCI_DEVICE_DEAD;
 395                         host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 396 #ifdef CONFIG_PM_RUNTIME
 397                         clk_disable_unprepare(sc->clk_io);
 398 #endif
 399                 }
 400                 tasklet_schedule(&host->card_tasklet);
 401                 spin_unlock_irqrestore(&host->lock, flags);
 402         }
 403 }
 404
 405 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
 406 {
 407         struct sdhci_s3c *sc = dev_id;
 408         int status = gpio_get_value(sc->ext_cd_gpio);
 409         if (sc->pdata->ext_cd_gpio_invert)
 410                 status = !status;
 411         sdhci_s3c_notify_change(sc->pdev, status);
 412         return IRQ_HANDLED;
 413 }
 414
 415 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
 416 {
 417         struct s3c_sdhci_platdata *pdata = sc->pdata;
 418         struct device *dev = &sc->pdev->dev;
 419
 420         if (devm_gpio_request(dev, pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
 421                 sc->ext_cd_gpio = pdata->ext_cd_gpio;
 422                 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
 423                 if (sc->ext_cd_irq &&
 424                     request_threaded_irq(sc->ext_cd_irq, NULL,
 425                                          sdhci_s3c_gpio_card_detect_thread,
 426                                          IRQF_TRIGGER_RISING |
 427                                          IRQF_TRIGGER_FALLING |
 428                                          IRQF_ONESHOT,
 429                                          dev_name(dev), sc) == 0) {
 430                         int status = gpio_get_value(sc->ext_cd_gpio);
 431                         if (pdata->ext_cd_gpio_invert)
 432                                 status = !status;
 433                         sdhci_s3c_notify_change(sc->pdev, status);
 434                 } else {
 435                         dev_warn(dev, "cannot request irq for card detect\n");
 436                         sc->ext_cd_irq = 0;
 437                 }
 438         } else {
 439                 dev_err(dev, "cannot request gpio for card detect\n");
 440         }
 441 }
 442
 443 #ifdef CONFIG_OF
 444 static int sdhci_s3c_parse_dt(struct device *dev,
 445                 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
 446 {
 447         struct device_node *node = dev->of_node;
 448         struct sdhci_s3c *ourhost = to_s3c(host);
 449         u32 max_width;
 450         int gpio, cnt, ret;
 451
 452         /* if the bus-width property is not specified, assume width as 1 */
 453         if (of_property_read_u32(node, "bus-width", &max_width))
 454                 max_width = 1;
 455         pdata->max_width = max_width;
 456
 457         ourhost->gpios = devm_kzalloc(dev, NUM_GPIOS(pdata->max_width) *
 458                                 sizeof(int), GFP_KERNEL);
 459         if (!ourhost->gpios)
 460                 return -ENOMEM;
 461
 462         /* get the card detection method */
 463         if (of_get_property(node, "broken-cd", NULL)) {
 464                 pdata->cd_type = S3C_SDHCI_CD_NONE;
 465                 goto setup_bus;
 466         }
 467
 468         if (of_get_property(node, "non-removable", NULL)) {
 469                 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
 470                 goto setup_bus;
 471         }
 472
 473         gpio = of_get_named_gpio(node, "cd-gpios", 0);
 474         if (gpio_is_valid(gpio)) {
 475                 pdata->cd_type = S3C_SDHCI_CD_GPIO;
 476                 goto found_cd;
 477         } else if (gpio != -ENOENT) {
 478                 dev_err(dev, "invalid card detect gpio specified\n");
 479                 return -EINVAL;
 480         }
 481
 482         gpio = of_get_named_gpio(node, "samsung,cd-pinmux-gpio", 0);
 483         if (gpio_is_valid(gpio)) {
 484                 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
 485                 goto found_cd;
 486         } else if (gpio != -ENOENT) {
 487                 dev_err(dev, "invalid card detect gpio specified\n");
 488                 return -EINVAL;
 489         }
 490
 491         /* assuming internal card detect that will be configured by pinctrl */
 492         pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
 493         goto setup_bus;
 494
 495  found_cd:
 496         if (pdata->cd_type == S3C_SDHCI_CD_GPIO) {
 497                 pdata->ext_cd_gpio = gpio;
 498                 ourhost->ext_cd_gpio = -1;
 499                 if (of_get_property(node, "cd-inverted", NULL))
 500                         pdata->ext_cd_gpio_invert = 1;
 501         } else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
 502                 ret = devm_gpio_request(dev, gpio, "sdhci-cd");
 503                 if (ret) {
 504                         dev_err(dev, "card detect gpio request failed\n");
 505                         return -EINVAL;
 506                 }
 507                 ourhost->ext_cd_gpio = gpio;
 508         }
 509
 510  setup_bus:
 511         if (!IS_ERR(ourhost->pctrl))
 512                 return 0;
 513
 514         /* get the gpios for command, clock and data lines */
 515         for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
 516                 gpio = of_get_gpio(node, cnt);
 517                 if (!gpio_is_valid(gpio)) {
 518                         dev_err(dev, "invalid gpio[%d]\n", cnt);
 519                         return -EINVAL;
 520                 }
 521                 ourhost->gpios[cnt] = gpio;
 522         }
 523
 524         for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
 525                 ret = devm_gpio_request(dev, ourhost->gpios[cnt], "sdhci-gpio");
 526                 if (ret) {
 527                         dev_err(dev, "gpio[%d] request failed\n", cnt);
 528                         return -EINVAL;
 529                 }
 530         }
 531
 532         return 0;
 533 }
 534 #else
 535 static int sdhci_s3c_parse_dt(struct device *dev,
 536                 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
 537 {
 538         return -EINVAL;
 539 }
 540 #endif
 541
 542 static const struct of_device_id sdhci_s3c_dt_match[];
 543
 544 static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data(
 545                         struct platform_device *pdev)
 546 {
 547 #ifdef CONFIG_OF
 548         if (pdev->dev.of_node) {
 549                 const struct of_device_id *match;
 550                 match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node);
 551                 return (struct sdhci_s3c_drv_data *)match->data;
 552         }
 553 #endif
 554         return (struct sdhci_s3c_drv_data *)
 555                         platform_get_device_id(pdev)->driver_data;
 556 }
 557
 558 static int sdhci_s3c_probe(struct platform_device *pdev)
 559 {
 560         struct s3c_sdhci_platdata *pdata;
 561         struct sdhci_s3c_drv_data *drv_data;
 562         struct device *dev = &pdev->dev;
 563         struct sdhci_host *host;
 564         struct sdhci_s3c *sc;
 565         struct resource *res;
 566         int ret, irq, ptr, clks;
 567
 568         if (!pdev->dev.platform_data && !pdev->dev.of_node) {
 569                 dev_err(dev, "no device data specified\n");
 570                 return -ENOENT;
 571         }
 572
 573         irq = platform_get_irq(pdev, 0);
 574         if (irq < 0) {
 575                 dev_err(dev, "no irq specified\n");
 576                 return irq;
 577         }
 578
 579         host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
 580         if (IS_ERR(host)) {
 581                 dev_err(dev, "sdhci_alloc_host() failed\n");
 582                 return PTR_ERR(host);
 583         }
 584         sc = sdhci_priv(host);
 585
 586         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 587         if (!pdata) {
 588                 ret = -ENOMEM;
 589                 goto err_pdata_io_clk;
 590         }
 591
 592         sc->pctrl = devm_pinctrl_get_select_default(&pdev->dev);
 593
 594         if (pdev->dev.of_node) {
 595                 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
 596                 if (ret)
 597                         goto err_pdata_io_clk;
 598         } else {
 599                 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
 600                 sc->ext_cd_gpio = -1; /* invalid gpio number */
 601         }
 602
 603         drv_data = sdhci_s3c_get_driver_data(pdev);
 604
 605         sc->host = host;
 606         sc->pdev = pdev;
 607         sc->pdata = pdata;
 608
 609         platform_set_drvdata(pdev, host);
 610
 611         sc->clk_io = clk_get(dev, "hsmmc");
 612         if (IS_ERR(sc->clk_io)) {
 613                 dev_err(dev, "failed to get io clock\n");
 614                 ret = PTR_ERR(sc->clk_io);
 615                 goto err_pdata_io_clk;
 616         }
 617
 618         /* enable the local io clock and keep it running for the moment. */
 619         clk_prepare_enable(sc->clk_io);
 620
 621         for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 622                 struct clk *clk;
 623                 char name[14];
 624
 625                 snprintf(name, 14, "mmc_busclk.%d", ptr);
 626                 clk = clk_get(dev, name);
 627                 if (IS_ERR(clk))
 628                         continue;
 629
 630                 clks++;
 631                 sc->clk_bus[ptr] = clk;
 632
 633                 /*
 634                  * save current clock index to know which clock bus
 635                  * is used later in overriding functions.
 636                  */
 637                 sc->cur_clk = ptr;
 638
 639                 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
 640                          ptr, name, clk_get_rate(clk));
 641         }
 642
 643         if (clks == 0) {
 644                 dev_err(dev, "failed to find any bus clocks\n");
 645                 ret = -ENOENT;
 646                 goto err_no_busclks;
 647         }
 648
 649 #ifndef CONFIG_PM_RUNTIME
 650         clk_prepare_enable(sc->clk_bus[sc->cur_clk]);
 651 #endif
 652
 653         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 654         host->ioaddr = devm_request_and_ioremap(&pdev->dev, res);
 655         if (!host->ioaddr) {
 656                 dev_err(dev, "failed to map registers\n");
 657                 ret = -ENXIO;
 658                 goto err_req_regs;
 659         }
 660
 661         /* Ensure we have minimal gpio selected CMD/CLK/Detect */
 662         if (pdata->cfg_gpio)
 663                 pdata->cfg_gpio(pdev, pdata->max_width);
 664
 665         host->hw_name = "samsung-hsmmc";
 666         host->ops = &sdhci_s3c_ops;
 667         host->quirks = 0;
 668         host->irq = irq;
 669
 670         /* Setup quirks for the controller */
 671         host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
 672         host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
 673         if (drv_data)
 674                 host->quirks |= drv_data->sdhci_quirks;
 675
 676 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
 677
 678         /* we currently see overruns on errors, so disable the SDMA
 679          * support as well. */
 680         host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
 681
 682 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
 683
 684         /* It seems we do not get an DATA transfer complete on non-busy
 685          * transfers, not sure if this is a problem with this specific
 686          * SDHCI block, or a missing configuration that needs to be set. */
 687         host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
 688
 689         /* This host supports the Auto CMD12 */
 690         host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
 691
 692         /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
 693         host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
 694
 695         if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
 696             pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
 697                 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
 698
 699         if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
 700                 host->mmc->caps = MMC_CAP_NONREMOVABLE;
 701
 702         switch (pdata->max_width) {
 703         case 8:
 704                 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 705         case 4:
 706                 host->mmc->caps |= MMC_CAP_4_BIT_DATA;
 707                 break;
 708         }
 709
 710         if (pdata->pm_caps)
 711                 host->mmc->pm_caps |= pdata->pm_caps;
 712
 713         host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
 714                          SDHCI_QUIRK_32BIT_DMA_SIZE);
 715
 716         /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
 717         host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
 718
 719         /*
 720          * If controller does not have internal clock divider,
 721          * we can use overriding functions instead of default.
 722          */
 723         if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
 724                 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
 725                 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
 726                 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
 727         }
 728
 729         /* It supports additional host capabilities if needed */
 730         if (pdata->host_caps)
 731                 host->mmc->caps |= pdata->host_caps;
 732
 733         if (pdata->host_caps2)
 734                 host->mmc->caps2 |= pdata->host_caps2;
 735
 736         pm_runtime_enable(&pdev->dev);
 737         pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
 738         pm_runtime_use_autosuspend(&pdev->dev);
 739         pm_suspend_ignore_children(&pdev->dev, 1);
 740
 741         ret = sdhci_add_host(host);
 742         if (ret) {
 743                 dev_err(dev, "sdhci_add_host() failed\n");
 744                 pm_runtime_forbid(&pdev->dev);
 745                 pm_runtime_get_noresume(&pdev->dev);
 746                 goto err_req_regs;
 747         }
 748
 749         /* The following two methods of card detection might call
 750            sdhci_s3c_notify_change() immediately, so they can be called
 751            only after sdhci_add_host(). Setup errors are ignored. */
 752         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
 753                 pdata->ext_cd_init(&sdhci_s3c_notify_change);
 754         if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
 755             gpio_is_valid(pdata->ext_cd_gpio))
 756                 sdhci_s3c_setup_card_detect_gpio(sc);
 757
 758 #ifdef CONFIG_PM_RUNTIME
 759         if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
 760                 clk_disable_unprepare(sc->clk_io);
 761 #endif
 762         return 0;
 763
 764  err_req_regs:
 765 #ifndef CONFIG_PM_RUNTIME
 766         clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
 767 #endif
 768         for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 769                 if (sc->clk_bus[ptr]) {
 770                         clk_put(sc->clk_bus[ptr]);
 771                 }
 772         }
 773
 774  err_no_busclks:
 775         clk_disable_unprepare(sc->clk_io);
 776         clk_put(sc->clk_io);
 777
 778  err_pdata_io_clk:
 779         sdhci_free_host(host);
 780
 781         return ret;
 782 }
 783
 784 static int sdhci_s3c_remove(struct platform_device *pdev)
 785 {
 786         struct sdhci_host *host =  platform_get_drvdata(pdev);
 787         struct sdhci_s3c *sc = sdhci_priv(host);
 788         struct s3c_sdhci_platdata *pdata = sc->pdata;
 789         int ptr;
 790
 791         if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
 792                 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
 793
 794         if (sc->ext_cd_irq)
 795                 free_irq(sc->ext_cd_irq, sc);
 796
 797 #ifdef CONFIG_PM_RUNTIME
 798         if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
 799                 clk_prepare_enable(sc->clk_io);
 800 #endif
 801         sdhci_remove_host(host, 1);
 802
 803         pm_runtime_dont_use_autosuspend(&pdev->dev);
 804         pm_runtime_disable(&pdev->dev);
 805
 806 #ifndef CONFIG_PM_RUNTIME
 807         clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
 808 #endif
 809         for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 810                 if (sc->clk_bus[ptr]) {
 811                         clk_put(sc->clk_bus[ptr]);
 812                 }
 813         }
 814         clk_disable_unprepare(sc->clk_io);
 815         clk_put(sc->clk_io);
 816
 817         sdhci_free_host(host);
 818         platform_set_drvdata(pdev, NULL);
 819
 820         return 0;
 821 }
 822
 823 #ifdef CONFIG_PM_SLEEP
 824 static int sdhci_s3c_suspend(struct device *dev)
 825 {
 826         struct sdhci_host *host = dev_get_drvdata(dev);
 827
 828         return sdhci_suspend_host(host);
 829 }
 830
 831 static int sdhci_s3c_resume(struct device *dev)
 832 {
 833         struct sdhci_host *host = dev_get_drvdata(dev);
 834
 835         return sdhci_resume_host(host);
 836 }
 837 #endif
 838
 839 #ifdef CONFIG_PM_RUNTIME
 840 static int sdhci_s3c_runtime_suspend(struct device *dev)
 841 {
 842         struct sdhci_host *host = dev_get_drvdata(dev);
 843         struct sdhci_s3c *ourhost = to_s3c(host);
 844         struct clk *busclk = ourhost->clk_io;
 845         int ret;
 846
 847         ret = sdhci_runtime_suspend_host(host);
 848
 849         clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
 850         clk_disable_unprepare(busclk);
 851         return ret;
 852 }
 853
 854 static int sdhci_s3c_runtime_resume(struct device *dev)
 855 {
 856         struct sdhci_host *host = dev_get_drvdata(dev);
 857         struct sdhci_s3c *ourhost = to_s3c(host);
 858         struct clk *busclk = ourhost->clk_io;
 859         int ret;
 860
 861         clk_prepare_enable(busclk);
 862         clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
 863         ret = sdhci_runtime_resume_host(host);
 864         return ret;
 865 }
 866 #endif
 867
 868 #ifdef CONFIG_PM
 869 static const struct dev_pm_ops sdhci_s3c_pmops = {
 870         SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume)
 871         SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume,
 872                            NULL)
 873 };
 874
 875 #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
 876
 877 #else
 878 #define SDHCI_S3C_PMOPS NULL
 879 #endif
 880
 881 #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
 882 static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
 883         .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
 884 };
 885 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
 886 #else
 887 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL)
 888 #endif
 889
 890 static struct platform_device_id sdhci_s3c_driver_ids[] = {
 891         {
 892                 .name           = "s3c-sdhci",
 893                 .driver_data    = (kernel_ulong_t)NULL,
 894         }, {
 895                 .name           = "exynos4-sdhci",
 896                 .driver_data    = EXYNOS4_SDHCI_DRV_DATA,
 897         },
 898         { }
 899 };
 900 MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids);
 901
 902 #ifdef CONFIG_OF
 903 static const struct of_device_id sdhci_s3c_dt_match[] = {
 904         { .compatible = "samsung,s3c6410-sdhci", },
 905         { .compatible = "samsung,exynos4210-sdhci",
 906                 .data = (void *)EXYNOS4_SDHCI_DRV_DATA },
 907         {},
 908 };
 909 MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
 910 #endif
 911
 912 static struct platform_driver sdhci_s3c_driver = {
 913         .probe          = sdhci_s3c_probe,
 914         .remove         = sdhci_s3c_remove,
 915         .id_table       = sdhci_s3c_driver_ids,
 916         .driver         = {
 917                 .owner  = THIS_MODULE,
 918                 .name   = "s3c-sdhci",
 919                 .of_match_table = of_match_ptr(sdhci_s3c_dt_match),
 920                 .pm     = SDHCI_S3C_PMOPS,
 921         },
 922 };
 923
 924 module_platform_driver(sdhci_s3c_driver);
 925
 926 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
 927 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 928 MODULE_LICENSE("GPL v2");
 929 MODULE_ALIAS("platform:s3c-sdhci");