drivers/mmc/host/toshsd.c

   1 /*
   2  *  Toshiba PCI Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2014 Ondrej Zary
   5  *  Copyright (C) 2007 Richard Betts, All Rights Reserved.
   6  *
   7  *      Based on asic3_mmc.c, copyright (c) 2005 SDG Systems, LLC and,
   8  *      sdhci.c, copyright (C) 2005-2006 Pierre Ossman
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/device.h>
  18 #include <linux/module.h>
  19 #include <linux/pci.h>
  20 #include <linux/scatterlist.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/io.h>
  23 #include <linux/pm.h>
  24 #include <linux/mmc/host.h>
  25 #include <linux/mmc/mmc.h>
  26
  27 #include "toshsd.h"
  28
  29 #define DRIVER_NAME "toshsd"
  30
  31 static const struct pci_device_id pci_ids[] = {
  32         { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA, 0x0805) },
  33         { /* end: all zeroes */ },
  34 };
  35
  36 MODULE_DEVICE_TABLE(pci, pci_ids);
  37
  38 static void toshsd_init(struct toshsd_host *host)
  39 {
  40         /* enable clock */
  41         pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP,
  42                                         SD_PCICFG_CLKSTOP_ENABLE_ALL);
  43         pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2);
  44
  45         /* reset */
  46         iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */
  47         mdelay(2);
  48         iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */
  49         mdelay(2);
  50
  51         /* Clear card registers */
  52         iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
  53         iowrite32(0, host->ioaddr + SD_CARDSTATUS);
  54         iowrite32(0, host->ioaddr + SD_ERRORSTATUS0);
  55         iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
  56
  57         /* SDIO clock? */
  58         iowrite16(0x100, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
  59
  60         /* enable LED */
  61         pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE1,
  62                                         SD_PCICFG_LED_ENABLE1_START);
  63         pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE2,
  64                                         SD_PCICFG_LED_ENABLE2_START);
  65
  66         /* set interrupt masks */
  67         iowrite32(~(u32)(SD_CARD_RESP_END | SD_CARD_RW_END
  68                         | SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0
  69                         | SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE
  70                         | SD_BUF_CMD_TIMEOUT),
  71                         host->ioaddr + SD_INTMASKCARD);
  72
  73         iowrite16(0x1000, host->ioaddr + SD_TRANSACTIONCTRL);
  74 }
  75
  76 /* Set MMC clock / power.
  77  * Note: This controller uses a simple divider scheme therefore it cannot run
  78  * SD/MMC cards at full speed (24/20MHz). HCLK (=33MHz PCI clock?) is too high
  79  * and the next slowest is 16MHz (div=2).
  80  */
  81 static void __toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  82 {
  83         struct toshsd_host *host = mmc_priv(mmc);
  84
  85         if (ios->clock) {
  86                 u16 clk;
  87                 int div = 1;
  88
  89                 while (ios->clock < HCLK / div)
  90                         div *= 2;
  91
  92                 clk = div >> 2;
  93
  94                 if (div == 1) { /* disable the divider */
  95                         pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE,
  96                                               SD_PCICFG_CLKMODE_DIV_DISABLE);
  97                         clk |= SD_CARDCLK_DIV_DISABLE;
  98                 } else
  99                         pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE, 0);
 100
 101                 clk |= SD_CARDCLK_ENABLE_CLOCK;
 102                 iowrite16(clk, host->ioaddr + SD_CARDCLOCKCTRL);
 103
 104                 mdelay(10);
 105         } else
 106                 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
 107
 108         switch (ios->power_mode) {
 109         case MMC_POWER_OFF:
 110                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
 111                                         SD_PCICFG_PWR1_OFF);
 112                 mdelay(1);
 113                 break;
 114         case MMC_POWER_UP:
 115                 break;
 116         case MMC_POWER_ON:
 117                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
 118                                         SD_PCICFG_PWR1_33V);
 119                 pci_write_config_byte(host->pdev, SD_PCICFG_POWER2,
 120                                         SD_PCICFG_PWR2_AUTO);
 121                 mdelay(20);
 122                 break;
 123         }
 124
 125         switch (ios->bus_width) {
 126         case MMC_BUS_WIDTH_1:
 127                 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
 128                                 | SD_CARDOPT_C2_MODULE_ABSENT
 129                                 | SD_CARDOPT_DATA_XFR_WIDTH_1,
 130                                 host->ioaddr + SD_CARDOPTIONSETUP);
 131                 break;
 132         case MMC_BUS_WIDTH_4:
 133                 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
 134                                 | SD_CARDOPT_C2_MODULE_ABSENT
 135                                 | SD_CARDOPT_DATA_XFR_WIDTH_4,
 136                                 host->ioaddr + SD_CARDOPTIONSETUP);
 137                 break;
 138         }
 139 }
 140
 141 static void toshsd_set_led(struct toshsd_host *host, unsigned char state)
 142 {
 143         iowrite16(state, host->ioaddr + SDIO_BASE + SDIO_LEDCTRL);
 144 }
 145
 146 static void toshsd_finish_request(struct toshsd_host *host)
 147 {
 148         struct mmc_request *mrq = host->mrq;
 149
 150         /* Write something to end the command */
 151         host->mrq = NULL;
 152         host->cmd = NULL;
 153         host->data = NULL;
 154
 155         toshsd_set_led(host, 0);
 156         mmc_request_done(host->mmc, mrq);
 157 }
 158
 159 static irqreturn_t toshsd_thread_irq(int irq, void *dev_id)
 160 {
 161         struct toshsd_host *host = dev_id;
 162         struct mmc_data *data = host->data;
 163         struct sg_mapping_iter *sg_miter = &host->sg_miter;
 164         unsigned short *buf;
 165         int count;
 166         unsigned long flags;
 167
 168         if (!data) {
 169                 dev_warn(&host->pdev->dev, "Spurious Data IRQ\n");
 170                 if (host->cmd) {
 171                         host->cmd->error = -EIO;
 172                         toshsd_finish_request(host);
 173                 }
 174                 return IRQ_NONE;
 175         }
 176         spin_lock_irqsave(&host->lock, flags);
 177
 178         if (!sg_miter_next(sg_miter))
 179                 goto done;
 180
 181         buf = sg_miter->addr;
 182
 183         /* Ensure we dont read more than one block. The chip will interrupt us
 184          * When the next block is available.
 185          */
 186         count = sg_miter->length;
 187         if (count > data->blksz)
 188                 count = data->blksz;
 189
 190         dev_dbg(&host->pdev->dev, "count: %08x, flags %08x\n", count,
 191                 data->flags);
 192
 193         /* Transfer the data */
 194         if (data->flags & MMC_DATA_READ)
 195                 ioread32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
 196         else
 197                 iowrite32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
 198
 199         sg_miter->consumed = count;
 200         sg_miter_stop(sg_miter);
 201
 202 done:
 203         spin_unlock_irqrestore(&host->lock, flags);
 204
 205         return IRQ_HANDLED;
 206 }
 207
 208 static void toshsd_cmd_irq(struct toshsd_host *host)
 209 {
 210         struct mmc_command *cmd = host->cmd;
 211         u8 *buf;
 212         u16 data;
 213
 214         if (!host->cmd) {
 215                 dev_warn(&host->pdev->dev, "Spurious CMD irq\n");
 216                 return;
 217         }
 218         buf = (u8 *)cmd->resp;
 219         host->cmd = NULL;
 220
 221         if (cmd->flags & MMC_RSP_PRESENT && cmd->flags & MMC_RSP_136) {
 222                 /* R2 */
 223                 buf[12] = 0xff;
 224                 data = ioread16(host->ioaddr + SD_RESPONSE0);
 225                 buf[13] = data & 0xff;
 226                 buf[14] = data >> 8;
 227                 data = ioread16(host->ioaddr + SD_RESPONSE1);
 228                 buf[15] = data & 0xff;
 229                 buf[8] = data >> 8;
 230                 data = ioread16(host->ioaddr + SD_RESPONSE2);
 231                 buf[9] = data & 0xff;
 232                 buf[10] = data >> 8;
 233                 data = ioread16(host->ioaddr + SD_RESPONSE3);
 234                 buf[11] = data & 0xff;
 235                 buf[4] = data >> 8;
 236                 data = ioread16(host->ioaddr + SD_RESPONSE4);
 237                 buf[5] = data & 0xff;
 238                 buf[6] = data >> 8;
 239                 data = ioread16(host->ioaddr + SD_RESPONSE5);
 240                 buf[7] = data & 0xff;
 241                 buf[0] = data >> 8;
 242                 data = ioread16(host->ioaddr + SD_RESPONSE6);
 243                 buf[1] = data & 0xff;
 244                 buf[2] = data >> 8;
 245                 data = ioread16(host->ioaddr + SD_RESPONSE7);
 246                 buf[3] = data & 0xff;
 247         } else if (cmd->flags & MMC_RSP_PRESENT) {
 248                 /* R1, R1B, R3, R6, R7 */
 249                 data = ioread16(host->ioaddr + SD_RESPONSE0);
 250                 buf[0] = data & 0xff;
 251                 buf[1] = data >> 8;
 252                 data = ioread16(host->ioaddr + SD_RESPONSE1);
 253                 buf[2] = data & 0xff;
 254                 buf[3] = data >> 8;
 255         }
 256
 257         dev_dbg(&host->pdev->dev, "Command IRQ complete %d %d %x\n",
 258                 cmd->opcode, cmd->error, cmd->flags);
 259
 260         /* If there is data to handle we will
 261          * finish the request in the mmc_data_end_irq handler.*/
 262         if (host->data)
 263                 return;
 264
 265         toshsd_finish_request(host);
 266 }
 267
 268 static void toshsd_data_end_irq(struct toshsd_host *host)
 269 {
 270         struct mmc_data *data = host->data;
 271
 272         host->data = NULL;
 273
 274         if (!data) {
 275                 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
 276                 return;
 277         }
 278
 279         if (data->error == 0)
 280                 data->bytes_xfered = data->blocks * data->blksz;
 281         else
 282                 data->bytes_xfered = 0;
 283
 284         dev_dbg(&host->pdev->dev, "Completed data request xfr=%d\n",
 285                 data->bytes_xfered);
 286
 287         iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
 288
 289         toshsd_finish_request(host);
 290 }
 291
 292 static irqreturn_t toshsd_irq(int irq, void *dev_id)
 293 {
 294         struct toshsd_host *host = dev_id;
 295         u32 int_reg, int_mask, int_status, detail;
 296         int error = 0, ret = IRQ_HANDLED;
 297
 298         spin_lock(&host->lock);
 299         int_status = ioread32(host->ioaddr + SD_CARDSTATUS);
 300         int_mask = ioread32(host->ioaddr + SD_INTMASKCARD);
 301         int_reg = int_status & ~int_mask & ~IRQ_DONT_CARE_BITS;
 302
 303         dev_dbg(&host->pdev->dev, "IRQ status:%x mask:%x\n",
 304                 int_status, int_mask);
 305
 306         /* nothing to do: it's not our IRQ */
 307         if (!int_reg) {
 308                 ret = IRQ_NONE;
 309                 goto irq_end;
 310         }
 311
 312         if (int_reg & SD_BUF_CMD_TIMEOUT) {
 313                 error = -ETIMEDOUT;
 314                 dev_dbg(&host->pdev->dev, "Timeout\n");
 315         } else if (int_reg & SD_BUF_CRC_ERR) {
 316                 error = -EILSEQ;
 317                 dev_err(&host->pdev->dev, "BadCRC\n");
 318         } else if (int_reg & (SD_BUF_ILLEGAL_ACCESS
 319                                 | SD_BUF_CMD_INDEX_ERR
 320                                 | SD_BUF_STOP_BIT_END_ERR
 321                                 | SD_BUF_OVERFLOW
 322                                 | SD_BUF_UNDERFLOW
 323                                 | SD_BUF_DATA_TIMEOUT)) {
 324                 dev_err(&host->pdev->dev, "Buffer status error: { %s%s%s%s%s%s}\n",
 325                         int_reg & SD_BUF_ILLEGAL_ACCESS ? "ILLEGAL_ACC " : "",
 326                         int_reg & SD_BUF_CMD_INDEX_ERR ? "CMD_INDEX " : "",
 327                         int_reg & SD_BUF_STOP_BIT_END_ERR ? "STOPBIT_END " : "",
 328                         int_reg & SD_BUF_OVERFLOW ? "OVERFLOW " : "",
 329                         int_reg & SD_BUF_UNDERFLOW ? "UNDERFLOW " : "",
 330                         int_reg & SD_BUF_DATA_TIMEOUT ? "DATA_TIMEOUT " : "");
 331
 332                 detail = ioread32(host->ioaddr + SD_ERRORSTATUS0);
 333                 dev_err(&host->pdev->dev, "detail error status { %s%s%s%s%s%s%s%s%s%s%s%s%s}\n",
 334                         detail & SD_ERR0_RESP_CMD_ERR ? "RESP_CMD " : "",
 335                         detail & SD_ERR0_RESP_NON_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
 336                         detail & SD_ERR0_RESP_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
 337                         detail & SD_ERR0_READ_DATA_END_BIT_ERR ? "READ_DATA_END_BIT " : "",
 338                         detail & SD_ERR0_WRITE_CRC_STATUS_END_BIT_ERR ? "WRITE_CMD_END_BIT " : "",
 339                         detail & SD_ERR0_RESP_NON_CMD12_CRC_ERR ? "RESP_CRC " : "",
 340                         detail & SD_ERR0_RESP_CMD12_CRC_ERR ? "RESP_CRC " : "",
 341                         detail & SD_ERR0_READ_DATA_CRC_ERR ? "READ_DATA_CRC " : "",
 342                         detail & SD_ERR0_WRITE_CMD_CRC_ERR ? "WRITE_CMD_CRC " : "",
 343                         detail & SD_ERR1_NO_CMD_RESP ? "NO_CMD_RESP " : "",
 344                         detail & SD_ERR1_TIMEOUT_READ_DATA ? "READ_DATA_TIMEOUT " : "",
 345                         detail & SD_ERR1_TIMEOUT_CRS_STATUS ? "CRS_STATUS_TIMEOUT " : "",
 346                         detail & SD_ERR1_TIMEOUT_CRC_BUSY ? "CRC_BUSY_TIMEOUT " : "");
 347                 error = -EIO;
 348         }
 349
 350         if (error) {
 351                 if (host->cmd)
 352                         host->cmd->error = error;
 353
 354                 if (error == -ETIMEDOUT) {
 355                         iowrite32(int_status &
 356                                   ~(SD_BUF_CMD_TIMEOUT | SD_CARD_RESP_END),
 357                                   host->ioaddr + SD_CARDSTATUS);
 358                 } else {
 359                         toshsd_init(host);
 360                         __toshsd_set_ios(host->mmc, &host->mmc->ios);
 361                         goto irq_end;
 362                 }
 363         }
 364
 365         /* Card insert/remove. The mmc controlling code is stateless. */
 366         if (int_reg & (SD_CARD_CARD_INSERTED_0 | SD_CARD_CARD_REMOVED_0)) {
 367                 iowrite32(int_status &
 368                           ~(SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0),
 369                           host->ioaddr + SD_CARDSTATUS);
 370
 371                 if (int_reg & SD_CARD_CARD_INSERTED_0)
 372                         toshsd_init(host);
 373
 374                 mmc_detect_change(host->mmc, 1);
 375         }
 376
 377         /* Data transfer */
 378         if (int_reg & (SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE)) {
 379                 iowrite32(int_status &
 380                           ~(SD_BUF_WRITE_ENABLE | SD_BUF_READ_ENABLE),
 381                           host->ioaddr + SD_CARDSTATUS);
 382
 383                 ret = IRQ_WAKE_THREAD;
 384                 goto irq_end;
 385         }
 386
 387         /* Command completion */
 388         if (int_reg & SD_CARD_RESP_END) {
 389                 iowrite32(int_status & ~(SD_CARD_RESP_END),
 390                           host->ioaddr + SD_CARDSTATUS);
 391                 toshsd_cmd_irq(host);
 392         }
 393
 394         /* Data transfer completion */
 395         if (int_reg & SD_CARD_RW_END) {
 396                 iowrite32(int_status & ~(SD_CARD_RW_END),
 397                           host->ioaddr + SD_CARDSTATUS);
 398                 toshsd_data_end_irq(host);
 399         }
 400 irq_end:
 401         spin_unlock(&host->lock);
 402         return ret;
 403 }
 404
 405 static void toshsd_start_cmd(struct toshsd_host *host, struct mmc_command *cmd)
 406 {
 407         struct mmc_data *data = host->data;
 408         int c = cmd->opcode;
 409
 410         dev_dbg(&host->pdev->dev, "Command opcode: %d\n", cmd->opcode);
 411
 412         if (cmd->opcode == MMC_STOP_TRANSMISSION) {
 413                 iowrite16(SD_STOPINT_ISSUE_CMD12,
 414                           host->ioaddr + SD_STOPINTERNAL);
 415
 416                 cmd->resp[0] = cmd->opcode;
 417                 cmd->resp[1] = 0;
 418                 cmd->resp[2] = 0;
 419                 cmd->resp[3] = 0;
 420
 421                 toshsd_finish_request(host);
 422                 return;
 423         }
 424
 425         switch (mmc_resp_type(cmd)) {
 426         case MMC_RSP_NONE:
 427                 c |= SD_CMD_RESP_TYPE_NONE;
 428                 break;
 429
 430         case MMC_RSP_R1:
 431                 c |= SD_CMD_RESP_TYPE_EXT_R1;
 432                 break;
 433         case MMC_RSP_R1B:
 434                 c |= SD_CMD_RESP_TYPE_EXT_R1B;
 435                 break;
 436         case MMC_RSP_R2:
 437                 c |= SD_CMD_RESP_TYPE_EXT_R2;
 438                 break;
 439         case MMC_RSP_R3:
 440                 c |= SD_CMD_RESP_TYPE_EXT_R3;
 441                 break;
 442
 443         default:
 444                 dev_err(&host->pdev->dev, "Unknown response type %d\n",
 445                         mmc_resp_type(cmd));
 446                 break;
 447         }
 448
 449         host->cmd = cmd;
 450
 451         if (cmd->opcode == MMC_APP_CMD)
 452                 c |= SD_CMD_TYPE_ACMD;
 453
 454         if (cmd->opcode == MMC_GO_IDLE_STATE)
 455                 c |= (3 << 8);  /* removed from ipaq-asic3.h for some reason */
 456
 457         if (data) {
 458                 c |= SD_CMD_DATA_PRESENT;
 459
 460                 if (data->blocks > 1) {
 461                         iowrite16(SD_STOPINT_AUTO_ISSUE_CMD12,
 462                                   host->ioaddr + SD_STOPINTERNAL);
 463                         c |= SD_CMD_MULTI_BLOCK;
 464                 }
 465
 466                 if (data->flags & MMC_DATA_READ)
 467                         c |= SD_CMD_TRANSFER_READ;
 468
 469                 /* MMC_DATA_WRITE does not require a bit to be set */
 470         }
 471
 472         /* Send the command */
 473         iowrite32(cmd->arg, host->ioaddr + SD_ARG0);
 474         iowrite16(c, host->ioaddr + SD_CMD);
 475 }
 476
 477 static void toshsd_start_data(struct toshsd_host *host, struct mmc_data *data)
 478 {
 479         unsigned int flags = SG_MITER_ATOMIC;
 480
 481         dev_dbg(&host->pdev->dev, "setup data transfer: blocksize %08x  nr_blocks %d, offset: %08x\n",
 482                 data->blksz, data->blocks, data->sg->offset);
 483
 484         host->data = data;
 485
 486         if (data->flags & MMC_DATA_READ)
 487                 flags |= SG_MITER_TO_SG;
 488         else
 489                 flags |= SG_MITER_FROM_SG;
 490
 491         sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 492
 493         /* Set transfer length and blocksize */
 494         iowrite16(data->blocks, host->ioaddr + SD_BLOCKCOUNT);
 495         iowrite16(data->blksz, host->ioaddr + SD_CARDXFERDATALEN);
 496 }
 497
 498 /* Process requests from the MMC layer */
 499 static void toshsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
 500 {
 501         struct toshsd_host *host = mmc_priv(mmc);
 502         unsigned long flags;
 503
 504         /* abort if card not present */
 505         if (!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0)) {
 506                 mrq->cmd->error = -ENOMEDIUM;
 507                 mmc_request_done(mmc, mrq);
 508                 return;
 509         }
 510
 511         spin_lock_irqsave(&host->lock, flags);
 512
 513         WARN_ON(host->mrq != NULL);
 514
 515         host->mrq = mrq;
 516
 517         if (mrq->data)
 518                 toshsd_start_data(host, mrq->data);
 519
 520         toshsd_set_led(host, 1);
 521
 522         toshsd_start_cmd(host, mrq->cmd);
 523
 524         spin_unlock_irqrestore(&host->lock, flags);
 525 }
 526
 527 static void toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 528 {
 529         struct toshsd_host *host = mmc_priv(mmc);
 530         unsigned long flags;
 531
 532         spin_lock_irqsave(&host->lock, flags);
 533         __toshsd_set_ios(mmc, ios);
 534         spin_unlock_irqrestore(&host->lock, flags);
 535 }
 536
 537 static int toshsd_get_ro(struct mmc_host *mmc)
 538 {
 539         struct toshsd_host *host = mmc_priv(mmc);
 540
 541         /* active low */
 542         return !(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_WRITE_PROTECT);
 543 }
 544
 545 static int toshsd_get_cd(struct mmc_host *mmc)
 546 {
 547         struct toshsd_host *host = mmc_priv(mmc);
 548
 549         return !!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0);
 550 }
 551
 552 static struct mmc_host_ops toshsd_ops = {
 553         .request = toshsd_request,
 554         .set_ios = toshsd_set_ios,
 555         .get_ro = toshsd_get_ro,
 556         .get_cd = toshsd_get_cd,
 557 };
 558
 559
 560 static void toshsd_powerdown(struct toshsd_host *host)
 561 {
 562         /* mask all interrupts */
 563         iowrite32(0xffffffff, host->ioaddr + SD_INTMASKCARD);
 564         /* disable card clock */
 565         iowrite16(0x000, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
 566         iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
 567         /* power down card */
 568         pci_write_config_byte(host->pdev, SD_PCICFG_POWER1, SD_PCICFG_PWR1_OFF);
 569         /* disable clock */
 570         pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, 0);
 571 }
 572
 573 #ifdef CONFIG_PM_SLEEP
 574 static int toshsd_pm_suspend(struct device *dev)
 575 {
 576         struct pci_dev *pdev = to_pci_dev(dev);
 577         struct toshsd_host *host = pci_get_drvdata(pdev);
 578
 579         toshsd_powerdown(host);
 580
 581         pci_save_state(pdev);
 582         pci_enable_wake(pdev, PCI_D3hot, 0);
 583         pci_disable_device(pdev);
 584         pci_set_power_state(pdev, PCI_D3hot);
 585
 586         return 0;
 587 }
 588
 589 static int toshsd_pm_resume(struct device *dev)
 590 {
 591         struct pci_dev *pdev = to_pci_dev(dev);
 592         struct toshsd_host *host = pci_get_drvdata(pdev);
 593         int ret;
 594
 595         pci_set_power_state(pdev, PCI_D0);
 596         pci_restore_state(pdev);
 597         ret = pci_enable_device(pdev);
 598         if (ret)
 599                 return ret;
 600
 601         toshsd_init(host);
 602
 603         return 0;
 604 }
 605 #endif /* CONFIG_PM_SLEEP */
 606
 607 static int toshsd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 608 {
 609         int ret;
 610         struct toshsd_host *host;
 611         struct mmc_host *mmc;
 612         resource_size_t base;
 613
 614         ret = pci_enable_device(pdev);
 615         if (ret)
 616                 return ret;
 617
 618         mmc = mmc_alloc_host(sizeof(struct toshsd_host), &pdev->dev);
 619         if (!mmc) {
 620                 ret = -ENOMEM;
 621                 goto err;
 622         }
 623
 624         host = mmc_priv(mmc);
 625         host->mmc = mmc;
 626
 627         host->pdev = pdev;
 628         pci_set_drvdata(pdev, host);
 629
 630         ret = pci_request_regions(pdev, DRIVER_NAME);
 631         if (ret)
 632                 goto free;
 633
 634         host->ioaddr = pci_iomap(pdev, 0, 0);
 635         if (!host->ioaddr) {
 636                 ret = -ENOMEM;
 637                 goto release;
 638         }
 639
 640         /* Set MMC host parameters */
 641         mmc->ops = &toshsd_ops;
 642         mmc->caps = MMC_CAP_4_BIT_DATA;
 643         mmc->ocr_avail = MMC_VDD_32_33;
 644
 645         mmc->f_min = HCLK / 512;
 646         mmc->f_max = HCLK;
 647
 648         spin_lock_init(&host->lock);
 649
 650         toshsd_init(host);
 651
 652         ret = request_threaded_irq(pdev->irq, toshsd_irq, toshsd_thread_irq,
 653                                    IRQF_SHARED, DRIVER_NAME, host);
 654         if (ret)
 655                 goto unmap;
 656
 657         mmc_add_host(mmc);
 658
 659         base = pci_resource_start(pdev, 0);
 660         dev_dbg(&pdev->dev, "MMIO %pa, IRQ %d\n", &base, pdev->irq);
 661
 662         pm_suspend_ignore_children(&pdev->dev, 1);
 663
 664         return 0;
 665
 666 unmap:
 667         pci_iounmap(pdev, host->ioaddr);
 668 release:
 669         pci_release_regions(pdev);
 670 free:
 671         mmc_free_host(mmc);
 672         pci_set_drvdata(pdev, NULL);
 673 err:
 674         pci_disable_device(pdev);
 675         return ret;
 676 }
 677
 678 static void toshsd_remove(struct pci_dev *pdev)
 679 {
 680         struct toshsd_host *host = pci_get_drvdata(pdev);
 681
 682         mmc_remove_host(host->mmc);
 683         toshsd_powerdown(host);
 684         free_irq(pdev->irq, host);
 685         pci_iounmap(pdev, host->ioaddr);
 686         pci_release_regions(pdev);
 687         mmc_free_host(host->mmc);
 688         pci_set_drvdata(pdev, NULL);
 689         pci_disable_device(pdev);
 690 }
 691
 692 static const struct dev_pm_ops toshsd_pm_ops = {
 693         SET_SYSTEM_SLEEP_PM_OPS(toshsd_pm_suspend, toshsd_pm_resume)
 694 };
 695
 696 static struct pci_driver toshsd_driver = {
 697         .name = DRIVER_NAME,
 698         .id_table = pci_ids,
 699         .probe = toshsd_probe,
 700         .remove = toshsd_remove,
 701         .driver.pm = &toshsd_pm_ops,
 702 };
 703
 704 module_pci_driver(toshsd_driver);
 705
 706 MODULE_AUTHOR("Ondrej Zary, Richard Betts");
 707 MODULE_DESCRIPTION("Toshiba PCI Secure Digital Host Controller Interface driver");
 708 MODULE_LICENSE("GPL");