2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/flash.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
28 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
29 * each chip, which may be used for double buffered I/O; but this driver
30 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
32 * Sometimes DataFlash is packaged in MMC-format cards, although the
33 * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
34 * protocols during enumeration.
37 #define CONFIG_DATAFLASH_WRITE_VERIFY
39 /* reads can bypass the buffers */
40 #define OP_READ_CONTINUOUS 0xE8
41 #define OP_READ_PAGE 0xD2
43 /* group B requests can run even while status reports "busy" */
44 #define OP_READ_STATUS 0xD7 /* group B */
46 /* move data between host and buffer */
47 #define OP_READ_BUFFER1 0xD4 /* group B */
48 #define OP_READ_BUFFER2 0xD6 /* group B */
49 #define OP_WRITE_BUFFER1 0x84 /* group B */
50 #define OP_WRITE_BUFFER2 0x87 /* group B */
53 #define OP_ERASE_PAGE 0x81
54 #define OP_ERASE_BLOCK 0x50
56 /* move data between buffer and flash */
57 #define OP_TRANSFER_BUF1 0x53
58 #define OP_TRANSFER_BUF2 0x55
59 #define OP_MREAD_BUFFER1 0xD4
60 #define OP_MREAD_BUFFER2 0xD6
61 #define OP_MWERASE_BUFFER1 0x83
62 #define OP_MWERASE_BUFFER2 0x86
63 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
66 /* write to buffer, then write-erase to flash */
67 #define OP_PROGRAM_VIA_BUF1 0x82
68 #define OP_PROGRAM_VIA_BUF2 0x85
70 /* compare buffer to flash */
71 #define OP_COMPARE_BUF1 0x60
72 #define OP_COMPARE_BUF2 0x61
74 /* read flash to buffer, then write-erase to flash */
75 #define OP_REWRITE_VIA_BUF1 0x58
76 #define OP_REWRITE_VIA_BUF2 0x59
78 /* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
81 #define OP_READ_ID 0x9F
82 #define OP_READ_SECURITY 0x77
83 #define OP_WRITE_SECURITY_REVC 0x9A
84 #define OP_WRITE_SECURITY 0x9B /* revision D */
91 unsigned partitioned
:1;
93 unsigned short page_offset
; /* offset in flash address */
94 unsigned int page_size
; /* of bytes per page */
97 struct spi_device
*spi
;
102 #ifdef CONFIG_MTD_PARTITIONS
103 #define mtd_has_partitions() (1)
105 #define mtd_has_partitions() (0)
108 /* ......................................................................... */
111 * Return the status of the DataFlash device.
113 static inline int dataflash_status(struct spi_device
*spi
)
115 /* NOTE: at45db321c over 25 MHz wants to write
116 * a dummy byte after the opcode...
118 return spi_w8r8(spi
, OP_READ_STATUS
);
122 * Poll the DataFlash device until it is READY.
123 * This usually takes 5-20 msec or so; more for sector erase.
125 static int dataflash_waitready(struct spi_device
*spi
)
130 status
= dataflash_status(spi
);
132 DEBUG(MTD_DEBUG_LEVEL1
, "%s: status %d?\n",
133 spi
->dev
.bus_id
, status
);
137 if (status
& (1 << 7)) /* RDY/nBSY */
144 /* ......................................................................... */
147 * Erase pages of flash.
149 static int dataflash_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
151 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
152 struct spi_device
*spi
= priv
->spi
;
153 struct spi_transfer x
= { .tx_dma
= 0, };
154 struct spi_message msg
;
155 unsigned blocksize
= priv
->page_size
<< 3;
158 DEBUG(MTD_DEBUG_LEVEL2
, "%s: erase addr=0x%x len 0x%x\n",
160 instr
->addr
, instr
->len
);
163 if ((instr
->addr
+ instr
->len
) > mtd
->size
164 || (instr
->len
% priv
->page_size
) != 0
165 || (instr
->addr
% priv
->page_size
) != 0)
168 spi_message_init(&msg
);
170 x
.tx_buf
= command
= priv
->command
;
172 spi_message_add_tail(&x
, &msg
);
174 mutex_lock(&priv
->lock
);
175 while (instr
->len
> 0) {
176 unsigned int pageaddr
;
180 /* Calculate flash page address; use block erase (for speed) if
181 * we're at a block boundary and need to erase the whole block.
183 pageaddr
= instr
->addr
/ priv
->page_size
;
184 do_block
= (pageaddr
& 0x7) == 0 && instr
->len
>= blocksize
;
185 pageaddr
= pageaddr
<< priv
->page_offset
;
187 command
[0] = do_block
? OP_ERASE_BLOCK
: OP_ERASE_PAGE
;
188 command
[1] = (uint8_t)(pageaddr
>> 16);
189 command
[2] = (uint8_t)(pageaddr
>> 8);
192 DEBUG(MTD_DEBUG_LEVEL3
, "ERASE %s: (%x) %x %x %x [%i]\n",
193 do_block
? "block" : "page",
194 command
[0], command
[1], command
[2], command
[3],
197 status
= spi_sync(spi
, &msg
);
198 (void) dataflash_waitready(spi
);
201 printk(KERN_ERR
"%s: erase %x, err %d\n",
202 spi
->dev
.bus_id
, pageaddr
, status
);
203 /* REVISIT: can retry instr->retries times; or
204 * giveup and instr->fail_addr = instr->addr;
210 instr
->addr
+= blocksize
;
211 instr
->len
-= blocksize
;
213 instr
->addr
+= priv
->page_size
;
214 instr
->len
-= priv
->page_size
;
217 mutex_unlock(&priv
->lock
);
219 /* Inform MTD subsystem that erase is complete */
220 instr
->state
= MTD_ERASE_DONE
;
221 mtd_erase_callback(instr
);
227 * Read from the DataFlash device.
228 * from : Start offset in flash device
229 * len : Amount to read
230 * retlen : About of data actually read
231 * buf : Buffer containing the data
233 static int dataflash_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
234 size_t *retlen
, u_char
*buf
)
236 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
237 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
238 struct spi_message msg
;
243 DEBUG(MTD_DEBUG_LEVEL2
, "%s: read 0x%x..0x%x\n",
244 priv
->spi
->dev
.bus_id
, (unsigned)from
, (unsigned)(from
+ len
));
251 if (from
+ len
> mtd
->size
)
254 /* Calculate flash page/byte address */
255 addr
= (((unsigned)from
/ priv
->page_size
) << priv
->page_offset
)
256 + ((unsigned)from
% priv
->page_size
);
258 command
= priv
->command
;
260 DEBUG(MTD_DEBUG_LEVEL3
, "READ: (%x) %x %x %x\n",
261 command
[0], command
[1], command
[2], command
[3]);
263 spi_message_init(&msg
);
265 x
[0].tx_buf
= command
;
267 spi_message_add_tail(&x
[0], &msg
);
271 spi_message_add_tail(&x
[1], &msg
);
273 mutex_lock(&priv
->lock
);
275 /* Continuous read, max clock = f(car) which may be less than
276 * the peak rate available. Some chips support commands with
277 * fewer "don't care" bytes. Both buffers stay unchanged.
279 command
[0] = OP_READ_CONTINUOUS
;
280 command
[1] = (uint8_t)(addr
>> 16);
281 command
[2] = (uint8_t)(addr
>> 8);
282 command
[3] = (uint8_t)(addr
>> 0);
283 /* plus 4 "don't care" bytes */
285 status
= spi_sync(priv
->spi
, &msg
);
286 mutex_unlock(&priv
->lock
);
289 *retlen
= msg
.actual_length
- 8;
292 DEBUG(MTD_DEBUG_LEVEL1
, "%s: read %x..%x --> %d\n",
293 priv
->spi
->dev
.bus_id
,
294 (unsigned)from
, (unsigned)(from
+ len
),
300 * Write to the DataFlash device.
301 * to : Start offset in flash device
302 * len : Amount to write
303 * retlen : Amount of data actually written
304 * buf : Buffer containing the data
306 static int dataflash_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
307 size_t * retlen
, const u_char
* buf
)
309 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
310 struct spi_device
*spi
= priv
->spi
;
311 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
312 struct spi_message msg
;
313 unsigned int pageaddr
, addr
, offset
, writelen
;
314 size_t remaining
= len
;
315 u_char
*writebuf
= (u_char
*) buf
;
316 int status
= -EINVAL
;
319 DEBUG(MTD_DEBUG_LEVEL2
, "%s: write 0x%x..0x%x\n",
320 spi
->dev
.bus_id
, (unsigned)to
, (unsigned)(to
+ len
));
327 if ((to
+ len
) > mtd
->size
)
330 spi_message_init(&msg
);
332 x
[0].tx_buf
= command
= priv
->command
;
334 spi_message_add_tail(&x
[0], &msg
);
336 pageaddr
= ((unsigned)to
/ priv
->page_size
);
337 offset
= ((unsigned)to
% priv
->page_size
);
338 if (offset
+ len
> priv
->page_size
)
339 writelen
= priv
->page_size
- offset
;
343 mutex_lock(&priv
->lock
);
344 while (remaining
> 0) {
345 DEBUG(MTD_DEBUG_LEVEL3
, "write @ %i:%i len=%i\n",
346 pageaddr
, offset
, writelen
);
349 * (a) each page in a sector must be rewritten at least
350 * once every 10K sibling erase/program operations.
351 * (b) for pages that are already erased, we could
352 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
353 * (c) WRITE to buffer could be done while waiting for
354 * a previous MWRITE/MWERASE to complete ...
355 * (d) error handling here seems to be mostly missing.
357 * Two persistent bits per page, plus a per-sector counter,
358 * could support (a) and (b) ... we might consider using
359 * the second half of sector zero, which is just one block,
360 * to track that state. (On AT91, that sector should also
361 * support boot-from-DataFlash.)
364 addr
= pageaddr
<< priv
->page_offset
;
366 /* (1) Maybe transfer partial page to Buffer1 */
367 if (writelen
!= priv
->page_size
) {
368 command
[0] = OP_TRANSFER_BUF1
;
369 command
[1] = (addr
& 0x00FF0000) >> 16;
370 command
[2] = (addr
& 0x0000FF00) >> 8;
373 DEBUG(MTD_DEBUG_LEVEL3
, "TRANSFER: (%x) %x %x %x\n",
374 command
[0], command
[1], command
[2], command
[3]);
376 status
= spi_sync(spi
, &msg
);
378 DEBUG(MTD_DEBUG_LEVEL1
, "%s: xfer %u -> %d \n",
379 spi
->dev
.bus_id
, addr
, status
);
381 (void) dataflash_waitready(priv
->spi
);
384 /* (2) Program full page via Buffer1 */
386 command
[0] = OP_PROGRAM_VIA_BUF1
;
387 command
[1] = (addr
& 0x00FF0000) >> 16;
388 command
[2] = (addr
& 0x0000FF00) >> 8;
389 command
[3] = (addr
& 0x000000FF);
391 DEBUG(MTD_DEBUG_LEVEL3
, "PROGRAM: (%x) %x %x %x\n",
392 command
[0], command
[1], command
[2], command
[3]);
394 x
[1].tx_buf
= writebuf
;
396 spi_message_add_tail(x
+ 1, &msg
);
397 status
= spi_sync(spi
, &msg
);
398 spi_transfer_del(x
+ 1);
400 DEBUG(MTD_DEBUG_LEVEL1
, "%s: pgm %u/%u -> %d \n",
401 spi
->dev
.bus_id
, addr
, writelen
, status
);
403 (void) dataflash_waitready(priv
->spi
);
406 #ifdef CONFIG_DATAFLASH_WRITE_VERIFY
408 /* (3) Compare to Buffer1 */
409 addr
= pageaddr
<< priv
->page_offset
;
410 command
[0] = OP_COMPARE_BUF1
;
411 command
[1] = (addr
& 0x00FF0000) >> 16;
412 command
[2] = (addr
& 0x0000FF00) >> 8;
415 DEBUG(MTD_DEBUG_LEVEL3
, "COMPARE: (%x) %x %x %x\n",
416 command
[0], command
[1], command
[2], command
[3]);
418 status
= spi_sync(spi
, &msg
);
420 DEBUG(MTD_DEBUG_LEVEL1
, "%s: compare %u -> %d \n",
421 spi
->dev
.bus_id
, addr
, status
);
423 status
= dataflash_waitready(priv
->spi
);
425 /* Check result of the compare operation */
426 if (status
& (1 << 6)) {
427 printk(KERN_ERR
"%s: compare page %u, err %d\n",
428 spi
->dev
.bus_id
, pageaddr
, status
);
435 #endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
437 remaining
= remaining
- writelen
;
440 writebuf
+= writelen
;
443 if (remaining
> priv
->page_size
)
444 writelen
= priv
->page_size
;
446 writelen
= remaining
;
448 mutex_unlock(&priv
->lock
);
453 /* ......................................................................... */
455 #ifdef CONFIG_MTD_DATAFLASH_OTP
457 static int dataflash_get_otp_info(struct mtd_info
*mtd
,
458 struct otp_info
*info
, size_t len
)
460 /* Report both blocks as identical: bytes 0..64, locked.
461 * Unless the user block changed from all-ones, we can't
462 * tell whether it's still writable; so we assume it isn't.
467 return sizeof(*info
);
470 static ssize_t
otp_read(struct spi_device
*spi
, unsigned base
,
471 uint8_t *buf
, loff_t off
, size_t len
)
473 struct spi_message m
;
476 struct spi_transfer t
;
482 if ((off
+ len
) > 64)
487 spi_message_init(&m
);
489 l
= 4 + base
+ off
+ len
;
490 scratch
= kzalloc(l
, GFP_KERNEL
);
494 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
495 * IN: ignore 4 bytes, data bytes 0..N (max 127)
497 scratch
[0] = OP_READ_SECURITY
;
499 memset(&t
, 0, sizeof t
);
503 spi_message_add_tail(&t
, &m
);
505 dataflash_waitready(spi
);
507 status
= spi_sync(spi
, &m
);
509 memcpy(buf
, scratch
+ 4 + base
+ off
, len
);
517 static int dataflash_read_fact_otp(struct mtd_info
*mtd
,
518 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
520 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
523 /* 64 bytes, from 0..63 ... start at 64 on-chip */
524 mutex_lock(&priv
->lock
);
525 status
= otp_read(priv
->spi
, 64, buf
, from
, len
);
526 mutex_unlock(&priv
->lock
);
534 static int dataflash_read_user_otp(struct mtd_info
*mtd
,
535 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
537 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
540 /* 64 bytes, from 0..63 ... start at 0 on-chip */
541 mutex_lock(&priv
->lock
);
542 status
= otp_read(priv
->spi
, 0, buf
, from
, len
);
543 mutex_unlock(&priv
->lock
);
551 static int dataflash_write_user_otp(struct mtd_info
*mtd
,
552 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
554 struct spi_message m
;
555 const size_t l
= 4 + 64;
557 struct spi_transfer t
;
558 struct dataflash
*priv
= (struct dataflash
*)mtd
->priv
;
564 /* Strictly speaking, we *could* truncate the write ... but
565 * let's not do that for the only write that's ever possible.
567 if ((from
+ len
) > 64)
570 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
573 scratch
= kzalloc(l
, GFP_KERNEL
);
576 scratch
[0] = OP_WRITE_SECURITY
;
577 memcpy(scratch
+ 4 + from
, buf
, len
);
579 spi_message_init(&m
);
581 memset(&t
, 0, sizeof t
);
584 spi_message_add_tail(&t
, &m
);
586 /* Write the OTP bits, if they've not yet been written.
587 * This modifies SRAM buffer1.
589 mutex_lock(&priv
->lock
);
590 dataflash_waitready(priv
->spi
);
591 status
= spi_sync(priv
->spi
, &m
);
592 mutex_unlock(&priv
->lock
);
603 static char *otp_setup(struct mtd_info
*device
, char revision
)
605 device
->get_fact_prot_info
= dataflash_get_otp_info
;
606 device
->read_fact_prot_reg
= dataflash_read_fact_otp
;
607 device
->get_user_prot_info
= dataflash_get_otp_info
;
608 device
->read_user_prot_reg
= dataflash_read_user_otp
;
610 /* rev c parts (at45db321c and at45db1281 only!) use a
611 * different write procedure; not (yet?) implemented.
614 device
->write_user_prot_reg
= dataflash_write_user_otp
;
621 static char *otp_setup(struct mtd_info
*device
)
628 /* ......................................................................... */
631 * Register DataFlash device with MTD subsystem.
634 add_dataflash_otp(struct spi_device
*spi
, char *name
,
635 int nr_pages
, int pagesize
, int pageoffset
, char revision
)
637 struct dataflash
*priv
;
638 struct mtd_info
*device
;
639 struct flash_platform_data
*pdata
= spi
->dev
.platform_data
;
642 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
646 mutex_init(&priv
->lock
);
648 priv
->page_size
= pagesize
;
649 priv
->page_offset
= pageoffset
;
651 /* name must be usable with cmdlinepart */
652 sprintf(priv
->name
, "spi%d.%d-%s",
653 spi
->master
->bus_num
, spi
->chip_select
,
657 device
->name
= (pdata
&& pdata
->name
) ? pdata
->name
: priv
->name
;
658 device
->size
= nr_pages
* pagesize
;
659 device
->erasesize
= pagesize
;
660 device
->writesize
= pagesize
;
661 device
->owner
= THIS_MODULE
;
662 device
->type
= MTD_DATAFLASH
;
663 device
->flags
= MTD_WRITEABLE
;
664 device
->erase
= dataflash_erase
;
665 device
->read
= dataflash_read
;
666 device
->write
= dataflash_write
;
670 otp_tag
= otp_setup(device
, revision
);
672 dev_info(&spi
->dev
, "%s (%d KBytes) pagesize %d bytes%s\n",
673 name
, DIV_ROUND_UP(device
->size
, 1024),
675 dev_set_drvdata(&spi
->dev
, priv
);
677 if (mtd_has_partitions()) {
678 struct mtd_partition
*parts
;
681 #ifdef CONFIG_MTD_CMDLINE_PARTS
682 static const char *part_probes
[] = { "cmdlinepart", NULL
, };
684 nr_parts
= parse_mtd_partitions(device
, part_probes
, &parts
, 0);
687 if (nr_parts
<= 0 && pdata
&& pdata
->parts
) {
688 parts
= pdata
->parts
;
689 nr_parts
= pdata
->nr_parts
;
693 priv
->partitioned
= 1;
694 return add_mtd_partitions(device
, parts
, nr_parts
);
696 } else if (pdata
&& pdata
->nr_parts
)
697 dev_warn(&spi
->dev
, "ignoring %d default partitions on %s\n",
698 pdata
->nr_parts
, device
->name
);
700 return add_mtd_device(device
) == 1 ? -ENODEV
: 0;
703 static inline int __devinit
704 add_dataflash(struct spi_device
*spi
, char *name
,
705 int nr_pages
, int pagesize
, int pageoffset
)
707 return add_dataflash_otp(spi
, name
, nr_pages
, pagesize
,
714 /* JEDEC id has a high byte of zero plus three data bytes:
715 * the manufacturer id, then a two byte device id.
719 /* The size listed here is what works with OP_ERASE_PAGE. */
725 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
726 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
729 static struct flash_info __devinitdata dataflash_data
[] = {
732 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
733 * one with IS_POW2PS and the other without. The entry with the
734 * non-2^N byte page size can't name exact chip revisions without
735 * losing backwards compatibility for cmdlinepart.
737 * These newer chips also support 128-byte security registers (with
738 * 64 bytes one-time-programmable) and software write-protection.
740 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS
},
741 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS
| IS_POW2PS
},
743 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS
},
744 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS
| IS_POW2PS
},
746 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS
},
747 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS
| IS_POW2PS
},
749 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS
},
750 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS
| IS_POW2PS
},
752 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS
},
753 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS
| IS_POW2PS
},
755 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
757 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS
},
758 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS
| IS_POW2PS
},
760 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS
},
761 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS
| IS_POW2PS
},
764 static struct flash_info
*__devinit
jedec_probe(struct spi_device
*spi
)
767 uint8_t code
= OP_READ_ID
;
770 struct flash_info
*info
;
773 /* JEDEC also defines an optional "extended device information"
774 * string for after vendor-specific data, after the three bytes
775 * we use here. Supporting some chips might require using it.
777 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
778 * That's not an error; only rev C and newer chips handle it, and
779 * only Atmel sells these chips.
781 tmp
= spi_write_then_read(spi
, &code
, 1, id
, 3);
783 DEBUG(MTD_DEBUG_LEVEL0
, "%s: error %d reading JEDEC ID\n",
784 spi
->dev
.bus_id
, tmp
);
796 for (tmp
= 0, info
= dataflash_data
;
797 tmp
< ARRAY_SIZE(dataflash_data
);
799 if (info
->jedec_id
== jedec
) {
800 DEBUG(MTD_DEBUG_LEVEL1
, "%s: OTP, sector protect%s\n",
802 (info
->flags
& SUP_POW2PS
)
803 ? ", binary pagesize" : ""
805 if (info
->flags
& SUP_POW2PS
) {
806 status
= dataflash_status(spi
);
808 DEBUG(MTD_DEBUG_LEVEL1
,
809 "%s: status error %d\n",
810 dev_name(&spi
->dev
), status
);
811 return ERR_PTR(status
);
814 if (info
->flags
& IS_POW2PS
)
817 if (!(info
->flags
& IS_POW2PS
))
825 * Treat other chips as errors ... we won't know the right page
826 * size (it might be binary) even when we can tell which density
827 * class is involved (legacy chip id scheme).
829 dev_warn(&spi
->dev
, "JEDEC id %06x not handled\n", jedec
);
830 return ERR_PTR(-ENODEV
);
834 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
835 * or else the ID code embedded in the status bits:
837 * Device Density ID code #Pages PageSize Offset
838 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
839 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
840 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
841 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
842 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
843 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
844 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
845 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
847 static int __devinit
dataflash_probe(struct spi_device
*spi
)
850 struct flash_info
*info
;
853 * Try to detect dataflash by JEDEC ID.
854 * If it succeeds we know we have either a C or D part.
855 * D will support power of 2 pagesize option.
856 * Both support the security register, though with different
859 info
= jedec_probe(spi
);
861 return PTR_ERR(info
);
863 return add_dataflash_otp(spi
, info
->name
, info
->nr_pages
,
864 info
->pagesize
, info
->pageoffset
,
865 (info
->flags
& SUP_POW2PS
) ? 'd' : 'c');
868 * Older chips support only legacy commands, identifing
869 * capacity using bits in the status byte.
871 status
= dataflash_status(spi
);
872 if (status
<= 0 || status
== 0xff) {
873 DEBUG(MTD_DEBUG_LEVEL1
, "%s: status error %d\n",
874 spi
->dev
.bus_id
, status
);
875 if (status
== 0 || status
== 0xff)
880 /* if there's a device there, assume it's dataflash.
881 * board setup should have set spi->max_speed_max to
882 * match f(car) for continuous reads, mode 0 or 3.
884 switch (status
& 0x3c) {
885 case 0x0c: /* 0 0 1 1 x x */
886 status
= add_dataflash(spi
, "AT45DB011B", 512, 264, 9);
888 case 0x14: /* 0 1 0 1 x x */
889 status
= add_dataflash(spi
, "AT45DB021B", 1024, 264, 9);
891 case 0x1c: /* 0 1 1 1 x x */
892 status
= add_dataflash(spi
, "AT45DB041x", 2048, 264, 9);
894 case 0x24: /* 1 0 0 1 x x */
895 status
= add_dataflash(spi
, "AT45DB081B", 4096, 264, 9);
897 case 0x2c: /* 1 0 1 1 x x */
898 status
= add_dataflash(spi
, "AT45DB161x", 4096, 528, 10);
900 case 0x34: /* 1 1 0 1 x x */
901 status
= add_dataflash(spi
, "AT45DB321x", 8192, 528, 10);
903 case 0x38: /* 1 1 1 x x x */
905 status
= add_dataflash(spi
, "AT45DB642x", 8192, 1056, 11);
907 /* obsolete AT45DB1282 not (yet?) supported */
909 DEBUG(MTD_DEBUG_LEVEL1
, "%s: unsupported device (%x)\n",
910 spi
->dev
.bus_id
, status
& 0x3c);
915 DEBUG(MTD_DEBUG_LEVEL1
, "%s: add_dataflash --> %d\n",
916 spi
->dev
.bus_id
, status
);
921 static int __devexit
dataflash_remove(struct spi_device
*spi
)
923 struct dataflash
*flash
= dev_get_drvdata(&spi
->dev
);
926 DEBUG(MTD_DEBUG_LEVEL1
, "%s: remove\n", spi
->dev
.bus_id
);
928 if (mtd_has_partitions() && flash
->partitioned
)
929 status
= del_mtd_partitions(&flash
->mtd
);
931 status
= del_mtd_device(&flash
->mtd
);
937 static struct spi_driver dataflash_driver
= {
939 .name
= "mtd_dataflash",
940 .bus
= &spi_bus_type
,
941 .owner
= THIS_MODULE
,
944 .probe
= dataflash_probe
,
945 .remove
= __devexit_p(dataflash_remove
),
947 /* FIXME: investigate suspend and resume... */
950 static int __init
dataflash_init(void)
952 return spi_register_driver(&dataflash_driver
);
954 module_init(dataflash_init
);
956 static void __exit
dataflash_exit(void)
958 spi_unregister_driver(&dataflash_driver
);
960 module_exit(dataflash_exit
);
963 MODULE_LICENSE("GPL");
964 MODULE_AUTHOR("Andrew Victor, David Brownell");
965 MODULE_DESCRIPTION("MTD DataFlash driver");