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mtd: Drop FORTUNET support
[deliverable/linux.git] / drivers / mtd / devices / mtd_dataflash.c
1 /*
2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
3 *
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
28
29 /*
30 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31 * each chip, which may be used for double buffered I/O; but this driver
32 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
33 *
34 * Sometimes DataFlash is packaged in MMC-format cards, although the
35 * MMC stack can't (yet?) distinguish between MMC and DataFlash
36 * protocols during enumeration.
37 */
38
39 /* reads can bypass the buffers */
40 #define OP_READ_CONTINUOUS 0xE8
41 #define OP_READ_PAGE 0xD2
42
43 /* group B requests can run even while status reports "busy" */
44 #define OP_READ_STATUS 0xD7 /* group B */
45
46 /* move data between host and buffer */
47 #define OP_READ_BUFFER1 0xD4 /* group B */
48 #define OP_READ_BUFFER2 0xD6 /* group B */
49 #define OP_WRITE_BUFFER1 0x84 /* group B */
50 #define OP_WRITE_BUFFER2 0x87 /* group B */
51
52 /* erasing flash */
53 #define OP_ERASE_PAGE 0x81
54 #define OP_ERASE_BLOCK 0x50
55
56 /* move data between buffer and flash */
57 #define OP_TRANSFER_BUF1 0x53
58 #define OP_TRANSFER_BUF2 0x55
59 #define OP_MREAD_BUFFER1 0xD4
60 #define OP_MREAD_BUFFER2 0xD6
61 #define OP_MWERASE_BUFFER1 0x83
62 #define OP_MWERASE_BUFFER2 0x86
63 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
65
66 /* write to buffer, then write-erase to flash */
67 #define OP_PROGRAM_VIA_BUF1 0x82
68 #define OP_PROGRAM_VIA_BUF2 0x85
69
70 /* compare buffer to flash */
71 #define OP_COMPARE_BUF1 0x60
72 #define OP_COMPARE_BUF2 0x61
73
74 /* read flash to buffer, then write-erase to flash */
75 #define OP_REWRITE_VIA_BUF1 0x58
76 #define OP_REWRITE_VIA_BUF2 0x59
77
78 /* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
80 */
81 #define OP_READ_ID 0x9F
82 #define OP_READ_SECURITY 0x77
83 #define OP_WRITE_SECURITY_REVC 0x9A
84 #define OP_WRITE_SECURITY 0x9B /* revision D */
85
86
87 struct dataflash {
88 uint8_t command[4];
89 char name[24];
90
91 unsigned partitioned:1;
92
93 unsigned short page_offset; /* offset in flash address */
94 unsigned int page_size; /* of bytes per page */
95
96 struct mutex lock;
97 struct spi_device *spi;
98
99 struct mtd_info mtd;
100 };
101
102 #ifdef CONFIG_OF
103 static const struct of_device_id dataflash_dt_ids[] = {
104 { .compatible = "atmel,at45", },
105 { .compatible = "atmel,dataflash", },
106 { /* sentinel */ }
107 };
108 #else
109 #define dataflash_dt_ids NULL
110 #endif
111
112 /* ......................................................................... */
113
114 /*
115 * Return the status of the DataFlash device.
116 */
117 static inline int dataflash_status(struct spi_device *spi)
118 {
119 /* NOTE: at45db321c over 25 MHz wants to write
120 * a dummy byte after the opcode...
121 */
122 return spi_w8r8(spi, OP_READ_STATUS);
123 }
124
125 /*
126 * Poll the DataFlash device until it is READY.
127 * This usually takes 5-20 msec or so; more for sector erase.
128 */
129 static int dataflash_waitready(struct spi_device *spi)
130 {
131 int status;
132
133 for (;;) {
134 status = dataflash_status(spi);
135 if (status < 0) {
136 pr_debug("%s: status %d?\n",
137 dev_name(&spi->dev), status);
138 status = 0;
139 }
140
141 if (status & (1 << 7)) /* RDY/nBSY */
142 return status;
143
144 msleep(3);
145 }
146 }
147
148 /* ......................................................................... */
149
150 /*
151 * Erase pages of flash.
152 */
153 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
154 {
155 struct dataflash *priv = mtd->priv;
156 struct spi_device *spi = priv->spi;
157 struct spi_transfer x = { .tx_dma = 0, };
158 struct spi_message msg;
159 unsigned blocksize = priv->page_size << 3;
160 uint8_t *command;
161 uint32_t rem;
162
163 pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
164 dev_name(&spi->dev), (long long)instr->addr,
165 (long long)instr->len);
166
167 div_u64_rem(instr->len, priv->page_size, &rem);
168 if (rem)
169 return -EINVAL;
170 div_u64_rem(instr->addr, priv->page_size, &rem);
171 if (rem)
172 return -EINVAL;
173
174 spi_message_init(&msg);
175
176 x.tx_buf = command = priv->command;
177 x.len = 4;
178 spi_message_add_tail(&x, &msg);
179
180 mutex_lock(&priv->lock);
181 while (instr->len > 0) {
182 unsigned int pageaddr;
183 int status;
184 int do_block;
185
186 /* Calculate flash page address; use block erase (for speed) if
187 * we're at a block boundary and need to erase the whole block.
188 */
189 pageaddr = div_u64(instr->addr, priv->page_size);
190 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
191 pageaddr = pageaddr << priv->page_offset;
192
193 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
194 command[1] = (uint8_t)(pageaddr >> 16);
195 command[2] = (uint8_t)(pageaddr >> 8);
196 command[3] = 0;
197
198 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
199 do_block ? "block" : "page",
200 command[0], command[1], command[2], command[3],
201 pageaddr);
202
203 status = spi_sync(spi, &msg);
204 (void) dataflash_waitready(spi);
205
206 if (status < 0) {
207 printk(KERN_ERR "%s: erase %x, err %d\n",
208 dev_name(&spi->dev), pageaddr, status);
209 /* REVISIT: can retry instr->retries times; or
210 * giveup and instr->fail_addr = instr->addr;
211 */
212 continue;
213 }
214
215 if (do_block) {
216 instr->addr += blocksize;
217 instr->len -= blocksize;
218 } else {
219 instr->addr += priv->page_size;
220 instr->len -= priv->page_size;
221 }
222 }
223 mutex_unlock(&priv->lock);
224
225 /* Inform MTD subsystem that erase is complete */
226 instr->state = MTD_ERASE_DONE;
227 mtd_erase_callback(instr);
228
229 return 0;
230 }
231
232 /*
233 * Read from the DataFlash device.
234 * from : Start offset in flash device
235 * len : Amount to read
236 * retlen : About of data actually read
237 * buf : Buffer containing the data
238 */
239 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
240 size_t *retlen, u_char *buf)
241 {
242 struct dataflash *priv = mtd->priv;
243 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
244 struct spi_message msg;
245 unsigned int addr;
246 uint8_t *command;
247 int status;
248
249 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
250 (unsigned)from, (unsigned)(from + len));
251
252 /* Calculate flash page/byte address */
253 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
254 + ((unsigned)from % priv->page_size);
255
256 command = priv->command;
257
258 pr_debug("READ: (%x) %x %x %x\n",
259 command[0], command[1], command[2], command[3]);
260
261 spi_message_init(&msg);
262
263 x[0].tx_buf = command;
264 x[0].len = 8;
265 spi_message_add_tail(&x[0], &msg);
266
267 x[1].rx_buf = buf;
268 x[1].len = len;
269 spi_message_add_tail(&x[1], &msg);
270
271 mutex_lock(&priv->lock);
272
273 /* Continuous read, max clock = f(car) which may be less than
274 * the peak rate available. Some chips support commands with
275 * fewer "don't care" bytes. Both buffers stay unchanged.
276 */
277 command[0] = OP_READ_CONTINUOUS;
278 command[1] = (uint8_t)(addr >> 16);
279 command[2] = (uint8_t)(addr >> 8);
280 command[3] = (uint8_t)(addr >> 0);
281 /* plus 4 "don't care" bytes */
282
283 status = spi_sync(priv->spi, &msg);
284 mutex_unlock(&priv->lock);
285
286 if (status >= 0) {
287 *retlen = msg.actual_length - 8;
288 status = 0;
289 } else
290 pr_debug("%s: read %x..%x --> %d\n",
291 dev_name(&priv->spi->dev),
292 (unsigned)from, (unsigned)(from + len),
293 status);
294 return status;
295 }
296
297 /*
298 * Write to the DataFlash device.
299 * to : Start offset in flash device
300 * len : Amount to write
301 * retlen : Amount of data actually written
302 * buf : Buffer containing the data
303 */
304 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
305 size_t * retlen, const u_char * buf)
306 {
307 struct dataflash *priv = mtd->priv;
308 struct spi_device *spi = priv->spi;
309 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
310 struct spi_message msg;
311 unsigned int pageaddr, addr, offset, writelen;
312 size_t remaining = len;
313 u_char *writebuf = (u_char *) buf;
314 int status = -EINVAL;
315 uint8_t *command;
316
317 pr_debug("%s: write 0x%x..0x%x\n",
318 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
319
320 spi_message_init(&msg);
321
322 x[0].tx_buf = command = priv->command;
323 x[0].len = 4;
324 spi_message_add_tail(&x[0], &msg);
325
326 pageaddr = ((unsigned)to / priv->page_size);
327 offset = ((unsigned)to % priv->page_size);
328 if (offset + len > priv->page_size)
329 writelen = priv->page_size - offset;
330 else
331 writelen = len;
332
333 mutex_lock(&priv->lock);
334 while (remaining > 0) {
335 pr_debug("write @ %i:%i len=%i\n",
336 pageaddr, offset, writelen);
337
338 /* REVISIT:
339 * (a) each page in a sector must be rewritten at least
340 * once every 10K sibling erase/program operations.
341 * (b) for pages that are already erased, we could
342 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
343 * (c) WRITE to buffer could be done while waiting for
344 * a previous MWRITE/MWERASE to complete ...
345 * (d) error handling here seems to be mostly missing.
346 *
347 * Two persistent bits per page, plus a per-sector counter,
348 * could support (a) and (b) ... we might consider using
349 * the second half of sector zero, which is just one block,
350 * to track that state. (On AT91, that sector should also
351 * support boot-from-DataFlash.)
352 */
353
354 addr = pageaddr << priv->page_offset;
355
356 /* (1) Maybe transfer partial page to Buffer1 */
357 if (writelen != priv->page_size) {
358 command[0] = OP_TRANSFER_BUF1;
359 command[1] = (addr & 0x00FF0000) >> 16;
360 command[2] = (addr & 0x0000FF00) >> 8;
361 command[3] = 0;
362
363 pr_debug("TRANSFER: (%x) %x %x %x\n",
364 command[0], command[1], command[2], command[3]);
365
366 status = spi_sync(spi, &msg);
367 if (status < 0)
368 pr_debug("%s: xfer %u -> %d\n",
369 dev_name(&spi->dev), addr, status);
370
371 (void) dataflash_waitready(priv->spi);
372 }
373
374 /* (2) Program full page via Buffer1 */
375 addr += offset;
376 command[0] = OP_PROGRAM_VIA_BUF1;
377 command[1] = (addr & 0x00FF0000) >> 16;
378 command[2] = (addr & 0x0000FF00) >> 8;
379 command[3] = (addr & 0x000000FF);
380
381 pr_debug("PROGRAM: (%x) %x %x %x\n",
382 command[0], command[1], command[2], command[3]);
383
384 x[1].tx_buf = writebuf;
385 x[1].len = writelen;
386 spi_message_add_tail(x + 1, &msg);
387 status = spi_sync(spi, &msg);
388 spi_transfer_del(x + 1);
389 if (status < 0)
390 pr_debug("%s: pgm %u/%u -> %d\n",
391 dev_name(&spi->dev), addr, writelen, status);
392
393 (void) dataflash_waitready(priv->spi);
394
395
396 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
397
398 /* (3) Compare to Buffer1 */
399 addr = pageaddr << priv->page_offset;
400 command[0] = OP_COMPARE_BUF1;
401 command[1] = (addr & 0x00FF0000) >> 16;
402 command[2] = (addr & 0x0000FF00) >> 8;
403 command[3] = 0;
404
405 pr_debug("COMPARE: (%x) %x %x %x\n",
406 command[0], command[1], command[2], command[3]);
407
408 status = spi_sync(spi, &msg);
409 if (status < 0)
410 pr_debug("%s: compare %u -> %d\n",
411 dev_name(&spi->dev), addr, status);
412
413 status = dataflash_waitready(priv->spi);
414
415 /* Check result of the compare operation */
416 if (status & (1 << 6)) {
417 printk(KERN_ERR "%s: compare page %u, err %d\n",
418 dev_name(&spi->dev), pageaddr, status);
419 remaining = 0;
420 status = -EIO;
421 break;
422 } else
423 status = 0;
424
425 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
426
427 remaining = remaining - writelen;
428 pageaddr++;
429 offset = 0;
430 writebuf += writelen;
431 *retlen += writelen;
432
433 if (remaining > priv->page_size)
434 writelen = priv->page_size;
435 else
436 writelen = remaining;
437 }
438 mutex_unlock(&priv->lock);
439
440 return status;
441 }
442
443 /* ......................................................................... */
444
445 #ifdef CONFIG_MTD_DATAFLASH_OTP
446
447 static int dataflash_get_otp_info(struct mtd_info *mtd,
448 struct otp_info *info, size_t len)
449 {
450 /* Report both blocks as identical: bytes 0..64, locked.
451 * Unless the user block changed from all-ones, we can't
452 * tell whether it's still writable; so we assume it isn't.
453 */
454 info->start = 0;
455 info->length = 64;
456 info->locked = 1;
457 return sizeof(*info);
458 }
459
460 static ssize_t otp_read(struct spi_device *spi, unsigned base,
461 uint8_t *buf, loff_t off, size_t len)
462 {
463 struct spi_message m;
464 size_t l;
465 uint8_t *scratch;
466 struct spi_transfer t;
467 int status;
468
469 if (off > 64)
470 return -EINVAL;
471
472 if ((off + len) > 64)
473 len = 64 - off;
474
475 spi_message_init(&m);
476
477 l = 4 + base + off + len;
478 scratch = kzalloc(l, GFP_KERNEL);
479 if (!scratch)
480 return -ENOMEM;
481
482 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
483 * IN: ignore 4 bytes, data bytes 0..N (max 127)
484 */
485 scratch[0] = OP_READ_SECURITY;
486
487 memset(&t, 0, sizeof t);
488 t.tx_buf = scratch;
489 t.rx_buf = scratch;
490 t.len = l;
491 spi_message_add_tail(&t, &m);
492
493 dataflash_waitready(spi);
494
495 status = spi_sync(spi, &m);
496 if (status >= 0) {
497 memcpy(buf, scratch + 4 + base + off, len);
498 status = len;
499 }
500
501 kfree(scratch);
502 return status;
503 }
504
505 static int dataflash_read_fact_otp(struct mtd_info *mtd,
506 loff_t from, size_t len, size_t *retlen, u_char *buf)
507 {
508 struct dataflash *priv = mtd->priv;
509 int status;
510
511 /* 64 bytes, from 0..63 ... start at 64 on-chip */
512 mutex_lock(&priv->lock);
513 status = otp_read(priv->spi, 64, buf, from, len);
514 mutex_unlock(&priv->lock);
515
516 if (status < 0)
517 return status;
518 *retlen = status;
519 return 0;
520 }
521
522 static int dataflash_read_user_otp(struct mtd_info *mtd,
523 loff_t from, size_t len, size_t *retlen, u_char *buf)
524 {
525 struct dataflash *priv = mtd->priv;
526 int status;
527
528 /* 64 bytes, from 0..63 ... start at 0 on-chip */
529 mutex_lock(&priv->lock);
530 status = otp_read(priv->spi, 0, buf, from, len);
531 mutex_unlock(&priv->lock);
532
533 if (status < 0)
534 return status;
535 *retlen = status;
536 return 0;
537 }
538
539 static int dataflash_write_user_otp(struct mtd_info *mtd,
540 loff_t from, size_t len, size_t *retlen, u_char *buf)
541 {
542 struct spi_message m;
543 const size_t l = 4 + 64;
544 uint8_t *scratch;
545 struct spi_transfer t;
546 struct dataflash *priv = mtd->priv;
547 int status;
548
549 if (len > 64)
550 return -EINVAL;
551
552 /* Strictly speaking, we *could* truncate the write ... but
553 * let's not do that for the only write that's ever possible.
554 */
555 if ((from + len) > 64)
556 return -EINVAL;
557
558 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
559 * IN: ignore all
560 */
561 scratch = kzalloc(l, GFP_KERNEL);
562 if (!scratch)
563 return -ENOMEM;
564 scratch[0] = OP_WRITE_SECURITY;
565 memcpy(scratch + 4 + from, buf, len);
566
567 spi_message_init(&m);
568
569 memset(&t, 0, sizeof t);
570 t.tx_buf = scratch;
571 t.len = l;
572 spi_message_add_tail(&t, &m);
573
574 /* Write the OTP bits, if they've not yet been written.
575 * This modifies SRAM buffer1.
576 */
577 mutex_lock(&priv->lock);
578 dataflash_waitready(priv->spi);
579 status = spi_sync(priv->spi, &m);
580 mutex_unlock(&priv->lock);
581
582 kfree(scratch);
583
584 if (status >= 0) {
585 status = 0;
586 *retlen = len;
587 }
588 return status;
589 }
590
591 static char *otp_setup(struct mtd_info *device, char revision)
592 {
593 device->_get_fact_prot_info = dataflash_get_otp_info;
594 device->_read_fact_prot_reg = dataflash_read_fact_otp;
595 device->_get_user_prot_info = dataflash_get_otp_info;
596 device->_read_user_prot_reg = dataflash_read_user_otp;
597
598 /* rev c parts (at45db321c and at45db1281 only!) use a
599 * different write procedure; not (yet?) implemented.
600 */
601 if (revision > 'c')
602 device->_write_user_prot_reg = dataflash_write_user_otp;
603
604 return ", OTP";
605 }
606
607 #else
608
609 static char *otp_setup(struct mtd_info *device, char revision)
610 {
611 return " (OTP)";
612 }
613
614 #endif
615
616 /* ......................................................................... */
617
618 /*
619 * Register DataFlash device with MTD subsystem.
620 */
621 static int __devinit
622 add_dataflash_otp(struct spi_device *spi, char *name,
623 int nr_pages, int pagesize, int pageoffset, char revision)
624 {
625 struct dataflash *priv;
626 struct mtd_info *device;
627 struct mtd_part_parser_data ppdata;
628 struct flash_platform_data *pdata = spi->dev.platform_data;
629 char *otp_tag = "";
630 int err = 0;
631
632 priv = kzalloc(sizeof *priv, GFP_KERNEL);
633 if (!priv)
634 return -ENOMEM;
635
636 mutex_init(&priv->lock);
637 priv->spi = spi;
638 priv->page_size = pagesize;
639 priv->page_offset = pageoffset;
640
641 /* name must be usable with cmdlinepart */
642 sprintf(priv->name, "spi%d.%d-%s",
643 spi->master->bus_num, spi->chip_select,
644 name);
645
646 device = &priv->mtd;
647 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
648 device->size = nr_pages * pagesize;
649 device->erasesize = pagesize;
650 device->writesize = pagesize;
651 device->owner = THIS_MODULE;
652 device->type = MTD_DATAFLASH;
653 device->flags = MTD_WRITEABLE;
654 device->_erase = dataflash_erase;
655 device->_read = dataflash_read;
656 device->_write = dataflash_write;
657 device->priv = priv;
658
659 device->dev.parent = &spi->dev;
660
661 if (revision >= 'c')
662 otp_tag = otp_setup(device, revision);
663
664 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
665 name, (long long)((device->size + 1023) >> 10),
666 pagesize, otp_tag);
667 dev_set_drvdata(&spi->dev, priv);
668
669 ppdata.of_node = spi->dev.of_node;
670 err = mtd_device_parse_register(device, NULL, &ppdata,
671 pdata ? pdata->parts : NULL,
672 pdata ? pdata->nr_parts : 0);
673
674 if (!err)
675 return 0;
676
677 dev_set_drvdata(&spi->dev, NULL);
678 kfree(priv);
679 return err;
680 }
681
682 static inline int __devinit
683 add_dataflash(struct spi_device *spi, char *name,
684 int nr_pages, int pagesize, int pageoffset)
685 {
686 return add_dataflash_otp(spi, name, nr_pages, pagesize,
687 pageoffset, 0);
688 }
689
690 struct flash_info {
691 char *name;
692
693 /* JEDEC id has a high byte of zero plus three data bytes:
694 * the manufacturer id, then a two byte device id.
695 */
696 uint32_t jedec_id;
697
698 /* The size listed here is what works with OP_ERASE_PAGE. */
699 unsigned nr_pages;
700 uint16_t pagesize;
701 uint16_t pageoffset;
702
703 uint16_t flags;
704 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
705 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
706 };
707
708 static struct flash_info __devinitdata dataflash_data [] = {
709
710 /*
711 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
712 * one with IS_POW2PS and the other without. The entry with the
713 * non-2^N byte page size can't name exact chip revisions without
714 * losing backwards compatibility for cmdlinepart.
715 *
716 * These newer chips also support 128-byte security registers (with
717 * 64 bytes one-time-programmable) and software write-protection.
718 */
719 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
720 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
721
722 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
723 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
724
725 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
726 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
727
728 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
729 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
730
731 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
732 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
733
734 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
735
736 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
737 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
738
739 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
740 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
741 };
742
743 static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
744 {
745 int tmp;
746 uint8_t code = OP_READ_ID;
747 uint8_t id[3];
748 uint32_t jedec;
749 struct flash_info *info;
750 int status;
751
752 /* JEDEC also defines an optional "extended device information"
753 * string for after vendor-specific data, after the three bytes
754 * we use here. Supporting some chips might require using it.
755 *
756 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
757 * That's not an error; only rev C and newer chips handle it, and
758 * only Atmel sells these chips.
759 */
760 tmp = spi_write_then_read(spi, &code, 1, id, 3);
761 if (tmp < 0) {
762 pr_debug("%s: error %d reading JEDEC ID\n",
763 dev_name(&spi->dev), tmp);
764 return ERR_PTR(tmp);
765 }
766 if (id[0] != 0x1f)
767 return NULL;
768
769 jedec = id[0];
770 jedec = jedec << 8;
771 jedec |= id[1];
772 jedec = jedec << 8;
773 jedec |= id[2];
774
775 for (tmp = 0, info = dataflash_data;
776 tmp < ARRAY_SIZE(dataflash_data);
777 tmp++, info++) {
778 if (info->jedec_id == jedec) {
779 pr_debug("%s: OTP, sector protect%s\n",
780 dev_name(&spi->dev),
781 (info->flags & SUP_POW2PS)
782 ? ", binary pagesize" : ""
783 );
784 if (info->flags & SUP_POW2PS) {
785 status = dataflash_status(spi);
786 if (status < 0) {
787 pr_debug("%s: status error %d\n",
788 dev_name(&spi->dev), status);
789 return ERR_PTR(status);
790 }
791 if (status & 0x1) {
792 if (info->flags & IS_POW2PS)
793 return info;
794 } else {
795 if (!(info->flags & IS_POW2PS))
796 return info;
797 }
798 } else
799 return info;
800 }
801 }
802
803 /*
804 * Treat other chips as errors ... we won't know the right page
805 * size (it might be binary) even when we can tell which density
806 * class is involved (legacy chip id scheme).
807 */
808 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
809 return ERR_PTR(-ENODEV);
810 }
811
812 /*
813 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
814 * or else the ID code embedded in the status bits:
815 *
816 * Device Density ID code #Pages PageSize Offset
817 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
818 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
819 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
820 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
821 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
822 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
823 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
824 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
825 */
826 static int __devinit dataflash_probe(struct spi_device *spi)
827 {
828 int status;
829 struct flash_info *info;
830
831 /*
832 * Try to detect dataflash by JEDEC ID.
833 * If it succeeds we know we have either a C or D part.
834 * D will support power of 2 pagesize option.
835 * Both support the security register, though with different
836 * write procedures.
837 */
838 info = jedec_probe(spi);
839 if (IS_ERR(info))
840 return PTR_ERR(info);
841 if (info != NULL)
842 return add_dataflash_otp(spi, info->name, info->nr_pages,
843 info->pagesize, info->pageoffset,
844 (info->flags & SUP_POW2PS) ? 'd' : 'c');
845
846 /*
847 * Older chips support only legacy commands, identifing
848 * capacity using bits in the status byte.
849 */
850 status = dataflash_status(spi);
851 if (status <= 0 || status == 0xff) {
852 pr_debug("%s: status error %d\n",
853 dev_name(&spi->dev), status);
854 if (status == 0 || status == 0xff)
855 status = -ENODEV;
856 return status;
857 }
858
859 /* if there's a device there, assume it's dataflash.
860 * board setup should have set spi->max_speed_max to
861 * match f(car) for continuous reads, mode 0 or 3.
862 */
863 switch (status & 0x3c) {
864 case 0x0c: /* 0 0 1 1 x x */
865 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
866 break;
867 case 0x14: /* 0 1 0 1 x x */
868 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
869 break;
870 case 0x1c: /* 0 1 1 1 x x */
871 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
872 break;
873 case 0x24: /* 1 0 0 1 x x */
874 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
875 break;
876 case 0x2c: /* 1 0 1 1 x x */
877 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
878 break;
879 case 0x34: /* 1 1 0 1 x x */
880 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
881 break;
882 case 0x38: /* 1 1 1 x x x */
883 case 0x3c:
884 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
885 break;
886 /* obsolete AT45DB1282 not (yet?) supported */
887 default:
888 pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev),
889 status & 0x3c);
890 status = -ENODEV;
891 }
892
893 if (status < 0)
894 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
895 status);
896
897 return status;
898 }
899
900 static int __devexit dataflash_remove(struct spi_device *spi)
901 {
902 struct dataflash *flash = dev_get_drvdata(&spi->dev);
903 int status;
904
905 pr_debug("%s: remove\n", dev_name(&spi->dev));
906
907 status = mtd_device_unregister(&flash->mtd);
908 if (status == 0) {
909 dev_set_drvdata(&spi->dev, NULL);
910 kfree(flash);
911 }
912 return status;
913 }
914
915 static struct spi_driver dataflash_driver = {
916 .driver = {
917 .name = "mtd_dataflash",
918 .owner = THIS_MODULE,
919 .of_match_table = dataflash_dt_ids,
920 },
921
922 .probe = dataflash_probe,
923 .remove = __devexit_p(dataflash_remove),
924
925 /* FIXME: investigate suspend and resume... */
926 };
927
928 module_spi_driver(dataflash_driver);
929
930 MODULE_LICENSE("GPL");
931 MODULE_AUTHOR("Andrew Victor, David Brownell");
932 MODULE_DESCRIPTION("MTD DataFlash driver");
933 MODULE_ALIAS("spi:mtd_dataflash");
Linux kernel - Deliverables
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