drivers/mtd/nand/ams-delta.c

   1 /*
   2  *  drivers/mtd/nand/ams-delta.c
   3  *
   4  *  Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
   5  *
   6  *  Derived from drivers/mtd/toto.c
   7  *  Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
   8  *  Partially stolen from drivers/mtd/nand/plat_nand.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  *  Overview:
  15  *   This is a device driver for the NAND flash device found on the
  16  *   Amstrad E3 (Delta).
  17  */
  18
  19 #include <linux/slab.h>
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/delay.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/nand.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/gpio.h>
  27 #include <linux/platform_data/gpio-omap.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/sizes.h>
  31
  32 #include <mach/board-ams-delta.h>
  33
  34 #include <mach/hardware.h>
  35
  36 /*
  37  * MTD structure for E3 (Delta)
  38  */
  39 static struct mtd_info *ams_delta_mtd = NULL;
  40
  41 /*
  42  * Define partitions for flash devices
  43  */
  44
  45 static struct mtd_partition partition_info[] = {
  46         { .name         = "Kernel",
  47           .offset       = 0,
  48           .size         = 3 * SZ_1M + SZ_512K },
  49         { .name         = "u-boot",
  50           .offset       = 3 * SZ_1M + SZ_512K,
  51           .size         = SZ_256K },
  52         { .name         = "u-boot params",
  53           .offset       = 3 * SZ_1M + SZ_512K + SZ_256K,
  54           .size         = SZ_256K },
  55         { .name         = "Amstrad LDR",
  56           .offset       = 4 * SZ_1M,
  57           .size         = SZ_256K },
  58         { .name         = "File system",
  59           .offset       = 4 * SZ_1M + 1 * SZ_256K,
  60           .size         = 27 * SZ_1M },
  61         { .name         = "PBL reserved",
  62           .offset       = 32 * SZ_1M - 3 * SZ_256K,
  63           .size         =  3 * SZ_256K },
  64 };
  65
  66 static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
  67 {
  68         struct nand_chip *this = mtd->priv;
  69         void __iomem *io_base = this->priv;
  70
  71         writew(0, io_base + OMAP_MPUIO_IO_CNTL);
  72         writew(byte, this->IO_ADDR_W);
  73         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
  74         ndelay(40);
  75         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
  76 }
  77
  78 static u_char ams_delta_read_byte(struct mtd_info *mtd)
  79 {
  80         u_char res;
  81         struct nand_chip *this = mtd->priv;
  82         void __iomem *io_base = this->priv;
  83
  84         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
  85         ndelay(40);
  86         writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
  87         res = readw(this->IO_ADDR_R);
  88         gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
  89
  90         return res;
  91 }
  92
  93 static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
  94                                 int len)
  95 {
  96         int i;
  97
  98         for (i=0; i<len; i++)
  99                 ams_delta_write_byte(mtd, buf[i]);
 100 }
 101
 102 static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 103 {
 104         int i;
 105
 106         for (i=0; i<len; i++)
 107                 buf[i] = ams_delta_read_byte(mtd);
 108 }
 109
 110 static int ams_delta_verify_buf(struct mtd_info *mtd, const u_char *buf,
 111                                 int len)
 112 {
 113         int i;
 114
 115         for (i=0; i<len; i++)
 116                 if (buf[i] != ams_delta_read_byte(mtd))
 117                         return -EFAULT;
 118
 119         return 0;
 120 }
 121
 122 /*
 123  * Command control function
 124  *
 125  * ctrl:
 126  * NAND_NCE: bit 0 -> bit 2
 127  * NAND_CLE: bit 1 -> bit 7
 128  * NAND_ALE: bit 2 -> bit 6
 129  */
 130 static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
 131                                 unsigned int ctrl)
 132 {
 133
 134         if (ctrl & NAND_CTRL_CHANGE) {
 135                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
 136                                 (ctrl & NAND_NCE) == 0);
 137                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
 138                                 (ctrl & NAND_CLE) != 0);
 139                 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
 140                                 (ctrl & NAND_ALE) != 0);
 141         }
 142
 143         if (cmd != NAND_CMD_NONE)
 144                 ams_delta_write_byte(mtd, cmd);
 145 }
 146
 147 static int ams_delta_nand_ready(struct mtd_info *mtd)
 148 {
 149         return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
 150 }
 151
 152 static const struct gpio _mandatory_gpio[] = {
 153         {
 154                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NCE,
 155                 .flags  = GPIOF_OUT_INIT_HIGH,
 156                 .label  = "nand_nce",
 157         },
 158         {
 159                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NRE,
 160                 .flags  = GPIOF_OUT_INIT_HIGH,
 161                 .label  = "nand_nre",
 162         },
 163         {
 164                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWP,
 165                 .flags  = GPIOF_OUT_INIT_HIGH,
 166                 .label  = "nand_nwp",
 167         },
 168         {
 169                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWE,
 170                 .flags  = GPIOF_OUT_INIT_HIGH,
 171                 .label  = "nand_nwe",
 172         },
 173         {
 174                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_ALE,
 175                 .flags  = GPIOF_OUT_INIT_LOW,
 176                 .label  = "nand_ale",
 177         },
 178         {
 179                 .gpio   = AMS_DELTA_GPIO_PIN_NAND_CLE,
 180                 .flags  = GPIOF_OUT_INIT_LOW,
 181                 .label  = "nand_cle",
 182         },
 183 };
 184
 185 /*
 186  * Main initialization routine
 187  */
 188 static int __devinit ams_delta_init(struct platform_device *pdev)
 189 {
 190         struct nand_chip *this;
 191         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 192         void __iomem *io_base;
 193         int err = 0;
 194
 195         if (!res)
 196                 return -ENXIO;
 197
 198         /* Allocate memory for MTD device structure and private data */
 199         ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
 200                                 sizeof(struct nand_chip), GFP_KERNEL);
 201         if (!ams_delta_mtd) {
 202                 printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
 203                 err = -ENOMEM;
 204                 goto out;
 205         }
 206
 207         ams_delta_mtd->owner = THIS_MODULE;
 208
 209         /* Get pointer to private data */
 210         this = (struct nand_chip *) (&ams_delta_mtd[1]);
 211
 212         /* Initialize structures */
 213         memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
 214         memset(this, 0, sizeof(struct nand_chip));
 215
 216         /* Link the private data with the MTD structure */
 217         ams_delta_mtd->priv = this;
 218
 219         /*
 220          * Don't try to request the memory region from here,
 221          * it should have been already requested from the
 222          * gpio-omap driver and requesting it again would fail.
 223          */
 224
 225         io_base = ioremap(res->start, resource_size(res));
 226         if (io_base == NULL) {
 227                 dev_err(&pdev->dev, "ioremap failed\n");
 228                 err = -EIO;
 229                 goto out_free;
 230         }
 231
 232         this->priv = io_base;
 233
 234         /* Set address of NAND IO lines */
 235         this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
 236         this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
 237         this->read_byte = ams_delta_read_byte;
 238         this->write_buf = ams_delta_write_buf;
 239         this->read_buf = ams_delta_read_buf;
 240         this->verify_buf = ams_delta_verify_buf;
 241         this->cmd_ctrl = ams_delta_hwcontrol;
 242         if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
 243                 this->dev_ready = ams_delta_nand_ready;
 244         } else {
 245                 this->dev_ready = NULL;
 246                 printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
 247         }
 248         /* 25 us command delay time */
 249         this->chip_delay = 30;
 250         this->ecc.mode = NAND_ECC_SOFT;
 251
 252         platform_set_drvdata(pdev, io_base);
 253
 254         /* Set chip enabled, but  */
 255         err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 256         if (err)
 257                 goto out_gpio;
 258
 259         /* Scan to find existence of the device */
 260         if (nand_scan(ams_delta_mtd, 1)) {
 261                 err = -ENXIO;
 262                 goto out_mtd;
 263         }
 264
 265         /* Register the partitions */
 266         mtd_device_register(ams_delta_mtd, partition_info,
 267                             ARRAY_SIZE(partition_info));
 268
 269         goto out;
 270
 271  out_mtd:
 272         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 273 out_gpio:
 274         platform_set_drvdata(pdev, NULL);
 275         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 276         iounmap(io_base);
 277 out_free:
 278         kfree(ams_delta_mtd);
 279  out:
 280         return err;
 281 }
 282
 283 /*
 284  * Clean up routine
 285  */
 286 static int __devexit ams_delta_cleanup(struct platform_device *pdev)
 287 {
 288         void __iomem *io_base = platform_get_drvdata(pdev);
 289
 290         /* Release resources, unregister device */
 291         nand_release(ams_delta_mtd);
 292
 293         gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
 294         gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
 295         iounmap(io_base);
 296
 297         /* Free the MTD device structure */
 298         kfree(ams_delta_mtd);
 299
 300         return 0;
 301 }
 302
 303 static struct platform_driver ams_delta_nand_driver = {
 304         .probe          = ams_delta_init,
 305         .remove         = __devexit_p(ams_delta_cleanup),
 306         .driver         = {
 307                 .name   = "ams-delta-nand",
 308                 .owner  = THIS_MODULE,
 309         },
 310 };
 311
 312 module_platform_driver(ams_delta_nand_driver);
 313
 314 MODULE_LICENSE("GPL");
 315 MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
 316 MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");