Merge with rsync://fileserver/linux
[deliverable/linux.git] / drivers / mtd / nand / nand_base.c
1 /*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
8 *
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
11 *
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002 Thomas Gleixner (tglx@linutronix.de)
14 *
15 * 02-08-2004 tglx: support for strange chips, which cannot auto increment
16 * pages on read / read_oob
17 *
18 * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
19 * pointed this out, as he marked an auto increment capable chip
20 * as NOAUTOINCR in the board driver.
21 * Make reads over block boundaries work too
22 *
23 * 04-14-2004 tglx: first working version for 2k page size chips
24 *
25 * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
26 *
27 * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
28 * among multiple independend devices. Suggestions and initial patch
29 * from Ben Dooks <ben-mtd@fluff.org>
30 *
31 * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
32 * Basically, any block not rewritten may lose data when surrounding blocks
33 * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
34 * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
35 * do not lose data, force them to be rewritten when some of the surrounding
36 * blocks are erased. Rather than tracking a specific nearby block (which
37 * could itself go bad), use a page address 'mask' to select several blocks
38 * in the same area, and rewrite the BBT when any of them are erased.
39 *
40 * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
41 * AG-AND chips. If there was a sudden loss of power during an erase operation,
42 * a "device recovery" operation must be performed when power is restored
43 * to ensure correct operation.
44 *
45 * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
46 * perform extra error status checks on erase and write failures. This required
47 * adding a wrapper function for nand_read_ecc.
48 *
49 * Credits:
50 * David Woodhouse for adding multichip support
51 *
52 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
53 * rework for 2K page size chips
54 *
55 * TODO:
56 * Enable cached programming for 2k page size chips
57 * Check, if mtd->ecctype should be set to MTD_ECC_HW
58 * if we have HW ecc support.
59 * The AG-AND chips have nice features for speed improvement,
60 * which are not supported yet. Read / program 4 pages in one go.
61 *
62 * $Id: nand_base.c,v 1.143 2005/05/19 16:10:22 gleixner Exp $
63 *
64 * This program is free software; you can redistribute it and/or modify
65 * it under the terms of the GNU General Public License version 2 as
66 * published by the Free Software Foundation.
67 *
68 */
69
70 #include <linux/delay.h>
71 #include <linux/errno.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/types.h>
75 #include <linux/mtd/mtd.h>
76 #include <linux/mtd/nand.h>
77 #include <linux/mtd/nand_ecc.h>
78 #include <linux/mtd/compatmac.h>
79 #include <linux/interrupt.h>
80 #include <linux/bitops.h>
81 #include <asm/io.h>
82
83 #ifdef CONFIG_MTD_PARTITIONS
84 #include <linux/mtd/partitions.h>
85 #endif
86
87 /* Define default oob placement schemes for large and small page devices */
88 static struct nand_oobinfo nand_oob_8 = {
89 .useecc = MTD_NANDECC_AUTOPLACE,
90 .eccbytes = 3,
91 .eccpos = {0, 1, 2},
92 .oobfree = { {3, 2}, {6, 2} }
93 };
94
95 static struct nand_oobinfo nand_oob_16 = {
96 .useecc = MTD_NANDECC_AUTOPLACE,
97 .eccbytes = 6,
98 .eccpos = {0, 1, 2, 3, 6, 7},
99 .oobfree = { {8, 8} }
100 };
101
102 static struct nand_oobinfo nand_oob_64 = {
103 .useecc = MTD_NANDECC_AUTOPLACE,
104 .eccbytes = 24,
105 .eccpos = {
106 40, 41, 42, 43, 44, 45, 46, 47,
107 48, 49, 50, 51, 52, 53, 54, 55,
108 56, 57, 58, 59, 60, 61, 62, 63},
109 .oobfree = { {2, 38} }
110 };
111
112 /* This is used for padding purposes in nand_write_oob */
113 static u_char ffchars[] = {
114 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
115 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
116 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
117 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
118 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
122 };
123
124 /*
125 * NAND low-level MTD interface functions
126 */
127 static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
128 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
129 static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
130
131 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
132 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
133 size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
134 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
135 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
136 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
137 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
138 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
139 static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
140 unsigned long count, loff_t to, size_t * retlen);
141 static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
142 unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
143 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
144 static void nand_sync (struct mtd_info *mtd);
145
146 /* Some internal functions */
147 static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
148 struct nand_oobinfo *oobsel, int mode);
149 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
150 static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
151 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
152 #else
153 #define nand_verify_pages(...) (0)
154 #endif
155
156 static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
157
158 /**
159 * nand_release_device - [GENERIC] release chip
160 * @mtd: MTD device structure
161 *
162 * Deselect, release chip lock and wake up anyone waiting on the device
163 */
164 static void nand_release_device (struct mtd_info *mtd)
165 {
166 struct nand_chip *this = mtd->priv;
167
168 /* De-select the NAND device */
169 this->select_chip(mtd, -1);
170 /* Do we have a hardware controller ? */
171 if (this->controller) {
172 spin_lock(&this->controller->lock);
173 this->controller->active = NULL;
174 spin_unlock(&this->controller->lock);
175 }
176 /* Release the chip */
177 spin_lock (&this->chip_lock);
178 this->state = FL_READY;
179 wake_up (&this->wq);
180 spin_unlock (&this->chip_lock);
181 }
182
183 /**
184 * nand_read_byte - [DEFAULT] read one byte from the chip
185 * @mtd: MTD device structure
186 *
187 * Default read function for 8bit buswith
188 */
189 static u_char nand_read_byte(struct mtd_info *mtd)
190 {
191 struct nand_chip *this = mtd->priv;
192 return readb(this->IO_ADDR_R);
193 }
194
195 /**
196 * nand_write_byte - [DEFAULT] write one byte to the chip
197 * @mtd: MTD device structure
198 * @byte: pointer to data byte to write
199 *
200 * Default write function for 8it buswith
201 */
202 static void nand_write_byte(struct mtd_info *mtd, u_char byte)
203 {
204 struct nand_chip *this = mtd->priv;
205 writeb(byte, this->IO_ADDR_W);
206 }
207
208 /**
209 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
210 * @mtd: MTD device structure
211 *
212 * Default read function for 16bit buswith with
213 * endianess conversion
214 */
215 static u_char nand_read_byte16(struct mtd_info *mtd)
216 {
217 struct nand_chip *this = mtd->priv;
218 return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
219 }
220
221 /**
222 * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
223 * @mtd: MTD device structure
224 * @byte: pointer to data byte to write
225 *
226 * Default write function for 16bit buswith with
227 * endianess conversion
228 */
229 static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
230 {
231 struct nand_chip *this = mtd->priv;
232 writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
233 }
234
235 /**
236 * nand_read_word - [DEFAULT] read one word from the chip
237 * @mtd: MTD device structure
238 *
239 * Default read function for 16bit buswith without
240 * endianess conversion
241 */
242 static u16 nand_read_word(struct mtd_info *mtd)
243 {
244 struct nand_chip *this = mtd->priv;
245 return readw(this->IO_ADDR_R);
246 }
247
248 /**
249 * nand_write_word - [DEFAULT] write one word to the chip
250 * @mtd: MTD device structure
251 * @word: data word to write
252 *
253 * Default write function for 16bit buswith without
254 * endianess conversion
255 */
256 static void nand_write_word(struct mtd_info *mtd, u16 word)
257 {
258 struct nand_chip *this = mtd->priv;
259 writew(word, this->IO_ADDR_W);
260 }
261
262 /**
263 * nand_select_chip - [DEFAULT] control CE line
264 * @mtd: MTD device structure
265 * @chip: chipnumber to select, -1 for deselect
266 *
267 * Default select function for 1 chip devices.
268 */
269 static void nand_select_chip(struct mtd_info *mtd, int chip)
270 {
271 struct nand_chip *this = mtd->priv;
272 switch(chip) {
273 case -1:
274 this->hwcontrol(mtd, NAND_CTL_CLRNCE);
275 break;
276 case 0:
277 this->hwcontrol(mtd, NAND_CTL_SETNCE);
278 break;
279
280 default:
281 BUG();
282 }
283 }
284
285 /**
286 * nand_write_buf - [DEFAULT] write buffer to chip
287 * @mtd: MTD device structure
288 * @buf: data buffer
289 * @len: number of bytes to write
290 *
291 * Default write function for 8bit buswith
292 */
293 static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
294 {
295 int i;
296 struct nand_chip *this = mtd->priv;
297
298 for (i=0; i<len; i++)
299 writeb(buf[i], this->IO_ADDR_W);
300 }
301
302 /**
303 * nand_read_buf - [DEFAULT] read chip data into buffer
304 * @mtd: MTD device structure
305 * @buf: buffer to store date
306 * @len: number of bytes to read
307 *
308 * Default read function for 8bit buswith
309 */
310 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
311 {
312 int i;
313 struct nand_chip *this = mtd->priv;
314
315 for (i=0; i<len; i++)
316 buf[i] = readb(this->IO_ADDR_R);
317 }
318
319 /**
320 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
321 * @mtd: MTD device structure
322 * @buf: buffer containing the data to compare
323 * @len: number of bytes to compare
324 *
325 * Default verify function for 8bit buswith
326 */
327 static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
328 {
329 int i;
330 struct nand_chip *this = mtd->priv;
331
332 for (i=0; i<len; i++)
333 if (buf[i] != readb(this->IO_ADDR_R))
334 return -EFAULT;
335
336 return 0;
337 }
338
339 /**
340 * nand_write_buf16 - [DEFAULT] write buffer to chip
341 * @mtd: MTD device structure
342 * @buf: data buffer
343 * @len: number of bytes to write
344 *
345 * Default write function for 16bit buswith
346 */
347 static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
348 {
349 int i;
350 struct nand_chip *this = mtd->priv;
351 u16 *p = (u16 *) buf;
352 len >>= 1;
353
354 for (i=0; i<len; i++)
355 writew(p[i], this->IO_ADDR_W);
356
357 }
358
359 /**
360 * nand_read_buf16 - [DEFAULT] read chip data into buffer
361 * @mtd: MTD device structure
362 * @buf: buffer to store date
363 * @len: number of bytes to read
364 *
365 * Default read function for 16bit buswith
366 */
367 static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
368 {
369 int i;
370 struct nand_chip *this = mtd->priv;
371 u16 *p = (u16 *) buf;
372 len >>= 1;
373
374 for (i=0; i<len; i++)
375 p[i] = readw(this->IO_ADDR_R);
376 }
377
378 /**
379 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
380 * @mtd: MTD device structure
381 * @buf: buffer containing the data to compare
382 * @len: number of bytes to compare
383 *
384 * Default verify function for 16bit buswith
385 */
386 static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
387 {
388 int i;
389 struct nand_chip *this = mtd->priv;
390 u16 *p = (u16 *) buf;
391 len >>= 1;
392
393 for (i=0; i<len; i++)
394 if (p[i] != readw(this->IO_ADDR_R))
395 return -EFAULT;
396
397 return 0;
398 }
399
400 /**
401 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
402 * @mtd: MTD device structure
403 * @ofs: offset from device start
404 * @getchip: 0, if the chip is already selected
405 *
406 * Check, if the block is bad.
407 */
408 static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
409 {
410 int page, chipnr, res = 0;
411 struct nand_chip *this = mtd->priv;
412 u16 bad;
413
414 if (getchip) {
415 page = (int)(ofs >> this->page_shift);
416 chipnr = (int)(ofs >> this->chip_shift);
417
418 /* Grab the lock and see if the device is available */
419 nand_get_device (this, mtd, FL_READING);
420
421 /* Select the NAND device */
422 this->select_chip(mtd, chipnr);
423 } else
424 page = (int) ofs;
425
426 if (this->options & NAND_BUSWIDTH_16) {
427 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
428 bad = cpu_to_le16(this->read_word(mtd));
429 if (this->badblockpos & 0x1)
430 bad >>= 1;
431 if ((bad & 0xFF) != 0xff)
432 res = 1;
433 } else {
434 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
435 if (this->read_byte(mtd) != 0xff)
436 res = 1;
437 }
438
439 if (getchip) {
440 /* Deselect and wake up anyone waiting on the device */
441 nand_release_device(mtd);
442 }
443
444 return res;
445 }
446
447 /**
448 * nand_default_block_markbad - [DEFAULT] mark a block bad
449 * @mtd: MTD device structure
450 * @ofs: offset from device start
451 *
452 * This is the default implementation, which can be overridden by
453 * a hardware specific driver.
454 */
455 static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
456 {
457 struct nand_chip *this = mtd->priv;
458 u_char buf[2] = {0, 0};
459 size_t retlen;
460 int block;
461
462 /* Get block number */
463 block = ((int) ofs) >> this->bbt_erase_shift;
464 if (this->bbt)
465 this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
466
467 /* Do we have a flash based bad block table ? */
468 if (this->options & NAND_USE_FLASH_BBT)
469 return nand_update_bbt (mtd, ofs);
470
471 /* We write two bytes, so we dont have to mess with 16 bit access */
472 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
473 return nand_write_oob (mtd, ofs , 2, &retlen, buf);
474 }
475
476 /**
477 * nand_check_wp - [GENERIC] check if the chip is write protected
478 * @mtd: MTD device structure
479 * Check, if the device is write protected
480 *
481 * The function expects, that the device is already selected
482 */
483 static int nand_check_wp (struct mtd_info *mtd)
484 {
485 struct nand_chip *this = mtd->priv;
486 /* Check the WP bit */
487 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
488 return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
489 }
490
491 /**
492 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
493 * @mtd: MTD device structure
494 * @ofs: offset from device start
495 * @getchip: 0, if the chip is already selected
496 * @allowbbt: 1, if its allowed to access the bbt area
497 *
498 * Check, if the block is bad. Either by reading the bad block table or
499 * calling of the scan function.
500 */
501 static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
502 {
503 struct nand_chip *this = mtd->priv;
504
505 if (!this->bbt)
506 return this->block_bad(mtd, ofs, getchip);
507
508 /* Return info from the table */
509 return nand_isbad_bbt (mtd, ofs, allowbbt);
510 }
511
512 /*
513 * Wait for the ready pin, after a command
514 * The timeout is catched later.
515 */
516 static void nand_wait_ready(struct mtd_info *mtd)
517 {
518 struct nand_chip *this = mtd->priv;
519 unsigned long timeo = jiffies + 2;
520
521 /* wait until command is processed or timeout occures */
522 do {
523 if (this->dev_ready(mtd))
524 return;
525 } while (time_before(jiffies, timeo));
526 }
527
528 /**
529 * nand_command - [DEFAULT] Send command to NAND device
530 * @mtd: MTD device structure
531 * @command: the command to be sent
532 * @column: the column address for this command, -1 if none
533 * @page_addr: the page address for this command, -1 if none
534 *
535 * Send command to NAND device. This function is used for small page
536 * devices (256/512 Bytes per page)
537 */
538 static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
539 {
540 register struct nand_chip *this = mtd->priv;
541
542 /* Begin command latch cycle */
543 this->hwcontrol(mtd, NAND_CTL_SETCLE);
544 /*
545 * Write out the command to the device.
546 */
547 if (command == NAND_CMD_SEQIN) {
548 int readcmd;
549
550 if (column >= mtd->oobblock) {
551 /* OOB area */
552 column -= mtd->oobblock;
553 readcmd = NAND_CMD_READOOB;
554 } else if (column < 256) {
555 /* First 256 bytes --> READ0 */
556 readcmd = NAND_CMD_READ0;
557 } else {
558 column -= 256;
559 readcmd = NAND_CMD_READ1;
560 }
561 this->write_byte(mtd, readcmd);
562 }
563 this->write_byte(mtd, command);
564
565 /* Set ALE and clear CLE to start address cycle */
566 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
567
568 if (column != -1 || page_addr != -1) {
569 this->hwcontrol(mtd, NAND_CTL_SETALE);
570
571 /* Serially input address */
572 if (column != -1) {
573 /* Adjust columns for 16 bit buswidth */
574 if (this->options & NAND_BUSWIDTH_16)
575 column >>= 1;
576 this->write_byte(mtd, column);
577 }
578 if (page_addr != -1) {
579 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
580 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
581 /* One more address cycle for devices > 32MiB */
582 if (this->chipsize > (32 << 20))
583 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
584 }
585 /* Latch in address */
586 this->hwcontrol(mtd, NAND_CTL_CLRALE);
587 }
588
589 /*
590 * program and erase have their own busy handlers
591 * status and sequential in needs no delay
592 */
593 switch (command) {
594
595 case NAND_CMD_PAGEPROG:
596 case NAND_CMD_ERASE1:
597 case NAND_CMD_ERASE2:
598 case NAND_CMD_SEQIN:
599 case NAND_CMD_STATUS:
600 return;
601
602 case NAND_CMD_RESET:
603 if (this->dev_ready)
604 break;
605 udelay(this->chip_delay);
606 this->hwcontrol(mtd, NAND_CTL_SETCLE);
607 this->write_byte(mtd, NAND_CMD_STATUS);
608 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
609 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
610 return;
611
612 /* This applies to read commands */
613 default:
614 /*
615 * If we don't have access to the busy pin, we apply the given
616 * command delay
617 */
618 if (!this->dev_ready) {
619 udelay (this->chip_delay);
620 return;
621 }
622 }
623 /* Apply this short delay always to ensure that we do wait tWB in
624 * any case on any machine. */
625 ndelay (100);
626
627 nand_wait_ready(mtd);
628 }
629
630 /**
631 * nand_command_lp - [DEFAULT] Send command to NAND large page device
632 * @mtd: MTD device structure
633 * @command: the command to be sent
634 * @column: the column address for this command, -1 if none
635 * @page_addr: the page address for this command, -1 if none
636 *
637 * Send command to NAND device. This is the version for the new large page devices
638 * We dont have the seperate regions as we have in the small page devices.
639 * We must emulate NAND_CMD_READOOB to keep the code compatible.
640 *
641 */
642 static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
643 {
644 register struct nand_chip *this = mtd->priv;
645
646 /* Emulate NAND_CMD_READOOB */
647 if (command == NAND_CMD_READOOB) {
648 column += mtd->oobblock;
649 command = NAND_CMD_READ0;
650 }
651
652
653 /* Begin command latch cycle */
654 this->hwcontrol(mtd, NAND_CTL_SETCLE);
655 /* Write out the command to the device. */
656 this->write_byte(mtd, (command & 0xff));
657 /* End command latch cycle */
658 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
659
660 if (column != -1 || page_addr != -1) {
661 this->hwcontrol(mtd, NAND_CTL_SETALE);
662
663 /* Serially input address */
664 if (column != -1) {
665 /* Adjust columns for 16 bit buswidth */
666 if (this->options & NAND_BUSWIDTH_16)
667 column >>= 1;
668 this->write_byte(mtd, column & 0xff);
669 this->write_byte(mtd, column >> 8);
670 }
671 if (page_addr != -1) {
672 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
673 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
674 /* One more address cycle for devices > 128MiB */
675 if (this->chipsize > (128 << 20))
676 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
677 }
678 /* Latch in address */
679 this->hwcontrol(mtd, NAND_CTL_CLRALE);
680 }
681
682 /*
683 * program and erase have their own busy handlers
684 * status, sequential in, and deplete1 need no delay
685 */
686 switch (command) {
687
688 case NAND_CMD_CACHEDPROG:
689 case NAND_CMD_PAGEPROG:
690 case NAND_CMD_ERASE1:
691 case NAND_CMD_ERASE2:
692 case NAND_CMD_SEQIN:
693 case NAND_CMD_STATUS:
694 case NAND_CMD_DEPLETE1:
695 return;
696
697 /*
698 * read error status commands require only a short delay
699 */
700 case NAND_CMD_STATUS_ERROR:
701 case NAND_CMD_STATUS_ERROR0:
702 case NAND_CMD_STATUS_ERROR1:
703 case NAND_CMD_STATUS_ERROR2:
704 case NAND_CMD_STATUS_ERROR3:
705 udelay(this->chip_delay);
706 return;
707
708 case NAND_CMD_RESET:
709 if (this->dev_ready)
710 break;
711 udelay(this->chip_delay);
712 this->hwcontrol(mtd, NAND_CTL_SETCLE);
713 this->write_byte(mtd, NAND_CMD_STATUS);
714 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
715 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
716 return;
717
718 case NAND_CMD_READ0:
719 /* Begin command latch cycle */
720 this->hwcontrol(mtd, NAND_CTL_SETCLE);
721 /* Write out the start read command */
722 this->write_byte(mtd, NAND_CMD_READSTART);
723 /* End command latch cycle */
724 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
725 /* Fall through into ready check */
726
727 /* This applies to read commands */
728 default:
729 /*
730 * If we don't have access to the busy pin, we apply the given
731 * command delay
732 */
733 if (!this->dev_ready) {
734 udelay (this->chip_delay);
735 return;
736 }
737 }
738
739 /* Apply this short delay always to ensure that we do wait tWB in
740 * any case on any machine. */
741 ndelay (100);
742
743 nand_wait_ready(mtd);
744 }
745
746 /**
747 * nand_get_device - [GENERIC] Get chip for selected access
748 * @this: the nand chip descriptor
749 * @mtd: MTD device structure
750 * @new_state: the state which is requested
751 *
752 * Get the device and lock it for exclusive access
753 */
754 static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
755 {
756 struct nand_chip *active = this;
757
758 DECLARE_WAITQUEUE (wait, current);
759
760 /*
761 * Grab the lock and see if the device is available
762 */
763 retry:
764 /* Hardware controller shared among independend devices */
765 if (this->controller) {
766 spin_lock (&this->controller->lock);
767 if (this->controller->active)
768 active = this->controller->active;
769 else
770 this->controller->active = this;
771 spin_unlock (&this->controller->lock);
772 }
773
774 if (active == this) {
775 spin_lock (&this->chip_lock);
776 if (this->state == FL_READY) {
777 this->state = new_state;
778 spin_unlock (&this->chip_lock);
779 return;
780 }
781 }
782 set_current_state (TASK_UNINTERRUPTIBLE);
783 add_wait_queue (&active->wq, &wait);
784 spin_unlock (&active->chip_lock);
785 schedule ();
786 remove_wait_queue (&active->wq, &wait);
787 goto retry;
788 }
789
790 /**
791 * nand_wait - [DEFAULT] wait until the command is done
792 * @mtd: MTD device structure
793 * @this: NAND chip structure
794 * @state: state to select the max. timeout value
795 *
796 * Wait for command done. This applies to erase and program only
797 * Erase can take up to 400ms and program up to 20ms according to
798 * general NAND and SmartMedia specs
799 *
800 */
801 static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
802 {
803
804 unsigned long timeo = jiffies;
805 int status;
806
807 if (state == FL_ERASING)
808 timeo += (HZ * 400) / 1000;
809 else
810 timeo += (HZ * 20) / 1000;
811
812 /* Apply this short delay always to ensure that we do wait tWB in
813 * any case on any machine. */
814 ndelay (100);
815
816 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
817 this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
818 else
819 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
820
821 while (time_before(jiffies, timeo)) {
822 /* Check, if we were interrupted */
823 if (this->state != state)
824 return 0;
825
826 if (this->dev_ready) {
827 if (this->dev_ready(mtd))
828 break;
829 } else {
830 if (this->read_byte(mtd) & NAND_STATUS_READY)
831 break;
832 }
833 cond_resched();
834 }
835 status = (int) this->read_byte(mtd);
836 return status;
837 }
838
839 /**
840 * nand_write_page - [GENERIC] write one page
841 * @mtd: MTD device structure
842 * @this: NAND chip structure
843 * @page: startpage inside the chip, must be called with (page & this->pagemask)
844 * @oob_buf: out of band data buffer
845 * @oobsel: out of band selecttion structre
846 * @cached: 1 = enable cached programming if supported by chip
847 *
848 * Nand_page_program function is used for write and writev !
849 * This function will always program a full page of data
850 * If you call it with a non page aligned buffer, you're lost :)
851 *
852 * Cached programming is not supported yet.
853 */
854 static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
855 u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
856 {
857 int i, status;
858 u_char ecc_code[32];
859 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
860 int *oob_config = oobsel->eccpos;
861 int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
862 int eccbytes = 0;
863
864 /* FIXME: Enable cached programming */
865 cached = 0;
866
867 /* Send command to begin auto page programming */
868 this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
869
870 /* Write out complete page of data, take care of eccmode */
871 switch (eccmode) {
872 /* No ecc, write all */
873 case NAND_ECC_NONE:
874 printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
875 this->write_buf(mtd, this->data_poi, mtd->oobblock);
876 break;
877
878 /* Software ecc 3/256, write all */
879 case NAND_ECC_SOFT:
880 for (; eccsteps; eccsteps--) {
881 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
882 for (i = 0; i < 3; i++, eccidx++)
883 oob_buf[oob_config[eccidx]] = ecc_code[i];
884 datidx += this->eccsize;
885 }
886 this->write_buf(mtd, this->data_poi, mtd->oobblock);
887 break;
888 default:
889 eccbytes = this->eccbytes;
890 for (; eccsteps; eccsteps--) {
891 /* enable hardware ecc logic for write */
892 this->enable_hwecc(mtd, NAND_ECC_WRITE);
893 this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
894 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
895 for (i = 0; i < eccbytes; i++, eccidx++)
896 oob_buf[oob_config[eccidx]] = ecc_code[i];
897 /* If the hardware ecc provides syndromes then
898 * the ecc code must be written immidiately after
899 * the data bytes (words) */
900 if (this->options & NAND_HWECC_SYNDROME)
901 this->write_buf(mtd, ecc_code, eccbytes);
902 datidx += this->eccsize;
903 }
904 break;
905 }
906
907 /* Write out OOB data */
908 if (this->options & NAND_HWECC_SYNDROME)
909 this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
910 else
911 this->write_buf(mtd, oob_buf, mtd->oobsize);
912
913 /* Send command to actually program the data */
914 this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
915
916 if (!cached) {
917 /* call wait ready function */
918 status = this->waitfunc (mtd, this, FL_WRITING);
919
920 /* See if operation failed and additional status checks are available */
921 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
922 status = this->errstat(mtd, this, FL_WRITING, status, page);
923 }
924
925 /* See if device thinks it succeeded */
926 if (status & NAND_STATUS_FAIL) {
927 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
928 return -EIO;
929 }
930 } else {
931 /* FIXME: Implement cached programming ! */
932 /* wait until cache is ready*/
933 // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
934 }
935 return 0;
936 }
937
938 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
939 /**
940 * nand_verify_pages - [GENERIC] verify the chip contents after a write
941 * @mtd: MTD device structure
942 * @this: NAND chip structure
943 * @page: startpage inside the chip, must be called with (page & this->pagemask)
944 * @numpages: number of pages to verify
945 * @oob_buf: out of band data buffer
946 * @oobsel: out of band selecttion structre
947 * @chipnr: number of the current chip
948 * @oobmode: 1 = full buffer verify, 0 = ecc only
949 *
950 * The NAND device assumes that it is always writing to a cleanly erased page.
951 * Hence, it performs its internal write verification only on bits that
952 * transitioned from 1 to 0. The device does NOT verify the whole page on a
953 * byte by byte basis. It is possible that the page was not completely erased
954 * or the page is becoming unusable due to wear. The read with ECC would catch
955 * the error later when the ECC page check fails, but we would rather catch
956 * it early in the page write stage. Better to write no data than invalid data.
957 */
958 static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
959 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
960 {
961 int i, j, datidx = 0, oobofs = 0, res = -EIO;
962 int eccsteps = this->eccsteps;
963 int hweccbytes;
964 u_char oobdata[64];
965
966 hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
967
968 /* Send command to read back the first page */
969 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
970
971 for(;;) {
972 for (j = 0; j < eccsteps; j++) {
973 /* Loop through and verify the data */
974 if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
975 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
976 goto out;
977 }
978 datidx += mtd->eccsize;
979 /* Have we a hw generator layout ? */
980 if (!hweccbytes)
981 continue;
982 if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
983 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
984 goto out;
985 }
986 oobofs += hweccbytes;
987 }
988
989 /* check, if we must compare all data or if we just have to
990 * compare the ecc bytes
991 */
992 if (oobmode) {
993 if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
994 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
995 goto out;
996 }
997 } else {
998 /* Read always, else autoincrement fails */
999 this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
1000
1001 if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
1002 int ecccnt = oobsel->eccbytes;
1003
1004 for (i = 0; i < ecccnt; i++) {
1005 int idx = oobsel->eccpos[i];
1006 if (oobdata[idx] != oob_buf[oobofs + idx] ) {
1007 DEBUG (MTD_DEBUG_LEVEL0,
1008 "%s: Failed ECC write "
1009 "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
1010 goto out;
1011 }
1012 }
1013 }
1014 }
1015 oobofs += mtd->oobsize - hweccbytes * eccsteps;
1016 page++;
1017 numpages--;
1018
1019 /* Apply delay or wait for ready/busy pin
1020 * Do this before the AUTOINCR check, so no problems
1021 * arise if a chip which does auto increment
1022 * is marked as NOAUTOINCR by the board driver.
1023 * Do this also before returning, so the chip is
1024 * ready for the next command.
1025 */
1026 if (!this->dev_ready)
1027 udelay (this->chip_delay);
1028 else
1029 nand_wait_ready(mtd);
1030
1031 /* All done, return happy */
1032 if (!numpages)
1033 return 0;
1034
1035
1036 /* Check, if the chip supports auto page increment */
1037 if (!NAND_CANAUTOINCR(this))
1038 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1039 }
1040 /*
1041 * Terminate the read command. We come here in case of an error
1042 * So we must issue a reset command.
1043 */
1044 out:
1045 this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
1046 return res;
1047 }
1048 #endif
1049
1050 /**
1051 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1052 * @mtd: MTD device structure
1053 * @from: offset to read from
1054 * @len: number of bytes to read
1055 * @retlen: pointer to variable to store the number of read bytes
1056 * @buf: the databuffer to put data
1057 *
1058 * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
1059 * and flags = 0xff
1060 */
1061 static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1062 {
1063 return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
1064 }
1065
1066
1067 /**
1068 * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
1069 * @mtd: MTD device structure
1070 * @from: offset to read from
1071 * @len: number of bytes to read
1072 * @retlen: pointer to variable to store the number of read bytes
1073 * @buf: the databuffer to put data
1074 * @oob_buf: filesystem supplied oob data buffer
1075 * @oobsel: oob selection structure
1076 *
1077 * This function simply calls nand_do_read_ecc with flags = 0xff
1078 */
1079 static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1080 size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
1081 {
1082 /* use userspace supplied oobinfo, if zero */
1083 if (oobsel == NULL)
1084 oobsel = &mtd->oobinfo;
1085 return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
1086 }
1087
1088
1089 /**
1090 * nand_do_read_ecc - [MTD Interface] Read data with ECC
1091 * @mtd: MTD device structure
1092 * @from: offset to read from
1093 * @len: number of bytes to read
1094 * @retlen: pointer to variable to store the number of read bytes
1095 * @buf: the databuffer to put data
1096 * @oob_buf: filesystem supplied oob data buffer (can be NULL)
1097 * @oobsel: oob selection structure
1098 * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
1099 * and how many corrected error bits are acceptable:
1100 * bits 0..7 - number of tolerable errors
1101 * bit 8 - 0 == do not get/release chip, 1 == get/release chip
1102 *
1103 * NAND read with ECC
1104 */
1105 int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1106 size_t * retlen, u_char * buf, u_char * oob_buf,
1107 struct nand_oobinfo *oobsel, int flags)
1108 {
1109
1110 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
1111 int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
1112 struct nand_chip *this = mtd->priv;
1113 u_char *data_poi, *oob_data = oob_buf;
1114 u_char ecc_calc[32];
1115 u_char ecc_code[32];
1116 int eccmode, eccsteps;
1117 int *oob_config, datidx;
1118 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1119 int eccbytes;
1120 int compareecc = 1;
1121 int oobreadlen;
1122
1123
1124 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1125
1126 /* Do not allow reads past end of device */
1127 if ((from + len) > mtd->size) {
1128 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
1129 *retlen = 0;
1130 return -EINVAL;
1131 }
1132
1133 /* Grab the lock and see if the device is available */
1134 if (flags & NAND_GET_DEVICE)
1135 nand_get_device (this, mtd, FL_READING);
1136
1137 /* Autoplace of oob data ? Use the default placement scheme */
1138 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1139 oobsel = this->autooob;
1140
1141 eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
1142 oob_config = oobsel->eccpos;
1143
1144 /* Select the NAND device */
1145 chipnr = (int)(from >> this->chip_shift);
1146 this->select_chip(mtd, chipnr);
1147
1148 /* First we calculate the starting page */
1149 realpage = (int) (from >> this->page_shift);
1150 page = realpage & this->pagemask;
1151
1152 /* Get raw starting column */
1153 col = from & (mtd->oobblock - 1);
1154
1155 end = mtd->oobblock;
1156 ecc = this->eccsize;
1157 eccbytes = this->eccbytes;
1158
1159 if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
1160 compareecc = 0;
1161
1162 oobreadlen = mtd->oobsize;
1163 if (this->options & NAND_HWECC_SYNDROME)
1164 oobreadlen -= oobsel->eccbytes;
1165
1166 /* Loop until all data read */
1167 while (read < len) {
1168
1169 int aligned = (!col && (len - read) >= end);
1170 /*
1171 * If the read is not page aligned, we have to read into data buffer
1172 * due to ecc, else we read into return buffer direct
1173 */
1174 if (aligned)
1175 data_poi = &buf[read];
1176 else
1177 data_poi = this->data_buf;
1178
1179 /* Check, if we have this page in the buffer
1180 *
1181 * FIXME: Make it work when we must provide oob data too,
1182 * check the usage of data_buf oob field
1183 */
1184 if (realpage == this->pagebuf && !oob_buf) {
1185 /* aligned read ? */
1186 if (aligned)
1187 memcpy (data_poi, this->data_buf, end);
1188 goto readdata;
1189 }
1190
1191 /* Check, if we must send the read command */
1192 if (sndcmd) {
1193 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1194 sndcmd = 0;
1195 }
1196
1197 /* get oob area, if we have no oob buffer from fs-driver */
1198 if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
1199 oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
1200 oob_data = &this->data_buf[end];
1201
1202 eccsteps = this->eccsteps;
1203
1204 switch (eccmode) {
1205 case NAND_ECC_NONE: { /* No ECC, Read in a page */
1206 static unsigned long lastwhinge = 0;
1207 if ((lastwhinge / HZ) != (jiffies / HZ)) {
1208 printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
1209 lastwhinge = jiffies;
1210 }
1211 this->read_buf(mtd, data_poi, end);
1212 break;
1213 }
1214
1215 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
1216 this->read_buf(mtd, data_poi, end);
1217 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
1218 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1219 break;
1220
1221 default:
1222 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
1223 this->enable_hwecc(mtd, NAND_ECC_READ);
1224 this->read_buf(mtd, &data_poi[datidx], ecc);
1225
1226 /* HW ecc with syndrome calculation must read the
1227 * syndrome from flash immidiately after the data */
1228 if (!compareecc) {
1229 /* Some hw ecc generators need to know when the
1230 * syndrome is read from flash */
1231 this->enable_hwecc(mtd, NAND_ECC_READSYN);
1232 this->read_buf(mtd, &oob_data[i], eccbytes);
1233 /* We calc error correction directly, it checks the hw
1234 * generator for an error, reads back the syndrome and
1235 * does the error correction on the fly */
1236 ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
1237 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1238 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
1239 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
1240 ecc_failed++;
1241 }
1242 } else {
1243 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1244 }
1245 }
1246 break;
1247 }
1248
1249 /* read oobdata */
1250 this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
1251
1252 /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
1253 if (!compareecc)
1254 goto readoob;
1255
1256 /* Pick the ECC bytes out of the oob data */
1257 for (j = 0; j < oobsel->eccbytes; j++)
1258 ecc_code[j] = oob_data[oob_config[j]];
1259
1260 /* correct data, if neccecary */
1261 for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
1262 ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
1263
1264 /* Get next chunk of ecc bytes */
1265 j += eccbytes;
1266
1267 /* Check, if we have a fs supplied oob-buffer,
1268 * This is the legacy mode. Used by YAFFS1
1269 * Should go away some day
1270 */
1271 if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
1272 int *p = (int *)(&oob_data[mtd->oobsize]);
1273 p[i] = ecc_status;
1274 }
1275
1276 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1277 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
1278 ecc_failed++;
1279 }
1280 }
1281
1282 readoob:
1283 /* check, if we have a fs supplied oob-buffer */
1284 if (oob_buf) {
1285 /* without autoplace. Legacy mode used by YAFFS1 */
1286 switch(oobsel->useecc) {
1287 case MTD_NANDECC_AUTOPLACE:
1288 case MTD_NANDECC_AUTOPL_USR:
1289 /* Walk through the autoplace chunks */
1290 for (i = 0; oobsel->oobfree[i][1]; i++) {
1291 int from = oobsel->oobfree[i][0];
1292 int num = oobsel->oobfree[i][1];
1293 memcpy(&oob_buf[oob], &oob_data[from], num);
1294 oob += num;
1295 }
1296 break;
1297 case MTD_NANDECC_PLACE:
1298 /* YAFFS1 legacy mode */
1299 oob_data += this->eccsteps * sizeof (int);
1300 default:
1301 oob_data += mtd->oobsize;
1302 }
1303 }
1304 readdata:
1305 /* Partial page read, transfer data into fs buffer */
1306 if (!aligned) {
1307 for (j = col; j < end && read < len; j++)
1308 buf[read++] = data_poi[j];
1309 this->pagebuf = realpage;
1310 } else
1311 read += mtd->oobblock;
1312
1313 /* Apply delay or wait for ready/busy pin
1314 * Do this before the AUTOINCR check, so no problems
1315 * arise if a chip which does auto increment
1316 * is marked as NOAUTOINCR by the board driver.
1317 */
1318 if (!this->dev_ready)
1319 udelay (this->chip_delay);
1320 else
1321 nand_wait_ready(mtd);
1322
1323 if (read == len)
1324 break;
1325
1326 /* For subsequent reads align to page boundary. */
1327 col = 0;
1328 /* Increment page address */
1329 realpage++;
1330
1331 page = realpage & this->pagemask;
1332 /* Check, if we cross a chip boundary */
1333 if (!page) {
1334 chipnr++;
1335 this->select_chip(mtd, -1);
1336 this->select_chip(mtd, chipnr);
1337 }
1338 /* Check, if the chip supports auto page increment
1339 * or if we have hit a block boundary.
1340 */
1341 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1342 sndcmd = 1;
1343 }
1344
1345 /* Deselect and wake up anyone waiting on the device */
1346 if (flags & NAND_GET_DEVICE)
1347 nand_release_device(mtd);
1348
1349 /*
1350 * Return success, if no ECC failures, else -EBADMSG
1351 * fs driver will take care of that, because
1352 * retlen == desired len and result == -EBADMSG
1353 */
1354 *retlen = read;
1355 return ecc_failed ? -EBADMSG : 0;
1356 }
1357
1358 /**
1359 * nand_read_oob - [MTD Interface] NAND read out-of-band
1360 * @mtd: MTD device structure
1361 * @from: offset to read from
1362 * @len: number of bytes to read
1363 * @retlen: pointer to variable to store the number of read bytes
1364 * @buf: the databuffer to put data
1365 *
1366 * NAND read out-of-band data from the spare area
1367 */
1368 static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1369 {
1370 int i, col, page, chipnr;
1371 struct nand_chip *this = mtd->priv;
1372 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1373
1374 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1375
1376 /* Shift to get page */
1377 page = (int)(from >> this->page_shift);
1378 chipnr = (int)(from >> this->chip_shift);
1379
1380 /* Mask to get column */
1381 col = from & (mtd->oobsize - 1);
1382
1383 /* Initialize return length value */
1384 *retlen = 0;
1385
1386 /* Do not allow reads past end of device */
1387 if ((from + len) > mtd->size) {
1388 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
1389 *retlen = 0;
1390 return -EINVAL;
1391 }
1392
1393 /* Grab the lock and see if the device is available */
1394 nand_get_device (this, mtd , FL_READING);
1395
1396 /* Select the NAND device */
1397 this->select_chip(mtd, chipnr);
1398
1399 /* Send the read command */
1400 this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
1401 /*
1402 * Read the data, if we read more than one page
1403 * oob data, let the device transfer the data !
1404 */
1405 i = 0;
1406 while (i < len) {
1407 int thislen = mtd->oobsize - col;
1408 thislen = min_t(int, thislen, len);
1409 this->read_buf(mtd, &buf[i], thislen);
1410 i += thislen;
1411
1412 /* Apply delay or wait for ready/busy pin
1413 * Do this before the AUTOINCR check, so no problems
1414 * arise if a chip which does auto increment
1415 * is marked as NOAUTOINCR by the board driver.
1416 */
1417 if (!this->dev_ready)
1418 udelay (this->chip_delay);
1419 else
1420 nand_wait_ready(mtd);
1421
1422 /* Read more ? */
1423 if (i < len) {
1424 page++;
1425 col = 0;
1426
1427 /* Check, if we cross a chip boundary */
1428 if (!(page & this->pagemask)) {
1429 chipnr++;
1430 this->select_chip(mtd, -1);
1431 this->select_chip(mtd, chipnr);
1432 }
1433
1434 /* Check, if the chip supports auto page increment
1435 * or if we have hit a block boundary.
1436 */
1437 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
1438 /* For subsequent page reads set offset to 0 */
1439 this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
1440 }
1441 }
1442 }
1443
1444 /* Deselect and wake up anyone waiting on the device */
1445 nand_release_device(mtd);
1446
1447 /* Return happy */
1448 *retlen = len;
1449 return 0;
1450 }
1451
1452 /**
1453 * nand_read_raw - [GENERIC] Read raw data including oob into buffer
1454 * @mtd: MTD device structure
1455 * @buf: temporary buffer
1456 * @from: offset to read from
1457 * @len: number of bytes to read
1458 * @ooblen: number of oob data bytes to read
1459 *
1460 * Read raw data including oob into buffer
1461 */
1462 int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
1463 {
1464 struct nand_chip *this = mtd->priv;
1465 int page = (int) (from >> this->page_shift);
1466 int chip = (int) (from >> this->chip_shift);
1467 int sndcmd = 1;
1468 int cnt = 0;
1469 int pagesize = mtd->oobblock + mtd->oobsize;
1470 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1471
1472 /* Do not allow reads past end of device */
1473 if ((from + len) > mtd->size) {
1474 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
1475 return -EINVAL;
1476 }
1477
1478 /* Grab the lock and see if the device is available */
1479 nand_get_device (this, mtd , FL_READING);
1480
1481 this->select_chip (mtd, chip);
1482
1483 /* Add requested oob length */
1484 len += ooblen;
1485
1486 while (len) {
1487 if (sndcmd)
1488 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
1489 sndcmd = 0;
1490
1491 this->read_buf (mtd, &buf[cnt], pagesize);
1492
1493 len -= pagesize;
1494 cnt += pagesize;
1495 page++;
1496
1497 if (!this->dev_ready)
1498 udelay (this->chip_delay);
1499 else
1500 nand_wait_ready(mtd);
1501
1502 /* Check, if the chip supports auto page increment */
1503 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1504 sndcmd = 1;
1505 }
1506
1507 /* Deselect and wake up anyone waiting on the device */
1508 nand_release_device(mtd);
1509 return 0;
1510 }
1511
1512
1513 /**
1514 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
1515 * @mtd: MTD device structure
1516 * @fsbuf: buffer given by fs driver
1517 * @oobsel: out of band selection structre
1518 * @autoplace: 1 = place given buffer into the oob bytes
1519 * @numpages: number of pages to prepare
1520 *
1521 * Return:
1522 * 1. Filesystem buffer available and autoplacement is off,
1523 * return filesystem buffer
1524 * 2. No filesystem buffer or autoplace is off, return internal
1525 * buffer
1526 * 3. Filesystem buffer is given and autoplace selected
1527 * put data from fs buffer into internal buffer and
1528 * retrun internal buffer
1529 *
1530 * Note: The internal buffer is filled with 0xff. This must
1531 * be done only once, when no autoplacement happens
1532 * Autoplacement sets the buffer dirty flag, which
1533 * forces the 0xff fill before using the buffer again.
1534 *
1535 */
1536 static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
1537 int autoplace, int numpages)
1538 {
1539 struct nand_chip *this = mtd->priv;
1540 int i, len, ofs;
1541
1542 /* Zero copy fs supplied buffer */
1543 if (fsbuf && !autoplace)
1544 return fsbuf;
1545
1546 /* Check, if the buffer must be filled with ff again */
1547 if (this->oobdirty) {
1548 memset (this->oob_buf, 0xff,
1549 mtd->oobsize << (this->phys_erase_shift - this->page_shift));
1550 this->oobdirty = 0;
1551 }
1552
1553 /* If we have no autoplacement or no fs buffer use the internal one */
1554 if (!autoplace || !fsbuf)
1555 return this->oob_buf;
1556
1557 /* Walk through the pages and place the data */
1558 this->oobdirty = 1;
1559 ofs = 0;
1560 while (numpages--) {
1561 for (i = 0, len = 0; len < mtd->oobavail; i++) {
1562 int to = ofs + oobsel->oobfree[i][0];
1563 int num = oobsel->oobfree[i][1];
1564 memcpy (&this->oob_buf[to], fsbuf, num);
1565 len += num;
1566 fsbuf += num;
1567 }
1568 ofs += mtd->oobavail;
1569 }
1570 return this->oob_buf;
1571 }
1572
1573 #define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
1574
1575 /**
1576 * nand_write - [MTD Interface] compability function for nand_write_ecc
1577 * @mtd: MTD device structure
1578 * @to: offset to write to
1579 * @len: number of bytes to write
1580 * @retlen: pointer to variable to store the number of written bytes
1581 * @buf: the data to write
1582 *
1583 * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
1584 *
1585 */
1586 static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1587 {
1588 return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
1589 }
1590
1591 /**
1592 * nand_write_ecc - [MTD Interface] NAND write with ECC
1593 * @mtd: MTD device structure
1594 * @to: offset to write to
1595 * @len: number of bytes to write
1596 * @retlen: pointer to variable to store the number of written bytes
1597 * @buf: the data to write
1598 * @eccbuf: filesystem supplied oob data buffer
1599 * @oobsel: oob selection structure
1600 *
1601 * NAND write with ECC
1602 */
1603 static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1604 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
1605 {
1606 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
1607 int autoplace = 0, numpages, totalpages;
1608 struct nand_chip *this = mtd->priv;
1609 u_char *oobbuf, *bufstart;
1610 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1611
1612 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1613
1614 /* Initialize retlen, in case of early exit */
1615 *retlen = 0;
1616
1617 /* Do not allow write past end of device */
1618 if ((to + len) > mtd->size) {
1619 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
1620 return -EINVAL;
1621 }
1622
1623 /* reject writes, which are not page aligned */
1624 if (NOTALIGNED (to) || NOTALIGNED(len)) {
1625 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1626 return -EINVAL;
1627 }
1628
1629 /* Grab the lock and see if the device is available */
1630 nand_get_device (this, mtd, FL_WRITING);
1631
1632 /* Calculate chipnr */
1633 chipnr = (int)(to >> this->chip_shift);
1634 /* Select the NAND device */
1635 this->select_chip(mtd, chipnr);
1636
1637 /* Check, if it is write protected */
1638 if (nand_check_wp(mtd))
1639 goto out;
1640
1641 /* if oobsel is NULL, use chip defaults */
1642 if (oobsel == NULL)
1643 oobsel = &mtd->oobinfo;
1644
1645 /* Autoplace of oob data ? Use the default placement scheme */
1646 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1647 oobsel = this->autooob;
1648 autoplace = 1;
1649 }
1650 if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
1651 autoplace = 1;
1652
1653 /* Setup variables and oob buffer */
1654 totalpages = len >> this->page_shift;
1655 page = (int) (to >> this->page_shift);
1656 /* Invalidate the page cache, if we write to the cached page */
1657 if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
1658 this->pagebuf = -1;
1659
1660 /* Set it relative to chip */
1661 page &= this->pagemask;
1662 startpage = page;
1663 /* Calc number of pages we can write in one go */
1664 numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
1665 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
1666 bufstart = (u_char *)buf;
1667
1668 /* Loop until all data is written */
1669 while (written < len) {
1670
1671 this->data_poi = (u_char*) &buf[written];
1672 /* Write one page. If this is the last page to write
1673 * or the last page in this block, then use the
1674 * real pageprogram command, else select cached programming
1675 * if supported by the chip.
1676 */
1677 ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
1678 if (ret) {
1679 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
1680 goto out;
1681 }
1682 /* Next oob page */
1683 oob += mtd->oobsize;
1684 /* Update written bytes count */
1685 written += mtd->oobblock;
1686 if (written == len)
1687 goto cmp;
1688
1689 /* Increment page address */
1690 page++;
1691
1692 /* Have we hit a block boundary ? Then we have to verify and
1693 * if verify is ok, we have to setup the oob buffer for
1694 * the next pages.
1695 */
1696 if (!(page & (ppblock - 1))){
1697 int ofs;
1698 this->data_poi = bufstart;
1699 ret = nand_verify_pages (mtd, this, startpage,
1700 page - startpage,
1701 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1702 if (ret) {
1703 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1704 goto out;
1705 }
1706 *retlen = written;
1707
1708 ofs = autoplace ? mtd->oobavail : mtd->oobsize;
1709 if (eccbuf)
1710 eccbuf += (page - startpage) * ofs;
1711 totalpages -= page - startpage;
1712 numpages = min (totalpages, ppblock);
1713 page &= this->pagemask;
1714 startpage = page;
1715 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
1716 autoplace, numpages);
1717 /* Check, if we cross a chip boundary */
1718 if (!page) {
1719 chipnr++;
1720 this->select_chip(mtd, -1);
1721 this->select_chip(mtd, chipnr);
1722 }
1723 }
1724 }
1725 /* Verify the remaining pages */
1726 cmp:
1727 this->data_poi = bufstart;
1728 ret = nand_verify_pages (mtd, this, startpage, totalpages,
1729 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1730 if (!ret)
1731 *retlen = written;
1732 else
1733 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1734
1735 out:
1736 /* Deselect and wake up anyone waiting on the device */
1737 nand_release_device(mtd);
1738
1739 return ret;
1740 }
1741
1742
1743 /**
1744 * nand_write_oob - [MTD Interface] NAND write out-of-band
1745 * @mtd: MTD device structure
1746 * @to: offset to write to
1747 * @len: number of bytes to write
1748 * @retlen: pointer to variable to store the number of written bytes
1749 * @buf: the data to write
1750 *
1751 * NAND write out-of-band
1752 */
1753 static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1754 {
1755 int column, page, status, ret = -EIO, chipnr;
1756 struct nand_chip *this = mtd->priv;
1757
1758 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1759
1760 /* Shift to get page */
1761 page = (int) (to >> this->page_shift);
1762 chipnr = (int) (to >> this->chip_shift);
1763
1764 /* Mask to get column */
1765 column = to & (mtd->oobsize - 1);
1766
1767 /* Initialize return length value */
1768 *retlen = 0;
1769
1770 /* Do not allow write past end of page */
1771 if ((column + len) > mtd->oobsize) {
1772 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
1773 return -EINVAL;
1774 }
1775
1776 /* Grab the lock and see if the device is available */
1777 nand_get_device (this, mtd, FL_WRITING);
1778
1779 /* Select the NAND device */
1780 this->select_chip(mtd, chipnr);
1781
1782 /* Reset the chip. Some chips (like the Toshiba TC5832DC found
1783 in one of my DiskOnChip 2000 test units) will clear the whole
1784 data page too if we don't do this. I have no clue why, but
1785 I seem to have 'fixed' it in the doc2000 driver in
1786 August 1999. dwmw2. */
1787 this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1788
1789 /* Check, if it is write protected */
1790 if (nand_check_wp(mtd))
1791 goto out;
1792
1793 /* Invalidate the page cache, if we write to the cached page */
1794 if (page == this->pagebuf)
1795 this->pagebuf = -1;
1796
1797 if (NAND_MUST_PAD(this)) {
1798 /* Write out desired data */
1799 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
1800 /* prepad 0xff for partial programming */
1801 this->write_buf(mtd, ffchars, column);
1802 /* write data */
1803 this->write_buf(mtd, buf, len);
1804 /* postpad 0xff for partial programming */
1805 this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
1806 } else {
1807 /* Write out desired data */
1808 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
1809 /* write data */
1810 this->write_buf(mtd, buf, len);
1811 }
1812 /* Send command to program the OOB data */
1813 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
1814
1815 status = this->waitfunc (mtd, this, FL_WRITING);
1816
1817 /* See if device thinks it succeeded */
1818 if (status & NAND_STATUS_FAIL) {
1819 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
1820 ret = -EIO;
1821 goto out;
1822 }
1823 /* Return happy */
1824 *retlen = len;
1825
1826 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1827 /* Send command to read back the data */
1828 this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
1829
1830 if (this->verify_buf(mtd, buf, len)) {
1831 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
1832 ret = -EIO;
1833 goto out;
1834 }
1835 #endif
1836 ret = 0;
1837 out:
1838 /* Deselect and wake up anyone waiting on the device */
1839 nand_release_device(mtd);
1840
1841 return ret;
1842 }
1843
1844
1845 /**
1846 * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
1847 * @mtd: MTD device structure
1848 * @vecs: the iovectors to write
1849 * @count: number of vectors
1850 * @to: offset to write to
1851 * @retlen: pointer to variable to store the number of written bytes
1852 *
1853 * NAND write with kvec. This just calls the ecc function
1854 */
1855 static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1856 loff_t to, size_t * retlen)
1857 {
1858 return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
1859 }
1860
1861 /**
1862 * nand_writev_ecc - [MTD Interface] write with iovec with ecc
1863 * @mtd: MTD device structure
1864 * @vecs: the iovectors to write
1865 * @count: number of vectors
1866 * @to: offset to write to
1867 * @retlen: pointer to variable to store the number of written bytes
1868 * @eccbuf: filesystem supplied oob data buffer
1869 * @oobsel: oob selection structure
1870 *
1871 * NAND write with iovec with ecc
1872 */
1873 static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1874 loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
1875 {
1876 int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
1877 int oob, numpages, autoplace = 0, startpage;
1878 struct nand_chip *this = mtd->priv;
1879 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1880 u_char *oobbuf, *bufstart;
1881
1882 /* Preset written len for early exit */
1883 *retlen = 0;
1884
1885 /* Calculate total length of data */
1886 total_len = 0;
1887 for (i = 0; i < count; i++)
1888 total_len += (int) vecs[i].iov_len;
1889
1890 DEBUG (MTD_DEBUG_LEVEL3,
1891 "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
1892
1893 /* Do not allow write past end of page */
1894 if ((to + total_len) > mtd->size) {
1895 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
1896 return -EINVAL;
1897 }
1898
1899 /* reject writes, which are not page aligned */
1900 if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
1901 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1902 return -EINVAL;
1903 }
1904
1905 /* Grab the lock and see if the device is available */
1906 nand_get_device (this, mtd, FL_WRITING);
1907
1908 /* Get the current chip-nr */
1909 chipnr = (int) (to >> this->chip_shift);
1910 /* Select the NAND device */
1911 this->select_chip(mtd, chipnr);
1912
1913 /* Check, if it is write protected */
1914 if (nand_check_wp(mtd))
1915 goto out;
1916
1917 /* if oobsel is NULL, use chip defaults */
1918 if (oobsel == NULL)
1919 oobsel = &mtd->oobinfo;
1920
1921 /* Autoplace of oob data ? Use the default placement scheme */
1922 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1923 oobsel = this->autooob;
1924 autoplace = 1;
1925 }
1926 if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
1927 autoplace = 1;
1928
1929 /* Setup start page */
1930 page = (int) (to >> this->page_shift);
1931 /* Invalidate the page cache, if we write to the cached page */
1932 if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
1933 this->pagebuf = -1;
1934
1935 startpage = page & this->pagemask;
1936
1937 /* Loop until all kvec' data has been written */
1938 len = 0;
1939 while (count) {
1940 /* If the given tuple is >= pagesize then
1941 * write it out from the iov
1942 */
1943 if ((vecs->iov_len - len) >= mtd->oobblock) {
1944 /* Calc number of pages we can write
1945 * out of this iov in one go */
1946 numpages = (vecs->iov_len - len) >> this->page_shift;
1947 /* Do not cross block boundaries */
1948 numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
1949 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1950 bufstart = (u_char *)vecs->iov_base;
1951 bufstart += len;
1952 this->data_poi = bufstart;
1953 oob = 0;
1954 for (i = 1; i <= numpages; i++) {
1955 /* Write one page. If this is the last page to write
1956 * then use the real pageprogram command, else select
1957 * cached programming if supported by the chip.
1958 */
1959 ret = nand_write_page (mtd, this, page & this->pagemask,
1960 &oobbuf[oob], oobsel, i != numpages);
1961 if (ret)
1962 goto out;
1963 this->data_poi += mtd->oobblock;
1964 len += mtd->oobblock;
1965 oob += mtd->oobsize;
1966 page++;
1967 }
1968 /* Check, if we have to switch to the next tuple */
1969 if (len >= (int) vecs->iov_len) {
1970 vecs++;
1971 len = 0;
1972 count--;
1973 }
1974 } else {
1975 /* We must use the internal buffer, read data out of each
1976 * tuple until we have a full page to write
1977 */
1978 int cnt = 0;
1979 while (cnt < mtd->oobblock) {
1980 if (vecs->iov_base != NULL && vecs->iov_len)
1981 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
1982 /* Check, if we have to switch to the next tuple */
1983 if (len >= (int) vecs->iov_len) {
1984 vecs++;
1985 len = 0;
1986 count--;
1987 }
1988 }
1989 this->pagebuf = page;
1990 this->data_poi = this->data_buf;
1991 bufstart = this->data_poi;
1992 numpages = 1;
1993 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1994 ret = nand_write_page (mtd, this, page & this->pagemask,
1995 oobbuf, oobsel, 0);
1996 if (ret)
1997 goto out;
1998 page++;
1999 }
2000
2001 this->data_poi = bufstart;
2002 ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
2003 if (ret)
2004 goto out;
2005
2006 written += mtd->oobblock * numpages;
2007 /* All done ? */
2008 if (!count)
2009 break;
2010
2011 startpage = page & this->pagemask;
2012 /* Check, if we cross a chip boundary */
2013 if (!startpage) {
2014 chipnr++;
2015 this->select_chip(mtd, -1);
2016 this->select_chip(mtd, chipnr);
2017 }
2018 }
2019 ret = 0;
2020 out:
2021 /* Deselect and wake up anyone waiting on the device */
2022 nand_release_device(mtd);
2023
2024 *retlen = written;
2025 return ret;
2026 }
2027
2028 /**
2029 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2030 * @mtd: MTD device structure
2031 * @page: the page address of the block which will be erased
2032 *
2033 * Standard erase command for NAND chips
2034 */
2035 static void single_erase_cmd (struct mtd_info *mtd, int page)
2036 {
2037 struct nand_chip *this = mtd->priv;
2038 /* Send commands to erase a block */
2039 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
2040 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
2041 }
2042
2043 /**
2044 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2045 * @mtd: MTD device structure
2046 * @page: the page address of the block which will be erased
2047 *
2048 * AND multi block erase command function
2049 * Erase 4 consecutive blocks
2050 */
2051 static void multi_erase_cmd (struct mtd_info *mtd, int page)
2052 {
2053 struct nand_chip *this = mtd->priv;
2054 /* Send commands to erase a block */
2055 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2056 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2057 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2058 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
2059 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
2060 }
2061
2062 /**
2063 * nand_erase - [MTD Interface] erase block(s)
2064 * @mtd: MTD device structure
2065 * @instr: erase instruction
2066 *
2067 * Erase one ore more blocks
2068 */
2069 static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
2070 {
2071 return nand_erase_nand (mtd, instr, 0);
2072 }
2073
2074 #define BBT_PAGE_MASK 0xffffff3f
2075 /**
2076 * nand_erase_intern - [NAND Interface] erase block(s)
2077 * @mtd: MTD device structure
2078 * @instr: erase instruction
2079 * @allowbbt: allow erasing the bbt area
2080 *
2081 * Erase one ore more blocks
2082 */
2083 int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
2084 {
2085 int page, len, status, pages_per_block, ret, chipnr;
2086 struct nand_chip *this = mtd->priv;
2087 int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */
2088 unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */
2089 /* It is used to see if the current page is in the same */
2090 /* 256 block group and the same bank as the bbt. */
2091
2092 DEBUG (MTD_DEBUG_LEVEL3,
2093 "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
2094
2095 /* Start address must align on block boundary */
2096 if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
2097 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
2098 return -EINVAL;
2099 }
2100
2101 /* Length must align on block boundary */
2102 if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
2103 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
2104 return -EINVAL;
2105 }
2106
2107 /* Do not allow erase past end of device */
2108 if ((instr->len + instr->addr) > mtd->size) {
2109 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
2110 return -EINVAL;
2111 }
2112
2113 instr->fail_addr = 0xffffffff;
2114
2115 /* Grab the lock and see if the device is available */
2116 nand_get_device (this, mtd, FL_ERASING);
2117
2118 /* Shift to get first page */
2119 page = (int) (instr->addr >> this->page_shift);
2120 chipnr = (int) (instr->addr >> this->chip_shift);
2121
2122 /* Calculate pages in each block */
2123 pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
2124
2125 /* Select the NAND device */
2126 this->select_chip(mtd, chipnr);
2127
2128 /* Check the WP bit */
2129 /* Check, if it is write protected */
2130 if (nand_check_wp(mtd)) {
2131 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
2132 instr->state = MTD_ERASE_FAILED;
2133 goto erase_exit;
2134 }
2135
2136 /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */
2137 if (this->options & BBT_AUTO_REFRESH) {
2138 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2139 } else {
2140 bbt_masked_page = 0xffffffff; /* should not match anything */
2141 }
2142
2143 /* Loop through the pages */
2144 len = instr->len;
2145
2146 instr->state = MTD_ERASING;
2147
2148 while (len) {
2149 /* Check if we have a bad block, we do not erase bad blocks ! */
2150 if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
2151 printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
2152 instr->state = MTD_ERASE_FAILED;
2153 goto erase_exit;
2154 }
2155
2156 /* Invalidate the page cache, if we erase the block which contains
2157 the current cached page */
2158 if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
2159 this->pagebuf = -1;
2160
2161 this->erase_cmd (mtd, page & this->pagemask);
2162
2163 status = this->waitfunc (mtd, this, FL_ERASING);
2164
2165 /* See if operation failed and additional status checks are available */
2166 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
2167 status = this->errstat(mtd, this, FL_ERASING, status, page);
2168 }
2169
2170 /* See if block erase succeeded */
2171 if (status & NAND_STATUS_FAIL) {
2172 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
2173 instr->state = MTD_ERASE_FAILED;
2174 instr->fail_addr = (page << this->page_shift);
2175 goto erase_exit;
2176 }
2177
2178 /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
2179 if (this->options & BBT_AUTO_REFRESH) {
2180 if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
2181 (page != this->bbt_td->pages[chipnr])) {
2182 rewrite_bbt[chipnr] = (page << this->page_shift);
2183 }
2184 }
2185
2186 /* Increment page address and decrement length */
2187 len -= (1 << this->phys_erase_shift);
2188 page += pages_per_block;
2189
2190 /* Check, if we cross a chip boundary */
2191 if (len && !(page & this->pagemask)) {
2192 chipnr++;
2193 this->select_chip(mtd, -1);
2194 this->select_chip(mtd, chipnr);
2195
2196 /* if BBT requires refresh and BBT-PERCHIP,
2197 * set the BBT page mask to see if this BBT should be rewritten */
2198 if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
2199 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2200 }
2201
2202 }
2203 }
2204 instr->state = MTD_ERASE_DONE;
2205
2206 erase_exit:
2207
2208 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
2209 /* Do call back function */
2210 if (!ret)
2211 mtd_erase_callback(instr);
2212
2213 /* Deselect and wake up anyone waiting on the device */
2214 nand_release_device(mtd);
2215
2216 /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */
2217 if ((this->options & BBT_AUTO_REFRESH) && (!ret)) {
2218 for (chipnr = 0; chipnr < this->numchips; chipnr++) {
2219 if (rewrite_bbt[chipnr]) {
2220 /* update the BBT for chip */
2221 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
2222 chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
2223 nand_update_bbt (mtd, rewrite_bbt[chipnr]);
2224 }
2225 }
2226 }
2227
2228 /* Return more or less happy */
2229 return ret;
2230 }
2231
2232 /**
2233 * nand_sync - [MTD Interface] sync
2234 * @mtd: MTD device structure
2235 *
2236 * Sync is actually a wait for chip ready function
2237 */
2238 static void nand_sync (struct mtd_info *mtd)
2239 {
2240 struct nand_chip *this = mtd->priv;
2241
2242 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
2243
2244 /* Grab the lock and see if the device is available */
2245 nand_get_device (this, mtd, FL_SYNCING);
2246 /* Release it and go back */
2247 nand_release_device (mtd);
2248 }
2249
2250
2251 /**
2252 * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2253 * @mtd: MTD device structure
2254 * @ofs: offset relative to mtd start
2255 */
2256 static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
2257 {
2258 /* Check for invalid offset */
2259 if (ofs > mtd->size)
2260 return -EINVAL;
2261
2262 return nand_block_checkbad (mtd, ofs, 1, 0);
2263 }
2264
2265 /**
2266 * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2267 * @mtd: MTD device structure
2268 * @ofs: offset relative to mtd start
2269 */
2270 static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
2271 {
2272 struct nand_chip *this = mtd->priv;
2273 int ret;
2274
2275 if ((ret = nand_block_isbad(mtd, ofs))) {
2276 /* If it was bad already, return success and do nothing. */
2277 if (ret > 0)
2278 return 0;
2279 return ret;
2280 }
2281
2282 return this->block_markbad(mtd, ofs);
2283 }
2284
2285 /**
2286 * nand_scan - [NAND Interface] Scan for the NAND device
2287 * @mtd: MTD device structure
2288 * @maxchips: Number of chips to scan for
2289 *
2290 * This fills out all the not initialized function pointers
2291 * with the defaults.
2292 * The flash ID is read and the mtd/chip structures are
2293 * filled with the appropriate values. Buffers are allocated if
2294 * they are not provided by the board driver
2295 *
2296 */
2297 int nand_scan (struct mtd_info *mtd, int maxchips)
2298 {
2299 int i, nand_maf_id, nand_dev_id, busw, maf_id;
2300 struct nand_chip *this = mtd->priv;
2301
2302 /* Get buswidth to select the correct functions*/
2303 busw = this->options & NAND_BUSWIDTH_16;
2304
2305 /* check for proper chip_delay setup, set 20us if not */
2306 if (!this->chip_delay)
2307 this->chip_delay = 20;
2308
2309 /* check, if a user supplied command function given */
2310 if (this->cmdfunc == NULL)
2311 this->cmdfunc = nand_command;
2312
2313 /* check, if a user supplied wait function given */
2314 if (this->waitfunc == NULL)
2315 this->waitfunc = nand_wait;
2316
2317 if (!this->select_chip)
2318 this->select_chip = nand_select_chip;
2319 if (!this->write_byte)
2320 this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
2321 if (!this->read_byte)
2322 this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2323 if (!this->write_word)
2324 this->write_word = nand_write_word;
2325 if (!this->read_word)
2326 this->read_word = nand_read_word;
2327 if (!this->block_bad)
2328 this->block_bad = nand_block_bad;
2329 if (!this->block_markbad)
2330 this->block_markbad = nand_default_block_markbad;
2331 if (!this->write_buf)
2332 this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2333 if (!this->read_buf)
2334 this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2335 if (!this->verify_buf)
2336 this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2337 if (!this->scan_bbt)
2338 this->scan_bbt = nand_default_bbt;
2339
2340 /* Select the device */
2341 this->select_chip(mtd, 0);
2342
2343 /* Send the command for reading device ID */
2344 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2345
2346 /* Read manufacturer and device IDs */
2347 nand_maf_id = this->read_byte(mtd);
2348 nand_dev_id = this->read_byte(mtd);
2349
2350 /* Print and store flash device information */
2351 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
2352
2353 if (nand_dev_id != nand_flash_ids[i].id)
2354 continue;
2355
2356 if (!mtd->name) mtd->name = nand_flash_ids[i].name;
2357 this->chipsize = nand_flash_ids[i].chipsize << 20;
2358
2359 /* New devices have all the information in additional id bytes */
2360 if (!nand_flash_ids[i].pagesize) {
2361 int extid;
2362 /* The 3rd id byte contains non relevant data ATM */
2363 extid = this->read_byte(mtd);
2364 /* The 4th id byte is the important one */
2365 extid = this->read_byte(mtd);
2366 /* Calc pagesize */
2367 mtd->oobblock = 1024 << (extid & 0x3);
2368 extid >>= 2;
2369 /* Calc oobsize */
2370 mtd->oobsize = (8 << (extid & 0x03)) * (mtd->oobblock / 512);
2371 extid >>= 2;
2372 /* Calc blocksize. Blocksize is multiples of 64KiB */
2373 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2374 extid >>= 2;
2375 /* Get buswidth information */
2376 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2377
2378 } else {
2379 /* Old devices have this data hardcoded in the
2380 * device id table */
2381 mtd->erasesize = nand_flash_ids[i].erasesize;
2382 mtd->oobblock = nand_flash_ids[i].pagesize;
2383 mtd->oobsize = mtd->oobblock / 32;
2384 busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
2385 }
2386
2387 /* Try to identify manufacturer */
2388 for (maf_id = 0; nand_manuf_ids[maf_id].id != 0x0; maf_id++) {
2389 if (nand_manuf_ids[maf_id].id == nand_maf_id)
2390 break;
2391 }
2392
2393 /* Check, if buswidth is correct. Hardware drivers should set
2394 * this correct ! */
2395 if (busw != (this->options & NAND_BUSWIDTH_16)) {
2396 printk (KERN_INFO "NAND device: Manufacturer ID:"
2397 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2398 nand_manuf_ids[maf_id].name , mtd->name);
2399 printk (KERN_WARNING
2400 "NAND bus width %d instead %d bit\n",
2401 (this->options & NAND_BUSWIDTH_16) ? 16 : 8,
2402 busw ? 16 : 8);
2403 this->select_chip(mtd, -1);
2404 return 1;
2405 }
2406
2407 /* Calculate the address shift from the page size */
2408 this->page_shift = ffs(mtd->oobblock) - 1;
2409 this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
2410 this->chip_shift = ffs(this->chipsize) - 1;
2411
2412 /* Set the bad block position */
2413 this->badblockpos = mtd->oobblock > 512 ?
2414 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2415
2416 /* Get chip options, preserve non chip based options */
2417 this->options &= ~NAND_CHIPOPTIONS_MSK;
2418 this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
2419 /* Set this as a default. Board drivers can override it, if neccecary */
2420 this->options |= NAND_NO_AUTOINCR;
2421 /* Check if this is a not a samsung device. Do not clear the options
2422 * for chips which are not having an extended id.
2423 */
2424 if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
2425 this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2426
2427 /* Check for AND chips with 4 page planes */
2428 if (this->options & NAND_4PAGE_ARRAY)
2429 this->erase_cmd = multi_erase_cmd;
2430 else
2431 this->erase_cmd = single_erase_cmd;
2432
2433 /* Do not replace user supplied command function ! */
2434 if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
2435 this->cmdfunc = nand_command_lp;
2436
2437 printk (KERN_INFO "NAND device: Manufacturer ID:"
2438 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2439 nand_manuf_ids[maf_id].name , nand_flash_ids[i].name);
2440 break;
2441 }
2442
2443 if (!nand_flash_ids[i].name) {
2444 printk (KERN_WARNING "No NAND device found!!!\n");
2445 this->select_chip(mtd, -1);
2446 return 1;
2447 }
2448
2449 for (i=1; i < maxchips; i++) {
2450 this->select_chip(mtd, i);
2451
2452 /* Send the command for reading device ID */
2453 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2454
2455 /* Read manufacturer and device IDs */
2456 if (nand_maf_id != this->read_byte(mtd) ||
2457 nand_dev_id != this->read_byte(mtd))
2458 break;
2459 }
2460 if (i > 1)
2461 printk(KERN_INFO "%d NAND chips detected\n", i);
2462
2463 /* Allocate buffers, if neccecary */
2464 if (!this->oob_buf) {
2465 size_t len;
2466 len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
2467 this->oob_buf = kmalloc (len, GFP_KERNEL);
2468 if (!this->oob_buf) {
2469 printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
2470 return -ENOMEM;
2471 }
2472 this->options |= NAND_OOBBUF_ALLOC;
2473 }
2474
2475 if (!this->data_buf) {
2476 size_t len;
2477 len = mtd->oobblock + mtd->oobsize;
2478 this->data_buf = kmalloc (len, GFP_KERNEL);
2479 if (!this->data_buf) {
2480 if (this->options & NAND_OOBBUF_ALLOC)
2481 kfree (this->oob_buf);
2482 printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
2483 return -ENOMEM;
2484 }
2485 this->options |= NAND_DATABUF_ALLOC;
2486 }
2487
2488 /* Store the number of chips and calc total size for mtd */
2489 this->numchips = i;
2490 mtd->size = i * this->chipsize;
2491 /* Convert chipsize to number of pages per chip -1. */
2492 this->pagemask = (this->chipsize >> this->page_shift) - 1;
2493 /* Preset the internal oob buffer */
2494 memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
2495
2496 /* If no default placement scheme is given, select an
2497 * appropriate one */
2498 if (!this->autooob) {
2499 /* Select the appropriate default oob placement scheme for
2500 * placement agnostic filesystems */
2501 switch (mtd->oobsize) {
2502 case 8:
2503 this->autooob = &nand_oob_8;
2504 break;
2505 case 16:
2506 this->autooob = &nand_oob_16;
2507 break;
2508 case 64:
2509 this->autooob = &nand_oob_64;
2510 break;
2511 default:
2512 printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
2513 mtd->oobsize);
2514 BUG();
2515 }
2516 }
2517
2518 /* The number of bytes available for the filesystem to place fs dependend
2519 * oob data */
2520 mtd->oobavail = 0;
2521 for (i = 0; this->autooob->oobfree[i][1]; i++)
2522 mtd->oobavail += this->autooob->oobfree[i][1];
2523
2524 /*
2525 * check ECC mode, default to software
2526 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
2527 * fallback to software ECC
2528 */
2529 this->eccsize = 256; /* set default eccsize */
2530 this->eccbytes = 3;
2531
2532 switch (this->eccmode) {
2533 case NAND_ECC_HW12_2048:
2534 if (mtd->oobblock < 2048) {
2535 printk(KERN_WARNING "2048 byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
2536 mtd->oobblock);
2537 this->eccmode = NAND_ECC_SOFT;
2538 this->calculate_ecc = nand_calculate_ecc;
2539 this->correct_data = nand_correct_data;
2540 } else
2541 this->eccsize = 2048;
2542 break;
2543
2544 case NAND_ECC_HW3_512:
2545 case NAND_ECC_HW6_512:
2546 case NAND_ECC_HW8_512:
2547 if (mtd->oobblock == 256) {
2548 printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
2549 this->eccmode = NAND_ECC_SOFT;
2550 this->calculate_ecc = nand_calculate_ecc;
2551 this->correct_data = nand_correct_data;
2552 } else
2553 this->eccsize = 512; /* set eccsize to 512 */
2554 break;
2555
2556 case NAND_ECC_HW3_256:
2557 break;
2558
2559 case NAND_ECC_NONE:
2560 printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
2561 this->eccmode = NAND_ECC_NONE;
2562 break;
2563
2564 case NAND_ECC_SOFT:
2565 this->calculate_ecc = nand_calculate_ecc;
2566 this->correct_data = nand_correct_data;
2567 break;
2568
2569 default:
2570 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
2571 BUG();
2572 }
2573
2574 /* Check hardware ecc function availability and adjust number of ecc bytes per
2575 * calculation step
2576 */
2577 switch (this->eccmode) {
2578 case NAND_ECC_HW12_2048:
2579 this->eccbytes += 4;
2580 case NAND_ECC_HW8_512:
2581 this->eccbytes += 2;
2582 case NAND_ECC_HW6_512:
2583 this->eccbytes += 3;
2584 case NAND_ECC_HW3_512:
2585 case NAND_ECC_HW3_256:
2586 if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
2587 break;
2588 printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
2589 BUG();
2590 }
2591
2592 mtd->eccsize = this->eccsize;
2593
2594 /* Set the number of read / write steps for one page to ensure ECC generation */
2595 switch (this->eccmode) {
2596 case NAND_ECC_HW12_2048:
2597 this->eccsteps = mtd->oobblock / 2048;
2598 break;
2599 case NAND_ECC_HW3_512:
2600 case NAND_ECC_HW6_512:
2601 case NAND_ECC_HW8_512:
2602 this->eccsteps = mtd->oobblock / 512;
2603 break;
2604 case NAND_ECC_HW3_256:
2605 case NAND_ECC_SOFT:
2606 this->eccsteps = mtd->oobblock / 256;
2607 break;
2608
2609 case NAND_ECC_NONE:
2610 this->eccsteps = 1;
2611 break;
2612 }
2613
2614 /* Initialize state, waitqueue and spinlock */
2615 this->state = FL_READY;
2616 init_waitqueue_head (&this->wq);
2617 spin_lock_init (&this->chip_lock);
2618
2619 /* De-select the device */
2620 this->select_chip(mtd, -1);
2621
2622 /* Invalidate the pagebuffer reference */
2623 this->pagebuf = -1;
2624
2625 /* Fill in remaining MTD driver data */
2626 mtd->type = MTD_NANDFLASH;
2627 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
2628 mtd->ecctype = MTD_ECC_SW;
2629 mtd->erase = nand_erase;
2630 mtd->point = NULL;
2631 mtd->unpoint = NULL;
2632 mtd->read = nand_read;
2633 mtd->write = nand_write;
2634 mtd->read_ecc = nand_read_ecc;
2635 mtd->write_ecc = nand_write_ecc;
2636 mtd->read_oob = nand_read_oob;
2637 mtd->write_oob = nand_write_oob;
2638 mtd->readv = NULL;
2639 mtd->writev = nand_writev;
2640 mtd->writev_ecc = nand_writev_ecc;
2641 mtd->sync = nand_sync;
2642 mtd->lock = NULL;
2643 mtd->unlock = NULL;
2644 mtd->suspend = NULL;
2645 mtd->resume = NULL;
2646 mtd->block_isbad = nand_block_isbad;
2647 mtd->block_markbad = nand_block_markbad;
2648
2649 /* and make the autooob the default one */
2650 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
2651
2652 mtd->owner = THIS_MODULE;
2653
2654 /* Check, if we should skip the bad block table scan */
2655 if (this->options & NAND_SKIP_BBTSCAN)
2656 return 0;
2657
2658 /* Build bad block table */
2659 return this->scan_bbt (mtd);
2660 }
2661
2662 /**
2663 * nand_release - [NAND Interface] Free resources held by the NAND device
2664 * @mtd: MTD device structure
2665 */
2666 void nand_release (struct mtd_info *mtd)
2667 {
2668 struct nand_chip *this = mtd->priv;
2669
2670 #ifdef CONFIG_MTD_PARTITIONS
2671 /* Deregister partitions */
2672 del_mtd_partitions (mtd);
2673 #endif
2674 /* Deregister the device */
2675 del_mtd_device (mtd);
2676
2677 /* Free bad block table memory, if allocated */
2678 if (this->bbt)
2679 kfree (this->bbt);
2680 /* Buffer allocated by nand_scan ? */
2681 if (this->options & NAND_OOBBUF_ALLOC)
2682 kfree (this->oob_buf);
2683 /* Buffer allocated by nand_scan ? */
2684 if (this->options & NAND_DATABUF_ALLOC)
2685 kfree (this->data_buf);
2686 }
2687
2688 EXPORT_SYMBOL (nand_scan);
2689 EXPORT_SYMBOL (nand_release);
2690
2691 MODULE_LICENSE ("GPL");
2692 MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2693 MODULE_DESCRIPTION ("Generic NAND flash driver code");
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