2 * NAND flash simulator.
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
6 * Copyright (C) 2004 Nokia Corporation
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
44 #include <linux/pagemap.h>
45 #include <linux/seq_file.h>
46 #include <linux/debugfs.h>
48 /* Default simulator parameters values */
49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
66 #define CONFIG_NANDSIM_ERASE_DELAY 2
68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
72 #define CONFIG_NANDSIM_INPUT_CYCLE 50
74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
75 #define CONFIG_NANDSIM_BUS_WIDTH 8
77 #ifndef CONFIG_NANDSIM_DO_DELAYS
78 #define CONFIG_NANDSIM_DO_DELAYS 0
80 #ifndef CONFIG_NANDSIM_LOG
81 #define CONFIG_NANDSIM_LOG 0
83 #ifndef CONFIG_NANDSIM_DBG
84 #define CONFIG_NANDSIM_DBG 0
86 #ifndef CONFIG_NANDSIM_MAX_PARTS
87 #define CONFIG_NANDSIM_MAX_PARTS 32
90 static uint access_delay
= CONFIG_NANDSIM_ACCESS_DELAY
;
91 static uint programm_delay
= CONFIG_NANDSIM_PROGRAMM_DELAY
;
92 static uint erase_delay
= CONFIG_NANDSIM_ERASE_DELAY
;
93 static uint output_cycle
= CONFIG_NANDSIM_OUTPUT_CYCLE
;
94 static uint input_cycle
= CONFIG_NANDSIM_INPUT_CYCLE
;
95 static uint bus_width
= CONFIG_NANDSIM_BUS_WIDTH
;
96 static uint do_delays
= CONFIG_NANDSIM_DO_DELAYS
;
97 static uint log
= CONFIG_NANDSIM_LOG
;
98 static uint dbg
= CONFIG_NANDSIM_DBG
;
99 static unsigned long parts
[CONFIG_NANDSIM_MAX_PARTS
];
100 static unsigned int parts_num
;
101 static char *badblocks
= NULL
;
102 static char *weakblocks
= NULL
;
103 static char *weakpages
= NULL
;
104 static unsigned int bitflips
= 0;
105 static char *gravepages
= NULL
;
106 static unsigned int overridesize
= 0;
107 static char *cache_file
= NULL
;
108 static unsigned int bbt
;
109 static unsigned int bch
;
110 static u_char id_bytes
[8] = {
111 [0] = CONFIG_NANDSIM_FIRST_ID_BYTE
,
112 [1] = CONFIG_NANDSIM_SECOND_ID_BYTE
,
113 [2] = CONFIG_NANDSIM_THIRD_ID_BYTE
,
114 [3] = CONFIG_NANDSIM_FOURTH_ID_BYTE
,
118 module_param_array(id_bytes
, byte
, NULL
, 0400);
119 module_param_named(first_id_byte
, id_bytes
[0], byte
, 0400);
120 module_param_named(second_id_byte
, id_bytes
[1], byte
, 0400);
121 module_param_named(third_id_byte
, id_bytes
[2], byte
, 0400);
122 module_param_named(fourth_id_byte
, id_bytes
[3], byte
, 0400);
123 module_param(access_delay
, uint
, 0400);
124 module_param(programm_delay
, uint
, 0400);
125 module_param(erase_delay
, uint
, 0400);
126 module_param(output_cycle
, uint
, 0400);
127 module_param(input_cycle
, uint
, 0400);
128 module_param(bus_width
, uint
, 0400);
129 module_param(do_delays
, uint
, 0400);
130 module_param(log
, uint
, 0400);
131 module_param(dbg
, uint
, 0400);
132 module_param_array(parts
, ulong
, &parts_num
, 0400);
133 module_param(badblocks
, charp
, 0400);
134 module_param(weakblocks
, charp
, 0400);
135 module_param(weakpages
, charp
, 0400);
136 module_param(bitflips
, uint
, 0400);
137 module_param(gravepages
, charp
, 0400);
138 module_param(overridesize
, uint
, 0400);
139 module_param(cache_file
, charp
, 0400);
140 module_param(bbt
, uint
, 0400);
141 module_param(bch
, uint
, 0400);
143 MODULE_PARM_DESC(id_bytes
, "The ID bytes returned by NAND Flash 'read ID' command");
144 MODULE_PARM_DESC(first_id_byte
, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)");
145 MODULE_PARM_DESC(second_id_byte
, "The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)");
146 MODULE_PARM_DESC(third_id_byte
, "The third byte returned by NAND Flash 'read ID' command (obsolete)");
147 MODULE_PARM_DESC(fourth_id_byte
, "The fourth byte returned by NAND Flash 'read ID' command (obsolete)");
148 MODULE_PARM_DESC(access_delay
, "Initial page access delay (microseconds)");
149 MODULE_PARM_DESC(programm_delay
, "Page programm delay (microseconds");
150 MODULE_PARM_DESC(erase_delay
, "Sector erase delay (milliseconds)");
151 MODULE_PARM_DESC(output_cycle
, "Word output (from flash) time (nanoseconds)");
152 MODULE_PARM_DESC(input_cycle
, "Word input (to flash) time (nanoseconds)");
153 MODULE_PARM_DESC(bus_width
, "Chip's bus width (8- or 16-bit)");
154 MODULE_PARM_DESC(do_delays
, "Simulate NAND delays using busy-waits if not zero");
155 MODULE_PARM_DESC(log
, "Perform logging if not zero");
156 MODULE_PARM_DESC(dbg
, "Output debug information if not zero");
157 MODULE_PARM_DESC(parts
, "Partition sizes (in erase blocks) separated by commas");
158 /* Page and erase block positions for the following parameters are independent of any partitions */
159 MODULE_PARM_DESC(badblocks
, "Erase blocks that are initially marked bad, separated by commas");
160 MODULE_PARM_DESC(weakblocks
, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
161 " separated by commas e.g. 113:2 means eb 113"
162 " can be erased only twice before failing");
163 MODULE_PARM_DESC(weakpages
, "Weak pages [: maximum writes (defaults to 3)]"
164 " separated by commas e.g. 1401:2 means page 1401"
165 " can be written only twice before failing");
166 MODULE_PARM_DESC(bitflips
, "Maximum number of random bit flips per page (zero by default)");
167 MODULE_PARM_DESC(gravepages
, "Pages that lose data [: maximum reads (defaults to 3)]"
168 " separated by commas e.g. 1401:2 means page 1401"
169 " can be read only twice before failing");
170 MODULE_PARM_DESC(overridesize
, "Specifies the NAND Flash size overriding the ID bytes. "
171 "The size is specified in erase blocks and as the exponent of a power of two"
172 " e.g. 5 means a size of 32 erase blocks");
173 MODULE_PARM_DESC(cache_file
, "File to use to cache nand pages instead of memory");
174 MODULE_PARM_DESC(bbt
, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
175 MODULE_PARM_DESC(bch
, "Enable BCH ecc and set how many bits should "
176 "be correctable in 512-byte blocks");
178 /* The largest possible page size */
179 #define NS_LARGEST_PAGE_SIZE 4096
181 /* The prefix for simulator output */
182 #define NS_OUTPUT_PREFIX "[nandsim]"
184 /* Simulator's output macros (logging, debugging, warning, error) */
185 #define NS_LOG(args...) \
186 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
187 #define NS_DBG(args...) \
188 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
189 #define NS_WARN(args...) \
190 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
191 #define NS_ERR(args...) \
192 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
193 #define NS_INFO(args...) \
194 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
196 /* Busy-wait delay macros (microseconds, milliseconds) */
197 #define NS_UDELAY(us) \
198 do { if (do_delays) udelay(us); } while(0)
199 #define NS_MDELAY(us) \
200 do { if (do_delays) mdelay(us); } while(0)
202 /* Is the nandsim structure initialized ? */
203 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
205 /* Good operation completion status */
206 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
208 /* Operation failed completion status */
209 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
211 /* Calculate the page offset in flash RAM image by (row, column) address */
212 #define NS_RAW_OFFSET(ns) \
213 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
215 /* Calculate the OOB offset in flash RAM image by (row, column) address */
216 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
218 /* After a command is input, the simulator goes to one of the following states */
219 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
220 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
221 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
222 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
223 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
224 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
225 #define STATE_CMD_STATUS 0x00000007 /* read status */
226 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
227 #define STATE_CMD_READID 0x0000000A /* read ID */
228 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
229 #define STATE_CMD_RESET 0x0000000C /* reset */
230 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
231 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
232 #define STATE_CMD_MASK 0x0000000F /* command states mask */
234 /* After an address is input, the simulator goes to one of these states */
235 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
236 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
237 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
238 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
239 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
241 /* During data input/output the simulator is in these states */
242 #define STATE_DATAIN 0x00000100 /* waiting for data input */
243 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
245 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
246 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
247 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
248 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
250 /* Previous operation is done, ready to accept new requests */
251 #define STATE_READY 0x00000000
253 /* This state is used to mark that the next state isn't known yet */
254 #define STATE_UNKNOWN 0x10000000
256 /* Simulator's actions bit masks */
257 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
258 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
259 #define ACTION_SECERASE 0x00300000 /* erase sector */
260 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
261 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
262 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
263 #define ACTION_MASK 0x00700000 /* action mask */
265 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
266 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
268 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
269 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
270 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
271 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
272 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
273 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
274 #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
276 /* Remove action bits from state */
277 #define NS_STATE(x) ((x) & ~ACTION_MASK)
280 * Maximum previous states which need to be saved. Currently saving is
281 * only needed for page program operation with preceded read command
282 * (which is only valid for 512-byte pages).
284 #define NS_MAX_PREVSTATES 1
286 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
287 #define NS_MAX_HELD_PAGES 16
289 struct nandsim_debug_info
{
290 struct dentry
*dfs_root
;
291 struct dentry
*dfs_wear_report
;
295 * A union to represent flash memory contents and flash buffer.
298 u_char
*byte
; /* for byte access */
299 uint16_t *word
; /* for 16-bit word access */
303 * The structure which describes all the internal simulator data.
306 struct mtd_partition partitions
[CONFIG_NANDSIM_MAX_PARTS
];
307 unsigned int nbparts
;
309 uint busw
; /* flash chip bus width (8 or 16) */
310 u_char ids
[8]; /* chip's ID bytes */
311 uint32_t options
; /* chip's characteristic bits */
312 uint32_t state
; /* current chip state */
313 uint32_t nxstate
; /* next expected state */
315 uint32_t *op
; /* current operation, NULL operations isn't known yet */
316 uint32_t pstates
[NS_MAX_PREVSTATES
]; /* previous states */
317 uint16_t npstates
; /* number of previous states saved */
318 uint16_t stateidx
; /* current state index */
320 /* The simulated NAND flash pages array */
323 /* Slab allocator for nand pages */
324 struct kmem_cache
*nand_pages_slab
;
326 /* Internal buffer of page + OOB size bytes */
329 /* NAND flash "geometry" */
331 uint64_t totsz
; /* total flash size, bytes */
332 uint32_t secsz
; /* flash sector (erase block) size, bytes */
333 uint pgsz
; /* NAND flash page size, bytes */
334 uint oobsz
; /* page OOB area size, bytes */
335 uint64_t totszoob
; /* total flash size including OOB, bytes */
336 uint pgszoob
; /* page size including OOB , bytes*/
337 uint secszoob
; /* sector size including OOB, bytes */
338 uint pgnum
; /* total number of pages */
339 uint pgsec
; /* number of pages per sector */
340 uint secshift
; /* bits number in sector size */
341 uint pgshift
; /* bits number in page size */
342 uint pgaddrbytes
; /* bytes per page address */
343 uint secaddrbytes
; /* bytes per sector address */
344 uint idbytes
; /* the number ID bytes that this chip outputs */
347 /* NAND flash internal registers */
349 unsigned command
; /* the command register */
350 u_char status
; /* the status register */
351 uint row
; /* the page number */
352 uint column
; /* the offset within page */
353 uint count
; /* internal counter */
354 uint num
; /* number of bytes which must be processed */
355 uint off
; /* fixed page offset */
358 /* NAND flash lines state */
360 int ce
; /* chip Enable */
361 int cle
; /* command Latch Enable */
362 int ale
; /* address Latch Enable */
363 int wp
; /* write Protect */
366 /* Fields needed when using a cache file */
367 struct file
*cfile
; /* Open file */
368 unsigned long *pages_written
; /* Which pages have been written */
370 struct page
*held_pages
[NS_MAX_HELD_PAGES
];
373 struct nandsim_debug_info dbg
;
377 * Operations array. To perform any operation the simulator must pass
378 * through the correspondent states chain.
380 static struct nandsim_operations
{
381 uint32_t reqopts
; /* options which are required to perform the operation */
382 uint32_t states
[NS_OPER_STATES
]; /* operation's states */
383 } ops
[NS_OPER_NUM
] = {
384 /* Read page + OOB from the beginning */
385 {OPT_SMALLPAGE
, {STATE_CMD_READ0
| ACTION_ZEROOFF
, STATE_ADDR_PAGE
| ACTION_CPY
,
386 STATE_DATAOUT
, STATE_READY
}},
387 /* Read page + OOB from the second half */
388 {OPT_PAGE512_8BIT
, {STATE_CMD_READ1
| ACTION_HALFOFF
, STATE_ADDR_PAGE
| ACTION_CPY
,
389 STATE_DATAOUT
, STATE_READY
}},
391 {OPT_SMALLPAGE
, {STATE_CMD_READOOB
| ACTION_OOBOFF
, STATE_ADDR_PAGE
| ACTION_CPY
,
392 STATE_DATAOUT
, STATE_READY
}},
393 /* Program page starting from the beginning */
394 {OPT_ANY
, {STATE_CMD_SEQIN
, STATE_ADDR_PAGE
, STATE_DATAIN
,
395 STATE_CMD_PAGEPROG
| ACTION_PRGPAGE
, STATE_READY
}},
396 /* Program page starting from the beginning */
397 {OPT_SMALLPAGE
, {STATE_CMD_READ0
, STATE_CMD_SEQIN
| ACTION_ZEROOFF
, STATE_ADDR_PAGE
,
398 STATE_DATAIN
, STATE_CMD_PAGEPROG
| ACTION_PRGPAGE
, STATE_READY
}},
399 /* Program page starting from the second half */
400 {OPT_PAGE512
, {STATE_CMD_READ1
, STATE_CMD_SEQIN
| ACTION_HALFOFF
, STATE_ADDR_PAGE
,
401 STATE_DATAIN
, STATE_CMD_PAGEPROG
| ACTION_PRGPAGE
, STATE_READY
}},
403 {OPT_SMALLPAGE
, {STATE_CMD_READOOB
, STATE_CMD_SEQIN
| ACTION_OOBOFF
, STATE_ADDR_PAGE
,
404 STATE_DATAIN
, STATE_CMD_PAGEPROG
| ACTION_PRGPAGE
, STATE_READY
}},
406 {OPT_ANY
, {STATE_CMD_ERASE1
, STATE_ADDR_SEC
, STATE_CMD_ERASE2
| ACTION_SECERASE
, STATE_READY
}},
408 {OPT_ANY
, {STATE_CMD_STATUS
, STATE_DATAOUT_STATUS
, STATE_READY
}},
410 {OPT_ANY
, {STATE_CMD_READID
, STATE_ADDR_ZERO
, STATE_DATAOUT_ID
, STATE_READY
}},
411 /* Large page devices read page */
412 {OPT_LARGEPAGE
, {STATE_CMD_READ0
, STATE_ADDR_PAGE
, STATE_CMD_READSTART
| ACTION_CPY
,
413 STATE_DATAOUT
, STATE_READY
}},
414 /* Large page devices random page read */
415 {OPT_LARGEPAGE
, {STATE_CMD_RNDOUT
, STATE_ADDR_COLUMN
, STATE_CMD_RNDOUTSTART
| ACTION_CPY
,
416 STATE_DATAOUT
, STATE_READY
}},
420 struct list_head list
;
421 unsigned int erase_block_no
;
422 unsigned int max_erases
;
423 unsigned int erases_done
;
426 static LIST_HEAD(weak_blocks
);
429 struct list_head list
;
430 unsigned int page_no
;
431 unsigned int max_writes
;
432 unsigned int writes_done
;
435 static LIST_HEAD(weak_pages
);
438 struct list_head list
;
439 unsigned int page_no
;
440 unsigned int max_reads
;
441 unsigned int reads_done
;
444 static LIST_HEAD(grave_pages
);
446 static unsigned long *erase_block_wear
= NULL
;
447 static unsigned int wear_eb_count
= 0;
448 static unsigned long total_wear
= 0;
450 /* MTD structure for NAND controller */
451 static struct mtd_info
*nsmtd
;
453 static int nandsim_debugfs_show(struct seq_file
*m
, void *private)
455 unsigned long wmin
= -1, wmax
= 0, avg
;
456 unsigned long deciles
[10], decile_max
[10], tot
= 0;
459 /* Calc wear stats */
460 for (i
= 0; i
< wear_eb_count
; ++i
) {
461 unsigned long wear
= erase_block_wear
[i
];
469 for (i
= 0; i
< 9; ++i
) {
471 decile_max
[i
] = (wmax
* (i
+ 1) + 5) / 10;
474 decile_max
[9] = wmax
;
475 for (i
= 0; i
< wear_eb_count
; ++i
) {
477 unsigned long wear
= erase_block_wear
[i
];
478 for (d
= 0; d
< 10; ++d
)
479 if (wear
<= decile_max
[d
]) {
484 avg
= tot
/ wear_eb_count
;
486 /* Output wear report */
487 seq_printf(m
, "Total numbers of erases: %lu\n", tot
);
488 seq_printf(m
, "Number of erase blocks: %u\n", wear_eb_count
);
489 seq_printf(m
, "Average number of erases: %lu\n", avg
);
490 seq_printf(m
, "Maximum number of erases: %lu\n", wmax
);
491 seq_printf(m
, "Minimum number of erases: %lu\n", wmin
);
492 for (i
= 0; i
< 10; ++i
) {
493 unsigned long from
= (i
? decile_max
[i
- 1] + 1 : 0);
494 if (from
> decile_max
[i
])
496 seq_printf(m
, "Number of ebs with erase counts from %lu to %lu : %lu\n",
505 static int nandsim_debugfs_open(struct inode
*inode
, struct file
*file
)
507 return single_open(file
, nandsim_debugfs_show
, inode
->i_private
);
510 static const struct file_operations dfs_fops
= {
511 .open
= nandsim_debugfs_open
,
514 .release
= single_release
,
518 * nandsim_debugfs_create - initialize debugfs
519 * @dev: nandsim device description object
521 * This function creates all debugfs files for UBI device @ubi. Returns zero in
522 * case of success and a negative error code in case of failure.
524 static int nandsim_debugfs_create(struct nandsim
*dev
)
526 struct nandsim_debug_info
*dbg
= &dev
->dbg
;
530 if (!IS_ENABLED(CONFIG_DEBUG_FS
))
533 dent
= debugfs_create_dir("nandsim", NULL
);
534 if (IS_ERR_OR_NULL(dent
)) {
535 int err
= dent
? -ENODEV
: PTR_ERR(dent
);
537 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
541 dbg
->dfs_root
= dent
;
543 dent
= debugfs_create_file("wear_report", S_IRUSR
,
544 dbg
->dfs_root
, dev
, &dfs_fops
);
545 if (IS_ERR_OR_NULL(dent
))
547 dbg
->dfs_wear_report
= dent
;
552 debugfs_remove_recursive(dbg
->dfs_root
);
553 err
= dent
? PTR_ERR(dent
) : -ENODEV
;
558 * nandsim_debugfs_remove - destroy all debugfs files
560 static void nandsim_debugfs_remove(struct nandsim
*ns
)
562 if (IS_ENABLED(CONFIG_DEBUG_FS
))
563 debugfs_remove_recursive(ns
->dbg
.dfs_root
);
567 * Allocate array of page pointers, create slab allocation for an array
568 * and initialize the array by NULL pointers.
570 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
572 static int alloc_device(struct nandsim
*ns
)
578 cfile
= filp_open(cache_file
, O_CREAT
| O_RDWR
| O_LARGEFILE
, 0600);
580 return PTR_ERR(cfile
);
581 if (!(cfile
->f_mode
& FMODE_CAN_READ
)) {
582 NS_ERR("alloc_device: cache file not readable\n");
586 if (!(cfile
->f_mode
& FMODE_CAN_WRITE
)) {
587 NS_ERR("alloc_device: cache file not writeable\n");
591 ns
->pages_written
= vzalloc(BITS_TO_LONGS(ns
->geom
.pgnum
) *
592 sizeof(unsigned long));
593 if (!ns
->pages_written
) {
594 NS_ERR("alloc_device: unable to allocate pages written array\n");
598 ns
->file_buf
= kmalloc(ns
->geom
.pgszoob
, GFP_KERNEL
);
600 NS_ERR("alloc_device: unable to allocate file buf\n");
608 ns
->pages
= vmalloc(ns
->geom
.pgnum
* sizeof(union ns_mem
));
610 NS_ERR("alloc_device: unable to allocate page array\n");
613 for (i
= 0; i
< ns
->geom
.pgnum
; i
++) {
614 ns
->pages
[i
].byte
= NULL
;
616 ns
->nand_pages_slab
= kmem_cache_create("nandsim",
617 ns
->geom
.pgszoob
, 0, 0, NULL
);
618 if (!ns
->nand_pages_slab
) {
619 NS_ERR("cache_create: unable to create kmem_cache\n");
626 vfree(ns
->pages_written
);
628 filp_close(cfile
, NULL
);
633 * Free any allocated pages, and free the array of page pointers.
635 static void free_device(struct nandsim
*ns
)
641 vfree(ns
->pages_written
);
642 filp_close(ns
->cfile
, NULL
);
647 for (i
= 0; i
< ns
->geom
.pgnum
; i
++) {
648 if (ns
->pages
[i
].byte
)
649 kmem_cache_free(ns
->nand_pages_slab
,
652 if (ns
->nand_pages_slab
)
653 kmem_cache_destroy(ns
->nand_pages_slab
);
658 static char *get_partition_name(int i
)
660 return kasprintf(GFP_KERNEL
, "NAND simulator partition %d", i
);
664 * Initialize the nandsim structure.
666 * RETURNS: 0 if success, -ERRNO if failure.
668 static int init_nandsim(struct mtd_info
*mtd
)
670 struct nand_chip
*chip
= mtd
->priv
;
671 struct nandsim
*ns
= chip
->priv
;
674 uint64_t next_offset
;
676 if (NS_IS_INITIALIZED(ns
)) {
677 NS_ERR("init_nandsim: nandsim is already initialized\n");
681 /* Force mtd to not do delays */
682 chip
->chip_delay
= 0;
684 /* Initialize the NAND flash parameters */
685 ns
->busw
= chip
->options
& NAND_BUSWIDTH_16
? 16 : 8;
686 ns
->geom
.totsz
= mtd
->size
;
687 ns
->geom
.pgsz
= mtd
->writesize
;
688 ns
->geom
.oobsz
= mtd
->oobsize
;
689 ns
->geom
.secsz
= mtd
->erasesize
;
690 ns
->geom
.pgszoob
= ns
->geom
.pgsz
+ ns
->geom
.oobsz
;
691 ns
->geom
.pgnum
= div_u64(ns
->geom
.totsz
, ns
->geom
.pgsz
);
692 ns
->geom
.totszoob
= ns
->geom
.totsz
+ (uint64_t)ns
->geom
.pgnum
* ns
->geom
.oobsz
;
693 ns
->geom
.secshift
= ffs(ns
->geom
.secsz
) - 1;
694 ns
->geom
.pgshift
= chip
->page_shift
;
695 ns
->geom
.pgsec
= ns
->geom
.secsz
/ ns
->geom
.pgsz
;
696 ns
->geom
.secszoob
= ns
->geom
.secsz
+ ns
->geom
.oobsz
* ns
->geom
.pgsec
;
699 if (ns
->geom
.pgsz
== 512) {
700 ns
->options
|= OPT_PAGE512
;
702 ns
->options
|= OPT_PAGE512_8BIT
;
703 } else if (ns
->geom
.pgsz
== 2048) {
704 ns
->options
|= OPT_PAGE2048
;
705 } else if (ns
->geom
.pgsz
== 4096) {
706 ns
->options
|= OPT_PAGE4096
;
708 NS_ERR("init_nandsim: unknown page size %u\n", ns
->geom
.pgsz
);
712 if (ns
->options
& OPT_SMALLPAGE
) {
713 if (ns
->geom
.totsz
<= (32 << 20)) {
714 ns
->geom
.pgaddrbytes
= 3;
715 ns
->geom
.secaddrbytes
= 2;
717 ns
->geom
.pgaddrbytes
= 4;
718 ns
->geom
.secaddrbytes
= 3;
721 if (ns
->geom
.totsz
<= (128 << 20)) {
722 ns
->geom
.pgaddrbytes
= 4;
723 ns
->geom
.secaddrbytes
= 2;
725 ns
->geom
.pgaddrbytes
= 5;
726 ns
->geom
.secaddrbytes
= 3;
730 /* Fill the partition_info structure */
731 if (parts_num
> ARRAY_SIZE(ns
->partitions
)) {
732 NS_ERR("too many partitions.\n");
735 remains
= ns
->geom
.totsz
;
737 for (i
= 0; i
< parts_num
; ++i
) {
738 uint64_t part_sz
= (uint64_t)parts
[i
] * ns
->geom
.secsz
;
740 if (!part_sz
|| part_sz
> remains
) {
741 NS_ERR("bad partition size.\n");
744 ns
->partitions
[i
].name
= get_partition_name(i
);
745 if (!ns
->partitions
[i
].name
) {
746 NS_ERR("unable to allocate memory.\n");
749 ns
->partitions
[i
].offset
= next_offset
;
750 ns
->partitions
[i
].size
= part_sz
;
751 next_offset
+= ns
->partitions
[i
].size
;
752 remains
-= ns
->partitions
[i
].size
;
754 ns
->nbparts
= parts_num
;
756 if (parts_num
+ 1 > ARRAY_SIZE(ns
->partitions
)) {
757 NS_ERR("too many partitions.\n");
760 ns
->partitions
[i
].name
= get_partition_name(i
);
761 if (!ns
->partitions
[i
].name
) {
762 NS_ERR("unable to allocate memory.\n");
765 ns
->partitions
[i
].offset
= next_offset
;
766 ns
->partitions
[i
].size
= remains
;
771 NS_WARN("16-bit flashes support wasn't tested\n");
773 printk("flash size: %llu MiB\n",
774 (unsigned long long)ns
->geom
.totsz
>> 20);
775 printk("page size: %u bytes\n", ns
->geom
.pgsz
);
776 printk("OOB area size: %u bytes\n", ns
->geom
.oobsz
);
777 printk("sector size: %u KiB\n", ns
->geom
.secsz
>> 10);
778 printk("pages number: %u\n", ns
->geom
.pgnum
);
779 printk("pages per sector: %u\n", ns
->geom
.pgsec
);
780 printk("bus width: %u\n", ns
->busw
);
781 printk("bits in sector size: %u\n", ns
->geom
.secshift
);
782 printk("bits in page size: %u\n", ns
->geom
.pgshift
);
783 printk("bits in OOB size: %u\n", ffs(ns
->geom
.oobsz
) - 1);
784 printk("flash size with OOB: %llu KiB\n",
785 (unsigned long long)ns
->geom
.totszoob
>> 10);
786 printk("page address bytes: %u\n", ns
->geom
.pgaddrbytes
);
787 printk("sector address bytes: %u\n", ns
->geom
.secaddrbytes
);
788 printk("options: %#x\n", ns
->options
);
790 if ((ret
= alloc_device(ns
)) != 0)
793 /* Allocate / initialize the internal buffer */
794 ns
->buf
.byte
= kmalloc(ns
->geom
.pgszoob
, GFP_KERNEL
);
796 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
800 memset(ns
->buf
.byte
, 0xFF, ns
->geom
.pgszoob
);
806 * Free the nandsim structure.
808 static void free_nandsim(struct nandsim
*ns
)
816 static int parse_badblocks(struct nandsim
*ns
, struct mtd_info
*mtd
)
820 unsigned int erase_block_no
;
827 zero_ok
= (*w
== '0' ? 1 : 0);
828 erase_block_no
= simple_strtoul(w
, &w
, 0);
829 if (!zero_ok
&& !erase_block_no
) {
830 NS_ERR("invalid badblocks.\n");
833 offset
= (loff_t
)erase_block_no
* ns
->geom
.secsz
;
834 if (mtd_block_markbad(mtd
, offset
)) {
835 NS_ERR("invalid badblocks.\n");
844 static int parse_weakblocks(void)
848 unsigned int erase_block_no
;
849 unsigned int max_erases
;
850 struct weak_block
*wb
;
856 zero_ok
= (*w
== '0' ? 1 : 0);
857 erase_block_no
= simple_strtoul(w
, &w
, 0);
858 if (!zero_ok
&& !erase_block_no
) {
859 NS_ERR("invalid weakblocks.\n");
865 max_erases
= simple_strtoul(w
, &w
, 0);
869 wb
= kzalloc(sizeof(*wb
), GFP_KERNEL
);
871 NS_ERR("unable to allocate memory.\n");
874 wb
->erase_block_no
= erase_block_no
;
875 wb
->max_erases
= max_erases
;
876 list_add(&wb
->list
, &weak_blocks
);
881 static int erase_error(unsigned int erase_block_no
)
883 struct weak_block
*wb
;
885 list_for_each_entry(wb
, &weak_blocks
, list
)
886 if (wb
->erase_block_no
== erase_block_no
) {
887 if (wb
->erases_done
>= wb
->max_erases
)
889 wb
->erases_done
+= 1;
895 static int parse_weakpages(void)
899 unsigned int page_no
;
900 unsigned int max_writes
;
901 struct weak_page
*wp
;
907 zero_ok
= (*w
== '0' ? 1 : 0);
908 page_no
= simple_strtoul(w
, &w
, 0);
909 if (!zero_ok
&& !page_no
) {
910 NS_ERR("invalid weakpagess.\n");
916 max_writes
= simple_strtoul(w
, &w
, 0);
920 wp
= kzalloc(sizeof(*wp
), GFP_KERNEL
);
922 NS_ERR("unable to allocate memory.\n");
925 wp
->page_no
= page_no
;
926 wp
->max_writes
= max_writes
;
927 list_add(&wp
->list
, &weak_pages
);
932 static int write_error(unsigned int page_no
)
934 struct weak_page
*wp
;
936 list_for_each_entry(wp
, &weak_pages
, list
)
937 if (wp
->page_no
== page_no
) {
938 if (wp
->writes_done
>= wp
->max_writes
)
940 wp
->writes_done
+= 1;
946 static int parse_gravepages(void)
950 unsigned int page_no
;
951 unsigned int max_reads
;
952 struct grave_page
*gp
;
958 zero_ok
= (*g
== '0' ? 1 : 0);
959 page_no
= simple_strtoul(g
, &g
, 0);
960 if (!zero_ok
&& !page_no
) {
961 NS_ERR("invalid gravepagess.\n");
967 max_reads
= simple_strtoul(g
, &g
, 0);
971 gp
= kzalloc(sizeof(*gp
), GFP_KERNEL
);
973 NS_ERR("unable to allocate memory.\n");
976 gp
->page_no
= page_no
;
977 gp
->max_reads
= max_reads
;
978 list_add(&gp
->list
, &grave_pages
);
983 static int read_error(unsigned int page_no
)
985 struct grave_page
*gp
;
987 list_for_each_entry(gp
, &grave_pages
, list
)
988 if (gp
->page_no
== page_no
) {
989 if (gp
->reads_done
>= gp
->max_reads
)
997 static void free_lists(void)
999 struct list_head
*pos
, *n
;
1000 list_for_each_safe(pos
, n
, &weak_blocks
) {
1002 kfree(list_entry(pos
, struct weak_block
, list
));
1004 list_for_each_safe(pos
, n
, &weak_pages
) {
1006 kfree(list_entry(pos
, struct weak_page
, list
));
1008 list_for_each_safe(pos
, n
, &grave_pages
) {
1010 kfree(list_entry(pos
, struct grave_page
, list
));
1012 kfree(erase_block_wear
);
1015 static int setup_wear_reporting(struct mtd_info
*mtd
)
1019 wear_eb_count
= div_u64(mtd
->size
, mtd
->erasesize
);
1020 mem
= wear_eb_count
* sizeof(unsigned long);
1021 if (mem
/ sizeof(unsigned long) != wear_eb_count
) {
1022 NS_ERR("Too many erase blocks for wear reporting\n");
1025 erase_block_wear
= kzalloc(mem
, GFP_KERNEL
);
1026 if (!erase_block_wear
) {
1027 NS_ERR("Too many erase blocks for wear reporting\n");
1033 static void update_wear(unsigned int erase_block_no
)
1035 if (!erase_block_wear
)
1039 * TODO: Notify this through a debugfs entry,
1040 * instead of showing an error message.
1042 if (total_wear
== 0)
1043 NS_ERR("Erase counter total overflow\n");
1044 erase_block_wear
[erase_block_no
] += 1;
1045 if (erase_block_wear
[erase_block_no
] == 0)
1046 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no
);
1050 * Returns the string representation of 'state' state.
1052 static char *get_state_name(uint32_t state
)
1054 switch (NS_STATE(state
)) {
1055 case STATE_CMD_READ0
:
1056 return "STATE_CMD_READ0";
1057 case STATE_CMD_READ1
:
1058 return "STATE_CMD_READ1";
1059 case STATE_CMD_PAGEPROG
:
1060 return "STATE_CMD_PAGEPROG";
1061 case STATE_CMD_READOOB
:
1062 return "STATE_CMD_READOOB";
1063 case STATE_CMD_READSTART
:
1064 return "STATE_CMD_READSTART";
1065 case STATE_CMD_ERASE1
:
1066 return "STATE_CMD_ERASE1";
1067 case STATE_CMD_STATUS
:
1068 return "STATE_CMD_STATUS";
1069 case STATE_CMD_SEQIN
:
1070 return "STATE_CMD_SEQIN";
1071 case STATE_CMD_READID
:
1072 return "STATE_CMD_READID";
1073 case STATE_CMD_ERASE2
:
1074 return "STATE_CMD_ERASE2";
1075 case STATE_CMD_RESET
:
1076 return "STATE_CMD_RESET";
1077 case STATE_CMD_RNDOUT
:
1078 return "STATE_CMD_RNDOUT";
1079 case STATE_CMD_RNDOUTSTART
:
1080 return "STATE_CMD_RNDOUTSTART";
1081 case STATE_ADDR_PAGE
:
1082 return "STATE_ADDR_PAGE";
1083 case STATE_ADDR_SEC
:
1084 return "STATE_ADDR_SEC";
1085 case STATE_ADDR_ZERO
:
1086 return "STATE_ADDR_ZERO";
1087 case STATE_ADDR_COLUMN
:
1088 return "STATE_ADDR_COLUMN";
1090 return "STATE_DATAIN";
1092 return "STATE_DATAOUT";
1093 case STATE_DATAOUT_ID
:
1094 return "STATE_DATAOUT_ID";
1095 case STATE_DATAOUT_STATUS
:
1096 return "STATE_DATAOUT_STATUS";
1098 return "STATE_READY";
1100 return "STATE_UNKNOWN";
1103 NS_ERR("get_state_name: unknown state, BUG\n");
1108 * Check if command is valid.
1110 * RETURNS: 1 if wrong command, 0 if right.
1112 static int check_command(int cmd
)
1116 case NAND_CMD_READ0
:
1117 case NAND_CMD_READ1
:
1118 case NAND_CMD_READSTART
:
1119 case NAND_CMD_PAGEPROG
:
1120 case NAND_CMD_READOOB
:
1121 case NAND_CMD_ERASE1
:
1122 case NAND_CMD_STATUS
:
1123 case NAND_CMD_SEQIN
:
1124 case NAND_CMD_READID
:
1125 case NAND_CMD_ERASE2
:
1126 case NAND_CMD_RESET
:
1127 case NAND_CMD_RNDOUT
:
1128 case NAND_CMD_RNDOUTSTART
:
1137 * Returns state after command is accepted by command number.
1139 static uint32_t get_state_by_command(unsigned command
)
1142 case NAND_CMD_READ0
:
1143 return STATE_CMD_READ0
;
1144 case NAND_CMD_READ1
:
1145 return STATE_CMD_READ1
;
1146 case NAND_CMD_PAGEPROG
:
1147 return STATE_CMD_PAGEPROG
;
1148 case NAND_CMD_READSTART
:
1149 return STATE_CMD_READSTART
;
1150 case NAND_CMD_READOOB
:
1151 return STATE_CMD_READOOB
;
1152 case NAND_CMD_ERASE1
:
1153 return STATE_CMD_ERASE1
;
1154 case NAND_CMD_STATUS
:
1155 return STATE_CMD_STATUS
;
1156 case NAND_CMD_SEQIN
:
1157 return STATE_CMD_SEQIN
;
1158 case NAND_CMD_READID
:
1159 return STATE_CMD_READID
;
1160 case NAND_CMD_ERASE2
:
1161 return STATE_CMD_ERASE2
;
1162 case NAND_CMD_RESET
:
1163 return STATE_CMD_RESET
;
1164 case NAND_CMD_RNDOUT
:
1165 return STATE_CMD_RNDOUT
;
1166 case NAND_CMD_RNDOUTSTART
:
1167 return STATE_CMD_RNDOUTSTART
;
1170 NS_ERR("get_state_by_command: unknown command, BUG\n");
1175 * Move an address byte to the correspondent internal register.
1177 static inline void accept_addr_byte(struct nandsim
*ns
, u_char bt
)
1179 uint byte
= (uint
)bt
;
1181 if (ns
->regs
.count
< (ns
->geom
.pgaddrbytes
- ns
->geom
.secaddrbytes
))
1182 ns
->regs
.column
|= (byte
<< 8 * ns
->regs
.count
);
1184 ns
->regs
.row
|= (byte
<< 8 * (ns
->regs
.count
-
1185 ns
->geom
.pgaddrbytes
+
1186 ns
->geom
.secaddrbytes
));
1193 * Switch to STATE_READY state.
1195 static inline void switch_to_ready_state(struct nandsim
*ns
, u_char status
)
1197 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY
));
1199 ns
->state
= STATE_READY
;
1200 ns
->nxstate
= STATE_UNKNOWN
;
1208 ns
->regs
.column
= 0;
1209 ns
->regs
.status
= status
;
1213 * If the operation isn't known yet, try to find it in the global array
1214 * of supported operations.
1216 * Operation can be unknown because of the following.
1217 * 1. New command was accepted and this is the first call to find the
1218 * correspondent states chain. In this case ns->npstates = 0;
1219 * 2. There are several operations which begin with the same command(s)
1220 * (for example program from the second half and read from the
1221 * second half operations both begin with the READ1 command). In this
1222 * case the ns->pstates[] array contains previous states.
1224 * Thus, the function tries to find operation containing the following
1225 * states (if the 'flag' parameter is 0):
1226 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1228 * If (one and only one) matching operation is found, it is accepted (
1229 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1232 * If there are several matches, the current state is pushed to the
1235 * The operation can be unknown only while commands are input to the chip.
1236 * As soon as address command is accepted, the operation must be known.
1237 * In such situation the function is called with 'flag' != 0, and the
1238 * operation is searched using the following pattern:
1239 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1241 * It is supposed that this pattern must either match one operation or
1242 * none. There can't be ambiguity in that case.
1244 * If no matches found, the function does the following:
1245 * 1. if there are saved states present, try to ignore them and search
1246 * again only using the last command. If nothing was found, switch
1247 * to the STATE_READY state.
1248 * 2. if there are no saved states, switch to the STATE_READY state.
1250 * RETURNS: -2 - no matched operations found.
1251 * -1 - several matches.
1252 * 0 - operation is found.
1254 static int find_operation(struct nandsim
*ns
, uint32_t flag
)
1259 for (i
= 0; i
< NS_OPER_NUM
; i
++) {
1263 if (!(ns
->options
& ops
[i
].reqopts
))
1264 /* Ignore operations we can't perform */
1268 if (!(ops
[i
].states
[ns
->npstates
] & STATE_ADDR_MASK
))
1271 if (NS_STATE(ns
->state
) != NS_STATE(ops
[i
].states
[ns
->npstates
]))
1275 for (j
= 0; j
< ns
->npstates
; j
++)
1276 if (NS_STATE(ops
[i
].states
[j
]) != NS_STATE(ns
->pstates
[j
])
1277 && (ns
->options
& ops
[idx
].reqopts
)) {
1288 if (opsfound
== 1) {
1290 ns
->op
= &ops
[idx
].states
[0];
1293 * In this case the find_operation function was
1294 * called when address has just began input. But it isn't
1295 * yet fully input and the current state must
1296 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1297 * state must be the next state (ns->nxstate).
1299 ns
->stateidx
= ns
->npstates
- 1;
1301 ns
->stateidx
= ns
->npstates
;
1304 ns
->state
= ns
->op
[ns
->stateidx
];
1305 ns
->nxstate
= ns
->op
[ns
->stateidx
+ 1];
1306 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1307 idx
, get_state_name(ns
->state
), get_state_name(ns
->nxstate
));
1311 if (opsfound
== 0) {
1312 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1313 if (ns
->npstates
!= 0) {
1314 NS_DBG("find_operation: no operation found, try again with state %s\n",
1315 get_state_name(ns
->state
));
1317 return find_operation(ns
, 0);
1320 NS_DBG("find_operation: no operations found\n");
1321 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
1326 /* This shouldn't happen */
1327 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1331 NS_DBG("find_operation: there is still ambiguity\n");
1333 ns
->pstates
[ns
->npstates
++] = ns
->state
;
1338 static void put_pages(struct nandsim
*ns
)
1342 for (i
= 0; i
< ns
->held_cnt
; i
++)
1343 page_cache_release(ns
->held_pages
[i
]);
1346 /* Get page cache pages in advance to provide NOFS memory allocation */
1347 static int get_pages(struct nandsim
*ns
, struct file
*file
, size_t count
, loff_t pos
)
1349 pgoff_t index
, start_index
, end_index
;
1351 struct address_space
*mapping
= file
->f_mapping
;
1353 start_index
= pos
>> PAGE_CACHE_SHIFT
;
1354 end_index
= (pos
+ count
- 1) >> PAGE_CACHE_SHIFT
;
1355 if (end_index
- start_index
+ 1 > NS_MAX_HELD_PAGES
)
1358 for (index
= start_index
; index
<= end_index
; index
++) {
1359 page
= find_get_page(mapping
, index
);
1361 page
= find_or_create_page(mapping
, index
, GFP_NOFS
);
1363 write_inode_now(mapping
->host
, 1);
1364 page
= find_or_create_page(mapping
, index
, GFP_NOFS
);
1372 ns
->held_pages
[ns
->held_cnt
++] = page
;
1377 static int set_memalloc(void)
1379 if (current
->flags
& PF_MEMALLOC
)
1381 current
->flags
|= PF_MEMALLOC
;
1385 static void clear_memalloc(int memalloc
)
1388 current
->flags
&= ~PF_MEMALLOC
;
1391 static ssize_t
read_file(struct nandsim
*ns
, struct file
*file
, void *buf
, size_t count
, loff_t pos
)
1396 err
= get_pages(ns
, file
, count
, pos
);
1399 memalloc
= set_memalloc();
1400 tx
= kernel_read(file
, pos
, buf
, count
);
1401 clear_memalloc(memalloc
);
1406 static ssize_t
write_file(struct nandsim
*ns
, struct file
*file
, void *buf
, size_t count
, loff_t pos
)
1411 err
= get_pages(ns
, file
, count
, pos
);
1414 memalloc
= set_memalloc();
1415 tx
= kernel_write(file
, buf
, count
, pos
);
1416 clear_memalloc(memalloc
);
1422 * Returns a pointer to the current page.
1424 static inline union ns_mem
*NS_GET_PAGE(struct nandsim
*ns
)
1426 return &(ns
->pages
[ns
->regs
.row
]);
1430 * Retuns a pointer to the current byte, within the current page.
1432 static inline u_char
*NS_PAGE_BYTE_OFF(struct nandsim
*ns
)
1434 return NS_GET_PAGE(ns
)->byte
+ ns
->regs
.column
+ ns
->regs
.off
;
1437 static int do_read_error(struct nandsim
*ns
, int num
)
1439 unsigned int page_no
= ns
->regs
.row
;
1441 if (read_error(page_no
)) {
1442 prandom_bytes(ns
->buf
.byte
, num
);
1443 NS_WARN("simulating read error in page %u\n", page_no
);
1449 static void do_bit_flips(struct nandsim
*ns
, int num
)
1451 if (bitflips
&& prandom_u32() < (1 << 22)) {
1454 flips
= (prandom_u32() % (int) bitflips
) + 1;
1456 int pos
= prandom_u32() % (num
* 8);
1457 ns
->buf
.byte
[pos
/ 8] ^= (1 << (pos
% 8));
1458 NS_WARN("read_page: flipping bit %d in page %d "
1459 "reading from %d ecc: corrected=%u failed=%u\n",
1460 pos
, ns
->regs
.row
, ns
->regs
.column
+ ns
->regs
.off
,
1461 nsmtd
->ecc_stats
.corrected
, nsmtd
->ecc_stats
.failed
);
1467 * Fill the NAND buffer with data read from the specified page.
1469 static void read_page(struct nandsim
*ns
, int num
)
1471 union ns_mem
*mypage
;
1474 if (!test_bit(ns
->regs
.row
, ns
->pages_written
)) {
1475 NS_DBG("read_page: page %d not written\n", ns
->regs
.row
);
1476 memset(ns
->buf
.byte
, 0xFF, num
);
1481 NS_DBG("read_page: page %d written, reading from %d\n",
1482 ns
->regs
.row
, ns
->regs
.column
+ ns
->regs
.off
);
1483 if (do_read_error(ns
, num
))
1485 pos
= (loff_t
)NS_RAW_OFFSET(ns
) + ns
->regs
.off
;
1486 tx
= read_file(ns
, ns
->cfile
, ns
->buf
.byte
, num
, pos
);
1488 NS_ERR("read_page: read error for page %d ret %ld\n", ns
->regs
.row
, (long)tx
);
1491 do_bit_flips(ns
, num
);
1496 mypage
= NS_GET_PAGE(ns
);
1497 if (mypage
->byte
== NULL
) {
1498 NS_DBG("read_page: page %d not allocated\n", ns
->regs
.row
);
1499 memset(ns
->buf
.byte
, 0xFF, num
);
1501 NS_DBG("read_page: page %d allocated, reading from %d\n",
1502 ns
->regs
.row
, ns
->regs
.column
+ ns
->regs
.off
);
1503 if (do_read_error(ns
, num
))
1505 memcpy(ns
->buf
.byte
, NS_PAGE_BYTE_OFF(ns
), num
);
1506 do_bit_flips(ns
, num
);
1511 * Erase all pages in the specified sector.
1513 static void erase_sector(struct nandsim
*ns
)
1515 union ns_mem
*mypage
;
1519 for (i
= 0; i
< ns
->geom
.pgsec
; i
++)
1520 if (__test_and_clear_bit(ns
->regs
.row
+ i
,
1521 ns
->pages_written
)) {
1522 NS_DBG("erase_sector: freeing page %d\n", ns
->regs
.row
+ i
);
1527 mypage
= NS_GET_PAGE(ns
);
1528 for (i
= 0; i
< ns
->geom
.pgsec
; i
++) {
1529 if (mypage
->byte
!= NULL
) {
1530 NS_DBG("erase_sector: freeing page %d\n", ns
->regs
.row
+i
);
1531 kmem_cache_free(ns
->nand_pages_slab
, mypage
->byte
);
1532 mypage
->byte
= NULL
;
1539 * Program the specified page with the contents from the NAND buffer.
1541 static int prog_page(struct nandsim
*ns
, int num
)
1544 union ns_mem
*mypage
;
1552 NS_DBG("prog_page: writing page %d\n", ns
->regs
.row
);
1553 pg_off
= ns
->file_buf
+ ns
->regs
.column
+ ns
->regs
.off
;
1554 off
= (loff_t
)NS_RAW_OFFSET(ns
) + ns
->regs
.off
;
1555 if (!test_bit(ns
->regs
.row
, ns
->pages_written
)) {
1557 memset(ns
->file_buf
, 0xff, ns
->geom
.pgszoob
);
1560 tx
= read_file(ns
, ns
->cfile
, pg_off
, num
, off
);
1562 NS_ERR("prog_page: read error for page %d ret %ld\n", ns
->regs
.row
, (long)tx
);
1566 for (i
= 0; i
< num
; i
++)
1567 pg_off
[i
] &= ns
->buf
.byte
[i
];
1569 loff_t pos
= (loff_t
)ns
->regs
.row
* ns
->geom
.pgszoob
;
1570 tx
= write_file(ns
, ns
->cfile
, ns
->file_buf
, ns
->geom
.pgszoob
, pos
);
1571 if (tx
!= ns
->geom
.pgszoob
) {
1572 NS_ERR("prog_page: write error for page %d ret %ld\n", ns
->regs
.row
, (long)tx
);
1575 __set_bit(ns
->regs
.row
, ns
->pages_written
);
1577 tx
= write_file(ns
, ns
->cfile
, pg_off
, num
, off
);
1579 NS_ERR("prog_page: write error for page %d ret %ld\n", ns
->regs
.row
, (long)tx
);
1586 mypage
= NS_GET_PAGE(ns
);
1587 if (mypage
->byte
== NULL
) {
1588 NS_DBG("prog_page: allocating page %d\n", ns
->regs
.row
);
1590 * We allocate memory with GFP_NOFS because a flash FS may
1591 * utilize this. If it is holding an FS lock, then gets here,
1592 * then kernel memory alloc runs writeback which goes to the FS
1593 * again and deadlocks. This was seen in practice.
1595 mypage
->byte
= kmem_cache_alloc(ns
->nand_pages_slab
, GFP_NOFS
);
1596 if (mypage
->byte
== NULL
) {
1597 NS_ERR("prog_page: error allocating memory for page %d\n", ns
->regs
.row
);
1600 memset(mypage
->byte
, 0xFF, ns
->geom
.pgszoob
);
1603 pg_off
= NS_PAGE_BYTE_OFF(ns
);
1604 for (i
= 0; i
< num
; i
++)
1605 pg_off
[i
] &= ns
->buf
.byte
[i
];
1611 * If state has any action bit, perform this action.
1613 * RETURNS: 0 if success, -1 if error.
1615 static int do_state_action(struct nandsim
*ns
, uint32_t action
)
1618 int busdiv
= ns
->busw
== 8 ? 1 : 2;
1619 unsigned int erase_block_no
, page_no
;
1621 action
&= ACTION_MASK
;
1623 /* Check that page address input is correct */
1624 if (action
!= ACTION_SECERASE
&& ns
->regs
.row
>= ns
->geom
.pgnum
) {
1625 NS_WARN("do_state_action: wrong page number (%#x)\n", ns
->regs
.row
);
1633 * Copy page data to the internal buffer.
1636 /* Column shouldn't be very large */
1637 if (ns
->regs
.column
>= (ns
->geom
.pgszoob
- ns
->regs
.off
)) {
1638 NS_ERR("do_state_action: column number is too large\n");
1641 num
= ns
->geom
.pgszoob
- ns
->regs
.off
- ns
->regs
.column
;
1644 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1645 num
, NS_RAW_OFFSET(ns
) + ns
->regs
.off
);
1647 if (ns
->regs
.off
== 0)
1648 NS_LOG("read page %d\n", ns
->regs
.row
);
1649 else if (ns
->regs
.off
< ns
->geom
.pgsz
)
1650 NS_LOG("read page %d (second half)\n", ns
->regs
.row
);
1652 NS_LOG("read OOB of page %d\n", ns
->regs
.row
);
1654 NS_UDELAY(access_delay
);
1655 NS_UDELAY(input_cycle
* ns
->geom
.pgsz
/ 1000 / busdiv
);
1659 case ACTION_SECERASE
:
1665 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1669 if (ns
->regs
.row
>= ns
->geom
.pgnum
- ns
->geom
.pgsec
1670 || (ns
->regs
.row
& ~(ns
->geom
.secsz
- 1))) {
1671 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns
->regs
.row
);
1675 ns
->regs
.row
= (ns
->regs
.row
<<
1676 8 * (ns
->geom
.pgaddrbytes
- ns
->geom
.secaddrbytes
)) | ns
->regs
.column
;
1677 ns
->regs
.column
= 0;
1679 erase_block_no
= ns
->regs
.row
>> (ns
->geom
.secshift
- ns
->geom
.pgshift
);
1681 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1682 ns
->regs
.row
, NS_RAW_OFFSET(ns
));
1683 NS_LOG("erase sector %u\n", erase_block_no
);
1687 NS_MDELAY(erase_delay
);
1689 if (erase_block_wear
)
1690 update_wear(erase_block_no
);
1692 if (erase_error(erase_block_no
)) {
1693 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no
);
1699 case ACTION_PRGPAGE
:
1701 * Program page - move internal buffer data to the page.
1705 NS_WARN("do_state_action: device is write-protected, programm\n");
1709 num
= ns
->geom
.pgszoob
- ns
->regs
.off
- ns
->regs
.column
;
1710 if (num
!= ns
->regs
.count
) {
1711 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1712 ns
->regs
.count
, num
);
1716 if (prog_page(ns
, num
) == -1)
1719 page_no
= ns
->regs
.row
;
1721 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1722 num
, ns
->regs
.row
, ns
->regs
.column
, NS_RAW_OFFSET(ns
) + ns
->regs
.off
);
1723 NS_LOG("programm page %d\n", ns
->regs
.row
);
1725 NS_UDELAY(programm_delay
);
1726 NS_UDELAY(output_cycle
* ns
->geom
.pgsz
/ 1000 / busdiv
);
1728 if (write_error(page_no
)) {
1729 NS_WARN("simulating write failure in page %u\n", page_no
);
1735 case ACTION_ZEROOFF
:
1736 NS_DBG("do_state_action: set internal offset to 0\n");
1740 case ACTION_HALFOFF
:
1741 if (!(ns
->options
& OPT_PAGE512_8BIT
)) {
1742 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1743 "byte page size 8x chips\n");
1746 NS_DBG("do_state_action: set internal offset to %d\n", ns
->geom
.pgsz
/2);
1747 ns
->regs
.off
= ns
->geom
.pgsz
/2;
1751 NS_DBG("do_state_action: set internal offset to %d\n", ns
->geom
.pgsz
);
1752 ns
->regs
.off
= ns
->geom
.pgsz
;
1756 NS_DBG("do_state_action: BUG! unknown action\n");
1763 * Switch simulator's state.
1765 static void switch_state(struct nandsim
*ns
)
1769 * The current operation have already been identified.
1770 * Just follow the states chain.
1774 ns
->state
= ns
->nxstate
;
1775 ns
->nxstate
= ns
->op
[ns
->stateidx
+ 1];
1777 NS_DBG("switch_state: operation is known, switch to the next state, "
1778 "state: %s, nxstate: %s\n",
1779 get_state_name(ns
->state
), get_state_name(ns
->nxstate
));
1781 /* See, whether we need to do some action */
1782 if ((ns
->state
& ACTION_MASK
) && do_state_action(ns
, ns
->state
) < 0) {
1783 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
1789 * We don't yet know which operation we perform.
1790 * Try to identify it.
1794 * The only event causing the switch_state function to
1795 * be called with yet unknown operation is new command.
1797 ns
->state
= get_state_by_command(ns
->regs
.command
);
1799 NS_DBG("switch_state: operation is unknown, try to find it\n");
1801 if (find_operation(ns
, 0) != 0)
1804 if ((ns
->state
& ACTION_MASK
) && do_state_action(ns
, ns
->state
) < 0) {
1805 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
1810 /* For 16x devices column means the page offset in words */
1811 if ((ns
->nxstate
& STATE_ADDR_MASK
) && ns
->busw
== 16) {
1812 NS_DBG("switch_state: double the column number for 16x device\n");
1813 ns
->regs
.column
<<= 1;
1816 if (NS_STATE(ns
->nxstate
) == STATE_READY
) {
1818 * The current state is the last. Return to STATE_READY
1821 u_char status
= NS_STATUS_OK(ns
);
1823 /* In case of data states, see if all bytes were input/output */
1824 if ((ns
->state
& (STATE_DATAIN_MASK
| STATE_DATAOUT_MASK
))
1825 && ns
->regs
.count
!= ns
->regs
.num
) {
1826 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1827 ns
->regs
.num
- ns
->regs
.count
);
1828 status
= NS_STATUS_FAILED(ns
);
1831 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1833 switch_to_ready_state(ns
, status
);
1836 } else if (ns
->nxstate
& (STATE_DATAIN_MASK
| STATE_DATAOUT_MASK
)) {
1838 * If the next state is data input/output, switch to it now
1841 ns
->state
= ns
->nxstate
;
1842 ns
->nxstate
= ns
->op
[++ns
->stateidx
+ 1];
1843 ns
->regs
.num
= ns
->regs
.count
= 0;
1845 NS_DBG("switch_state: the next state is data I/O, switch, "
1846 "state: %s, nxstate: %s\n",
1847 get_state_name(ns
->state
), get_state_name(ns
->nxstate
));
1850 * Set the internal register to the count of bytes which
1851 * are expected to be input or output
1853 switch (NS_STATE(ns
->state
)) {
1856 ns
->regs
.num
= ns
->geom
.pgszoob
- ns
->regs
.off
- ns
->regs
.column
;
1859 case STATE_DATAOUT_ID
:
1860 ns
->regs
.num
= ns
->geom
.idbytes
;
1863 case STATE_DATAOUT_STATUS
:
1864 ns
->regs
.count
= ns
->regs
.num
= 0;
1868 NS_ERR("switch_state: BUG! unknown data state\n");
1871 } else if (ns
->nxstate
& STATE_ADDR_MASK
) {
1873 * If the next state is address input, set the internal
1874 * register to the number of expected address bytes
1879 switch (NS_STATE(ns
->nxstate
)) {
1880 case STATE_ADDR_PAGE
:
1881 ns
->regs
.num
= ns
->geom
.pgaddrbytes
;
1884 case STATE_ADDR_SEC
:
1885 ns
->regs
.num
= ns
->geom
.secaddrbytes
;
1888 case STATE_ADDR_ZERO
:
1892 case STATE_ADDR_COLUMN
:
1893 /* Column address is always 2 bytes */
1894 ns
->regs
.num
= ns
->geom
.pgaddrbytes
- ns
->geom
.secaddrbytes
;
1898 NS_ERR("switch_state: BUG! unknown address state\n");
1902 * Just reset internal counters.
1910 static u_char
ns_nand_read_byte(struct mtd_info
*mtd
)
1912 struct nandsim
*ns
= ((struct nand_chip
*)mtd
->priv
)->priv
;
1915 /* Sanity and correctness checks */
1916 if (!ns
->lines
.ce
) {
1917 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint
)outb
);
1920 if (ns
->lines
.ale
|| ns
->lines
.cle
) {
1921 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint
)outb
);
1924 if (!(ns
->state
& STATE_DATAOUT_MASK
)) {
1925 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1926 "return %#x\n", get_state_name(ns
->state
), (uint
)outb
);
1930 /* Status register may be read as many times as it is wanted */
1931 if (NS_STATE(ns
->state
) == STATE_DATAOUT_STATUS
) {
1932 NS_DBG("read_byte: return %#x status\n", ns
->regs
.status
);
1933 return ns
->regs
.status
;
1936 /* Check if there is any data in the internal buffer which may be read */
1937 if (ns
->regs
.count
== ns
->regs
.num
) {
1938 NS_WARN("read_byte: no more data to output, return %#x\n", (uint
)outb
);
1942 switch (NS_STATE(ns
->state
)) {
1944 if (ns
->busw
== 8) {
1945 outb
= ns
->buf
.byte
[ns
->regs
.count
];
1946 ns
->regs
.count
+= 1;
1948 outb
= (u_char
)cpu_to_le16(ns
->buf
.word
[ns
->regs
.count
>> 1]);
1949 ns
->regs
.count
+= 2;
1952 case STATE_DATAOUT_ID
:
1953 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns
->regs
.count
, ns
->regs
.num
);
1954 outb
= ns
->ids
[ns
->regs
.count
];
1955 ns
->regs
.count
+= 1;
1961 if (ns
->regs
.count
== ns
->regs
.num
) {
1962 NS_DBG("read_byte: all bytes were read\n");
1964 if (NS_STATE(ns
->nxstate
) == STATE_READY
)
1971 static void ns_nand_write_byte(struct mtd_info
*mtd
, u_char byte
)
1973 struct nandsim
*ns
= ((struct nand_chip
*)mtd
->priv
)->priv
;
1975 /* Sanity and correctness checks */
1976 if (!ns
->lines
.ce
) {
1977 NS_ERR("write_byte: chip is disabled, ignore write\n");
1980 if (ns
->lines
.ale
&& ns
->lines
.cle
) {
1981 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1985 if (ns
->lines
.cle
== 1) {
1987 * The byte written is a command.
1990 if (byte
== NAND_CMD_RESET
) {
1991 NS_LOG("reset chip\n");
1992 switch_to_ready_state(ns
, NS_STATUS_OK(ns
));
1996 /* Check that the command byte is correct */
1997 if (check_command(byte
)) {
1998 NS_ERR("write_byte: unknown command %#x\n", (uint
)byte
);
2002 if (NS_STATE(ns
->state
) == STATE_DATAOUT_STATUS
2003 || NS_STATE(ns
->state
) == STATE_DATAOUT
) {
2004 int row
= ns
->regs
.row
;
2007 if (byte
== NAND_CMD_RNDOUT
)
2011 /* Check if chip is expecting command */
2012 if (NS_STATE(ns
->nxstate
) != STATE_UNKNOWN
&& !(ns
->nxstate
& STATE_CMD_MASK
)) {
2013 /* Do not warn if only 2 id bytes are read */
2014 if (!(ns
->regs
.command
== NAND_CMD_READID
&&
2015 NS_STATE(ns
->state
) == STATE_DATAOUT_ID
&& ns
->regs
.count
== 2)) {
2017 * We are in situation when something else (not command)
2018 * was expected but command was input. In this case ignore
2019 * previous command(s)/state(s) and accept the last one.
2021 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2022 "ignore previous states\n", (uint
)byte
, get_state_name(ns
->nxstate
));
2024 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2027 NS_DBG("command byte corresponding to %s state accepted\n",
2028 get_state_name(get_state_by_command(byte
)));
2029 ns
->regs
.command
= byte
;
2032 } else if (ns
->lines
.ale
== 1) {
2034 * The byte written is an address.
2037 if (NS_STATE(ns
->nxstate
) == STATE_UNKNOWN
) {
2039 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2041 if (find_operation(ns
, 1) < 0)
2044 if ((ns
->state
& ACTION_MASK
) && do_state_action(ns
, ns
->state
) < 0) {
2045 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2050 switch (NS_STATE(ns
->nxstate
)) {
2051 case STATE_ADDR_PAGE
:
2052 ns
->regs
.num
= ns
->geom
.pgaddrbytes
;
2054 case STATE_ADDR_SEC
:
2055 ns
->regs
.num
= ns
->geom
.secaddrbytes
;
2057 case STATE_ADDR_ZERO
:
2065 /* Check that chip is expecting address */
2066 if (!(ns
->nxstate
& STATE_ADDR_MASK
)) {
2067 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2068 "switch to STATE_READY\n", (uint
)byte
, get_state_name(ns
->nxstate
));
2069 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2073 /* Check if this is expected byte */
2074 if (ns
->regs
.count
== ns
->regs
.num
) {
2075 NS_ERR("write_byte: no more address bytes expected\n");
2076 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2080 accept_addr_byte(ns
, byte
);
2082 ns
->regs
.count
+= 1;
2084 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2085 (uint
)byte
, ns
->regs
.count
, ns
->regs
.num
);
2087 if (ns
->regs
.count
== ns
->regs
.num
) {
2088 NS_DBG("address (%#x, %#x) is accepted\n", ns
->regs
.row
, ns
->regs
.column
);
2094 * The byte written is an input data.
2097 /* Check that chip is expecting data input */
2098 if (!(ns
->state
& STATE_DATAIN_MASK
)) {
2099 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2100 "switch to %s\n", (uint
)byte
,
2101 get_state_name(ns
->state
), get_state_name(STATE_READY
));
2102 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2106 /* Check if this is expected byte */
2107 if (ns
->regs
.count
== ns
->regs
.num
) {
2108 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2113 if (ns
->busw
== 8) {
2114 ns
->buf
.byte
[ns
->regs
.count
] = byte
;
2115 ns
->regs
.count
+= 1;
2117 ns
->buf
.word
[ns
->regs
.count
>> 1] = cpu_to_le16((uint16_t)byte
);
2118 ns
->regs
.count
+= 2;
2125 static void ns_hwcontrol(struct mtd_info
*mtd
, int cmd
, unsigned int bitmask
)
2127 struct nandsim
*ns
= ((struct nand_chip
*)mtd
->priv
)->priv
;
2129 ns
->lines
.cle
= bitmask
& NAND_CLE
? 1 : 0;
2130 ns
->lines
.ale
= bitmask
& NAND_ALE
? 1 : 0;
2131 ns
->lines
.ce
= bitmask
& NAND_NCE
? 1 : 0;
2133 if (cmd
!= NAND_CMD_NONE
)
2134 ns_nand_write_byte(mtd
, cmd
);
2137 static int ns_device_ready(struct mtd_info
*mtd
)
2139 NS_DBG("device_ready\n");
2143 static uint16_t ns_nand_read_word(struct mtd_info
*mtd
)
2145 struct nand_chip
*chip
= (struct nand_chip
*)mtd
->priv
;
2147 NS_DBG("read_word\n");
2149 return chip
->read_byte(mtd
) | (chip
->read_byte(mtd
) << 8);
2152 static void ns_nand_write_buf(struct mtd_info
*mtd
, const u_char
*buf
, int len
)
2154 struct nandsim
*ns
= ((struct nand_chip
*)mtd
->priv
)->priv
;
2156 /* Check that chip is expecting data input */
2157 if (!(ns
->state
& STATE_DATAIN_MASK
)) {
2158 NS_ERR("write_buf: data input isn't expected, state is %s, "
2159 "switch to STATE_READY\n", get_state_name(ns
->state
));
2160 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2164 /* Check if these are expected bytes */
2165 if (ns
->regs
.count
+ len
> ns
->regs
.num
) {
2166 NS_ERR("write_buf: too many input bytes\n");
2167 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2171 memcpy(ns
->buf
.byte
+ ns
->regs
.count
, buf
, len
);
2172 ns
->regs
.count
+= len
;
2174 if (ns
->regs
.count
== ns
->regs
.num
) {
2175 NS_DBG("write_buf: %d bytes were written\n", ns
->regs
.count
);
2179 static void ns_nand_read_buf(struct mtd_info
*mtd
, u_char
*buf
, int len
)
2181 struct nandsim
*ns
= ((struct nand_chip
*)mtd
->priv
)->priv
;
2183 /* Sanity and correctness checks */
2184 if (!ns
->lines
.ce
) {
2185 NS_ERR("read_buf: chip is disabled\n");
2188 if (ns
->lines
.ale
|| ns
->lines
.cle
) {
2189 NS_ERR("read_buf: ALE or CLE pin is high\n");
2192 if (!(ns
->state
& STATE_DATAOUT_MASK
)) {
2193 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2194 get_state_name(ns
->state
));
2198 if (NS_STATE(ns
->state
) != STATE_DATAOUT
) {
2201 for (i
= 0; i
< len
; i
++)
2202 buf
[i
] = ((struct nand_chip
*)mtd
->priv
)->read_byte(mtd
);
2207 /* Check if these are expected bytes */
2208 if (ns
->regs
.count
+ len
> ns
->regs
.num
) {
2209 NS_ERR("read_buf: too many bytes to read\n");
2210 switch_to_ready_state(ns
, NS_STATUS_FAILED(ns
));
2214 memcpy(buf
, ns
->buf
.byte
+ ns
->regs
.count
, len
);
2215 ns
->regs
.count
+= len
;
2217 if (ns
->regs
.count
== ns
->regs
.num
) {
2218 if (NS_STATE(ns
->nxstate
) == STATE_READY
)
2226 * Module initialization function
2228 static int __init
ns_init_module(void)
2230 struct nand_chip
*chip
;
2231 struct nandsim
*nand
;
2232 int retval
= -ENOMEM
, i
;
2234 if (bus_width
!= 8 && bus_width
!= 16) {
2235 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width
);
2239 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2240 nsmtd
= kzalloc(sizeof(struct mtd_info
) + sizeof(struct nand_chip
)
2241 + sizeof(struct nandsim
), GFP_KERNEL
);
2243 NS_ERR("unable to allocate core structures.\n");
2246 chip
= (struct nand_chip
*)(nsmtd
+ 1);
2247 nsmtd
->priv
= (void *)chip
;
2248 nand
= (struct nandsim
*)(chip
+ 1);
2249 chip
->priv
= (void *)nand
;
2252 * Register simulator's callbacks.
2254 chip
->cmd_ctrl
= ns_hwcontrol
;
2255 chip
->read_byte
= ns_nand_read_byte
;
2256 chip
->dev_ready
= ns_device_ready
;
2257 chip
->write_buf
= ns_nand_write_buf
;
2258 chip
->read_buf
= ns_nand_read_buf
;
2259 chip
->read_word
= ns_nand_read_word
;
2260 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2261 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2262 /* and 'badblocks' parameters to work */
2263 chip
->options
|= NAND_SKIP_BBTSCAN
;
2267 chip
->bbt_options
|= NAND_BBT_NO_OOB
;
2269 chip
->bbt_options
|= NAND_BBT_USE_FLASH
;
2273 NS_ERR("bbt has to be 0..2\n");
2278 * Perform minimum nandsim structure initialization to handle
2279 * the initial ID read command correctly
2281 if (id_bytes
[6] != 0xFF || id_bytes
[7] != 0xFF)
2282 nand
->geom
.idbytes
= 8;
2283 else if (id_bytes
[4] != 0xFF || id_bytes
[5] != 0xFF)
2284 nand
->geom
.idbytes
= 6;
2285 else if (id_bytes
[2] != 0xFF || id_bytes
[3] != 0xFF)
2286 nand
->geom
.idbytes
= 4;
2288 nand
->geom
.idbytes
= 2;
2289 nand
->regs
.status
= NS_STATUS_OK(nand
);
2290 nand
->nxstate
= STATE_UNKNOWN
;
2291 nand
->options
|= OPT_PAGE512
; /* temporary value */
2292 memcpy(nand
->ids
, id_bytes
, sizeof(nand
->ids
));
2293 if (bus_width
== 16) {
2295 chip
->options
|= NAND_BUSWIDTH_16
;
2298 nsmtd
->owner
= THIS_MODULE
;
2300 if ((retval
= parse_weakblocks()) != 0)
2303 if ((retval
= parse_weakpages()) != 0)
2306 if ((retval
= parse_gravepages()) != 0)
2309 retval
= nand_scan_ident(nsmtd
, 1, NULL
);
2311 NS_ERR("cannot scan NAND Simulator device\n");
2318 unsigned int eccsteps
, eccbytes
;
2319 if (!mtd_nand_has_bch()) {
2320 NS_ERR("BCH ECC support is disabled\n");
2324 /* use 512-byte ecc blocks */
2325 eccsteps
= nsmtd
->writesize
/512;
2326 eccbytes
= (bch
*13+7)/8;
2327 /* do not bother supporting small page devices */
2328 if ((nsmtd
->oobsize
< 64) || !eccsteps
) {
2329 NS_ERR("bch not available on small page devices\n");
2333 if ((eccbytes
*eccsteps
+2) > nsmtd
->oobsize
) {
2334 NS_ERR("invalid bch value %u\n", bch
);
2338 chip
->ecc
.mode
= NAND_ECC_SOFT_BCH
;
2339 chip
->ecc
.size
= 512;
2340 chip
->ecc
.strength
= bch
;
2341 chip
->ecc
.bytes
= eccbytes
;
2342 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch
, chip
->ecc
.size
);
2345 retval
= nand_scan_tail(nsmtd
);
2347 NS_ERR("can't register NAND Simulator\n");
2354 uint64_t new_size
= (uint64_t)nsmtd
->erasesize
<< overridesize
;
2355 if (new_size
>> overridesize
!= nsmtd
->erasesize
) {
2356 NS_ERR("overridesize is too big\n");
2360 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2361 nsmtd
->size
= new_size
;
2362 chip
->chipsize
= new_size
;
2363 chip
->chip_shift
= ffs(nsmtd
->erasesize
) + overridesize
- 1;
2364 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2367 if ((retval
= setup_wear_reporting(nsmtd
)) != 0)
2370 if ((retval
= nandsim_debugfs_create(nand
)) != 0)
2373 if ((retval
= init_nandsim(nsmtd
)) != 0)
2376 if ((retval
= chip
->scan_bbt(nsmtd
)) != 0)
2379 if ((retval
= parse_badblocks(nand
, nsmtd
)) != 0)
2382 /* Register NAND partitions */
2383 retval
= mtd_device_register(nsmtd
, &nand
->partitions
[0],
2392 nand_release(nsmtd
);
2393 for (i
= 0;i
< ARRAY_SIZE(nand
->partitions
); ++i
)
2394 kfree(nand
->partitions
[i
].name
);
2402 module_init(ns_init_module
);
2405 * Module clean-up function
2407 static void __exit
ns_cleanup_module(void)
2409 struct nandsim
*ns
= ((struct nand_chip
*)nsmtd
->priv
)->priv
;
2412 nandsim_debugfs_remove(ns
);
2413 free_nandsim(ns
); /* Free nandsim private resources */
2414 nand_release(nsmtd
); /* Unregister driver */
2415 for (i
= 0;i
< ARRAY_SIZE(ns
->partitions
); ++i
)
2416 kfree(ns
->partitions
[i
].name
);
2417 kfree(nsmtd
); /* Free other structures */
2421 module_exit(ns_cleanup_module
);
2423 MODULE_LICENSE ("GPL");
2424 MODULE_AUTHOR ("Artem B. Bityuckiy");
2425 MODULE_DESCRIPTION ("The NAND flash simulator");