fbdev: Modify vsync timing calculation in wm8505fb
[deliverable/linux.git] / drivers / net / au1000_eth.c
1 /*
2 *
3 * Alchemy Au1x00 ethernet driver
4 *
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
14 *
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
17 *
18 * ########################################################################
19 *
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
23 *
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
32 *
33 * ########################################################################
34 *
35 *
36 */
37 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
38
39 #include <linux/capability.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/string.h>
44 #include <linux/timer.h>
45 #include <linux/errno.h>
46 #include <linux/in.h>
47 #include <linux/ioport.h>
48 #include <linux/bitops.h>
49 #include <linux/slab.h>
50 #include <linux/interrupt.h>
51 #include <linux/init.h>
52 #include <linux/netdevice.h>
53 #include <linux/etherdevice.h>
54 #include <linux/ethtool.h>
55 #include <linux/mii.h>
56 #include <linux/skbuff.h>
57 #include <linux/delay.h>
58 #include <linux/crc32.h>
59 #include <linux/phy.h>
60 #include <linux/platform_device.h>
61 #include <linux/cpu.h>
62 #include <linux/io.h>
63
64 #include <asm/mipsregs.h>
65 #include <asm/irq.h>
66 #include <asm/processor.h>
67
68 #include <au1000.h>
69 #include <au1xxx_eth.h>
70 #include <prom.h>
71
72 #include "au1000_eth.h"
73
74 #ifdef AU1000_ETH_DEBUG
75 static int au1000_debug = 5;
76 #else
77 static int au1000_debug = 3;
78 #endif
79
80 #define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
81 NETIF_MSG_PROBE | \
82 NETIF_MSG_LINK)
83
84 #define DRV_NAME "au1000_eth"
85 #define DRV_VERSION "1.7"
86 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
87 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
88
89 MODULE_AUTHOR(DRV_AUTHOR);
90 MODULE_DESCRIPTION(DRV_DESC);
91 MODULE_LICENSE("GPL");
92 MODULE_VERSION(DRV_VERSION);
93
94 /*
95 * Theory of operation
96 *
97 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
98 * There are four receive and four transmit descriptors. These
99 * descriptors are not in memory; rather, they are just a set of
100 * hardware registers.
101 *
102 * Since the Au1000 has a coherent data cache, the receive and
103 * transmit buffers are allocated from the KSEG0 segment. The
104 * hardware registers, however, are still mapped at KSEG1 to
105 * make sure there's no out-of-order writes, and that all writes
106 * complete immediately.
107 */
108
109 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
110
111 /*
112 * board-specific configurations
113 *
114 * PHY detection algorithm
115 *
116 * If phy_static_config is undefined, the PHY setup is
117 * autodetected:
118 *
119 * mii_probe() first searches the current MAC's MII bus for a PHY,
120 * selecting the first (or last, if phy_search_highest_addr is
121 * defined) PHY address not already claimed by another netdev.
122 *
123 * If nothing was found that way when searching for the 2nd ethernet
124 * controller's PHY and phy1_search_mac0 is defined, then
125 * the first MII bus is searched as well for an unclaimed PHY; this is
126 * needed in case of a dual-PHY accessible only through the MAC0's MII
127 * bus.
128 *
129 * Finally, if no PHY is found, then the corresponding ethernet
130 * controller is not registered to the network subsystem.
131 */
132
133 /* autodetection defaults: phy1_search_mac0 */
134
135 /* static PHY setup
136 *
137 * most boards PHY setup should be detectable properly with the
138 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
139 * you have a switch attached, or want to use the PHY's interrupt
140 * notification capabilities) you can provide a static PHY
141 * configuration here
142 *
143 * IRQs may only be set, if a PHY address was configured
144 * If a PHY address is given, also a bus id is required to be set
145 *
146 * ps: make sure the used irqs are configured properly in the board
147 * specific irq-map
148 */
149
150 static void au1000_enable_mac(struct net_device *dev, int force_reset)
151 {
152 unsigned long flags;
153 struct au1000_private *aup = netdev_priv(dev);
154
155 spin_lock_irqsave(&aup->lock, flags);
156
157 if (force_reset || (!aup->mac_enabled)) {
158 writel(MAC_EN_CLOCK_ENABLE, &aup->enable);
159 au_sync_delay(2);
160 writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
161 | MAC_EN_CLOCK_ENABLE), &aup->enable);
162 au_sync_delay(2);
163
164 aup->mac_enabled = 1;
165 }
166
167 spin_unlock_irqrestore(&aup->lock, flags);
168 }
169
170 /*
171 * MII operations
172 */
173 static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
174 {
175 struct au1000_private *aup = netdev_priv(dev);
176 u32 *const mii_control_reg = &aup->mac->mii_control;
177 u32 *const mii_data_reg = &aup->mac->mii_data;
178 u32 timedout = 20;
179 u32 mii_control;
180
181 while (readl(mii_control_reg) & MAC_MII_BUSY) {
182 mdelay(1);
183 if (--timedout == 0) {
184 netdev_err(dev, "read_MII busy timeout!!\n");
185 return -1;
186 }
187 }
188
189 mii_control = MAC_SET_MII_SELECT_REG(reg) |
190 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
191
192 writel(mii_control, mii_control_reg);
193
194 timedout = 20;
195 while (readl(mii_control_reg) & MAC_MII_BUSY) {
196 mdelay(1);
197 if (--timedout == 0) {
198 netdev_err(dev, "mdio_read busy timeout!!\n");
199 return -1;
200 }
201 }
202 return readl(mii_data_reg);
203 }
204
205 static void au1000_mdio_write(struct net_device *dev, int phy_addr,
206 int reg, u16 value)
207 {
208 struct au1000_private *aup = netdev_priv(dev);
209 u32 *const mii_control_reg = &aup->mac->mii_control;
210 u32 *const mii_data_reg = &aup->mac->mii_data;
211 u32 timedout = 20;
212 u32 mii_control;
213
214 while (readl(mii_control_reg) & MAC_MII_BUSY) {
215 mdelay(1);
216 if (--timedout == 0) {
217 netdev_err(dev, "mdio_write busy timeout!!\n");
218 return;
219 }
220 }
221
222 mii_control = MAC_SET_MII_SELECT_REG(reg) |
223 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
224
225 writel(value, mii_data_reg);
226 writel(mii_control, mii_control_reg);
227 }
228
229 static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
230 {
231 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
232 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus)
233 */
234 struct net_device *const dev = bus->priv;
235
236 /* make sure the MAC associated with this
237 * mii_bus is enabled
238 */
239 au1000_enable_mac(dev, 0);
240
241 return au1000_mdio_read(dev, phy_addr, regnum);
242 }
243
244 static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
245 u16 value)
246 {
247 struct net_device *const dev = bus->priv;
248
249 /* make sure the MAC associated with this
250 * mii_bus is enabled
251 */
252 au1000_enable_mac(dev, 0);
253
254 au1000_mdio_write(dev, phy_addr, regnum, value);
255 return 0;
256 }
257
258 static int au1000_mdiobus_reset(struct mii_bus *bus)
259 {
260 struct net_device *const dev = bus->priv;
261
262 /* make sure the MAC associated with this
263 * mii_bus is enabled
264 */
265 au1000_enable_mac(dev, 0);
266
267 return 0;
268 }
269
270 static void au1000_hard_stop(struct net_device *dev)
271 {
272 struct au1000_private *aup = netdev_priv(dev);
273 u32 reg;
274
275 netif_dbg(aup, drv, dev, "hard stop\n");
276
277 reg = readl(&aup->mac->control);
278 reg &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
279 writel(reg, &aup->mac->control);
280 au_sync_delay(10);
281 }
282
283 static void au1000_enable_rx_tx(struct net_device *dev)
284 {
285 struct au1000_private *aup = netdev_priv(dev);
286 u32 reg;
287
288 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
289
290 reg = readl(&aup->mac->control);
291 reg |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
292 writel(reg, &aup->mac->control);
293 au_sync_delay(10);
294 }
295
296 static void
297 au1000_adjust_link(struct net_device *dev)
298 {
299 struct au1000_private *aup = netdev_priv(dev);
300 struct phy_device *phydev = aup->phy_dev;
301 unsigned long flags;
302 u32 reg;
303
304 int status_change = 0;
305
306 BUG_ON(!aup->phy_dev);
307
308 spin_lock_irqsave(&aup->lock, flags);
309
310 if (phydev->link && (aup->old_speed != phydev->speed)) {
311 /* speed changed */
312
313 switch (phydev->speed) {
314 case SPEED_10:
315 case SPEED_100:
316 break;
317 default:
318 netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
319 phydev->speed);
320 break;
321 }
322
323 aup->old_speed = phydev->speed;
324
325 status_change = 1;
326 }
327
328 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
329 /* duplex mode changed */
330
331 /* switching duplex mode requires to disable rx and tx! */
332 au1000_hard_stop(dev);
333
334 reg = readl(&aup->mac->control);
335 if (DUPLEX_FULL == phydev->duplex) {
336 reg |= MAC_FULL_DUPLEX;
337 reg &= ~MAC_DISABLE_RX_OWN;
338 } else {
339 reg &= ~MAC_FULL_DUPLEX;
340 reg |= MAC_DISABLE_RX_OWN;
341 }
342 writel(reg, &aup->mac->control);
343 au_sync_delay(1);
344
345 au1000_enable_rx_tx(dev);
346 aup->old_duplex = phydev->duplex;
347
348 status_change = 1;
349 }
350
351 if (phydev->link != aup->old_link) {
352 /* link state changed */
353
354 if (!phydev->link) {
355 /* link went down */
356 aup->old_speed = 0;
357 aup->old_duplex = -1;
358 }
359
360 aup->old_link = phydev->link;
361 status_change = 1;
362 }
363
364 spin_unlock_irqrestore(&aup->lock, flags);
365
366 if (status_change) {
367 if (phydev->link)
368 netdev_info(dev, "link up (%d/%s)\n",
369 phydev->speed,
370 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
371 else
372 netdev_info(dev, "link down\n");
373 }
374 }
375
376 static int au1000_mii_probe(struct net_device *dev)
377 {
378 struct au1000_private *const aup = netdev_priv(dev);
379 struct phy_device *phydev = NULL;
380 int phy_addr;
381
382 if (aup->phy_static_config) {
383 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
384
385 if (aup->phy_addr)
386 phydev = aup->mii_bus->phy_map[aup->phy_addr];
387 else
388 netdev_info(dev, "using PHY-less setup\n");
389 return 0;
390 }
391
392 /* find the first (lowest address) PHY
393 * on the current MAC's MII bus
394 */
395 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
396 if (aup->mii_bus->phy_map[phy_addr]) {
397 phydev = aup->mii_bus->phy_map[phy_addr];
398 if (!aup->phy_search_highest_addr)
399 /* break out with first one found */
400 break;
401 }
402
403 if (aup->phy1_search_mac0) {
404 /* try harder to find a PHY */
405 if (!phydev && (aup->mac_id == 1)) {
406 /* no PHY found, maybe we have a dual PHY? */
407 dev_info(&dev->dev, ": no PHY found on MAC1, "
408 "let's see if it's attached to MAC0...\n");
409
410 /* find the first (lowest address) non-attached
411 * PHY on the MAC0 MII bus
412 */
413 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
414 struct phy_device *const tmp_phydev =
415 aup->mii_bus->phy_map[phy_addr];
416
417 if (aup->mac_id == 1)
418 break;
419
420 /* no PHY here... */
421 if (!tmp_phydev)
422 continue;
423
424 /* already claimed by MAC0 */
425 if (tmp_phydev->attached_dev)
426 continue;
427
428 phydev = tmp_phydev;
429 break; /* found it */
430 }
431 }
432 }
433
434 if (!phydev) {
435 netdev_err(dev, "no PHY found\n");
436 return -1;
437 }
438
439 /* now we are supposed to have a proper phydev, to attach to... */
440 BUG_ON(phydev->attached_dev);
441
442 phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link,
443 0, PHY_INTERFACE_MODE_MII);
444
445 if (IS_ERR(phydev)) {
446 netdev_err(dev, "Could not attach to PHY\n");
447 return PTR_ERR(phydev);
448 }
449
450 /* mask with MAC supported features */
451 phydev->supported &= (SUPPORTED_10baseT_Half
452 | SUPPORTED_10baseT_Full
453 | SUPPORTED_100baseT_Half
454 | SUPPORTED_100baseT_Full
455 | SUPPORTED_Autoneg
456 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
457 | SUPPORTED_MII
458 | SUPPORTED_TP);
459
460 phydev->advertising = phydev->supported;
461
462 aup->old_link = 0;
463 aup->old_speed = 0;
464 aup->old_duplex = -1;
465 aup->phy_dev = phydev;
466
467 netdev_info(dev, "attached PHY driver [%s] "
468 "(mii_bus:phy_addr=%s, irq=%d)\n",
469 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
470
471 return 0;
472 }
473
474
475 /*
476 * Buffer allocation/deallocation routines. The buffer descriptor returned
477 * has the virtual and dma address of a buffer suitable for
478 * both, receive and transmit operations.
479 */
480 static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)
481 {
482 struct db_dest *pDB;
483 pDB = aup->pDBfree;
484
485 if (pDB)
486 aup->pDBfree = pDB->pnext;
487
488 return pDB;
489 }
490
491 void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)
492 {
493 struct db_dest *pDBfree = aup->pDBfree;
494 if (pDBfree)
495 pDBfree->pnext = pDB;
496 aup->pDBfree = pDB;
497 }
498
499 static void au1000_reset_mac_unlocked(struct net_device *dev)
500 {
501 struct au1000_private *const aup = netdev_priv(dev);
502 int i;
503
504 au1000_hard_stop(dev);
505
506 writel(MAC_EN_CLOCK_ENABLE, &aup->enable);
507 au_sync_delay(2);
508 writel(0, &aup->enable);
509 au_sync_delay(2);
510
511 aup->tx_full = 0;
512 for (i = 0; i < NUM_RX_DMA; i++) {
513 /* reset control bits */
514 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
515 }
516 for (i = 0; i < NUM_TX_DMA; i++) {
517 /* reset control bits */
518 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
519 }
520
521 aup->mac_enabled = 0;
522
523 }
524
525 static void au1000_reset_mac(struct net_device *dev)
526 {
527 struct au1000_private *const aup = netdev_priv(dev);
528 unsigned long flags;
529
530 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
531 (unsigned)aup);
532
533 spin_lock_irqsave(&aup->lock, flags);
534
535 au1000_reset_mac_unlocked(dev);
536
537 spin_unlock_irqrestore(&aup->lock, flags);
538 }
539
540 /*
541 * Setup the receive and transmit "rings". These pointers are the addresses
542 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
543 * these are not descriptors sitting in memory.
544 */
545 static void
546 au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
547 {
548 int i;
549
550 for (i = 0; i < NUM_RX_DMA; i++) {
551 aup->rx_dma_ring[i] =
552 (struct rx_dma *)
553 (rx_base + sizeof(struct rx_dma)*i);
554 }
555 for (i = 0; i < NUM_TX_DMA; i++) {
556 aup->tx_dma_ring[i] =
557 (struct tx_dma *)
558 (tx_base + sizeof(struct tx_dma)*i);
559 }
560 }
561
562 /*
563 * ethtool operations
564 */
565
566 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
567 {
568 struct au1000_private *aup = netdev_priv(dev);
569
570 if (aup->phy_dev)
571 return phy_ethtool_gset(aup->phy_dev, cmd);
572
573 return -EINVAL;
574 }
575
576 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
577 {
578 struct au1000_private *aup = netdev_priv(dev);
579
580 if (!capable(CAP_NET_ADMIN))
581 return -EPERM;
582
583 if (aup->phy_dev)
584 return phy_ethtool_sset(aup->phy_dev, cmd);
585
586 return -EINVAL;
587 }
588
589 static void
590 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
591 {
592 struct au1000_private *aup = netdev_priv(dev);
593
594 strcpy(info->driver, DRV_NAME);
595 strcpy(info->version, DRV_VERSION);
596 info->fw_version[0] = '\0';
597 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
598 info->regdump_len = 0;
599 }
600
601 static void au1000_set_msglevel(struct net_device *dev, u32 value)
602 {
603 struct au1000_private *aup = netdev_priv(dev);
604 aup->msg_enable = value;
605 }
606
607 static u32 au1000_get_msglevel(struct net_device *dev)
608 {
609 struct au1000_private *aup = netdev_priv(dev);
610 return aup->msg_enable;
611 }
612
613 static const struct ethtool_ops au1000_ethtool_ops = {
614 .get_settings = au1000_get_settings,
615 .set_settings = au1000_set_settings,
616 .get_drvinfo = au1000_get_drvinfo,
617 .get_link = ethtool_op_get_link,
618 .get_msglevel = au1000_get_msglevel,
619 .set_msglevel = au1000_set_msglevel,
620 };
621
622
623 /*
624 * Initialize the interface.
625 *
626 * When the device powers up, the clocks are disabled and the
627 * mac is in reset state. When the interface is closed, we
628 * do the same -- reset the device and disable the clocks to
629 * conserve power. Thus, whenever au1000_init() is called,
630 * the device should already be in reset state.
631 */
632 static int au1000_init(struct net_device *dev)
633 {
634 struct au1000_private *aup = netdev_priv(dev);
635 unsigned long flags;
636 int i;
637 u32 control;
638
639 netif_dbg(aup, hw, dev, "au1000_init\n");
640
641 /* bring the device out of reset */
642 au1000_enable_mac(dev, 1);
643
644 spin_lock_irqsave(&aup->lock, flags);
645
646 writel(0, &aup->mac->control);
647 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
648 aup->tx_tail = aup->tx_head;
649 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
650
651 writel(dev->dev_addr[5]<<8 | dev->dev_addr[4],
652 &aup->mac->mac_addr_high);
653 writel(dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
654 dev->dev_addr[1]<<8 | dev->dev_addr[0],
655 &aup->mac->mac_addr_low);
656
657
658 for (i = 0; i < NUM_RX_DMA; i++)
659 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
660
661 au_sync();
662
663 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
664 #ifndef CONFIG_CPU_LITTLE_ENDIAN
665 control |= MAC_BIG_ENDIAN;
666 #endif
667 if (aup->phy_dev) {
668 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
669 control |= MAC_FULL_DUPLEX;
670 else
671 control |= MAC_DISABLE_RX_OWN;
672 } else { /* PHY-less op, assume full-duplex */
673 control |= MAC_FULL_DUPLEX;
674 }
675
676 writel(control, &aup->mac->control);
677 writel(0x8100, &aup->mac->vlan1_tag); /* activate vlan support */
678 au_sync();
679
680 spin_unlock_irqrestore(&aup->lock, flags);
681 return 0;
682 }
683
684 static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
685 {
686 struct net_device_stats *ps = &dev->stats;
687
688 ps->rx_packets++;
689 if (status & RX_MCAST_FRAME)
690 ps->multicast++;
691
692 if (status & RX_ERROR) {
693 ps->rx_errors++;
694 if (status & RX_MISSED_FRAME)
695 ps->rx_missed_errors++;
696 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
697 ps->rx_length_errors++;
698 if (status & RX_CRC_ERROR)
699 ps->rx_crc_errors++;
700 if (status & RX_COLL)
701 ps->collisions++;
702 } else
703 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
704
705 }
706
707 /*
708 * Au1000 receive routine.
709 */
710 static int au1000_rx(struct net_device *dev)
711 {
712 struct au1000_private *aup = netdev_priv(dev);
713 struct sk_buff *skb;
714 struct rx_dma *prxd;
715 u32 buff_stat, status;
716 struct db_dest *pDB;
717 u32 frmlen;
718
719 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
720
721 prxd = aup->rx_dma_ring[aup->rx_head];
722 buff_stat = prxd->buff_stat;
723 while (buff_stat & RX_T_DONE) {
724 status = prxd->status;
725 pDB = aup->rx_db_inuse[aup->rx_head];
726 au1000_update_rx_stats(dev, status);
727 if (!(status & RX_ERROR)) {
728
729 /* good frame */
730 frmlen = (status & RX_FRAME_LEN_MASK);
731 frmlen -= 4; /* Remove FCS */
732 skb = dev_alloc_skb(frmlen + 2);
733 if (skb == NULL) {
734 netdev_err(dev, "Memory squeeze, dropping packet.\n");
735 dev->stats.rx_dropped++;
736 continue;
737 }
738 skb_reserve(skb, 2); /* 16 byte IP header align */
739 skb_copy_to_linear_data(skb,
740 (unsigned char *)pDB->vaddr, frmlen);
741 skb_put(skb, frmlen);
742 skb->protocol = eth_type_trans(skb, dev);
743 netif_rx(skb); /* pass the packet to upper layers */
744 } else {
745 if (au1000_debug > 4) {
746 pr_err("rx_error(s):");
747 if (status & RX_MISSED_FRAME)
748 pr_cont(" miss");
749 if (status & RX_WDOG_TIMER)
750 pr_cont(" wdog");
751 if (status & RX_RUNT)
752 pr_cont(" runt");
753 if (status & RX_OVERLEN)
754 pr_cont(" overlen");
755 if (status & RX_COLL)
756 pr_cont(" coll");
757 if (status & RX_MII_ERROR)
758 pr_cont(" mii error");
759 if (status & RX_CRC_ERROR)
760 pr_cont(" crc error");
761 if (status & RX_LEN_ERROR)
762 pr_cont(" len error");
763 if (status & RX_U_CNTRL_FRAME)
764 pr_cont(" u control frame");
765 pr_cont("\n");
766 }
767 }
768 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
769 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
770 au_sync();
771
772 /* next descriptor */
773 prxd = aup->rx_dma_ring[aup->rx_head];
774 buff_stat = prxd->buff_stat;
775 }
776 return 0;
777 }
778
779 static void au1000_update_tx_stats(struct net_device *dev, u32 status)
780 {
781 struct au1000_private *aup = netdev_priv(dev);
782 struct net_device_stats *ps = &dev->stats;
783
784 if (status & TX_FRAME_ABORTED) {
785 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
786 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
787 /* any other tx errors are only valid
788 * in half duplex mode
789 */
790 ps->tx_errors++;
791 ps->tx_aborted_errors++;
792 }
793 } else {
794 ps->tx_errors++;
795 ps->tx_aborted_errors++;
796 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
797 ps->tx_carrier_errors++;
798 }
799 }
800 }
801
802 /*
803 * Called from the interrupt service routine to acknowledge
804 * the TX DONE bits. This is a must if the irq is setup as
805 * edge triggered.
806 */
807 static void au1000_tx_ack(struct net_device *dev)
808 {
809 struct au1000_private *aup = netdev_priv(dev);
810 struct tx_dma *ptxd;
811
812 ptxd = aup->tx_dma_ring[aup->tx_tail];
813
814 while (ptxd->buff_stat & TX_T_DONE) {
815 au1000_update_tx_stats(dev, ptxd->status);
816 ptxd->buff_stat &= ~TX_T_DONE;
817 ptxd->len = 0;
818 au_sync();
819
820 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
821 ptxd = aup->tx_dma_ring[aup->tx_tail];
822
823 if (aup->tx_full) {
824 aup->tx_full = 0;
825 netif_wake_queue(dev);
826 }
827 }
828 }
829
830 /*
831 * Au1000 interrupt service routine.
832 */
833 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
834 {
835 struct net_device *dev = dev_id;
836
837 /* Handle RX interrupts first to minimize chance of overrun */
838
839 au1000_rx(dev);
840 au1000_tx_ack(dev);
841 return IRQ_RETVAL(1);
842 }
843
844 static int au1000_open(struct net_device *dev)
845 {
846 int retval;
847 struct au1000_private *aup = netdev_priv(dev);
848
849 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
850
851 retval = request_irq(dev->irq, au1000_interrupt, 0,
852 dev->name, dev);
853 if (retval) {
854 netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
855 return retval;
856 }
857
858 retval = au1000_init(dev);
859 if (retval) {
860 netdev_err(dev, "error in au1000_init\n");
861 free_irq(dev->irq, dev);
862 return retval;
863 }
864
865 if (aup->phy_dev) {
866 /* cause the PHY state machine to schedule a link state check */
867 aup->phy_dev->state = PHY_CHANGELINK;
868 phy_start(aup->phy_dev);
869 }
870
871 netif_start_queue(dev);
872
873 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
874
875 return 0;
876 }
877
878 static int au1000_close(struct net_device *dev)
879 {
880 unsigned long flags;
881 struct au1000_private *const aup = netdev_priv(dev);
882
883 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
884
885 if (aup->phy_dev)
886 phy_stop(aup->phy_dev);
887
888 spin_lock_irqsave(&aup->lock, flags);
889
890 au1000_reset_mac_unlocked(dev);
891
892 /* stop the device */
893 netif_stop_queue(dev);
894
895 /* disable the interrupt */
896 free_irq(dev->irq, dev);
897 spin_unlock_irqrestore(&aup->lock, flags);
898
899 return 0;
900 }
901
902 /*
903 * Au1000 transmit routine.
904 */
905 static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
906 {
907 struct au1000_private *aup = netdev_priv(dev);
908 struct net_device_stats *ps = &dev->stats;
909 struct tx_dma *ptxd;
910 u32 buff_stat;
911 struct db_dest *pDB;
912 int i;
913
914 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
915 (unsigned)aup, skb->len,
916 skb->data, aup->tx_head);
917
918 ptxd = aup->tx_dma_ring[aup->tx_head];
919 buff_stat = ptxd->buff_stat;
920 if (buff_stat & TX_DMA_ENABLE) {
921 /* We've wrapped around and the transmitter is still busy */
922 netif_stop_queue(dev);
923 aup->tx_full = 1;
924 return NETDEV_TX_BUSY;
925 } else if (buff_stat & TX_T_DONE) {
926 au1000_update_tx_stats(dev, ptxd->status);
927 ptxd->len = 0;
928 }
929
930 if (aup->tx_full) {
931 aup->tx_full = 0;
932 netif_wake_queue(dev);
933 }
934
935 pDB = aup->tx_db_inuse[aup->tx_head];
936 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
937 if (skb->len < ETH_ZLEN) {
938 for (i = skb->len; i < ETH_ZLEN; i++)
939 ((char *)pDB->vaddr)[i] = 0;
940
941 ptxd->len = ETH_ZLEN;
942 } else
943 ptxd->len = skb->len;
944
945 ps->tx_packets++;
946 ps->tx_bytes += ptxd->len;
947
948 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
949 au_sync();
950 dev_kfree_skb(skb);
951 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
952 return NETDEV_TX_OK;
953 }
954
955 /*
956 * The Tx ring has been full longer than the watchdog timeout
957 * value. The transmitter must be hung?
958 */
959 static void au1000_tx_timeout(struct net_device *dev)
960 {
961 netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
962 au1000_reset_mac(dev);
963 au1000_init(dev);
964 dev->trans_start = jiffies; /* prevent tx timeout */
965 netif_wake_queue(dev);
966 }
967
968 static void au1000_multicast_list(struct net_device *dev)
969 {
970 struct au1000_private *aup = netdev_priv(dev);
971 u32 reg;
972
973 netif_dbg(aup, drv, dev, "%s: flags=%x\n", __func__, dev->flags);
974 reg = readl(&aup->mac->control);
975 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
976 reg |= MAC_PROMISCUOUS;
977 } else if ((dev->flags & IFF_ALLMULTI) ||
978 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
979 reg |= MAC_PASS_ALL_MULTI;
980 reg &= ~MAC_PROMISCUOUS;
981 netdev_info(dev, "Pass all multicast\n");
982 } else {
983 struct netdev_hw_addr *ha;
984 u32 mc_filter[2]; /* Multicast hash filter */
985
986 mc_filter[1] = mc_filter[0] = 0;
987 netdev_for_each_mc_addr(ha, dev)
988 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
989 (long *)mc_filter);
990 writel(mc_filter[1], &aup->mac->multi_hash_high);
991 writel(mc_filter[0], &aup->mac->multi_hash_low);
992 reg &= ~MAC_PROMISCUOUS;
993 reg |= MAC_HASH_MODE;
994 }
995 writel(reg, &aup->mac->control);
996 }
997
998 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
999 {
1000 struct au1000_private *aup = netdev_priv(dev);
1001
1002 if (!netif_running(dev))
1003 return -EINVAL;
1004
1005 if (!aup->phy_dev)
1006 return -EINVAL; /* PHY not controllable */
1007
1008 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
1009 }
1010
1011 static const struct net_device_ops au1000_netdev_ops = {
1012 .ndo_open = au1000_open,
1013 .ndo_stop = au1000_close,
1014 .ndo_start_xmit = au1000_tx,
1015 .ndo_set_multicast_list = au1000_multicast_list,
1016 .ndo_do_ioctl = au1000_ioctl,
1017 .ndo_tx_timeout = au1000_tx_timeout,
1018 .ndo_set_mac_address = eth_mac_addr,
1019 .ndo_validate_addr = eth_validate_addr,
1020 .ndo_change_mtu = eth_change_mtu,
1021 };
1022
1023 static int __devinit au1000_probe(struct platform_device *pdev)
1024 {
1025 static unsigned version_printed;
1026 struct au1000_private *aup = NULL;
1027 struct au1000_eth_platform_data *pd;
1028 struct net_device *dev = NULL;
1029 struct db_dest *pDB, *pDBfree;
1030 int irq, i, err = 0;
1031 struct resource *base, *macen;
1032
1033 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1034 if (!base) {
1035 dev_err(&pdev->dev, "failed to retrieve base register\n");
1036 err = -ENODEV;
1037 goto out;
1038 }
1039
1040 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1041 if (!macen) {
1042 dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
1043 err = -ENODEV;
1044 goto out;
1045 }
1046
1047 irq = platform_get_irq(pdev, 0);
1048 if (irq < 0) {
1049 dev_err(&pdev->dev, "failed to retrieve IRQ\n");
1050 err = -ENODEV;
1051 goto out;
1052 }
1053
1054 if (!request_mem_region(base->start, resource_size(base),
1055 pdev->name)) {
1056 dev_err(&pdev->dev, "failed to request memory region for base registers\n");
1057 err = -ENXIO;
1058 goto out;
1059 }
1060
1061 if (!request_mem_region(macen->start, resource_size(macen),
1062 pdev->name)) {
1063 dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
1064 err = -ENXIO;
1065 goto err_request;
1066 }
1067
1068 dev = alloc_etherdev(sizeof(struct au1000_private));
1069 if (!dev) {
1070 dev_err(&pdev->dev, "alloc_etherdev failed\n");
1071 err = -ENOMEM;
1072 goto err_alloc;
1073 }
1074
1075 SET_NETDEV_DEV(dev, &pdev->dev);
1076 platform_set_drvdata(pdev, dev);
1077 aup = netdev_priv(dev);
1078
1079 spin_lock_init(&aup->lock);
1080 aup->msg_enable = (au1000_debug < 4 ?
1081 AU1000_DEF_MSG_ENABLE : au1000_debug);
1082
1083 /* Allocate the data buffers
1084 * Snooping works fine with eth on all au1xxx
1085 */
1086 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1087 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1088 &aup->dma_addr, 0);
1089 if (!aup->vaddr) {
1090 dev_err(&pdev->dev, "failed to allocate data buffers\n");
1091 err = -ENOMEM;
1092 goto err_vaddr;
1093 }
1094
1095 /* aup->mac is the base address of the MAC's registers */
1096 aup->mac = (struct mac_reg *)
1097 ioremap_nocache(base->start, resource_size(base));
1098 if (!aup->mac) {
1099 dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
1100 err = -ENXIO;
1101 goto err_remap1;
1102 }
1103
1104 /* Setup some variables for quick register address access */
1105 aup->enable = (u32 *)ioremap_nocache(macen->start,
1106 resource_size(macen));
1107 if (!aup->enable) {
1108 dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
1109 err = -ENXIO;
1110 goto err_remap2;
1111 }
1112 aup->mac_id = pdev->id;
1113
1114 if (pdev->id == 0)
1115 au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
1116 else if (pdev->id == 1)
1117 au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
1118
1119 /* set a random MAC now in case platform_data doesn't provide one */
1120 random_ether_addr(dev->dev_addr);
1121
1122 writel(0, &aup->enable);
1123 aup->mac_enabled = 0;
1124
1125 pd = pdev->dev.platform_data;
1126 if (!pd) {
1127 dev_info(&pdev->dev, "no platform_data passed,"
1128 " PHY search on MAC0\n");
1129 aup->phy1_search_mac0 = 1;
1130 } else {
1131 if (is_valid_ether_addr(pd->mac))
1132 memcpy(dev->dev_addr, pd->mac, 6);
1133
1134 aup->phy_static_config = pd->phy_static_config;
1135 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1136 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1137 aup->phy_addr = pd->phy_addr;
1138 aup->phy_busid = pd->phy_busid;
1139 aup->phy_irq = pd->phy_irq;
1140 }
1141
1142 if (aup->phy_busid && aup->phy_busid > 0) {
1143 dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII bus not supported yet\n");
1144 err = -ENODEV;
1145 goto err_mdiobus_alloc;
1146 }
1147
1148 aup->mii_bus = mdiobus_alloc();
1149 if (aup->mii_bus == NULL) {
1150 dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
1151 err = -ENOMEM;
1152 goto err_mdiobus_alloc;
1153 }
1154
1155 aup->mii_bus->priv = dev;
1156 aup->mii_bus->read = au1000_mdiobus_read;
1157 aup->mii_bus->write = au1000_mdiobus_write;
1158 aup->mii_bus->reset = au1000_mdiobus_reset;
1159 aup->mii_bus->name = "au1000_eth_mii";
1160 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
1161 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1162 if (aup->mii_bus->irq == NULL)
1163 goto err_out;
1164
1165 for (i = 0; i < PHY_MAX_ADDR; ++i)
1166 aup->mii_bus->irq[i] = PHY_POLL;
1167 /* if known, set corresponding PHY IRQs */
1168 if (aup->phy_static_config)
1169 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1170 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1171
1172 err = mdiobus_register(aup->mii_bus);
1173 if (err) {
1174 dev_err(&pdev->dev, "failed to register MDIO bus\n");
1175 goto err_mdiobus_reg;
1176 }
1177
1178 if (au1000_mii_probe(dev) != 0)
1179 goto err_out;
1180
1181 pDBfree = NULL;
1182 /* setup the data buffer descriptors and attach a buffer to each one */
1183 pDB = aup->db;
1184 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1185 pDB->pnext = pDBfree;
1186 pDBfree = pDB;
1187 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1188 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1189 pDB++;
1190 }
1191 aup->pDBfree = pDBfree;
1192
1193 for (i = 0; i < NUM_RX_DMA; i++) {
1194 pDB = au1000_GetFreeDB(aup);
1195 if (!pDB)
1196 goto err_out;
1197
1198 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1199 aup->rx_db_inuse[i] = pDB;
1200 }
1201 for (i = 0; i < NUM_TX_DMA; i++) {
1202 pDB = au1000_GetFreeDB(aup);
1203 if (!pDB)
1204 goto err_out;
1205
1206 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1207 aup->tx_dma_ring[i]->len = 0;
1208 aup->tx_db_inuse[i] = pDB;
1209 }
1210
1211 dev->base_addr = base->start;
1212 dev->irq = irq;
1213 dev->netdev_ops = &au1000_netdev_ops;
1214 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1215 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1216
1217 /*
1218 * The boot code uses the ethernet controller, so reset it to start
1219 * fresh. au1000_init() expects that the device is in reset state.
1220 */
1221 au1000_reset_mac(dev);
1222
1223 err = register_netdev(dev);
1224 if (err) {
1225 netdev_err(dev, "Cannot register net device, aborting.\n");
1226 goto err_out;
1227 }
1228
1229 netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1230 (unsigned long)base->start, irq);
1231 if (version_printed++ == 0)
1232 pr_info("%s version %s %s\n",
1233 DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1234
1235 return 0;
1236
1237 err_out:
1238 if (aup->mii_bus != NULL)
1239 mdiobus_unregister(aup->mii_bus);
1240
1241 /* here we should have a valid dev plus aup-> register addresses
1242 * so we can reset the mac properly.
1243 */
1244 au1000_reset_mac(dev);
1245
1246 for (i = 0; i < NUM_RX_DMA; i++) {
1247 if (aup->rx_db_inuse[i])
1248 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1249 }
1250 for (i = 0; i < NUM_TX_DMA; i++) {
1251 if (aup->tx_db_inuse[i])
1252 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1253 }
1254 err_mdiobus_reg:
1255 mdiobus_free(aup->mii_bus);
1256 err_mdiobus_alloc:
1257 iounmap(aup->enable);
1258 err_remap2:
1259 iounmap(aup->mac);
1260 err_remap1:
1261 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1262 (void *)aup->vaddr, aup->dma_addr);
1263 err_vaddr:
1264 free_netdev(dev);
1265 err_alloc:
1266 release_mem_region(macen->start, resource_size(macen));
1267 err_request:
1268 release_mem_region(base->start, resource_size(base));
1269 out:
1270 return err;
1271 }
1272
1273 static int __devexit au1000_remove(struct platform_device *pdev)
1274 {
1275 struct net_device *dev = platform_get_drvdata(pdev);
1276 struct au1000_private *aup = netdev_priv(dev);
1277 int i;
1278 struct resource *base, *macen;
1279
1280 platform_set_drvdata(pdev, NULL);
1281
1282 unregister_netdev(dev);
1283 mdiobus_unregister(aup->mii_bus);
1284 mdiobus_free(aup->mii_bus);
1285
1286 for (i = 0; i < NUM_RX_DMA; i++)
1287 if (aup->rx_db_inuse[i])
1288 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1289
1290 for (i = 0; i < NUM_TX_DMA; i++)
1291 if (aup->tx_db_inuse[i])
1292 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1293
1294 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1295 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1296 (void *)aup->vaddr, aup->dma_addr);
1297
1298 iounmap(aup->mac);
1299 iounmap(aup->enable);
1300
1301 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1302 release_mem_region(base->start, resource_size(base));
1303
1304 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1305 release_mem_region(macen->start, resource_size(macen));
1306
1307 free_netdev(dev);
1308
1309 return 0;
1310 }
1311
1312 static struct platform_driver au1000_eth_driver = {
1313 .probe = au1000_probe,
1314 .remove = __devexit_p(au1000_remove),
1315 .driver = {
1316 .name = "au1000-eth",
1317 .owner = THIS_MODULE,
1318 },
1319 };
1320 MODULE_ALIAS("platform:au1000-eth");
1321
1322
1323 static int __init au1000_init_module(void)
1324 {
1325 return platform_driver_register(&au1000_eth_driver);
1326 }
1327
1328 static void __exit au1000_exit_module(void)
1329 {
1330 platform_driver_unregister(&au1000_eth_driver);
1331 }
1332
1333 module_init(au1000_init_module);
1334 module_exit(au1000_exit_module);
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