1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2010 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
35 #include <net/route.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
43 #include "bnx2x_reg.h"
44 #include "bnx2x_fw_defs.h"
45 #include "bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
49 #include "cnic_defs.h"
51 #define DRV_MODULE_NAME "cnic"
53 static char version
[] __devinitdata
=
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME
" v" CNIC_MODULE_VERSION
" (" CNIC_MODULE_RELDATE
")\n";
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION
);
62 static LIST_HEAD(cnic_dev_list
);
63 static DEFINE_RWLOCK(cnic_dev_lock
);
64 static DEFINE_MUTEX(cnic_lock
);
66 static struct cnic_ulp_ops
*cnic_ulp_tbl
[MAX_CNIC_ULP_TYPE
];
68 static int cnic_service_bnx2(void *, void *);
69 static int cnic_service_bnx2x(void *, void *);
70 static int cnic_ctl(void *, struct cnic_ctl_info
*);
72 static struct cnic_ops cnic_bnx2_ops
= {
73 .cnic_owner
= THIS_MODULE
,
74 .cnic_handler
= cnic_service_bnx2
,
78 static struct cnic_ops cnic_bnx2x_ops
= {
79 .cnic_owner
= THIS_MODULE
,
80 .cnic_handler
= cnic_service_bnx2x
,
84 static void cnic_shutdown_rings(struct cnic_dev
*);
85 static void cnic_init_rings(struct cnic_dev
*);
86 static int cnic_cm_set_pg(struct cnic_sock
*);
88 static int cnic_uio_open(struct uio_info
*uinfo
, struct inode
*inode
)
90 struct cnic_dev
*dev
= uinfo
->priv
;
91 struct cnic_local
*cp
= dev
->cnic_priv
;
93 if (!capable(CAP_NET_ADMIN
))
96 if (cp
->uio_dev
!= -1)
100 if (!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
105 cp
->uio_dev
= iminor(inode
);
107 cnic_init_rings(dev
);
113 static int cnic_uio_close(struct uio_info
*uinfo
, struct inode
*inode
)
115 struct cnic_dev
*dev
= uinfo
->priv
;
116 struct cnic_local
*cp
= dev
->cnic_priv
;
118 cnic_shutdown_rings(dev
);
124 static inline void cnic_hold(struct cnic_dev
*dev
)
126 atomic_inc(&dev
->ref_count
);
129 static inline void cnic_put(struct cnic_dev
*dev
)
131 atomic_dec(&dev
->ref_count
);
134 static inline void csk_hold(struct cnic_sock
*csk
)
136 atomic_inc(&csk
->ref_count
);
139 static inline void csk_put(struct cnic_sock
*csk
)
141 atomic_dec(&csk
->ref_count
);
144 static struct cnic_dev
*cnic_from_netdev(struct net_device
*netdev
)
146 struct cnic_dev
*cdev
;
148 read_lock(&cnic_dev_lock
);
149 list_for_each_entry(cdev
, &cnic_dev_list
, list
) {
150 if (netdev
== cdev
->netdev
) {
152 read_unlock(&cnic_dev_lock
);
156 read_unlock(&cnic_dev_lock
);
160 static inline void ulp_get(struct cnic_ulp_ops
*ulp_ops
)
162 atomic_inc(&ulp_ops
->ref_count
);
165 static inline void ulp_put(struct cnic_ulp_ops
*ulp_ops
)
167 atomic_dec(&ulp_ops
->ref_count
);
170 static void cnic_ctx_wr(struct cnic_dev
*dev
, u32 cid_addr
, u32 off
, u32 val
)
172 struct cnic_local
*cp
= dev
->cnic_priv
;
173 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
174 struct drv_ctl_info info
;
175 struct drv_ctl_io
*io
= &info
.data
.io
;
177 info
.cmd
= DRV_CTL_CTX_WR_CMD
;
178 io
->cid_addr
= cid_addr
;
181 ethdev
->drv_ctl(dev
->netdev
, &info
);
184 static void cnic_ctx_tbl_wr(struct cnic_dev
*dev
, u32 off
, dma_addr_t addr
)
186 struct cnic_local
*cp
= dev
->cnic_priv
;
187 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
188 struct drv_ctl_info info
;
189 struct drv_ctl_io
*io
= &info
.data
.io
;
191 info
.cmd
= DRV_CTL_CTXTBL_WR_CMD
;
194 ethdev
->drv_ctl(dev
->netdev
, &info
);
197 static void cnic_ring_ctl(struct cnic_dev
*dev
, u32 cid
, u32 cl_id
, int start
)
199 struct cnic_local
*cp
= dev
->cnic_priv
;
200 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
201 struct drv_ctl_info info
;
202 struct drv_ctl_l2_ring
*ring
= &info
.data
.ring
;
205 info
.cmd
= DRV_CTL_START_L2_CMD
;
207 info
.cmd
= DRV_CTL_STOP_L2_CMD
;
210 ring
->client_id
= cl_id
;
211 ethdev
->drv_ctl(dev
->netdev
, &info
);
214 static void cnic_reg_wr_ind(struct cnic_dev
*dev
, u32 off
, u32 val
)
216 struct cnic_local
*cp
= dev
->cnic_priv
;
217 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
218 struct drv_ctl_info info
;
219 struct drv_ctl_io
*io
= &info
.data
.io
;
221 info
.cmd
= DRV_CTL_IO_WR_CMD
;
224 ethdev
->drv_ctl(dev
->netdev
, &info
);
227 static u32
cnic_reg_rd_ind(struct cnic_dev
*dev
, u32 off
)
229 struct cnic_local
*cp
= dev
->cnic_priv
;
230 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
231 struct drv_ctl_info info
;
232 struct drv_ctl_io
*io
= &info
.data
.io
;
234 info
.cmd
= DRV_CTL_IO_RD_CMD
;
236 ethdev
->drv_ctl(dev
->netdev
, &info
);
240 static int cnic_in_use(struct cnic_sock
*csk
)
242 return test_bit(SK_F_INUSE
, &csk
->flags
);
245 static void cnic_kwq_completion(struct cnic_dev
*dev
, u32 count
)
247 struct cnic_local
*cp
= dev
->cnic_priv
;
248 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
249 struct drv_ctl_info info
;
251 info
.cmd
= DRV_CTL_COMPLETION_CMD
;
252 info
.data
.comp
.comp_count
= count
;
253 ethdev
->drv_ctl(dev
->netdev
, &info
);
256 static int cnic_get_l5_cid(struct cnic_local
*cp
, u32 cid
, u32
*l5_cid
)
260 for (i
= 0; i
< cp
->max_cid_space
; i
++) {
261 if (cp
->ctx_tbl
[i
].cid
== cid
) {
269 static int cnic_send_nlmsg(struct cnic_local
*cp
, u32 type
,
270 struct cnic_sock
*csk
)
272 struct iscsi_path path_req
;
275 u32 msg_type
= ISCSI_KEVENT_IF_DOWN
;
276 struct cnic_ulp_ops
*ulp_ops
;
278 if (cp
->uio_dev
== -1)
282 len
= sizeof(path_req
);
283 buf
= (char *) &path_req
;
284 memset(&path_req
, 0, len
);
286 msg_type
= ISCSI_KEVENT_PATH_REQ
;
287 path_req
.handle
= (u64
) csk
->l5_cid
;
288 if (test_bit(SK_F_IPV6
, &csk
->flags
)) {
289 memcpy(&path_req
.dst
.v6_addr
, &csk
->dst_ip
[0],
290 sizeof(struct in6_addr
));
291 path_req
.ip_addr_len
= 16;
293 memcpy(&path_req
.dst
.v4_addr
, &csk
->dst_ip
[0],
294 sizeof(struct in_addr
));
295 path_req
.ip_addr_len
= 4;
297 path_req
.vlan_id
= csk
->vlan_id
;
298 path_req
.pmtu
= csk
->mtu
;
302 ulp_ops
= rcu_dereference(cnic_ulp_tbl
[CNIC_ULP_ISCSI
]);
304 ulp_ops
->iscsi_nl_send_msg(cp
->dev
, msg_type
, buf
, len
);
309 static int cnic_iscsi_nl_msg_recv(struct cnic_dev
*dev
, u32 msg_type
,
315 case ISCSI_UEVENT_PATH_UPDATE
: {
316 struct cnic_local
*cp
;
318 struct cnic_sock
*csk
;
319 struct iscsi_path
*path_resp
;
321 if (len
< sizeof(*path_resp
))
324 path_resp
= (struct iscsi_path
*) buf
;
326 l5_cid
= (u32
) path_resp
->handle
;
327 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
331 if (!rcu_dereference(cp
->ulp_ops
[CNIC_ULP_L4
])) {
336 csk
= &cp
->csk_tbl
[l5_cid
];
338 if (cnic_in_use(csk
)) {
339 memcpy(csk
->ha
, path_resp
->mac_addr
, 6);
340 if (test_bit(SK_F_IPV6
, &csk
->flags
))
341 memcpy(&csk
->src_ip
[0], &path_resp
->src
.v6_addr
,
342 sizeof(struct in6_addr
));
344 memcpy(&csk
->src_ip
[0], &path_resp
->src
.v4_addr
,
345 sizeof(struct in_addr
));
346 if (is_valid_ether_addr(csk
->ha
))
358 static int cnic_offld_prep(struct cnic_sock
*csk
)
360 if (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
363 if (!test_bit(SK_F_CONNECT_START
, &csk
->flags
)) {
364 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
371 static int cnic_close_prep(struct cnic_sock
*csk
)
373 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
374 smp_mb__after_clear_bit();
376 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
377 while (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
385 static int cnic_abort_prep(struct cnic_sock
*csk
)
387 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
388 smp_mb__after_clear_bit();
390 while (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
393 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
394 csk
->state
= L4_KCQE_OPCODE_VALUE_RESET_COMP
;
401 static void cnic_uio_stop(void)
403 struct cnic_dev
*dev
;
405 read_lock(&cnic_dev_lock
);
406 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
407 struct cnic_local
*cp
= dev
->cnic_priv
;
410 cnic_send_nlmsg(cp
, ISCSI_KEVENT_IF_DOWN
, NULL
);
412 read_unlock(&cnic_dev_lock
);
415 int cnic_register_driver(int ulp_type
, struct cnic_ulp_ops
*ulp_ops
)
417 struct cnic_dev
*dev
;
419 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
420 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
423 mutex_lock(&cnic_lock
);
424 if (cnic_ulp_tbl
[ulp_type
]) {
425 pr_err("%s: Type %d has already been registered\n",
427 mutex_unlock(&cnic_lock
);
431 read_lock(&cnic_dev_lock
);
432 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
433 struct cnic_local
*cp
= dev
->cnic_priv
;
435 clear_bit(ULP_F_INIT
, &cp
->ulp_flags
[ulp_type
]);
437 read_unlock(&cnic_dev_lock
);
439 atomic_set(&ulp_ops
->ref_count
, 0);
440 rcu_assign_pointer(cnic_ulp_tbl
[ulp_type
], ulp_ops
);
441 mutex_unlock(&cnic_lock
);
443 /* Prevent race conditions with netdev_event */
445 read_lock(&cnic_dev_lock
);
446 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
447 struct cnic_local
*cp
= dev
->cnic_priv
;
449 if (!test_and_set_bit(ULP_F_INIT
, &cp
->ulp_flags
[ulp_type
]))
450 ulp_ops
->cnic_init(dev
);
452 read_unlock(&cnic_dev_lock
);
458 int cnic_unregister_driver(int ulp_type
)
460 struct cnic_dev
*dev
;
461 struct cnic_ulp_ops
*ulp_ops
;
464 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
465 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
468 mutex_lock(&cnic_lock
);
469 ulp_ops
= cnic_ulp_tbl
[ulp_type
];
471 pr_err("%s: Type %d has not been registered\n",
475 read_lock(&cnic_dev_lock
);
476 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
477 struct cnic_local
*cp
= dev
->cnic_priv
;
479 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
480 pr_err("%s: Type %d still has devices registered\n",
482 read_unlock(&cnic_dev_lock
);
486 read_unlock(&cnic_dev_lock
);
488 if (ulp_type
== CNIC_ULP_ISCSI
)
491 rcu_assign_pointer(cnic_ulp_tbl
[ulp_type
], NULL
);
493 mutex_unlock(&cnic_lock
);
495 while ((atomic_read(&ulp_ops
->ref_count
) != 0) && (i
< 20)) {
500 if (atomic_read(&ulp_ops
->ref_count
) != 0)
501 netdev_warn(dev
->netdev
, "Failed waiting for ref count to go to zero\n");
505 mutex_unlock(&cnic_lock
);
509 static int cnic_start_hw(struct cnic_dev
*);
510 static void cnic_stop_hw(struct cnic_dev
*);
512 static int cnic_register_device(struct cnic_dev
*dev
, int ulp_type
,
515 struct cnic_local
*cp
= dev
->cnic_priv
;
516 struct cnic_ulp_ops
*ulp_ops
;
518 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
519 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
522 mutex_lock(&cnic_lock
);
523 if (cnic_ulp_tbl
[ulp_type
] == NULL
) {
524 pr_err("%s: Driver with type %d has not been registered\n",
526 mutex_unlock(&cnic_lock
);
529 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
530 pr_err("%s: Type %d has already been registered to this device\n",
532 mutex_unlock(&cnic_lock
);
536 clear_bit(ULP_F_START
, &cp
->ulp_flags
[ulp_type
]);
537 cp
->ulp_handle
[ulp_type
] = ulp_ctx
;
538 ulp_ops
= cnic_ulp_tbl
[ulp_type
];
539 rcu_assign_pointer(cp
->ulp_ops
[ulp_type
], ulp_ops
);
542 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
543 if (!test_and_set_bit(ULP_F_START
, &cp
->ulp_flags
[ulp_type
]))
544 ulp_ops
->cnic_start(cp
->ulp_handle
[ulp_type
]);
546 mutex_unlock(&cnic_lock
);
551 EXPORT_SYMBOL(cnic_register_driver
);
553 static int cnic_unregister_device(struct cnic_dev
*dev
, int ulp_type
)
555 struct cnic_local
*cp
= dev
->cnic_priv
;
558 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
559 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
562 mutex_lock(&cnic_lock
);
563 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
564 rcu_assign_pointer(cp
->ulp_ops
[ulp_type
], NULL
);
567 pr_err("%s: device not registered to this ulp type %d\n",
569 mutex_unlock(&cnic_lock
);
572 mutex_unlock(&cnic_lock
);
576 while (test_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[ulp_type
]) &&
581 if (test_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[ulp_type
]))
582 netdev_warn(dev
->netdev
, "Failed waiting for ULP up call to complete\n");
586 EXPORT_SYMBOL(cnic_unregister_driver
);
588 static int cnic_init_id_tbl(struct cnic_id_tbl
*id_tbl
, u32 size
, u32 start_id
)
590 id_tbl
->start
= start_id
;
593 spin_lock_init(&id_tbl
->lock
);
594 id_tbl
->table
= kzalloc(DIV_ROUND_UP(size
, 32) * 4, GFP_KERNEL
);
601 static void cnic_free_id_tbl(struct cnic_id_tbl
*id_tbl
)
603 kfree(id_tbl
->table
);
604 id_tbl
->table
= NULL
;
607 static int cnic_alloc_id(struct cnic_id_tbl
*id_tbl
, u32 id
)
612 if (id
>= id_tbl
->max
)
615 spin_lock(&id_tbl
->lock
);
616 if (!test_bit(id
, id_tbl
->table
)) {
617 set_bit(id
, id_tbl
->table
);
620 spin_unlock(&id_tbl
->lock
);
624 /* Returns -1 if not successful */
625 static u32
cnic_alloc_new_id(struct cnic_id_tbl
*id_tbl
)
629 spin_lock(&id_tbl
->lock
);
630 id
= find_next_zero_bit(id_tbl
->table
, id_tbl
->max
, id_tbl
->next
);
631 if (id
>= id_tbl
->max
) {
633 if (id_tbl
->next
!= 0) {
634 id
= find_first_zero_bit(id_tbl
->table
, id_tbl
->next
);
635 if (id
>= id_tbl
->next
)
640 if (id
< id_tbl
->max
) {
641 set_bit(id
, id_tbl
->table
);
642 id_tbl
->next
= (id
+ 1) & (id_tbl
->max
- 1);
646 spin_unlock(&id_tbl
->lock
);
651 static void cnic_free_id(struct cnic_id_tbl
*id_tbl
, u32 id
)
657 if (id
>= id_tbl
->max
)
660 clear_bit(id
, id_tbl
->table
);
663 static void cnic_free_dma(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
670 for (i
= 0; i
< dma
->num_pages
; i
++) {
671 if (dma
->pg_arr
[i
]) {
672 dma_free_coherent(&dev
->pcidev
->dev
, BCM_PAGE_SIZE
,
673 dma
->pg_arr
[i
], dma
->pg_map_arr
[i
]);
674 dma
->pg_arr
[i
] = NULL
;
678 dma_free_coherent(&dev
->pcidev
->dev
, dma
->pgtbl_size
,
679 dma
->pgtbl
, dma
->pgtbl_map
);
687 static void cnic_setup_page_tbl(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
690 u32
*page_table
= dma
->pgtbl
;
692 for (i
= 0; i
< dma
->num_pages
; i
++) {
693 /* Each entry needs to be in big endian format. */
694 *page_table
= (u32
) ((u64
) dma
->pg_map_arr
[i
] >> 32);
696 *page_table
= (u32
) dma
->pg_map_arr
[i
];
701 static void cnic_setup_page_tbl_le(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
704 u32
*page_table
= dma
->pgtbl
;
706 for (i
= 0; i
< dma
->num_pages
; i
++) {
707 /* Each entry needs to be in little endian format. */
708 *page_table
= dma
->pg_map_arr
[i
] & 0xffffffff;
710 *page_table
= (u32
) ((u64
) dma
->pg_map_arr
[i
] >> 32);
715 static int cnic_alloc_dma(struct cnic_dev
*dev
, struct cnic_dma
*dma
,
716 int pages
, int use_pg_tbl
)
719 struct cnic_local
*cp
= dev
->cnic_priv
;
721 size
= pages
* (sizeof(void *) + sizeof(dma_addr_t
));
722 dma
->pg_arr
= kzalloc(size
, GFP_ATOMIC
);
723 if (dma
->pg_arr
== NULL
)
726 dma
->pg_map_arr
= (dma_addr_t
*) (dma
->pg_arr
+ pages
);
727 dma
->num_pages
= pages
;
729 for (i
= 0; i
< pages
; i
++) {
730 dma
->pg_arr
[i
] = dma_alloc_coherent(&dev
->pcidev
->dev
,
734 if (dma
->pg_arr
[i
] == NULL
)
740 dma
->pgtbl_size
= ((pages
* 8) + BCM_PAGE_SIZE
- 1) &
741 ~(BCM_PAGE_SIZE
- 1);
742 dma
->pgtbl
= dma_alloc_coherent(&dev
->pcidev
->dev
, dma
->pgtbl_size
,
743 &dma
->pgtbl_map
, GFP_ATOMIC
);
744 if (dma
->pgtbl
== NULL
)
747 cp
->setup_pgtbl(dev
, dma
);
752 cnic_free_dma(dev
, dma
);
756 static void cnic_free_context(struct cnic_dev
*dev
)
758 struct cnic_local
*cp
= dev
->cnic_priv
;
761 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
762 if (cp
->ctx_arr
[i
].ctx
) {
763 dma_free_coherent(&dev
->pcidev
->dev
, cp
->ctx_blk_size
,
765 cp
->ctx_arr
[i
].mapping
);
766 cp
->ctx_arr
[i
].ctx
= NULL
;
771 static void cnic_free_resc(struct cnic_dev
*dev
)
773 struct cnic_local
*cp
= dev
->cnic_priv
;
776 if (cp
->cnic_uinfo
) {
777 while (cp
->uio_dev
!= -1 && i
< 15) {
781 uio_unregister_device(cp
->cnic_uinfo
);
782 kfree(cp
->cnic_uinfo
);
783 cp
->cnic_uinfo
= NULL
;
787 dma_free_coherent(&dev
->pcidev
->dev
, cp
->l2_buf_size
,
788 cp
->l2_buf
, cp
->l2_buf_map
);
793 dma_free_coherent(&dev
->pcidev
->dev
, cp
->l2_ring_size
,
794 cp
->l2_ring
, cp
->l2_ring_map
);
798 cnic_free_context(dev
);
803 cnic_free_dma(dev
, &cp
->gbl_buf_info
);
804 cnic_free_dma(dev
, &cp
->conn_buf_info
);
805 cnic_free_dma(dev
, &cp
->kwq_info
);
806 cnic_free_dma(dev
, &cp
->kwq_16_data_info
);
807 cnic_free_dma(dev
, &cp
->kcq1
.dma
);
808 kfree(cp
->iscsi_tbl
);
809 cp
->iscsi_tbl
= NULL
;
813 cnic_free_id_tbl(&cp
->cid_tbl
);
816 static int cnic_alloc_context(struct cnic_dev
*dev
)
818 struct cnic_local
*cp
= dev
->cnic_priv
;
820 if (CHIP_NUM(cp
) == CHIP_NUM_5709
) {
823 cp
->ctx_blk_size
= BCM_PAGE_SIZE
;
824 cp
->cids_per_blk
= BCM_PAGE_SIZE
/ 128;
825 arr_size
= BNX2_MAX_CID
/ cp
->cids_per_blk
*
826 sizeof(struct cnic_ctx
);
827 cp
->ctx_arr
= kzalloc(arr_size
, GFP_KERNEL
);
828 if (cp
->ctx_arr
== NULL
)
832 for (i
= 0; i
< 2; i
++) {
833 u32 j
, reg
, off
, lo
, hi
;
836 off
= BNX2_PG_CTX_MAP
;
838 off
= BNX2_ISCSI_CTX_MAP
;
840 reg
= cnic_reg_rd_ind(dev
, off
);
843 for (j
= lo
; j
< hi
; j
+= cp
->cids_per_blk
, k
++)
844 cp
->ctx_arr
[k
].cid
= j
;
848 if (cp
->ctx_blks
>= (BNX2_MAX_CID
/ cp
->cids_per_blk
)) {
853 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
855 dma_alloc_coherent(&dev
->pcidev
->dev
,
857 &cp
->ctx_arr
[i
].mapping
,
859 if (cp
->ctx_arr
[i
].ctx
== NULL
)
866 static int cnic_alloc_kcq(struct cnic_dev
*dev
, struct kcq_info
*info
)
868 int err
, i
, is_bnx2
= 0;
871 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
))
874 err
= cnic_alloc_dma(dev
, &info
->dma
, KCQ_PAGE_CNT
, is_bnx2
);
878 kcq
= (struct kcqe
**) info
->dma
.pg_arr
;
884 for (i
= 0; i
< KCQ_PAGE_CNT
; i
++) {
885 struct bnx2x_bd_chain_next
*next
=
886 (struct bnx2x_bd_chain_next
*) &kcq
[i
][MAX_KCQE_CNT
];
889 if (j
>= KCQ_PAGE_CNT
)
891 next
->addr_hi
= (u64
) info
->dma
.pg_map_arr
[j
] >> 32;
892 next
->addr_lo
= info
->dma
.pg_map_arr
[j
] & 0xffffffff;
897 static int cnic_alloc_l2_rings(struct cnic_dev
*dev
, int pages
)
899 struct cnic_local
*cp
= dev
->cnic_priv
;
901 cp
->l2_ring_size
= pages
* BCM_PAGE_SIZE
;
902 cp
->l2_ring
= dma_alloc_coherent(&dev
->pcidev
->dev
, cp
->l2_ring_size
,
904 GFP_KERNEL
| __GFP_COMP
);
908 cp
->l2_buf_size
= (cp
->l2_rx_ring_size
+ 1) * cp
->l2_single_buf_size
;
909 cp
->l2_buf_size
= PAGE_ALIGN(cp
->l2_buf_size
);
910 cp
->l2_buf
= dma_alloc_coherent(&dev
->pcidev
->dev
, cp
->l2_buf_size
,
912 GFP_KERNEL
| __GFP_COMP
);
919 static int cnic_alloc_uio(struct cnic_dev
*dev
) {
920 struct cnic_local
*cp
= dev
->cnic_priv
;
921 struct uio_info
*uinfo
;
924 uinfo
= kzalloc(sizeof(*uinfo
), GFP_ATOMIC
);
928 uinfo
->mem
[0].addr
= dev
->netdev
->base_addr
;
929 uinfo
->mem
[0].internal_addr
= dev
->regview
;
930 uinfo
->mem
[0].size
= dev
->netdev
->mem_end
- dev
->netdev
->mem_start
;
931 uinfo
->mem
[0].memtype
= UIO_MEM_PHYS
;
933 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
934 uinfo
->mem
[1].addr
= (unsigned long) cp
->status_blk
.gen
&
936 if (cp
->ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
)
937 uinfo
->mem
[1].size
= BNX2_SBLK_MSIX_ALIGN_SIZE
* 9;
939 uinfo
->mem
[1].size
= BNX2_SBLK_MSIX_ALIGN_SIZE
;
941 uinfo
->name
= "bnx2_cnic";
942 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
943 uinfo
->mem
[1].addr
= (unsigned long) cp
->bnx2x_def_status_blk
&
945 uinfo
->mem
[1].size
= sizeof(struct host_def_status_block
);
947 uinfo
->name
= "bnx2x_cnic";
950 uinfo
->mem
[1].memtype
= UIO_MEM_LOGICAL
;
952 uinfo
->mem
[2].addr
= (unsigned long) cp
->l2_ring
;
953 uinfo
->mem
[2].size
= cp
->l2_ring_size
;
954 uinfo
->mem
[2].memtype
= UIO_MEM_LOGICAL
;
956 uinfo
->mem
[3].addr
= (unsigned long) cp
->l2_buf
;
957 uinfo
->mem
[3].size
= cp
->l2_buf_size
;
958 uinfo
->mem
[3].memtype
= UIO_MEM_LOGICAL
;
960 uinfo
->version
= CNIC_MODULE_VERSION
;
961 uinfo
->irq
= UIO_IRQ_CUSTOM
;
963 uinfo
->open
= cnic_uio_open
;
964 uinfo
->release
= cnic_uio_close
;
968 ret
= uio_register_device(&dev
->pcidev
->dev
, uinfo
);
974 cp
->cnic_uinfo
= uinfo
;
978 static int cnic_alloc_bnx2_resc(struct cnic_dev
*dev
)
980 struct cnic_local
*cp
= dev
->cnic_priv
;
983 ret
= cnic_alloc_dma(dev
, &cp
->kwq_info
, KWQ_PAGE_CNT
, 1);
986 cp
->kwq
= (struct kwqe
**) cp
->kwq_info
.pg_arr
;
988 ret
= cnic_alloc_kcq(dev
, &cp
->kcq1
);
992 ret
= cnic_alloc_context(dev
);
996 ret
= cnic_alloc_l2_rings(dev
, 2);
1000 ret
= cnic_alloc_uio(dev
);
1007 cnic_free_resc(dev
);
1011 static int cnic_alloc_bnx2x_context(struct cnic_dev
*dev
)
1013 struct cnic_local
*cp
= dev
->cnic_priv
;
1014 int ctx_blk_size
= cp
->ethdev
->ctx_blk_size
;
1015 int total_mem
, blks
, i
;
1017 total_mem
= BNX2X_CONTEXT_MEM_SIZE
* cp
->max_cid_space
;
1018 blks
= total_mem
/ ctx_blk_size
;
1019 if (total_mem
% ctx_blk_size
)
1022 if (blks
> cp
->ethdev
->ctx_tbl_len
)
1025 cp
->ctx_arr
= kzalloc(blks
* sizeof(struct cnic_ctx
), GFP_KERNEL
);
1026 if (cp
->ctx_arr
== NULL
)
1029 cp
->ctx_blks
= blks
;
1030 cp
->ctx_blk_size
= ctx_blk_size
;
1031 if (BNX2X_CHIP_IS_E1H(cp
->chip_id
))
1034 cp
->ctx_align
= ctx_blk_size
;
1036 cp
->cids_per_blk
= ctx_blk_size
/ BNX2X_CONTEXT_MEM_SIZE
;
1038 for (i
= 0; i
< blks
; i
++) {
1039 cp
->ctx_arr
[i
].ctx
=
1040 dma_alloc_coherent(&dev
->pcidev
->dev
, cp
->ctx_blk_size
,
1041 &cp
->ctx_arr
[i
].mapping
,
1043 if (cp
->ctx_arr
[i
].ctx
== NULL
)
1046 if (cp
->ctx_align
&& cp
->ctx_blk_size
== ctx_blk_size
) {
1047 if (cp
->ctx_arr
[i
].mapping
& (cp
->ctx_align
- 1)) {
1048 cnic_free_context(dev
);
1049 cp
->ctx_blk_size
+= cp
->ctx_align
;
1058 static int cnic_alloc_bnx2x_resc(struct cnic_dev
*dev
)
1060 struct cnic_local
*cp
= dev
->cnic_priv
;
1061 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
1062 u32 start_cid
= ethdev
->starting_cid
;
1063 int i
, j
, n
, ret
, pages
;
1064 struct cnic_dma
*kwq_16_dma
= &cp
->kwq_16_data_info
;
1066 cp
->max_cid_space
= MAX_ISCSI_TBL_SZ
;
1067 cp
->iscsi_start_cid
= start_cid
;
1068 if (start_cid
< BNX2X_ISCSI_START_CID
) {
1069 u32 delta
= BNX2X_ISCSI_START_CID
- start_cid
;
1071 cp
->iscsi_start_cid
= BNX2X_ISCSI_START_CID
;
1072 cp
->max_cid_space
+= delta
;
1075 cp
->iscsi_tbl
= kzalloc(sizeof(struct cnic_iscsi
) * MAX_ISCSI_TBL_SZ
,
1080 cp
->ctx_tbl
= kzalloc(sizeof(struct cnic_context
) *
1081 cp
->max_cid_space
, GFP_KERNEL
);
1085 for (i
= 0; i
< MAX_ISCSI_TBL_SZ
; i
++) {
1086 cp
->ctx_tbl
[i
].proto
.iscsi
= &cp
->iscsi_tbl
[i
];
1087 cp
->ctx_tbl
[i
].ulp_proto_id
= CNIC_ULP_ISCSI
;
1090 pages
= PAGE_ALIGN(cp
->max_cid_space
* CNIC_KWQ16_DATA_SIZE
) /
1093 ret
= cnic_alloc_dma(dev
, kwq_16_dma
, pages
, 0);
1097 n
= PAGE_SIZE
/ CNIC_KWQ16_DATA_SIZE
;
1098 for (i
= 0, j
= 0; i
< cp
->max_cid_space
; i
++) {
1099 long off
= CNIC_KWQ16_DATA_SIZE
* (i
% n
);
1101 cp
->ctx_tbl
[i
].kwqe_data
= kwq_16_dma
->pg_arr
[j
] + off
;
1102 cp
->ctx_tbl
[i
].kwqe_data_mapping
= kwq_16_dma
->pg_map_arr
[j
] +
1105 if ((i
% n
) == (n
- 1))
1109 ret
= cnic_alloc_kcq(dev
, &cp
->kcq1
);
1113 pages
= PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS
*
1114 BNX2X_ISCSI_CONN_BUF_SIZE
) / PAGE_SIZE
;
1115 ret
= cnic_alloc_dma(dev
, &cp
->conn_buf_info
, pages
, 1);
1119 pages
= PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE
) / PAGE_SIZE
;
1120 ret
= cnic_alloc_dma(dev
, &cp
->gbl_buf_info
, pages
, 0);
1124 ret
= cnic_alloc_bnx2x_context(dev
);
1128 cp
->bnx2x_def_status_blk
= cp
->ethdev
->irq_arr
[1].status_blk
;
1130 memset(cp
->status_blk
.bnx2x
, 0, sizeof(*cp
->status_blk
.bnx2x
));
1132 cp
->l2_rx_ring_size
= 15;
1134 ret
= cnic_alloc_l2_rings(dev
, 4);
1138 ret
= cnic_alloc_uio(dev
);
1145 cnic_free_resc(dev
);
1149 static inline u32
cnic_kwq_avail(struct cnic_local
*cp
)
1151 return cp
->max_kwq_idx
-
1152 ((cp
->kwq_prod_idx
- cp
->kwq_con_idx
) & cp
->max_kwq_idx
);
1155 static int cnic_submit_bnx2_kwqes(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1158 struct cnic_local
*cp
= dev
->cnic_priv
;
1159 struct kwqe
*prod_qe
;
1160 u16 prod
, sw_prod
, i
;
1162 if (!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
1163 return -EAGAIN
; /* bnx2 is down */
1165 spin_lock_bh(&cp
->cnic_ulp_lock
);
1166 if (num_wqes
> cnic_kwq_avail(cp
) &&
1167 !test_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
)) {
1168 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1172 clear_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
);
1174 prod
= cp
->kwq_prod_idx
;
1175 sw_prod
= prod
& MAX_KWQ_IDX
;
1176 for (i
= 0; i
< num_wqes
; i
++) {
1177 prod_qe
= &cp
->kwq
[KWQ_PG(sw_prod
)][KWQ_IDX(sw_prod
)];
1178 memcpy(prod_qe
, wqes
[i
], sizeof(struct kwqe
));
1180 sw_prod
= prod
& MAX_KWQ_IDX
;
1182 cp
->kwq_prod_idx
= prod
;
1184 CNIC_WR16(dev
, cp
->kwq_io_addr
, cp
->kwq_prod_idx
);
1186 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1190 static void *cnic_get_kwqe_16_data(struct cnic_local
*cp
, u32 l5_cid
,
1191 union l5cm_specific_data
*l5_data
)
1193 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1196 map
= ctx
->kwqe_data_mapping
;
1197 l5_data
->phy_address
.lo
= (u64
) map
& 0xffffffff;
1198 l5_data
->phy_address
.hi
= (u64
) map
>> 32;
1199 return ctx
->kwqe_data
;
1202 static int cnic_submit_kwqe_16(struct cnic_dev
*dev
, u32 cmd
, u32 cid
,
1203 u32 type
, union l5cm_specific_data
*l5_data
)
1205 struct cnic_local
*cp
= dev
->cnic_priv
;
1206 struct l5cm_spe kwqe
;
1207 struct kwqe_16
*kwq
[1];
1210 kwqe
.hdr
.conn_and_cmd_data
=
1211 cpu_to_le32(((cmd
<< SPE_HDR_CMD_ID_SHIFT
) |
1212 BNX2X_HW_CID(cid
, cp
->func
)));
1213 kwqe
.hdr
.type
= cpu_to_le16(type
);
1214 kwqe
.hdr
.reserved
= 0;
1215 kwqe
.data
.phy_address
.lo
= cpu_to_le32(l5_data
->phy_address
.lo
);
1216 kwqe
.data
.phy_address
.hi
= cpu_to_le32(l5_data
->phy_address
.hi
);
1218 kwq
[0] = (struct kwqe_16
*) &kwqe
;
1220 spin_lock_bh(&cp
->cnic_ulp_lock
);
1221 ret
= cp
->ethdev
->drv_submit_kwqes_16(dev
->netdev
, kwq
, 1);
1222 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1230 static void cnic_reply_bnx2x_kcqes(struct cnic_dev
*dev
, int ulp_type
,
1231 struct kcqe
*cqes
[], u32 num_cqes
)
1233 struct cnic_local
*cp
= dev
->cnic_priv
;
1234 struct cnic_ulp_ops
*ulp_ops
;
1237 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
1238 if (likely(ulp_ops
)) {
1239 ulp_ops
->indicate_kcqes(cp
->ulp_handle
[ulp_type
],
1245 static int cnic_bnx2x_iscsi_init1(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1247 struct cnic_local
*cp
= dev
->cnic_priv
;
1248 struct iscsi_kwqe_init1
*req1
= (struct iscsi_kwqe_init1
*) kwqe
;
1249 int func
= cp
->func
, pages
;
1252 cp
->num_iscsi_tasks
= req1
->num_tasks_per_conn
;
1253 cp
->num_ccells
= req1
->num_ccells_per_conn
;
1254 cp
->task_array_size
= BNX2X_ISCSI_TASK_CONTEXT_SIZE
*
1255 cp
->num_iscsi_tasks
;
1256 cp
->r2tq_size
= cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
*
1257 BNX2X_ISCSI_R2TQE_SIZE
;
1258 cp
->hq_size
= cp
->num_ccells
* BNX2X_ISCSI_HQ_BD_SIZE
;
1259 pages
= PAGE_ALIGN(cp
->hq_size
) / PAGE_SIZE
;
1260 hq_bds
= pages
* (PAGE_SIZE
/ BNX2X_ISCSI_HQ_BD_SIZE
);
1261 cp
->num_cqs
= req1
->num_cqs
;
1263 if (!dev
->max_iscsi_conn
)
1266 /* init Tstorm RAM */
1267 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_ISCSI_RQ_SIZE_OFFSET(func
),
1269 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_ISCSI_PAGE_SIZE_OFFSET(func
),
1271 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1272 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func
), PAGE_SHIFT
);
1273 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+
1274 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func
),
1275 req1
->num_tasks_per_conn
);
1277 /* init Ustorm RAM */
1278 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1279 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func
),
1280 req1
->rq_buffer_size
);
1281 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_PAGE_SIZE_OFFSET(func
),
1283 CNIC_WR8(dev
, BAR_USTRORM_INTMEM
+
1284 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func
), PAGE_SHIFT
);
1285 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1286 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func
),
1287 req1
->num_tasks_per_conn
);
1288 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_RQ_SIZE_OFFSET(func
),
1290 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_CQ_SIZE_OFFSET(func
),
1292 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_R2TQ_SIZE_OFFSET(func
),
1293 cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
);
1295 /* init Xstorm RAM */
1296 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_PAGE_SIZE_OFFSET(func
),
1298 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1299 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func
), PAGE_SHIFT
);
1300 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
1301 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func
),
1302 req1
->num_tasks_per_conn
);
1303 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_HQ_SIZE_OFFSET(func
),
1305 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_SQ_SIZE_OFFSET(func
),
1306 req1
->num_tasks_per_conn
);
1307 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func
),
1308 cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
);
1310 /* init Cstorm RAM */
1311 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_PAGE_SIZE_OFFSET(func
),
1313 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
1314 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func
), PAGE_SHIFT
);
1315 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
1316 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func
),
1317 req1
->num_tasks_per_conn
);
1318 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_CQ_SIZE_OFFSET(func
),
1320 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_HQ_SIZE_OFFSET(func
),
1326 static int cnic_bnx2x_iscsi_init2(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1328 struct iscsi_kwqe_init2
*req2
= (struct iscsi_kwqe_init2
*) kwqe
;
1329 struct cnic_local
*cp
= dev
->cnic_priv
;
1330 int func
= cp
->func
;
1331 struct iscsi_kcqe kcqe
;
1332 struct kcqe
*cqes
[1];
1334 memset(&kcqe
, 0, sizeof(kcqe
));
1335 if (!dev
->max_iscsi_conn
) {
1336 kcqe
.completion_status
=
1337 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED
;
1341 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
1342 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func
), req2
->error_bit_map
[0]);
1343 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
1344 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func
) + 4,
1345 req2
->error_bit_map
[1]);
1347 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1348 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func
), req2
->max_cq_sqn
);
1349 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
1350 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func
), req2
->error_bit_map
[0]);
1351 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
1352 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func
) + 4,
1353 req2
->error_bit_map
[1]);
1355 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
1356 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func
), req2
->max_cq_sqn
);
1358 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1361 kcqe
.op_code
= ISCSI_KCQE_OPCODE_INIT
;
1362 cqes
[0] = (struct kcqe
*) &kcqe
;
1363 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1368 static void cnic_free_bnx2x_conn_resc(struct cnic_dev
*dev
, u32 l5_cid
)
1370 struct cnic_local
*cp
= dev
->cnic_priv
;
1371 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1373 if (ctx
->ulp_proto_id
== CNIC_ULP_ISCSI
) {
1374 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1376 cnic_free_dma(dev
, &iscsi
->hq_info
);
1377 cnic_free_dma(dev
, &iscsi
->r2tq_info
);
1378 cnic_free_dma(dev
, &iscsi
->task_array_info
);
1380 cnic_free_id(&cp
->cid_tbl
, ctx
->cid
);
1384 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev
*dev
, u32 l5_cid
)
1388 struct cnic_local
*cp
= dev
->cnic_priv
;
1389 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1390 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1392 cid
= cnic_alloc_new_id(&cp
->cid_tbl
);
1399 pages
= PAGE_ALIGN(cp
->task_array_size
) / PAGE_SIZE
;
1401 ret
= cnic_alloc_dma(dev
, &iscsi
->task_array_info
, pages
, 1);
1405 pages
= PAGE_ALIGN(cp
->r2tq_size
) / PAGE_SIZE
;
1406 ret
= cnic_alloc_dma(dev
, &iscsi
->r2tq_info
, pages
, 1);
1410 pages
= PAGE_ALIGN(cp
->hq_size
) / PAGE_SIZE
;
1411 ret
= cnic_alloc_dma(dev
, &iscsi
->hq_info
, pages
, 1);
1418 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1422 static void *cnic_get_bnx2x_ctx(struct cnic_dev
*dev
, u32 cid
, int init
,
1423 struct regpair
*ctx_addr
)
1425 struct cnic_local
*cp
= dev
->cnic_priv
;
1426 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
1427 int blk
= (cid
- ethdev
->starting_cid
) / cp
->cids_per_blk
;
1428 int off
= (cid
- ethdev
->starting_cid
) % cp
->cids_per_blk
;
1429 unsigned long align_off
= 0;
1433 if (cp
->ctx_align
) {
1434 unsigned long mask
= cp
->ctx_align
- 1;
1436 if (cp
->ctx_arr
[blk
].mapping
& mask
)
1437 align_off
= cp
->ctx_align
-
1438 (cp
->ctx_arr
[blk
].mapping
& mask
);
1440 ctx_map
= cp
->ctx_arr
[blk
].mapping
+ align_off
+
1441 (off
* BNX2X_CONTEXT_MEM_SIZE
);
1442 ctx
= cp
->ctx_arr
[blk
].ctx
+ align_off
+
1443 (off
* BNX2X_CONTEXT_MEM_SIZE
);
1445 memset(ctx
, 0, BNX2X_CONTEXT_MEM_SIZE
);
1447 ctx_addr
->lo
= ctx_map
& 0xffffffff;
1448 ctx_addr
->hi
= (u64
) ctx_map
>> 32;
1452 static int cnic_setup_bnx2x_ctx(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1455 struct cnic_local
*cp
= dev
->cnic_priv
;
1456 struct iscsi_kwqe_conn_offload1
*req1
=
1457 (struct iscsi_kwqe_conn_offload1
*) wqes
[0];
1458 struct iscsi_kwqe_conn_offload2
*req2
=
1459 (struct iscsi_kwqe_conn_offload2
*) wqes
[1];
1460 struct iscsi_kwqe_conn_offload3
*req3
;
1461 struct cnic_context
*ctx
= &cp
->ctx_tbl
[req1
->iscsi_conn_id
];
1462 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1464 u32 hw_cid
= BNX2X_HW_CID(cid
, cp
->func
);
1465 struct iscsi_context
*ictx
;
1466 struct regpair context_addr
;
1467 int i
, j
, n
= 2, n_max
;
1470 if (!req2
->num_additional_wqes
)
1473 n_max
= req2
->num_additional_wqes
+ 2;
1475 ictx
= cnic_get_bnx2x_ctx(dev
, cid
, 1, &context_addr
);
1479 req3
= (struct iscsi_kwqe_conn_offload3
*) wqes
[n
++];
1481 ictx
->xstorm_ag_context
.hq_prod
= 1;
1483 ictx
->xstorm_st_context
.iscsi
.first_burst_length
=
1484 ISCSI_DEF_FIRST_BURST_LEN
;
1485 ictx
->xstorm_st_context
.iscsi
.max_send_pdu_length
=
1486 ISCSI_DEF_MAX_RECV_SEG_LEN
;
1487 ictx
->xstorm_st_context
.iscsi
.sq_pbl_base
.lo
=
1488 req1
->sq_page_table_addr_lo
;
1489 ictx
->xstorm_st_context
.iscsi
.sq_pbl_base
.hi
=
1490 req1
->sq_page_table_addr_hi
;
1491 ictx
->xstorm_st_context
.iscsi
.sq_curr_pbe
.lo
= req2
->sq_first_pte
.hi
;
1492 ictx
->xstorm_st_context
.iscsi
.sq_curr_pbe
.hi
= req2
->sq_first_pte
.lo
;
1493 ictx
->xstorm_st_context
.iscsi
.hq_pbl_base
.lo
=
1494 iscsi
->hq_info
.pgtbl_map
& 0xffffffff;
1495 ictx
->xstorm_st_context
.iscsi
.hq_pbl_base
.hi
=
1496 (u64
) iscsi
->hq_info
.pgtbl_map
>> 32;
1497 ictx
->xstorm_st_context
.iscsi
.hq_curr_pbe_base
.lo
=
1498 iscsi
->hq_info
.pgtbl
[0];
1499 ictx
->xstorm_st_context
.iscsi
.hq_curr_pbe_base
.hi
=
1500 iscsi
->hq_info
.pgtbl
[1];
1501 ictx
->xstorm_st_context
.iscsi
.r2tq_pbl_base
.lo
=
1502 iscsi
->r2tq_info
.pgtbl_map
& 0xffffffff;
1503 ictx
->xstorm_st_context
.iscsi
.r2tq_pbl_base
.hi
=
1504 (u64
) iscsi
->r2tq_info
.pgtbl_map
>> 32;
1505 ictx
->xstorm_st_context
.iscsi
.r2tq_curr_pbe_base
.lo
=
1506 iscsi
->r2tq_info
.pgtbl
[0];
1507 ictx
->xstorm_st_context
.iscsi
.r2tq_curr_pbe_base
.hi
=
1508 iscsi
->r2tq_info
.pgtbl
[1];
1509 ictx
->xstorm_st_context
.iscsi
.task_pbl_base
.lo
=
1510 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1511 ictx
->xstorm_st_context
.iscsi
.task_pbl_base
.hi
=
1512 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1513 ictx
->xstorm_st_context
.iscsi
.task_pbl_cache_idx
=
1514 BNX2X_ISCSI_PBL_NOT_CACHED
;
1515 ictx
->xstorm_st_context
.iscsi
.flags
.flags
|=
1516 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA
;
1517 ictx
->xstorm_st_context
.iscsi
.flags
.flags
|=
1518 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T
;
1520 ictx
->tstorm_st_context
.iscsi
.hdr_bytes_2_fetch
= ISCSI_HEADER_SIZE
;
1521 /* TSTORM requires the base address of RQ DB & not PTE */
1522 ictx
->tstorm_st_context
.iscsi
.rq_db_phy_addr
.lo
=
1523 req2
->rq_page_table_addr_lo
& PAGE_MASK
;
1524 ictx
->tstorm_st_context
.iscsi
.rq_db_phy_addr
.hi
=
1525 req2
->rq_page_table_addr_hi
;
1526 ictx
->tstorm_st_context
.iscsi
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1527 ictx
->tstorm_st_context
.tcp
.cwnd
= 0x5A8;
1528 ictx
->tstorm_st_context
.tcp
.flags2
|=
1529 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN
;
1531 ictx
->timers_context
.flags
|= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG
;
1533 ictx
->ustorm_st_context
.ring
.rq
.pbl_base
.lo
=
1534 req2
->rq_page_table_addr_lo
;
1535 ictx
->ustorm_st_context
.ring
.rq
.pbl_base
.hi
=
1536 req2
->rq_page_table_addr_hi
;
1537 ictx
->ustorm_st_context
.ring
.rq
.curr_pbe
.lo
= req3
->qp_first_pte
[0].hi
;
1538 ictx
->ustorm_st_context
.ring
.rq
.curr_pbe
.hi
= req3
->qp_first_pte
[0].lo
;
1539 ictx
->ustorm_st_context
.ring
.r2tq
.pbl_base
.lo
=
1540 iscsi
->r2tq_info
.pgtbl_map
& 0xffffffff;
1541 ictx
->ustorm_st_context
.ring
.r2tq
.pbl_base
.hi
=
1542 (u64
) iscsi
->r2tq_info
.pgtbl_map
>> 32;
1543 ictx
->ustorm_st_context
.ring
.r2tq
.curr_pbe
.lo
=
1544 iscsi
->r2tq_info
.pgtbl
[0];
1545 ictx
->ustorm_st_context
.ring
.r2tq
.curr_pbe
.hi
=
1546 iscsi
->r2tq_info
.pgtbl
[1];
1547 ictx
->ustorm_st_context
.ring
.cq_pbl_base
.lo
=
1548 req1
->cq_page_table_addr_lo
;
1549 ictx
->ustorm_st_context
.ring
.cq_pbl_base
.hi
=
1550 req1
->cq_page_table_addr_hi
;
1551 ictx
->ustorm_st_context
.ring
.cq
[0].cq_sn
= ISCSI_INITIAL_SN
;
1552 ictx
->ustorm_st_context
.ring
.cq
[0].curr_pbe
.lo
= req2
->cq_first_pte
.hi
;
1553 ictx
->ustorm_st_context
.ring
.cq
[0].curr_pbe
.hi
= req2
->cq_first_pte
.lo
;
1554 ictx
->ustorm_st_context
.task_pbe_cache_index
=
1555 BNX2X_ISCSI_PBL_NOT_CACHED
;
1556 ictx
->ustorm_st_context
.task_pdu_cache_index
=
1557 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED
;
1559 for (i
= 1, j
= 1; i
< cp
->num_cqs
; i
++, j
++) {
1563 req3
= (struct iscsi_kwqe_conn_offload3
*) wqes
[n
++];
1566 ictx
->ustorm_st_context
.ring
.cq
[i
].cq_sn
= ISCSI_INITIAL_SN
;
1567 ictx
->ustorm_st_context
.ring
.cq
[i
].curr_pbe
.lo
=
1568 req3
->qp_first_pte
[j
].hi
;
1569 ictx
->ustorm_st_context
.ring
.cq
[i
].curr_pbe
.hi
=
1570 req3
->qp_first_pte
[j
].lo
;
1573 ictx
->ustorm_st_context
.task_pbl_base
.lo
=
1574 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1575 ictx
->ustorm_st_context
.task_pbl_base
.hi
=
1576 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1577 ictx
->ustorm_st_context
.tce_phy_addr
.lo
=
1578 iscsi
->task_array_info
.pgtbl
[0];
1579 ictx
->ustorm_st_context
.tce_phy_addr
.hi
=
1580 iscsi
->task_array_info
.pgtbl
[1];
1581 ictx
->ustorm_st_context
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1582 ictx
->ustorm_st_context
.num_cqs
= cp
->num_cqs
;
1583 ictx
->ustorm_st_context
.negotiated_rx
|= ISCSI_DEF_MAX_RECV_SEG_LEN
;
1584 ictx
->ustorm_st_context
.negotiated_rx_and_flags
|=
1585 ISCSI_DEF_MAX_BURST_LEN
;
1586 ictx
->ustorm_st_context
.negotiated_rx
|=
1587 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T
<<
1588 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT
;
1590 ictx
->cstorm_st_context
.hq_pbl_base
.lo
=
1591 iscsi
->hq_info
.pgtbl_map
& 0xffffffff;
1592 ictx
->cstorm_st_context
.hq_pbl_base
.hi
=
1593 (u64
) iscsi
->hq_info
.pgtbl_map
>> 32;
1594 ictx
->cstorm_st_context
.hq_curr_pbe
.lo
= iscsi
->hq_info
.pgtbl
[0];
1595 ictx
->cstorm_st_context
.hq_curr_pbe
.hi
= iscsi
->hq_info
.pgtbl
[1];
1596 ictx
->cstorm_st_context
.task_pbl_base
.lo
=
1597 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1598 ictx
->cstorm_st_context
.task_pbl_base
.hi
=
1599 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1600 /* CSTORM and USTORM initialization is different, CSTORM requires
1601 * CQ DB base & not PTE addr */
1602 ictx
->cstorm_st_context
.cq_db_base
.lo
=
1603 req1
->cq_page_table_addr_lo
& PAGE_MASK
;
1604 ictx
->cstorm_st_context
.cq_db_base
.hi
= req1
->cq_page_table_addr_hi
;
1605 ictx
->cstorm_st_context
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1606 ictx
->cstorm_st_context
.cq_proc_en_bit_map
= (1 << cp
->num_cqs
) - 1;
1607 for (i
= 0; i
< cp
->num_cqs
; i
++) {
1608 ictx
->cstorm_st_context
.cq_c_prod_sqn_arr
.sqn
[i
] =
1610 ictx
->cstorm_st_context
.cq_c_sqn_2_notify_arr
.sqn
[i
] =
1614 ictx
->xstorm_ag_context
.cdu_reserved
=
1615 CDU_RSRVD_VALUE_TYPE_A(hw_cid
, CDU_REGION_NUMBER_XCM_AG
,
1616 ISCSI_CONNECTION_TYPE
);
1617 ictx
->ustorm_ag_context
.cdu_usage
=
1618 CDU_RSRVD_VALUE_TYPE_A(hw_cid
, CDU_REGION_NUMBER_UCM_AG
,
1619 ISCSI_CONNECTION_TYPE
);
1624 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1627 struct iscsi_kwqe_conn_offload1
*req1
;
1628 struct iscsi_kwqe_conn_offload2
*req2
;
1629 struct cnic_local
*cp
= dev
->cnic_priv
;
1630 struct iscsi_kcqe kcqe
;
1631 struct kcqe
*cqes
[1];
1640 req1
= (struct iscsi_kwqe_conn_offload1
*) wqes
[0];
1641 req2
= (struct iscsi_kwqe_conn_offload2
*) wqes
[1];
1642 if ((num
- 2) < req2
->num_additional_wqes
) {
1646 *work
= 2 + req2
->num_additional_wqes
;;
1648 l5_cid
= req1
->iscsi_conn_id
;
1649 if (l5_cid
>= MAX_ISCSI_TBL_SZ
)
1652 memset(&kcqe
, 0, sizeof(kcqe
));
1653 kcqe
.op_code
= ISCSI_KCQE_OPCODE_OFFLOAD_CONN
;
1654 kcqe
.iscsi_conn_id
= l5_cid
;
1655 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE
;
1657 if (atomic_inc_return(&cp
->iscsi_conn
) > dev
->max_iscsi_conn
) {
1658 atomic_dec(&cp
->iscsi_conn
);
1662 ret
= cnic_alloc_bnx2x_conn_resc(dev
, l5_cid
);
1664 atomic_dec(&cp
->iscsi_conn
);
1668 ret
= cnic_setup_bnx2x_ctx(dev
, wqes
, num
);
1670 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1671 atomic_dec(&cp
->iscsi_conn
);
1675 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1676 kcqe
.iscsi_conn_context_id
= BNX2X_HW_CID(cp
->ctx_tbl
[l5_cid
].cid
,
1680 cqes
[0] = (struct kcqe
*) &kcqe
;
1681 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1686 static int cnic_bnx2x_iscsi_update(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1688 struct cnic_local
*cp
= dev
->cnic_priv
;
1689 struct iscsi_kwqe_conn_update
*req
=
1690 (struct iscsi_kwqe_conn_update
*) kwqe
;
1692 union l5cm_specific_data l5_data
;
1693 u32 l5_cid
, cid
= BNX2X_SW_CID(req
->context_id
);
1696 if (cnic_get_l5_cid(cp
, cid
, &l5_cid
) != 0)
1699 data
= cnic_get_kwqe_16_data(cp
, l5_cid
, &l5_data
);
1703 memcpy(data
, kwqe
, sizeof(struct kwqe
));
1705 ret
= cnic_submit_kwqe_16(dev
, ISCSI_RAMROD_CMD_ID_UPDATE_CONN
,
1706 req
->context_id
, ISCSI_CONNECTION_TYPE
, &l5_data
);
1710 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1712 struct cnic_local
*cp
= dev
->cnic_priv
;
1713 struct iscsi_kwqe_conn_destroy
*req
=
1714 (struct iscsi_kwqe_conn_destroy
*) kwqe
;
1715 union l5cm_specific_data l5_data
;
1716 u32 l5_cid
= req
->reserved0
;
1717 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1719 struct iscsi_kcqe kcqe
;
1720 struct kcqe
*cqes
[1];
1722 if (!(ctx
->ctx_flags
& CTX_FL_OFFLD_START
))
1723 goto skip_cfc_delete
;
1725 while (!time_after(jiffies
, ctx
->timestamp
+ (2 * HZ
)))
1728 init_waitqueue_head(&ctx
->waitq
);
1730 memset(&l5_data
, 0, sizeof(l5_data
));
1731 ret
= cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_CFC_DEL
,
1733 ETH_CONNECTION_TYPE
|
1734 (1 << SPE_HDR_COMMON_RAMROD_SHIFT
),
1737 wait_event(ctx
->waitq
, ctx
->wait_cond
);
1740 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1742 atomic_dec(&cp
->iscsi_conn
);
1744 memset(&kcqe
, 0, sizeof(kcqe
));
1745 kcqe
.op_code
= ISCSI_KCQE_OPCODE_DESTROY_CONN
;
1746 kcqe
.iscsi_conn_id
= l5_cid
;
1747 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1748 kcqe
.iscsi_conn_context_id
= req
->context_id
;
1750 cqes
[0] = (struct kcqe
*) &kcqe
;
1751 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1756 static void cnic_init_storm_conn_bufs(struct cnic_dev
*dev
,
1757 struct l4_kwq_connect_req1
*kwqe1
,
1758 struct l4_kwq_connect_req3
*kwqe3
,
1759 struct l5cm_active_conn_buffer
*conn_buf
)
1761 struct l5cm_conn_addr_params
*conn_addr
= &conn_buf
->conn_addr_buf
;
1762 struct l5cm_xstorm_conn_buffer
*xstorm_buf
=
1763 &conn_buf
->xstorm_conn_buffer
;
1764 struct l5cm_tstorm_conn_buffer
*tstorm_buf
=
1765 &conn_buf
->tstorm_conn_buffer
;
1766 struct regpair context_addr
;
1767 u32 cid
= BNX2X_SW_CID(kwqe1
->cid
);
1768 struct in6_addr src_ip
, dst_ip
;
1772 addrp
= (u32
*) &conn_addr
->local_ip_addr
;
1773 for (i
= 0; i
< 4; i
++, addrp
++)
1774 src_ip
.in6_u
.u6_addr32
[i
] = cpu_to_be32(*addrp
);
1776 addrp
= (u32
*) &conn_addr
->remote_ip_addr
;
1777 for (i
= 0; i
< 4; i
++, addrp
++)
1778 dst_ip
.in6_u
.u6_addr32
[i
] = cpu_to_be32(*addrp
);
1780 cnic_get_bnx2x_ctx(dev
, cid
, 0, &context_addr
);
1782 xstorm_buf
->context_addr
.hi
= context_addr
.hi
;
1783 xstorm_buf
->context_addr
.lo
= context_addr
.lo
;
1784 xstorm_buf
->mss
= 0xffff;
1785 xstorm_buf
->rcv_buf
= kwqe3
->rcv_buf
;
1786 if (kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE
)
1787 xstorm_buf
->params
|= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE
;
1788 xstorm_buf
->pseudo_header_checksum
=
1789 swab16(~csum_ipv6_magic(&src_ip
, &dst_ip
, 0, IPPROTO_TCP
, 0));
1791 if (!(kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK
))
1792 tstorm_buf
->params
|=
1793 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE
;
1794 if (kwqe3
->ka_timeout
) {
1795 tstorm_buf
->ka_enable
= 1;
1796 tstorm_buf
->ka_timeout
= kwqe3
->ka_timeout
;
1797 tstorm_buf
->ka_interval
= kwqe3
->ka_interval
;
1798 tstorm_buf
->ka_max_probe_count
= kwqe3
->ka_max_probe_count
;
1800 tstorm_buf
->rcv_buf
= kwqe3
->rcv_buf
;
1801 tstorm_buf
->snd_buf
= kwqe3
->snd_buf
;
1802 tstorm_buf
->max_rt_time
= 0xffffffff;
1805 static void cnic_init_bnx2x_mac(struct cnic_dev
*dev
)
1807 struct cnic_local
*cp
= dev
->cnic_priv
;
1808 int func
= CNIC_FUNC(cp
);
1809 u8
*mac
= dev
->mac_addr
;
1811 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1812 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func
), mac
[0]);
1813 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1814 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func
), mac
[1]);
1815 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1816 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func
), mac
[2]);
1817 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1818 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func
), mac
[3]);
1819 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1820 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func
), mac
[4]);
1821 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1822 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func
), mac
[5]);
1824 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1825 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func
), mac
[5]);
1826 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1827 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func
) + 1,
1829 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1830 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func
), mac
[3]);
1831 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1832 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func
) + 1,
1834 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1835 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func
) + 2,
1837 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1838 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func
) + 3,
1842 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev
*dev
, int tcp_ts
)
1844 struct cnic_local
*cp
= dev
->cnic_priv
;
1845 u8 xstorm_flags
= XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN
;
1846 u16 tstorm_flags
= 0;
1849 xstorm_flags
|= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED
;
1850 tstorm_flags
|= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED
;
1853 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1854 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp
->func
), xstorm_flags
);
1856 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+
1857 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp
->func
), tstorm_flags
);
1860 static int cnic_bnx2x_connect(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1863 struct cnic_local
*cp
= dev
->cnic_priv
;
1864 struct l4_kwq_connect_req1
*kwqe1
=
1865 (struct l4_kwq_connect_req1
*) wqes
[0];
1866 struct l4_kwq_connect_req3
*kwqe3
;
1867 struct l5cm_active_conn_buffer
*conn_buf
;
1868 struct l5cm_conn_addr_params
*conn_addr
;
1869 union l5cm_specific_data l5_data
;
1870 u32 l5_cid
= kwqe1
->pg_cid
;
1871 struct cnic_sock
*csk
= &cp
->csk_tbl
[l5_cid
];
1872 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1880 if (kwqe1
->conn_flags
& L4_KWQ_CONNECT_REQ1_IP_V6
)
1890 if (sizeof(*conn_buf
) > CNIC_KWQ16_DATA_SIZE
) {
1891 netdev_err(dev
->netdev
, "conn_buf size too big\n");
1894 conn_buf
= cnic_get_kwqe_16_data(cp
, l5_cid
, &l5_data
);
1898 memset(conn_buf
, 0, sizeof(*conn_buf
));
1900 conn_addr
= &conn_buf
->conn_addr_buf
;
1901 conn_addr
->remote_addr_0
= csk
->ha
[0];
1902 conn_addr
->remote_addr_1
= csk
->ha
[1];
1903 conn_addr
->remote_addr_2
= csk
->ha
[2];
1904 conn_addr
->remote_addr_3
= csk
->ha
[3];
1905 conn_addr
->remote_addr_4
= csk
->ha
[4];
1906 conn_addr
->remote_addr_5
= csk
->ha
[5];
1908 if (kwqe1
->conn_flags
& L4_KWQ_CONNECT_REQ1_IP_V6
) {
1909 struct l4_kwq_connect_req2
*kwqe2
=
1910 (struct l4_kwq_connect_req2
*) wqes
[1];
1912 conn_addr
->local_ip_addr
.ip_addr_hi_hi
= kwqe2
->src_ip_v6_4
;
1913 conn_addr
->local_ip_addr
.ip_addr_hi_lo
= kwqe2
->src_ip_v6_3
;
1914 conn_addr
->local_ip_addr
.ip_addr_lo_hi
= kwqe2
->src_ip_v6_2
;
1916 conn_addr
->remote_ip_addr
.ip_addr_hi_hi
= kwqe2
->dst_ip_v6_4
;
1917 conn_addr
->remote_ip_addr
.ip_addr_hi_lo
= kwqe2
->dst_ip_v6_3
;
1918 conn_addr
->remote_ip_addr
.ip_addr_lo_hi
= kwqe2
->dst_ip_v6_2
;
1919 conn_addr
->params
|= L5CM_CONN_ADDR_PARAMS_IP_VERSION
;
1921 kwqe3
= (struct l4_kwq_connect_req3
*) wqes
[*work
- 1];
1923 conn_addr
->local_ip_addr
.ip_addr_lo_lo
= kwqe1
->src_ip
;
1924 conn_addr
->remote_ip_addr
.ip_addr_lo_lo
= kwqe1
->dst_ip
;
1925 conn_addr
->local_tcp_port
= kwqe1
->src_port
;
1926 conn_addr
->remote_tcp_port
= kwqe1
->dst_port
;
1928 conn_addr
->pmtu
= kwqe3
->pmtu
;
1929 cnic_init_storm_conn_bufs(dev
, kwqe1
, kwqe3
, conn_buf
);
1931 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
1932 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp
->func
), csk
->vlan_id
);
1934 cnic_bnx2x_set_tcp_timestamp(dev
,
1935 kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_TIME_STAMP
);
1937 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_TCP_CONNECT
,
1938 kwqe1
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
1940 ctx
->ctx_flags
|= CTX_FL_OFFLD_START
;
1945 static int cnic_bnx2x_close(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1947 struct l4_kwq_close_req
*req
= (struct l4_kwq_close_req
*) kwqe
;
1948 union l5cm_specific_data l5_data
;
1951 memset(&l5_data
, 0, sizeof(l5_data
));
1952 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_CLOSE
,
1953 req
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
1957 static int cnic_bnx2x_reset(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1959 struct l4_kwq_reset_req
*req
= (struct l4_kwq_reset_req
*) kwqe
;
1960 union l5cm_specific_data l5_data
;
1963 memset(&l5_data
, 0, sizeof(l5_data
));
1964 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_ABORT
,
1965 req
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
1968 static int cnic_bnx2x_offload_pg(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1970 struct l4_kwq_offload_pg
*req
= (struct l4_kwq_offload_pg
*) kwqe
;
1972 struct kcqe
*cqes
[1];
1974 memset(&kcqe
, 0, sizeof(kcqe
));
1975 kcqe
.pg_host_opaque
= req
->host_opaque
;
1976 kcqe
.pg_cid
= req
->host_opaque
;
1977 kcqe
.op_code
= L4_KCQE_OPCODE_VALUE_OFFLOAD_PG
;
1978 cqes
[0] = (struct kcqe
*) &kcqe
;
1979 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_L4
, cqes
, 1);
1983 static int cnic_bnx2x_update_pg(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1985 struct l4_kwq_update_pg
*req
= (struct l4_kwq_update_pg
*) kwqe
;
1987 struct kcqe
*cqes
[1];
1989 memset(&kcqe
, 0, sizeof(kcqe
));
1990 kcqe
.pg_host_opaque
= req
->pg_host_opaque
;
1991 kcqe
.pg_cid
= req
->pg_cid
;
1992 kcqe
.op_code
= L4_KCQE_OPCODE_VALUE_UPDATE_PG
;
1993 cqes
[0] = (struct kcqe
*) &kcqe
;
1994 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_L4
, cqes
, 1);
1998 static int cnic_submit_bnx2x_kwqes(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
2005 if (!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
2006 return -EAGAIN
; /* bnx2 is down */
2008 for (i
= 0; i
< num_wqes
; ) {
2010 opcode
= KWQE_OPCODE(kwqe
->kwqe_op_flag
);
2014 case ISCSI_KWQE_OPCODE_INIT1
:
2015 ret
= cnic_bnx2x_iscsi_init1(dev
, kwqe
);
2017 case ISCSI_KWQE_OPCODE_INIT2
:
2018 ret
= cnic_bnx2x_iscsi_init2(dev
, kwqe
);
2020 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1
:
2021 ret
= cnic_bnx2x_iscsi_ofld1(dev
, &wqes
[i
],
2022 num_wqes
- i
, &work
);
2024 case ISCSI_KWQE_OPCODE_UPDATE_CONN
:
2025 ret
= cnic_bnx2x_iscsi_update(dev
, kwqe
);
2027 case ISCSI_KWQE_OPCODE_DESTROY_CONN
:
2028 ret
= cnic_bnx2x_iscsi_destroy(dev
, kwqe
);
2030 case L4_KWQE_OPCODE_VALUE_CONNECT1
:
2031 ret
= cnic_bnx2x_connect(dev
, &wqes
[i
], num_wqes
- i
,
2034 case L4_KWQE_OPCODE_VALUE_CLOSE
:
2035 ret
= cnic_bnx2x_close(dev
, kwqe
);
2037 case L4_KWQE_OPCODE_VALUE_RESET
:
2038 ret
= cnic_bnx2x_reset(dev
, kwqe
);
2040 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG
:
2041 ret
= cnic_bnx2x_offload_pg(dev
, kwqe
);
2043 case L4_KWQE_OPCODE_VALUE_UPDATE_PG
:
2044 ret
= cnic_bnx2x_update_pg(dev
, kwqe
);
2046 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG
:
2051 netdev_err(dev
->netdev
, "Unknown type of KWQE(0x%x)\n",
2056 netdev_err(dev
->netdev
, "KWQE(0x%x) failed\n",
2063 static void service_kcqes(struct cnic_dev
*dev
, int num_cqes
)
2065 struct cnic_local
*cp
= dev
->cnic_priv
;
2071 struct cnic_ulp_ops
*ulp_ops
;
2073 u32 kcqe_op_flag
= cp
->completed_kcq
[i
]->kcqe_op_flag
;
2074 u32 kcqe_layer
= kcqe_op_flag
& KCQE_FLAGS_LAYER_MASK
;
2076 if (unlikely(kcqe_op_flag
& KCQE_RAMROD_COMPLETION
))
2077 cnic_kwq_completion(dev
, 1);
2079 while (j
< num_cqes
) {
2080 u32 next_op
= cp
->completed_kcq
[i
+ j
]->kcqe_op_flag
;
2082 if ((next_op
& KCQE_FLAGS_LAYER_MASK
) != kcqe_layer
)
2085 if (unlikely(next_op
& KCQE_RAMROD_COMPLETION
))
2086 cnic_kwq_completion(dev
, 1);
2090 if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L5_RDMA
)
2091 ulp_type
= CNIC_ULP_RDMA
;
2092 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L5_ISCSI
)
2093 ulp_type
= CNIC_ULP_ISCSI
;
2094 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L4
)
2095 ulp_type
= CNIC_ULP_L4
;
2096 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L2
)
2099 netdev_err(dev
->netdev
, "Unknown type of KCQE(0x%x)\n",
2105 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
2106 if (likely(ulp_ops
)) {
2107 ulp_ops
->indicate_kcqes(cp
->ulp_handle
[ulp_type
],
2108 cp
->completed_kcq
+ i
, j
);
2118 static u16
cnic_bnx2_next_idx(u16 idx
)
2123 static u16
cnic_bnx2_hw_idx(u16 idx
)
2128 static u16
cnic_bnx2x_next_idx(u16 idx
)
2131 if ((idx
& MAX_KCQE_CNT
) == MAX_KCQE_CNT
)
2137 static u16
cnic_bnx2x_hw_idx(u16 idx
)
2139 if ((idx
& MAX_KCQE_CNT
) == MAX_KCQE_CNT
)
2144 static int cnic_get_kcqes(struct cnic_dev
*dev
, u16 hw_prod
, u16
*sw_prod
)
2146 struct cnic_local
*cp
= dev
->cnic_priv
;
2149 int kcqe_cnt
= 0, last_cnt
= 0;
2151 i
= ri
= last
= *sw_prod
;
2154 while ((i
!= hw_prod
) && (kcqe_cnt
< MAX_COMPLETED_KCQE
)) {
2155 kcqe
= &cp
->kcq1
.kcq
[KCQ_PG(ri
)][KCQ_IDX(ri
)];
2156 cp
->completed_kcq
[kcqe_cnt
++] = kcqe
;
2157 i
= cp
->next_idx(i
);
2158 ri
= i
& MAX_KCQ_IDX
;
2159 if (likely(!(kcqe
->kcqe_op_flag
& KCQE_FLAGS_NEXT
))) {
2160 last_cnt
= kcqe_cnt
;
2169 static int cnic_l2_completion(struct cnic_local
*cp
)
2171 u16 hw_cons
, sw_cons
;
2172 union eth_rx_cqe
*cqe
, *cqe_ring
= (union eth_rx_cqe
*)
2173 (cp
->l2_ring
+ (2 * BCM_PAGE_SIZE
));
2177 if (!test_bit(CNIC_F_BNX2X_CLASS
, &cp
->dev
->flags
))
2180 hw_cons
= *cp
->rx_cons_ptr
;
2181 if ((hw_cons
& BNX2X_MAX_RCQ_DESC_CNT
) == BNX2X_MAX_RCQ_DESC_CNT
)
2184 sw_cons
= cp
->rx_cons
;
2185 while (sw_cons
!= hw_cons
) {
2188 cqe
= &cqe_ring
[sw_cons
& BNX2X_MAX_RCQ_DESC_CNT
];
2189 cqe_fp_flags
= cqe
->fast_path_cqe
.type_error_flags
;
2190 if (cqe_fp_flags
& ETH_FAST_PATH_RX_CQE_TYPE
) {
2191 cmd
= le32_to_cpu(cqe
->ramrod_cqe
.conn_and_cmd_data
);
2192 cmd
>>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT
;
2193 if (cmd
== RAMROD_CMD_ID_ETH_CLIENT_SETUP
||
2194 cmd
== RAMROD_CMD_ID_ETH_HALT
)
2197 sw_cons
= BNX2X_NEXT_RCQE(sw_cons
);
2202 static void cnic_chk_pkt_rings(struct cnic_local
*cp
)
2204 u16 rx_cons
= *cp
->rx_cons_ptr
;
2205 u16 tx_cons
= *cp
->tx_cons_ptr
;
2208 if (!test_bit(CNIC_F_CNIC_UP
, &cp
->dev
->flags
))
2211 if (cp
->tx_cons
!= tx_cons
|| cp
->rx_cons
!= rx_cons
) {
2212 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
2213 comp
= cnic_l2_completion(cp
);
2215 cp
->tx_cons
= tx_cons
;
2216 cp
->rx_cons
= rx_cons
;
2218 uio_event_notify(cp
->cnic_uinfo
);
2221 clear_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
2224 static int cnic_service_bnx2(void *data
, void *status_blk
)
2226 struct cnic_dev
*dev
= data
;
2227 struct status_block
*sblk
= status_blk
;
2228 struct cnic_local
*cp
= dev
->cnic_priv
;
2229 u32 status_idx
= sblk
->status_idx
;
2230 u16 hw_prod
, sw_prod
;
2233 if (unlikely(!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)))
2236 cp
->kwq_con_idx
= *cp
->kwq_con_idx_ptr
;
2238 hw_prod
= sblk
->status_completion_producer_index
;
2239 sw_prod
= cp
->kcq1
.sw_prod_idx
;
2240 while (sw_prod
!= hw_prod
) {
2241 kcqe_cnt
= cnic_get_kcqes(dev
, hw_prod
, &sw_prod
);
2245 service_kcqes(dev
, kcqe_cnt
);
2247 /* Tell compiler that status_blk fields can change. */
2249 if (status_idx
!= sblk
->status_idx
) {
2250 status_idx
= sblk
->status_idx
;
2251 cp
->kwq_con_idx
= *cp
->kwq_con_idx_ptr
;
2252 hw_prod
= sblk
->status_completion_producer_index
;
2258 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, sw_prod
);
2260 cp
->kcq1
.sw_prod_idx
= sw_prod
;
2262 cnic_chk_pkt_rings(cp
);
2266 static void cnic_service_bnx2_msix(unsigned long data
)
2268 struct cnic_dev
*dev
= (struct cnic_dev
*) data
;
2269 struct cnic_local
*cp
= dev
->cnic_priv
;
2270 struct status_block_msix
*status_blk
= cp
->status_blk
.bnx2
;
2271 u32 status_idx
= status_blk
->status_idx
;
2272 u16 hw_prod
, sw_prod
;
2275 cp
->kwq_con_idx
= status_blk
->status_cmd_consumer_index
;
2277 hw_prod
= status_blk
->status_completion_producer_index
;
2278 sw_prod
= cp
->kcq1
.sw_prod_idx
;
2279 while (sw_prod
!= hw_prod
) {
2280 kcqe_cnt
= cnic_get_kcqes(dev
, hw_prod
, &sw_prod
);
2284 service_kcqes(dev
, kcqe_cnt
);
2286 /* Tell compiler that status_blk fields can change. */
2288 if (status_idx
!= status_blk
->status_idx
) {
2289 status_idx
= status_blk
->status_idx
;
2290 cp
->kwq_con_idx
= status_blk
->status_cmd_consumer_index
;
2291 hw_prod
= status_blk
->status_completion_producer_index
;
2297 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, sw_prod
);
2298 cp
->kcq1
.sw_prod_idx
= sw_prod
;
2300 cnic_chk_pkt_rings(cp
);
2302 cp
->last_status_idx
= status_idx
;
2303 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
2304 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
| cp
->last_status_idx
);
2307 static void cnic_doirq(struct cnic_dev
*dev
)
2309 struct cnic_local
*cp
= dev
->cnic_priv
;
2310 u16 prod
= cp
->kcq1
.sw_prod_idx
& MAX_KCQ_IDX
;
2312 if (likely(test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))) {
2313 prefetch(cp
->status_blk
.gen
);
2314 prefetch(&cp
->kcq1
.kcq
[KCQ_PG(prod
)][KCQ_IDX(prod
)]);
2316 tasklet_schedule(&cp
->cnic_irq_task
);
2320 static irqreturn_t
cnic_irq(int irq
, void *dev_instance
)
2322 struct cnic_dev
*dev
= dev_instance
;
2323 struct cnic_local
*cp
= dev
->cnic_priv
;
2333 static inline void cnic_ack_bnx2x_int(struct cnic_dev
*dev
, u8 id
, u8 storm
,
2334 u16 index
, u8 op
, u8 update
)
2336 struct cnic_local
*cp
= dev
->cnic_priv
;
2337 u32 hc_addr
= (HC_REG_COMMAND_REG
+ CNIC_PORT(cp
) * 32 +
2338 COMMAND_REG_INT_ACK
);
2339 struct igu_ack_register igu_ack
;
2341 igu_ack
.status_block_index
= index
;
2342 igu_ack
.sb_id_and_flags
=
2343 ((id
<< IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT
) |
2344 (storm
<< IGU_ACK_REGISTER_STORM_ID_SHIFT
) |
2345 (update
<< IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT
) |
2346 (op
<< IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT
));
2348 CNIC_WR(dev
, hc_addr
, (*(u32
*)&igu_ack
));
2351 static void cnic_ack_bnx2x_msix(struct cnic_dev
*dev
)
2353 struct cnic_local
*cp
= dev
->cnic_priv
;
2355 cnic_ack_bnx2x_int(dev
, cp
->status_blk_num
, CSTORM_ID
, 0,
2356 IGU_INT_DISABLE
, 0);
2359 static void cnic_service_bnx2x_bh(unsigned long data
)
2361 struct cnic_dev
*dev
= (struct cnic_dev
*) data
;
2362 struct cnic_local
*cp
= dev
->cnic_priv
;
2363 u16 hw_prod
, sw_prod
;
2364 struct cstorm_status_block_c
*sblk
=
2365 &cp
->status_blk
.bnx2x
->c_status_block
;
2366 u32 status_idx
= sblk
->status_block_index
;
2369 if (unlikely(!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)))
2372 hw_prod
= sblk
->index_values
[HC_INDEX_C_ISCSI_EQ_CONS
];
2373 hw_prod
= cp
->hw_idx(hw_prod
);
2374 sw_prod
= cp
->kcq1
.sw_prod_idx
;
2375 while (sw_prod
!= hw_prod
) {
2376 kcqe_cnt
= cnic_get_kcqes(dev
, hw_prod
, &sw_prod
);
2380 service_kcqes(dev
, kcqe_cnt
);
2382 /* Tell compiler that sblk fields can change. */
2384 if (status_idx
== sblk
->status_block_index
)
2387 status_idx
= sblk
->status_block_index
;
2388 hw_prod
= sblk
->index_values
[HC_INDEX_C_ISCSI_EQ_CONS
];
2389 hw_prod
= cp
->hw_idx(hw_prod
);
2393 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, sw_prod
+ MAX_KCQ_IDX
);
2394 cnic_ack_bnx2x_int(dev
, cp
->status_blk_num
, CSTORM_ID
,
2395 status_idx
, IGU_INT_ENABLE
, 1);
2397 cp
->kcq1
.sw_prod_idx
= sw_prod
;
2400 static int cnic_service_bnx2x(void *data
, void *status_blk
)
2402 struct cnic_dev
*dev
= data
;
2403 struct cnic_local
*cp
= dev
->cnic_priv
;
2405 if (!(cp
->ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
2408 cnic_chk_pkt_rings(cp
);
2413 static void cnic_ulp_stop(struct cnic_dev
*dev
)
2415 struct cnic_local
*cp
= dev
->cnic_priv
;
2419 cnic_send_nlmsg(cp
, ISCSI_KEVENT_IF_DOWN
, NULL
);
2421 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
2422 struct cnic_ulp_ops
*ulp_ops
;
2424 mutex_lock(&cnic_lock
);
2425 ulp_ops
= cp
->ulp_ops
[if_type
];
2427 mutex_unlock(&cnic_lock
);
2430 set_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2431 mutex_unlock(&cnic_lock
);
2433 if (test_and_clear_bit(ULP_F_START
, &cp
->ulp_flags
[if_type
]))
2434 ulp_ops
->cnic_stop(cp
->ulp_handle
[if_type
]);
2436 clear_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2440 static void cnic_ulp_start(struct cnic_dev
*dev
)
2442 struct cnic_local
*cp
= dev
->cnic_priv
;
2445 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
2446 struct cnic_ulp_ops
*ulp_ops
;
2448 mutex_lock(&cnic_lock
);
2449 ulp_ops
= cp
->ulp_ops
[if_type
];
2450 if (!ulp_ops
|| !ulp_ops
->cnic_start
) {
2451 mutex_unlock(&cnic_lock
);
2454 set_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2455 mutex_unlock(&cnic_lock
);
2457 if (!test_and_set_bit(ULP_F_START
, &cp
->ulp_flags
[if_type
]))
2458 ulp_ops
->cnic_start(cp
->ulp_handle
[if_type
]);
2460 clear_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2464 static int cnic_ctl(void *data
, struct cnic_ctl_info
*info
)
2466 struct cnic_dev
*dev
= data
;
2468 switch (info
->cmd
) {
2469 case CNIC_CTL_STOP_CMD
:
2477 case CNIC_CTL_START_CMD
:
2480 if (!cnic_start_hw(dev
))
2481 cnic_ulp_start(dev
);
2485 case CNIC_CTL_COMPLETION_CMD
: {
2486 u32 cid
= BNX2X_SW_CID(info
->data
.comp
.cid
);
2488 struct cnic_local
*cp
= dev
->cnic_priv
;
2490 if (cnic_get_l5_cid(cp
, cid
, &l5_cid
) == 0) {
2491 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
2494 wake_up(&ctx
->waitq
);
2504 static void cnic_ulp_init(struct cnic_dev
*dev
)
2507 struct cnic_local
*cp
= dev
->cnic_priv
;
2509 for (i
= 0; i
< MAX_CNIC_ULP_TYPE_EXT
; i
++) {
2510 struct cnic_ulp_ops
*ulp_ops
;
2512 mutex_lock(&cnic_lock
);
2513 ulp_ops
= cnic_ulp_tbl
[i
];
2514 if (!ulp_ops
|| !ulp_ops
->cnic_init
) {
2515 mutex_unlock(&cnic_lock
);
2519 mutex_unlock(&cnic_lock
);
2521 if (!test_and_set_bit(ULP_F_INIT
, &cp
->ulp_flags
[i
]))
2522 ulp_ops
->cnic_init(dev
);
2528 static void cnic_ulp_exit(struct cnic_dev
*dev
)
2531 struct cnic_local
*cp
= dev
->cnic_priv
;
2533 for (i
= 0; i
< MAX_CNIC_ULP_TYPE_EXT
; i
++) {
2534 struct cnic_ulp_ops
*ulp_ops
;
2536 mutex_lock(&cnic_lock
);
2537 ulp_ops
= cnic_ulp_tbl
[i
];
2538 if (!ulp_ops
|| !ulp_ops
->cnic_exit
) {
2539 mutex_unlock(&cnic_lock
);
2543 mutex_unlock(&cnic_lock
);
2545 if (test_and_clear_bit(ULP_F_INIT
, &cp
->ulp_flags
[i
]))
2546 ulp_ops
->cnic_exit(dev
);
2552 static int cnic_cm_offload_pg(struct cnic_sock
*csk
)
2554 struct cnic_dev
*dev
= csk
->dev
;
2555 struct l4_kwq_offload_pg
*l4kwqe
;
2556 struct kwqe
*wqes
[1];
2558 l4kwqe
= (struct l4_kwq_offload_pg
*) &csk
->kwqe1
;
2559 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2560 wqes
[0] = (struct kwqe
*) l4kwqe
;
2562 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_OFFLOAD_PG
;
2564 L4_LAYER_CODE
<< L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT
;
2565 l4kwqe
->l2hdr_nbytes
= ETH_HLEN
;
2567 l4kwqe
->da0
= csk
->ha
[0];
2568 l4kwqe
->da1
= csk
->ha
[1];
2569 l4kwqe
->da2
= csk
->ha
[2];
2570 l4kwqe
->da3
= csk
->ha
[3];
2571 l4kwqe
->da4
= csk
->ha
[4];
2572 l4kwqe
->da5
= csk
->ha
[5];
2574 l4kwqe
->sa0
= dev
->mac_addr
[0];
2575 l4kwqe
->sa1
= dev
->mac_addr
[1];
2576 l4kwqe
->sa2
= dev
->mac_addr
[2];
2577 l4kwqe
->sa3
= dev
->mac_addr
[3];
2578 l4kwqe
->sa4
= dev
->mac_addr
[4];
2579 l4kwqe
->sa5
= dev
->mac_addr
[5];
2581 l4kwqe
->etype
= ETH_P_IP
;
2582 l4kwqe
->ipid_start
= DEF_IPID_START
;
2583 l4kwqe
->host_opaque
= csk
->l5_cid
;
2586 l4kwqe
->pg_flags
|= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING
;
2587 l4kwqe
->vlan_tag
= csk
->vlan_id
;
2588 l4kwqe
->l2hdr_nbytes
+= 4;
2591 return dev
->submit_kwqes(dev
, wqes
, 1);
2594 static int cnic_cm_update_pg(struct cnic_sock
*csk
)
2596 struct cnic_dev
*dev
= csk
->dev
;
2597 struct l4_kwq_update_pg
*l4kwqe
;
2598 struct kwqe
*wqes
[1];
2600 l4kwqe
= (struct l4_kwq_update_pg
*) &csk
->kwqe1
;
2601 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2602 wqes
[0] = (struct kwqe
*) l4kwqe
;
2604 l4kwqe
->opcode
= L4_KWQE_OPCODE_VALUE_UPDATE_PG
;
2606 L4_LAYER_CODE
<< L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT
;
2607 l4kwqe
->pg_cid
= csk
->pg_cid
;
2609 l4kwqe
->da0
= csk
->ha
[0];
2610 l4kwqe
->da1
= csk
->ha
[1];
2611 l4kwqe
->da2
= csk
->ha
[2];
2612 l4kwqe
->da3
= csk
->ha
[3];
2613 l4kwqe
->da4
= csk
->ha
[4];
2614 l4kwqe
->da5
= csk
->ha
[5];
2616 l4kwqe
->pg_host_opaque
= csk
->l5_cid
;
2617 l4kwqe
->pg_valids
= L4_KWQ_UPDATE_PG_VALIDS_DA
;
2619 return dev
->submit_kwqes(dev
, wqes
, 1);
2622 static int cnic_cm_upload_pg(struct cnic_sock
*csk
)
2624 struct cnic_dev
*dev
= csk
->dev
;
2625 struct l4_kwq_upload
*l4kwqe
;
2626 struct kwqe
*wqes
[1];
2628 l4kwqe
= (struct l4_kwq_upload
*) &csk
->kwqe1
;
2629 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2630 wqes
[0] = (struct kwqe
*) l4kwqe
;
2632 l4kwqe
->opcode
= L4_KWQE_OPCODE_VALUE_UPLOAD_PG
;
2634 L4_LAYER_CODE
<< L4_KWQ_UPLOAD_LAYER_CODE_SHIFT
;
2635 l4kwqe
->cid
= csk
->pg_cid
;
2637 return dev
->submit_kwqes(dev
, wqes
, 1);
2640 static int cnic_cm_conn_req(struct cnic_sock
*csk
)
2642 struct cnic_dev
*dev
= csk
->dev
;
2643 struct l4_kwq_connect_req1
*l4kwqe1
;
2644 struct l4_kwq_connect_req2
*l4kwqe2
;
2645 struct l4_kwq_connect_req3
*l4kwqe3
;
2646 struct kwqe
*wqes
[3];
2650 l4kwqe1
= (struct l4_kwq_connect_req1
*) &csk
->kwqe1
;
2651 l4kwqe2
= (struct l4_kwq_connect_req2
*) &csk
->kwqe2
;
2652 l4kwqe3
= (struct l4_kwq_connect_req3
*) &csk
->kwqe3
;
2653 memset(l4kwqe1
, 0, sizeof(*l4kwqe1
));
2654 memset(l4kwqe2
, 0, sizeof(*l4kwqe2
));
2655 memset(l4kwqe3
, 0, sizeof(*l4kwqe3
));
2657 l4kwqe3
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT3
;
2659 L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT
;
2660 l4kwqe3
->ka_timeout
= csk
->ka_timeout
;
2661 l4kwqe3
->ka_interval
= csk
->ka_interval
;
2662 l4kwqe3
->ka_max_probe_count
= csk
->ka_max_probe_count
;
2663 l4kwqe3
->tos
= csk
->tos
;
2664 l4kwqe3
->ttl
= csk
->ttl
;
2665 l4kwqe3
->snd_seq_scale
= csk
->snd_seq_scale
;
2666 l4kwqe3
->pmtu
= csk
->mtu
;
2667 l4kwqe3
->rcv_buf
= csk
->rcv_buf
;
2668 l4kwqe3
->snd_buf
= csk
->snd_buf
;
2669 l4kwqe3
->seed
= csk
->seed
;
2671 wqes
[0] = (struct kwqe
*) l4kwqe1
;
2672 if (test_bit(SK_F_IPV6
, &csk
->flags
)) {
2673 wqes
[1] = (struct kwqe
*) l4kwqe2
;
2674 wqes
[2] = (struct kwqe
*) l4kwqe3
;
2677 l4kwqe1
->conn_flags
= L4_KWQ_CONNECT_REQ1_IP_V6
;
2678 l4kwqe2
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT2
;
2680 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT
|
2681 L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT
;
2682 l4kwqe2
->src_ip_v6_2
= be32_to_cpu(csk
->src_ip
[1]);
2683 l4kwqe2
->src_ip_v6_3
= be32_to_cpu(csk
->src_ip
[2]);
2684 l4kwqe2
->src_ip_v6_4
= be32_to_cpu(csk
->src_ip
[3]);
2685 l4kwqe2
->dst_ip_v6_2
= be32_to_cpu(csk
->dst_ip
[1]);
2686 l4kwqe2
->dst_ip_v6_3
= be32_to_cpu(csk
->dst_ip
[2]);
2687 l4kwqe2
->dst_ip_v6_4
= be32_to_cpu(csk
->dst_ip
[3]);
2688 l4kwqe3
->mss
= l4kwqe3
->pmtu
- sizeof(struct ipv6hdr
) -
2689 sizeof(struct tcphdr
);
2691 wqes
[1] = (struct kwqe
*) l4kwqe3
;
2692 l4kwqe3
->mss
= l4kwqe3
->pmtu
- sizeof(struct iphdr
) -
2693 sizeof(struct tcphdr
);
2696 l4kwqe1
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT1
;
2698 (L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT
) |
2699 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT
;
2700 l4kwqe1
->cid
= csk
->cid
;
2701 l4kwqe1
->pg_cid
= csk
->pg_cid
;
2702 l4kwqe1
->src_ip
= be32_to_cpu(csk
->src_ip
[0]);
2703 l4kwqe1
->dst_ip
= be32_to_cpu(csk
->dst_ip
[0]);
2704 l4kwqe1
->src_port
= be16_to_cpu(csk
->src_port
);
2705 l4kwqe1
->dst_port
= be16_to_cpu(csk
->dst_port
);
2706 if (csk
->tcp_flags
& SK_TCP_NO_DELAY_ACK
)
2707 tcp_flags
|= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK
;
2708 if (csk
->tcp_flags
& SK_TCP_KEEP_ALIVE
)
2709 tcp_flags
|= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE
;
2710 if (csk
->tcp_flags
& SK_TCP_NAGLE
)
2711 tcp_flags
|= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE
;
2712 if (csk
->tcp_flags
& SK_TCP_TIMESTAMP
)
2713 tcp_flags
|= L4_KWQ_CONNECT_REQ1_TIME_STAMP
;
2714 if (csk
->tcp_flags
& SK_TCP_SACK
)
2715 tcp_flags
|= L4_KWQ_CONNECT_REQ1_SACK
;
2716 if (csk
->tcp_flags
& SK_TCP_SEG_SCALING
)
2717 tcp_flags
|= L4_KWQ_CONNECT_REQ1_SEG_SCALING
;
2719 l4kwqe1
->tcp_flags
= tcp_flags
;
2721 return dev
->submit_kwqes(dev
, wqes
, num_wqes
);
2724 static int cnic_cm_close_req(struct cnic_sock
*csk
)
2726 struct cnic_dev
*dev
= csk
->dev
;
2727 struct l4_kwq_close_req
*l4kwqe
;
2728 struct kwqe
*wqes
[1];
2730 l4kwqe
= (struct l4_kwq_close_req
*) &csk
->kwqe2
;
2731 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2732 wqes
[0] = (struct kwqe
*) l4kwqe
;
2734 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_CLOSE
;
2735 l4kwqe
->flags
= L4_LAYER_CODE
<< L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT
;
2736 l4kwqe
->cid
= csk
->cid
;
2738 return dev
->submit_kwqes(dev
, wqes
, 1);
2741 static int cnic_cm_abort_req(struct cnic_sock
*csk
)
2743 struct cnic_dev
*dev
= csk
->dev
;
2744 struct l4_kwq_reset_req
*l4kwqe
;
2745 struct kwqe
*wqes
[1];
2747 l4kwqe
= (struct l4_kwq_reset_req
*) &csk
->kwqe2
;
2748 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2749 wqes
[0] = (struct kwqe
*) l4kwqe
;
2751 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_RESET
;
2752 l4kwqe
->flags
= L4_LAYER_CODE
<< L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT
;
2753 l4kwqe
->cid
= csk
->cid
;
2755 return dev
->submit_kwqes(dev
, wqes
, 1);
2758 static int cnic_cm_create(struct cnic_dev
*dev
, int ulp_type
, u32 cid
,
2759 u32 l5_cid
, struct cnic_sock
**csk
, void *context
)
2761 struct cnic_local
*cp
= dev
->cnic_priv
;
2762 struct cnic_sock
*csk1
;
2764 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
2767 csk1
= &cp
->csk_tbl
[l5_cid
];
2768 if (atomic_read(&csk1
->ref_count
))
2771 if (test_and_set_bit(SK_F_INUSE
, &csk1
->flags
))
2776 csk1
->l5_cid
= l5_cid
;
2777 csk1
->ulp_type
= ulp_type
;
2778 csk1
->context
= context
;
2780 csk1
->ka_timeout
= DEF_KA_TIMEOUT
;
2781 csk1
->ka_interval
= DEF_KA_INTERVAL
;
2782 csk1
->ka_max_probe_count
= DEF_KA_MAX_PROBE_COUNT
;
2783 csk1
->tos
= DEF_TOS
;
2784 csk1
->ttl
= DEF_TTL
;
2785 csk1
->snd_seq_scale
= DEF_SND_SEQ_SCALE
;
2786 csk1
->rcv_buf
= DEF_RCV_BUF
;
2787 csk1
->snd_buf
= DEF_SND_BUF
;
2788 csk1
->seed
= DEF_SEED
;
2794 static void cnic_cm_cleanup(struct cnic_sock
*csk
)
2796 if (csk
->src_port
) {
2797 struct cnic_dev
*dev
= csk
->dev
;
2798 struct cnic_local
*cp
= dev
->cnic_priv
;
2800 cnic_free_id(&cp
->csk_port_tbl
, csk
->src_port
);
2805 static void cnic_close_conn(struct cnic_sock
*csk
)
2807 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
)) {
2808 cnic_cm_upload_pg(csk
);
2809 clear_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
);
2811 cnic_cm_cleanup(csk
);
2814 static int cnic_cm_destroy(struct cnic_sock
*csk
)
2816 if (!cnic_in_use(csk
))
2820 clear_bit(SK_F_INUSE
, &csk
->flags
);
2821 smp_mb__after_clear_bit();
2822 while (atomic_read(&csk
->ref_count
) != 1)
2824 cnic_cm_cleanup(csk
);
2831 static inline u16
cnic_get_vlan(struct net_device
*dev
,
2832 struct net_device
**vlan_dev
)
2834 if (dev
->priv_flags
& IFF_802_1Q_VLAN
) {
2835 *vlan_dev
= vlan_dev_real_dev(dev
);
2836 return vlan_dev_vlan_id(dev
);
2842 static int cnic_get_v4_route(struct sockaddr_in
*dst_addr
,
2843 struct dst_entry
**dst
)
2845 #if defined(CONFIG_INET)
2850 memset(&fl
, 0, sizeof(fl
));
2851 fl
.nl_u
.ip4_u
.daddr
= dst_addr
->sin_addr
.s_addr
;
2853 err
= ip_route_output_key(&init_net
, &rt
, &fl
);
2858 return -ENETUNREACH
;
2862 static int cnic_get_v6_route(struct sockaddr_in6
*dst_addr
,
2863 struct dst_entry
**dst
)
2865 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2868 memset(&fl
, 0, sizeof(fl
));
2869 ipv6_addr_copy(&fl
.fl6_dst
, &dst_addr
->sin6_addr
);
2870 if (ipv6_addr_type(&fl
.fl6_dst
) & IPV6_ADDR_LINKLOCAL
)
2871 fl
.oif
= dst_addr
->sin6_scope_id
;
2873 *dst
= ip6_route_output(&init_net
, NULL
, &fl
);
2878 return -ENETUNREACH
;
2881 static struct cnic_dev
*cnic_cm_select_dev(struct sockaddr_in
*dst_addr
,
2884 struct cnic_dev
*dev
= NULL
;
2885 struct dst_entry
*dst
;
2886 struct net_device
*netdev
= NULL
;
2887 int err
= -ENETUNREACH
;
2889 if (dst_addr
->sin_family
== AF_INET
)
2890 err
= cnic_get_v4_route(dst_addr
, &dst
);
2891 else if (dst_addr
->sin_family
== AF_INET6
) {
2892 struct sockaddr_in6
*dst_addr6
=
2893 (struct sockaddr_in6
*) dst_addr
;
2895 err
= cnic_get_v6_route(dst_addr6
, &dst
);
2905 cnic_get_vlan(dst
->dev
, &netdev
);
2907 dev
= cnic_from_netdev(netdev
);
2916 static int cnic_resolve_addr(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
2918 struct cnic_dev
*dev
= csk
->dev
;
2919 struct cnic_local
*cp
= dev
->cnic_priv
;
2921 return cnic_send_nlmsg(cp
, ISCSI_KEVENT_PATH_REQ
, csk
);
2924 static int cnic_get_route(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
2926 struct cnic_dev
*dev
= csk
->dev
;
2927 struct cnic_local
*cp
= dev
->cnic_priv
;
2929 struct dst_entry
*dst
= NULL
;
2930 struct net_device
*realdev
;
2933 if (saddr
->local
.v6
.sin6_family
== AF_INET6
&&
2934 saddr
->remote
.v6
.sin6_family
== AF_INET6
)
2936 else if (saddr
->local
.v4
.sin_family
== AF_INET
&&
2937 saddr
->remote
.v4
.sin_family
== AF_INET
)
2942 clear_bit(SK_F_IPV6
, &csk
->flags
);
2945 set_bit(SK_F_IPV6
, &csk
->flags
);
2946 cnic_get_v6_route(&saddr
->remote
.v6
, &dst
);
2948 memcpy(&csk
->dst_ip
[0], &saddr
->remote
.v6
.sin6_addr
,
2949 sizeof(struct in6_addr
));
2950 csk
->dst_port
= saddr
->remote
.v6
.sin6_port
;
2951 local_port
= saddr
->local
.v6
.sin6_port
;
2954 cnic_get_v4_route(&saddr
->remote
.v4
, &dst
);
2956 csk
->dst_ip
[0] = saddr
->remote
.v4
.sin_addr
.s_addr
;
2957 csk
->dst_port
= saddr
->remote
.v4
.sin_port
;
2958 local_port
= saddr
->local
.v4
.sin_port
;
2962 csk
->mtu
= dev
->netdev
->mtu
;
2963 if (dst
&& dst
->dev
) {
2964 u16 vlan
= cnic_get_vlan(dst
->dev
, &realdev
);
2965 if (realdev
== dev
->netdev
) {
2966 csk
->vlan_id
= vlan
;
2967 csk
->mtu
= dst_mtu(dst
);
2971 if (local_port
>= CNIC_LOCAL_PORT_MIN
&&
2972 local_port
< CNIC_LOCAL_PORT_MAX
) {
2973 if (cnic_alloc_id(&cp
->csk_port_tbl
, local_port
))
2979 local_port
= cnic_alloc_new_id(&cp
->csk_port_tbl
);
2980 if (local_port
== -1) {
2985 csk
->src_port
= local_port
;
2992 static void cnic_init_csk_state(struct cnic_sock
*csk
)
2995 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
2996 clear_bit(SK_F_CLOSING
, &csk
->flags
);
2999 static int cnic_cm_connect(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
3003 if (!cnic_in_use(csk
))
3006 if (test_and_set_bit(SK_F_CONNECT_START
, &csk
->flags
))
3009 cnic_init_csk_state(csk
);
3011 err
= cnic_get_route(csk
, saddr
);
3015 err
= cnic_resolve_addr(csk
, saddr
);
3020 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
3024 static int cnic_cm_abort(struct cnic_sock
*csk
)
3026 struct cnic_local
*cp
= csk
->dev
->cnic_priv
;
3027 u32 opcode
= L4_KCQE_OPCODE_VALUE_RESET_COMP
;
3029 if (!cnic_in_use(csk
))
3032 if (cnic_abort_prep(csk
))
3033 return cnic_cm_abort_req(csk
);
3035 /* Getting here means that we haven't started connect, or
3036 * connect was not successful.
3039 cp
->close_conn(csk
, opcode
);
3040 if (csk
->state
!= opcode
)
3046 static int cnic_cm_close(struct cnic_sock
*csk
)
3048 if (!cnic_in_use(csk
))
3051 if (cnic_close_prep(csk
)) {
3052 csk
->state
= L4_KCQE_OPCODE_VALUE_CLOSE_COMP
;
3053 return cnic_cm_close_req(csk
);
3060 static void cnic_cm_upcall(struct cnic_local
*cp
, struct cnic_sock
*csk
,
3063 struct cnic_ulp_ops
*ulp_ops
;
3064 int ulp_type
= csk
->ulp_type
;
3067 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
3069 if (opcode
== L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
)
3070 ulp_ops
->cm_connect_complete(csk
);
3071 else if (opcode
== L4_KCQE_OPCODE_VALUE_CLOSE_COMP
)
3072 ulp_ops
->cm_close_complete(csk
);
3073 else if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
)
3074 ulp_ops
->cm_remote_abort(csk
);
3075 else if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_COMP
)
3076 ulp_ops
->cm_abort_complete(csk
);
3077 else if (opcode
== L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED
)
3078 ulp_ops
->cm_remote_close(csk
);
3083 static int cnic_cm_set_pg(struct cnic_sock
*csk
)
3085 if (cnic_offld_prep(csk
)) {
3086 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
))
3087 cnic_cm_update_pg(csk
);
3089 cnic_cm_offload_pg(csk
);
3094 static void cnic_cm_process_offld_pg(struct cnic_dev
*dev
, struct l4_kcq
*kcqe
)
3096 struct cnic_local
*cp
= dev
->cnic_priv
;
3097 u32 l5_cid
= kcqe
->pg_host_opaque
;
3098 u8 opcode
= kcqe
->op_code
;
3099 struct cnic_sock
*csk
= &cp
->csk_tbl
[l5_cid
];
3102 if (!cnic_in_use(csk
))
3105 if (opcode
== L4_KCQE_OPCODE_VALUE_UPDATE_PG
) {
3106 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3109 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3110 if (kcqe
->status
== L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL
) {
3111 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3112 cnic_cm_upcall(cp
, csk
,
3113 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
);
3117 csk
->pg_cid
= kcqe
->pg_cid
;
3118 set_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
);
3119 cnic_cm_conn_req(csk
);
3125 static void cnic_cm_process_kcqe(struct cnic_dev
*dev
, struct kcqe
*kcqe
)
3127 struct cnic_local
*cp
= dev
->cnic_priv
;
3128 struct l4_kcq
*l4kcqe
= (struct l4_kcq
*) kcqe
;
3129 u8 opcode
= l4kcqe
->op_code
;
3131 struct cnic_sock
*csk
;
3133 if (opcode
== L4_KCQE_OPCODE_VALUE_OFFLOAD_PG
||
3134 opcode
== L4_KCQE_OPCODE_VALUE_UPDATE_PG
) {
3135 cnic_cm_process_offld_pg(dev
, l4kcqe
);
3139 l5_cid
= l4kcqe
->conn_id
;
3141 l5_cid
= l4kcqe
->cid
;
3142 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
3145 csk
= &cp
->csk_tbl
[l5_cid
];
3148 if (!cnic_in_use(csk
)) {
3154 case L5CM_RAMROD_CMD_ID_TCP_CONNECT
:
3155 if (l4kcqe
->status
!= 0) {
3156 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3157 cnic_cm_upcall(cp
, csk
,
3158 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
);
3161 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
:
3162 if (l4kcqe
->status
== 0)
3163 set_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
);
3165 smp_mb__before_clear_bit();
3166 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3167 cnic_cm_upcall(cp
, csk
, opcode
);
3170 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
:
3171 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP
:
3172 case L4_KCQE_OPCODE_VALUE_RESET_COMP
:
3173 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
:
3174 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
:
3175 cp
->close_conn(csk
, opcode
);
3178 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED
:
3179 cnic_cm_upcall(cp
, csk
, opcode
);
3185 static void cnic_cm_indicate_kcqe(void *data
, struct kcqe
*kcqe
[], u32 num
)
3187 struct cnic_dev
*dev
= data
;
3190 for (i
= 0; i
< num
; i
++)
3191 cnic_cm_process_kcqe(dev
, kcqe
[i
]);
3194 static struct cnic_ulp_ops cm_ulp_ops
= {
3195 .indicate_kcqes
= cnic_cm_indicate_kcqe
,
3198 static void cnic_cm_free_mem(struct cnic_dev
*dev
)
3200 struct cnic_local
*cp
= dev
->cnic_priv
;
3204 cnic_free_id_tbl(&cp
->csk_port_tbl
);
3207 static int cnic_cm_alloc_mem(struct cnic_dev
*dev
)
3209 struct cnic_local
*cp
= dev
->cnic_priv
;
3211 cp
->csk_tbl
= kzalloc(sizeof(struct cnic_sock
) * MAX_CM_SK_TBL_SZ
,
3216 if (cnic_init_id_tbl(&cp
->csk_port_tbl
, CNIC_LOCAL_PORT_RANGE
,
3217 CNIC_LOCAL_PORT_MIN
)) {
3218 cnic_cm_free_mem(dev
);
3224 static int cnic_ready_to_close(struct cnic_sock
*csk
, u32 opcode
)
3226 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
3227 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3228 opcode
= L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
;
3229 csk
->state
= opcode
;
3232 /* 1. If event opcode matches the expected event in csk->state
3233 * 2. If the expected event is CLOSE_COMP, we accept any event
3234 * 3. If the expected event is 0, meaning the connection was never
3235 * never established, we accept the opcode from cm_abort.
3237 if (opcode
== csk
->state
|| csk
->state
== 0 ||
3238 csk
->state
== L4_KCQE_OPCODE_VALUE_CLOSE_COMP
) {
3239 if (!test_and_set_bit(SK_F_CLOSING
, &csk
->flags
)) {
3240 if (csk
->state
== 0)
3241 csk
->state
= opcode
;
3248 static void cnic_close_bnx2_conn(struct cnic_sock
*csk
, u32 opcode
)
3250 struct cnic_dev
*dev
= csk
->dev
;
3251 struct cnic_local
*cp
= dev
->cnic_priv
;
3253 if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
) {
3254 cnic_cm_upcall(cp
, csk
, opcode
);
3258 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
3259 cnic_close_conn(csk
);
3260 csk
->state
= opcode
;
3261 cnic_cm_upcall(cp
, csk
, opcode
);
3264 static void cnic_cm_stop_bnx2_hw(struct cnic_dev
*dev
)
3268 static int cnic_cm_init_bnx2_hw(struct cnic_dev
*dev
)
3272 get_random_bytes(&seed
, 4);
3273 cnic_ctx_wr(dev
, 45, 0, seed
);
3277 static void cnic_close_bnx2x_conn(struct cnic_sock
*csk
, u32 opcode
)
3279 struct cnic_dev
*dev
= csk
->dev
;
3280 struct cnic_local
*cp
= dev
->cnic_priv
;
3281 struct cnic_context
*ctx
= &cp
->ctx_tbl
[csk
->l5_cid
];
3282 union l5cm_specific_data l5_data
;
3284 int close_complete
= 0;
3287 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
:
3288 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP
:
3289 case L4_KCQE_OPCODE_VALUE_RESET_COMP
:
3290 if (cnic_ready_to_close(csk
, opcode
)) {
3291 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
))
3292 cmd
= L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
;
3297 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
:
3298 cmd
= L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
;
3300 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
:
3305 memset(&l5_data
, 0, sizeof(l5_data
));
3307 cnic_submit_kwqe_16(dev
, cmd
, csk
->cid
, ISCSI_CONNECTION_TYPE
,
3309 } else if (close_complete
) {
3310 ctx
->timestamp
= jiffies
;
3311 cnic_close_conn(csk
);
3312 cnic_cm_upcall(cp
, csk
, csk
->state
);
3316 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev
*dev
)
3320 static int cnic_cm_init_bnx2x_hw(struct cnic_dev
*dev
)
3322 struct cnic_local
*cp
= dev
->cnic_priv
;
3323 int func
= CNIC_FUNC(cp
);
3325 cnic_init_bnx2x_mac(dev
);
3326 cnic_bnx2x_set_tcp_timestamp(dev
, 1);
3328 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
3329 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func
), 0);
3331 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3332 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func
), 1);
3333 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3334 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func
),
3337 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3338 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func
), DEF_TTL
);
3339 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3340 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func
), DEF_TOS
);
3341 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3342 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func
), 2);
3343 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3344 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func
), DEF_SWS_TIMER
);
3346 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_TCP_MAX_CWND_OFFSET(func
),
3351 static int cnic_cm_open(struct cnic_dev
*dev
)
3353 struct cnic_local
*cp
= dev
->cnic_priv
;
3356 err
= cnic_cm_alloc_mem(dev
);
3360 err
= cp
->start_cm(dev
);
3365 dev
->cm_create
= cnic_cm_create
;
3366 dev
->cm_destroy
= cnic_cm_destroy
;
3367 dev
->cm_connect
= cnic_cm_connect
;
3368 dev
->cm_abort
= cnic_cm_abort
;
3369 dev
->cm_close
= cnic_cm_close
;
3370 dev
->cm_select_dev
= cnic_cm_select_dev
;
3372 cp
->ulp_handle
[CNIC_ULP_L4
] = dev
;
3373 rcu_assign_pointer(cp
->ulp_ops
[CNIC_ULP_L4
], &cm_ulp_ops
);
3377 cnic_cm_free_mem(dev
);
3381 static int cnic_cm_shutdown(struct cnic_dev
*dev
)
3383 struct cnic_local
*cp
= dev
->cnic_priv
;
3391 for (i
= 0; i
< MAX_CM_SK_TBL_SZ
; i
++) {
3392 struct cnic_sock
*csk
= &cp
->csk_tbl
[i
];
3394 clear_bit(SK_F_INUSE
, &csk
->flags
);
3395 cnic_cm_cleanup(csk
);
3397 cnic_cm_free_mem(dev
);
3402 static void cnic_init_context(struct cnic_dev
*dev
, u32 cid
)
3407 cid_addr
= GET_CID_ADDR(cid
);
3409 for (i
= 0; i
< CTX_SIZE
; i
+= 4)
3410 cnic_ctx_wr(dev
, cid_addr
, i
, 0);
3413 static int cnic_setup_5709_context(struct cnic_dev
*dev
, int valid
)
3415 struct cnic_local
*cp
= dev
->cnic_priv
;
3417 u32 valid_bit
= valid
? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID
: 0;
3419 if (CHIP_NUM(cp
) != CHIP_NUM_5709
)
3422 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
3424 u32 idx
= cp
->ctx_arr
[i
].cid
/ cp
->cids_per_blk
;
3427 memset(cp
->ctx_arr
[i
].ctx
, 0, BCM_PAGE_SIZE
);
3429 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_DATA0
,
3430 (cp
->ctx_arr
[i
].mapping
& 0xffffffff) | valid_bit
);
3431 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_DATA1
,
3432 (u64
) cp
->ctx_arr
[i
].mapping
>> 32);
3433 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_CTRL
, idx
|
3434 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
);
3435 for (j
= 0; j
< 10; j
++) {
3437 val
= CNIC_RD(dev
, BNX2_CTX_HOST_PAGE_TBL_CTRL
);
3438 if (!(val
& BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
))
3442 if (val
& BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
) {
3450 static void cnic_free_irq(struct cnic_dev
*dev
)
3452 struct cnic_local
*cp
= dev
->cnic_priv
;
3453 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3455 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3456 cp
->disable_int_sync(dev
);
3457 tasklet_disable(&cp
->cnic_irq_task
);
3458 free_irq(ethdev
->irq_arr
[0].vector
, dev
);
3462 static int cnic_init_bnx2_irq(struct cnic_dev
*dev
)
3464 struct cnic_local
*cp
= dev
->cnic_priv
;
3465 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3467 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3469 int sblk_num
= cp
->status_blk_num
;
3470 u32 base
= ((sblk_num
- 1) * BNX2_HC_SB_CONFIG_SIZE
) +
3471 BNX2_HC_SB_CONFIG_1
;
3473 CNIC_WR(dev
, base
, BNX2_HC_SB_CONFIG_1_ONE_SHOT
);
3475 CNIC_WR(dev
, base
+ BNX2_HC_COMP_PROD_TRIP_OFF
, (2 << 16) | 8);
3476 CNIC_WR(dev
, base
+ BNX2_HC_COM_TICKS_OFF
, (64 << 16) | 220);
3477 CNIC_WR(dev
, base
+ BNX2_HC_CMD_TICKS_OFF
, (64 << 16) | 220);
3479 cp
->last_status_idx
= cp
->status_blk
.bnx2
->status_idx
;
3480 tasklet_init(&cp
->cnic_irq_task
, cnic_service_bnx2_msix
,
3481 (unsigned long) dev
);
3482 err
= request_irq(ethdev
->irq_arr
[0].vector
, cnic_irq
, 0,
3485 tasklet_disable(&cp
->cnic_irq_task
);
3488 while (cp
->status_blk
.bnx2
->status_completion_producer_index
&&
3490 CNIC_WR(dev
, BNX2_HC_COALESCE_NOW
,
3491 1 << (11 + sblk_num
));
3496 if (cp
->status_blk
.bnx2
->status_completion_producer_index
) {
3502 struct status_block
*sblk
= cp
->status_blk
.gen
;
3503 u32 hc_cmd
= CNIC_RD(dev
, BNX2_HC_COMMAND
);
3506 while (sblk
->status_completion_producer_index
&& i
< 10) {
3507 CNIC_WR(dev
, BNX2_HC_COMMAND
,
3508 hc_cmd
| BNX2_HC_COMMAND_COAL_NOW_WO_INT
);
3513 if (sblk
->status_completion_producer_index
)
3520 netdev_err(dev
->netdev
, "KCQ index not resetting to 0\n");
3524 static void cnic_enable_bnx2_int(struct cnic_dev
*dev
)
3526 struct cnic_local
*cp
= dev
->cnic_priv
;
3527 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3529 if (!(ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
3532 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
3533 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
| cp
->last_status_idx
);
3536 static void cnic_disable_bnx2_int_sync(struct cnic_dev
*dev
)
3538 struct cnic_local
*cp
= dev
->cnic_priv
;
3539 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3541 if (!(ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
3544 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
3545 BNX2_PCICFG_INT_ACK_CMD_MASK_INT
);
3546 CNIC_RD(dev
, BNX2_PCICFG_INT_ACK_CMD
);
3547 synchronize_irq(ethdev
->irq_arr
[0].vector
);
3550 static void cnic_init_bnx2_tx_ring(struct cnic_dev
*dev
)
3552 struct cnic_local
*cp
= dev
->cnic_priv
;
3553 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3554 u32 cid_addr
, tx_cid
, sb_id
;
3555 u32 val
, offset0
, offset1
, offset2
, offset3
;
3559 struct status_block
*s_blk
= cp
->status_blk
.gen
;
3561 sb_id
= cp
->status_blk_num
;
3563 cp
->tx_cons_ptr
= &s_blk
->status_tx_quick_consumer_index2
;
3564 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3565 struct status_block_msix
*sblk
= cp
->status_blk
.bnx2
;
3567 tx_cid
= TX_TSS_CID
+ sb_id
- 1;
3568 CNIC_WR(dev
, BNX2_TSCH_TSS_CFG
, (sb_id
<< 24) |
3570 cp
->tx_cons_ptr
= &sblk
->status_tx_quick_consumer_index
;
3572 cp
->tx_cons
= *cp
->tx_cons_ptr
;
3574 cid_addr
= GET_CID_ADDR(tx_cid
);
3575 if (CHIP_NUM(cp
) == CHIP_NUM_5709
) {
3576 u32 cid_addr2
= GET_CID_ADDR(tx_cid
+ 4) + 0x40;
3578 for (i
= 0; i
< PHY_CTX_SIZE
; i
+= 4)
3579 cnic_ctx_wr(dev
, cid_addr2
, i
, 0);
3581 offset0
= BNX2_L2CTX_TYPE_XI
;
3582 offset1
= BNX2_L2CTX_CMD_TYPE_XI
;
3583 offset2
= BNX2_L2CTX_TBDR_BHADDR_HI_XI
;
3584 offset3
= BNX2_L2CTX_TBDR_BHADDR_LO_XI
;
3586 cnic_init_context(dev
, tx_cid
);
3587 cnic_init_context(dev
, tx_cid
+ 1);
3589 offset0
= BNX2_L2CTX_TYPE
;
3590 offset1
= BNX2_L2CTX_CMD_TYPE
;
3591 offset2
= BNX2_L2CTX_TBDR_BHADDR_HI
;
3592 offset3
= BNX2_L2CTX_TBDR_BHADDR_LO
;
3594 val
= BNX2_L2CTX_TYPE_TYPE_L2
| BNX2_L2CTX_TYPE_SIZE_L2
;
3595 cnic_ctx_wr(dev
, cid_addr
, offset0
, val
);
3597 val
= BNX2_L2CTX_CMD_TYPE_TYPE_L2
| (8 << 16);
3598 cnic_ctx_wr(dev
, cid_addr
, offset1
, val
);
3600 txbd
= (struct tx_bd
*) cp
->l2_ring
;
3602 buf_map
= cp
->l2_buf_map
;
3603 for (i
= 0; i
< MAX_TX_DESC_CNT
; i
++, txbd
++) {
3604 txbd
->tx_bd_haddr_hi
= (u64
) buf_map
>> 32;
3605 txbd
->tx_bd_haddr_lo
= (u64
) buf_map
& 0xffffffff;
3607 val
= (u64
) cp
->l2_ring_map
>> 32;
3608 cnic_ctx_wr(dev
, cid_addr
, offset2
, val
);
3609 txbd
->tx_bd_haddr_hi
= val
;
3611 val
= (u64
) cp
->l2_ring_map
& 0xffffffff;
3612 cnic_ctx_wr(dev
, cid_addr
, offset3
, val
);
3613 txbd
->tx_bd_haddr_lo
= val
;
3616 static void cnic_init_bnx2_rx_ring(struct cnic_dev
*dev
)
3618 struct cnic_local
*cp
= dev
->cnic_priv
;
3619 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3620 u32 cid_addr
, sb_id
, val
, coal_reg
, coal_val
;
3623 struct status_block
*s_blk
= cp
->status_blk
.gen
;
3625 sb_id
= cp
->status_blk_num
;
3626 cnic_init_context(dev
, 2);
3627 cp
->rx_cons_ptr
= &s_blk
->status_rx_quick_consumer_index2
;
3628 coal_reg
= BNX2_HC_COMMAND
;
3629 coal_val
= CNIC_RD(dev
, coal_reg
);
3630 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3631 struct status_block_msix
*sblk
= cp
->status_blk
.bnx2
;
3633 cp
->rx_cons_ptr
= &sblk
->status_rx_quick_consumer_index
;
3634 coal_reg
= BNX2_HC_COALESCE_NOW
;
3635 coal_val
= 1 << (11 + sb_id
);
3638 while (!(*cp
->rx_cons_ptr
!= 0) && i
< 10) {
3639 CNIC_WR(dev
, coal_reg
, coal_val
);
3644 cp
->rx_cons
= *cp
->rx_cons_ptr
;
3646 cid_addr
= GET_CID_ADDR(2);
3647 val
= BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE
|
3648 BNX2_L2CTX_CTX_TYPE_SIZE_L2
| (0x02 << 8);
3649 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_CTX_TYPE
, val
);
3652 val
= 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT
;
3654 val
= BNX2_L2CTX_L2_STATUSB_NUM(sb_id
);
3655 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_HOST_BDIDX
, val
);
3657 rxbd
= (struct rx_bd
*) (cp
->l2_ring
+ BCM_PAGE_SIZE
);
3658 for (i
= 0; i
< MAX_RX_DESC_CNT
; i
++, rxbd
++) {
3660 int n
= (i
% cp
->l2_rx_ring_size
) + 1;
3662 buf_map
= cp
->l2_buf_map
+ (n
* cp
->l2_single_buf_size
);
3663 rxbd
->rx_bd_len
= cp
->l2_single_buf_size
;
3664 rxbd
->rx_bd_flags
= RX_BD_FLAGS_START
| RX_BD_FLAGS_END
;
3665 rxbd
->rx_bd_haddr_hi
= (u64
) buf_map
>> 32;
3666 rxbd
->rx_bd_haddr_lo
= (u64
) buf_map
& 0xffffffff;
3668 val
= (u64
) (cp
->l2_ring_map
+ BCM_PAGE_SIZE
) >> 32;
3669 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_NX_BDHADDR_HI
, val
);
3670 rxbd
->rx_bd_haddr_hi
= val
;
3672 val
= (u64
) (cp
->l2_ring_map
+ BCM_PAGE_SIZE
) & 0xffffffff;
3673 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_NX_BDHADDR_LO
, val
);
3674 rxbd
->rx_bd_haddr_lo
= val
;
3676 val
= cnic_reg_rd_ind(dev
, BNX2_RXP_SCRATCH_RXP_FLOOD
);
3677 cnic_reg_wr_ind(dev
, BNX2_RXP_SCRATCH_RXP_FLOOD
, val
| (1 << 2));
3680 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev
*dev
)
3682 struct kwqe
*wqes
[1], l2kwqe
;
3684 memset(&l2kwqe
, 0, sizeof(l2kwqe
));
3686 l2kwqe
.kwqe_op_flag
= (L2_LAYER_CODE
<< KWQE_FLAGS_LAYER_SHIFT
) |
3687 (L2_KWQE_OPCODE_VALUE_FLUSH
<<
3688 KWQE_OPCODE_SHIFT
) | 2;
3689 dev
->submit_kwqes(dev
, wqes
, 1);
3692 static void cnic_set_bnx2_mac(struct cnic_dev
*dev
)
3694 struct cnic_local
*cp
= dev
->cnic_priv
;
3697 val
= cp
->func
<< 2;
3699 cp
->shmem_base
= cnic_reg_rd_ind(dev
, BNX2_SHM_HDR_ADDR_0
+ val
);
3701 val
= cnic_reg_rd_ind(dev
, cp
->shmem_base
+
3702 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER
);
3703 dev
->mac_addr
[0] = (u8
) (val
>> 8);
3704 dev
->mac_addr
[1] = (u8
) val
;
3706 CNIC_WR(dev
, BNX2_EMAC_MAC_MATCH4
, val
);
3708 val
= cnic_reg_rd_ind(dev
, cp
->shmem_base
+
3709 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER
);
3710 dev
->mac_addr
[2] = (u8
) (val
>> 24);
3711 dev
->mac_addr
[3] = (u8
) (val
>> 16);
3712 dev
->mac_addr
[4] = (u8
) (val
>> 8);
3713 dev
->mac_addr
[5] = (u8
) val
;
3715 CNIC_WR(dev
, BNX2_EMAC_MAC_MATCH5
, val
);
3717 val
= 4 | BNX2_RPM_SORT_USER2_BC_EN
;
3718 if (CHIP_NUM(cp
) != CHIP_NUM_5709
)
3719 val
|= BNX2_RPM_SORT_USER2_PROM_VLAN
;
3721 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, 0x0);
3722 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, val
);
3723 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, val
| BNX2_RPM_SORT_USER2_ENA
);
3726 static int cnic_start_bnx2_hw(struct cnic_dev
*dev
)
3728 struct cnic_local
*cp
= dev
->cnic_priv
;
3729 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3730 struct status_block
*sblk
= cp
->status_blk
.gen
;
3731 u32 val
, kcq_cid_addr
, kwq_cid_addr
;
3734 cnic_set_bnx2_mac(dev
);
3736 val
= CNIC_RD(dev
, BNX2_MQ_CONFIG
);
3737 val
&= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE
;
3738 if (BCM_PAGE_BITS
> 12)
3739 val
|= (12 - 8) << 4;
3741 val
|= (BCM_PAGE_BITS
- 8) << 4;
3743 CNIC_WR(dev
, BNX2_MQ_CONFIG
, val
);
3745 CNIC_WR(dev
, BNX2_HC_COMP_PROD_TRIP
, (2 << 16) | 8);
3746 CNIC_WR(dev
, BNX2_HC_COM_TICKS
, (64 << 16) | 220);
3747 CNIC_WR(dev
, BNX2_HC_CMD_TICKS
, (64 << 16) | 220);
3749 err
= cnic_setup_5709_context(dev
, 1);
3753 cnic_init_context(dev
, KWQ_CID
);
3754 cnic_init_context(dev
, KCQ_CID
);
3756 kwq_cid_addr
= GET_CID_ADDR(KWQ_CID
);
3757 cp
->kwq_io_addr
= MB_GET_CID_ADDR(KWQ_CID
) + L5_KRNLQ_HOST_QIDX
;
3759 cp
->max_kwq_idx
= MAX_KWQ_IDX
;
3760 cp
->kwq_prod_idx
= 0;
3761 cp
->kwq_con_idx
= 0;
3762 set_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
);
3764 if (CHIP_NUM(cp
) == CHIP_NUM_5706
|| CHIP_NUM(cp
) == CHIP_NUM_5708
)
3765 cp
->kwq_con_idx_ptr
= &sblk
->status_rx_quick_consumer_index15
;
3767 cp
->kwq_con_idx_ptr
= &sblk
->status_cmd_consumer_index
;
3769 /* Initialize the kernel work queue context. */
3770 val
= KRNLQ_TYPE_TYPE_KRNLQ
| KRNLQ_SIZE_TYPE_SIZE
|
3771 (BCM_PAGE_BITS
- 8) | KRNLQ_FLAGS_QE_SELF_SEQ
;
3772 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_TYPE
, val
);
3774 val
= (BCM_PAGE_SIZE
/ sizeof(struct kwqe
) - 1) << 16;
3775 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_QE_SELF_SEQ_MAX
, val
);
3777 val
= ((BCM_PAGE_SIZE
/ sizeof(struct kwqe
)) << 16) | KWQ_PAGE_CNT
;
3778 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_NPAGES
, val
);
3780 val
= (u32
) ((u64
) cp
->kwq_info
.pgtbl_map
>> 32);
3781 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_HI
, val
);
3783 val
= (u32
) cp
->kwq_info
.pgtbl_map
;
3784 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_LO
, val
);
3786 kcq_cid_addr
= GET_CID_ADDR(KCQ_CID
);
3787 cp
->kcq1
.io_addr
= MB_GET_CID_ADDR(KCQ_CID
) + L5_KRNLQ_HOST_QIDX
;
3789 cp
->kcq1
.sw_prod_idx
= 0;
3790 cp
->kcq1
.hw_prod_idx_ptr
=
3791 (u16
*) &sblk
->status_completion_producer_index
;
3793 cp
->kcq1
.status_idx_ptr
= (u16
*) &sblk
->status_idx
;
3795 /* Initialize the kernel complete queue context. */
3796 val
= KRNLQ_TYPE_TYPE_KRNLQ
| KRNLQ_SIZE_TYPE_SIZE
|
3797 (BCM_PAGE_BITS
- 8) | KRNLQ_FLAGS_QE_SELF_SEQ
;
3798 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_TYPE
, val
);
3800 val
= (BCM_PAGE_SIZE
/ sizeof(struct kcqe
) - 1) << 16;
3801 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_QE_SELF_SEQ_MAX
, val
);
3803 val
= ((BCM_PAGE_SIZE
/ sizeof(struct kcqe
)) << 16) | KCQ_PAGE_CNT
;
3804 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_NPAGES
, val
);
3806 val
= (u32
) ((u64
) cp
->kcq1
.dma
.pgtbl_map
>> 32);
3807 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_HI
, val
);
3809 val
= (u32
) cp
->kcq1
.dma
.pgtbl_map
;
3810 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_LO
, val
);
3813 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3814 struct status_block_msix
*msblk
= cp
->status_blk
.bnx2
;
3815 u32 sb_id
= cp
->status_blk_num
;
3816 u32 sb
= BNX2_L2CTX_L5_STATUSB_NUM(sb_id
);
3818 cp
->kcq1
.hw_prod_idx_ptr
=
3819 (u16
*) &msblk
->status_completion_producer_index
;
3820 cp
->kcq1
.status_idx_ptr
= (u16
*) &msblk
->status_idx
;
3821 cp
->int_num
= sb_id
<< BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT
;
3822 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_HOST_QIDX
, sb
);
3823 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_HOST_QIDX
, sb
);
3826 /* Enable Commnad Scheduler notification when we write to the
3827 * host producer index of the kernel contexts. */
3828 CNIC_WR(dev
, BNX2_MQ_KNL_CMD_MASK1
, 2);
3830 /* Enable Command Scheduler notification when we write to either
3831 * the Send Queue or Receive Queue producer indexes of the kernel
3832 * bypass contexts. */
3833 CNIC_WR(dev
, BNX2_MQ_KNL_BYP_CMD_MASK1
, 7);
3834 CNIC_WR(dev
, BNX2_MQ_KNL_BYP_WRITE_MASK1
, 7);
3836 /* Notify COM when the driver post an application buffer. */
3837 CNIC_WR(dev
, BNX2_MQ_KNL_RX_V2P_MASK2
, 0x2000);
3839 /* Set the CP and COM doorbells. These two processors polls the
3840 * doorbell for a non zero value before running. This must be done
3841 * after setting up the kernel queue contexts. */
3842 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 1);
3843 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 1);
3845 cnic_init_bnx2_tx_ring(dev
);
3846 cnic_init_bnx2_rx_ring(dev
);
3848 err
= cnic_init_bnx2_irq(dev
);
3850 netdev_err(dev
->netdev
, "cnic_init_irq failed\n");
3851 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 0);
3852 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 0);
3859 static void cnic_setup_bnx2x_context(struct cnic_dev
*dev
)
3861 struct cnic_local
*cp
= dev
->cnic_priv
;
3862 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3863 u32 start_offset
= ethdev
->ctx_tbl_offset
;
3866 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
3867 struct cnic_ctx
*ctx
= &cp
->ctx_arr
[i
];
3868 dma_addr_t map
= ctx
->mapping
;
3870 if (cp
->ctx_align
) {
3871 unsigned long mask
= cp
->ctx_align
- 1;
3873 map
= (map
+ mask
) & ~mask
;
3876 cnic_ctx_tbl_wr(dev
, start_offset
+ i
, map
);
3880 static int cnic_init_bnx2x_irq(struct cnic_dev
*dev
)
3882 struct cnic_local
*cp
= dev
->cnic_priv
;
3883 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3886 tasklet_init(&cp
->cnic_irq_task
, cnic_service_bnx2x_bh
,
3887 (unsigned long) dev
);
3888 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3889 err
= request_irq(ethdev
->irq_arr
[0].vector
, cnic_irq
, 0,
3892 tasklet_disable(&cp
->cnic_irq_task
);
3897 static void cnic_enable_bnx2x_int(struct cnic_dev
*dev
)
3899 struct cnic_local
*cp
= dev
->cnic_priv
;
3900 u8 sb_id
= cp
->status_blk_num
;
3901 int port
= CNIC_PORT(cp
);
3903 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
3904 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port
, sb_id
,
3905 HC_INDEX_C_ISCSI_EQ_CONS
),
3907 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
3908 CSTORM_SB_HC_DISABLE_C_OFFSET(port
, sb_id
,
3909 HC_INDEX_C_ISCSI_EQ_CONS
), 0);
3912 static void cnic_disable_bnx2x_int_sync(struct cnic_dev
*dev
)
3916 static void cnic_init_bnx2x_tx_ring(struct cnic_dev
*dev
)
3918 struct cnic_local
*cp
= dev
->cnic_priv
;
3919 union eth_tx_bd_types
*txbd
= (union eth_tx_bd_types
*) cp
->l2_ring
;
3920 struct eth_context
*context
;
3921 struct regpair context_addr
;
3923 int func
= CNIC_FUNC(cp
);
3924 int port
= CNIC_PORT(cp
);
3926 int cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
3929 memset(txbd
, 0, BCM_PAGE_SIZE
);
3931 buf_map
= cp
->l2_buf_map
;
3932 for (i
= 0; i
< MAX_TX_DESC_CNT
; i
+= 3, txbd
+= 3) {
3933 struct eth_tx_start_bd
*start_bd
= &txbd
->start_bd
;
3934 struct eth_tx_bd
*reg_bd
= &((txbd
+ 2)->reg_bd
);
3936 start_bd
->addr_hi
= cpu_to_le32((u64
) buf_map
>> 32);
3937 start_bd
->addr_lo
= cpu_to_le32(buf_map
& 0xffffffff);
3938 reg_bd
->addr_hi
= start_bd
->addr_hi
;
3939 reg_bd
->addr_lo
= start_bd
->addr_lo
+ 0x10;
3940 start_bd
->nbytes
= cpu_to_le16(0x10);
3941 start_bd
->nbd
= cpu_to_le16(3);
3942 start_bd
->bd_flags
.as_bitfield
= ETH_TX_BD_FLAGS_START_BD
;
3943 start_bd
->general_data
= (UNICAST_ADDRESS
<<
3944 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT
);
3945 start_bd
->general_data
|= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT
);
3948 context
= cnic_get_bnx2x_ctx(dev
, BNX2X_ISCSI_L2_CID
, 1, &context_addr
);
3950 val
= (u64
) cp
->l2_ring_map
>> 32;
3951 txbd
->next_bd
.addr_hi
= cpu_to_le32(val
);
3953 context
->xstorm_st_context
.tx_bd_page_base_hi
= val
;
3955 val
= (u64
) cp
->l2_ring_map
& 0xffffffff;
3956 txbd
->next_bd
.addr_lo
= cpu_to_le32(val
);
3958 context
->xstorm_st_context
.tx_bd_page_base_lo
= val
;
3960 context
->cstorm_st_context
.sb_index_number
=
3961 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS
;
3962 context
->cstorm_st_context
.status_block_id
= BNX2X_DEF_SB_ID
;
3964 if (cli
< MAX_X_STAT_COUNTER_ID
)
3965 context
->xstorm_st_context
.statistics_data
= cli
|
3966 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE
;
3968 context
->xstorm_ag_context
.cdu_reserved
=
3969 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID
, func
),
3970 CDU_REGION_NUMBER_XCM_AG
,
3971 ETH_CONNECTION_TYPE
);
3973 /* reset xstorm per client statistics */
3974 if (cli
< MAX_X_STAT_COUNTER_ID
) {
3975 val
= BAR_XSTRORM_INTMEM
+
3976 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
3977 for (i
= 0; i
< sizeof(struct xstorm_per_client_stats
) / 4; i
++)
3978 CNIC_WR(dev
, val
+ i
* 4, 0);
3982 &cp
->bnx2x_def_status_blk
->c_def_status_block
.index_values
[
3983 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS
];
3986 static void cnic_init_bnx2x_rx_ring(struct cnic_dev
*dev
)
3988 struct cnic_local
*cp
= dev
->cnic_priv
;
3989 struct eth_rx_bd
*rxbd
= (struct eth_rx_bd
*) (cp
->l2_ring
+
3991 struct eth_rx_cqe_next_page
*rxcqe
= (struct eth_rx_cqe_next_page
*)
3992 (cp
->l2_ring
+ (2 * BCM_PAGE_SIZE
));
3993 struct eth_context
*context
;
3994 struct regpair context_addr
;
3996 int port
= CNIC_PORT(cp
);
3997 int func
= CNIC_FUNC(cp
);
3998 int cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4000 struct tstorm_eth_client_config tstorm_client
= {0};
4002 for (i
= 0; i
< BNX2X_MAX_RX_DESC_CNT
; i
++, rxbd
++) {
4004 int n
= (i
% cp
->l2_rx_ring_size
) + 1;
4006 buf_map
= cp
->l2_buf_map
+ (n
* cp
->l2_single_buf_size
);
4007 rxbd
->addr_hi
= cpu_to_le32((u64
) buf_map
>> 32);
4008 rxbd
->addr_lo
= cpu_to_le32(buf_map
& 0xffffffff);
4010 context
= cnic_get_bnx2x_ctx(dev
, BNX2X_ISCSI_L2_CID
, 0, &context_addr
);
4012 val
= (u64
) (cp
->l2_ring_map
+ BCM_PAGE_SIZE
) >> 32;
4013 rxbd
->addr_hi
= cpu_to_le32(val
);
4015 context
->ustorm_st_context
.common
.bd_page_base_hi
= val
;
4017 val
= (u64
) (cp
->l2_ring_map
+ BCM_PAGE_SIZE
) & 0xffffffff;
4018 rxbd
->addr_lo
= cpu_to_le32(val
);
4020 context
->ustorm_st_context
.common
.bd_page_base_lo
= val
;
4022 context
->ustorm_st_context
.common
.sb_index_numbers
=
4023 BNX2X_ISCSI_RX_SB_INDEX_NUM
;
4024 context
->ustorm_st_context
.common
.clientId
= cli
;
4025 context
->ustorm_st_context
.common
.status_block_id
= BNX2X_DEF_SB_ID
;
4026 if (cli
< MAX_U_STAT_COUNTER_ID
) {
4027 context
->ustorm_st_context
.common
.flags
=
4028 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS
;
4029 context
->ustorm_st_context
.common
.statistics_counter_id
= cli
;
4031 context
->ustorm_st_context
.common
.mc_alignment_log_size
= 0;
4032 context
->ustorm_st_context
.common
.bd_buff_size
=
4033 cp
->l2_single_buf_size
;
4035 context
->ustorm_ag_context
.cdu_usage
=
4036 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID
, func
),
4037 CDU_REGION_NUMBER_UCM_AG
,
4038 ETH_CONNECTION_TYPE
);
4040 rxcqe
+= BNX2X_MAX_RCQ_DESC_CNT
;
4041 val
= (u64
) (cp
->l2_ring_map
+ (2 * BCM_PAGE_SIZE
)) >> 32;
4042 rxcqe
->addr_hi
= cpu_to_le32(val
);
4044 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4045 USTORM_CQE_PAGE_BASE_OFFSET(port
, cli
) + 4, val
);
4047 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4048 USTORM_CQE_PAGE_NEXT_OFFSET(port
, cli
) + 4, val
);
4050 val
= (u64
) (cp
->l2_ring_map
+ (2 * BCM_PAGE_SIZE
)) & 0xffffffff;
4051 rxcqe
->addr_lo
= cpu_to_le32(val
);
4053 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4054 USTORM_CQE_PAGE_BASE_OFFSET(port
, cli
), val
);
4056 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4057 USTORM_CQE_PAGE_NEXT_OFFSET(port
, cli
), val
);
4059 /* client tstorm info */
4060 tstorm_client
.mtu
= cp
->l2_single_buf_size
- 14;
4061 tstorm_client
.config_flags
= TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE
;
4063 if (cli
< MAX_T_STAT_COUNTER_ID
) {
4064 tstorm_client
.config_flags
|=
4065 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE
;
4066 tstorm_client
.statistics_counter_id
= cli
;
4069 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4070 TSTORM_CLIENT_CONFIG_OFFSET(port
, cli
),
4071 ((u32
*)&tstorm_client
)[0]);
4072 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4073 TSTORM_CLIENT_CONFIG_OFFSET(port
, cli
) + 4,
4074 ((u32
*)&tstorm_client
)[1]);
4076 /* reset tstorm per client statistics */
4077 if (cli
< MAX_T_STAT_COUNTER_ID
) {
4079 val
= BAR_TSTRORM_INTMEM
+
4080 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
4081 for (i
= 0; i
< sizeof(struct tstorm_per_client_stats
) / 4; i
++)
4082 CNIC_WR(dev
, val
+ i
* 4, 0);
4085 /* reset ustorm per client statistics */
4086 if (cli
< MAX_U_STAT_COUNTER_ID
) {
4087 val
= BAR_USTRORM_INTMEM
+
4088 USTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
4089 for (i
= 0; i
< sizeof(struct ustorm_per_client_stats
) / 4; i
++)
4090 CNIC_WR(dev
, val
+ i
* 4, 0);
4094 &cp
->bnx2x_def_status_blk
->u_def_status_block
.index_values
[
4095 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS
];
4098 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev
*dev
)
4100 struct cnic_local
*cp
= dev
->cnic_priv
;
4101 u32 base
, addr
, val
;
4102 int port
= CNIC_PORT(cp
);
4104 dev
->max_iscsi_conn
= 0;
4105 base
= CNIC_RD(dev
, MISC_REG_SHARED_MEM_ADDR
);
4106 if (base
< 0xa0000 || base
>= 0xc0000)
4109 addr
= BNX2X_SHMEM_ADDR(base
,
4110 dev_info
.port_hw_config
[port
].iscsi_mac_upper
);
4112 val
= CNIC_RD(dev
, addr
);
4114 dev
->mac_addr
[0] = (u8
) (val
>> 8);
4115 dev
->mac_addr
[1] = (u8
) val
;
4117 addr
= BNX2X_SHMEM_ADDR(base
,
4118 dev_info
.port_hw_config
[port
].iscsi_mac_lower
);
4120 val
= CNIC_RD(dev
, addr
);
4122 dev
->mac_addr
[2] = (u8
) (val
>> 24);
4123 dev
->mac_addr
[3] = (u8
) (val
>> 16);
4124 dev
->mac_addr
[4] = (u8
) (val
>> 8);
4125 dev
->mac_addr
[5] = (u8
) val
;
4127 addr
= BNX2X_SHMEM_ADDR(base
, validity_map
[port
]);
4128 val
= CNIC_RD(dev
, addr
);
4130 if (!(val
& SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT
)) {
4133 addr
= BNX2X_SHMEM_ADDR(base
,
4134 drv_lic_key
[port
].max_iscsi_init_conn
);
4135 val16
= CNIC_RD16(dev
, addr
);
4139 dev
->max_iscsi_conn
= val16
;
4141 if (BNX2X_CHIP_IS_E1H(cp
->chip_id
)) {
4142 int func
= CNIC_FUNC(cp
);
4144 addr
= BNX2X_SHMEM_ADDR(base
,
4145 mf_cfg
.func_mf_config
[func
].e1hov_tag
);
4146 val
= CNIC_RD(dev
, addr
);
4147 val
&= FUNC_MF_CFG_E1HOV_TAG_MASK
;
4148 if (val
!= FUNC_MF_CFG_E1HOV_TAG_DEFAULT
) {
4149 addr
= BNX2X_SHMEM_ADDR(base
,
4150 mf_cfg
.func_mf_config
[func
].config
);
4151 val
= CNIC_RD(dev
, addr
);
4152 val
&= FUNC_MF_CFG_PROTOCOL_MASK
;
4153 if (val
!= FUNC_MF_CFG_PROTOCOL_ISCSI
)
4154 dev
->max_iscsi_conn
= 0;
4159 static int cnic_start_bnx2x_hw(struct cnic_dev
*dev
)
4161 struct cnic_local
*cp
= dev
->cnic_priv
;
4162 int func
= CNIC_FUNC(cp
), ret
, i
;
4163 int port
= CNIC_PORT(cp
);
4165 u8 sb_id
= cp
->status_blk_num
;
4167 ret
= cnic_init_id_tbl(&cp
->cid_tbl
, MAX_ISCSI_TBL_SZ
,
4168 cp
->iscsi_start_cid
);
4173 cp
->kcq1
.io_addr
= BAR_CSTRORM_INTMEM
+
4174 CSTORM_ISCSI_EQ_PROD_OFFSET(func
, 0);
4175 cp
->kcq1
.sw_prod_idx
= 0;
4177 cp
->kcq1
.hw_prod_idx_ptr
=
4178 &cp
->status_blk
.bnx2x
->c_status_block
.index_values
[
4179 HC_INDEX_C_ISCSI_EQ_CONS
];
4180 cp
->kcq1
.status_idx_ptr
=
4181 &cp
->status_blk
.bnx2x
->c_status_block
.status_block_index
;
4183 cnic_get_bnx2x_iscsi_info(dev
);
4186 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, MAX_KCQ_IDX
);
4187 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4188 CSTORM_ISCSI_EQ_CONS_OFFSET(func
, 0), 0);
4189 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4190 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func
, 0),
4191 cp
->kcq1
.dma
.pg_map_arr
[1] & 0xffffffff);
4192 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4193 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func
, 0) + 4,
4194 (u64
) cp
->kcq1
.dma
.pg_map_arr
[1] >> 32);
4195 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4196 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func
, 0),
4197 cp
->kcq1
.dma
.pg_map_arr
[0] & 0xffffffff);
4198 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4199 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func
, 0) + 4,
4200 (u64
) cp
->kcq1
.dma
.pg_map_arr
[0] >> 32);
4201 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
4202 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func
, 0), 1);
4203 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
4204 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func
, 0), cp
->status_blk_num
);
4205 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
4206 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func
, 0),
4207 HC_INDEX_C_ISCSI_EQ_CONS
);
4209 for (i
= 0; i
< cp
->conn_buf_info
.num_pages
; i
++) {
4210 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4211 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func
, i
),
4212 cp
->conn_buf_info
.pgtbl
[2 * i
]);
4213 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4214 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func
, i
) + 4,
4215 cp
->conn_buf_info
.pgtbl
[(2 * i
) + 1]);
4218 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4219 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func
),
4220 cp
->gbl_buf_info
.pg_map_arr
[0] & 0xffffffff);
4221 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4222 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func
) + 4,
4223 (u64
) cp
->gbl_buf_info
.pg_map_arr
[0] >> 32);
4225 cnic_setup_bnx2x_context(dev
);
4227 eq_idx
= CNIC_RD16(dev
, BAR_CSTRORM_INTMEM
+
4228 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port
, sb_id
) +
4229 offsetof(struct cstorm_status_block_c
,
4230 index_values
[HC_INDEX_C_ISCSI_EQ_CONS
]));
4232 netdev_err(dev
->netdev
, "EQ cons index %x != 0\n", eq_idx
);
4235 ret
= cnic_init_bnx2x_irq(dev
);
4239 cnic_init_bnx2x_tx_ring(dev
);
4240 cnic_init_bnx2x_rx_ring(dev
);
4245 static void cnic_init_rings(struct cnic_dev
*dev
)
4247 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
4248 cnic_init_bnx2_tx_ring(dev
);
4249 cnic_init_bnx2_rx_ring(dev
);
4250 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
4251 struct cnic_local
*cp
= dev
->cnic_priv
;
4252 u32 cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4253 union l5cm_specific_data l5_data
;
4254 struct ustorm_eth_rx_producers rx_prods
= {0};
4257 rx_prods
.bd_prod
= 0;
4258 rx_prods
.cqe_prod
= BNX2X_MAX_RCQ_DESC_CNT
;
4261 off
= BAR_USTRORM_INTMEM
+
4262 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp
), cli
);
4264 for (i
= 0; i
< sizeof(struct ustorm_eth_rx_producers
) / 4; i
++)
4265 CNIC_WR(dev
, off
+ i
* 4, ((u32
*) &rx_prods
)[i
]);
4267 set_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
4269 cnic_init_bnx2x_tx_ring(dev
);
4270 cnic_init_bnx2x_rx_ring(dev
);
4272 l5_data
.phy_address
.lo
= cli
;
4273 l5_data
.phy_address
.hi
= 0;
4274 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_CLIENT_SETUP
,
4275 BNX2X_ISCSI_L2_CID
, ETH_CONNECTION_TYPE
, &l5_data
);
4277 while (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
) &&
4281 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
4282 netdev_err(dev
->netdev
,
4283 "iSCSI CLIENT_SETUP did not complete\n");
4284 cnic_kwq_completion(dev
, 1);
4285 cnic_ring_ctl(dev
, BNX2X_ISCSI_L2_CID
, cli
, 1);
4289 static void cnic_shutdown_rings(struct cnic_dev
*dev
)
4291 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
4292 cnic_shutdown_bnx2_rx_ring(dev
);
4293 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
4294 struct cnic_local
*cp
= dev
->cnic_priv
;
4295 u32 cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4296 union l5cm_specific_data l5_data
;
4299 cnic_ring_ctl(dev
, BNX2X_ISCSI_L2_CID
, cli
, 0);
4301 set_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
4303 l5_data
.phy_address
.lo
= cli
;
4304 l5_data
.phy_address
.hi
= 0;
4305 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_HALT
,
4306 BNX2X_ISCSI_L2_CID
, ETH_CONNECTION_TYPE
, &l5_data
);
4308 while (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
) &&
4312 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
4313 netdev_err(dev
->netdev
,
4314 "iSCSI CLIENT_HALT did not complete\n");
4315 cnic_kwq_completion(dev
, 1);
4317 memset(&l5_data
, 0, sizeof(l5_data
));
4318 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_CFC_DEL
,
4319 BNX2X_ISCSI_L2_CID
, ETH_CONNECTION_TYPE
|
4320 (1 << SPE_HDR_COMMON_RAMROD_SHIFT
), &l5_data
);
4325 static int cnic_register_netdev(struct cnic_dev
*dev
)
4327 struct cnic_local
*cp
= dev
->cnic_priv
;
4328 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4334 if (ethdev
->drv_state
& CNIC_DRV_STATE_REGD
)
4337 err
= ethdev
->drv_register_cnic(dev
->netdev
, cp
->cnic_ops
, dev
);
4339 netdev_err(dev
->netdev
, "register_cnic failed\n");
4344 static void cnic_unregister_netdev(struct cnic_dev
*dev
)
4346 struct cnic_local
*cp
= dev
->cnic_priv
;
4347 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4352 ethdev
->drv_unregister_cnic(dev
->netdev
);
4355 static int cnic_start_hw(struct cnic_dev
*dev
)
4357 struct cnic_local
*cp
= dev
->cnic_priv
;
4358 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4361 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
4364 dev
->regview
= ethdev
->io_base
;
4365 cp
->chip_id
= ethdev
->chip_id
;
4366 pci_dev_get(dev
->pcidev
);
4367 cp
->func
= PCI_FUNC(dev
->pcidev
->devfn
);
4368 cp
->status_blk
.gen
= ethdev
->irq_arr
[0].status_blk
;
4369 cp
->status_blk_num
= ethdev
->irq_arr
[0].status_blk_num
;
4371 err
= cp
->alloc_resc(dev
);
4373 netdev_err(dev
->netdev
, "allocate resource failure\n");
4377 err
= cp
->start_hw(dev
);
4381 err
= cnic_cm_open(dev
);
4385 set_bit(CNIC_F_CNIC_UP
, &dev
->flags
);
4387 cp
->enable_int(dev
);
4393 pci_dev_put(dev
->pcidev
);
4397 static void cnic_stop_bnx2_hw(struct cnic_dev
*dev
)
4399 cnic_disable_bnx2_int_sync(dev
);
4401 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 0);
4402 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 0);
4404 cnic_init_context(dev
, KWQ_CID
);
4405 cnic_init_context(dev
, KCQ_CID
);
4407 cnic_setup_5709_context(dev
, 0);
4410 cnic_free_resc(dev
);
4414 static void cnic_stop_bnx2x_hw(struct cnic_dev
*dev
)
4416 struct cnic_local
*cp
= dev
->cnic_priv
;
4417 u8 sb_id
= cp
->status_blk_num
;
4418 int port
= CNIC_PORT(cp
);
4421 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
4422 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port
, sb_id
) +
4423 offsetof(struct cstorm_status_block_c
,
4424 index_values
[HC_INDEX_C_ISCSI_EQ_CONS
]),
4426 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4427 CSTORM_ISCSI_EQ_CONS_OFFSET(cp
->func
, 0), 0);
4428 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, 0);
4429 cnic_free_resc(dev
);
4432 static void cnic_stop_hw(struct cnic_dev
*dev
)
4434 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
4435 struct cnic_local
*cp
= dev
->cnic_priv
;
4438 /* Need to wait for the ring shutdown event to complete
4439 * before clearing the CNIC_UP flag.
4441 while (cp
->uio_dev
!= -1 && i
< 15) {
4445 clear_bit(CNIC_F_CNIC_UP
, &dev
->flags
);
4446 rcu_assign_pointer(cp
->ulp_ops
[CNIC_ULP_L4
], NULL
);
4448 cnic_cm_shutdown(dev
);
4450 pci_dev_put(dev
->pcidev
);
4454 static void cnic_free_dev(struct cnic_dev
*dev
)
4458 while ((atomic_read(&dev
->ref_count
) != 0) && i
< 10) {
4462 if (atomic_read(&dev
->ref_count
) != 0)
4463 netdev_err(dev
->netdev
, "Failed waiting for ref count to go to zero\n");
4465 netdev_info(dev
->netdev
, "Removed CNIC device\n");
4466 dev_put(dev
->netdev
);
4470 static struct cnic_dev
*cnic_alloc_dev(struct net_device
*dev
,
4471 struct pci_dev
*pdev
)
4473 struct cnic_dev
*cdev
;
4474 struct cnic_local
*cp
;
4477 alloc_size
= sizeof(struct cnic_dev
) + sizeof(struct cnic_local
);
4479 cdev
= kzalloc(alloc_size
, GFP_KERNEL
);
4481 netdev_err(dev
, "allocate dev struct failure\n");
4486 cdev
->cnic_priv
= (char *)cdev
+ sizeof(struct cnic_dev
);
4487 cdev
->register_device
= cnic_register_device
;
4488 cdev
->unregister_device
= cnic_unregister_device
;
4489 cdev
->iscsi_nl_msg_recv
= cnic_iscsi_nl_msg_recv
;
4491 cp
= cdev
->cnic_priv
;
4494 cp
->l2_single_buf_size
= 0x400;
4495 cp
->l2_rx_ring_size
= 3;
4497 spin_lock_init(&cp
->cnic_ulp_lock
);
4499 netdev_info(dev
, "Added CNIC device\n");
4504 static struct cnic_dev
*init_bnx2_cnic(struct net_device
*dev
)
4506 struct pci_dev
*pdev
;
4507 struct cnic_dev
*cdev
;
4508 struct cnic_local
*cp
;
4509 struct cnic_eth_dev
*ethdev
= NULL
;
4510 struct cnic_eth_dev
*(*probe
)(struct net_device
*) = NULL
;
4512 probe
= symbol_get(bnx2_cnic_probe
);
4514 ethdev
= (*probe
)(dev
);
4515 symbol_put(bnx2_cnic_probe
);
4520 pdev
= ethdev
->pdev
;
4526 if (pdev
->device
== PCI_DEVICE_ID_NX2_5709
||
4527 pdev
->device
== PCI_DEVICE_ID_NX2_5709S
) {
4530 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &rev
);
4538 cdev
= cnic_alloc_dev(dev
, pdev
);
4542 set_bit(CNIC_F_BNX2_CLASS
, &cdev
->flags
);
4543 cdev
->submit_kwqes
= cnic_submit_bnx2_kwqes
;
4545 cp
= cdev
->cnic_priv
;
4546 cp
->ethdev
= ethdev
;
4547 cdev
->pcidev
= pdev
;
4549 cp
->cnic_ops
= &cnic_bnx2_ops
;
4550 cp
->start_hw
= cnic_start_bnx2_hw
;
4551 cp
->stop_hw
= cnic_stop_bnx2_hw
;
4552 cp
->setup_pgtbl
= cnic_setup_page_tbl
;
4553 cp
->alloc_resc
= cnic_alloc_bnx2_resc
;
4554 cp
->free_resc
= cnic_free_resc
;
4555 cp
->start_cm
= cnic_cm_init_bnx2_hw
;
4556 cp
->stop_cm
= cnic_cm_stop_bnx2_hw
;
4557 cp
->enable_int
= cnic_enable_bnx2_int
;
4558 cp
->disable_int_sync
= cnic_disable_bnx2_int_sync
;
4559 cp
->close_conn
= cnic_close_bnx2_conn
;
4560 cp
->next_idx
= cnic_bnx2_next_idx
;
4561 cp
->hw_idx
= cnic_bnx2_hw_idx
;
4569 static struct cnic_dev
*init_bnx2x_cnic(struct net_device
*dev
)
4571 struct pci_dev
*pdev
;
4572 struct cnic_dev
*cdev
;
4573 struct cnic_local
*cp
;
4574 struct cnic_eth_dev
*ethdev
= NULL
;
4575 struct cnic_eth_dev
*(*probe
)(struct net_device
*) = NULL
;
4577 probe
= symbol_get(bnx2x_cnic_probe
);
4579 ethdev
= (*probe
)(dev
);
4580 symbol_put(bnx2x_cnic_probe
);
4585 pdev
= ethdev
->pdev
;
4590 cdev
= cnic_alloc_dev(dev
, pdev
);
4596 set_bit(CNIC_F_BNX2X_CLASS
, &cdev
->flags
);
4597 cdev
->submit_kwqes
= cnic_submit_bnx2x_kwqes
;
4599 cp
= cdev
->cnic_priv
;
4600 cp
->ethdev
= ethdev
;
4601 cdev
->pcidev
= pdev
;
4603 cp
->cnic_ops
= &cnic_bnx2x_ops
;
4604 cp
->start_hw
= cnic_start_bnx2x_hw
;
4605 cp
->stop_hw
= cnic_stop_bnx2x_hw
;
4606 cp
->setup_pgtbl
= cnic_setup_page_tbl_le
;
4607 cp
->alloc_resc
= cnic_alloc_bnx2x_resc
;
4608 cp
->free_resc
= cnic_free_resc
;
4609 cp
->start_cm
= cnic_cm_init_bnx2x_hw
;
4610 cp
->stop_cm
= cnic_cm_stop_bnx2x_hw
;
4611 cp
->enable_int
= cnic_enable_bnx2x_int
;
4612 cp
->disable_int_sync
= cnic_disable_bnx2x_int_sync
;
4613 cp
->ack_int
= cnic_ack_bnx2x_msix
;
4614 cp
->close_conn
= cnic_close_bnx2x_conn
;
4615 cp
->next_idx
= cnic_bnx2x_next_idx
;
4616 cp
->hw_idx
= cnic_bnx2x_hw_idx
;
4620 static struct cnic_dev
*is_cnic_dev(struct net_device
*dev
)
4622 struct ethtool_drvinfo drvinfo
;
4623 struct cnic_dev
*cdev
= NULL
;
4625 if (dev
->ethtool_ops
&& dev
->ethtool_ops
->get_drvinfo
) {
4626 memset(&drvinfo
, 0, sizeof(drvinfo
));
4627 dev
->ethtool_ops
->get_drvinfo(dev
, &drvinfo
);
4629 if (!strcmp(drvinfo
.driver
, "bnx2"))
4630 cdev
= init_bnx2_cnic(dev
);
4631 if (!strcmp(drvinfo
.driver
, "bnx2x"))
4632 cdev
= init_bnx2x_cnic(dev
);
4634 write_lock(&cnic_dev_lock
);
4635 list_add(&cdev
->list
, &cnic_dev_list
);
4636 write_unlock(&cnic_dev_lock
);
4643 * netdev event handler
4645 static int cnic_netdev_event(struct notifier_block
*this, unsigned long event
,
4648 struct net_device
*netdev
= ptr
;
4649 struct cnic_dev
*dev
;
4653 dev
= cnic_from_netdev(netdev
);
4655 if (!dev
&& (event
== NETDEV_REGISTER
|| event
== NETDEV_UP
)) {
4656 /* Check for the hot-plug device */
4657 dev
= is_cnic_dev(netdev
);
4664 struct cnic_local
*cp
= dev
->cnic_priv
;
4668 else if (event
== NETDEV_UNREGISTER
)
4671 if (event
== NETDEV_UP
) {
4672 if (cnic_register_netdev(dev
) != 0) {
4676 if (!cnic_start_hw(dev
))
4677 cnic_ulp_start(dev
);
4681 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
4682 struct cnic_ulp_ops
*ulp_ops
;
4685 ulp_ops
= rcu_dereference(cp
->ulp_ops
[if_type
]);
4686 if (!ulp_ops
|| !ulp_ops
->indicate_netevent
)
4689 ctx
= cp
->ulp_handle
[if_type
];
4691 ulp_ops
->indicate_netevent(ctx
, event
);
4695 if (event
== NETDEV_GOING_DOWN
) {
4698 cnic_unregister_netdev(dev
);
4699 } else if (event
== NETDEV_UNREGISTER
) {
4700 write_lock(&cnic_dev_lock
);
4701 list_del_init(&dev
->list
);
4702 write_unlock(&cnic_dev_lock
);
4714 static struct notifier_block cnic_netdev_notifier
= {
4715 .notifier_call
= cnic_netdev_event
4718 static void cnic_release(void)
4720 struct cnic_dev
*dev
;
4722 while (!list_empty(&cnic_dev_list
)) {
4723 dev
= list_entry(cnic_dev_list
.next
, struct cnic_dev
, list
);
4724 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
4730 cnic_unregister_netdev(dev
);
4731 list_del_init(&dev
->list
);
4736 static int __init
cnic_init(void)
4740 pr_info("%s", version
);
4742 rc
= register_netdevice_notifier(&cnic_netdev_notifier
);
4751 static void __exit
cnic_exit(void)
4753 unregister_netdevice_notifier(&cnic_netdev_notifier
);
4757 module_init(cnic_init
);
4758 module_exit(cnic_exit
);