1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2010 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
35 #include <net/route.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
43 #include "bnx2x/bnx2x_reg.h"
44 #include "bnx2x/bnx2x_fw_defs.h"
45 #include "bnx2x/bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
49 #include "cnic_defs.h"
51 #define DRV_MODULE_NAME "cnic"
53 static char version
[] __devinitdata
=
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME
" v" CNIC_MODULE_VERSION
" (" CNIC_MODULE_RELDATE
")\n";
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION
);
62 static LIST_HEAD(cnic_dev_list
);
63 static LIST_HEAD(cnic_udev_list
);
64 static DEFINE_RWLOCK(cnic_dev_lock
);
65 static DEFINE_MUTEX(cnic_lock
);
67 static struct cnic_ulp_ops
*cnic_ulp_tbl
[MAX_CNIC_ULP_TYPE
];
69 static int cnic_service_bnx2(void *, void *);
70 static int cnic_service_bnx2x(void *, void *);
71 static int cnic_ctl(void *, struct cnic_ctl_info
*);
73 static struct cnic_ops cnic_bnx2_ops
= {
74 .cnic_owner
= THIS_MODULE
,
75 .cnic_handler
= cnic_service_bnx2
,
79 static struct cnic_ops cnic_bnx2x_ops
= {
80 .cnic_owner
= THIS_MODULE
,
81 .cnic_handler
= cnic_service_bnx2x
,
85 static struct workqueue_struct
*cnic_wq
;
87 static void cnic_shutdown_rings(struct cnic_dev
*);
88 static void cnic_init_rings(struct cnic_dev
*);
89 static int cnic_cm_set_pg(struct cnic_sock
*);
91 static int cnic_uio_open(struct uio_info
*uinfo
, struct inode
*inode
)
93 struct cnic_uio_dev
*udev
= uinfo
->priv
;
96 if (!capable(CAP_NET_ADMIN
))
99 if (udev
->uio_dev
!= -1)
105 if (!dev
|| !test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
110 udev
->uio_dev
= iminor(inode
);
112 cnic_shutdown_rings(dev
);
113 cnic_init_rings(dev
);
119 static int cnic_uio_close(struct uio_info
*uinfo
, struct inode
*inode
)
121 struct cnic_uio_dev
*udev
= uinfo
->priv
;
127 static inline void cnic_hold(struct cnic_dev
*dev
)
129 atomic_inc(&dev
->ref_count
);
132 static inline void cnic_put(struct cnic_dev
*dev
)
134 atomic_dec(&dev
->ref_count
);
137 static inline void csk_hold(struct cnic_sock
*csk
)
139 atomic_inc(&csk
->ref_count
);
142 static inline void csk_put(struct cnic_sock
*csk
)
144 atomic_dec(&csk
->ref_count
);
147 static struct cnic_dev
*cnic_from_netdev(struct net_device
*netdev
)
149 struct cnic_dev
*cdev
;
151 read_lock(&cnic_dev_lock
);
152 list_for_each_entry(cdev
, &cnic_dev_list
, list
) {
153 if (netdev
== cdev
->netdev
) {
155 read_unlock(&cnic_dev_lock
);
159 read_unlock(&cnic_dev_lock
);
163 static inline void ulp_get(struct cnic_ulp_ops
*ulp_ops
)
165 atomic_inc(&ulp_ops
->ref_count
);
168 static inline void ulp_put(struct cnic_ulp_ops
*ulp_ops
)
170 atomic_dec(&ulp_ops
->ref_count
);
173 static void cnic_ctx_wr(struct cnic_dev
*dev
, u32 cid_addr
, u32 off
, u32 val
)
175 struct cnic_local
*cp
= dev
->cnic_priv
;
176 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
177 struct drv_ctl_info info
;
178 struct drv_ctl_io
*io
= &info
.data
.io
;
180 info
.cmd
= DRV_CTL_CTX_WR_CMD
;
181 io
->cid_addr
= cid_addr
;
184 ethdev
->drv_ctl(dev
->netdev
, &info
);
187 static void cnic_ctx_tbl_wr(struct cnic_dev
*dev
, u32 off
, dma_addr_t addr
)
189 struct cnic_local
*cp
= dev
->cnic_priv
;
190 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
191 struct drv_ctl_info info
;
192 struct drv_ctl_io
*io
= &info
.data
.io
;
194 info
.cmd
= DRV_CTL_CTXTBL_WR_CMD
;
197 ethdev
->drv_ctl(dev
->netdev
, &info
);
200 static void cnic_ring_ctl(struct cnic_dev
*dev
, u32 cid
, u32 cl_id
, int start
)
202 struct cnic_local
*cp
= dev
->cnic_priv
;
203 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
204 struct drv_ctl_info info
;
205 struct drv_ctl_l2_ring
*ring
= &info
.data
.ring
;
208 info
.cmd
= DRV_CTL_START_L2_CMD
;
210 info
.cmd
= DRV_CTL_STOP_L2_CMD
;
213 ring
->client_id
= cl_id
;
214 ethdev
->drv_ctl(dev
->netdev
, &info
);
217 static void cnic_reg_wr_ind(struct cnic_dev
*dev
, u32 off
, u32 val
)
219 struct cnic_local
*cp
= dev
->cnic_priv
;
220 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
221 struct drv_ctl_info info
;
222 struct drv_ctl_io
*io
= &info
.data
.io
;
224 info
.cmd
= DRV_CTL_IO_WR_CMD
;
227 ethdev
->drv_ctl(dev
->netdev
, &info
);
230 static u32
cnic_reg_rd_ind(struct cnic_dev
*dev
, u32 off
)
232 struct cnic_local
*cp
= dev
->cnic_priv
;
233 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
234 struct drv_ctl_info info
;
235 struct drv_ctl_io
*io
= &info
.data
.io
;
237 info
.cmd
= DRV_CTL_IO_RD_CMD
;
239 ethdev
->drv_ctl(dev
->netdev
, &info
);
243 static int cnic_in_use(struct cnic_sock
*csk
)
245 return test_bit(SK_F_INUSE
, &csk
->flags
);
248 static void cnic_spq_completion(struct cnic_dev
*dev
, int cmd
, u32 count
)
250 struct cnic_local
*cp
= dev
->cnic_priv
;
251 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
252 struct drv_ctl_info info
;
255 info
.data
.credit
.credit_count
= count
;
256 ethdev
->drv_ctl(dev
->netdev
, &info
);
259 static int cnic_get_l5_cid(struct cnic_local
*cp
, u32 cid
, u32
*l5_cid
)
263 for (i
= 0; i
< cp
->max_cid_space
; i
++) {
264 if (cp
->ctx_tbl
[i
].cid
== cid
) {
272 static int cnic_send_nlmsg(struct cnic_local
*cp
, u32 type
,
273 struct cnic_sock
*csk
)
275 struct iscsi_path path_req
;
278 u32 msg_type
= ISCSI_KEVENT_IF_DOWN
;
279 struct cnic_ulp_ops
*ulp_ops
;
280 struct cnic_uio_dev
*udev
= cp
->udev
;
282 if (!udev
|| udev
->uio_dev
== -1)
286 len
= sizeof(path_req
);
287 buf
= (char *) &path_req
;
288 memset(&path_req
, 0, len
);
290 msg_type
= ISCSI_KEVENT_PATH_REQ
;
291 path_req
.handle
= (u64
) csk
->l5_cid
;
292 if (test_bit(SK_F_IPV6
, &csk
->flags
)) {
293 memcpy(&path_req
.dst
.v6_addr
, &csk
->dst_ip
[0],
294 sizeof(struct in6_addr
));
295 path_req
.ip_addr_len
= 16;
297 memcpy(&path_req
.dst
.v4_addr
, &csk
->dst_ip
[0],
298 sizeof(struct in_addr
));
299 path_req
.ip_addr_len
= 4;
301 path_req
.vlan_id
= csk
->vlan_id
;
302 path_req
.pmtu
= csk
->mtu
;
306 ulp_ops
= rcu_dereference(cnic_ulp_tbl
[CNIC_ULP_ISCSI
]);
308 ulp_ops
->iscsi_nl_send_msg(cp
->dev
, msg_type
, buf
, len
);
313 static int cnic_iscsi_nl_msg_recv(struct cnic_dev
*dev
, u32 msg_type
,
319 case ISCSI_UEVENT_PATH_UPDATE
: {
320 struct cnic_local
*cp
;
322 struct cnic_sock
*csk
;
323 struct iscsi_path
*path_resp
;
325 if (len
< sizeof(*path_resp
))
328 path_resp
= (struct iscsi_path
*) buf
;
330 l5_cid
= (u32
) path_resp
->handle
;
331 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
335 if (!rcu_dereference(cp
->ulp_ops
[CNIC_ULP_L4
])) {
340 csk
= &cp
->csk_tbl
[l5_cid
];
342 if (cnic_in_use(csk
)) {
343 memcpy(csk
->ha
, path_resp
->mac_addr
, 6);
344 if (test_bit(SK_F_IPV6
, &csk
->flags
))
345 memcpy(&csk
->src_ip
[0], &path_resp
->src
.v6_addr
,
346 sizeof(struct in6_addr
));
348 memcpy(&csk
->src_ip
[0], &path_resp
->src
.v4_addr
,
349 sizeof(struct in_addr
));
350 if (is_valid_ether_addr(csk
->ha
))
362 static int cnic_offld_prep(struct cnic_sock
*csk
)
364 if (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
367 if (!test_bit(SK_F_CONNECT_START
, &csk
->flags
)) {
368 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
375 static int cnic_close_prep(struct cnic_sock
*csk
)
377 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
378 smp_mb__after_clear_bit();
380 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
381 while (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
389 static int cnic_abort_prep(struct cnic_sock
*csk
)
391 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
392 smp_mb__after_clear_bit();
394 while (test_and_set_bit(SK_F_OFFLD_SCHED
, &csk
->flags
))
397 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
398 csk
->state
= L4_KCQE_OPCODE_VALUE_RESET_COMP
;
405 static void cnic_uio_stop(void)
407 struct cnic_dev
*dev
;
409 read_lock(&cnic_dev_lock
);
410 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
411 struct cnic_local
*cp
= dev
->cnic_priv
;
413 cnic_send_nlmsg(cp
, ISCSI_KEVENT_IF_DOWN
, NULL
);
415 read_unlock(&cnic_dev_lock
);
418 int cnic_register_driver(int ulp_type
, struct cnic_ulp_ops
*ulp_ops
)
420 struct cnic_dev
*dev
;
422 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
423 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
426 mutex_lock(&cnic_lock
);
427 if (cnic_ulp_tbl
[ulp_type
]) {
428 pr_err("%s: Type %d has already been registered\n",
430 mutex_unlock(&cnic_lock
);
434 read_lock(&cnic_dev_lock
);
435 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
436 struct cnic_local
*cp
= dev
->cnic_priv
;
438 clear_bit(ULP_F_INIT
, &cp
->ulp_flags
[ulp_type
]);
440 read_unlock(&cnic_dev_lock
);
442 atomic_set(&ulp_ops
->ref_count
, 0);
443 rcu_assign_pointer(cnic_ulp_tbl
[ulp_type
], ulp_ops
);
444 mutex_unlock(&cnic_lock
);
446 /* Prevent race conditions with netdev_event */
448 read_lock(&cnic_dev_lock
);
449 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
450 struct cnic_local
*cp
= dev
->cnic_priv
;
452 if (!test_and_set_bit(ULP_F_INIT
, &cp
->ulp_flags
[ulp_type
]))
453 ulp_ops
->cnic_init(dev
);
455 read_unlock(&cnic_dev_lock
);
461 int cnic_unregister_driver(int ulp_type
)
463 struct cnic_dev
*dev
;
464 struct cnic_ulp_ops
*ulp_ops
;
467 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
468 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
471 mutex_lock(&cnic_lock
);
472 ulp_ops
= cnic_ulp_tbl
[ulp_type
];
474 pr_err("%s: Type %d has not been registered\n",
478 read_lock(&cnic_dev_lock
);
479 list_for_each_entry(dev
, &cnic_dev_list
, list
) {
480 struct cnic_local
*cp
= dev
->cnic_priv
;
482 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
483 pr_err("%s: Type %d still has devices registered\n",
485 read_unlock(&cnic_dev_lock
);
489 read_unlock(&cnic_dev_lock
);
491 if (ulp_type
== CNIC_ULP_ISCSI
)
494 rcu_assign_pointer(cnic_ulp_tbl
[ulp_type
], NULL
);
496 mutex_unlock(&cnic_lock
);
498 while ((atomic_read(&ulp_ops
->ref_count
) != 0) && (i
< 20)) {
503 if (atomic_read(&ulp_ops
->ref_count
) != 0)
504 netdev_warn(dev
->netdev
, "Failed waiting for ref count to go to zero\n");
508 mutex_unlock(&cnic_lock
);
512 static int cnic_start_hw(struct cnic_dev
*);
513 static void cnic_stop_hw(struct cnic_dev
*);
515 static int cnic_register_device(struct cnic_dev
*dev
, int ulp_type
,
518 struct cnic_local
*cp
= dev
->cnic_priv
;
519 struct cnic_ulp_ops
*ulp_ops
;
521 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
522 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
525 mutex_lock(&cnic_lock
);
526 if (cnic_ulp_tbl
[ulp_type
] == NULL
) {
527 pr_err("%s: Driver with type %d has not been registered\n",
529 mutex_unlock(&cnic_lock
);
532 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
533 pr_err("%s: Type %d has already been registered to this device\n",
535 mutex_unlock(&cnic_lock
);
539 clear_bit(ULP_F_START
, &cp
->ulp_flags
[ulp_type
]);
540 cp
->ulp_handle
[ulp_type
] = ulp_ctx
;
541 ulp_ops
= cnic_ulp_tbl
[ulp_type
];
542 rcu_assign_pointer(cp
->ulp_ops
[ulp_type
], ulp_ops
);
545 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
546 if (!test_and_set_bit(ULP_F_START
, &cp
->ulp_flags
[ulp_type
]))
547 ulp_ops
->cnic_start(cp
->ulp_handle
[ulp_type
]);
549 mutex_unlock(&cnic_lock
);
554 EXPORT_SYMBOL(cnic_register_driver
);
556 static int cnic_unregister_device(struct cnic_dev
*dev
, int ulp_type
)
558 struct cnic_local
*cp
= dev
->cnic_priv
;
561 if (ulp_type
< 0 || ulp_type
>= MAX_CNIC_ULP_TYPE
) {
562 pr_err("%s: Bad type %d\n", __func__
, ulp_type
);
565 mutex_lock(&cnic_lock
);
566 if (rcu_dereference(cp
->ulp_ops
[ulp_type
])) {
567 rcu_assign_pointer(cp
->ulp_ops
[ulp_type
], NULL
);
570 pr_err("%s: device not registered to this ulp type %d\n",
572 mutex_unlock(&cnic_lock
);
575 mutex_unlock(&cnic_lock
);
579 while (test_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[ulp_type
]) &&
584 if (test_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[ulp_type
]))
585 netdev_warn(dev
->netdev
, "Failed waiting for ULP up call to complete\n");
589 EXPORT_SYMBOL(cnic_unregister_driver
);
591 static int cnic_init_id_tbl(struct cnic_id_tbl
*id_tbl
, u32 size
, u32 start_id
)
593 id_tbl
->start
= start_id
;
596 spin_lock_init(&id_tbl
->lock
);
597 id_tbl
->table
= kzalloc(DIV_ROUND_UP(size
, 32) * 4, GFP_KERNEL
);
604 static void cnic_free_id_tbl(struct cnic_id_tbl
*id_tbl
)
606 kfree(id_tbl
->table
);
607 id_tbl
->table
= NULL
;
610 static int cnic_alloc_id(struct cnic_id_tbl
*id_tbl
, u32 id
)
615 if (id
>= id_tbl
->max
)
618 spin_lock(&id_tbl
->lock
);
619 if (!test_bit(id
, id_tbl
->table
)) {
620 set_bit(id
, id_tbl
->table
);
623 spin_unlock(&id_tbl
->lock
);
627 /* Returns -1 if not successful */
628 static u32
cnic_alloc_new_id(struct cnic_id_tbl
*id_tbl
)
632 spin_lock(&id_tbl
->lock
);
633 id
= find_next_zero_bit(id_tbl
->table
, id_tbl
->max
, id_tbl
->next
);
634 if (id
>= id_tbl
->max
) {
636 if (id_tbl
->next
!= 0) {
637 id
= find_first_zero_bit(id_tbl
->table
, id_tbl
->next
);
638 if (id
>= id_tbl
->next
)
643 if (id
< id_tbl
->max
) {
644 set_bit(id
, id_tbl
->table
);
645 id_tbl
->next
= (id
+ 1) & (id_tbl
->max
- 1);
649 spin_unlock(&id_tbl
->lock
);
654 static void cnic_free_id(struct cnic_id_tbl
*id_tbl
, u32 id
)
660 if (id
>= id_tbl
->max
)
663 clear_bit(id
, id_tbl
->table
);
666 static void cnic_free_dma(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
673 for (i
= 0; i
< dma
->num_pages
; i
++) {
674 if (dma
->pg_arr
[i
]) {
675 dma_free_coherent(&dev
->pcidev
->dev
, BCM_PAGE_SIZE
,
676 dma
->pg_arr
[i
], dma
->pg_map_arr
[i
]);
677 dma
->pg_arr
[i
] = NULL
;
681 dma_free_coherent(&dev
->pcidev
->dev
, dma
->pgtbl_size
,
682 dma
->pgtbl
, dma
->pgtbl_map
);
690 static void cnic_setup_page_tbl(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
693 u32
*page_table
= dma
->pgtbl
;
695 for (i
= 0; i
< dma
->num_pages
; i
++) {
696 /* Each entry needs to be in big endian format. */
697 *page_table
= (u32
) ((u64
) dma
->pg_map_arr
[i
] >> 32);
699 *page_table
= (u32
) dma
->pg_map_arr
[i
];
704 static void cnic_setup_page_tbl_le(struct cnic_dev
*dev
, struct cnic_dma
*dma
)
707 u32
*page_table
= dma
->pgtbl
;
709 for (i
= 0; i
< dma
->num_pages
; i
++) {
710 /* Each entry needs to be in little endian format. */
711 *page_table
= dma
->pg_map_arr
[i
] & 0xffffffff;
713 *page_table
= (u32
) ((u64
) dma
->pg_map_arr
[i
] >> 32);
718 static int cnic_alloc_dma(struct cnic_dev
*dev
, struct cnic_dma
*dma
,
719 int pages
, int use_pg_tbl
)
722 struct cnic_local
*cp
= dev
->cnic_priv
;
724 size
= pages
* (sizeof(void *) + sizeof(dma_addr_t
));
725 dma
->pg_arr
= kzalloc(size
, GFP_ATOMIC
);
726 if (dma
->pg_arr
== NULL
)
729 dma
->pg_map_arr
= (dma_addr_t
*) (dma
->pg_arr
+ pages
);
730 dma
->num_pages
= pages
;
732 for (i
= 0; i
< pages
; i
++) {
733 dma
->pg_arr
[i
] = dma_alloc_coherent(&dev
->pcidev
->dev
,
737 if (dma
->pg_arr
[i
] == NULL
)
743 dma
->pgtbl_size
= ((pages
* 8) + BCM_PAGE_SIZE
- 1) &
744 ~(BCM_PAGE_SIZE
- 1);
745 dma
->pgtbl
= dma_alloc_coherent(&dev
->pcidev
->dev
, dma
->pgtbl_size
,
746 &dma
->pgtbl_map
, GFP_ATOMIC
);
747 if (dma
->pgtbl
== NULL
)
750 cp
->setup_pgtbl(dev
, dma
);
755 cnic_free_dma(dev
, dma
);
759 static void cnic_free_context(struct cnic_dev
*dev
)
761 struct cnic_local
*cp
= dev
->cnic_priv
;
764 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
765 if (cp
->ctx_arr
[i
].ctx
) {
766 dma_free_coherent(&dev
->pcidev
->dev
, cp
->ctx_blk_size
,
768 cp
->ctx_arr
[i
].mapping
);
769 cp
->ctx_arr
[i
].ctx
= NULL
;
774 static void __cnic_free_uio(struct cnic_uio_dev
*udev
)
776 uio_unregister_device(&udev
->cnic_uinfo
);
779 dma_free_coherent(&udev
->pdev
->dev
, udev
->l2_buf_size
,
780 udev
->l2_buf
, udev
->l2_buf_map
);
785 dma_free_coherent(&udev
->pdev
->dev
, udev
->l2_ring_size
,
786 udev
->l2_ring
, udev
->l2_ring_map
);
787 udev
->l2_ring
= NULL
;
790 pci_dev_put(udev
->pdev
);
794 static void cnic_free_uio(struct cnic_uio_dev
*udev
)
799 write_lock(&cnic_dev_lock
);
800 list_del_init(&udev
->list
);
801 write_unlock(&cnic_dev_lock
);
802 __cnic_free_uio(udev
);
805 static void cnic_free_resc(struct cnic_dev
*dev
)
807 struct cnic_local
*cp
= dev
->cnic_priv
;
808 struct cnic_uio_dev
*udev
= cp
->udev
;
815 cnic_free_context(dev
);
820 cnic_free_dma(dev
, &cp
->gbl_buf_info
);
821 cnic_free_dma(dev
, &cp
->conn_buf_info
);
822 cnic_free_dma(dev
, &cp
->kwq_info
);
823 cnic_free_dma(dev
, &cp
->kwq_16_data_info
);
824 cnic_free_dma(dev
, &cp
->kcq1
.dma
);
825 kfree(cp
->iscsi_tbl
);
826 cp
->iscsi_tbl
= NULL
;
830 cnic_free_id_tbl(&cp
->cid_tbl
);
833 static int cnic_alloc_context(struct cnic_dev
*dev
)
835 struct cnic_local
*cp
= dev
->cnic_priv
;
837 if (CHIP_NUM(cp
) == CHIP_NUM_5709
) {
840 cp
->ctx_blk_size
= BCM_PAGE_SIZE
;
841 cp
->cids_per_blk
= BCM_PAGE_SIZE
/ 128;
842 arr_size
= BNX2_MAX_CID
/ cp
->cids_per_blk
*
843 sizeof(struct cnic_ctx
);
844 cp
->ctx_arr
= kzalloc(arr_size
, GFP_KERNEL
);
845 if (cp
->ctx_arr
== NULL
)
849 for (i
= 0; i
< 2; i
++) {
850 u32 j
, reg
, off
, lo
, hi
;
853 off
= BNX2_PG_CTX_MAP
;
855 off
= BNX2_ISCSI_CTX_MAP
;
857 reg
= cnic_reg_rd_ind(dev
, off
);
860 for (j
= lo
; j
< hi
; j
+= cp
->cids_per_blk
, k
++)
861 cp
->ctx_arr
[k
].cid
= j
;
865 if (cp
->ctx_blks
>= (BNX2_MAX_CID
/ cp
->cids_per_blk
)) {
870 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
872 dma_alloc_coherent(&dev
->pcidev
->dev
,
874 &cp
->ctx_arr
[i
].mapping
,
876 if (cp
->ctx_arr
[i
].ctx
== NULL
)
883 static int cnic_alloc_kcq(struct cnic_dev
*dev
, struct kcq_info
*info
)
885 int err
, i
, is_bnx2
= 0;
888 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
))
891 err
= cnic_alloc_dma(dev
, &info
->dma
, KCQ_PAGE_CNT
, is_bnx2
);
895 kcq
= (struct kcqe
**) info
->dma
.pg_arr
;
901 for (i
= 0; i
< KCQ_PAGE_CNT
; i
++) {
902 struct bnx2x_bd_chain_next
*next
=
903 (struct bnx2x_bd_chain_next
*) &kcq
[i
][MAX_KCQE_CNT
];
906 if (j
>= KCQ_PAGE_CNT
)
908 next
->addr_hi
= (u64
) info
->dma
.pg_map_arr
[j
] >> 32;
909 next
->addr_lo
= info
->dma
.pg_map_arr
[j
] & 0xffffffff;
914 static int cnic_alloc_uio_rings(struct cnic_dev
*dev
, int pages
)
916 struct cnic_local
*cp
= dev
->cnic_priv
;
917 struct cnic_uio_dev
*udev
;
919 read_lock(&cnic_dev_lock
);
920 list_for_each_entry(udev
, &cnic_udev_list
, list
) {
921 if (udev
->pdev
== dev
->pcidev
) {
924 read_unlock(&cnic_dev_lock
);
928 read_unlock(&cnic_dev_lock
);
930 udev
= kzalloc(sizeof(struct cnic_uio_dev
), GFP_ATOMIC
);
937 udev
->pdev
= dev
->pcidev
;
938 udev
->l2_ring_size
= pages
* BCM_PAGE_SIZE
;
939 udev
->l2_ring
= dma_alloc_coherent(&udev
->pdev
->dev
, udev
->l2_ring_size
,
941 GFP_KERNEL
| __GFP_COMP
);
945 udev
->l2_buf_size
= (cp
->l2_rx_ring_size
+ 1) * cp
->l2_single_buf_size
;
946 udev
->l2_buf_size
= PAGE_ALIGN(udev
->l2_buf_size
);
947 udev
->l2_buf
= dma_alloc_coherent(&udev
->pdev
->dev
, udev
->l2_buf_size
,
949 GFP_KERNEL
| __GFP_COMP
);
953 write_lock(&cnic_dev_lock
);
954 list_add(&udev
->list
, &cnic_udev_list
);
955 write_unlock(&cnic_dev_lock
);
957 pci_dev_get(udev
->pdev
);
963 dma_free_coherent(&udev
->pdev
->dev
, udev
->l2_ring_size
,
964 udev
->l2_ring
, udev
->l2_ring_map
);
970 static int cnic_init_uio(struct cnic_dev
*dev
)
972 struct cnic_local
*cp
= dev
->cnic_priv
;
973 struct cnic_uio_dev
*udev
= cp
->udev
;
974 struct uio_info
*uinfo
;
980 uinfo
= &udev
->cnic_uinfo
;
982 uinfo
->mem
[0].addr
= dev
->netdev
->base_addr
;
983 uinfo
->mem
[0].internal_addr
= dev
->regview
;
984 uinfo
->mem
[0].size
= dev
->netdev
->mem_end
- dev
->netdev
->mem_start
;
985 uinfo
->mem
[0].memtype
= UIO_MEM_PHYS
;
987 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
988 uinfo
->mem
[1].addr
= (unsigned long) cp
->status_blk
.gen
&
990 if (cp
->ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
)
991 uinfo
->mem
[1].size
= BNX2_SBLK_MSIX_ALIGN_SIZE
* 9;
993 uinfo
->mem
[1].size
= BNX2_SBLK_MSIX_ALIGN_SIZE
;
995 uinfo
->name
= "bnx2_cnic";
996 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
997 uinfo
->mem
[1].addr
= (unsigned long) cp
->bnx2x_def_status_blk
&
999 uinfo
->mem
[1].size
= sizeof(*cp
->bnx2x_def_status_blk
);
1001 uinfo
->name
= "bnx2x_cnic";
1004 uinfo
->mem
[1].memtype
= UIO_MEM_LOGICAL
;
1006 uinfo
->mem
[2].addr
= (unsigned long) udev
->l2_ring
;
1007 uinfo
->mem
[2].size
= udev
->l2_ring_size
;
1008 uinfo
->mem
[2].memtype
= UIO_MEM_LOGICAL
;
1010 uinfo
->mem
[3].addr
= (unsigned long) udev
->l2_buf
;
1011 uinfo
->mem
[3].size
= udev
->l2_buf_size
;
1012 uinfo
->mem
[3].memtype
= UIO_MEM_LOGICAL
;
1014 uinfo
->version
= CNIC_MODULE_VERSION
;
1015 uinfo
->irq
= UIO_IRQ_CUSTOM
;
1017 uinfo
->open
= cnic_uio_open
;
1018 uinfo
->release
= cnic_uio_close
;
1020 if (udev
->uio_dev
== -1) {
1024 ret
= uio_register_device(&udev
->pdev
->dev
, uinfo
);
1027 cnic_init_rings(dev
);
1033 static int cnic_alloc_bnx2_resc(struct cnic_dev
*dev
)
1035 struct cnic_local
*cp
= dev
->cnic_priv
;
1038 ret
= cnic_alloc_dma(dev
, &cp
->kwq_info
, KWQ_PAGE_CNT
, 1);
1041 cp
->kwq
= (struct kwqe
**) cp
->kwq_info
.pg_arr
;
1043 ret
= cnic_alloc_kcq(dev
, &cp
->kcq1
);
1047 ret
= cnic_alloc_context(dev
);
1051 ret
= cnic_alloc_uio_rings(dev
, 2);
1055 ret
= cnic_init_uio(dev
);
1062 cnic_free_resc(dev
);
1066 static int cnic_alloc_bnx2x_context(struct cnic_dev
*dev
)
1068 struct cnic_local
*cp
= dev
->cnic_priv
;
1069 int ctx_blk_size
= cp
->ethdev
->ctx_blk_size
;
1070 int total_mem
, blks
, i
;
1072 total_mem
= BNX2X_CONTEXT_MEM_SIZE
* cp
->max_cid_space
;
1073 blks
= total_mem
/ ctx_blk_size
;
1074 if (total_mem
% ctx_blk_size
)
1077 if (blks
> cp
->ethdev
->ctx_tbl_len
)
1080 cp
->ctx_arr
= kcalloc(blks
, sizeof(struct cnic_ctx
), GFP_KERNEL
);
1081 if (cp
->ctx_arr
== NULL
)
1084 cp
->ctx_blks
= blks
;
1085 cp
->ctx_blk_size
= ctx_blk_size
;
1086 if (!BNX2X_CHIP_IS_57710(cp
->chip_id
))
1089 cp
->ctx_align
= ctx_blk_size
;
1091 cp
->cids_per_blk
= ctx_blk_size
/ BNX2X_CONTEXT_MEM_SIZE
;
1093 for (i
= 0; i
< blks
; i
++) {
1094 cp
->ctx_arr
[i
].ctx
=
1095 dma_alloc_coherent(&dev
->pcidev
->dev
, cp
->ctx_blk_size
,
1096 &cp
->ctx_arr
[i
].mapping
,
1098 if (cp
->ctx_arr
[i
].ctx
== NULL
)
1101 if (cp
->ctx_align
&& cp
->ctx_blk_size
== ctx_blk_size
) {
1102 if (cp
->ctx_arr
[i
].mapping
& (cp
->ctx_align
- 1)) {
1103 cnic_free_context(dev
);
1104 cp
->ctx_blk_size
+= cp
->ctx_align
;
1113 static int cnic_alloc_bnx2x_resc(struct cnic_dev
*dev
)
1115 struct cnic_local
*cp
= dev
->cnic_priv
;
1116 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
1117 u32 start_cid
= ethdev
->starting_cid
;
1118 int i
, j
, n
, ret
, pages
;
1119 struct cnic_dma
*kwq_16_dma
= &cp
->kwq_16_data_info
;
1121 cp
->iro_arr
= ethdev
->iro_arr
;
1123 cp
->max_cid_space
= MAX_ISCSI_TBL_SZ
;
1124 cp
->iscsi_start_cid
= start_cid
;
1125 if (start_cid
< BNX2X_ISCSI_START_CID
) {
1126 u32 delta
= BNX2X_ISCSI_START_CID
- start_cid
;
1128 cp
->iscsi_start_cid
= BNX2X_ISCSI_START_CID
;
1129 cp
->max_cid_space
+= delta
;
1132 cp
->iscsi_tbl
= kzalloc(sizeof(struct cnic_iscsi
) * MAX_ISCSI_TBL_SZ
,
1137 cp
->ctx_tbl
= kzalloc(sizeof(struct cnic_context
) *
1138 cp
->max_cid_space
, GFP_KERNEL
);
1142 for (i
= 0; i
< MAX_ISCSI_TBL_SZ
; i
++) {
1143 cp
->ctx_tbl
[i
].proto
.iscsi
= &cp
->iscsi_tbl
[i
];
1144 cp
->ctx_tbl
[i
].ulp_proto_id
= CNIC_ULP_ISCSI
;
1147 pages
= PAGE_ALIGN(cp
->max_cid_space
* CNIC_KWQ16_DATA_SIZE
) /
1150 ret
= cnic_alloc_dma(dev
, kwq_16_dma
, pages
, 0);
1154 n
= PAGE_SIZE
/ CNIC_KWQ16_DATA_SIZE
;
1155 for (i
= 0, j
= 0; i
< cp
->max_cid_space
; i
++) {
1156 long off
= CNIC_KWQ16_DATA_SIZE
* (i
% n
);
1158 cp
->ctx_tbl
[i
].kwqe_data
= kwq_16_dma
->pg_arr
[j
] + off
;
1159 cp
->ctx_tbl
[i
].kwqe_data_mapping
= kwq_16_dma
->pg_map_arr
[j
] +
1162 if ((i
% n
) == (n
- 1))
1166 ret
= cnic_alloc_kcq(dev
, &cp
->kcq1
);
1170 pages
= PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS
*
1171 BNX2X_ISCSI_CONN_BUF_SIZE
) / PAGE_SIZE
;
1172 ret
= cnic_alloc_dma(dev
, &cp
->conn_buf_info
, pages
, 1);
1176 pages
= PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE
) / PAGE_SIZE
;
1177 ret
= cnic_alloc_dma(dev
, &cp
->gbl_buf_info
, pages
, 0);
1181 ret
= cnic_alloc_bnx2x_context(dev
);
1185 cp
->bnx2x_def_status_blk
= cp
->ethdev
->irq_arr
[1].status_blk
;
1187 cp
->l2_rx_ring_size
= 15;
1189 ret
= cnic_alloc_uio_rings(dev
, 4);
1193 ret
= cnic_init_uio(dev
);
1200 cnic_free_resc(dev
);
1204 static inline u32
cnic_kwq_avail(struct cnic_local
*cp
)
1206 return cp
->max_kwq_idx
-
1207 ((cp
->kwq_prod_idx
- cp
->kwq_con_idx
) & cp
->max_kwq_idx
);
1210 static int cnic_submit_bnx2_kwqes(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1213 struct cnic_local
*cp
= dev
->cnic_priv
;
1214 struct kwqe
*prod_qe
;
1215 u16 prod
, sw_prod
, i
;
1217 if (!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
1218 return -EAGAIN
; /* bnx2 is down */
1220 spin_lock_bh(&cp
->cnic_ulp_lock
);
1221 if (num_wqes
> cnic_kwq_avail(cp
) &&
1222 !test_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
)) {
1223 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1227 clear_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
);
1229 prod
= cp
->kwq_prod_idx
;
1230 sw_prod
= prod
& MAX_KWQ_IDX
;
1231 for (i
= 0; i
< num_wqes
; i
++) {
1232 prod_qe
= &cp
->kwq
[KWQ_PG(sw_prod
)][KWQ_IDX(sw_prod
)];
1233 memcpy(prod_qe
, wqes
[i
], sizeof(struct kwqe
));
1235 sw_prod
= prod
& MAX_KWQ_IDX
;
1237 cp
->kwq_prod_idx
= prod
;
1239 CNIC_WR16(dev
, cp
->kwq_io_addr
, cp
->kwq_prod_idx
);
1241 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1245 static void *cnic_get_kwqe_16_data(struct cnic_local
*cp
, u32 l5_cid
,
1246 union l5cm_specific_data
*l5_data
)
1248 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1251 map
= ctx
->kwqe_data_mapping
;
1252 l5_data
->phy_address
.lo
= (u64
) map
& 0xffffffff;
1253 l5_data
->phy_address
.hi
= (u64
) map
>> 32;
1254 return ctx
->kwqe_data
;
1257 static int cnic_submit_kwqe_16(struct cnic_dev
*dev
, u32 cmd
, u32 cid
,
1258 u32 type
, union l5cm_specific_data
*l5_data
)
1260 struct cnic_local
*cp
= dev
->cnic_priv
;
1261 struct l5cm_spe kwqe
;
1262 struct kwqe_16
*kwq
[1];
1265 kwqe
.hdr
.conn_and_cmd_data
=
1266 cpu_to_le32(((cmd
<< SPE_HDR_CMD_ID_SHIFT
) |
1267 BNX2X_HW_CID(cp
, cid
)));
1268 kwqe
.hdr
.type
= cpu_to_le16(type
);
1269 kwqe
.hdr
.reserved1
= 0;
1270 kwqe
.data
.phy_address
.lo
= cpu_to_le32(l5_data
->phy_address
.lo
);
1271 kwqe
.data
.phy_address
.hi
= cpu_to_le32(l5_data
->phy_address
.hi
);
1273 kwq
[0] = (struct kwqe_16
*) &kwqe
;
1275 spin_lock_bh(&cp
->cnic_ulp_lock
);
1276 ret
= cp
->ethdev
->drv_submit_kwqes_16(dev
->netdev
, kwq
, 1);
1277 spin_unlock_bh(&cp
->cnic_ulp_lock
);
1285 static void cnic_reply_bnx2x_kcqes(struct cnic_dev
*dev
, int ulp_type
,
1286 struct kcqe
*cqes
[], u32 num_cqes
)
1288 struct cnic_local
*cp
= dev
->cnic_priv
;
1289 struct cnic_ulp_ops
*ulp_ops
;
1292 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
1293 if (likely(ulp_ops
)) {
1294 ulp_ops
->indicate_kcqes(cp
->ulp_handle
[ulp_type
],
1300 static int cnic_bnx2x_iscsi_init1(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1302 struct cnic_local
*cp
= dev
->cnic_priv
;
1303 struct iscsi_kwqe_init1
*req1
= (struct iscsi_kwqe_init1
*) kwqe
;
1305 u32 pfid
= cp
->pfid
;
1307 cp
->num_iscsi_tasks
= req1
->num_tasks_per_conn
;
1308 cp
->num_ccells
= req1
->num_ccells_per_conn
;
1309 cp
->task_array_size
= BNX2X_ISCSI_TASK_CONTEXT_SIZE
*
1310 cp
->num_iscsi_tasks
;
1311 cp
->r2tq_size
= cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
*
1312 BNX2X_ISCSI_R2TQE_SIZE
;
1313 cp
->hq_size
= cp
->num_ccells
* BNX2X_ISCSI_HQ_BD_SIZE
;
1314 pages
= PAGE_ALIGN(cp
->hq_size
) / PAGE_SIZE
;
1315 hq_bds
= pages
* (PAGE_SIZE
/ BNX2X_ISCSI_HQ_BD_SIZE
);
1316 cp
->num_cqs
= req1
->num_cqs
;
1318 if (!dev
->max_iscsi_conn
)
1321 /* init Tstorm RAM */
1322 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid
),
1324 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid
),
1326 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1327 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid
), PAGE_SHIFT
);
1328 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+
1329 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid
),
1330 req1
->num_tasks_per_conn
);
1332 /* init Ustorm RAM */
1333 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1334 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid
),
1335 req1
->rq_buffer_size
);
1336 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid
),
1338 CNIC_WR8(dev
, BAR_USTRORM_INTMEM
+
1339 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid
), PAGE_SHIFT
);
1340 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1341 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid
),
1342 req1
->num_tasks_per_conn
);
1343 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_RQ_SIZE_OFFSET(pfid
),
1345 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_CQ_SIZE_OFFSET(pfid
),
1347 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+ USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid
),
1348 cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
);
1350 /* init Xstorm RAM */
1351 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid
),
1353 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1354 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid
), PAGE_SHIFT
);
1355 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
1356 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid
),
1357 req1
->num_tasks_per_conn
);
1358 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid
),
1360 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid
),
1361 req1
->num_tasks_per_conn
);
1362 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+ XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid
),
1363 cp
->num_iscsi_tasks
* BNX2X_ISCSI_MAX_PENDING_R2TS
);
1365 /* init Cstorm RAM */
1366 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid
),
1368 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
1369 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid
), PAGE_SHIFT
);
1370 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
1371 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid
),
1372 req1
->num_tasks_per_conn
);
1373 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid
),
1375 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+ CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid
),
1381 static int cnic_bnx2x_iscsi_init2(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1383 struct iscsi_kwqe_init2
*req2
= (struct iscsi_kwqe_init2
*) kwqe
;
1384 struct cnic_local
*cp
= dev
->cnic_priv
;
1385 u32 pfid
= cp
->pfid
;
1386 struct iscsi_kcqe kcqe
;
1387 struct kcqe
*cqes
[1];
1389 memset(&kcqe
, 0, sizeof(kcqe
));
1390 if (!dev
->max_iscsi_conn
) {
1391 kcqe
.completion_status
=
1392 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED
;
1396 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
1397 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid
), req2
->error_bit_map
[0]);
1398 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
1399 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid
) + 4,
1400 req2
->error_bit_map
[1]);
1402 CNIC_WR16(dev
, BAR_USTRORM_INTMEM
+
1403 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid
), req2
->max_cq_sqn
);
1404 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
1405 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid
), req2
->error_bit_map
[0]);
1406 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
1407 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid
) + 4,
1408 req2
->error_bit_map
[1]);
1410 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
1411 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid
), req2
->max_cq_sqn
);
1413 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1416 kcqe
.op_code
= ISCSI_KCQE_OPCODE_INIT
;
1417 cqes
[0] = (struct kcqe
*) &kcqe
;
1418 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1423 static void cnic_free_bnx2x_conn_resc(struct cnic_dev
*dev
, u32 l5_cid
)
1425 struct cnic_local
*cp
= dev
->cnic_priv
;
1426 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1428 if (ctx
->ulp_proto_id
== CNIC_ULP_ISCSI
) {
1429 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1431 cnic_free_dma(dev
, &iscsi
->hq_info
);
1432 cnic_free_dma(dev
, &iscsi
->r2tq_info
);
1433 cnic_free_dma(dev
, &iscsi
->task_array_info
);
1435 cnic_free_id(&cp
->cid_tbl
, ctx
->cid
);
1439 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev
*dev
, u32 l5_cid
)
1443 struct cnic_local
*cp
= dev
->cnic_priv
;
1444 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1445 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1447 cid
= cnic_alloc_new_id(&cp
->cid_tbl
);
1454 pages
= PAGE_ALIGN(cp
->task_array_size
) / PAGE_SIZE
;
1456 ret
= cnic_alloc_dma(dev
, &iscsi
->task_array_info
, pages
, 1);
1460 pages
= PAGE_ALIGN(cp
->r2tq_size
) / PAGE_SIZE
;
1461 ret
= cnic_alloc_dma(dev
, &iscsi
->r2tq_info
, pages
, 1);
1465 pages
= PAGE_ALIGN(cp
->hq_size
) / PAGE_SIZE
;
1466 ret
= cnic_alloc_dma(dev
, &iscsi
->hq_info
, pages
, 1);
1473 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1477 static void *cnic_get_bnx2x_ctx(struct cnic_dev
*dev
, u32 cid
, int init
,
1478 struct regpair
*ctx_addr
)
1480 struct cnic_local
*cp
= dev
->cnic_priv
;
1481 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
1482 int blk
= (cid
- ethdev
->starting_cid
) / cp
->cids_per_blk
;
1483 int off
= (cid
- ethdev
->starting_cid
) % cp
->cids_per_blk
;
1484 unsigned long align_off
= 0;
1488 if (cp
->ctx_align
) {
1489 unsigned long mask
= cp
->ctx_align
- 1;
1491 if (cp
->ctx_arr
[blk
].mapping
& mask
)
1492 align_off
= cp
->ctx_align
-
1493 (cp
->ctx_arr
[blk
].mapping
& mask
);
1495 ctx_map
= cp
->ctx_arr
[blk
].mapping
+ align_off
+
1496 (off
* BNX2X_CONTEXT_MEM_SIZE
);
1497 ctx
= cp
->ctx_arr
[blk
].ctx
+ align_off
+
1498 (off
* BNX2X_CONTEXT_MEM_SIZE
);
1500 memset(ctx
, 0, BNX2X_CONTEXT_MEM_SIZE
);
1502 ctx_addr
->lo
= ctx_map
& 0xffffffff;
1503 ctx_addr
->hi
= (u64
) ctx_map
>> 32;
1507 static int cnic_setup_bnx2x_ctx(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1510 struct cnic_local
*cp
= dev
->cnic_priv
;
1511 struct iscsi_kwqe_conn_offload1
*req1
=
1512 (struct iscsi_kwqe_conn_offload1
*) wqes
[0];
1513 struct iscsi_kwqe_conn_offload2
*req2
=
1514 (struct iscsi_kwqe_conn_offload2
*) wqes
[1];
1515 struct iscsi_kwqe_conn_offload3
*req3
;
1516 struct cnic_context
*ctx
= &cp
->ctx_tbl
[req1
->iscsi_conn_id
];
1517 struct cnic_iscsi
*iscsi
= ctx
->proto
.iscsi
;
1519 u32 hw_cid
= BNX2X_HW_CID(cp
, cid
);
1520 struct iscsi_context
*ictx
;
1521 struct regpair context_addr
;
1522 int i
, j
, n
= 2, n_max
;
1525 if (!req2
->num_additional_wqes
)
1528 n_max
= req2
->num_additional_wqes
+ 2;
1530 ictx
= cnic_get_bnx2x_ctx(dev
, cid
, 1, &context_addr
);
1534 req3
= (struct iscsi_kwqe_conn_offload3
*) wqes
[n
++];
1536 ictx
->xstorm_ag_context
.hq_prod
= 1;
1538 ictx
->xstorm_st_context
.iscsi
.first_burst_length
=
1539 ISCSI_DEF_FIRST_BURST_LEN
;
1540 ictx
->xstorm_st_context
.iscsi
.max_send_pdu_length
=
1541 ISCSI_DEF_MAX_RECV_SEG_LEN
;
1542 ictx
->xstorm_st_context
.iscsi
.sq_pbl_base
.lo
=
1543 req1
->sq_page_table_addr_lo
;
1544 ictx
->xstorm_st_context
.iscsi
.sq_pbl_base
.hi
=
1545 req1
->sq_page_table_addr_hi
;
1546 ictx
->xstorm_st_context
.iscsi
.sq_curr_pbe
.lo
= req2
->sq_first_pte
.hi
;
1547 ictx
->xstorm_st_context
.iscsi
.sq_curr_pbe
.hi
= req2
->sq_first_pte
.lo
;
1548 ictx
->xstorm_st_context
.iscsi
.hq_pbl_base
.lo
=
1549 iscsi
->hq_info
.pgtbl_map
& 0xffffffff;
1550 ictx
->xstorm_st_context
.iscsi
.hq_pbl_base
.hi
=
1551 (u64
) iscsi
->hq_info
.pgtbl_map
>> 32;
1552 ictx
->xstorm_st_context
.iscsi
.hq_curr_pbe_base
.lo
=
1553 iscsi
->hq_info
.pgtbl
[0];
1554 ictx
->xstorm_st_context
.iscsi
.hq_curr_pbe_base
.hi
=
1555 iscsi
->hq_info
.pgtbl
[1];
1556 ictx
->xstorm_st_context
.iscsi
.r2tq_pbl_base
.lo
=
1557 iscsi
->r2tq_info
.pgtbl_map
& 0xffffffff;
1558 ictx
->xstorm_st_context
.iscsi
.r2tq_pbl_base
.hi
=
1559 (u64
) iscsi
->r2tq_info
.pgtbl_map
>> 32;
1560 ictx
->xstorm_st_context
.iscsi
.r2tq_curr_pbe_base
.lo
=
1561 iscsi
->r2tq_info
.pgtbl
[0];
1562 ictx
->xstorm_st_context
.iscsi
.r2tq_curr_pbe_base
.hi
=
1563 iscsi
->r2tq_info
.pgtbl
[1];
1564 ictx
->xstorm_st_context
.iscsi
.task_pbl_base
.lo
=
1565 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1566 ictx
->xstorm_st_context
.iscsi
.task_pbl_base
.hi
=
1567 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1568 ictx
->xstorm_st_context
.iscsi
.task_pbl_cache_idx
=
1569 BNX2X_ISCSI_PBL_NOT_CACHED
;
1570 ictx
->xstorm_st_context
.iscsi
.flags
.flags
|=
1571 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA
;
1572 ictx
->xstorm_st_context
.iscsi
.flags
.flags
|=
1573 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T
;
1575 ictx
->tstorm_st_context
.iscsi
.hdr_bytes_2_fetch
= ISCSI_HEADER_SIZE
;
1576 /* TSTORM requires the base address of RQ DB & not PTE */
1577 ictx
->tstorm_st_context
.iscsi
.rq_db_phy_addr
.lo
=
1578 req2
->rq_page_table_addr_lo
& PAGE_MASK
;
1579 ictx
->tstorm_st_context
.iscsi
.rq_db_phy_addr
.hi
=
1580 req2
->rq_page_table_addr_hi
;
1581 ictx
->tstorm_st_context
.iscsi
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1582 ictx
->tstorm_st_context
.tcp
.cwnd
= 0x5A8;
1583 ictx
->tstorm_st_context
.tcp
.flags2
|=
1584 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN
;
1585 ictx
->tstorm_st_context
.tcp
.ooo_support_mode
=
1586 TCP_TSTORM_OOO_DROP_AND_PROC_ACK
;
1588 ictx
->timers_context
.flags
|= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG
;
1590 ictx
->ustorm_st_context
.ring
.rq
.pbl_base
.lo
=
1591 req2
->rq_page_table_addr_lo
;
1592 ictx
->ustorm_st_context
.ring
.rq
.pbl_base
.hi
=
1593 req2
->rq_page_table_addr_hi
;
1594 ictx
->ustorm_st_context
.ring
.rq
.curr_pbe
.lo
= req3
->qp_first_pte
[0].hi
;
1595 ictx
->ustorm_st_context
.ring
.rq
.curr_pbe
.hi
= req3
->qp_first_pte
[0].lo
;
1596 ictx
->ustorm_st_context
.ring
.r2tq
.pbl_base
.lo
=
1597 iscsi
->r2tq_info
.pgtbl_map
& 0xffffffff;
1598 ictx
->ustorm_st_context
.ring
.r2tq
.pbl_base
.hi
=
1599 (u64
) iscsi
->r2tq_info
.pgtbl_map
>> 32;
1600 ictx
->ustorm_st_context
.ring
.r2tq
.curr_pbe
.lo
=
1601 iscsi
->r2tq_info
.pgtbl
[0];
1602 ictx
->ustorm_st_context
.ring
.r2tq
.curr_pbe
.hi
=
1603 iscsi
->r2tq_info
.pgtbl
[1];
1604 ictx
->ustorm_st_context
.ring
.cq_pbl_base
.lo
=
1605 req1
->cq_page_table_addr_lo
;
1606 ictx
->ustorm_st_context
.ring
.cq_pbl_base
.hi
=
1607 req1
->cq_page_table_addr_hi
;
1608 ictx
->ustorm_st_context
.ring
.cq
[0].cq_sn
= ISCSI_INITIAL_SN
;
1609 ictx
->ustorm_st_context
.ring
.cq
[0].curr_pbe
.lo
= req2
->cq_first_pte
.hi
;
1610 ictx
->ustorm_st_context
.ring
.cq
[0].curr_pbe
.hi
= req2
->cq_first_pte
.lo
;
1611 ictx
->ustorm_st_context
.task_pbe_cache_index
=
1612 BNX2X_ISCSI_PBL_NOT_CACHED
;
1613 ictx
->ustorm_st_context
.task_pdu_cache_index
=
1614 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED
;
1616 for (i
= 1, j
= 1; i
< cp
->num_cqs
; i
++, j
++) {
1620 req3
= (struct iscsi_kwqe_conn_offload3
*) wqes
[n
++];
1623 ictx
->ustorm_st_context
.ring
.cq
[i
].cq_sn
= ISCSI_INITIAL_SN
;
1624 ictx
->ustorm_st_context
.ring
.cq
[i
].curr_pbe
.lo
=
1625 req3
->qp_first_pte
[j
].hi
;
1626 ictx
->ustorm_st_context
.ring
.cq
[i
].curr_pbe
.hi
=
1627 req3
->qp_first_pte
[j
].lo
;
1630 ictx
->ustorm_st_context
.task_pbl_base
.lo
=
1631 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1632 ictx
->ustorm_st_context
.task_pbl_base
.hi
=
1633 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1634 ictx
->ustorm_st_context
.tce_phy_addr
.lo
=
1635 iscsi
->task_array_info
.pgtbl
[0];
1636 ictx
->ustorm_st_context
.tce_phy_addr
.hi
=
1637 iscsi
->task_array_info
.pgtbl
[1];
1638 ictx
->ustorm_st_context
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1639 ictx
->ustorm_st_context
.num_cqs
= cp
->num_cqs
;
1640 ictx
->ustorm_st_context
.negotiated_rx
|= ISCSI_DEF_MAX_RECV_SEG_LEN
;
1641 ictx
->ustorm_st_context
.negotiated_rx_and_flags
|=
1642 ISCSI_DEF_MAX_BURST_LEN
;
1643 ictx
->ustorm_st_context
.negotiated_rx
|=
1644 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T
<<
1645 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT
;
1647 ictx
->cstorm_st_context
.hq_pbl_base
.lo
=
1648 iscsi
->hq_info
.pgtbl_map
& 0xffffffff;
1649 ictx
->cstorm_st_context
.hq_pbl_base
.hi
=
1650 (u64
) iscsi
->hq_info
.pgtbl_map
>> 32;
1651 ictx
->cstorm_st_context
.hq_curr_pbe
.lo
= iscsi
->hq_info
.pgtbl
[0];
1652 ictx
->cstorm_st_context
.hq_curr_pbe
.hi
= iscsi
->hq_info
.pgtbl
[1];
1653 ictx
->cstorm_st_context
.task_pbl_base
.lo
=
1654 iscsi
->task_array_info
.pgtbl_map
& 0xffffffff;
1655 ictx
->cstorm_st_context
.task_pbl_base
.hi
=
1656 (u64
) iscsi
->task_array_info
.pgtbl_map
>> 32;
1657 /* CSTORM and USTORM initialization is different, CSTORM requires
1658 * CQ DB base & not PTE addr */
1659 ictx
->cstorm_st_context
.cq_db_base
.lo
=
1660 req1
->cq_page_table_addr_lo
& PAGE_MASK
;
1661 ictx
->cstorm_st_context
.cq_db_base
.hi
= req1
->cq_page_table_addr_hi
;
1662 ictx
->cstorm_st_context
.iscsi_conn_id
= req1
->iscsi_conn_id
;
1663 ictx
->cstorm_st_context
.cq_proc_en_bit_map
= (1 << cp
->num_cqs
) - 1;
1664 for (i
= 0; i
< cp
->num_cqs
; i
++) {
1665 ictx
->cstorm_st_context
.cq_c_prod_sqn_arr
.sqn
[i
] =
1667 ictx
->cstorm_st_context
.cq_c_sqn_2_notify_arr
.sqn
[i
] =
1671 ictx
->xstorm_ag_context
.cdu_reserved
=
1672 CDU_RSRVD_VALUE_TYPE_A(hw_cid
, CDU_REGION_NUMBER_XCM_AG
,
1673 ISCSI_CONNECTION_TYPE
);
1674 ictx
->ustorm_ag_context
.cdu_usage
=
1675 CDU_RSRVD_VALUE_TYPE_A(hw_cid
, CDU_REGION_NUMBER_UCM_AG
,
1676 ISCSI_CONNECTION_TYPE
);
1681 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1684 struct iscsi_kwqe_conn_offload1
*req1
;
1685 struct iscsi_kwqe_conn_offload2
*req2
;
1686 struct cnic_local
*cp
= dev
->cnic_priv
;
1687 struct cnic_context
*ctx
;
1688 struct iscsi_kcqe kcqe
;
1689 struct kcqe
*cqes
[1];
1698 req1
= (struct iscsi_kwqe_conn_offload1
*) wqes
[0];
1699 req2
= (struct iscsi_kwqe_conn_offload2
*) wqes
[1];
1700 if ((num
- 2) < req2
->num_additional_wqes
) {
1704 *work
= 2 + req2
->num_additional_wqes
;;
1706 l5_cid
= req1
->iscsi_conn_id
;
1707 if (l5_cid
>= MAX_ISCSI_TBL_SZ
)
1710 memset(&kcqe
, 0, sizeof(kcqe
));
1711 kcqe
.op_code
= ISCSI_KCQE_OPCODE_OFFLOAD_CONN
;
1712 kcqe
.iscsi_conn_id
= l5_cid
;
1713 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE
;
1715 ctx
= &cp
->ctx_tbl
[l5_cid
];
1716 if (test_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
)) {
1717 kcqe
.completion_status
=
1718 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY
;
1722 if (atomic_inc_return(&cp
->iscsi_conn
) > dev
->max_iscsi_conn
) {
1723 atomic_dec(&cp
->iscsi_conn
);
1726 ret
= cnic_alloc_bnx2x_conn_resc(dev
, l5_cid
);
1728 atomic_dec(&cp
->iscsi_conn
);
1732 ret
= cnic_setup_bnx2x_ctx(dev
, wqes
, num
);
1734 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1735 atomic_dec(&cp
->iscsi_conn
);
1739 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1740 kcqe
.iscsi_conn_context_id
= BNX2X_HW_CID(cp
, cp
->ctx_tbl
[l5_cid
].cid
);
1743 cqes
[0] = (struct kcqe
*) &kcqe
;
1744 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1749 static int cnic_bnx2x_iscsi_update(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1751 struct cnic_local
*cp
= dev
->cnic_priv
;
1752 struct iscsi_kwqe_conn_update
*req
=
1753 (struct iscsi_kwqe_conn_update
*) kwqe
;
1755 union l5cm_specific_data l5_data
;
1756 u32 l5_cid
, cid
= BNX2X_SW_CID(req
->context_id
);
1759 if (cnic_get_l5_cid(cp
, cid
, &l5_cid
) != 0)
1762 data
= cnic_get_kwqe_16_data(cp
, l5_cid
, &l5_data
);
1766 memcpy(data
, kwqe
, sizeof(struct kwqe
));
1768 ret
= cnic_submit_kwqe_16(dev
, ISCSI_RAMROD_CMD_ID_UPDATE_CONN
,
1769 req
->context_id
, ISCSI_CONNECTION_TYPE
, &l5_data
);
1773 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev
*dev
, u32 l5_cid
)
1775 struct cnic_local
*cp
= dev
->cnic_priv
;
1776 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1777 union l5cm_specific_data l5_data
;
1781 init_waitqueue_head(&ctx
->waitq
);
1783 memset(&l5_data
, 0, sizeof(l5_data
));
1784 hw_cid
= BNX2X_HW_CID(cp
, ctx
->cid
);
1785 type
= (NONE_CONNECTION_TYPE
<< SPE_HDR_CONN_TYPE_SHIFT
)
1786 & SPE_HDR_CONN_TYPE
;
1787 type
|= ((cp
->pfid
<< SPE_HDR_FUNCTION_ID_SHIFT
) &
1788 SPE_HDR_FUNCTION_ID
);
1790 ret
= cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_COMMON_CFC_DEL
,
1791 hw_cid
, type
, &l5_data
);
1794 wait_event(ctx
->waitq
, ctx
->wait_cond
);
1799 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
1801 struct cnic_local
*cp
= dev
->cnic_priv
;
1802 struct iscsi_kwqe_conn_destroy
*req
=
1803 (struct iscsi_kwqe_conn_destroy
*) kwqe
;
1804 u32 l5_cid
= req
->reserved0
;
1805 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1807 struct iscsi_kcqe kcqe
;
1808 struct kcqe
*cqes
[1];
1810 if (!test_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
))
1811 goto skip_cfc_delete
;
1813 if (!time_after(jiffies
, ctx
->timestamp
+ (2 * HZ
))) {
1814 unsigned long delta
= ctx
->timestamp
+ (2 * HZ
) - jiffies
;
1816 if (delta
> (2 * HZ
))
1819 set_bit(CTX_FL_DELETE_WAIT
, &ctx
->ctx_flags
);
1820 queue_delayed_work(cnic_wq
, &cp
->delete_task
, delta
);
1824 ret
= cnic_bnx2x_destroy_ramrod(dev
, l5_cid
);
1827 cnic_free_bnx2x_conn_resc(dev
, l5_cid
);
1829 atomic_dec(&cp
->iscsi_conn
);
1830 clear_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
);
1833 memset(&kcqe
, 0, sizeof(kcqe
));
1834 kcqe
.op_code
= ISCSI_KCQE_OPCODE_DESTROY_CONN
;
1835 kcqe
.iscsi_conn_id
= l5_cid
;
1836 kcqe
.completion_status
= ISCSI_KCQE_COMPLETION_STATUS_SUCCESS
;
1837 kcqe
.iscsi_conn_context_id
= req
->context_id
;
1839 cqes
[0] = (struct kcqe
*) &kcqe
;
1840 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_ISCSI
, cqes
, 1);
1845 static void cnic_init_storm_conn_bufs(struct cnic_dev
*dev
,
1846 struct l4_kwq_connect_req1
*kwqe1
,
1847 struct l4_kwq_connect_req3
*kwqe3
,
1848 struct l5cm_active_conn_buffer
*conn_buf
)
1850 struct l5cm_conn_addr_params
*conn_addr
= &conn_buf
->conn_addr_buf
;
1851 struct l5cm_xstorm_conn_buffer
*xstorm_buf
=
1852 &conn_buf
->xstorm_conn_buffer
;
1853 struct l5cm_tstorm_conn_buffer
*tstorm_buf
=
1854 &conn_buf
->tstorm_conn_buffer
;
1855 struct regpair context_addr
;
1856 u32 cid
= BNX2X_SW_CID(kwqe1
->cid
);
1857 struct in6_addr src_ip
, dst_ip
;
1861 addrp
= (u32
*) &conn_addr
->local_ip_addr
;
1862 for (i
= 0; i
< 4; i
++, addrp
++)
1863 src_ip
.in6_u
.u6_addr32
[i
] = cpu_to_be32(*addrp
);
1865 addrp
= (u32
*) &conn_addr
->remote_ip_addr
;
1866 for (i
= 0; i
< 4; i
++, addrp
++)
1867 dst_ip
.in6_u
.u6_addr32
[i
] = cpu_to_be32(*addrp
);
1869 cnic_get_bnx2x_ctx(dev
, cid
, 0, &context_addr
);
1871 xstorm_buf
->context_addr
.hi
= context_addr
.hi
;
1872 xstorm_buf
->context_addr
.lo
= context_addr
.lo
;
1873 xstorm_buf
->mss
= 0xffff;
1874 xstorm_buf
->rcv_buf
= kwqe3
->rcv_buf
;
1875 if (kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE
)
1876 xstorm_buf
->params
|= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE
;
1877 xstorm_buf
->pseudo_header_checksum
=
1878 swab16(~csum_ipv6_magic(&src_ip
, &dst_ip
, 0, IPPROTO_TCP
, 0));
1880 if (!(kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK
))
1881 tstorm_buf
->params
|=
1882 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE
;
1883 if (kwqe3
->ka_timeout
) {
1884 tstorm_buf
->ka_enable
= 1;
1885 tstorm_buf
->ka_timeout
= kwqe3
->ka_timeout
;
1886 tstorm_buf
->ka_interval
= kwqe3
->ka_interval
;
1887 tstorm_buf
->ka_max_probe_count
= kwqe3
->ka_max_probe_count
;
1889 tstorm_buf
->rcv_buf
= kwqe3
->rcv_buf
;
1890 tstorm_buf
->snd_buf
= kwqe3
->snd_buf
;
1891 tstorm_buf
->max_rt_time
= 0xffffffff;
1894 static void cnic_init_bnx2x_mac(struct cnic_dev
*dev
)
1896 struct cnic_local
*cp
= dev
->cnic_priv
;
1897 u32 pfid
= cp
->pfid
;
1898 u8
*mac
= dev
->mac_addr
;
1900 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1901 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid
), mac
[0]);
1902 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1903 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid
), mac
[1]);
1904 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1905 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid
), mac
[2]);
1906 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1907 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid
), mac
[3]);
1908 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1909 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid
), mac
[4]);
1910 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1911 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid
), mac
[5]);
1913 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1914 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid
), mac
[5]);
1915 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1916 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid
) + 1,
1918 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1919 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid
), mac
[3]);
1920 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1921 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid
) + 1,
1923 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1924 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid
) + 2,
1926 CNIC_WR8(dev
, BAR_TSTRORM_INTMEM
+
1927 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid
) + 3,
1931 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev
*dev
, int tcp_ts
)
1933 struct cnic_local
*cp
= dev
->cnic_priv
;
1934 u8 xstorm_flags
= XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN
;
1935 u16 tstorm_flags
= 0;
1938 xstorm_flags
|= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED
;
1939 tstorm_flags
|= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED
;
1942 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
1943 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp
->pfid
), xstorm_flags
);
1945 CNIC_WR16(dev
, BAR_TSTRORM_INTMEM
+
1946 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp
->pfid
), tstorm_flags
);
1949 static int cnic_bnx2x_connect(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
1952 struct cnic_local
*cp
= dev
->cnic_priv
;
1953 struct l4_kwq_connect_req1
*kwqe1
=
1954 (struct l4_kwq_connect_req1
*) wqes
[0];
1955 struct l4_kwq_connect_req3
*kwqe3
;
1956 struct l5cm_active_conn_buffer
*conn_buf
;
1957 struct l5cm_conn_addr_params
*conn_addr
;
1958 union l5cm_specific_data l5_data
;
1959 u32 l5_cid
= kwqe1
->pg_cid
;
1960 struct cnic_sock
*csk
= &cp
->csk_tbl
[l5_cid
];
1961 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
1969 if (kwqe1
->conn_flags
& L4_KWQ_CONNECT_REQ1_IP_V6
)
1979 if (sizeof(*conn_buf
) > CNIC_KWQ16_DATA_SIZE
) {
1980 netdev_err(dev
->netdev
, "conn_buf size too big\n");
1983 conn_buf
= cnic_get_kwqe_16_data(cp
, l5_cid
, &l5_data
);
1987 memset(conn_buf
, 0, sizeof(*conn_buf
));
1989 conn_addr
= &conn_buf
->conn_addr_buf
;
1990 conn_addr
->remote_addr_0
= csk
->ha
[0];
1991 conn_addr
->remote_addr_1
= csk
->ha
[1];
1992 conn_addr
->remote_addr_2
= csk
->ha
[2];
1993 conn_addr
->remote_addr_3
= csk
->ha
[3];
1994 conn_addr
->remote_addr_4
= csk
->ha
[4];
1995 conn_addr
->remote_addr_5
= csk
->ha
[5];
1997 if (kwqe1
->conn_flags
& L4_KWQ_CONNECT_REQ1_IP_V6
) {
1998 struct l4_kwq_connect_req2
*kwqe2
=
1999 (struct l4_kwq_connect_req2
*) wqes
[1];
2001 conn_addr
->local_ip_addr
.ip_addr_hi_hi
= kwqe2
->src_ip_v6_4
;
2002 conn_addr
->local_ip_addr
.ip_addr_hi_lo
= kwqe2
->src_ip_v6_3
;
2003 conn_addr
->local_ip_addr
.ip_addr_lo_hi
= kwqe2
->src_ip_v6_2
;
2005 conn_addr
->remote_ip_addr
.ip_addr_hi_hi
= kwqe2
->dst_ip_v6_4
;
2006 conn_addr
->remote_ip_addr
.ip_addr_hi_lo
= kwqe2
->dst_ip_v6_3
;
2007 conn_addr
->remote_ip_addr
.ip_addr_lo_hi
= kwqe2
->dst_ip_v6_2
;
2008 conn_addr
->params
|= L5CM_CONN_ADDR_PARAMS_IP_VERSION
;
2010 kwqe3
= (struct l4_kwq_connect_req3
*) wqes
[*work
- 1];
2012 conn_addr
->local_ip_addr
.ip_addr_lo_lo
= kwqe1
->src_ip
;
2013 conn_addr
->remote_ip_addr
.ip_addr_lo_lo
= kwqe1
->dst_ip
;
2014 conn_addr
->local_tcp_port
= kwqe1
->src_port
;
2015 conn_addr
->remote_tcp_port
= kwqe1
->dst_port
;
2017 conn_addr
->pmtu
= kwqe3
->pmtu
;
2018 cnic_init_storm_conn_bufs(dev
, kwqe1
, kwqe3
, conn_buf
);
2020 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
2021 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp
->pfid
), csk
->vlan_id
);
2023 cnic_bnx2x_set_tcp_timestamp(dev
,
2024 kwqe1
->tcp_flags
& L4_KWQ_CONNECT_REQ1_TIME_STAMP
);
2026 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_TCP_CONNECT
,
2027 kwqe1
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
2029 set_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
);
2034 static int cnic_bnx2x_close(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
2036 struct l4_kwq_close_req
*req
= (struct l4_kwq_close_req
*) kwqe
;
2037 union l5cm_specific_data l5_data
;
2040 memset(&l5_data
, 0, sizeof(l5_data
));
2041 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_CLOSE
,
2042 req
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
2046 static int cnic_bnx2x_reset(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
2048 struct l4_kwq_reset_req
*req
= (struct l4_kwq_reset_req
*) kwqe
;
2049 union l5cm_specific_data l5_data
;
2052 memset(&l5_data
, 0, sizeof(l5_data
));
2053 ret
= cnic_submit_kwqe_16(dev
, L5CM_RAMROD_CMD_ID_ABORT
,
2054 req
->cid
, ISCSI_CONNECTION_TYPE
, &l5_data
);
2057 static int cnic_bnx2x_offload_pg(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
2059 struct l4_kwq_offload_pg
*req
= (struct l4_kwq_offload_pg
*) kwqe
;
2061 struct kcqe
*cqes
[1];
2063 memset(&kcqe
, 0, sizeof(kcqe
));
2064 kcqe
.pg_host_opaque
= req
->host_opaque
;
2065 kcqe
.pg_cid
= req
->host_opaque
;
2066 kcqe
.op_code
= L4_KCQE_OPCODE_VALUE_OFFLOAD_PG
;
2067 cqes
[0] = (struct kcqe
*) &kcqe
;
2068 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_L4
, cqes
, 1);
2072 static int cnic_bnx2x_update_pg(struct cnic_dev
*dev
, struct kwqe
*kwqe
)
2074 struct l4_kwq_update_pg
*req
= (struct l4_kwq_update_pg
*) kwqe
;
2076 struct kcqe
*cqes
[1];
2078 memset(&kcqe
, 0, sizeof(kcqe
));
2079 kcqe
.pg_host_opaque
= req
->pg_host_opaque
;
2080 kcqe
.pg_cid
= req
->pg_cid
;
2081 kcqe
.op_code
= L4_KCQE_OPCODE_VALUE_UPDATE_PG
;
2082 cqes
[0] = (struct kcqe
*) &kcqe
;
2083 cnic_reply_bnx2x_kcqes(dev
, CNIC_ULP_L4
, cqes
, 1);
2087 static int cnic_submit_bnx2x_kwqes(struct cnic_dev
*dev
, struct kwqe
*wqes
[],
2094 if (!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
2095 return -EAGAIN
; /* bnx2 is down */
2097 for (i
= 0; i
< num_wqes
; ) {
2099 opcode
= KWQE_OPCODE(kwqe
->kwqe_op_flag
);
2103 case ISCSI_KWQE_OPCODE_INIT1
:
2104 ret
= cnic_bnx2x_iscsi_init1(dev
, kwqe
);
2106 case ISCSI_KWQE_OPCODE_INIT2
:
2107 ret
= cnic_bnx2x_iscsi_init2(dev
, kwqe
);
2109 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1
:
2110 ret
= cnic_bnx2x_iscsi_ofld1(dev
, &wqes
[i
],
2111 num_wqes
- i
, &work
);
2113 case ISCSI_KWQE_OPCODE_UPDATE_CONN
:
2114 ret
= cnic_bnx2x_iscsi_update(dev
, kwqe
);
2116 case ISCSI_KWQE_OPCODE_DESTROY_CONN
:
2117 ret
= cnic_bnx2x_iscsi_destroy(dev
, kwqe
);
2119 case L4_KWQE_OPCODE_VALUE_CONNECT1
:
2120 ret
= cnic_bnx2x_connect(dev
, &wqes
[i
], num_wqes
- i
,
2123 case L4_KWQE_OPCODE_VALUE_CLOSE
:
2124 ret
= cnic_bnx2x_close(dev
, kwqe
);
2126 case L4_KWQE_OPCODE_VALUE_RESET
:
2127 ret
= cnic_bnx2x_reset(dev
, kwqe
);
2129 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG
:
2130 ret
= cnic_bnx2x_offload_pg(dev
, kwqe
);
2132 case L4_KWQE_OPCODE_VALUE_UPDATE_PG
:
2133 ret
= cnic_bnx2x_update_pg(dev
, kwqe
);
2135 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG
:
2140 netdev_err(dev
->netdev
, "Unknown type of KWQE(0x%x)\n",
2145 netdev_err(dev
->netdev
, "KWQE(0x%x) failed\n",
2152 static void service_kcqes(struct cnic_dev
*dev
, int num_cqes
)
2154 struct cnic_local
*cp
= dev
->cnic_priv
;
2160 struct cnic_ulp_ops
*ulp_ops
;
2162 u32 kcqe_op_flag
= cp
->completed_kcq
[i
]->kcqe_op_flag
;
2163 u32 kcqe_layer
= kcqe_op_flag
& KCQE_FLAGS_LAYER_MASK
;
2165 if (unlikely(kcqe_op_flag
& KCQE_RAMROD_COMPLETION
))
2168 while (j
< num_cqes
) {
2169 u32 next_op
= cp
->completed_kcq
[i
+ j
]->kcqe_op_flag
;
2171 if ((next_op
& KCQE_FLAGS_LAYER_MASK
) != kcqe_layer
)
2174 if (unlikely(next_op
& KCQE_RAMROD_COMPLETION
))
2179 if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L5_RDMA
)
2180 ulp_type
= CNIC_ULP_RDMA
;
2181 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L5_ISCSI
)
2182 ulp_type
= CNIC_ULP_ISCSI
;
2183 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L4
)
2184 ulp_type
= CNIC_ULP_L4
;
2185 else if (kcqe_layer
== KCQE_FLAGS_LAYER_MASK_L2
)
2188 netdev_err(dev
->netdev
, "Unknown type of KCQE(0x%x)\n",
2194 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
2195 if (likely(ulp_ops
)) {
2196 ulp_ops
->indicate_kcqes(cp
->ulp_handle
[ulp_type
],
2197 cp
->completed_kcq
+ i
, j
);
2206 cnic_spq_completion(dev
, DRV_CTL_RET_L5_SPQ_CREDIT_CMD
, comp
);
2209 static u16
cnic_bnx2_next_idx(u16 idx
)
2214 static u16
cnic_bnx2_hw_idx(u16 idx
)
2219 static u16
cnic_bnx2x_next_idx(u16 idx
)
2222 if ((idx
& MAX_KCQE_CNT
) == MAX_KCQE_CNT
)
2228 static u16
cnic_bnx2x_hw_idx(u16 idx
)
2230 if ((idx
& MAX_KCQE_CNT
) == MAX_KCQE_CNT
)
2235 static int cnic_get_kcqes(struct cnic_dev
*dev
, struct kcq_info
*info
)
2237 struct cnic_local
*cp
= dev
->cnic_priv
;
2238 u16 i
, ri
, hw_prod
, last
;
2240 int kcqe_cnt
= 0, last_cnt
= 0;
2242 i
= ri
= last
= info
->sw_prod_idx
;
2244 hw_prod
= *info
->hw_prod_idx_ptr
;
2245 hw_prod
= cp
->hw_idx(hw_prod
);
2247 while ((i
!= hw_prod
) && (kcqe_cnt
< MAX_COMPLETED_KCQE
)) {
2248 kcqe
= &info
->kcq
[KCQ_PG(ri
)][KCQ_IDX(ri
)];
2249 cp
->completed_kcq
[kcqe_cnt
++] = kcqe
;
2250 i
= cp
->next_idx(i
);
2251 ri
= i
& MAX_KCQ_IDX
;
2252 if (likely(!(kcqe
->kcqe_op_flag
& KCQE_FLAGS_NEXT
))) {
2253 last_cnt
= kcqe_cnt
;
2258 info
->sw_prod_idx
= last
;
2262 static int cnic_l2_completion(struct cnic_local
*cp
)
2264 u16 hw_cons
, sw_cons
;
2265 struct cnic_uio_dev
*udev
= cp
->udev
;
2266 union eth_rx_cqe
*cqe
, *cqe_ring
= (union eth_rx_cqe
*)
2267 (udev
->l2_ring
+ (2 * BCM_PAGE_SIZE
));
2271 if (!test_bit(CNIC_F_BNX2X_CLASS
, &cp
->dev
->flags
))
2274 hw_cons
= *cp
->rx_cons_ptr
;
2275 if ((hw_cons
& BNX2X_MAX_RCQ_DESC_CNT
) == BNX2X_MAX_RCQ_DESC_CNT
)
2278 sw_cons
= cp
->rx_cons
;
2279 while (sw_cons
!= hw_cons
) {
2282 cqe
= &cqe_ring
[sw_cons
& BNX2X_MAX_RCQ_DESC_CNT
];
2283 cqe_fp_flags
= cqe
->fast_path_cqe
.type_error_flags
;
2284 if (cqe_fp_flags
& ETH_FAST_PATH_RX_CQE_TYPE
) {
2285 cmd
= le32_to_cpu(cqe
->ramrod_cqe
.conn_and_cmd_data
);
2286 cmd
>>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT
;
2287 if (cmd
== RAMROD_CMD_ID_ETH_CLIENT_SETUP
||
2288 cmd
== RAMROD_CMD_ID_ETH_HALT
)
2291 sw_cons
= BNX2X_NEXT_RCQE(sw_cons
);
2296 static void cnic_chk_pkt_rings(struct cnic_local
*cp
)
2298 u16 rx_cons
, tx_cons
;
2301 if (!test_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
))
2304 rx_cons
= *cp
->rx_cons_ptr
;
2305 tx_cons
= *cp
->tx_cons_ptr
;
2306 if (cp
->tx_cons
!= tx_cons
|| cp
->rx_cons
!= rx_cons
) {
2307 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
2308 comp
= cnic_l2_completion(cp
);
2310 cp
->tx_cons
= tx_cons
;
2311 cp
->rx_cons
= rx_cons
;
2314 uio_event_notify(&cp
->udev
->cnic_uinfo
);
2317 clear_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
2320 static u32
cnic_service_bnx2_queues(struct cnic_dev
*dev
)
2322 struct cnic_local
*cp
= dev
->cnic_priv
;
2323 u32 status_idx
= (u16
) *cp
->kcq1
.status_idx_ptr
;
2326 cp
->kwq_con_idx
= *cp
->kwq_con_idx_ptr
;
2328 while ((kcqe_cnt
= cnic_get_kcqes(dev
, &cp
->kcq1
))) {
2330 service_kcqes(dev
, kcqe_cnt
);
2332 /* Tell compiler that status_blk fields can change. */
2334 if (status_idx
!= *cp
->kcq1
.status_idx_ptr
) {
2335 status_idx
= (u16
) *cp
->kcq1
.status_idx_ptr
;
2336 cp
->kwq_con_idx
= *cp
->kwq_con_idx_ptr
;
2341 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, cp
->kcq1
.sw_prod_idx
);
2343 cnic_chk_pkt_rings(cp
);
2348 static int cnic_service_bnx2(void *data
, void *status_blk
)
2350 struct cnic_dev
*dev
= data
;
2351 struct cnic_local
*cp
= dev
->cnic_priv
;
2352 u32 status_idx
= *cp
->kcq1
.status_idx_ptr
;
2354 if (unlikely(!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)))
2357 return cnic_service_bnx2_queues(dev
);
2360 static void cnic_service_bnx2_msix(unsigned long data
)
2362 struct cnic_dev
*dev
= (struct cnic_dev
*) data
;
2363 struct cnic_local
*cp
= dev
->cnic_priv
;
2365 cp
->last_status_idx
= cnic_service_bnx2_queues(dev
);
2367 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
2368 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
| cp
->last_status_idx
);
2371 static void cnic_doirq(struct cnic_dev
*dev
)
2373 struct cnic_local
*cp
= dev
->cnic_priv
;
2374 u16 prod
= cp
->kcq1
.sw_prod_idx
& MAX_KCQ_IDX
;
2376 if (likely(test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))) {
2377 prefetch(cp
->status_blk
.gen
);
2378 prefetch(&cp
->kcq1
.kcq
[KCQ_PG(prod
)][KCQ_IDX(prod
)]);
2380 tasklet_schedule(&cp
->cnic_irq_task
);
2384 static irqreturn_t
cnic_irq(int irq
, void *dev_instance
)
2386 struct cnic_dev
*dev
= dev_instance
;
2387 struct cnic_local
*cp
= dev
->cnic_priv
;
2397 static inline void cnic_ack_bnx2x_int(struct cnic_dev
*dev
, u8 id
, u8 storm
,
2398 u16 index
, u8 op
, u8 update
)
2400 struct cnic_local
*cp
= dev
->cnic_priv
;
2401 u32 hc_addr
= (HC_REG_COMMAND_REG
+ CNIC_PORT(cp
) * 32 +
2402 COMMAND_REG_INT_ACK
);
2403 struct igu_ack_register igu_ack
;
2405 igu_ack
.status_block_index
= index
;
2406 igu_ack
.sb_id_and_flags
=
2407 ((id
<< IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT
) |
2408 (storm
<< IGU_ACK_REGISTER_STORM_ID_SHIFT
) |
2409 (update
<< IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT
) |
2410 (op
<< IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT
));
2412 CNIC_WR(dev
, hc_addr
, (*(u32
*)&igu_ack
));
2415 static void cnic_ack_igu_sb(struct cnic_dev
*dev
, u8 igu_sb_id
, u8 segment
,
2416 u16 index
, u8 op
, u8 update
)
2418 struct igu_regular cmd_data
;
2419 u32 igu_addr
= BAR_IGU_INTMEM
+ (IGU_CMD_INT_ACK_BASE
+ igu_sb_id
) * 8;
2421 cmd_data
.sb_id_and_flags
=
2422 (index
<< IGU_REGULAR_SB_INDEX_SHIFT
) |
2423 (segment
<< IGU_REGULAR_SEGMENT_ACCESS_SHIFT
) |
2424 (update
<< IGU_REGULAR_BUPDATE_SHIFT
) |
2425 (op
<< IGU_REGULAR_ENABLE_INT_SHIFT
);
2428 CNIC_WR(dev
, igu_addr
, cmd_data
.sb_id_and_flags
);
2431 static void cnic_ack_bnx2x_msix(struct cnic_dev
*dev
)
2433 struct cnic_local
*cp
= dev
->cnic_priv
;
2435 cnic_ack_bnx2x_int(dev
, cp
->bnx2x_igu_sb_id
, CSTORM_ID
, 0,
2436 IGU_INT_DISABLE
, 0);
2439 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev
*dev
)
2441 struct cnic_local
*cp
= dev
->cnic_priv
;
2443 cnic_ack_igu_sb(dev
, cp
->bnx2x_igu_sb_id
, IGU_SEG_ACCESS_DEF
, 0,
2444 IGU_INT_DISABLE
, 0);
2447 static u32
cnic_service_bnx2x_kcq(struct cnic_dev
*dev
, struct kcq_info
*info
)
2449 u32 last_status
= *info
->status_idx_ptr
;
2452 while ((kcqe_cnt
= cnic_get_kcqes(dev
, info
))) {
2454 service_kcqes(dev
, kcqe_cnt
);
2456 /* Tell compiler that sblk fields can change. */
2458 if (last_status
== *info
->status_idx_ptr
)
2461 last_status
= *info
->status_idx_ptr
;
2466 static void cnic_service_bnx2x_bh(unsigned long data
)
2468 struct cnic_dev
*dev
= (struct cnic_dev
*) data
;
2469 struct cnic_local
*cp
= dev
->cnic_priv
;
2472 if (unlikely(!test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)))
2475 status_idx
= cnic_service_bnx2x_kcq(dev
, &cp
->kcq1
);
2477 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, cp
->kcq1
.sw_prod_idx
+ MAX_KCQ_IDX
);
2478 if (BNX2X_CHIP_IS_E2(cp
->chip_id
))
2479 cnic_ack_igu_sb(dev
, cp
->bnx2x_igu_sb_id
, IGU_SEG_ACCESS_DEF
,
2480 status_idx
, IGU_INT_ENABLE
, 1);
2482 cnic_ack_bnx2x_int(dev
, cp
->bnx2x_igu_sb_id
, USTORM_ID
,
2483 status_idx
, IGU_INT_ENABLE
, 1);
2486 static int cnic_service_bnx2x(void *data
, void *status_blk
)
2488 struct cnic_dev
*dev
= data
;
2489 struct cnic_local
*cp
= dev
->cnic_priv
;
2491 if (!(cp
->ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
2494 cnic_chk_pkt_rings(cp
);
2499 static void cnic_ulp_stop(struct cnic_dev
*dev
)
2501 struct cnic_local
*cp
= dev
->cnic_priv
;
2504 cnic_send_nlmsg(cp
, ISCSI_KEVENT_IF_DOWN
, NULL
);
2506 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
2507 struct cnic_ulp_ops
*ulp_ops
;
2509 mutex_lock(&cnic_lock
);
2510 ulp_ops
= cp
->ulp_ops
[if_type
];
2512 mutex_unlock(&cnic_lock
);
2515 set_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2516 mutex_unlock(&cnic_lock
);
2518 if (test_and_clear_bit(ULP_F_START
, &cp
->ulp_flags
[if_type
]))
2519 ulp_ops
->cnic_stop(cp
->ulp_handle
[if_type
]);
2521 clear_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2525 static void cnic_ulp_start(struct cnic_dev
*dev
)
2527 struct cnic_local
*cp
= dev
->cnic_priv
;
2530 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
2531 struct cnic_ulp_ops
*ulp_ops
;
2533 mutex_lock(&cnic_lock
);
2534 ulp_ops
= cp
->ulp_ops
[if_type
];
2535 if (!ulp_ops
|| !ulp_ops
->cnic_start
) {
2536 mutex_unlock(&cnic_lock
);
2539 set_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2540 mutex_unlock(&cnic_lock
);
2542 if (!test_and_set_bit(ULP_F_START
, &cp
->ulp_flags
[if_type
]))
2543 ulp_ops
->cnic_start(cp
->ulp_handle
[if_type
]);
2545 clear_bit(ULP_F_CALL_PENDING
, &cp
->ulp_flags
[if_type
]);
2549 static int cnic_ctl(void *data
, struct cnic_ctl_info
*info
)
2551 struct cnic_dev
*dev
= data
;
2553 switch (info
->cmd
) {
2554 case CNIC_CTL_STOP_CMD
:
2562 case CNIC_CTL_START_CMD
:
2565 if (!cnic_start_hw(dev
))
2566 cnic_ulp_start(dev
);
2570 case CNIC_CTL_COMPLETION_CMD
: {
2571 u32 cid
= BNX2X_SW_CID(info
->data
.comp
.cid
);
2573 struct cnic_local
*cp
= dev
->cnic_priv
;
2575 if (cnic_get_l5_cid(cp
, cid
, &l5_cid
) == 0) {
2576 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
2579 wake_up(&ctx
->waitq
);
2589 static void cnic_ulp_init(struct cnic_dev
*dev
)
2592 struct cnic_local
*cp
= dev
->cnic_priv
;
2594 for (i
= 0; i
< MAX_CNIC_ULP_TYPE_EXT
; i
++) {
2595 struct cnic_ulp_ops
*ulp_ops
;
2597 mutex_lock(&cnic_lock
);
2598 ulp_ops
= cnic_ulp_tbl
[i
];
2599 if (!ulp_ops
|| !ulp_ops
->cnic_init
) {
2600 mutex_unlock(&cnic_lock
);
2604 mutex_unlock(&cnic_lock
);
2606 if (!test_and_set_bit(ULP_F_INIT
, &cp
->ulp_flags
[i
]))
2607 ulp_ops
->cnic_init(dev
);
2613 static void cnic_ulp_exit(struct cnic_dev
*dev
)
2616 struct cnic_local
*cp
= dev
->cnic_priv
;
2618 for (i
= 0; i
< MAX_CNIC_ULP_TYPE_EXT
; i
++) {
2619 struct cnic_ulp_ops
*ulp_ops
;
2621 mutex_lock(&cnic_lock
);
2622 ulp_ops
= cnic_ulp_tbl
[i
];
2623 if (!ulp_ops
|| !ulp_ops
->cnic_exit
) {
2624 mutex_unlock(&cnic_lock
);
2628 mutex_unlock(&cnic_lock
);
2630 if (test_and_clear_bit(ULP_F_INIT
, &cp
->ulp_flags
[i
]))
2631 ulp_ops
->cnic_exit(dev
);
2637 static int cnic_cm_offload_pg(struct cnic_sock
*csk
)
2639 struct cnic_dev
*dev
= csk
->dev
;
2640 struct l4_kwq_offload_pg
*l4kwqe
;
2641 struct kwqe
*wqes
[1];
2643 l4kwqe
= (struct l4_kwq_offload_pg
*) &csk
->kwqe1
;
2644 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2645 wqes
[0] = (struct kwqe
*) l4kwqe
;
2647 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_OFFLOAD_PG
;
2649 L4_LAYER_CODE
<< L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT
;
2650 l4kwqe
->l2hdr_nbytes
= ETH_HLEN
;
2652 l4kwqe
->da0
= csk
->ha
[0];
2653 l4kwqe
->da1
= csk
->ha
[1];
2654 l4kwqe
->da2
= csk
->ha
[2];
2655 l4kwqe
->da3
= csk
->ha
[3];
2656 l4kwqe
->da4
= csk
->ha
[4];
2657 l4kwqe
->da5
= csk
->ha
[5];
2659 l4kwqe
->sa0
= dev
->mac_addr
[0];
2660 l4kwqe
->sa1
= dev
->mac_addr
[1];
2661 l4kwqe
->sa2
= dev
->mac_addr
[2];
2662 l4kwqe
->sa3
= dev
->mac_addr
[3];
2663 l4kwqe
->sa4
= dev
->mac_addr
[4];
2664 l4kwqe
->sa5
= dev
->mac_addr
[5];
2666 l4kwqe
->etype
= ETH_P_IP
;
2667 l4kwqe
->ipid_start
= DEF_IPID_START
;
2668 l4kwqe
->host_opaque
= csk
->l5_cid
;
2671 l4kwqe
->pg_flags
|= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING
;
2672 l4kwqe
->vlan_tag
= csk
->vlan_id
;
2673 l4kwqe
->l2hdr_nbytes
+= 4;
2676 return dev
->submit_kwqes(dev
, wqes
, 1);
2679 static int cnic_cm_update_pg(struct cnic_sock
*csk
)
2681 struct cnic_dev
*dev
= csk
->dev
;
2682 struct l4_kwq_update_pg
*l4kwqe
;
2683 struct kwqe
*wqes
[1];
2685 l4kwqe
= (struct l4_kwq_update_pg
*) &csk
->kwqe1
;
2686 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2687 wqes
[0] = (struct kwqe
*) l4kwqe
;
2689 l4kwqe
->opcode
= L4_KWQE_OPCODE_VALUE_UPDATE_PG
;
2691 L4_LAYER_CODE
<< L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT
;
2692 l4kwqe
->pg_cid
= csk
->pg_cid
;
2694 l4kwqe
->da0
= csk
->ha
[0];
2695 l4kwqe
->da1
= csk
->ha
[1];
2696 l4kwqe
->da2
= csk
->ha
[2];
2697 l4kwqe
->da3
= csk
->ha
[3];
2698 l4kwqe
->da4
= csk
->ha
[4];
2699 l4kwqe
->da5
= csk
->ha
[5];
2701 l4kwqe
->pg_host_opaque
= csk
->l5_cid
;
2702 l4kwqe
->pg_valids
= L4_KWQ_UPDATE_PG_VALIDS_DA
;
2704 return dev
->submit_kwqes(dev
, wqes
, 1);
2707 static int cnic_cm_upload_pg(struct cnic_sock
*csk
)
2709 struct cnic_dev
*dev
= csk
->dev
;
2710 struct l4_kwq_upload
*l4kwqe
;
2711 struct kwqe
*wqes
[1];
2713 l4kwqe
= (struct l4_kwq_upload
*) &csk
->kwqe1
;
2714 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2715 wqes
[0] = (struct kwqe
*) l4kwqe
;
2717 l4kwqe
->opcode
= L4_KWQE_OPCODE_VALUE_UPLOAD_PG
;
2719 L4_LAYER_CODE
<< L4_KWQ_UPLOAD_LAYER_CODE_SHIFT
;
2720 l4kwqe
->cid
= csk
->pg_cid
;
2722 return dev
->submit_kwqes(dev
, wqes
, 1);
2725 static int cnic_cm_conn_req(struct cnic_sock
*csk
)
2727 struct cnic_dev
*dev
= csk
->dev
;
2728 struct l4_kwq_connect_req1
*l4kwqe1
;
2729 struct l4_kwq_connect_req2
*l4kwqe2
;
2730 struct l4_kwq_connect_req3
*l4kwqe3
;
2731 struct kwqe
*wqes
[3];
2735 l4kwqe1
= (struct l4_kwq_connect_req1
*) &csk
->kwqe1
;
2736 l4kwqe2
= (struct l4_kwq_connect_req2
*) &csk
->kwqe2
;
2737 l4kwqe3
= (struct l4_kwq_connect_req3
*) &csk
->kwqe3
;
2738 memset(l4kwqe1
, 0, sizeof(*l4kwqe1
));
2739 memset(l4kwqe2
, 0, sizeof(*l4kwqe2
));
2740 memset(l4kwqe3
, 0, sizeof(*l4kwqe3
));
2742 l4kwqe3
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT3
;
2744 L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT
;
2745 l4kwqe3
->ka_timeout
= csk
->ka_timeout
;
2746 l4kwqe3
->ka_interval
= csk
->ka_interval
;
2747 l4kwqe3
->ka_max_probe_count
= csk
->ka_max_probe_count
;
2748 l4kwqe3
->tos
= csk
->tos
;
2749 l4kwqe3
->ttl
= csk
->ttl
;
2750 l4kwqe3
->snd_seq_scale
= csk
->snd_seq_scale
;
2751 l4kwqe3
->pmtu
= csk
->mtu
;
2752 l4kwqe3
->rcv_buf
= csk
->rcv_buf
;
2753 l4kwqe3
->snd_buf
= csk
->snd_buf
;
2754 l4kwqe3
->seed
= csk
->seed
;
2756 wqes
[0] = (struct kwqe
*) l4kwqe1
;
2757 if (test_bit(SK_F_IPV6
, &csk
->flags
)) {
2758 wqes
[1] = (struct kwqe
*) l4kwqe2
;
2759 wqes
[2] = (struct kwqe
*) l4kwqe3
;
2762 l4kwqe1
->conn_flags
= L4_KWQ_CONNECT_REQ1_IP_V6
;
2763 l4kwqe2
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT2
;
2765 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT
|
2766 L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT
;
2767 l4kwqe2
->src_ip_v6_2
= be32_to_cpu(csk
->src_ip
[1]);
2768 l4kwqe2
->src_ip_v6_3
= be32_to_cpu(csk
->src_ip
[2]);
2769 l4kwqe2
->src_ip_v6_4
= be32_to_cpu(csk
->src_ip
[3]);
2770 l4kwqe2
->dst_ip_v6_2
= be32_to_cpu(csk
->dst_ip
[1]);
2771 l4kwqe2
->dst_ip_v6_3
= be32_to_cpu(csk
->dst_ip
[2]);
2772 l4kwqe2
->dst_ip_v6_4
= be32_to_cpu(csk
->dst_ip
[3]);
2773 l4kwqe3
->mss
= l4kwqe3
->pmtu
- sizeof(struct ipv6hdr
) -
2774 sizeof(struct tcphdr
);
2776 wqes
[1] = (struct kwqe
*) l4kwqe3
;
2777 l4kwqe3
->mss
= l4kwqe3
->pmtu
- sizeof(struct iphdr
) -
2778 sizeof(struct tcphdr
);
2781 l4kwqe1
->op_code
= L4_KWQE_OPCODE_VALUE_CONNECT1
;
2783 (L4_LAYER_CODE
<< L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT
) |
2784 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT
;
2785 l4kwqe1
->cid
= csk
->cid
;
2786 l4kwqe1
->pg_cid
= csk
->pg_cid
;
2787 l4kwqe1
->src_ip
= be32_to_cpu(csk
->src_ip
[0]);
2788 l4kwqe1
->dst_ip
= be32_to_cpu(csk
->dst_ip
[0]);
2789 l4kwqe1
->src_port
= be16_to_cpu(csk
->src_port
);
2790 l4kwqe1
->dst_port
= be16_to_cpu(csk
->dst_port
);
2791 if (csk
->tcp_flags
& SK_TCP_NO_DELAY_ACK
)
2792 tcp_flags
|= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK
;
2793 if (csk
->tcp_flags
& SK_TCP_KEEP_ALIVE
)
2794 tcp_flags
|= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE
;
2795 if (csk
->tcp_flags
& SK_TCP_NAGLE
)
2796 tcp_flags
|= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE
;
2797 if (csk
->tcp_flags
& SK_TCP_TIMESTAMP
)
2798 tcp_flags
|= L4_KWQ_CONNECT_REQ1_TIME_STAMP
;
2799 if (csk
->tcp_flags
& SK_TCP_SACK
)
2800 tcp_flags
|= L4_KWQ_CONNECT_REQ1_SACK
;
2801 if (csk
->tcp_flags
& SK_TCP_SEG_SCALING
)
2802 tcp_flags
|= L4_KWQ_CONNECT_REQ1_SEG_SCALING
;
2804 l4kwqe1
->tcp_flags
= tcp_flags
;
2806 return dev
->submit_kwqes(dev
, wqes
, num_wqes
);
2809 static int cnic_cm_close_req(struct cnic_sock
*csk
)
2811 struct cnic_dev
*dev
= csk
->dev
;
2812 struct l4_kwq_close_req
*l4kwqe
;
2813 struct kwqe
*wqes
[1];
2815 l4kwqe
= (struct l4_kwq_close_req
*) &csk
->kwqe2
;
2816 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2817 wqes
[0] = (struct kwqe
*) l4kwqe
;
2819 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_CLOSE
;
2820 l4kwqe
->flags
= L4_LAYER_CODE
<< L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT
;
2821 l4kwqe
->cid
= csk
->cid
;
2823 return dev
->submit_kwqes(dev
, wqes
, 1);
2826 static int cnic_cm_abort_req(struct cnic_sock
*csk
)
2828 struct cnic_dev
*dev
= csk
->dev
;
2829 struct l4_kwq_reset_req
*l4kwqe
;
2830 struct kwqe
*wqes
[1];
2832 l4kwqe
= (struct l4_kwq_reset_req
*) &csk
->kwqe2
;
2833 memset(l4kwqe
, 0, sizeof(*l4kwqe
));
2834 wqes
[0] = (struct kwqe
*) l4kwqe
;
2836 l4kwqe
->op_code
= L4_KWQE_OPCODE_VALUE_RESET
;
2837 l4kwqe
->flags
= L4_LAYER_CODE
<< L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT
;
2838 l4kwqe
->cid
= csk
->cid
;
2840 return dev
->submit_kwqes(dev
, wqes
, 1);
2843 static int cnic_cm_create(struct cnic_dev
*dev
, int ulp_type
, u32 cid
,
2844 u32 l5_cid
, struct cnic_sock
**csk
, void *context
)
2846 struct cnic_local
*cp
= dev
->cnic_priv
;
2847 struct cnic_sock
*csk1
;
2849 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
2853 struct cnic_context
*ctx
= &cp
->ctx_tbl
[l5_cid
];
2855 if (test_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
))
2859 csk1
= &cp
->csk_tbl
[l5_cid
];
2860 if (atomic_read(&csk1
->ref_count
))
2863 if (test_and_set_bit(SK_F_INUSE
, &csk1
->flags
))
2868 csk1
->l5_cid
= l5_cid
;
2869 csk1
->ulp_type
= ulp_type
;
2870 csk1
->context
= context
;
2872 csk1
->ka_timeout
= DEF_KA_TIMEOUT
;
2873 csk1
->ka_interval
= DEF_KA_INTERVAL
;
2874 csk1
->ka_max_probe_count
= DEF_KA_MAX_PROBE_COUNT
;
2875 csk1
->tos
= DEF_TOS
;
2876 csk1
->ttl
= DEF_TTL
;
2877 csk1
->snd_seq_scale
= DEF_SND_SEQ_SCALE
;
2878 csk1
->rcv_buf
= DEF_RCV_BUF
;
2879 csk1
->snd_buf
= DEF_SND_BUF
;
2880 csk1
->seed
= DEF_SEED
;
2886 static void cnic_cm_cleanup(struct cnic_sock
*csk
)
2888 if (csk
->src_port
) {
2889 struct cnic_dev
*dev
= csk
->dev
;
2890 struct cnic_local
*cp
= dev
->cnic_priv
;
2892 cnic_free_id(&cp
->csk_port_tbl
, csk
->src_port
);
2897 static void cnic_close_conn(struct cnic_sock
*csk
)
2899 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
)) {
2900 cnic_cm_upload_pg(csk
);
2901 clear_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
);
2903 cnic_cm_cleanup(csk
);
2906 static int cnic_cm_destroy(struct cnic_sock
*csk
)
2908 if (!cnic_in_use(csk
))
2912 clear_bit(SK_F_INUSE
, &csk
->flags
);
2913 smp_mb__after_clear_bit();
2914 while (atomic_read(&csk
->ref_count
) != 1)
2916 cnic_cm_cleanup(csk
);
2923 static inline u16
cnic_get_vlan(struct net_device
*dev
,
2924 struct net_device
**vlan_dev
)
2926 if (dev
->priv_flags
& IFF_802_1Q_VLAN
) {
2927 *vlan_dev
= vlan_dev_real_dev(dev
);
2928 return vlan_dev_vlan_id(dev
);
2934 static int cnic_get_v4_route(struct sockaddr_in
*dst_addr
,
2935 struct dst_entry
**dst
)
2937 #if defined(CONFIG_INET)
2942 memset(&fl
, 0, sizeof(fl
));
2943 fl
.nl_u
.ip4_u
.daddr
= dst_addr
->sin_addr
.s_addr
;
2945 err
= ip_route_output_key(&init_net
, &rt
, &fl
);
2950 return -ENETUNREACH
;
2954 static int cnic_get_v6_route(struct sockaddr_in6
*dst_addr
,
2955 struct dst_entry
**dst
)
2957 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2960 memset(&fl
, 0, sizeof(fl
));
2961 ipv6_addr_copy(&fl
.fl6_dst
, &dst_addr
->sin6_addr
);
2962 if (ipv6_addr_type(&fl
.fl6_dst
) & IPV6_ADDR_LINKLOCAL
)
2963 fl
.oif
= dst_addr
->sin6_scope_id
;
2965 *dst
= ip6_route_output(&init_net
, NULL
, &fl
);
2970 return -ENETUNREACH
;
2973 static struct cnic_dev
*cnic_cm_select_dev(struct sockaddr_in
*dst_addr
,
2976 struct cnic_dev
*dev
= NULL
;
2977 struct dst_entry
*dst
;
2978 struct net_device
*netdev
= NULL
;
2979 int err
= -ENETUNREACH
;
2981 if (dst_addr
->sin_family
== AF_INET
)
2982 err
= cnic_get_v4_route(dst_addr
, &dst
);
2983 else if (dst_addr
->sin_family
== AF_INET6
) {
2984 struct sockaddr_in6
*dst_addr6
=
2985 (struct sockaddr_in6
*) dst_addr
;
2987 err
= cnic_get_v6_route(dst_addr6
, &dst
);
2997 cnic_get_vlan(dst
->dev
, &netdev
);
2999 dev
= cnic_from_netdev(netdev
);
3008 static int cnic_resolve_addr(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
3010 struct cnic_dev
*dev
= csk
->dev
;
3011 struct cnic_local
*cp
= dev
->cnic_priv
;
3013 return cnic_send_nlmsg(cp
, ISCSI_KEVENT_PATH_REQ
, csk
);
3016 static int cnic_get_route(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
3018 struct cnic_dev
*dev
= csk
->dev
;
3019 struct cnic_local
*cp
= dev
->cnic_priv
;
3021 struct dst_entry
*dst
= NULL
;
3022 struct net_device
*realdev
;
3025 if (saddr
->local
.v6
.sin6_family
== AF_INET6
&&
3026 saddr
->remote
.v6
.sin6_family
== AF_INET6
)
3028 else if (saddr
->local
.v4
.sin_family
== AF_INET
&&
3029 saddr
->remote
.v4
.sin_family
== AF_INET
)
3034 clear_bit(SK_F_IPV6
, &csk
->flags
);
3037 set_bit(SK_F_IPV6
, &csk
->flags
);
3038 cnic_get_v6_route(&saddr
->remote
.v6
, &dst
);
3040 memcpy(&csk
->dst_ip
[0], &saddr
->remote
.v6
.sin6_addr
,
3041 sizeof(struct in6_addr
));
3042 csk
->dst_port
= saddr
->remote
.v6
.sin6_port
;
3043 local_port
= saddr
->local
.v6
.sin6_port
;
3046 cnic_get_v4_route(&saddr
->remote
.v4
, &dst
);
3048 csk
->dst_ip
[0] = saddr
->remote
.v4
.sin_addr
.s_addr
;
3049 csk
->dst_port
= saddr
->remote
.v4
.sin_port
;
3050 local_port
= saddr
->local
.v4
.sin_port
;
3054 csk
->mtu
= dev
->netdev
->mtu
;
3055 if (dst
&& dst
->dev
) {
3056 u16 vlan
= cnic_get_vlan(dst
->dev
, &realdev
);
3057 if (realdev
== dev
->netdev
) {
3058 csk
->vlan_id
= vlan
;
3059 csk
->mtu
= dst_mtu(dst
);
3063 if (local_port
>= CNIC_LOCAL_PORT_MIN
&&
3064 local_port
< CNIC_LOCAL_PORT_MAX
) {
3065 if (cnic_alloc_id(&cp
->csk_port_tbl
, local_port
))
3071 local_port
= cnic_alloc_new_id(&cp
->csk_port_tbl
);
3072 if (local_port
== -1) {
3077 csk
->src_port
= local_port
;
3084 static void cnic_init_csk_state(struct cnic_sock
*csk
)
3087 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3088 clear_bit(SK_F_CLOSING
, &csk
->flags
);
3091 static int cnic_cm_connect(struct cnic_sock
*csk
, struct cnic_sockaddr
*saddr
)
3095 if (!cnic_in_use(csk
))
3098 if (test_and_set_bit(SK_F_CONNECT_START
, &csk
->flags
))
3101 cnic_init_csk_state(csk
);
3103 err
= cnic_get_route(csk
, saddr
);
3107 err
= cnic_resolve_addr(csk
, saddr
);
3112 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
3116 static int cnic_cm_abort(struct cnic_sock
*csk
)
3118 struct cnic_local
*cp
= csk
->dev
->cnic_priv
;
3119 u32 opcode
= L4_KCQE_OPCODE_VALUE_RESET_COMP
;
3121 if (!cnic_in_use(csk
))
3124 if (cnic_abort_prep(csk
))
3125 return cnic_cm_abort_req(csk
);
3127 /* Getting here means that we haven't started connect, or
3128 * connect was not successful.
3131 cp
->close_conn(csk
, opcode
);
3132 if (csk
->state
!= opcode
)
3138 static int cnic_cm_close(struct cnic_sock
*csk
)
3140 if (!cnic_in_use(csk
))
3143 if (cnic_close_prep(csk
)) {
3144 csk
->state
= L4_KCQE_OPCODE_VALUE_CLOSE_COMP
;
3145 return cnic_cm_close_req(csk
);
3152 static void cnic_cm_upcall(struct cnic_local
*cp
, struct cnic_sock
*csk
,
3155 struct cnic_ulp_ops
*ulp_ops
;
3156 int ulp_type
= csk
->ulp_type
;
3159 ulp_ops
= rcu_dereference(cp
->ulp_ops
[ulp_type
]);
3161 if (opcode
== L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
)
3162 ulp_ops
->cm_connect_complete(csk
);
3163 else if (opcode
== L4_KCQE_OPCODE_VALUE_CLOSE_COMP
)
3164 ulp_ops
->cm_close_complete(csk
);
3165 else if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
)
3166 ulp_ops
->cm_remote_abort(csk
);
3167 else if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_COMP
)
3168 ulp_ops
->cm_abort_complete(csk
);
3169 else if (opcode
== L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED
)
3170 ulp_ops
->cm_remote_close(csk
);
3175 static int cnic_cm_set_pg(struct cnic_sock
*csk
)
3177 if (cnic_offld_prep(csk
)) {
3178 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
))
3179 cnic_cm_update_pg(csk
);
3181 cnic_cm_offload_pg(csk
);
3186 static void cnic_cm_process_offld_pg(struct cnic_dev
*dev
, struct l4_kcq
*kcqe
)
3188 struct cnic_local
*cp
= dev
->cnic_priv
;
3189 u32 l5_cid
= kcqe
->pg_host_opaque
;
3190 u8 opcode
= kcqe
->op_code
;
3191 struct cnic_sock
*csk
= &cp
->csk_tbl
[l5_cid
];
3194 if (!cnic_in_use(csk
))
3197 if (opcode
== L4_KCQE_OPCODE_VALUE_UPDATE_PG
) {
3198 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3201 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3202 if (kcqe
->status
== L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL
) {
3203 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3204 cnic_cm_upcall(cp
, csk
,
3205 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
);
3209 csk
->pg_cid
= kcqe
->pg_cid
;
3210 set_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
);
3211 cnic_cm_conn_req(csk
);
3217 static void cnic_cm_process_kcqe(struct cnic_dev
*dev
, struct kcqe
*kcqe
)
3219 struct cnic_local
*cp
= dev
->cnic_priv
;
3220 struct l4_kcq
*l4kcqe
= (struct l4_kcq
*) kcqe
;
3221 u8 opcode
= l4kcqe
->op_code
;
3223 struct cnic_sock
*csk
;
3225 if (opcode
== L4_KCQE_OPCODE_VALUE_OFFLOAD_PG
||
3226 opcode
== L4_KCQE_OPCODE_VALUE_UPDATE_PG
) {
3227 cnic_cm_process_offld_pg(dev
, l4kcqe
);
3231 l5_cid
= l4kcqe
->conn_id
;
3233 l5_cid
= l4kcqe
->cid
;
3234 if (l5_cid
>= MAX_CM_SK_TBL_SZ
)
3237 csk
= &cp
->csk_tbl
[l5_cid
];
3240 if (!cnic_in_use(csk
)) {
3246 case L5CM_RAMROD_CMD_ID_TCP_CONNECT
:
3247 if (l4kcqe
->status
!= 0) {
3248 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3249 cnic_cm_upcall(cp
, csk
,
3250 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
);
3253 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE
:
3254 if (l4kcqe
->status
== 0)
3255 set_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
);
3257 smp_mb__before_clear_bit();
3258 clear_bit(SK_F_OFFLD_SCHED
, &csk
->flags
);
3259 cnic_cm_upcall(cp
, csk
, opcode
);
3262 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
:
3263 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP
:
3264 case L4_KCQE_OPCODE_VALUE_RESET_COMP
:
3265 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
:
3266 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
:
3267 cp
->close_conn(csk
, opcode
);
3270 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED
:
3271 cnic_cm_upcall(cp
, csk
, opcode
);
3277 static void cnic_cm_indicate_kcqe(void *data
, struct kcqe
*kcqe
[], u32 num
)
3279 struct cnic_dev
*dev
= data
;
3282 for (i
= 0; i
< num
; i
++)
3283 cnic_cm_process_kcqe(dev
, kcqe
[i
]);
3286 static struct cnic_ulp_ops cm_ulp_ops
= {
3287 .indicate_kcqes
= cnic_cm_indicate_kcqe
,
3290 static void cnic_cm_free_mem(struct cnic_dev
*dev
)
3292 struct cnic_local
*cp
= dev
->cnic_priv
;
3296 cnic_free_id_tbl(&cp
->csk_port_tbl
);
3299 static int cnic_cm_alloc_mem(struct cnic_dev
*dev
)
3301 struct cnic_local
*cp
= dev
->cnic_priv
;
3303 cp
->csk_tbl
= kzalloc(sizeof(struct cnic_sock
) * MAX_CM_SK_TBL_SZ
,
3308 if (cnic_init_id_tbl(&cp
->csk_port_tbl
, CNIC_LOCAL_PORT_RANGE
,
3309 CNIC_LOCAL_PORT_MIN
)) {
3310 cnic_cm_free_mem(dev
);
3316 static int cnic_ready_to_close(struct cnic_sock
*csk
, u32 opcode
)
3318 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE
, &csk
->flags
)) {
3319 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3320 opcode
= L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
;
3321 csk
->state
= opcode
;
3324 /* 1. If event opcode matches the expected event in csk->state
3325 * 2. If the expected event is CLOSE_COMP, we accept any event
3326 * 3. If the expected event is 0, meaning the connection was never
3327 * never established, we accept the opcode from cm_abort.
3329 if (opcode
== csk
->state
|| csk
->state
== 0 ||
3330 csk
->state
== L4_KCQE_OPCODE_VALUE_CLOSE_COMP
) {
3331 if (!test_and_set_bit(SK_F_CLOSING
, &csk
->flags
)) {
3332 if (csk
->state
== 0)
3333 csk
->state
= opcode
;
3340 static void cnic_close_bnx2_conn(struct cnic_sock
*csk
, u32 opcode
)
3342 struct cnic_dev
*dev
= csk
->dev
;
3343 struct cnic_local
*cp
= dev
->cnic_priv
;
3345 if (opcode
== L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
) {
3346 cnic_cm_upcall(cp
, csk
, opcode
);
3350 clear_bit(SK_F_CONNECT_START
, &csk
->flags
);
3351 cnic_close_conn(csk
);
3352 csk
->state
= opcode
;
3353 cnic_cm_upcall(cp
, csk
, opcode
);
3356 static void cnic_cm_stop_bnx2_hw(struct cnic_dev
*dev
)
3360 static int cnic_cm_init_bnx2_hw(struct cnic_dev
*dev
)
3364 get_random_bytes(&seed
, 4);
3365 cnic_ctx_wr(dev
, 45, 0, seed
);
3369 static void cnic_close_bnx2x_conn(struct cnic_sock
*csk
, u32 opcode
)
3371 struct cnic_dev
*dev
= csk
->dev
;
3372 struct cnic_local
*cp
= dev
->cnic_priv
;
3373 struct cnic_context
*ctx
= &cp
->ctx_tbl
[csk
->l5_cid
];
3374 union l5cm_specific_data l5_data
;
3376 int close_complete
= 0;
3379 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED
:
3380 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP
:
3381 case L4_KCQE_OPCODE_VALUE_RESET_COMP
:
3382 if (cnic_ready_to_close(csk
, opcode
)) {
3383 if (test_bit(SK_F_PG_OFFLD_COMPLETE
, &csk
->flags
))
3384 cmd
= L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
;
3389 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE
:
3390 cmd
= L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
;
3392 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD
:
3397 memset(&l5_data
, 0, sizeof(l5_data
));
3399 cnic_submit_kwqe_16(dev
, cmd
, csk
->cid
, ISCSI_CONNECTION_TYPE
,
3401 } else if (close_complete
) {
3402 ctx
->timestamp
= jiffies
;
3403 cnic_close_conn(csk
);
3404 cnic_cm_upcall(cp
, csk
, csk
->state
);
3408 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev
*dev
)
3410 struct cnic_local
*cp
= dev
->cnic_priv
;
3416 if (!netif_running(dev
->netdev
))
3419 for (i
= 0; i
< cp
->max_cid_space
; i
++) {
3420 struct cnic_context
*ctx
= &cp
->ctx_tbl
[i
];
3422 while (test_bit(CTX_FL_DELETE_WAIT
, &ctx
->ctx_flags
))
3425 if (test_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
))
3426 netdev_warn(dev
->netdev
, "CID %x not deleted\n",
3430 cancel_delayed_work(&cp
->delete_task
);
3431 flush_workqueue(cnic_wq
);
3433 if (atomic_read(&cp
->iscsi_conn
) != 0)
3434 netdev_warn(dev
->netdev
, "%d iSCSI connections not destroyed\n",
3435 atomic_read(&cp
->iscsi_conn
));
3438 static int cnic_cm_init_bnx2x_hw(struct cnic_dev
*dev
)
3440 struct cnic_local
*cp
= dev
->cnic_priv
;
3441 u32 pfid
= cp
->pfid
;
3442 u32 port
= CNIC_PORT(cp
);
3444 cnic_init_bnx2x_mac(dev
);
3445 cnic_bnx2x_set_tcp_timestamp(dev
, 1);
3447 CNIC_WR16(dev
, BAR_XSTRORM_INTMEM
+
3448 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid
), 0);
3450 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3451 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port
), 1);
3452 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3453 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port
),
3456 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3457 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid
), DEF_TTL
);
3458 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3459 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid
), DEF_TOS
);
3460 CNIC_WR8(dev
, BAR_XSTRORM_INTMEM
+
3461 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid
), 2);
3462 CNIC_WR(dev
, BAR_XSTRORM_INTMEM
+
3463 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid
), DEF_SWS_TIMER
);
3465 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+ TSTORM_TCP_MAX_CWND_OFFSET(pfid
),
3470 static void cnic_delete_task(struct work_struct
*work
)
3472 struct cnic_local
*cp
;
3473 struct cnic_dev
*dev
;
3475 int need_resched
= 0;
3477 cp
= container_of(work
, struct cnic_local
, delete_task
.work
);
3480 for (i
= 0; i
< cp
->max_cid_space
; i
++) {
3481 struct cnic_context
*ctx
= &cp
->ctx_tbl
[i
];
3483 if (!test_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
) ||
3484 !test_bit(CTX_FL_DELETE_WAIT
, &ctx
->ctx_flags
))
3487 if (!time_after(jiffies
, ctx
->timestamp
+ (2 * HZ
))) {
3492 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT
, &ctx
->ctx_flags
))
3495 cnic_bnx2x_destroy_ramrod(dev
, i
);
3497 cnic_free_bnx2x_conn_resc(dev
, i
);
3498 if (ctx
->ulp_proto_id
== CNIC_ULP_ISCSI
)
3499 atomic_dec(&cp
->iscsi_conn
);
3501 clear_bit(CTX_FL_OFFLD_START
, &ctx
->ctx_flags
);
3505 queue_delayed_work(cnic_wq
, &cp
->delete_task
,
3506 msecs_to_jiffies(10));
3510 static int cnic_cm_open(struct cnic_dev
*dev
)
3512 struct cnic_local
*cp
= dev
->cnic_priv
;
3515 err
= cnic_cm_alloc_mem(dev
);
3519 err
= cp
->start_cm(dev
);
3524 INIT_DELAYED_WORK(&cp
->delete_task
, cnic_delete_task
);
3526 dev
->cm_create
= cnic_cm_create
;
3527 dev
->cm_destroy
= cnic_cm_destroy
;
3528 dev
->cm_connect
= cnic_cm_connect
;
3529 dev
->cm_abort
= cnic_cm_abort
;
3530 dev
->cm_close
= cnic_cm_close
;
3531 dev
->cm_select_dev
= cnic_cm_select_dev
;
3533 cp
->ulp_handle
[CNIC_ULP_L4
] = dev
;
3534 rcu_assign_pointer(cp
->ulp_ops
[CNIC_ULP_L4
], &cm_ulp_ops
);
3538 cnic_cm_free_mem(dev
);
3542 static int cnic_cm_shutdown(struct cnic_dev
*dev
)
3544 struct cnic_local
*cp
= dev
->cnic_priv
;
3552 for (i
= 0; i
< MAX_CM_SK_TBL_SZ
; i
++) {
3553 struct cnic_sock
*csk
= &cp
->csk_tbl
[i
];
3555 clear_bit(SK_F_INUSE
, &csk
->flags
);
3556 cnic_cm_cleanup(csk
);
3558 cnic_cm_free_mem(dev
);
3563 static void cnic_init_context(struct cnic_dev
*dev
, u32 cid
)
3568 cid_addr
= GET_CID_ADDR(cid
);
3570 for (i
= 0; i
< CTX_SIZE
; i
+= 4)
3571 cnic_ctx_wr(dev
, cid_addr
, i
, 0);
3574 static int cnic_setup_5709_context(struct cnic_dev
*dev
, int valid
)
3576 struct cnic_local
*cp
= dev
->cnic_priv
;
3578 u32 valid_bit
= valid
? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID
: 0;
3580 if (CHIP_NUM(cp
) != CHIP_NUM_5709
)
3583 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
3585 u32 idx
= cp
->ctx_arr
[i
].cid
/ cp
->cids_per_blk
;
3588 memset(cp
->ctx_arr
[i
].ctx
, 0, BCM_PAGE_SIZE
);
3590 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_DATA0
,
3591 (cp
->ctx_arr
[i
].mapping
& 0xffffffff) | valid_bit
);
3592 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_DATA1
,
3593 (u64
) cp
->ctx_arr
[i
].mapping
>> 32);
3594 CNIC_WR(dev
, BNX2_CTX_HOST_PAGE_TBL_CTRL
, idx
|
3595 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
);
3596 for (j
= 0; j
< 10; j
++) {
3598 val
= CNIC_RD(dev
, BNX2_CTX_HOST_PAGE_TBL_CTRL
);
3599 if (!(val
& BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
))
3603 if (val
& BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ
) {
3611 static void cnic_free_irq(struct cnic_dev
*dev
)
3613 struct cnic_local
*cp
= dev
->cnic_priv
;
3614 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3616 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3617 cp
->disable_int_sync(dev
);
3618 tasklet_kill(&cp
->cnic_irq_task
);
3619 free_irq(ethdev
->irq_arr
[0].vector
, dev
);
3623 static int cnic_request_irq(struct cnic_dev
*dev
)
3625 struct cnic_local
*cp
= dev
->cnic_priv
;
3626 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3629 err
= request_irq(ethdev
->irq_arr
[0].vector
, cnic_irq
, 0, "cnic", dev
);
3631 tasklet_disable(&cp
->cnic_irq_task
);
3636 static int cnic_init_bnx2_irq(struct cnic_dev
*dev
)
3638 struct cnic_local
*cp
= dev
->cnic_priv
;
3639 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3641 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3643 int sblk_num
= cp
->status_blk_num
;
3644 u32 base
= ((sblk_num
- 1) * BNX2_HC_SB_CONFIG_SIZE
) +
3645 BNX2_HC_SB_CONFIG_1
;
3647 CNIC_WR(dev
, base
, BNX2_HC_SB_CONFIG_1_ONE_SHOT
);
3649 CNIC_WR(dev
, base
+ BNX2_HC_COMP_PROD_TRIP_OFF
, (2 << 16) | 8);
3650 CNIC_WR(dev
, base
+ BNX2_HC_COM_TICKS_OFF
, (64 << 16) | 220);
3651 CNIC_WR(dev
, base
+ BNX2_HC_CMD_TICKS_OFF
, (64 << 16) | 220);
3653 cp
->last_status_idx
= cp
->status_blk
.bnx2
->status_idx
;
3654 tasklet_init(&cp
->cnic_irq_task
, cnic_service_bnx2_msix
,
3655 (unsigned long) dev
);
3656 err
= cnic_request_irq(dev
);
3660 while (cp
->status_blk
.bnx2
->status_completion_producer_index
&&
3662 CNIC_WR(dev
, BNX2_HC_COALESCE_NOW
,
3663 1 << (11 + sblk_num
));
3668 if (cp
->status_blk
.bnx2
->status_completion_producer_index
) {
3674 struct status_block
*sblk
= cp
->status_blk
.gen
;
3675 u32 hc_cmd
= CNIC_RD(dev
, BNX2_HC_COMMAND
);
3678 while (sblk
->status_completion_producer_index
&& i
< 10) {
3679 CNIC_WR(dev
, BNX2_HC_COMMAND
,
3680 hc_cmd
| BNX2_HC_COMMAND_COAL_NOW_WO_INT
);
3685 if (sblk
->status_completion_producer_index
)
3692 netdev_err(dev
->netdev
, "KCQ index not resetting to 0\n");
3696 static void cnic_enable_bnx2_int(struct cnic_dev
*dev
)
3698 struct cnic_local
*cp
= dev
->cnic_priv
;
3699 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3701 if (!(ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
3704 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
3705 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
| cp
->last_status_idx
);
3708 static void cnic_disable_bnx2_int_sync(struct cnic_dev
*dev
)
3710 struct cnic_local
*cp
= dev
->cnic_priv
;
3711 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3713 if (!(ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
))
3716 CNIC_WR(dev
, BNX2_PCICFG_INT_ACK_CMD
, cp
->int_num
|
3717 BNX2_PCICFG_INT_ACK_CMD_MASK_INT
);
3718 CNIC_RD(dev
, BNX2_PCICFG_INT_ACK_CMD
);
3719 synchronize_irq(ethdev
->irq_arr
[0].vector
);
3722 static void cnic_init_bnx2_tx_ring(struct cnic_dev
*dev
)
3724 struct cnic_local
*cp
= dev
->cnic_priv
;
3725 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3726 struct cnic_uio_dev
*udev
= cp
->udev
;
3727 u32 cid_addr
, tx_cid
, sb_id
;
3728 u32 val
, offset0
, offset1
, offset2
, offset3
;
3731 dma_addr_t buf_map
, ring_map
= udev
->l2_ring_map
;
3732 struct status_block
*s_blk
= cp
->status_blk
.gen
;
3734 sb_id
= cp
->status_blk_num
;
3736 cp
->tx_cons_ptr
= &s_blk
->status_tx_quick_consumer_index2
;
3737 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3738 struct status_block_msix
*sblk
= cp
->status_blk
.bnx2
;
3740 tx_cid
= TX_TSS_CID
+ sb_id
- 1;
3741 CNIC_WR(dev
, BNX2_TSCH_TSS_CFG
, (sb_id
<< 24) |
3743 cp
->tx_cons_ptr
= &sblk
->status_tx_quick_consumer_index
;
3745 cp
->tx_cons
= *cp
->tx_cons_ptr
;
3747 cid_addr
= GET_CID_ADDR(tx_cid
);
3748 if (CHIP_NUM(cp
) == CHIP_NUM_5709
) {
3749 u32 cid_addr2
= GET_CID_ADDR(tx_cid
+ 4) + 0x40;
3751 for (i
= 0; i
< PHY_CTX_SIZE
; i
+= 4)
3752 cnic_ctx_wr(dev
, cid_addr2
, i
, 0);
3754 offset0
= BNX2_L2CTX_TYPE_XI
;
3755 offset1
= BNX2_L2CTX_CMD_TYPE_XI
;
3756 offset2
= BNX2_L2CTX_TBDR_BHADDR_HI_XI
;
3757 offset3
= BNX2_L2CTX_TBDR_BHADDR_LO_XI
;
3759 cnic_init_context(dev
, tx_cid
);
3760 cnic_init_context(dev
, tx_cid
+ 1);
3762 offset0
= BNX2_L2CTX_TYPE
;
3763 offset1
= BNX2_L2CTX_CMD_TYPE
;
3764 offset2
= BNX2_L2CTX_TBDR_BHADDR_HI
;
3765 offset3
= BNX2_L2CTX_TBDR_BHADDR_LO
;
3767 val
= BNX2_L2CTX_TYPE_TYPE_L2
| BNX2_L2CTX_TYPE_SIZE_L2
;
3768 cnic_ctx_wr(dev
, cid_addr
, offset0
, val
);
3770 val
= BNX2_L2CTX_CMD_TYPE_TYPE_L2
| (8 << 16);
3771 cnic_ctx_wr(dev
, cid_addr
, offset1
, val
);
3773 txbd
= (struct tx_bd
*) udev
->l2_ring
;
3775 buf_map
= udev
->l2_buf_map
;
3776 for (i
= 0; i
< MAX_TX_DESC_CNT
; i
++, txbd
++) {
3777 txbd
->tx_bd_haddr_hi
= (u64
) buf_map
>> 32;
3778 txbd
->tx_bd_haddr_lo
= (u64
) buf_map
& 0xffffffff;
3780 val
= (u64
) ring_map
>> 32;
3781 cnic_ctx_wr(dev
, cid_addr
, offset2
, val
);
3782 txbd
->tx_bd_haddr_hi
= val
;
3784 val
= (u64
) ring_map
& 0xffffffff;
3785 cnic_ctx_wr(dev
, cid_addr
, offset3
, val
);
3786 txbd
->tx_bd_haddr_lo
= val
;
3789 static void cnic_init_bnx2_rx_ring(struct cnic_dev
*dev
)
3791 struct cnic_local
*cp
= dev
->cnic_priv
;
3792 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3793 struct cnic_uio_dev
*udev
= cp
->udev
;
3794 u32 cid_addr
, sb_id
, val
, coal_reg
, coal_val
;
3797 struct status_block
*s_blk
= cp
->status_blk
.gen
;
3798 dma_addr_t ring_map
= udev
->l2_ring_map
;
3800 sb_id
= cp
->status_blk_num
;
3801 cnic_init_context(dev
, 2);
3802 cp
->rx_cons_ptr
= &s_blk
->status_rx_quick_consumer_index2
;
3803 coal_reg
= BNX2_HC_COMMAND
;
3804 coal_val
= CNIC_RD(dev
, coal_reg
);
3805 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3806 struct status_block_msix
*sblk
= cp
->status_blk
.bnx2
;
3808 cp
->rx_cons_ptr
= &sblk
->status_rx_quick_consumer_index
;
3809 coal_reg
= BNX2_HC_COALESCE_NOW
;
3810 coal_val
= 1 << (11 + sb_id
);
3813 while (!(*cp
->rx_cons_ptr
!= 0) && i
< 10) {
3814 CNIC_WR(dev
, coal_reg
, coal_val
);
3819 cp
->rx_cons
= *cp
->rx_cons_ptr
;
3821 cid_addr
= GET_CID_ADDR(2);
3822 val
= BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE
|
3823 BNX2_L2CTX_CTX_TYPE_SIZE_L2
| (0x02 << 8);
3824 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_CTX_TYPE
, val
);
3827 val
= 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT
;
3829 val
= BNX2_L2CTX_L2_STATUSB_NUM(sb_id
);
3830 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_HOST_BDIDX
, val
);
3832 rxbd
= (struct rx_bd
*) (udev
->l2_ring
+ BCM_PAGE_SIZE
);
3833 for (i
= 0; i
< MAX_RX_DESC_CNT
; i
++, rxbd
++) {
3835 int n
= (i
% cp
->l2_rx_ring_size
) + 1;
3837 buf_map
= udev
->l2_buf_map
+ (n
* cp
->l2_single_buf_size
);
3838 rxbd
->rx_bd_len
= cp
->l2_single_buf_size
;
3839 rxbd
->rx_bd_flags
= RX_BD_FLAGS_START
| RX_BD_FLAGS_END
;
3840 rxbd
->rx_bd_haddr_hi
= (u64
) buf_map
>> 32;
3841 rxbd
->rx_bd_haddr_lo
= (u64
) buf_map
& 0xffffffff;
3843 val
= (u64
) (ring_map
+ BCM_PAGE_SIZE
) >> 32;
3844 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_NX_BDHADDR_HI
, val
);
3845 rxbd
->rx_bd_haddr_hi
= val
;
3847 val
= (u64
) (ring_map
+ BCM_PAGE_SIZE
) & 0xffffffff;
3848 cnic_ctx_wr(dev
, cid_addr
, BNX2_L2CTX_NX_BDHADDR_LO
, val
);
3849 rxbd
->rx_bd_haddr_lo
= val
;
3851 val
= cnic_reg_rd_ind(dev
, BNX2_RXP_SCRATCH_RXP_FLOOD
);
3852 cnic_reg_wr_ind(dev
, BNX2_RXP_SCRATCH_RXP_FLOOD
, val
| (1 << 2));
3855 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev
*dev
)
3857 struct kwqe
*wqes
[1], l2kwqe
;
3859 memset(&l2kwqe
, 0, sizeof(l2kwqe
));
3861 l2kwqe
.kwqe_op_flag
= (L2_LAYER_CODE
<< KWQE_FLAGS_LAYER_SHIFT
) |
3862 (L2_KWQE_OPCODE_VALUE_FLUSH
<<
3863 KWQE_OPCODE_SHIFT
) | 2;
3864 dev
->submit_kwqes(dev
, wqes
, 1);
3867 static void cnic_set_bnx2_mac(struct cnic_dev
*dev
)
3869 struct cnic_local
*cp
= dev
->cnic_priv
;
3872 val
= cp
->func
<< 2;
3874 cp
->shmem_base
= cnic_reg_rd_ind(dev
, BNX2_SHM_HDR_ADDR_0
+ val
);
3876 val
= cnic_reg_rd_ind(dev
, cp
->shmem_base
+
3877 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER
);
3878 dev
->mac_addr
[0] = (u8
) (val
>> 8);
3879 dev
->mac_addr
[1] = (u8
) val
;
3881 CNIC_WR(dev
, BNX2_EMAC_MAC_MATCH4
, val
);
3883 val
= cnic_reg_rd_ind(dev
, cp
->shmem_base
+
3884 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER
);
3885 dev
->mac_addr
[2] = (u8
) (val
>> 24);
3886 dev
->mac_addr
[3] = (u8
) (val
>> 16);
3887 dev
->mac_addr
[4] = (u8
) (val
>> 8);
3888 dev
->mac_addr
[5] = (u8
) val
;
3890 CNIC_WR(dev
, BNX2_EMAC_MAC_MATCH5
, val
);
3892 val
= 4 | BNX2_RPM_SORT_USER2_BC_EN
;
3893 if (CHIP_NUM(cp
) != CHIP_NUM_5709
)
3894 val
|= BNX2_RPM_SORT_USER2_PROM_VLAN
;
3896 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, 0x0);
3897 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, val
);
3898 CNIC_WR(dev
, BNX2_RPM_SORT_USER2
, val
| BNX2_RPM_SORT_USER2_ENA
);
3901 static int cnic_start_bnx2_hw(struct cnic_dev
*dev
)
3903 struct cnic_local
*cp
= dev
->cnic_priv
;
3904 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
3905 struct status_block
*sblk
= cp
->status_blk
.gen
;
3906 u32 val
, kcq_cid_addr
, kwq_cid_addr
;
3909 cnic_set_bnx2_mac(dev
);
3911 val
= CNIC_RD(dev
, BNX2_MQ_CONFIG
);
3912 val
&= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE
;
3913 if (BCM_PAGE_BITS
> 12)
3914 val
|= (12 - 8) << 4;
3916 val
|= (BCM_PAGE_BITS
- 8) << 4;
3918 CNIC_WR(dev
, BNX2_MQ_CONFIG
, val
);
3920 CNIC_WR(dev
, BNX2_HC_COMP_PROD_TRIP
, (2 << 16) | 8);
3921 CNIC_WR(dev
, BNX2_HC_COM_TICKS
, (64 << 16) | 220);
3922 CNIC_WR(dev
, BNX2_HC_CMD_TICKS
, (64 << 16) | 220);
3924 err
= cnic_setup_5709_context(dev
, 1);
3928 cnic_init_context(dev
, KWQ_CID
);
3929 cnic_init_context(dev
, KCQ_CID
);
3931 kwq_cid_addr
= GET_CID_ADDR(KWQ_CID
);
3932 cp
->kwq_io_addr
= MB_GET_CID_ADDR(KWQ_CID
) + L5_KRNLQ_HOST_QIDX
;
3934 cp
->max_kwq_idx
= MAX_KWQ_IDX
;
3935 cp
->kwq_prod_idx
= 0;
3936 cp
->kwq_con_idx
= 0;
3937 set_bit(CNIC_LCL_FL_KWQ_INIT
, &cp
->cnic_local_flags
);
3939 if (CHIP_NUM(cp
) == CHIP_NUM_5706
|| CHIP_NUM(cp
) == CHIP_NUM_5708
)
3940 cp
->kwq_con_idx_ptr
= &sblk
->status_rx_quick_consumer_index15
;
3942 cp
->kwq_con_idx_ptr
= &sblk
->status_cmd_consumer_index
;
3944 /* Initialize the kernel work queue context. */
3945 val
= KRNLQ_TYPE_TYPE_KRNLQ
| KRNLQ_SIZE_TYPE_SIZE
|
3946 (BCM_PAGE_BITS
- 8) | KRNLQ_FLAGS_QE_SELF_SEQ
;
3947 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_TYPE
, val
);
3949 val
= (BCM_PAGE_SIZE
/ sizeof(struct kwqe
) - 1) << 16;
3950 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_QE_SELF_SEQ_MAX
, val
);
3952 val
= ((BCM_PAGE_SIZE
/ sizeof(struct kwqe
)) << 16) | KWQ_PAGE_CNT
;
3953 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_NPAGES
, val
);
3955 val
= (u32
) ((u64
) cp
->kwq_info
.pgtbl_map
>> 32);
3956 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_HI
, val
);
3958 val
= (u32
) cp
->kwq_info
.pgtbl_map
;
3959 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_LO
, val
);
3961 kcq_cid_addr
= GET_CID_ADDR(KCQ_CID
);
3962 cp
->kcq1
.io_addr
= MB_GET_CID_ADDR(KCQ_CID
) + L5_KRNLQ_HOST_QIDX
;
3964 cp
->kcq1
.sw_prod_idx
= 0;
3965 cp
->kcq1
.hw_prod_idx_ptr
=
3966 (u16
*) &sblk
->status_completion_producer_index
;
3968 cp
->kcq1
.status_idx_ptr
= (u16
*) &sblk
->status_idx
;
3970 /* Initialize the kernel complete queue context. */
3971 val
= KRNLQ_TYPE_TYPE_KRNLQ
| KRNLQ_SIZE_TYPE_SIZE
|
3972 (BCM_PAGE_BITS
- 8) | KRNLQ_FLAGS_QE_SELF_SEQ
;
3973 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_TYPE
, val
);
3975 val
= (BCM_PAGE_SIZE
/ sizeof(struct kcqe
) - 1) << 16;
3976 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_QE_SELF_SEQ_MAX
, val
);
3978 val
= ((BCM_PAGE_SIZE
/ sizeof(struct kcqe
)) << 16) | KCQ_PAGE_CNT
;
3979 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_NPAGES
, val
);
3981 val
= (u32
) ((u64
) cp
->kcq1
.dma
.pgtbl_map
>> 32);
3982 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_HI
, val
);
3984 val
= (u32
) cp
->kcq1
.dma
.pgtbl_map
;
3985 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_PGTBL_HADDR_LO
, val
);
3988 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
) {
3989 struct status_block_msix
*msblk
= cp
->status_blk
.bnx2
;
3990 u32 sb_id
= cp
->status_blk_num
;
3991 u32 sb
= BNX2_L2CTX_L5_STATUSB_NUM(sb_id
);
3993 cp
->kcq1
.hw_prod_idx_ptr
=
3994 (u16
*) &msblk
->status_completion_producer_index
;
3995 cp
->kcq1
.status_idx_ptr
= (u16
*) &msblk
->status_idx
;
3996 cp
->kwq_con_idx_ptr
= (u16
*) &msblk
->status_cmd_consumer_index
;
3997 cp
->int_num
= sb_id
<< BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT
;
3998 cnic_ctx_wr(dev
, kwq_cid_addr
, L5_KRNLQ_HOST_QIDX
, sb
);
3999 cnic_ctx_wr(dev
, kcq_cid_addr
, L5_KRNLQ_HOST_QIDX
, sb
);
4002 /* Enable Commnad Scheduler notification when we write to the
4003 * host producer index of the kernel contexts. */
4004 CNIC_WR(dev
, BNX2_MQ_KNL_CMD_MASK1
, 2);
4006 /* Enable Command Scheduler notification when we write to either
4007 * the Send Queue or Receive Queue producer indexes of the kernel
4008 * bypass contexts. */
4009 CNIC_WR(dev
, BNX2_MQ_KNL_BYP_CMD_MASK1
, 7);
4010 CNIC_WR(dev
, BNX2_MQ_KNL_BYP_WRITE_MASK1
, 7);
4012 /* Notify COM when the driver post an application buffer. */
4013 CNIC_WR(dev
, BNX2_MQ_KNL_RX_V2P_MASK2
, 0x2000);
4015 /* Set the CP and COM doorbells. These two processors polls the
4016 * doorbell for a non zero value before running. This must be done
4017 * after setting up the kernel queue contexts. */
4018 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 1);
4019 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 1);
4021 cnic_init_bnx2_tx_ring(dev
);
4022 cnic_init_bnx2_rx_ring(dev
);
4024 err
= cnic_init_bnx2_irq(dev
);
4026 netdev_err(dev
->netdev
, "cnic_init_irq failed\n");
4027 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 0);
4028 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 0);
4035 static void cnic_setup_bnx2x_context(struct cnic_dev
*dev
)
4037 struct cnic_local
*cp
= dev
->cnic_priv
;
4038 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4039 u32 start_offset
= ethdev
->ctx_tbl_offset
;
4042 for (i
= 0; i
< cp
->ctx_blks
; i
++) {
4043 struct cnic_ctx
*ctx
= &cp
->ctx_arr
[i
];
4044 dma_addr_t map
= ctx
->mapping
;
4046 if (cp
->ctx_align
) {
4047 unsigned long mask
= cp
->ctx_align
- 1;
4049 map
= (map
+ mask
) & ~mask
;
4052 cnic_ctx_tbl_wr(dev
, start_offset
+ i
, map
);
4056 static int cnic_init_bnx2x_irq(struct cnic_dev
*dev
)
4058 struct cnic_local
*cp
= dev
->cnic_priv
;
4059 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4062 tasklet_init(&cp
->cnic_irq_task
, cnic_service_bnx2x_bh
,
4063 (unsigned long) dev
);
4064 if (ethdev
->drv_state
& CNIC_DRV_STATE_USING_MSIX
)
4065 err
= cnic_request_irq(dev
);
4070 static inline void cnic_storm_memset_hc_disable(struct cnic_dev
*dev
,
4071 u16 sb_id
, u8 sb_index
,
4075 u32 addr
= BAR_CSTRORM_INTMEM
+
4076 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id
) +
4077 offsetof(struct hc_status_block_data_e1x
, index_data
) +
4078 sizeof(struct hc_index_data
)*sb_index
+
4079 offsetof(struct hc_index_data
, flags
);
4080 u16 flags
= CNIC_RD16(dev
, addr
);
4082 flags
&= ~HC_INDEX_DATA_HC_ENABLED
;
4083 flags
|= (((~disable
) << HC_INDEX_DATA_HC_ENABLED_SHIFT
) &
4084 HC_INDEX_DATA_HC_ENABLED
);
4085 CNIC_WR16(dev
, addr
, flags
);
4088 static void cnic_enable_bnx2x_int(struct cnic_dev
*dev
)
4090 struct cnic_local
*cp
= dev
->cnic_priv
;
4091 u8 sb_id
= cp
->status_blk_num
;
4093 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
4094 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id
) +
4095 offsetof(struct hc_status_block_data_e1x
, index_data
) +
4096 sizeof(struct hc_index_data
)*HC_INDEX_ISCSI_EQ_CONS
+
4097 offsetof(struct hc_index_data
, timeout
), 64 / 12);
4098 cnic_storm_memset_hc_disable(dev
, sb_id
, HC_INDEX_ISCSI_EQ_CONS
, 0);
4101 static void cnic_disable_bnx2x_int_sync(struct cnic_dev
*dev
)
4105 static void cnic_init_bnx2x_tx_ring(struct cnic_dev
*dev
,
4106 struct client_init_ramrod_data
*data
)
4108 struct cnic_local
*cp
= dev
->cnic_priv
;
4109 struct cnic_uio_dev
*udev
= cp
->udev
;
4110 union eth_tx_bd_types
*txbd
= (union eth_tx_bd_types
*) udev
->l2_ring
;
4111 dma_addr_t buf_map
, ring_map
= udev
->l2_ring_map
;
4112 struct host_sp_status_block
*sb
= cp
->bnx2x_def_status_blk
;
4113 int port
= CNIC_PORT(cp
);
4115 int cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4118 memset(txbd
, 0, BCM_PAGE_SIZE
);
4120 buf_map
= udev
->l2_buf_map
;
4121 for (i
= 0; i
< MAX_TX_DESC_CNT
; i
+= 3, txbd
+= 3) {
4122 struct eth_tx_start_bd
*start_bd
= &txbd
->start_bd
;
4123 struct eth_tx_bd
*reg_bd
= &((txbd
+ 2)->reg_bd
);
4125 start_bd
->addr_hi
= cpu_to_le32((u64
) buf_map
>> 32);
4126 start_bd
->addr_lo
= cpu_to_le32(buf_map
& 0xffffffff);
4127 reg_bd
->addr_hi
= start_bd
->addr_hi
;
4128 reg_bd
->addr_lo
= start_bd
->addr_lo
+ 0x10;
4129 start_bd
->nbytes
= cpu_to_le16(0x10);
4130 start_bd
->nbd
= cpu_to_le16(3);
4131 start_bd
->bd_flags
.as_bitfield
= ETH_TX_BD_FLAGS_START_BD
;
4132 start_bd
->general_data
= (UNICAST_ADDRESS
<<
4133 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT
);
4134 start_bd
->general_data
|= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT
);
4138 val
= (u64
) ring_map
>> 32;
4139 txbd
->next_bd
.addr_hi
= cpu_to_le32(val
);
4141 data
->tx
.tx_bd_page_base
.hi
= cpu_to_le32(val
);
4143 val
= (u64
) ring_map
& 0xffffffff;
4144 txbd
->next_bd
.addr_lo
= cpu_to_le32(val
);
4146 data
->tx
.tx_bd_page_base
.lo
= cpu_to_le32(val
);
4148 /* Other ramrod params */
4149 data
->tx
.tx_sb_index_number
= HC_SP_INDEX_ETH_ISCSI_CQ_CONS
;
4150 data
->tx
.tx_status_block_id
= BNX2X_DEF_SB_ID
;
4152 /* reset xstorm per client statistics */
4153 if (cli
< MAX_STAT_COUNTER_ID
) {
4154 val
= BAR_XSTRORM_INTMEM
+
4155 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
4156 for (i
= 0; i
< sizeof(struct xstorm_per_client_stats
) / 4; i
++)
4157 CNIC_WR(dev
, val
+ i
* 4, 0);
4161 &sb
->sp_sb
.index_values
[HC_SP_INDEX_ETH_ISCSI_CQ_CONS
];
4164 static void cnic_init_bnx2x_rx_ring(struct cnic_dev
*dev
,
4165 struct client_init_ramrod_data
*data
)
4167 struct cnic_local
*cp
= dev
->cnic_priv
;
4168 struct cnic_uio_dev
*udev
= cp
->udev
;
4169 struct eth_rx_bd
*rxbd
= (struct eth_rx_bd
*) (udev
->l2_ring
+
4171 struct eth_rx_cqe_next_page
*rxcqe
= (struct eth_rx_cqe_next_page
*)
4172 (udev
->l2_ring
+ (2 * BCM_PAGE_SIZE
));
4173 struct host_sp_status_block
*sb
= cp
->bnx2x_def_status_blk
;
4175 int port
= CNIC_PORT(cp
);
4176 int cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4177 int cl_qzone_id
= BNX2X_CL_QZONE_ID(cp
, cli
);
4179 dma_addr_t ring_map
= udev
->l2_ring_map
;
4182 data
->general
.client_id
= cli
;
4183 data
->general
.statistics_en_flg
= 1;
4184 data
->general
.statistics_counter_id
= cli
;
4185 data
->general
.activate_flg
= 1;
4186 data
->general
.sp_client_id
= cli
;
4188 for (i
= 0; i
< BNX2X_MAX_RX_DESC_CNT
; i
++, rxbd
++) {
4190 int n
= (i
% cp
->l2_rx_ring_size
) + 1;
4192 buf_map
= udev
->l2_buf_map
+ (n
* cp
->l2_single_buf_size
);
4193 rxbd
->addr_hi
= cpu_to_le32((u64
) buf_map
>> 32);
4194 rxbd
->addr_lo
= cpu_to_le32(buf_map
& 0xffffffff);
4197 val
= (u64
) (ring_map
+ BCM_PAGE_SIZE
) >> 32;
4198 rxbd
->addr_hi
= cpu_to_le32(val
);
4199 data
->rx
.bd_page_base
.hi
= cpu_to_le32(val
);
4201 val
= (u64
) (ring_map
+ BCM_PAGE_SIZE
) & 0xffffffff;
4202 rxbd
->addr_lo
= cpu_to_le32(val
);
4203 data
->rx
.bd_page_base
.lo
= cpu_to_le32(val
);
4205 rxcqe
+= BNX2X_MAX_RCQ_DESC_CNT
;
4206 val
= (u64
) (ring_map
+ (2 * BCM_PAGE_SIZE
)) >> 32;
4207 rxcqe
->addr_hi
= cpu_to_le32(val
);
4208 data
->rx
.cqe_page_base
.hi
= cpu_to_le32(val
);
4210 val
= (u64
) (ring_map
+ (2 * BCM_PAGE_SIZE
)) & 0xffffffff;
4211 rxcqe
->addr_lo
= cpu_to_le32(val
);
4212 data
->rx
.cqe_page_base
.lo
= cpu_to_le32(val
);
4214 /* Other ramrod params */
4215 data
->rx
.client_qzone_id
= cl_qzone_id
;
4216 data
->rx
.rx_sb_index_number
= HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS
;
4217 data
->rx
.status_block_id
= BNX2X_DEF_SB_ID
;
4219 data
->rx
.cache_line_alignment_log_size
= L1_CACHE_SHIFT
;
4220 data
->rx
.bd_buff_size
= cpu_to_le16(cp
->l2_single_buf_size
);
4222 data
->rx
.mtu
= cpu_to_le16(cp
->l2_single_buf_size
- 14);
4223 data
->rx
.outer_vlan_removal_enable_flg
= 1;
4225 /* reset tstorm and ustorm per client statistics */
4226 if (cli
< MAX_STAT_COUNTER_ID
) {
4227 val
= BAR_TSTRORM_INTMEM
+
4228 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
4229 for (i
= 0; i
< sizeof(struct tstorm_per_client_stats
) / 4; i
++)
4230 CNIC_WR(dev
, val
+ i
* 4, 0);
4232 val
= BAR_USTRORM_INTMEM
+
4233 USTORM_PER_COUNTER_ID_STATS_OFFSET(port
, cli
);
4234 for (i
= 0; i
< sizeof(struct ustorm_per_client_stats
) / 4; i
++)
4235 CNIC_WR(dev
, val
+ i
* 4, 0);
4239 &sb
->sp_sb
.index_values
[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS
];
4242 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev
*dev
)
4244 struct cnic_local
*cp
= dev
->cnic_priv
;
4245 u32 base
, base2
, addr
, val
;
4246 int port
= CNIC_PORT(cp
);
4248 dev
->max_iscsi_conn
= 0;
4249 base
= CNIC_RD(dev
, MISC_REG_SHARED_MEM_ADDR
);
4253 base2
= CNIC_RD(dev
, (CNIC_PATH(cp
) ? MISC_REG_GENERIC_CR_1
:
4254 MISC_REG_GENERIC_CR_0
));
4255 addr
= BNX2X_SHMEM_ADDR(base
,
4256 dev_info
.port_hw_config
[port
].iscsi_mac_upper
);
4258 val
= CNIC_RD(dev
, addr
);
4260 dev
->mac_addr
[0] = (u8
) (val
>> 8);
4261 dev
->mac_addr
[1] = (u8
) val
;
4263 addr
= BNX2X_SHMEM_ADDR(base
,
4264 dev_info
.port_hw_config
[port
].iscsi_mac_lower
);
4266 val
= CNIC_RD(dev
, addr
);
4268 dev
->mac_addr
[2] = (u8
) (val
>> 24);
4269 dev
->mac_addr
[3] = (u8
) (val
>> 16);
4270 dev
->mac_addr
[4] = (u8
) (val
>> 8);
4271 dev
->mac_addr
[5] = (u8
) val
;
4273 addr
= BNX2X_SHMEM_ADDR(base
, validity_map
[port
]);
4274 val
= CNIC_RD(dev
, addr
);
4276 if (!(val
& SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT
)) {
4279 addr
= BNX2X_SHMEM_ADDR(base
,
4280 drv_lic_key
[port
].max_iscsi_init_conn
);
4281 val16
= CNIC_RD16(dev
, addr
);
4285 dev
->max_iscsi_conn
= val16
;
4287 if (BNX2X_CHIP_IS_E1H(cp
->chip_id
) || BNX2X_CHIP_IS_E2(cp
->chip_id
)) {
4288 int func
= CNIC_FUNC(cp
);
4291 if (BNX2X_SHMEM2_HAS(base2
, mf_cfg_addr
))
4292 mf_cfg_addr
= CNIC_RD(dev
, BNX2X_SHMEM2_ADDR(base2
,
4295 mf_cfg_addr
= base
+ BNX2X_SHMEM_MF_BLK_OFFSET
;
4297 addr
= mf_cfg_addr
+
4298 offsetof(struct mf_cfg
, func_mf_config
[func
].e1hov_tag
);
4300 val
= CNIC_RD(dev
, addr
);
4301 val
&= FUNC_MF_CFG_E1HOV_TAG_MASK
;
4302 if (val
!= FUNC_MF_CFG_E1HOV_TAG_DEFAULT
) {
4303 addr
= mf_cfg_addr
+
4304 offsetof(struct mf_cfg
,
4305 func_mf_config
[func
].config
);
4306 val
= CNIC_RD(dev
, addr
);
4307 val
&= FUNC_MF_CFG_PROTOCOL_MASK
;
4308 if (val
!= FUNC_MF_CFG_PROTOCOL_ISCSI
)
4309 dev
->max_iscsi_conn
= 0;
4314 static int cnic_start_bnx2x_hw(struct cnic_dev
*dev
)
4316 struct cnic_local
*cp
= dev
->cnic_priv
;
4317 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4318 int func
= CNIC_FUNC(cp
), ret
, i
;
4321 if (BNX2X_CHIP_IS_E2(cp
->chip_id
)) {
4322 u32 val
= CNIC_RD(dev
, MISC_REG_PORT4MODE_EN_OVWR
);
4325 val
= CNIC_RD(dev
, MISC_REG_PORT4MODE_EN
);
4327 val
= (val
>> 1) & 1;
4330 cp
->pfid
= func
>> 1;
4332 cp
->pfid
= func
& 0x6;
4338 ret
= cnic_init_id_tbl(&cp
->cid_tbl
, MAX_ISCSI_TBL_SZ
,
4339 cp
->iscsi_start_cid
);
4344 cp
->bnx2x_igu_sb_id
= ethdev
->irq_arr
[0].status_blk_num2
;
4346 cp
->kcq1
.io_addr
= BAR_CSTRORM_INTMEM
+
4347 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid
, 0);
4348 cp
->kcq1
.sw_prod_idx
= 0;
4350 if (BNX2X_CHIP_IS_E2(cp
->chip_id
)) {
4351 struct host_hc_status_block_e2
*sb
= cp
->status_blk
.gen
;
4353 cp
->kcq1
.hw_prod_idx_ptr
=
4354 &sb
->sb
.index_values
[HC_INDEX_ISCSI_EQ_CONS
];
4355 cp
->kcq1
.status_idx_ptr
=
4356 &sb
->sb
.running_index
[SM_RX_ID
];
4358 struct host_hc_status_block_e1x
*sb
= cp
->status_blk
.gen
;
4360 cp
->kcq1
.hw_prod_idx_ptr
=
4361 &sb
->sb
.index_values
[HC_INDEX_ISCSI_EQ_CONS
];
4362 cp
->kcq1
.status_idx_ptr
=
4363 &sb
->sb
.running_index
[SM_RX_ID
];
4366 cnic_get_bnx2x_iscsi_info(dev
);
4369 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, MAX_KCQ_IDX
);
4370 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4371 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid
, 0), 0);
4372 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4373 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid
, 0),
4374 cp
->kcq1
.dma
.pg_map_arr
[1] & 0xffffffff);
4375 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4376 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid
, 0) + 4,
4377 (u64
) cp
->kcq1
.dma
.pg_map_arr
[1] >> 32);
4378 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4379 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid
, 0),
4380 cp
->kcq1
.dma
.pg_map_arr
[0] & 0xffffffff);
4381 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4382 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid
, 0) + 4,
4383 (u64
) cp
->kcq1
.dma
.pg_map_arr
[0] >> 32);
4384 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
4385 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid
, 0), 1);
4386 CNIC_WR16(dev
, BAR_CSTRORM_INTMEM
+
4387 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid
, 0), cp
->status_blk_num
);
4388 CNIC_WR8(dev
, BAR_CSTRORM_INTMEM
+
4389 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid
, 0),
4390 HC_INDEX_ISCSI_EQ_CONS
);
4392 for (i
= 0; i
< cp
->conn_buf_info
.num_pages
; i
++) {
4393 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4394 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid
, i
),
4395 cp
->conn_buf_info
.pgtbl
[2 * i
]);
4396 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4397 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid
, i
) + 4,
4398 cp
->conn_buf_info
.pgtbl
[(2 * i
) + 1]);
4401 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4402 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid
),
4403 cp
->gbl_buf_info
.pg_map_arr
[0] & 0xffffffff);
4404 CNIC_WR(dev
, BAR_USTRORM_INTMEM
+
4405 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid
) + 4,
4406 (u64
) cp
->gbl_buf_info
.pg_map_arr
[0] >> 32);
4408 CNIC_WR(dev
, BAR_TSTRORM_INTMEM
+
4409 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid
), DEF_RCV_BUF
);
4411 cnic_setup_bnx2x_context(dev
);
4413 ret
= cnic_init_bnx2x_irq(dev
);
4420 static void cnic_init_rings(struct cnic_dev
*dev
)
4422 struct cnic_local
*cp
= dev
->cnic_priv
;
4423 struct cnic_uio_dev
*udev
= cp
->udev
;
4425 if (test_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
))
4428 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
4429 cnic_init_bnx2_tx_ring(dev
);
4430 cnic_init_bnx2_rx_ring(dev
);
4431 set_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
);
4432 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
4433 u32 cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4434 u32 cl_qzone_id
, type
;
4435 struct client_init_ramrod_data
*data
;
4436 union l5cm_specific_data l5_data
;
4437 struct ustorm_eth_rx_producers rx_prods
= {0};
4440 rx_prods
.bd_prod
= 0;
4441 rx_prods
.cqe_prod
= BNX2X_MAX_RCQ_DESC_CNT
;
4444 cl_qzone_id
= BNX2X_CL_QZONE_ID(cp
, cli
);
4446 off
= BAR_USTRORM_INTMEM
+
4447 (BNX2X_CHIP_IS_E2(cp
->chip_id
) ?
4448 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id
) :
4449 USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp
), cli
));
4451 for (i
= 0; i
< sizeof(struct ustorm_eth_rx_producers
) / 4; i
++)
4452 CNIC_WR(dev
, off
+ i
* 4, ((u32
*) &rx_prods
)[i
]);
4454 set_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
4456 data
= udev
->l2_buf
;
4458 memset(data
, 0, sizeof(*data
));
4460 cnic_init_bnx2x_tx_ring(dev
, data
);
4461 cnic_init_bnx2x_rx_ring(dev
, data
);
4463 l5_data
.phy_address
.lo
= udev
->l2_buf_map
& 0xffffffff;
4464 l5_data
.phy_address
.hi
= (u64
) udev
->l2_buf_map
>> 32;
4466 type
= (ETH_CONNECTION_TYPE
<< SPE_HDR_CONN_TYPE_SHIFT
)
4467 & SPE_HDR_CONN_TYPE
;
4468 type
|= ((cp
->pfid
<< SPE_HDR_FUNCTION_ID_SHIFT
) &
4469 SPE_HDR_FUNCTION_ID
);
4471 set_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
);
4473 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_CLIENT_SETUP
,
4474 BNX2X_ISCSI_L2_CID
, type
, &l5_data
);
4477 while (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
) &&
4481 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
4482 netdev_err(dev
->netdev
,
4483 "iSCSI CLIENT_SETUP did not complete\n");
4484 cnic_spq_completion(dev
, DRV_CTL_RET_L2_SPQ_CREDIT_CMD
, 1);
4485 cnic_ring_ctl(dev
, BNX2X_ISCSI_L2_CID
, cli
, 1);
4489 static void cnic_shutdown_rings(struct cnic_dev
*dev
)
4491 struct cnic_local
*cp
= dev
->cnic_priv
;
4493 if (!test_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
))
4496 if (test_bit(CNIC_F_BNX2_CLASS
, &dev
->flags
)) {
4497 cnic_shutdown_bnx2_rx_ring(dev
);
4498 } else if (test_bit(CNIC_F_BNX2X_CLASS
, &dev
->flags
)) {
4499 struct cnic_local
*cp
= dev
->cnic_priv
;
4500 u32 cli
= BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp
));
4501 union l5cm_specific_data l5_data
;
4505 cnic_ring_ctl(dev
, BNX2X_ISCSI_L2_CID
, cli
, 0);
4507 set_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
);
4509 l5_data
.phy_address
.lo
= cli
;
4510 l5_data
.phy_address
.hi
= 0;
4511 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_ETH_HALT
,
4512 BNX2X_ISCSI_L2_CID
, ETH_CONNECTION_TYPE
, &l5_data
);
4514 while (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
) &&
4518 if (test_bit(CNIC_LCL_FL_L2_WAIT
, &cp
->cnic_local_flags
))
4519 netdev_err(dev
->netdev
,
4520 "iSCSI CLIENT_HALT did not complete\n");
4521 cnic_spq_completion(dev
, DRV_CTL_RET_L2_SPQ_CREDIT_CMD
, 1);
4523 memset(&l5_data
, 0, sizeof(l5_data
));
4524 type
= (NONE_CONNECTION_TYPE
<< SPE_HDR_CONN_TYPE_SHIFT
)
4525 & SPE_HDR_CONN_TYPE
;
4526 type
|= ((cp
->pfid
<< SPE_HDR_FUNCTION_ID_SHIFT
) &
4527 SPE_HDR_FUNCTION_ID
);
4528 cnic_submit_kwqe_16(dev
, RAMROD_CMD_ID_COMMON_CFC_DEL
,
4529 BNX2X_ISCSI_L2_CID
, type
, &l5_data
);
4532 clear_bit(CNIC_LCL_FL_RINGS_INITED
, &cp
->cnic_local_flags
);
4535 static int cnic_register_netdev(struct cnic_dev
*dev
)
4537 struct cnic_local
*cp
= dev
->cnic_priv
;
4538 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4544 if (ethdev
->drv_state
& CNIC_DRV_STATE_REGD
)
4547 err
= ethdev
->drv_register_cnic(dev
->netdev
, cp
->cnic_ops
, dev
);
4549 netdev_err(dev
->netdev
, "register_cnic failed\n");
4554 static void cnic_unregister_netdev(struct cnic_dev
*dev
)
4556 struct cnic_local
*cp
= dev
->cnic_priv
;
4557 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4562 ethdev
->drv_unregister_cnic(dev
->netdev
);
4565 static int cnic_start_hw(struct cnic_dev
*dev
)
4567 struct cnic_local
*cp
= dev
->cnic_priv
;
4568 struct cnic_eth_dev
*ethdev
= cp
->ethdev
;
4571 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
))
4574 dev
->regview
= ethdev
->io_base
;
4575 pci_dev_get(dev
->pcidev
);
4576 cp
->func
= PCI_FUNC(dev
->pcidev
->devfn
);
4577 cp
->status_blk
.gen
= ethdev
->irq_arr
[0].status_blk
;
4578 cp
->status_blk_num
= ethdev
->irq_arr
[0].status_blk_num
;
4580 err
= cp
->alloc_resc(dev
);
4582 netdev_err(dev
->netdev
, "allocate resource failure\n");
4586 err
= cp
->start_hw(dev
);
4590 err
= cnic_cm_open(dev
);
4594 set_bit(CNIC_F_CNIC_UP
, &dev
->flags
);
4596 cp
->enable_int(dev
);
4602 pci_dev_put(dev
->pcidev
);
4606 static void cnic_stop_bnx2_hw(struct cnic_dev
*dev
)
4608 cnic_disable_bnx2_int_sync(dev
);
4610 cnic_reg_wr_ind(dev
, BNX2_CP_SCRATCH
+ 0x20, 0);
4611 cnic_reg_wr_ind(dev
, BNX2_COM_SCRATCH
+ 0x20, 0);
4613 cnic_init_context(dev
, KWQ_CID
);
4614 cnic_init_context(dev
, KCQ_CID
);
4616 cnic_setup_5709_context(dev
, 0);
4619 cnic_free_resc(dev
);
4623 static void cnic_stop_bnx2x_hw(struct cnic_dev
*dev
)
4625 struct cnic_local
*cp
= dev
->cnic_priv
;
4628 *cp
->kcq1
.hw_prod_idx_ptr
= 0;
4629 CNIC_WR(dev
, BAR_CSTRORM_INTMEM
+
4630 CSTORM_ISCSI_EQ_CONS_OFFSET(cp
->pfid
, 0), 0);
4631 CNIC_WR16(dev
, cp
->kcq1
.io_addr
, 0);
4632 cnic_free_resc(dev
);
4635 static void cnic_stop_hw(struct cnic_dev
*dev
)
4637 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
4638 struct cnic_local
*cp
= dev
->cnic_priv
;
4641 /* Need to wait for the ring shutdown event to complete
4642 * before clearing the CNIC_UP flag.
4644 while (cp
->udev
->uio_dev
!= -1 && i
< 15) {
4648 cnic_shutdown_rings(dev
);
4649 clear_bit(CNIC_F_CNIC_UP
, &dev
->flags
);
4650 rcu_assign_pointer(cp
->ulp_ops
[CNIC_ULP_L4
], NULL
);
4652 cnic_cm_shutdown(dev
);
4654 pci_dev_put(dev
->pcidev
);
4658 static void cnic_free_dev(struct cnic_dev
*dev
)
4662 while ((atomic_read(&dev
->ref_count
) != 0) && i
< 10) {
4666 if (atomic_read(&dev
->ref_count
) != 0)
4667 netdev_err(dev
->netdev
, "Failed waiting for ref count to go to zero\n");
4669 netdev_info(dev
->netdev
, "Removed CNIC device\n");
4670 dev_put(dev
->netdev
);
4674 static struct cnic_dev
*cnic_alloc_dev(struct net_device
*dev
,
4675 struct pci_dev
*pdev
)
4677 struct cnic_dev
*cdev
;
4678 struct cnic_local
*cp
;
4681 alloc_size
= sizeof(struct cnic_dev
) + sizeof(struct cnic_local
);
4683 cdev
= kzalloc(alloc_size
, GFP_KERNEL
);
4685 netdev_err(dev
, "allocate dev struct failure\n");
4690 cdev
->cnic_priv
= (char *)cdev
+ sizeof(struct cnic_dev
);
4691 cdev
->register_device
= cnic_register_device
;
4692 cdev
->unregister_device
= cnic_unregister_device
;
4693 cdev
->iscsi_nl_msg_recv
= cnic_iscsi_nl_msg_recv
;
4695 cp
= cdev
->cnic_priv
;
4697 cp
->l2_single_buf_size
= 0x400;
4698 cp
->l2_rx_ring_size
= 3;
4700 spin_lock_init(&cp
->cnic_ulp_lock
);
4702 netdev_info(dev
, "Added CNIC device\n");
4707 static struct cnic_dev
*init_bnx2_cnic(struct net_device
*dev
)
4709 struct pci_dev
*pdev
;
4710 struct cnic_dev
*cdev
;
4711 struct cnic_local
*cp
;
4712 struct cnic_eth_dev
*ethdev
= NULL
;
4713 struct cnic_eth_dev
*(*probe
)(struct net_device
*) = NULL
;
4715 probe
= symbol_get(bnx2_cnic_probe
);
4717 ethdev
= (*probe
)(dev
);
4718 symbol_put(bnx2_cnic_probe
);
4723 pdev
= ethdev
->pdev
;
4729 if (pdev
->device
== PCI_DEVICE_ID_NX2_5709
||
4730 pdev
->device
== PCI_DEVICE_ID_NX2_5709S
) {
4733 pci_read_config_byte(pdev
, PCI_REVISION_ID
, &rev
);
4741 cdev
= cnic_alloc_dev(dev
, pdev
);
4745 set_bit(CNIC_F_BNX2_CLASS
, &cdev
->flags
);
4746 cdev
->submit_kwqes
= cnic_submit_bnx2_kwqes
;
4748 cp
= cdev
->cnic_priv
;
4749 cp
->ethdev
= ethdev
;
4750 cdev
->pcidev
= pdev
;
4751 cp
->chip_id
= ethdev
->chip_id
;
4753 cp
->cnic_ops
= &cnic_bnx2_ops
;
4754 cp
->start_hw
= cnic_start_bnx2_hw
;
4755 cp
->stop_hw
= cnic_stop_bnx2_hw
;
4756 cp
->setup_pgtbl
= cnic_setup_page_tbl
;
4757 cp
->alloc_resc
= cnic_alloc_bnx2_resc
;
4758 cp
->free_resc
= cnic_free_resc
;
4759 cp
->start_cm
= cnic_cm_init_bnx2_hw
;
4760 cp
->stop_cm
= cnic_cm_stop_bnx2_hw
;
4761 cp
->enable_int
= cnic_enable_bnx2_int
;
4762 cp
->disable_int_sync
= cnic_disable_bnx2_int_sync
;
4763 cp
->close_conn
= cnic_close_bnx2_conn
;
4764 cp
->next_idx
= cnic_bnx2_next_idx
;
4765 cp
->hw_idx
= cnic_bnx2_hw_idx
;
4773 static struct cnic_dev
*init_bnx2x_cnic(struct net_device
*dev
)
4775 struct pci_dev
*pdev
;
4776 struct cnic_dev
*cdev
;
4777 struct cnic_local
*cp
;
4778 struct cnic_eth_dev
*ethdev
= NULL
;
4779 struct cnic_eth_dev
*(*probe
)(struct net_device
*) = NULL
;
4781 probe
= symbol_get(bnx2x_cnic_probe
);
4783 ethdev
= (*probe
)(dev
);
4784 symbol_put(bnx2x_cnic_probe
);
4789 pdev
= ethdev
->pdev
;
4794 cdev
= cnic_alloc_dev(dev
, pdev
);
4800 set_bit(CNIC_F_BNX2X_CLASS
, &cdev
->flags
);
4801 cdev
->submit_kwqes
= cnic_submit_bnx2x_kwqes
;
4803 cp
= cdev
->cnic_priv
;
4804 cp
->ethdev
= ethdev
;
4805 cdev
->pcidev
= pdev
;
4806 cp
->chip_id
= ethdev
->chip_id
;
4808 cp
->cnic_ops
= &cnic_bnx2x_ops
;
4809 cp
->start_hw
= cnic_start_bnx2x_hw
;
4810 cp
->stop_hw
= cnic_stop_bnx2x_hw
;
4811 cp
->setup_pgtbl
= cnic_setup_page_tbl_le
;
4812 cp
->alloc_resc
= cnic_alloc_bnx2x_resc
;
4813 cp
->free_resc
= cnic_free_resc
;
4814 cp
->start_cm
= cnic_cm_init_bnx2x_hw
;
4815 cp
->stop_cm
= cnic_cm_stop_bnx2x_hw
;
4816 cp
->enable_int
= cnic_enable_bnx2x_int
;
4817 cp
->disable_int_sync
= cnic_disable_bnx2x_int_sync
;
4818 if (BNX2X_CHIP_IS_E2(cp
->chip_id
))
4819 cp
->ack_int
= cnic_ack_bnx2x_e2_msix
;
4821 cp
->ack_int
= cnic_ack_bnx2x_msix
;
4822 cp
->close_conn
= cnic_close_bnx2x_conn
;
4823 cp
->next_idx
= cnic_bnx2x_next_idx
;
4824 cp
->hw_idx
= cnic_bnx2x_hw_idx
;
4828 static struct cnic_dev
*is_cnic_dev(struct net_device
*dev
)
4830 struct ethtool_drvinfo drvinfo
;
4831 struct cnic_dev
*cdev
= NULL
;
4833 if (dev
->ethtool_ops
&& dev
->ethtool_ops
->get_drvinfo
) {
4834 memset(&drvinfo
, 0, sizeof(drvinfo
));
4835 dev
->ethtool_ops
->get_drvinfo(dev
, &drvinfo
);
4837 if (!strcmp(drvinfo
.driver
, "bnx2"))
4838 cdev
= init_bnx2_cnic(dev
);
4839 if (!strcmp(drvinfo
.driver
, "bnx2x"))
4840 cdev
= init_bnx2x_cnic(dev
);
4842 write_lock(&cnic_dev_lock
);
4843 list_add(&cdev
->list
, &cnic_dev_list
);
4844 write_unlock(&cnic_dev_lock
);
4851 * netdev event handler
4853 static int cnic_netdev_event(struct notifier_block
*this, unsigned long event
,
4856 struct net_device
*netdev
= ptr
;
4857 struct cnic_dev
*dev
;
4861 dev
= cnic_from_netdev(netdev
);
4863 if (!dev
&& (event
== NETDEV_REGISTER
|| event
== NETDEV_UP
)) {
4864 /* Check for the hot-plug device */
4865 dev
= is_cnic_dev(netdev
);
4872 struct cnic_local
*cp
= dev
->cnic_priv
;
4876 else if (event
== NETDEV_UNREGISTER
)
4879 if (event
== NETDEV_UP
) {
4880 if (cnic_register_netdev(dev
) != 0) {
4884 if (!cnic_start_hw(dev
))
4885 cnic_ulp_start(dev
);
4889 for (if_type
= 0; if_type
< MAX_CNIC_ULP_TYPE
; if_type
++) {
4890 struct cnic_ulp_ops
*ulp_ops
;
4893 ulp_ops
= rcu_dereference(cp
->ulp_ops
[if_type
]);
4894 if (!ulp_ops
|| !ulp_ops
->indicate_netevent
)
4897 ctx
= cp
->ulp_handle
[if_type
];
4899 ulp_ops
->indicate_netevent(ctx
, event
);
4903 if (event
== NETDEV_GOING_DOWN
) {
4906 cnic_unregister_netdev(dev
);
4907 } else if (event
== NETDEV_UNREGISTER
) {
4908 write_lock(&cnic_dev_lock
);
4909 list_del_init(&dev
->list
);
4910 write_unlock(&cnic_dev_lock
);
4922 static struct notifier_block cnic_netdev_notifier
= {
4923 .notifier_call
= cnic_netdev_event
4926 static void cnic_release(void)
4928 struct cnic_dev
*dev
;
4929 struct cnic_uio_dev
*udev
;
4931 while (!list_empty(&cnic_dev_list
)) {
4932 dev
= list_entry(cnic_dev_list
.next
, struct cnic_dev
, list
);
4933 if (test_bit(CNIC_F_CNIC_UP
, &dev
->flags
)) {
4939 cnic_unregister_netdev(dev
);
4940 list_del_init(&dev
->list
);
4943 while (!list_empty(&cnic_udev_list
)) {
4944 udev
= list_entry(cnic_udev_list
.next
, struct cnic_uio_dev
,
4946 cnic_free_uio(udev
);
4950 static int __init
cnic_init(void)
4954 pr_info("%s", version
);
4956 rc
= register_netdevice_notifier(&cnic_netdev_notifier
);
4962 cnic_wq
= create_singlethread_workqueue("cnic_wq");
4965 unregister_netdevice_notifier(&cnic_netdev_notifier
);
4972 static void __exit
cnic_exit(void)
4974 unregister_netdevice_notifier(&cnic_netdev_notifier
);
4976 destroy_workqueue(cnic_wq
);
4979 module_init(cnic_init
);
4980 module_exit(cnic_exit
);