Pull platform-drivers into test branch
[deliverable/linux.git] / drivers / net / declance.c
1 /*
2 * Lance ethernet driver for the MIPS processor based
3 * DECstation family
4 *
5 *
6 * adopted from sunlance.c by Richard van den Berg
7 *
8 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
9 *
10 * additional sources:
11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 * Revision 1.2
13 *
14 * History:
15 *
16 * v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 * v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 * v0.003: Enhanced base address calculation from proposals by
21 * Harald Koerfgen and Thomas Riemer.
22 *
23 * v0.004: lance-regs is pointing at the right addresses, added prom
24 * check. First start of address mapping and DMA.
25 *
26 * v0.005: started to play around with LANCE-DMA. This driver will not
27 * work for non IOASIC lances. HK
28 *
29 * v0.006: added pointer arrays to lance_private and setup routine for
30 * them in dec_lance_init. HK
31 *
32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 * access the init block. This looks like one (short) word at a
34 * time, but the smallest amount the IOASIC can transfer is a
35 * (long) word. So we have a 2-2 padding here. Changed
36 * lance_init_block accordingly. The 16-16 padding for the buffers
37 * seems to be correct. HK
38 *
39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 * v0.009: Module support fixes, multiple interfaces support, various
42 * bits. macro
43 *
44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the
45 * PMAX requirement to only use halfword accesses to the
46 * buffer. macro
47 */
48
49 #include <linux/crc32.h>
50 #include <linux/delay.h>
51 #include <linux/errno.h>
52 #include <linux/if_ether.h>
53 #include <linux/init.h>
54 #include <linux/kernel.h>
55 #include <linux/module.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/spinlock.h>
59 #include <linux/stddef.h>
60 #include <linux/string.h>
61 #include <linux/types.h>
62
63 #include <asm/addrspace.h>
64 #include <asm/system.h>
65
66 #include <asm/dec/interrupts.h>
67 #include <asm/dec/ioasic.h>
68 #include <asm/dec/ioasic_addrs.h>
69 #include <asm/dec/kn01.h>
70 #include <asm/dec/machtype.h>
71 #include <asm/dec/system.h>
72 #include <asm/dec/tc.h>
73
74 static char version[] __devinitdata =
75 "declance.c: v0.010 by Linux MIPS DECstation task force\n";
76
77 MODULE_AUTHOR("Linux MIPS DECstation task force");
78 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
79 MODULE_LICENSE("GPL");
80
81 /*
82 * card types
83 */
84 #define ASIC_LANCE 1
85 #define PMAD_LANCE 2
86 #define PMAX_LANCE 3
87
88
89 #define LE_CSR0 0
90 #define LE_CSR1 1
91 #define LE_CSR2 2
92 #define LE_CSR3 3
93
94 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
95
96 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
97 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
98 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
99 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
100 #define LE_C0_MERR 0x0800 /* ME: Memory error */
101 #define LE_C0_RINT 0x0400 /* Received interrupt */
102 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
103 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
104 #define LE_C0_INTR 0x0080 /* Interrupt or error */
105 #define LE_C0_INEA 0x0040 /* Interrupt enable */
106 #define LE_C0_RXON 0x0020 /* Receiver on */
107 #define LE_C0_TXON 0x0010 /* Transmitter on */
108 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
109 #define LE_C0_STOP 0x0004 /* Stop the card */
110 #define LE_C0_STRT 0x0002 /* Start the card */
111 #define LE_C0_INIT 0x0001 /* Init the card */
112
113 #define LE_C3_BSWP 0x4 /* SWAP */
114 #define LE_C3_ACON 0x2 /* ALE Control */
115 #define LE_C3_BCON 0x1 /* Byte control */
116
117 /* Receive message descriptor 1 */
118 #define LE_R1_OWN 0x8000 /* Who owns the entry */
119 #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */
120 #define LE_R1_FRA 0x2000 /* FRA: Frame error */
121 #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */
122 #define LE_R1_CRC 0x0800 /* CRC error */
123 #define LE_R1_BUF 0x0400 /* BUF: Buffer error */
124 #define LE_R1_SOP 0x0200 /* Start of packet */
125 #define LE_R1_EOP 0x0100 /* End of packet */
126 #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */
127
128 /* Transmit message descriptor 1 */
129 #define LE_T1_OWN 0x8000 /* Lance owns the packet */
130 #define LE_T1_ERR 0x4000 /* Error summary */
131 #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */
132 #define LE_T1_EONE 0x0800 /* Error: one retry needed */
133 #define LE_T1_EDEF 0x0400 /* Error: deferred */
134 #define LE_T1_SOP 0x0200 /* Start of packet */
135 #define LE_T1_EOP 0x0100 /* End of packet */
136 #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */
137
138 #define LE_T3_BUF 0x8000 /* Buffer error */
139 #define LE_T3_UFL 0x4000 /* Error underflow */
140 #define LE_T3_LCOL 0x1000 /* Error late collision */
141 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
142 #define LE_T3_RTY 0x0400 /* Error retry */
143 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
144
145 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
146
147 #ifndef LANCE_LOG_TX_BUFFERS
148 #define LANCE_LOG_TX_BUFFERS 4
149 #define LANCE_LOG_RX_BUFFERS 4
150 #endif
151
152 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
153 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
154
155 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
156 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
157
158 #define PKT_BUF_SZ 1536
159 #define RX_BUFF_SIZE PKT_BUF_SZ
160 #define TX_BUFF_SIZE PKT_BUF_SZ
161
162 #undef TEST_HITS
163 #define ZERO 0
164
165 /*
166 * The DS2100/3100 have a linear 64 kB buffer which supports halfword
167 * accesses only. Each halfword of the buffer is word-aligned in the
168 * CPU address space.
169 *
170 * The PMAD-AA has a 128 kB buffer on-board.
171 *
172 * The IOASIC LANCE devices use a shared memory region. This region
173 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB
174 * boundary. The LANCE sees this as a 64 kB long continuous memory
175 * region.
176 *
177 * The LANCE's DMA address is used as an index in this buffer and DMA
178 * takes place in bursts of eight 16-bit words which are packed into
179 * four 32-bit words by the IOASIC. This leads to a strange padding:
180 * 16 bytes of valid data followed by a 16 byte gap :-(.
181 */
182
183 struct lance_rx_desc {
184 unsigned short rmd0; /* low address of packet */
185 unsigned short rmd1; /* high address of packet
186 and descriptor bits */
187 short length; /* 2s complement (negative!)
188 of buffer length */
189 unsigned short mblength; /* actual number of bytes received */
190 };
191
192 struct lance_tx_desc {
193 unsigned short tmd0; /* low address of packet */
194 unsigned short tmd1; /* high address of packet
195 and descriptor bits */
196 short length; /* 2s complement (negative!)
197 of buffer length */
198 unsigned short misc;
199 };
200
201
202 /* First part of the LANCE initialization block, described in databook. */
203 struct lance_init_block {
204 unsigned short mode; /* pre-set mode (reg. 15) */
205
206 unsigned short phys_addr[3]; /* physical ethernet address */
207 unsigned short filter[4]; /* multicast filter */
208
209 /* Receive and transmit ring base, along with extra bits. */
210 unsigned short rx_ptr; /* receive descriptor addr */
211 unsigned short rx_len; /* receive len and high addr */
212 unsigned short tx_ptr; /* transmit descriptor addr */
213 unsigned short tx_len; /* transmit len and high addr */
214
215 short gap[4];
216
217 /* The buffer descriptors */
218 struct lance_rx_desc brx_ring[RX_RING_SIZE];
219 struct lance_tx_desc btx_ring[TX_RING_SIZE];
220 };
221
222 #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
223 #define BUF_OFFSET_LNC sizeof(struct lance_init_block)
224
225 #define shift_off(off, type) \
226 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off)
227
228 #define lib_off(rt, type) \
229 shift_off(offsetof(struct lance_init_block, rt), type)
230
231 #define lib_ptr(ib, rt, type) \
232 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type)))
233
234 #define rds_off(rt, type) \
235 shift_off(offsetof(struct lance_rx_desc, rt), type)
236
237 #define rds_ptr(rd, rt, type) \
238 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type)))
239
240 #define tds_off(rt, type) \
241 shift_off(offsetof(struct lance_tx_desc, rt), type)
242
243 #define tds_ptr(td, rt, type) \
244 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type)))
245
246 struct lance_private {
247 struct net_device *next;
248 int type;
249 int slot;
250 int dma_irq;
251 volatile struct lance_regs *ll;
252
253 spinlock_t lock;
254
255 int rx_new, tx_new;
256 int rx_old, tx_old;
257
258 struct net_device_stats stats;
259
260 unsigned short busmaster_regval;
261
262 struct timer_list multicast_timer;
263
264 /* Pointers to the ring buffers as seen from the CPU */
265 char *rx_buf_ptr_cpu[RX_RING_SIZE];
266 char *tx_buf_ptr_cpu[TX_RING_SIZE];
267
268 /* Pointers to the ring buffers as seen from the LANCE */
269 uint rx_buf_ptr_lnc[RX_RING_SIZE];
270 uint tx_buf_ptr_lnc[TX_RING_SIZE];
271 };
272
273 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
274 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
275 lp->tx_old - lp->tx_new-1)
276
277 /* The lance control ports are at an absolute address, machine and tc-slot
278 * dependent.
279 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
280 * so we have to give the structure an extra member making rap pointing
281 * at the right address
282 */
283 struct lance_regs {
284 volatile unsigned short rdp; /* register data port */
285 unsigned short pad;
286 volatile unsigned short rap; /* register address port */
287 };
288
289 int dec_lance_debug = 2;
290
291 static struct net_device *root_lance_dev;
292
293 static inline void writereg(volatile unsigned short *regptr, short value)
294 {
295 *regptr = value;
296 iob();
297 }
298
299 /* Load the CSR registers */
300 static void load_csrs(struct lance_private *lp)
301 {
302 volatile struct lance_regs *ll = lp->ll;
303 uint leptr;
304
305 /* The address space as seen from the LANCE
306 * begins at address 0. HK
307 */
308 leptr = 0;
309
310 writereg(&ll->rap, LE_CSR1);
311 writereg(&ll->rdp, (leptr & 0xFFFF));
312 writereg(&ll->rap, LE_CSR2);
313 writereg(&ll->rdp, leptr >> 16);
314 writereg(&ll->rap, LE_CSR3);
315 writereg(&ll->rdp, lp->busmaster_regval);
316
317 /* Point back to csr0 */
318 writereg(&ll->rap, LE_CSR0);
319 }
320
321 /*
322 * Our specialized copy routines
323 *
324 */
325 static void cp_to_buf(const int type, void *to, const void *from, int len)
326 {
327 unsigned short *tp, *fp, clen;
328 unsigned char *rtp, *rfp;
329
330 if (type == PMAD_LANCE) {
331 memcpy(to, from, len);
332 } else if (type == PMAX_LANCE) {
333 clen = len >> 1;
334 tp = (unsigned short *) to;
335 fp = (unsigned short *) from;
336
337 while (clen--) {
338 *tp++ = *fp++;
339 tp++;
340 }
341
342 clen = len & 1;
343 rtp = (unsigned char *) tp;
344 rfp = (unsigned char *) fp;
345 while (clen--) {
346 *rtp++ = *rfp++;
347 }
348 } else {
349 /*
350 * copy 16 Byte chunks
351 */
352 clen = len >> 4;
353 tp = (unsigned short *) to;
354 fp = (unsigned short *) from;
355 while (clen--) {
356 *tp++ = *fp++;
357 *tp++ = *fp++;
358 *tp++ = *fp++;
359 *tp++ = *fp++;
360 *tp++ = *fp++;
361 *tp++ = *fp++;
362 *tp++ = *fp++;
363 *tp++ = *fp++;
364 tp += 8;
365 }
366
367 /*
368 * do the rest, if any.
369 */
370 clen = len & 15;
371 rtp = (unsigned char *) tp;
372 rfp = (unsigned char *) fp;
373 while (clen--) {
374 *rtp++ = *rfp++;
375 }
376 }
377
378 iob();
379 }
380
381 static void cp_from_buf(const int type, void *to, const void *from, int len)
382 {
383 unsigned short *tp, *fp, clen;
384 unsigned char *rtp, *rfp;
385
386 if (type == PMAD_LANCE) {
387 memcpy(to, from, len);
388 } else if (type == PMAX_LANCE) {
389 clen = len >> 1;
390 tp = (unsigned short *) to;
391 fp = (unsigned short *) from;
392 while (clen--) {
393 *tp++ = *fp++;
394 fp++;
395 }
396
397 clen = len & 1;
398
399 rtp = (unsigned char *) tp;
400 rfp = (unsigned char *) fp;
401
402 while (clen--) {
403 *rtp++ = *rfp++;
404 }
405 } else {
406
407 /*
408 * copy 16 Byte chunks
409 */
410 clen = len >> 4;
411 tp = (unsigned short *) to;
412 fp = (unsigned short *) from;
413 while (clen--) {
414 *tp++ = *fp++;
415 *tp++ = *fp++;
416 *tp++ = *fp++;
417 *tp++ = *fp++;
418 *tp++ = *fp++;
419 *tp++ = *fp++;
420 *tp++ = *fp++;
421 *tp++ = *fp++;
422 fp += 8;
423 }
424
425 /*
426 * do the rest, if any.
427 */
428 clen = len & 15;
429 rtp = (unsigned char *) tp;
430 rfp = (unsigned char *) fp;
431 while (clen--) {
432 *rtp++ = *rfp++;
433 }
434
435
436 }
437
438 }
439
440 /* Setup the Lance Rx and Tx rings */
441 static void lance_init_ring(struct net_device *dev)
442 {
443 struct lance_private *lp = netdev_priv(dev);
444 volatile u16 *ib = (volatile u16 *)dev->mem_start;
445 uint leptr;
446 int i;
447
448 /* Lock out other processes while setting up hardware */
449 netif_stop_queue(dev);
450 lp->rx_new = lp->tx_new = 0;
451 lp->rx_old = lp->tx_old = 0;
452
453 /* Copy the ethernet address to the lance init block.
454 * XXX bit 0 of the physical address registers has to be zero
455 */
456 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) |
457 dev->dev_addr[0];
458 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) |
459 dev->dev_addr[2];
460 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) |
461 dev->dev_addr[4];
462 /* Setup the initialization block */
463
464 /* Setup rx descriptor pointer */
465 leptr = offsetof(struct lance_init_block, brx_ring);
466 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) |
467 (leptr >> 16);
468 *lib_ptr(ib, rx_ptr, lp->type) = leptr;
469 if (ZERO)
470 printk("RX ptr: %8.8x(%8.8x)\n",
471 leptr, lib_off(brx_ring, lp->type));
472
473 /* Setup tx descriptor pointer */
474 leptr = offsetof(struct lance_init_block, btx_ring);
475 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) |
476 (leptr >> 16);
477 *lib_ptr(ib, tx_ptr, lp->type) = leptr;
478 if (ZERO)
479 printk("TX ptr: %8.8x(%8.8x)\n",
480 leptr, lib_off(btx_ring, lp->type));
481
482 if (ZERO)
483 printk("TX rings:\n");
484
485 /* Setup the Tx ring entries */
486 for (i = 0; i < TX_RING_SIZE; i++) {
487 leptr = lp->tx_buf_ptr_lnc[i];
488 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr;
489 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) &
490 0xff;
491 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000;
492 /* The ones required by tmd2 */
493 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0;
494 if (i < 3 && ZERO)
495 printk("%d: 0x%8.8x(0x%8.8x)\n",
496 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]);
497 }
498
499 /* Setup the Rx ring entries */
500 if (ZERO)
501 printk("RX rings:\n");
502 for (i = 0; i < RX_RING_SIZE; i++) {
503 leptr = lp->rx_buf_ptr_lnc[i];
504 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr;
505 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) &
506 0xff) |
507 LE_R1_OWN;
508 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE |
509 0xf000;
510 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0;
511 if (i < 3 && ZERO)
512 printk("%d: 0x%8.8x(0x%8.8x)\n",
513 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]);
514 }
515 iob();
516 }
517
518 static int init_restart_lance(struct lance_private *lp)
519 {
520 volatile struct lance_regs *ll = lp->ll;
521 int i;
522
523 writereg(&ll->rap, LE_CSR0);
524 writereg(&ll->rdp, LE_C0_INIT);
525
526 /* Wait for the lance to complete initialization */
527 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
528 udelay(10);
529 }
530 if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
531 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
532 i, ll->rdp);
533 return -1;
534 }
535 if ((ll->rdp & LE_C0_ERR)) {
536 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
537 i, ll->rdp);
538 return -1;
539 }
540 writereg(&ll->rdp, LE_C0_IDON);
541 writereg(&ll->rdp, LE_C0_STRT);
542 writereg(&ll->rdp, LE_C0_INEA);
543
544 return 0;
545 }
546
547 static int lance_rx(struct net_device *dev)
548 {
549 struct lance_private *lp = netdev_priv(dev);
550 volatile u16 *ib = (volatile u16 *)dev->mem_start;
551 volatile u16 *rd;
552 unsigned short bits;
553 int entry, len;
554 struct sk_buff *skb;
555
556 #ifdef TEST_HITS
557 {
558 int i;
559
560 printk("[");
561 for (i = 0; i < RX_RING_SIZE; i++) {
562 if (i == lp->rx_new)
563 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
564 lp->type) &
565 LE_R1_OWN ? "_" : "X");
566 else
567 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
568 lp->type) &
569 LE_R1_OWN ? "." : "1");
570 }
571 printk("]");
572 }
573 #endif
574
575 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type);
576 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN);
577 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) {
578 entry = lp->rx_new;
579
580 /* We got an incomplete frame? */
581 if ((bits & LE_R1_POK) != LE_R1_POK) {
582 lp->stats.rx_over_errors++;
583 lp->stats.rx_errors++;
584 } else if (bits & LE_R1_ERR) {
585 /* Count only the end frame as a rx error,
586 * not the beginning
587 */
588 if (bits & LE_R1_BUF)
589 lp->stats.rx_fifo_errors++;
590 if (bits & LE_R1_CRC)
591 lp->stats.rx_crc_errors++;
592 if (bits & LE_R1_OFL)
593 lp->stats.rx_over_errors++;
594 if (bits & LE_R1_FRA)
595 lp->stats.rx_frame_errors++;
596 if (bits & LE_R1_EOP)
597 lp->stats.rx_errors++;
598 } else {
599 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4;
600 skb = dev_alloc_skb(len + 2);
601
602 if (skb == 0) {
603 printk("%s: Memory squeeze, deferring packet.\n",
604 dev->name);
605 lp->stats.rx_dropped++;
606 *rds_ptr(rd, mblength, lp->type) = 0;
607 *rds_ptr(rd, rmd1, lp->type) =
608 ((lp->rx_buf_ptr_lnc[entry] >> 16) &
609 0xff) | LE_R1_OWN;
610 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
611 return 0;
612 }
613 lp->stats.rx_bytes += len;
614
615 skb->dev = dev;
616 skb_reserve(skb, 2); /* 16 byte align */
617 skb_put(skb, len); /* make room */
618
619 cp_from_buf(lp->type, skb->data,
620 (char *)lp->rx_buf_ptr_cpu[entry], len);
621
622 skb->protocol = eth_type_trans(skb, dev);
623 netif_rx(skb);
624 dev->last_rx = jiffies;
625 lp->stats.rx_packets++;
626 }
627
628 /* Return the packet to the pool */
629 *rds_ptr(rd, mblength, lp->type) = 0;
630 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000;
631 *rds_ptr(rd, rmd1, lp->type) =
632 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN;
633 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
634 }
635 return 0;
636 }
637
638 static void lance_tx(struct net_device *dev)
639 {
640 struct lance_private *lp = netdev_priv(dev);
641 volatile u16 *ib = (volatile u16 *)dev->mem_start;
642 volatile struct lance_regs *ll = lp->ll;
643 volatile u16 *td;
644 int i, j;
645 int status;
646
647 j = lp->tx_old;
648
649 spin_lock(&lp->lock);
650
651 for (i = j; i != lp->tx_new; i = j) {
652 td = lib_ptr(ib, btx_ring[i], lp->type);
653 /* If we hit a packet not owned by us, stop */
654 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN)
655 break;
656
657 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) {
658 status = *tds_ptr(td, misc, lp->type);
659
660 lp->stats.tx_errors++;
661 if (status & LE_T3_RTY)
662 lp->stats.tx_aborted_errors++;
663 if (status & LE_T3_LCOL)
664 lp->stats.tx_window_errors++;
665
666 if (status & LE_T3_CLOS) {
667 lp->stats.tx_carrier_errors++;
668 printk("%s: Carrier Lost\n", dev->name);
669 /* Stop the lance */
670 writereg(&ll->rap, LE_CSR0);
671 writereg(&ll->rdp, LE_C0_STOP);
672 lance_init_ring(dev);
673 load_csrs(lp);
674 init_restart_lance(lp);
675 goto out;
676 }
677 /* Buffer errors and underflows turn off the
678 * transmitter, restart the adapter.
679 */
680 if (status & (LE_T3_BUF | LE_T3_UFL)) {
681 lp->stats.tx_fifo_errors++;
682
683 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
684 dev->name);
685 /* Stop the lance */
686 writereg(&ll->rap, LE_CSR0);
687 writereg(&ll->rdp, LE_C0_STOP);
688 lance_init_ring(dev);
689 load_csrs(lp);
690 init_restart_lance(lp);
691 goto out;
692 }
693 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) ==
694 LE_T1_POK) {
695 /*
696 * So we don't count the packet more than once.
697 */
698 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK);
699
700 /* One collision before packet was sent. */
701 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE)
702 lp->stats.collisions++;
703
704 /* More than one collision, be optimistic. */
705 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE)
706 lp->stats.collisions += 2;
707
708 lp->stats.tx_packets++;
709 }
710 j = (j + 1) & TX_RING_MOD_MASK;
711 }
712 lp->tx_old = j;
713 out:
714 if (netif_queue_stopped(dev) &&
715 TX_BUFFS_AVAIL > 0)
716 netif_wake_queue(dev);
717
718 spin_unlock(&lp->lock);
719 }
720
721 static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id)
722 {
723 struct net_device *dev = dev_id;
724
725 printk("%s: DMA error\n", dev->name);
726 return IRQ_HANDLED;
727 }
728
729 static irqreturn_t lance_interrupt(const int irq, void *dev_id)
730 {
731 struct net_device *dev = dev_id;
732 struct lance_private *lp = netdev_priv(dev);
733 volatile struct lance_regs *ll = lp->ll;
734 int csr0;
735
736 writereg(&ll->rap, LE_CSR0);
737 csr0 = ll->rdp;
738
739 /* Acknowledge all the interrupt sources ASAP */
740 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
741
742 if ((csr0 & LE_C0_ERR)) {
743 /* Clear the error condition */
744 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
745 LE_C0_CERR | LE_C0_MERR);
746 }
747 if (csr0 & LE_C0_RINT)
748 lance_rx(dev);
749
750 if (csr0 & LE_C0_TINT)
751 lance_tx(dev);
752
753 if (csr0 & LE_C0_BABL)
754 lp->stats.tx_errors++;
755
756 if (csr0 & LE_C0_MISS)
757 lp->stats.rx_errors++;
758
759 if (csr0 & LE_C0_MERR) {
760 printk("%s: Memory error, status %04x\n", dev->name, csr0);
761
762 writereg(&ll->rdp, LE_C0_STOP);
763
764 lance_init_ring(dev);
765 load_csrs(lp);
766 init_restart_lance(lp);
767 netif_wake_queue(dev);
768 }
769
770 writereg(&ll->rdp, LE_C0_INEA);
771 writereg(&ll->rdp, LE_C0_INEA);
772 return IRQ_HANDLED;
773 }
774
775 struct net_device *last_dev = 0;
776
777 static int lance_open(struct net_device *dev)
778 {
779 volatile u16 *ib = (volatile u16 *)dev->mem_start;
780 struct lance_private *lp = netdev_priv(dev);
781 volatile struct lance_regs *ll = lp->ll;
782 int status = 0;
783
784 last_dev = dev;
785
786 /* Stop the Lance */
787 writereg(&ll->rap, LE_CSR0);
788 writereg(&ll->rdp, LE_C0_STOP);
789
790 /* Set mode and clear multicast filter only at device open,
791 * so that lance_init_ring() called at any error will not
792 * forget multicast filters.
793 *
794 * BTW it is common bug in all lance drivers! --ANK
795 */
796 *lib_ptr(ib, mode, lp->type) = 0;
797 *lib_ptr(ib, filter[0], lp->type) = 0;
798 *lib_ptr(ib, filter[1], lp->type) = 0;
799 *lib_ptr(ib, filter[2], lp->type) = 0;
800 *lib_ptr(ib, filter[3], lp->type) = 0;
801
802 lance_init_ring(dev);
803 load_csrs(lp);
804
805 netif_start_queue(dev);
806
807 /* Associate IRQ with lance_interrupt */
808 if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
809 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
810 return -EAGAIN;
811 }
812 if (lp->dma_irq >= 0) {
813 unsigned long flags;
814
815 if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
816 "lance error", dev)) {
817 free_irq(dev->irq, dev);
818 printk("%s: Can't get DMA IRQ %d\n", dev->name,
819 lp->dma_irq);
820 return -EAGAIN;
821 }
822
823 spin_lock_irqsave(&ioasic_ssr_lock, flags);
824
825 fast_mb();
826 /* Enable I/O ASIC LANCE DMA. */
827 ioasic_write(IO_REG_SSR,
828 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
829
830 fast_mb();
831 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
832 }
833
834 status = init_restart_lance(lp);
835 return status;
836 }
837
838 static int lance_close(struct net_device *dev)
839 {
840 struct lance_private *lp = netdev_priv(dev);
841 volatile struct lance_regs *ll = lp->ll;
842
843 netif_stop_queue(dev);
844 del_timer_sync(&lp->multicast_timer);
845
846 /* Stop the card */
847 writereg(&ll->rap, LE_CSR0);
848 writereg(&ll->rdp, LE_C0_STOP);
849
850 if (lp->dma_irq >= 0) {
851 unsigned long flags;
852
853 spin_lock_irqsave(&ioasic_ssr_lock, flags);
854
855 fast_mb();
856 /* Disable I/O ASIC LANCE DMA. */
857 ioasic_write(IO_REG_SSR,
858 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
859
860 fast_iob();
861 spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
862
863 free_irq(lp->dma_irq, dev);
864 }
865 free_irq(dev->irq, dev);
866 return 0;
867 }
868
869 static inline int lance_reset(struct net_device *dev)
870 {
871 struct lance_private *lp = netdev_priv(dev);
872 volatile struct lance_regs *ll = lp->ll;
873 int status;
874
875 /* Stop the lance */
876 writereg(&ll->rap, LE_CSR0);
877 writereg(&ll->rdp, LE_C0_STOP);
878
879 lance_init_ring(dev);
880 load_csrs(lp);
881 dev->trans_start = jiffies;
882 status = init_restart_lance(lp);
883 return status;
884 }
885
886 static void lance_tx_timeout(struct net_device *dev)
887 {
888 struct lance_private *lp = netdev_priv(dev);
889 volatile struct lance_regs *ll = lp->ll;
890
891 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
892 dev->name, ll->rdp);
893 lance_reset(dev);
894 netif_wake_queue(dev);
895 }
896
897 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
898 {
899 struct lance_private *lp = netdev_priv(dev);
900 volatile struct lance_regs *ll = lp->ll;
901 volatile u16 *ib = (volatile u16 *)dev->mem_start;
902 int entry, len;
903
904 len = skb->len;
905
906 if (len < ETH_ZLEN) {
907 if (skb_padto(skb, ETH_ZLEN))
908 return 0;
909 len = ETH_ZLEN;
910 }
911
912 lp->stats.tx_bytes += len;
913
914 entry = lp->tx_new;
915 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len);
916 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0;
917
918 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len);
919
920 /* Now, give the packet to the lance */
921 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) =
922 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) |
923 (LE_T1_POK | LE_T1_OWN);
924 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK;
925
926 if (TX_BUFFS_AVAIL <= 0)
927 netif_stop_queue(dev);
928
929 /* Kick the lance: transmit now */
930 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
931
932 spin_unlock_irq(&lp->lock);
933
934 dev->trans_start = jiffies;
935 dev_kfree_skb(skb);
936
937 return 0;
938 }
939
940 static struct net_device_stats *lance_get_stats(struct net_device *dev)
941 {
942 struct lance_private *lp = netdev_priv(dev);
943
944 return &lp->stats;
945 }
946
947 static void lance_load_multicast(struct net_device *dev)
948 {
949 struct lance_private *lp = netdev_priv(dev);
950 volatile u16 *ib = (volatile u16 *)dev->mem_start;
951 struct dev_mc_list *dmi = dev->mc_list;
952 char *addrs;
953 int i;
954 u32 crc;
955
956 /* set all multicast bits */
957 if (dev->flags & IFF_ALLMULTI) {
958 *lib_ptr(ib, filter[0], lp->type) = 0xffff;
959 *lib_ptr(ib, filter[1], lp->type) = 0xffff;
960 *lib_ptr(ib, filter[2], lp->type) = 0xffff;
961 *lib_ptr(ib, filter[3], lp->type) = 0xffff;
962 return;
963 }
964 /* clear the multicast filter */
965 *lib_ptr(ib, filter[0], lp->type) = 0;
966 *lib_ptr(ib, filter[1], lp->type) = 0;
967 *lib_ptr(ib, filter[2], lp->type) = 0;
968 *lib_ptr(ib, filter[3], lp->type) = 0;
969
970 /* Add addresses */
971 for (i = 0; i < dev->mc_count; i++) {
972 addrs = dmi->dmi_addr;
973 dmi = dmi->next;
974
975 /* multicast address? */
976 if (!(*addrs & 1))
977 continue;
978
979 crc = ether_crc_le(ETH_ALEN, addrs);
980 crc = crc >> 26;
981 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf);
982 }
983 return;
984 }
985
986 static void lance_set_multicast(struct net_device *dev)
987 {
988 struct lance_private *lp = netdev_priv(dev);
989 volatile u16 *ib = (volatile u16 *)dev->mem_start;
990 volatile struct lance_regs *ll = lp->ll;
991
992 if (!netif_running(dev))
993 return;
994
995 if (lp->tx_old != lp->tx_new) {
996 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
997 netif_wake_queue(dev);
998 return;
999 }
1000
1001 netif_stop_queue(dev);
1002
1003 writereg(&ll->rap, LE_CSR0);
1004 writereg(&ll->rdp, LE_C0_STOP);
1005
1006 lance_init_ring(dev);
1007
1008 if (dev->flags & IFF_PROMISC) {
1009 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM;
1010 } else {
1011 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM;
1012 lance_load_multicast(dev);
1013 }
1014 load_csrs(lp);
1015 init_restart_lance(lp);
1016 netif_wake_queue(dev);
1017 }
1018
1019 static void lance_set_multicast_retry(unsigned long _opaque)
1020 {
1021 struct net_device *dev = (struct net_device *) _opaque;
1022
1023 lance_set_multicast(dev);
1024 }
1025
1026 static int __init dec_lance_init(const int type, const int slot)
1027 {
1028 static unsigned version_printed;
1029 static const char fmt[] = "declance%d";
1030 char name[10];
1031 struct net_device *dev;
1032 struct lance_private *lp;
1033 volatile struct lance_regs *ll;
1034 int i, ret;
1035 unsigned long esar_base;
1036 unsigned char *esar;
1037
1038 if (dec_lance_debug && version_printed++ == 0)
1039 printk(version);
1040
1041 i = 0;
1042 dev = root_lance_dev;
1043 while (dev) {
1044 i++;
1045 lp = (struct lance_private *)dev->priv;
1046 dev = lp->next;
1047 }
1048 snprintf(name, sizeof(name), fmt, i);
1049
1050 dev = alloc_etherdev(sizeof(struct lance_private));
1051 if (!dev) {
1052 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
1053 name);
1054 ret = -ENOMEM;
1055 goto err_out;
1056 }
1057
1058 /*
1059 * alloc_etherdev ensures the data structures used by the LANCE
1060 * are aligned.
1061 */
1062 lp = netdev_priv(dev);
1063 spin_lock_init(&lp->lock);
1064
1065 lp->type = type;
1066 lp->slot = slot;
1067 switch (type) {
1068 case ASIC_LANCE:
1069 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1070
1071 /* buffer space for the on-board LANCE shared memory */
1072 /*
1073 * FIXME: ugly hack!
1074 */
1075 dev->mem_start = CKSEG1ADDR(0x00020000);
1076 dev->mem_end = dev->mem_start + 0x00020000;
1077 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1078 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1079
1080 /* Workaround crash with booting KN04 2.1k from Disk */
1081 memset((void *)dev->mem_start, 0,
1082 dev->mem_end - dev->mem_start);
1083
1084 /*
1085 * setup the pointer arrays, this sucks [tm] :-(
1086 */
1087 for (i = 0; i < RX_RING_SIZE; i++) {
1088 lp->rx_buf_ptr_cpu[i] =
1089 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1090 2 * i * RX_BUFF_SIZE);
1091 lp->rx_buf_ptr_lnc[i] =
1092 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1093 }
1094 for (i = 0; i < TX_RING_SIZE; i++) {
1095 lp->tx_buf_ptr_cpu[i] =
1096 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1097 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1098 2 * i * TX_BUFF_SIZE);
1099 lp->tx_buf_ptr_lnc[i] =
1100 (BUF_OFFSET_LNC +
1101 RX_RING_SIZE * RX_BUFF_SIZE +
1102 i * TX_BUFF_SIZE);
1103 }
1104
1105 /* Setup I/O ASIC LANCE DMA. */
1106 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1107 ioasic_write(IO_REG_LANCE_DMA_P,
1108 CPHYSADDR(dev->mem_start) << 3);
1109
1110 break;
1111 #ifdef CONFIG_TC
1112 case PMAD_LANCE:
1113 claim_tc_card(slot);
1114
1115 dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot));
1116 dev->mem_end = dev->mem_start + 0x100000;
1117 dev->base_addr = dev->mem_start + 0x100000;
1118 dev->irq = get_tc_irq_nr(slot);
1119 esar_base = dev->mem_start + 0x1c0002;
1120 lp->dma_irq = -1;
1121
1122 for (i = 0; i < RX_RING_SIZE; i++) {
1123 lp->rx_buf_ptr_cpu[i] =
1124 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1125 i * RX_BUFF_SIZE);
1126 lp->rx_buf_ptr_lnc[i] =
1127 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1128 }
1129 for (i = 0; i < TX_RING_SIZE; i++) {
1130 lp->tx_buf_ptr_cpu[i] =
1131 (char *)(dev->mem_start + BUF_OFFSET_CPU +
1132 RX_RING_SIZE * RX_BUFF_SIZE +
1133 i * TX_BUFF_SIZE);
1134 lp->tx_buf_ptr_lnc[i] =
1135 (BUF_OFFSET_LNC +
1136 RX_RING_SIZE * RX_BUFF_SIZE +
1137 i * TX_BUFF_SIZE);
1138 }
1139
1140 break;
1141 #endif
1142 case PMAX_LANCE:
1143 dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1144 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1145 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1146 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE;
1147 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
1148 lp->dma_irq = -1;
1149
1150 /*
1151 * setup the pointer arrays, this sucks [tm] :-(
1152 */
1153 for (i = 0; i < RX_RING_SIZE; i++) {
1154 lp->rx_buf_ptr_cpu[i] =
1155 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1156 2 * i * RX_BUFF_SIZE);
1157 lp->rx_buf_ptr_lnc[i] =
1158 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1159 }
1160 for (i = 0; i < TX_RING_SIZE; i++) {
1161 lp->tx_buf_ptr_cpu[i] =
1162 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1163 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1164 2 * i * TX_BUFF_SIZE);
1165 lp->tx_buf_ptr_lnc[i] =
1166 (BUF_OFFSET_LNC +
1167 RX_RING_SIZE * RX_BUFF_SIZE +
1168 i * TX_BUFF_SIZE);
1169 }
1170
1171 break;
1172
1173 default:
1174 printk(KERN_ERR "%s: declance_init called with unknown type\n",
1175 name);
1176 ret = -ENODEV;
1177 goto err_out_free_dev;
1178 }
1179
1180 ll = (struct lance_regs *) dev->base_addr;
1181 esar = (unsigned char *) esar_base;
1182
1183 /* prom checks */
1184 /* First, check for test pattern */
1185 if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1186 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1187 printk(KERN_ERR
1188 "%s: Ethernet station address prom not found!\n",
1189 name);
1190 ret = -ENODEV;
1191 goto err_out_free_dev;
1192 }
1193 /* Check the prom contents */
1194 for (i = 0; i < 8; i++) {
1195 if (esar[i * 4] != esar[0x3c - i * 4] &&
1196 esar[i * 4] != esar[0x40 + i * 4] &&
1197 esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1198 printk(KERN_ERR "%s: Something is wrong with the "
1199 "ethernet station address prom!\n", name);
1200 ret = -ENODEV;
1201 goto err_out_free_dev;
1202 }
1203 }
1204
1205 /* Copy the ethernet address to the device structure, later to the
1206 * lance initialization block so the lance gets it every time it's
1207 * (re)initialized.
1208 */
1209 switch (type) {
1210 case ASIC_LANCE:
1211 printk("%s: IOASIC onboard LANCE, addr = ", name);
1212 break;
1213 case PMAD_LANCE:
1214 printk("%s: PMAD-AA, addr = ", name);
1215 break;
1216 case PMAX_LANCE:
1217 printk("%s: PMAX onboard LANCE, addr = ", name);
1218 break;
1219 }
1220 for (i = 0; i < 6; i++) {
1221 dev->dev_addr[i] = esar[i * 4];
1222 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1223 }
1224
1225 printk(" irq = %d\n", dev->irq);
1226
1227 dev->open = &lance_open;
1228 dev->stop = &lance_close;
1229 dev->hard_start_xmit = &lance_start_xmit;
1230 dev->tx_timeout = &lance_tx_timeout;
1231 dev->watchdog_timeo = 5*HZ;
1232 dev->get_stats = &lance_get_stats;
1233 dev->set_multicast_list = &lance_set_multicast;
1234
1235 /* lp->ll is the location of the registers for lance card */
1236 lp->ll = ll;
1237
1238 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1239 * specification.
1240 */
1241 lp->busmaster_regval = 0;
1242
1243 dev->dma = 0;
1244
1245 /* We cannot sleep if the chip is busy during a
1246 * multicast list update event, because such events
1247 * can occur from interrupts (ex. IPv6). So we
1248 * use a timer to try again later when necessary. -DaveM
1249 */
1250 init_timer(&lp->multicast_timer);
1251 lp->multicast_timer.data = (unsigned long) dev;
1252 lp->multicast_timer.function = &lance_set_multicast_retry;
1253
1254 ret = register_netdev(dev);
1255 if (ret) {
1256 printk(KERN_ERR
1257 "%s: Unable to register netdev, aborting.\n", name);
1258 goto err_out_free_dev;
1259 }
1260
1261 lp->next = root_lance_dev;
1262 root_lance_dev = dev;
1263
1264 printk("%s: registered as %s.\n", name, dev->name);
1265 return 0;
1266
1267 err_out_free_dev:
1268 free_netdev(dev);
1269
1270 err_out:
1271 return ret;
1272 }
1273
1274
1275 /* Find all the lance cards on the system and initialize them */
1276 static int __init dec_lance_probe(void)
1277 {
1278 int count = 0;
1279
1280 /* Scan slots for PMAD-AA cards first. */
1281 #ifdef CONFIG_TC
1282 if (TURBOCHANNEL) {
1283 int slot;
1284
1285 while ((slot = search_tc_card("PMAD-AA")) >= 0) {
1286 if (dec_lance_init(PMAD_LANCE, slot) < 0)
1287 break;
1288 count++;
1289 }
1290 }
1291 #endif
1292
1293 /* Then handle onboard devices. */
1294 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1295 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1296 if (dec_lance_init(ASIC_LANCE, -1) >= 0)
1297 count++;
1298 } else if (!TURBOCHANNEL) {
1299 if (dec_lance_init(PMAX_LANCE, -1) >= 0)
1300 count++;
1301 }
1302 }
1303
1304 return (count > 0) ? 0 : -ENODEV;
1305 }
1306
1307 static void __exit dec_lance_cleanup(void)
1308 {
1309 while (root_lance_dev) {
1310 struct net_device *dev = root_lance_dev;
1311 struct lance_private *lp = netdev_priv(dev);
1312
1313 unregister_netdev(dev);
1314 #ifdef CONFIG_TC
1315 if (lp->slot >= 0)
1316 release_tc_card(lp->slot);
1317 #endif
1318 root_lance_dev = lp->next;
1319 free_netdev(dev);
1320 }
1321 }
1322
1323 module_init(dec_lance_probe);
1324 module_exit(dec_lance_cleanup);
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