drivers/net/ehea/ehea.h

   1 /*
   2  *  linux/drivers/net/ehea/ehea.h
   3  *
   4  *  eHEA ethernet device driver for IBM eServer System p
   5  *
   6  *  (C) Copyright IBM Corp. 2006
   7  *
   8  *  Authors:
   9  *       Christoph Raisch <raisch@de.ibm.com>
  10  *       Jan-Bernd Themann <themann@de.ibm.com>
  11  *       Thomas Klein <tklein@de.ibm.com>
  12  *
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2, or (at your option)
  17  * any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27  */
  28
  29 #ifndef __EHEA_H__
  30 #define __EHEA_H__
  31
  32 #include <linux/module.h>
  33 #include <linux/ethtool.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/if_vlan.h>
  36
  37 #include <asm/ibmebus.h>
  38 #include <asm/abs_addr.h>
  39 #include <asm/io.h>
  40
  41 #define DRV_NAME        "ehea"
  42 #define DRV_VERSION     "EHEA_0067"
  43
  44 /* EHEA capability flags */
  45 #define DLPAR_PORT_ADD_REM 1
  46 #define DLPAR_MEM_ADD 2
  47 #define DLPAR_MEM_REM 4
  48 #define EHEA_CAPABILITIES (DLPAR_PORT_ADD_REM)
  49
  50 #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
  51         | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  52
  53 #define EHEA_MAX_ENTRIES_RQ1 32767
  54 #define EHEA_MAX_ENTRIES_RQ2 16383
  55 #define EHEA_MAX_ENTRIES_RQ3 16383
  56 #define EHEA_MAX_ENTRIES_SQ  32767
  57 #define EHEA_MIN_ENTRIES_QP  127
  58
  59 #define EHEA_SMALL_QUEUES
  60 #define EHEA_NUM_TX_QP 1
  61
  62 #ifdef EHEA_SMALL_QUEUES
  63 #define EHEA_MAX_CQE_COUNT      1023
  64 #define EHEA_DEF_ENTRIES_SQ     1023
  65 #define EHEA_DEF_ENTRIES_RQ1    4095
  66 #define EHEA_DEF_ENTRIES_RQ2    1023
  67 #define EHEA_DEF_ENTRIES_RQ3    1023
  68 #else
  69 #define EHEA_MAX_CQE_COUNT      4080
  70 #define EHEA_DEF_ENTRIES_SQ     4080
  71 #define EHEA_DEF_ENTRIES_RQ1    8160
  72 #define EHEA_DEF_ENTRIES_RQ2    2040
  73 #define EHEA_DEF_ENTRIES_RQ3    2040
  74 #endif
  75
  76 #define EHEA_MAX_ENTRIES_EQ 20
  77
  78 #define EHEA_SG_SQ  2
  79 #define EHEA_SG_RQ1 1
  80 #define EHEA_SG_RQ2 0
  81 #define EHEA_SG_RQ3 0
  82
  83 #define EHEA_MAX_PACKET_SIZE    9022    /* for jumbo frames */
  84 #define EHEA_RQ2_PKT_SIZE       1522
  85 #define EHEA_L_PKT_SIZE         256     /* low latency */
  86
  87 /* Send completion signaling */
  88
  89 /* Protection Domain Identifier */
  90 #define EHEA_PD_ID        0xaabcdeff
  91
  92 #define EHEA_RQ2_THRESHOLD         1
  93 #define EHEA_RQ3_THRESHOLD         9    /* use RQ3 threshold of 1522 bytes */
  94
  95 #define EHEA_SPEED_10G         10000
  96 #define EHEA_SPEED_1G           1000
  97 #define EHEA_SPEED_100M          100
  98 #define EHEA_SPEED_10M            10
  99 #define EHEA_SPEED_AUTONEG         0
 100
 101 /* Broadcast/Multicast registration types */
 102 #define EHEA_BCMC_SCOPE_ALL     0x08
 103 #define EHEA_BCMC_SCOPE_SINGLE  0x00
 104 #define EHEA_BCMC_MULTICAST     0x04
 105 #define EHEA_BCMC_BROADCAST     0x00
 106 #define EHEA_BCMC_UNTAGGED      0x02
 107 #define EHEA_BCMC_TAGGED        0x00
 108 #define EHEA_BCMC_VLANID_ALL    0x01
 109 #define EHEA_BCMC_VLANID_SINGLE 0x00
 110
 111 #define EHEA_CACHE_LINE          128
 112
 113 /* Memory Regions */
 114 #define EHEA_MR_ACC_CTRL       0x00800000
 115
 116 #define EHEA_WATCH_DOG_TIMEOUT 10*HZ
 117
 118 /* utility functions */
 119
 120 #define ehea_info(fmt, args...) \
 121         printk(KERN_INFO DRV_NAME ": " fmt "\n", ## args)
 122
 123 #define ehea_error(fmt, args...) \
 124         printk(KERN_ERR DRV_NAME ": Error in %s: " fmt "\n", __func__, ## args)
 125
 126 #ifdef DEBUG
 127 #define ehea_debug(fmt, args...) \
 128         printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
 129 #else
 130 #define ehea_debug(fmt, args...) do {} while (0)
 131 #endif
 132
 133 void ehea_dump(void *adr, int len, char *msg);
 134
 135 #define EHEA_BMASK(pos, length) (((pos) << 16) + (length))
 136
 137 #define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
 138
 139 #define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
 140
 141 #define EHEA_BMASK_MASK(mask) \
 142         (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff))
 143
 144 #define EHEA_BMASK_SET(mask, value) \
 145         ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask))
 146
 147 #define EHEA_BMASK_GET(mask, value) \
 148         (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask)))
 149
 150 /*
 151  * Generic ehea page
 152  */
 153 struct ehea_page {
 154         u8 entries[PAGE_SIZE];
 155 };
 156
 157 /*
 158  * Generic queue in linux kernel virtual memory
 159  */
 160 struct hw_queue {
 161         u64 current_q_offset;           /* current queue entry */
 162         struct ehea_page **queue_pages; /* array of pages belonging to queue */
 163         u32 qe_size;                    /* queue entry size */
 164         u32 queue_length;               /* queue length allocated in bytes */
 165         u32 pagesize;
 166         u32 toggle_state;               /* toggle flag - per page */
 167         u32 reserved;                   /* 64 bit alignment */
 168 };
 169
 170 /*
 171  * For pSeries this is a 64bit memory address where
 172  * I/O memory is mapped into CPU address space
 173  */
 174 struct h_epa {
 175         void __iomem *addr;
 176 };
 177
 178 struct h_epa_user {
 179         u64 addr;
 180 };
 181
 182 struct h_epas {
 183         struct h_epa kernel;    /* kernel space accessible resource,
 184                                    set to 0 if unused */
 185         struct h_epa_user user; /* user space accessible resource
 186                                    set to 0 if unused */
 187 };
 188
 189 struct ehea_qp;
 190 struct ehea_cq;
 191 struct ehea_eq;
 192 struct ehea_port;
 193 struct ehea_av;
 194
 195 /*
 196  * Queue attributes passed to ehea_create_qp()
 197  */
 198 struct ehea_qp_init_attr {
 199         /* input parameter */
 200         u32 qp_token;           /* queue token */
 201         u8 low_lat_rq1;
 202         u8 signalingtype;       /* cqe generation flag */
 203         u8 rq_count;            /* num of receive queues */
 204         u8 eqe_gen;             /* eqe generation flag */
 205         u16 max_nr_send_wqes;   /* max number of send wqes */
 206         u16 max_nr_rwqes_rq1;   /* max number of receive wqes */
 207         u16 max_nr_rwqes_rq2;
 208         u16 max_nr_rwqes_rq3;
 209         u8 wqe_size_enc_sq;
 210         u8 wqe_size_enc_rq1;
 211         u8 wqe_size_enc_rq2;
 212         u8 wqe_size_enc_rq3;
 213         u8 swqe_imm_data_len;   /* immediate data length for swqes */
 214         u16 port_nr;
 215         u16 rq2_threshold;
 216         u16 rq3_threshold;
 217         u64 send_cq_handle;
 218         u64 recv_cq_handle;
 219         u64 aff_eq_handle;
 220
 221         /* output parameter */
 222         u32 qp_nr;
 223         u16 act_nr_send_wqes;
 224         u16 act_nr_rwqes_rq1;
 225         u16 act_nr_rwqes_rq2;
 226         u16 act_nr_rwqes_rq3;
 227         u8 act_wqe_size_enc_sq;
 228         u8 act_wqe_size_enc_rq1;
 229         u8 act_wqe_size_enc_rq2;
 230         u8 act_wqe_size_enc_rq3;
 231         u32 nr_sq_pages;
 232         u32 nr_rq1_pages;
 233         u32 nr_rq2_pages;
 234         u32 nr_rq3_pages;
 235         u32 liobn_sq;
 236         u32 liobn_rq1;
 237         u32 liobn_rq2;
 238         u32 liobn_rq3;
 239 };
 240
 241 /*
 242  * Event Queue attributes, passed as paramter
 243  */
 244 struct ehea_eq_attr {
 245         u32 type;
 246         u32 max_nr_of_eqes;
 247         u8 eqe_gen;        /* generate eqe flag */
 248         u64 eq_handle;
 249         u32 act_nr_of_eqes;
 250         u32 nr_pages;
 251         u32 ist1;          /* Interrupt service token */
 252         u32 ist2;
 253         u32 ist3;
 254         u32 ist4;
 255 };
 256
 257
 258 /*
 259  * Event Queue
 260  */
 261 struct ehea_eq {
 262         struct ehea_adapter *adapter;
 263         struct hw_queue hw_queue;
 264         u64 fw_handle;
 265         struct h_epas epas;
 266         spinlock_t spinlock;
 267         struct ehea_eq_attr attr;
 268 };
 269
 270 /*
 271  * HEA Queues
 272  */
 273 struct ehea_qp {
 274         struct ehea_adapter *adapter;
 275         u64 fw_handle;                  /* QP handle for firmware calls */
 276         struct hw_queue hw_squeue;
 277         struct hw_queue hw_rqueue1;
 278         struct hw_queue hw_rqueue2;
 279         struct hw_queue hw_rqueue3;
 280         struct h_epas epas;
 281         struct ehea_qp_init_attr init_attr;
 282 };
 283
 284 /*
 285  * Completion Queue attributes
 286  */
 287 struct ehea_cq_attr {
 288         /* input parameter */
 289         u32 max_nr_of_cqes;
 290         u32 cq_token;
 291         u64 eq_handle;
 292
 293         /* output parameter */
 294         u32 act_nr_of_cqes;
 295         u32 nr_pages;
 296 };
 297
 298 /*
 299  * Completion Queue
 300  */
 301 struct ehea_cq {
 302         struct ehea_adapter *adapter;
 303         u64 fw_handle;
 304         struct hw_queue hw_queue;
 305         struct h_epas epas;
 306         struct ehea_cq_attr attr;
 307 };
 308
 309 /*
 310  * Memory Region
 311  */
 312 struct ehea_mr {
 313         struct ehea_adapter *adapter;
 314         u64 handle;
 315         u64 vaddr;
 316         u32 lkey;
 317 };
 318
 319 /*
 320  * Port state information
 321  */
 322 struct port_stats {
 323         int poll_receive_errors;
 324         int queue_stopped;
 325         int err_tcp_cksum;
 326         int err_ip_cksum;
 327         int err_frame_crc;
 328 };
 329
 330 #define EHEA_IRQ_NAME_SIZE 20
 331
 332 /*
 333  * Queue SKB Array
 334  */
 335 struct ehea_q_skb_arr {
 336         struct sk_buff **arr;           /* skb array for queue */
 337         int len;                        /* array length */
 338         int index;                      /* array index */
 339         int os_skbs;                    /* rq2/rq3 only: outstanding skbs */
 340 };
 341
 342 /*
 343  * Port resources
 344  */
 345 struct ehea_port_res {
 346         struct port_stats p_stats;
 347         struct ehea_mr send_mr;         /* send memory region */
 348         struct ehea_mr recv_mr;         /* receive memory region */
 349         spinlock_t xmit_lock;
 350         struct ehea_port *port;
 351         char int_recv_name[EHEA_IRQ_NAME_SIZE];
 352         char int_send_name[EHEA_IRQ_NAME_SIZE];
 353         struct ehea_qp *qp;
 354         struct ehea_cq *send_cq;
 355         struct ehea_cq *recv_cq;
 356         struct ehea_eq *eq;
 357         struct net_device *d_netdev;
 358         struct ehea_q_skb_arr rq1_skba;
 359         struct ehea_q_skb_arr rq2_skba;
 360         struct ehea_q_skb_arr rq3_skba;
 361         struct ehea_q_skb_arr sq_skba;
 362         spinlock_t netif_queue;
 363         int queue_stopped;
 364         int swqe_refill_th;
 365         atomic_t swqe_avail;
 366         int swqe_ll_count;
 367         u32 swqe_id_counter;
 368         u64 tx_packets;
 369         u64 rx_packets;
 370         u32 poll_counter;
 371 };
 372
 373
 374 #define EHEA_MAX_PORTS 16
 375 struct ehea_adapter {
 376         u64 handle;
 377         struct ibmebus_dev *ebus_dev;
 378         struct ehea_port *port[EHEA_MAX_PORTS];
 379         struct ehea_eq *neq;       /* notification event queue */
 380         struct workqueue_struct *ehea_wq;
 381         struct tasklet_struct neq_tasklet;
 382         struct ehea_mr mr;
 383         u32 pd;                    /* protection domain */
 384         u64 max_mc_mac;            /* max number of multicast mac addresses */
 385 };
 386
 387
 388 struct ehea_mc_list {
 389         struct list_head list;
 390         u64 macaddr;
 391 };
 392
 393 #define EHEA_PORT_UP 1
 394 #define EHEA_PORT_DOWN 0
 395 #define EHEA_MAX_PORT_RES 16
 396 struct ehea_port {
 397         struct ehea_adapter *adapter;    /* adapter that owns this port */
 398         struct net_device *netdev;
 399         struct net_device_stats stats;
 400         struct ehea_port_res port_res[EHEA_MAX_PORT_RES];
 401         struct of_device  ofdev; /* Open Firmware Device */
 402         struct ehea_mc_list *mc_list;    /* Multicast MAC addresses */
 403         struct vlan_group *vgrp;
 404         struct ehea_eq *qp_eq;
 405         struct work_struct reset_task;
 406         struct semaphore port_lock;
 407         char int_aff_name[EHEA_IRQ_NAME_SIZE];
 408         int allmulti;                    /* Indicates IFF_ALLMULTI state */
 409         int promisc;                     /* Indicates IFF_PROMISC state */
 410         int num_tx_qps;
 411         int num_add_tx_qps;
 412         int num_mcs;
 413         int resets;
 414         u64 mac_addr;
 415         u32 logical_port_id;
 416         u32 port_speed;
 417         u32 msg_enable;
 418         u32 sig_comp_iv;
 419         u32 state;
 420         u8 full_duplex;
 421         u8 autoneg;
 422         u8 num_def_qps;
 423 };
 424
 425 struct port_res_cfg {
 426         int max_entries_rcq;
 427         int max_entries_scq;
 428         int max_entries_sq;
 429         int max_entries_rq1;
 430         int max_entries_rq2;
 431         int max_entries_rq3;
 432 };
 433
 434
 435 void ehea_set_ethtool_ops(struct net_device *netdev);
 436 int ehea_sense_port_attr(struct ehea_port *port);
 437 int ehea_set_portspeed(struct ehea_port *port, u32 port_speed);
 438
 439 #endif  /* __EHEA_H__ */