2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2010 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #define DRV_VERSION "1.1"
12 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/delay.h>
22 #include <linux/timer.h>
23 #include <linux/errno.h>
24 #include <linux/irq.h>
26 #include <linux/ioport.h>
27 #include <linux/crc32.h>
28 #include <linux/device.h>
29 #include <linux/spinlock.h>
30 #include <linux/mii.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/ethtool.h>
34 #include <linux/skbuff.h>
35 #include <linux/platform_device.h>
38 #include <linux/dma-mapping.h>
40 #include <asm/div64.h>
42 #include <asm/blackfin.h>
43 #include <asm/cacheflush.h>
44 #include <asm/portmux.h>
49 MODULE_AUTHOR("Bryan Wu, Luke Yang");
50 MODULE_LICENSE("GPL");
51 MODULE_DESCRIPTION(DRV_DESC
);
52 MODULE_ALIAS("platform:bfin_mac");
54 #if defined(CONFIG_BFIN_MAC_USE_L1)
55 # define bfin_mac_alloc(dma_handle, size, num) l1_data_sram_zalloc(size*num)
56 # define bfin_mac_free(dma_handle, ptr, num) l1_data_sram_free(ptr)
58 # define bfin_mac_alloc(dma_handle, size, num) \
59 dma_alloc_coherent(NULL, size*num, dma_handle, GFP_KERNEL)
60 # define bfin_mac_free(dma_handle, ptr, num) \
61 dma_free_coherent(NULL, sizeof(*ptr)*num, ptr, dma_handle)
64 #define PKT_BUF_SZ 1580
66 #define MAX_TIMEOUT_CNT 500
68 /* pointers to maintain transmit list */
69 static struct net_dma_desc_tx
*tx_list_head
;
70 static struct net_dma_desc_tx
*tx_list_tail
;
71 static struct net_dma_desc_rx
*rx_list_head
;
72 static struct net_dma_desc_rx
*rx_list_tail
;
73 static struct net_dma_desc_rx
*current_rx_ptr
;
74 static struct net_dma_desc_tx
*current_tx_ptr
;
75 static struct net_dma_desc_tx
*tx_desc
;
76 static struct net_dma_desc_rx
*rx_desc
;
78 static void desc_list_free(void)
80 struct net_dma_desc_rx
*r
;
81 struct net_dma_desc_tx
*t
;
83 #if !defined(CONFIG_BFIN_MAC_USE_L1)
84 dma_addr_t dma_handle
= 0;
89 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
92 dev_kfree_skb(t
->skb
);
98 bfin_mac_free(dma_handle
, tx_desc
, CONFIG_BFIN_TX_DESC_NUM
);
103 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
106 dev_kfree_skb(r
->skb
);
112 bfin_mac_free(dma_handle
, rx_desc
, CONFIG_BFIN_RX_DESC_NUM
);
116 static int desc_list_init(struct net_device
*dev
)
119 struct sk_buff
*new_skb
;
120 #if !defined(CONFIG_BFIN_MAC_USE_L1)
122 * This dma_handle is useless in Blackfin dma_alloc_coherent().
123 * The real dma handler is the return value of dma_alloc_coherent().
125 dma_addr_t dma_handle
;
128 tx_desc
= bfin_mac_alloc(&dma_handle
,
129 sizeof(struct net_dma_desc_tx
),
130 CONFIG_BFIN_TX_DESC_NUM
);
134 rx_desc
= bfin_mac_alloc(&dma_handle
,
135 sizeof(struct net_dma_desc_rx
),
136 CONFIG_BFIN_RX_DESC_NUM
);
141 tx_list_head
= tx_list_tail
= tx_desc
;
143 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
144 struct net_dma_desc_tx
*t
= tx_desc
+ i
;
145 struct dma_descriptor
*a
= &(t
->desc_a
);
146 struct dma_descriptor
*b
= &(t
->desc_b
);
150 * read from memory WNR = 0
151 * wordsize is 32 bits
152 * 6 half words is desc size
155 a
->config
= WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
156 a
->start_addr
= (unsigned long)t
->packet
;
158 a
->next_dma_desc
= b
;
162 * write to memory WNR = 1
163 * wordsize is 32 bits
165 * 6 half words is desc size
168 b
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
169 b
->start_addr
= (unsigned long)(&(t
->status
));
173 tx_list_tail
->desc_b
.next_dma_desc
= a
;
174 tx_list_tail
->next
= t
;
177 tx_list_tail
->next
= tx_list_head
; /* tx_list is a circle */
178 tx_list_tail
->desc_b
.next_dma_desc
= &(tx_list_head
->desc_a
);
179 current_tx_ptr
= tx_list_head
;
182 rx_list_head
= rx_list_tail
= rx_desc
;
184 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
185 struct net_dma_desc_rx
*r
= rx_desc
+ i
;
186 struct dma_descriptor
*a
= &(r
->desc_a
);
187 struct dma_descriptor
*b
= &(r
->desc_b
);
189 /* allocate a new skb for next time receive */
190 new_skb
= netdev_alloc_skb(dev
, PKT_BUF_SZ
+ NET_IP_ALIGN
);
192 pr_notice("init: low on mem - packet dropped\n");
195 skb_reserve(new_skb
, NET_IP_ALIGN
);
196 /* Invidate the data cache of skb->data range when it is write back
197 * cache. It will prevent overwritting the new data from DMA
199 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
200 (unsigned long)new_skb
->end
);
205 * write to memory WNR = 1
206 * wordsize is 32 bits
208 * 6 half words is desc size
211 a
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
212 /* since RXDWA is enabled */
213 a
->start_addr
= (unsigned long)new_skb
->data
- 2;
215 a
->next_dma_desc
= b
;
219 * write to memory WNR = 1
220 * wordsize is 32 bits
222 * 6 half words is desc size
225 b
->config
= DMAEN
| WNR
| WDSIZE_32
| DI_EN
|
226 NDSIZE_6
| DMAFLOW_LARGE
;
227 b
->start_addr
= (unsigned long)(&(r
->status
));
230 rx_list_tail
->desc_b
.next_dma_desc
= a
;
231 rx_list_tail
->next
= r
;
234 rx_list_tail
->next
= rx_list_head
; /* rx_list is a circle */
235 rx_list_tail
->desc_b
.next_dma_desc
= &(rx_list_head
->desc_a
);
236 current_rx_ptr
= rx_list_head
;
242 pr_err("kmalloc failed\n");
247 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
252 /* Wait until the previous MDC/MDIO transaction has completed */
253 static int bfin_mdio_poll(void)
255 int timeout_cnt
= MAX_TIMEOUT_CNT
;
257 /* poll the STABUSY bit */
258 while ((bfin_read_EMAC_STAADD()) & STABUSY
) {
260 if (timeout_cnt
-- < 0) {
261 pr_err("wait MDC/MDIO transaction to complete timeout\n");
269 /* Read an off-chip register in a PHY through the MDC/MDIO port */
270 static int bfin_mdiobus_read(struct mii_bus
*bus
, int phy_addr
, int regnum
)
274 ret
= bfin_mdio_poll();
279 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
280 SET_REGAD((u16
) regnum
) |
283 ret
= bfin_mdio_poll();
287 return (int) bfin_read_EMAC_STADAT();
290 /* Write an off-chip register in a PHY through the MDC/MDIO port */
291 static int bfin_mdiobus_write(struct mii_bus
*bus
, int phy_addr
, int regnum
,
296 ret
= bfin_mdio_poll();
300 bfin_write_EMAC_STADAT((u32
) value
);
303 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
304 SET_REGAD((u16
) regnum
) |
308 return bfin_mdio_poll();
311 static int bfin_mdiobus_reset(struct mii_bus
*bus
)
316 static void bfin_mac_adjust_link(struct net_device
*dev
)
318 struct bfin_mac_local
*lp
= netdev_priv(dev
);
319 struct phy_device
*phydev
= lp
->phydev
;
323 spin_lock_irqsave(&lp
->lock
, flags
);
325 /* Now we make sure that we can be in full duplex mode.
326 * If not, we operate in half-duplex mode. */
327 if (phydev
->duplex
!= lp
->old_duplex
) {
328 u32 opmode
= bfin_read_EMAC_OPMODE();
336 bfin_write_EMAC_OPMODE(opmode
);
337 lp
->old_duplex
= phydev
->duplex
;
340 if (phydev
->speed
!= lp
->old_speed
) {
341 if (phydev
->interface
== PHY_INTERFACE_MODE_RMII
) {
342 u32 opmode
= bfin_read_EMAC_OPMODE();
343 switch (phydev
->speed
) {
352 "Ack! Speed (%d) is not 10/100!\n",
356 bfin_write_EMAC_OPMODE(opmode
);
360 lp
->old_speed
= phydev
->speed
;
367 } else if (lp
->old_link
) {
375 u32 opmode
= bfin_read_EMAC_OPMODE();
376 phy_print_status(phydev
);
377 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode
);
380 spin_unlock_irqrestore(&lp
->lock
, flags
);
384 #define MDC_CLK 2500000
386 static int mii_probe(struct net_device
*dev
, int phy_mode
)
388 struct bfin_mac_local
*lp
= netdev_priv(dev
);
389 struct phy_device
*phydev
= NULL
;
390 unsigned short sysctl
;
394 /* Enable PHY output early */
395 if (!(bfin_read_VR_CTL() & CLKBUFOE
))
396 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE
);
399 mdc_div
= ((sclk
/ MDC_CLK
) / 2) - 1;
401 sysctl
= bfin_read_EMAC_SYSCTL();
402 sysctl
= (sysctl
& ~MDCDIV
) | SET_MDCDIV(mdc_div
);
403 bfin_write_EMAC_SYSCTL(sysctl
);
405 /* search for connected PHY device */
406 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
) {
407 struct phy_device
*const tmp_phydev
= lp
->mii_bus
->phy_map
[i
];
410 continue; /* no PHY here... */
413 break; /* found it */
416 /* now we are supposed to have a proper phydev, to attach to... */
418 netdev_err(dev
, "no phy device found\n");
422 if (phy_mode
!= PHY_INTERFACE_MODE_RMII
&&
423 phy_mode
!= PHY_INTERFACE_MODE_MII
) {
424 netdev_err(dev
, "invalid phy interface mode\n");
428 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
), &bfin_mac_adjust_link
,
431 if (IS_ERR(phydev
)) {
432 netdev_err(dev
, "could not attach PHY\n");
433 return PTR_ERR(phydev
);
436 /* mask with MAC supported features */
437 phydev
->supported
&= (SUPPORTED_10baseT_Half
438 | SUPPORTED_10baseT_Full
439 | SUPPORTED_100baseT_Half
440 | SUPPORTED_100baseT_Full
442 | SUPPORTED_Pause
| SUPPORTED_Asym_Pause
446 phydev
->advertising
= phydev
->supported
;
453 pr_info("attached PHY driver [%s] "
454 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",
455 phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
,
456 MDC_CLK
, mdc_div
, sclk
/1000000);
466 * interrupt routine for magic packet wakeup
468 static irqreturn_t
bfin_mac_wake_interrupt(int irq
, void *dev_id
)
474 bfin_mac_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
476 struct bfin_mac_local
*lp
= netdev_priv(dev
);
479 return phy_ethtool_gset(lp
->phydev
, cmd
);
485 bfin_mac_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
487 struct bfin_mac_local
*lp
= netdev_priv(dev
);
489 if (!capable(CAP_NET_ADMIN
))
493 return phy_ethtool_sset(lp
->phydev
, cmd
);
498 static void bfin_mac_ethtool_getdrvinfo(struct net_device
*dev
,
499 struct ethtool_drvinfo
*info
)
501 strcpy(info
->driver
, KBUILD_MODNAME
);
502 strcpy(info
->version
, DRV_VERSION
);
503 strcpy(info
->fw_version
, "N/A");
504 strcpy(info
->bus_info
, dev_name(&dev
->dev
));
507 static void bfin_mac_ethtool_getwol(struct net_device
*dev
,
508 struct ethtool_wolinfo
*wolinfo
)
510 struct bfin_mac_local
*lp
= netdev_priv(dev
);
512 wolinfo
->supported
= WAKE_MAGIC
;
513 wolinfo
->wolopts
= lp
->wol
;
516 static int bfin_mac_ethtool_setwol(struct net_device
*dev
,
517 struct ethtool_wolinfo
*wolinfo
)
519 struct bfin_mac_local
*lp
= netdev_priv(dev
);
522 if (wolinfo
->wolopts
& (WAKE_MAGICSECURE
|
529 lp
->wol
= wolinfo
->wolopts
;
531 if (lp
->wol
&& !lp
->irq_wake_requested
) {
532 /* register wake irq handler */
533 rc
= request_irq(IRQ_MAC_WAKEDET
, bfin_mac_wake_interrupt
,
534 IRQF_DISABLED
, "EMAC_WAKE", dev
);
537 lp
->irq_wake_requested
= true;
540 if (!lp
->wol
&& lp
->irq_wake_requested
) {
541 free_irq(IRQ_MAC_WAKEDET
, dev
);
542 lp
->irq_wake_requested
= false;
545 /* Make sure the PHY driver doesn't suspend */
546 device_init_wakeup(&dev
->dev
, lp
->wol
);
551 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
552 static int bfin_mac_ethtool_get_ts_info(struct net_device
*dev
,
553 struct ethtool_ts_info
*info
)
555 struct bfin_mac_local
*lp
= netdev_priv(dev
);
557 info
->so_timestamping
=
558 SOF_TIMESTAMPING_TX_HARDWARE
|
559 SOF_TIMESTAMPING_RX_HARDWARE
|
560 SOF_TIMESTAMPING_RAW_HARDWARE
;
561 info
->phc_index
= lp
->phc_index
;
563 (1 << HWTSTAMP_TX_OFF
) |
564 (1 << HWTSTAMP_TX_ON
);
566 (1 << HWTSTAMP_FILTER_NONE
) |
567 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT
) |
568 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT
) |
569 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT
);
574 static const struct ethtool_ops bfin_mac_ethtool_ops
= {
575 .get_settings
= bfin_mac_ethtool_getsettings
,
576 .set_settings
= bfin_mac_ethtool_setsettings
,
577 .get_link
= ethtool_op_get_link
,
578 .get_drvinfo
= bfin_mac_ethtool_getdrvinfo
,
579 .get_wol
= bfin_mac_ethtool_getwol
,
580 .set_wol
= bfin_mac_ethtool_setwol
,
581 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
582 .get_ts_info
= bfin_mac_ethtool_get_ts_info
,
586 /**************************************************************************/
587 static void setup_system_regs(struct net_device
*dev
)
589 struct bfin_mac_local
*lp
= netdev_priv(dev
);
591 unsigned short sysctl
;
594 * Odd word alignment for Receive Frame DMA word
595 * Configure checksum support and rcve frame word alignment
597 sysctl
= bfin_read_EMAC_SYSCTL();
599 * check if interrupt is requested for any PHY,
600 * enable PHY interrupt only if needed
602 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
603 if (lp
->mii_bus
->irq
[i
] != PHY_POLL
)
605 if (i
< PHY_MAX_ADDR
)
608 #if defined(BFIN_MAC_CSUM_OFFLOAD)
613 bfin_write_EMAC_SYSCTL(sysctl
);
615 bfin_write_EMAC_MMC_CTL(RSTC
| CROLL
);
617 /* Set vlan regs to let 1522 bytes long packets pass through */
618 bfin_write_EMAC_VLAN1(lp
->vlan1_mask
);
619 bfin_write_EMAC_VLAN2(lp
->vlan2_mask
);
621 /* Initialize the TX DMA channel registers */
622 bfin_write_DMA2_X_COUNT(0);
623 bfin_write_DMA2_X_MODIFY(4);
624 bfin_write_DMA2_Y_COUNT(0);
625 bfin_write_DMA2_Y_MODIFY(0);
627 /* Initialize the RX DMA channel registers */
628 bfin_write_DMA1_X_COUNT(0);
629 bfin_write_DMA1_X_MODIFY(4);
630 bfin_write_DMA1_Y_COUNT(0);
631 bfin_write_DMA1_Y_MODIFY(0);
634 static void setup_mac_addr(u8
*mac_addr
)
636 u32 addr_low
= le32_to_cpu(*(__le32
*) & mac_addr
[0]);
637 u16 addr_hi
= le16_to_cpu(*(__le16
*) & mac_addr
[4]);
639 /* this depends on a little-endian machine */
640 bfin_write_EMAC_ADDRLO(addr_low
);
641 bfin_write_EMAC_ADDRHI(addr_hi
);
644 static int bfin_mac_set_mac_address(struct net_device
*dev
, void *p
)
646 struct sockaddr
*addr
= p
;
647 if (netif_running(dev
))
649 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
650 dev
->addr_assign_type
&= ~NET_ADDR_RANDOM
;
651 setup_mac_addr(dev
->dev_addr
);
655 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
656 #define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
658 static u32
bfin_select_phc_clock(u32 input_clk
, unsigned int *shift_result
)
660 u32 ipn
= 1000000000UL / input_clk
;
662 unsigned int shift
= 0;
668 *shift_result
= shift
;
669 return 1000000000UL / ppn
;
672 static int bfin_mac_hwtstamp_ioctl(struct net_device
*netdev
,
673 struct ifreq
*ifr
, int cmd
)
675 struct hwtstamp_config config
;
676 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
678 u32 ptpfv1
, ptpfv2
, ptpfv3
, ptpfoff
;
680 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
683 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
684 __func__
, config
.flags
, config
.tx_type
, config
.rx_filter
);
686 /* reserved for future extensions */
690 if ((config
.tx_type
!= HWTSTAMP_TX_OFF
) &&
691 (config
.tx_type
!= HWTSTAMP_TX_ON
))
694 ptpctl
= bfin_read_EMAC_PTP_CTL();
696 switch (config
.rx_filter
) {
697 case HWTSTAMP_FILTER_NONE
:
699 * Dont allow any timestamping
702 bfin_write_EMAC_PTP_FV3(ptpfv3
);
704 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
705 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
706 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
708 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
709 * to enable all the field matches.
712 bfin_write_EMAC_PTP_CTL(ptpctl
);
714 * Keep the default values of the EMAC_PTP_FOFF register.
716 ptpfoff
= 0x4A24170C;
717 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
719 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
723 bfin_write_EMAC_PTP_FV1(ptpfv1
);
725 bfin_write_EMAC_PTP_FV2(ptpfv2
);
727 * The default value (0xFFFC) allows the timestamping of both
728 * received Sync messages and Delay_Req messages.
731 bfin_write_EMAC_PTP_FV3(ptpfv3
);
733 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V1_L4_EVENT
;
735 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
736 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
737 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
738 /* Clear all five comparison mask bits (bits[12:8]) in the
739 * EMAC_PTP_CTL register to enable all the field matches.
742 bfin_write_EMAC_PTP_CTL(ptpctl
);
744 * Keep the default values of the EMAC_PTP_FOFF register, except set
745 * the PTPCOF field to 0x2A.
747 ptpfoff
= 0x2A24170C;
748 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
750 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
754 bfin_write_EMAC_PTP_FV1(ptpfv1
);
756 bfin_write_EMAC_PTP_FV2(ptpfv2
);
758 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
759 * the value to 0xFFF0.
762 bfin_write_EMAC_PTP_FV3(ptpfv3
);
764 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L4_EVENT
;
766 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
767 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
768 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
770 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
771 * EFTM and PTPCM field comparison.
774 bfin_write_EMAC_PTP_CTL(ptpctl
);
776 * Keep the default values of all the fields of the EMAC_PTP_FOFF
777 * register, except set the PTPCOF field to 0x0E.
779 ptpfoff
= 0x0E24170C;
780 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
782 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
783 * corresponds to PTP messages on the MAC layer.
786 bfin_write_EMAC_PTP_FV1(ptpfv1
);
788 bfin_write_EMAC_PTP_FV2(ptpfv2
);
790 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
791 * messages, set the value to 0xFFF0.
794 bfin_write_EMAC_PTP_FV3(ptpfv3
);
796 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L2_EVENT
;
802 if (config
.tx_type
== HWTSTAMP_TX_OFF
&&
803 bfin_mac_hwtstamp_is_none(config
.rx_filter
)) {
805 bfin_write_EMAC_PTP_CTL(ptpctl
);
810 bfin_write_EMAC_PTP_CTL(ptpctl
);
813 * clear any existing timestamp
815 bfin_read_EMAC_PTP_RXSNAPLO();
816 bfin_read_EMAC_PTP_RXSNAPHI();
818 bfin_read_EMAC_PTP_TXSNAPLO();
819 bfin_read_EMAC_PTP_TXSNAPHI();
824 lp
->stamp_cfg
= config
;
825 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
829 static void bfin_tx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
831 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
833 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) {
834 int timeout_cnt
= MAX_TIMEOUT_CNT
;
836 /* When doing time stamping, keep the connection to the socket
839 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
842 * The timestamping is done at the EMAC module's MII/RMII interface
843 * when the module sees the Start of Frame of an event message packet. This
844 * interface is the closest possible place to the physical Ethernet transmission
845 * medium, providing the best timing accuracy.
847 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL
)) && (--timeout_cnt
))
849 if (timeout_cnt
== 0)
850 netdev_err(netdev
, "timestamp the TX packet failed\n");
852 struct skb_shared_hwtstamps shhwtstamps
;
856 regval
= bfin_read_EMAC_PTP_TXSNAPLO();
857 regval
|= (u64
)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
858 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
859 ns
= regval
<< lp
->shift
;
860 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
861 skb_tstamp_tx(skb
, &shhwtstamps
);
866 static void bfin_rx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
868 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
871 struct skb_shared_hwtstamps
*shhwtstamps
;
873 if (bfin_mac_hwtstamp_is_none(lp
->stamp_cfg
.rx_filter
))
876 valid
= bfin_read_EMAC_PTP_ISTAT() & RXEL
;
880 shhwtstamps
= skb_hwtstamps(skb
);
882 regval
= bfin_read_EMAC_PTP_RXSNAPLO();
883 regval
|= (u64
)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
884 ns
= regval
<< lp
->shift
;
885 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
886 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
889 static void bfin_mac_hwtstamp_init(struct net_device
*netdev
)
891 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
893 u32 input_clk
, phc_clk
;
895 /* Initialize hardware timer */
896 input_clk
= get_sclk();
897 phc_clk
= bfin_select_phc_clock(input_clk
, &lp
->shift
);
898 addend
= phc_clk
* (1ULL << 32);
899 do_div(addend
, input_clk
);
900 bfin_write_EMAC_PTP_ADDEND((u32
)addend
);
903 ppb
= 1000000000ULL * input_clk
;
904 do_div(ppb
, phc_clk
);
905 lp
->max_ppb
= ppb
- 1000000000ULL - 1ULL;
907 /* Initialize hwstamp config */
908 lp
->stamp_cfg
.rx_filter
= HWTSTAMP_FILTER_NONE
;
909 lp
->stamp_cfg
.tx_type
= HWTSTAMP_TX_OFF
;
912 static u64
bfin_ptp_time_read(struct bfin_mac_local
*lp
)
917 lo
= bfin_read_EMAC_PTP_TIMELO();
918 hi
= bfin_read_EMAC_PTP_TIMEHI();
920 ns
= ((u64
) hi
) << 32;
927 static void bfin_ptp_time_write(struct bfin_mac_local
*lp
, u64 ns
)
933 lo
= ns
& 0xffffffff;
935 bfin_write_EMAC_PTP_TIMELO(lo
);
936 bfin_write_EMAC_PTP_TIMEHI(hi
);
939 /* PTP Hardware Clock operations */
941 static int bfin_ptp_adjfreq(struct ptp_clock_info
*ptp
, s32 ppb
)
946 struct bfin_mac_local
*lp
=
947 container_of(ptp
, struct bfin_mac_local
, caps
);
956 diff
= div_u64(adj
, 1000000000ULL);
958 addend
= neg_adj
? addend
- diff
: addend
+ diff
;
960 bfin_write_EMAC_PTP_ADDEND(addend
);
965 static int bfin_ptp_adjtime(struct ptp_clock_info
*ptp
, s64 delta
)
969 struct bfin_mac_local
*lp
=
970 container_of(ptp
, struct bfin_mac_local
, caps
);
972 spin_lock_irqsave(&lp
->phc_lock
, flags
);
974 now
= bfin_ptp_time_read(lp
);
976 bfin_ptp_time_write(lp
, now
);
978 spin_unlock_irqrestore(&lp
->phc_lock
, flags
);
983 static int bfin_ptp_gettime(struct ptp_clock_info
*ptp
, struct timespec
*ts
)
988 struct bfin_mac_local
*lp
=
989 container_of(ptp
, struct bfin_mac_local
, caps
);
991 spin_lock_irqsave(&lp
->phc_lock
, flags
);
993 ns
= bfin_ptp_time_read(lp
);
995 spin_unlock_irqrestore(&lp
->phc_lock
, flags
);
997 ts
->tv_sec
= div_u64_rem(ns
, 1000000000, &remainder
);
998 ts
->tv_nsec
= remainder
;
1002 static int bfin_ptp_settime(struct ptp_clock_info
*ptp
,
1003 const struct timespec
*ts
)
1006 unsigned long flags
;
1007 struct bfin_mac_local
*lp
=
1008 container_of(ptp
, struct bfin_mac_local
, caps
);
1010 ns
= ts
->tv_sec
* 1000000000ULL;
1013 spin_lock_irqsave(&lp
->phc_lock
, flags
);
1015 bfin_ptp_time_write(lp
, ns
);
1017 spin_unlock_irqrestore(&lp
->phc_lock
, flags
);
1022 static int bfin_ptp_enable(struct ptp_clock_info
*ptp
,
1023 struct ptp_clock_request
*rq
, int on
)
1028 static struct ptp_clock_info bfin_ptp_caps
= {
1029 .owner
= THIS_MODULE
,
1030 .name
= "BF518 clock",
1036 .adjfreq
= bfin_ptp_adjfreq
,
1037 .adjtime
= bfin_ptp_adjtime
,
1038 .gettime
= bfin_ptp_gettime
,
1039 .settime
= bfin_ptp_settime
,
1040 .enable
= bfin_ptp_enable
,
1043 static int bfin_phc_init(struct net_device
*netdev
, struct device
*dev
)
1045 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
1047 lp
->caps
= bfin_ptp_caps
;
1048 lp
->caps
.max_adj
= lp
->max_ppb
;
1049 lp
->clock
= ptp_clock_register(&lp
->caps
, dev
);
1050 if (IS_ERR(lp
->clock
))
1051 return PTR_ERR(lp
->clock
);
1053 lp
->phc_index
= ptp_clock_index(lp
->clock
);
1054 spin_lock_init(&lp
->phc_lock
);
1059 static void bfin_phc_release(struct bfin_mac_local
*lp
)
1061 ptp_clock_unregister(lp
->clock
);
1065 # define bfin_mac_hwtstamp_is_none(cfg) 0
1066 # define bfin_mac_hwtstamp_init(dev)
1067 # define bfin_mac_hwtstamp_ioctl(dev, ifr, cmd) (-EOPNOTSUPP)
1068 # define bfin_rx_hwtstamp(dev, skb)
1069 # define bfin_tx_hwtstamp(dev, skb)
1070 # define bfin_phc_init(netdev, dev) 0
1071 # define bfin_phc_release(lp)
1074 static inline void _tx_reclaim_skb(void)
1077 tx_list_head
->desc_a
.config
&= ~DMAEN
;
1078 tx_list_head
->status
.status_word
= 0;
1079 if (tx_list_head
->skb
) {
1080 dev_kfree_skb(tx_list_head
->skb
);
1081 tx_list_head
->skb
= NULL
;
1083 tx_list_head
= tx_list_head
->next
;
1085 } while (tx_list_head
->status
.status_word
!= 0);
1088 static void tx_reclaim_skb(struct bfin_mac_local
*lp
)
1090 int timeout_cnt
= MAX_TIMEOUT_CNT
;
1092 if (tx_list_head
->status
.status_word
!= 0)
1095 if (current_tx_ptr
->next
== tx_list_head
) {
1096 while (tx_list_head
->status
.status_word
== 0) {
1097 /* slow down polling to avoid too many queue stop. */
1099 /* reclaim skb if DMA is not running. */
1100 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
))
1102 if (timeout_cnt
-- < 0)
1106 if (timeout_cnt
>= 0)
1109 netif_stop_queue(lp
->ndev
);
1112 if (current_tx_ptr
->next
!= tx_list_head
&&
1113 netif_queue_stopped(lp
->ndev
))
1114 netif_wake_queue(lp
->ndev
);
1116 if (tx_list_head
!= current_tx_ptr
) {
1117 /* shorten the timer interval if tx queue is stopped */
1118 if (netif_queue_stopped(lp
->ndev
))
1119 lp
->tx_reclaim_timer
.expires
=
1120 jiffies
+ (TX_RECLAIM_JIFFIES
>> 4);
1122 lp
->tx_reclaim_timer
.expires
=
1123 jiffies
+ TX_RECLAIM_JIFFIES
;
1125 mod_timer(&lp
->tx_reclaim_timer
,
1126 lp
->tx_reclaim_timer
.expires
);
1132 static void tx_reclaim_skb_timeout(unsigned long lp
)
1134 tx_reclaim_skb((struct bfin_mac_local
*)lp
);
1137 static int bfin_mac_hard_start_xmit(struct sk_buff
*skb
,
1138 struct net_device
*dev
)
1140 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1142 u32 data_align
= (unsigned long)(skb
->data
) & 0x3;
1144 current_tx_ptr
->skb
= skb
;
1146 if (data_align
== 0x2) {
1147 /* move skb->data to current_tx_ptr payload */
1148 data
= (u16
*)(skb
->data
) - 1;
1149 *data
= (u16
)(skb
->len
);
1151 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1152 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1153 * of this field are the length of the packet payload in bytes and the higher
1154 * 4 bits are the timestamping enable field.
1156 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)
1159 current_tx_ptr
->desc_a
.start_addr
= (u32
)data
;
1160 /* this is important! */
1161 blackfin_dcache_flush_range((u32
)data
,
1162 (u32
)((u8
*)data
+ skb
->len
+ 4));
1164 *((u16
*)(current_tx_ptr
->packet
)) = (u16
)(skb
->len
);
1165 /* enable timestamping for the sent packet */
1166 if (skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)
1167 *((u16
*)(current_tx_ptr
->packet
)) |= 0x1000;
1168 memcpy((u8
*)(current_tx_ptr
->packet
+ 2), skb
->data
,
1170 current_tx_ptr
->desc_a
.start_addr
=
1171 (u32
)current_tx_ptr
->packet
;
1172 blackfin_dcache_flush_range(
1173 (u32
)current_tx_ptr
->packet
,
1174 (u32
)(current_tx_ptr
->packet
+ skb
->len
+ 2));
1177 /* make sure the internal data buffers in the core are drained
1178 * so that the DMA descriptors are completely written when the
1179 * DMA engine goes to fetch them below
1183 /* always clear status buffer before start tx dma */
1184 current_tx_ptr
->status
.status_word
= 0;
1186 /* enable this packet's dma */
1187 current_tx_ptr
->desc_a
.config
|= DMAEN
;
1189 /* tx dma is running, just return */
1190 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
)
1193 /* tx dma is not running */
1194 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr
->desc_a
));
1195 /* dma enabled, read from memory, size is 6 */
1196 bfin_write_DMA2_CONFIG(current_tx_ptr
->desc_a
.config
);
1197 /* Turn on the EMAC tx */
1198 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1201 bfin_tx_hwtstamp(dev
, skb
);
1203 current_tx_ptr
= current_tx_ptr
->next
;
1204 dev
->stats
.tx_packets
++;
1205 dev
->stats
.tx_bytes
+= (skb
->len
);
1209 return NETDEV_TX_OK
;
1212 #define IP_HEADER_OFF 0
1213 #define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1214 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1216 static void bfin_mac_rx(struct net_device
*dev
)
1218 struct sk_buff
*skb
, *new_skb
;
1220 struct bfin_mac_local
*lp __maybe_unused
= netdev_priv(dev
);
1221 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1223 unsigned char fcs
[ETH_FCS_LEN
+ 1];
1226 /* check if frame status word reports an error condition
1227 * we which case we simply drop the packet
1229 if (current_rx_ptr
->status
.status_word
& RX_ERROR_MASK
) {
1230 netdev_notice(dev
, "rx: receive error - packet dropped\n");
1231 dev
->stats
.rx_dropped
++;
1235 /* allocate a new skb for next time receive */
1236 skb
= current_rx_ptr
->skb
;
1238 new_skb
= netdev_alloc_skb(dev
, PKT_BUF_SZ
+ NET_IP_ALIGN
);
1240 netdev_notice(dev
, "rx: low on mem - packet dropped\n");
1241 dev
->stats
.rx_dropped
++;
1244 /* reserve 2 bytes for RXDWA padding */
1245 skb_reserve(new_skb
, NET_IP_ALIGN
);
1246 /* Invidate the data cache of skb->data range when it is write back
1247 * cache. It will prevent overwritting the new data from DMA
1249 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
1250 (unsigned long)new_skb
->end
);
1252 current_rx_ptr
->skb
= new_skb
;
1253 current_rx_ptr
->desc_a
.start_addr
= (unsigned long)new_skb
->data
- 2;
1255 len
= (unsigned short)((current_rx_ptr
->status
.status_word
) & RX_FRLEN
);
1256 /* Deduce Ethernet FCS length from Ethernet payload length */
1260 skb
->protocol
= eth_type_trans(skb
, dev
);
1262 bfin_rx_hwtstamp(dev
, skb
);
1264 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1265 /* Checksum offloading only works for IPv4 packets with the standard IP header
1266 * length of 20 bytes, because the blackfin MAC checksum calculation is
1267 * based on that assumption. We must NOT use the calculated checksum if our
1268 * IP version or header break that assumption.
1270 if (skb
->data
[IP_HEADER_OFF
] == 0x45) {
1271 skb
->csum
= current_rx_ptr
->status
.ip_payload_csum
;
1273 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1274 * IP checksum is based on 16-bit one's complement algorithm.
1275 * To deduce a value from checksum is equal to add its inversion.
1276 * If the IP payload len is odd, the inversed FCS should also
1277 * begin from odd address and leave first byte zero.
1281 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1282 fcs
[i
+ 1] = ~skb
->data
[skb
->len
+ i
];
1283 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
+ 1, skb
->csum
);
1285 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1286 fcs
[i
] = ~skb
->data
[skb
->len
+ i
];
1287 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
, skb
->csum
);
1289 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1294 dev
->stats
.rx_packets
++;
1295 dev
->stats
.rx_bytes
+= len
;
1297 current_rx_ptr
->status
.status_word
= 0x00000000;
1298 current_rx_ptr
= current_rx_ptr
->next
;
1301 /* interrupt routine to handle rx and error signal */
1302 static irqreturn_t
bfin_mac_interrupt(int irq
, void *dev_id
)
1304 struct net_device
*dev
= dev_id
;
1308 if (current_rx_ptr
->status
.status_word
== 0) {
1309 /* no more new packet received */
1311 if (current_rx_ptr
->next
->status
.status_word
!= 0) {
1312 current_rx_ptr
= current_rx_ptr
->next
;
1316 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
1317 DMA_DONE
| DMA_ERR
);
1324 goto get_one_packet
;
1327 #ifdef CONFIG_NET_POLL_CONTROLLER
1328 static void bfin_mac_poll(struct net_device
*dev
)
1330 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1332 disable_irq(IRQ_MAC_RX
);
1333 bfin_mac_interrupt(IRQ_MAC_RX
, dev
);
1335 enable_irq(IRQ_MAC_RX
);
1337 #endif /* CONFIG_NET_POLL_CONTROLLER */
1339 static void bfin_mac_disable(void)
1341 unsigned int opmode
;
1343 opmode
= bfin_read_EMAC_OPMODE();
1346 /* Turn off the EMAC */
1347 bfin_write_EMAC_OPMODE(opmode
);
1351 * Enable Interrupts, Receive, and Transmit
1353 static int bfin_mac_enable(struct phy_device
*phydev
)
1358 pr_debug("%s\n", __func__
);
1361 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head
->desc_a
));
1362 bfin_write_DMA1_CONFIG(rx_list_head
->desc_a
.config
);
1365 ret
= bfin_mdio_poll();
1369 /* We enable only RX here */
1370 /* ASTP : Enable Automatic Pad Stripping
1371 PR : Promiscuous Mode for test
1372 PSF : Receive frames with total length less than 64 bytes.
1373 FDMODE : Full Duplex Mode
1374 LB : Internal Loopback for test
1375 RE : Receiver Enable */
1376 opmode
= bfin_read_EMAC_OPMODE();
1377 if (opmode
& FDMODE
)
1380 opmode
|= DRO
| DC
| PSF
;
1383 if (phydev
->interface
== PHY_INTERFACE_MODE_RMII
) {
1384 opmode
|= RMII
; /* For Now only 100MBit are supported */
1385 #if defined(CONFIG_BF537) || defined(CONFIG_BF536)
1386 if (__SILICON_REVISION__
< 3) {
1388 * This isn't publicly documented (fun times!), but in
1389 * silicon <=0.2, the RX and TX pins are clocked together.
1390 * So in order to recv, we must enable the transmit side
1391 * as well. This will cause a spurious TX interrupt too,
1392 * but we can easily consume that.
1399 /* Turn on the EMAC rx */
1400 bfin_write_EMAC_OPMODE(opmode
);
1405 /* Our watchdog timed out. Called by the networking layer */
1406 static void bfin_mac_timeout(struct net_device
*dev
)
1408 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1410 pr_debug("%s: %s\n", dev
->name
, __func__
);
1414 del_timer(&lp
->tx_reclaim_timer
);
1416 /* reset tx queue and free skb */
1417 while (tx_list_head
!= current_tx_ptr
) {
1418 tx_list_head
->desc_a
.config
&= ~DMAEN
;
1419 tx_list_head
->status
.status_word
= 0;
1420 if (tx_list_head
->skb
) {
1421 dev_kfree_skb(tx_list_head
->skb
);
1422 tx_list_head
->skb
= NULL
;
1424 tx_list_head
= tx_list_head
->next
;
1427 if (netif_queue_stopped(lp
->ndev
))
1428 netif_wake_queue(lp
->ndev
);
1430 bfin_mac_enable(lp
->phydev
);
1432 /* We can accept TX packets again */
1433 dev
->trans_start
= jiffies
; /* prevent tx timeout */
1434 netif_wake_queue(dev
);
1437 static void bfin_mac_multicast_hash(struct net_device
*dev
)
1439 u32 emac_hashhi
, emac_hashlo
;
1440 struct netdev_hw_addr
*ha
;
1443 emac_hashhi
= emac_hashlo
= 0;
1445 netdev_for_each_mc_addr(ha
, dev
) {
1446 crc
= ether_crc(ETH_ALEN
, ha
->addr
);
1450 emac_hashhi
|= 1 << (crc
& 0x1f);
1452 emac_hashlo
|= 1 << (crc
& 0x1f);
1455 bfin_write_EMAC_HASHHI(emac_hashhi
);
1456 bfin_write_EMAC_HASHLO(emac_hashlo
);
1460 * This routine will, depending on the values passed to it,
1461 * either make it accept multicast packets, go into
1462 * promiscuous mode (for TCPDUMP and cousins) or accept
1463 * a select set of multicast packets
1465 static void bfin_mac_set_multicast_list(struct net_device
*dev
)
1469 if (dev
->flags
& IFF_PROMISC
) {
1470 netdev_info(dev
, "set promisc mode\n");
1471 sysctl
= bfin_read_EMAC_OPMODE();
1473 bfin_write_EMAC_OPMODE(sysctl
);
1474 } else if (dev
->flags
& IFF_ALLMULTI
) {
1475 /* accept all multicast */
1476 sysctl
= bfin_read_EMAC_OPMODE();
1478 bfin_write_EMAC_OPMODE(sysctl
);
1479 } else if (!netdev_mc_empty(dev
)) {
1480 /* set up multicast hash table */
1481 sysctl
= bfin_read_EMAC_OPMODE();
1483 bfin_write_EMAC_OPMODE(sysctl
);
1484 bfin_mac_multicast_hash(dev
);
1486 /* clear promisc or multicast mode */
1487 sysctl
= bfin_read_EMAC_OPMODE();
1488 sysctl
&= ~(RAF
| PAM
);
1489 bfin_write_EMAC_OPMODE(sysctl
);
1493 static int bfin_mac_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1495 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
1497 if (!netif_running(netdev
))
1502 return bfin_mac_hwtstamp_ioctl(netdev
, ifr
, cmd
);
1505 return phy_mii_ioctl(lp
->phydev
, ifr
, cmd
);
1512 * this puts the device in an inactive state
1514 static void bfin_mac_shutdown(struct net_device
*dev
)
1516 /* Turn off the EMAC */
1517 bfin_write_EMAC_OPMODE(0x00000000);
1518 /* Turn off the EMAC RX DMA */
1519 bfin_write_DMA1_CONFIG(0x0000);
1520 bfin_write_DMA2_CONFIG(0x0000);
1524 * Open and Initialize the interface
1526 * Set up everything, reset the card, etc..
1528 static int bfin_mac_open(struct net_device
*dev
)
1530 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1532 pr_debug("%s: %s\n", dev
->name
, __func__
);
1535 * Check that the address is valid. If its not, refuse
1536 * to bring the device up. The user must specify an
1537 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1539 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1540 netdev_warn(dev
, "no valid ethernet hw addr\n");
1544 /* initial rx and tx list */
1545 ret
= desc_list_init(dev
);
1549 phy_start(lp
->phydev
);
1550 phy_write(lp
->phydev
, MII_BMCR
, BMCR_RESET
);
1551 setup_system_regs(dev
);
1552 setup_mac_addr(dev
->dev_addr
);
1555 ret
= bfin_mac_enable(lp
->phydev
);
1558 pr_debug("hardware init finished\n");
1560 netif_start_queue(dev
);
1561 netif_carrier_on(dev
);
1567 * this makes the board clean up everything that it can
1568 * and not talk to the outside world. Caused by
1569 * an 'ifconfig ethX down'
1571 static int bfin_mac_close(struct net_device
*dev
)
1573 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1574 pr_debug("%s: %s\n", dev
->name
, __func__
);
1576 netif_stop_queue(dev
);
1577 netif_carrier_off(dev
);
1579 phy_stop(lp
->phydev
);
1580 phy_write(lp
->phydev
, MII_BMCR
, BMCR_PDOWN
);
1582 /* clear everything */
1583 bfin_mac_shutdown(dev
);
1585 /* free the rx/tx buffers */
1591 static const struct net_device_ops bfin_mac_netdev_ops
= {
1592 .ndo_open
= bfin_mac_open
,
1593 .ndo_stop
= bfin_mac_close
,
1594 .ndo_start_xmit
= bfin_mac_hard_start_xmit
,
1595 .ndo_set_mac_address
= bfin_mac_set_mac_address
,
1596 .ndo_tx_timeout
= bfin_mac_timeout
,
1597 .ndo_set_rx_mode
= bfin_mac_set_multicast_list
,
1598 .ndo_do_ioctl
= bfin_mac_ioctl
,
1599 .ndo_validate_addr
= eth_validate_addr
,
1600 .ndo_change_mtu
= eth_change_mtu
,
1601 #ifdef CONFIG_NET_POLL_CONTROLLER
1602 .ndo_poll_controller
= bfin_mac_poll
,
1606 static int bfin_mac_probe(struct platform_device
*pdev
)
1608 struct net_device
*ndev
;
1609 struct bfin_mac_local
*lp
;
1610 struct platform_device
*pd
;
1611 struct bfin_mii_bus_platform_data
*mii_bus_data
;
1614 ndev
= alloc_etherdev(sizeof(struct bfin_mac_local
));
1618 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1619 platform_set_drvdata(pdev
, ndev
);
1620 lp
= netdev_priv(ndev
);
1623 /* Grab the MAC address in the MAC */
1624 *(__le32
*) (&(ndev
->dev_addr
[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1625 *(__le16
*) (&(ndev
->dev_addr
[4])) = cpu_to_le16((u16
) bfin_read_EMAC_ADDRHI());
1628 /*todo: how to proble? which is revision_register */
1629 bfin_write_EMAC_ADDRLO(0x12345678);
1630 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
1631 dev_err(&pdev
->dev
, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1633 goto out_err_probe_mac
;
1638 * Is it valid? (Did bootloader initialize it?)
1639 * Grab the MAC from the board somehow
1640 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1642 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
1643 if (bfin_get_ether_addr(ndev
->dev_addr
) ||
1644 !is_valid_ether_addr(ndev
->dev_addr
)) {
1645 /* Still not valid, get a random one */
1646 netdev_warn(ndev
, "Setting Ethernet MAC to a random one\n");
1647 eth_hw_addr_random(ndev
);
1651 setup_mac_addr(ndev
->dev_addr
);
1653 if (!pdev
->dev
.platform_data
) {
1654 dev_err(&pdev
->dev
, "Cannot get platform device bfin_mii_bus!\n");
1656 goto out_err_probe_mac
;
1658 pd
= pdev
->dev
.platform_data
;
1659 lp
->mii_bus
= platform_get_drvdata(pd
);
1661 dev_err(&pdev
->dev
, "Cannot get mii_bus!\n");
1663 goto out_err_probe_mac
;
1665 lp
->mii_bus
->priv
= ndev
;
1666 mii_bus_data
= pd
->dev
.platform_data
;
1668 rc
= mii_probe(ndev
, mii_bus_data
->phy_mode
);
1670 dev_err(&pdev
->dev
, "MII Probe failed!\n");
1671 goto out_err_mii_probe
;
1674 lp
->vlan1_mask
= ETH_P_8021Q
| mii_bus_data
->vlan1_mask
;
1675 lp
->vlan2_mask
= ETH_P_8021Q
| mii_bus_data
->vlan2_mask
;
1677 /* Fill in the fields of the device structure with ethernet values. */
1680 ndev
->netdev_ops
= &bfin_mac_netdev_ops
;
1681 ndev
->ethtool_ops
= &bfin_mac_ethtool_ops
;
1683 init_timer(&lp
->tx_reclaim_timer
);
1684 lp
->tx_reclaim_timer
.data
= (unsigned long)lp
;
1685 lp
->tx_reclaim_timer
.function
= tx_reclaim_skb_timeout
;
1687 spin_lock_init(&lp
->lock
);
1689 /* now, enable interrupts */
1690 /* register irq handler */
1691 rc
= request_irq(IRQ_MAC_RX
, bfin_mac_interrupt
,
1692 IRQF_DISABLED
, "EMAC_RX", ndev
);
1694 dev_err(&pdev
->dev
, "Cannot request Blackfin MAC RX IRQ!\n");
1696 goto out_err_request_irq
;
1699 rc
= register_netdev(ndev
);
1701 dev_err(&pdev
->dev
, "Cannot register net device!\n");
1702 goto out_err_reg_ndev
;
1705 bfin_mac_hwtstamp_init(ndev
);
1706 if (bfin_phc_init(ndev
, &pdev
->dev
)) {
1707 dev_err(&pdev
->dev
, "Cannot register PHC device!\n");
1711 /* now, print out the card info, in a short format.. */
1712 netdev_info(ndev
, "%s, Version %s\n", DRV_DESC
, DRV_VERSION
);
1718 free_irq(IRQ_MAC_RX
, ndev
);
1719 out_err_request_irq
:
1721 mdiobus_unregister(lp
->mii_bus
);
1722 mdiobus_free(lp
->mii_bus
);
1724 platform_set_drvdata(pdev
, NULL
);
1730 static int bfin_mac_remove(struct platform_device
*pdev
)
1732 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1733 struct bfin_mac_local
*lp
= netdev_priv(ndev
);
1735 bfin_phc_release(lp
);
1737 platform_set_drvdata(pdev
, NULL
);
1739 lp
->mii_bus
->priv
= NULL
;
1741 unregister_netdev(ndev
);
1743 free_irq(IRQ_MAC_RX
, ndev
);
1751 static int bfin_mac_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1753 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1754 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1757 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE
) | RE
);
1758 bfin_write_EMAC_WKUP_CTL(MPKE
);
1759 enable_irq_wake(IRQ_MAC_WAKEDET
);
1761 if (netif_running(net_dev
))
1762 bfin_mac_close(net_dev
);
1768 static int bfin_mac_resume(struct platform_device
*pdev
)
1770 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1771 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1774 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1775 bfin_write_EMAC_WKUP_CTL(0);
1776 disable_irq_wake(IRQ_MAC_WAKEDET
);
1778 if (netif_running(net_dev
))
1779 bfin_mac_open(net_dev
);
1785 #define bfin_mac_suspend NULL
1786 #define bfin_mac_resume NULL
1787 #endif /* CONFIG_PM */
1789 static int bfin_mii_bus_probe(struct platform_device
*pdev
)
1791 struct mii_bus
*miibus
;
1792 struct bfin_mii_bus_platform_data
*mii_bus_pd
;
1793 const unsigned short *pin_req
;
1796 mii_bus_pd
= dev_get_platdata(&pdev
->dev
);
1798 dev_err(&pdev
->dev
, "No peripherals in platform data!\n");
1803 * We are setting up a network card,
1804 * so set the GPIO pins to Ethernet mode
1806 pin_req
= mii_bus_pd
->mac_peripherals
;
1807 rc
= peripheral_request_list(pin_req
, KBUILD_MODNAME
);
1809 dev_err(&pdev
->dev
, "Requesting peripherals failed!\n");
1814 miibus
= mdiobus_alloc();
1817 miibus
->read
= bfin_mdiobus_read
;
1818 miibus
->write
= bfin_mdiobus_write
;
1819 miibus
->reset
= bfin_mdiobus_reset
;
1821 miibus
->parent
= &pdev
->dev
;
1822 miibus
->name
= "bfin_mii_bus";
1823 miibus
->phy_mask
= mii_bus_pd
->phy_mask
;
1825 snprintf(miibus
->id
, MII_BUS_ID_SIZE
, "%s-%x",
1826 pdev
->name
, pdev
->id
);
1827 miibus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
1829 goto out_err_irq_alloc
;
1831 for (i
= rc
; i
< PHY_MAX_ADDR
; ++i
)
1832 miibus
->irq
[i
] = PHY_POLL
;
1834 rc
= clamp(mii_bus_pd
->phydev_number
, 0, PHY_MAX_ADDR
);
1835 if (rc
!= mii_bus_pd
->phydev_number
)
1836 dev_err(&pdev
->dev
, "Invalid number (%i) of phydevs\n",
1837 mii_bus_pd
->phydev_number
);
1838 for (i
= 0; i
< rc
; ++i
) {
1839 unsigned short phyaddr
= mii_bus_pd
->phydev_data
[i
].addr
;
1840 if (phyaddr
< PHY_MAX_ADDR
)
1841 miibus
->irq
[phyaddr
] = mii_bus_pd
->phydev_data
[i
].irq
;
1844 "Invalid PHY address %i for phydev %i\n",
1848 rc
= mdiobus_register(miibus
);
1850 dev_err(&pdev
->dev
, "Cannot register MDIO bus!\n");
1851 goto out_err_mdiobus_register
;
1854 platform_set_drvdata(pdev
, miibus
);
1857 out_err_mdiobus_register
:
1860 mdiobus_free(miibus
);
1862 peripheral_free_list(pin_req
);
1867 static int bfin_mii_bus_remove(struct platform_device
*pdev
)
1869 struct mii_bus
*miibus
= platform_get_drvdata(pdev
);
1870 struct bfin_mii_bus_platform_data
*mii_bus_pd
=
1871 dev_get_platdata(&pdev
->dev
);
1873 platform_set_drvdata(pdev
, NULL
);
1874 mdiobus_unregister(miibus
);
1876 mdiobus_free(miibus
);
1877 peripheral_free_list(mii_bus_pd
->mac_peripherals
);
1882 static struct platform_driver bfin_mii_bus_driver
= {
1883 .probe
= bfin_mii_bus_probe
,
1884 .remove
= bfin_mii_bus_remove
,
1886 .name
= "bfin_mii_bus",
1887 .owner
= THIS_MODULE
,
1891 static struct platform_driver bfin_mac_driver
= {
1892 .probe
= bfin_mac_probe
,
1893 .remove
= bfin_mac_remove
,
1894 .resume
= bfin_mac_resume
,
1895 .suspend
= bfin_mac_suspend
,
1897 .name
= KBUILD_MODNAME
,
1898 .owner
= THIS_MODULE
,
1902 static int __init
bfin_mac_init(void)
1905 ret
= platform_driver_register(&bfin_mii_bus_driver
);
1907 return platform_driver_register(&bfin_mac_driver
);
1911 module_init(bfin_mac_init
);
1913 static void __exit
bfin_mac_cleanup(void)
1915 platform_driver_unregister(&bfin_mac_driver
);
1916 platform_driver_unregister(&bfin_mii_bus_driver
);
1919 module_exit(bfin_mac_cleanup
);