2 * Allwinner EMAC Fast Ethernet driver for Linux.
4 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
5 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
7 * Based on the Linux driver provided by Allwinner:
8 * Copyright (C) 1997 Sten Wang
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
15 #include <linux/clk.h>
16 #include <linux/etherdevice.h>
17 #include <linux/ethtool.h>
18 #include <linux/gpio.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/mii.h>
23 #include <linux/module.h>
24 #include <linux/netdevice.h>
25 #include <linux/of_address.h>
26 #include <linux/of_irq.h>
27 #include <linux/of_mdio.h>
28 #include <linux/of_net.h>
29 #include <linux/of_platform.h>
30 #include <linux/platform_device.h>
31 #include <linux/phy.h>
33 #include "sun4i-emac.h"
35 #define DRV_NAME "sun4i-emac"
36 #define DRV_VERSION "1.02"
38 #define EMAC_MAX_FRAME_LEN 0x0600
40 /* Transmit timeout, default 5 seconds. */
41 static int watchdog
= 5000;
42 module_param(watchdog
, int, 0400);
43 MODULE_PARM_DESC(watchdog
, "transmit timeout in milliseconds");
45 /* EMAC register address locking.
47 * The EMAC uses an address register to control where data written
48 * to the data register goes. This means that the address register
49 * must be preserved over interrupts or similar calls.
51 * During interrupt and other critical calls, a spinlock is used to
52 * protect the system, but the calls themselves save the address
53 * in the address register in case they are interrupting another
54 * access to the device.
56 * For general accesses a lock is provided so that calls which are
57 * allowed to sleep are serialised so that the address register does
58 * not need to be saved. This lock also serves to serialise access
59 * to the EEPROM and PHY access registers which are shared between
63 /* The driver supports the original EMACE, and now the two newer
64 * devices, EMACA and EMACB.
67 struct emac_board_info
{
70 struct platform_device
*pdev
;
72 void __iomem
*membase
;
74 struct net_device
*ndev
;
75 struct sk_buff
*skb_last
;
78 int emacrx_completed_flag
;
80 struct phy_device
*phy_dev
;
81 struct device_node
*phy_node
;
86 phy_interface_t phy_interface
;
89 static void emac_update_speed(struct net_device
*dev
)
91 struct emac_board_info
*db
= netdev_priv(dev
);
94 /* set EMAC SPEED, depend on PHY */
95 reg_val
= readl(db
->membase
+ EMAC_MAC_SUPP_REG
);
96 reg_val
&= ~(0x1 << 8);
97 if (db
->speed
== SPEED_100
)
99 writel(reg_val
, db
->membase
+ EMAC_MAC_SUPP_REG
);
102 static void emac_update_duplex(struct net_device
*dev
)
104 struct emac_board_info
*db
= netdev_priv(dev
);
105 unsigned int reg_val
;
107 /* set duplex depend on phy */
108 reg_val
= readl(db
->membase
+ EMAC_MAC_CTL1_REG
);
109 reg_val
&= ~EMAC_MAC_CTL1_DUPLEX_EN
;
111 reg_val
|= EMAC_MAC_CTL1_DUPLEX_EN
;
112 writel(reg_val
, db
->membase
+ EMAC_MAC_CTL1_REG
);
115 static void emac_handle_link_change(struct net_device
*dev
)
117 struct emac_board_info
*db
= netdev_priv(dev
);
118 struct phy_device
*phydev
= db
->phy_dev
;
120 int status_change
= 0;
123 if (db
->speed
!= phydev
->speed
) {
124 spin_lock_irqsave(&db
->lock
, flags
);
125 db
->speed
= phydev
->speed
;
126 emac_update_speed(dev
);
127 spin_unlock_irqrestore(&db
->lock
, flags
);
131 if (db
->duplex
!= phydev
->duplex
) {
132 spin_lock_irqsave(&db
->lock
, flags
);
133 db
->duplex
= phydev
->duplex
;
134 emac_update_duplex(dev
);
135 spin_unlock_irqrestore(&db
->lock
, flags
);
140 if (phydev
->link
!= db
->link
) {
145 db
->link
= phydev
->link
;
151 phy_print_status(phydev
);
154 static int emac_mdio_probe(struct net_device
*dev
)
156 struct emac_board_info
*db
= netdev_priv(dev
);
158 /* to-do: PHY interrupts are currently not supported */
160 /* attach the mac to the phy */
161 db
->phy_dev
= of_phy_connect(db
->ndev
, db
->phy_node
,
162 &emac_handle_link_change
, 0,
165 netdev_err(db
->ndev
, "could not find the PHY\n");
169 /* mask with MAC supported features */
170 db
->phy_dev
->supported
&= PHY_BASIC_FEATURES
;
171 db
->phy_dev
->advertising
= db
->phy_dev
->supported
;
180 static void emac_mdio_remove(struct net_device
*dev
)
182 struct emac_board_info
*db
= netdev_priv(dev
);
184 phy_disconnect(db
->phy_dev
);
188 static void emac_reset(struct emac_board_info
*db
)
190 dev_dbg(db
->dev
, "resetting device\n");
193 writel(0, db
->membase
+ EMAC_CTL_REG
);
195 writel(EMAC_CTL_RESET
, db
->membase
+ EMAC_CTL_REG
);
199 static void emac_outblk_32bit(void __iomem
*reg
, void *data
, int count
)
201 writesl(reg
, data
, round_up(count
, 4) / 4);
204 static void emac_inblk_32bit(void __iomem
*reg
, void *data
, int count
)
206 readsl(reg
, data
, round_up(count
, 4) / 4);
209 static int emac_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
211 struct emac_board_info
*dm
= netdev_priv(dev
);
212 struct phy_device
*phydev
= dm
->phy_dev
;
214 if (!netif_running(dev
))
220 return phy_mii_ioctl(phydev
, rq
, cmd
);
224 static void emac_get_drvinfo(struct net_device
*dev
,
225 struct ethtool_drvinfo
*info
)
227 strlcpy(info
->driver
, DRV_NAME
, sizeof(DRV_NAME
));
228 strlcpy(info
->version
, DRV_VERSION
, sizeof(DRV_VERSION
));
229 strlcpy(info
->bus_info
, dev_name(&dev
->dev
), sizeof(info
->bus_info
));
232 static int emac_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
234 struct emac_board_info
*dm
= netdev_priv(dev
);
235 struct phy_device
*phydev
= dm
->phy_dev
;
240 return phy_ethtool_gset(phydev
, cmd
);
243 static int emac_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
245 struct emac_board_info
*dm
= netdev_priv(dev
);
246 struct phy_device
*phydev
= dm
->phy_dev
;
251 return phy_ethtool_sset(phydev
, cmd
);
254 static const struct ethtool_ops emac_ethtool_ops
= {
255 .get_drvinfo
= emac_get_drvinfo
,
256 .get_settings
= emac_get_settings
,
257 .set_settings
= emac_set_settings
,
258 .get_link
= ethtool_op_get_link
,
261 static unsigned int emac_setup(struct net_device
*ndev
)
263 struct emac_board_info
*db
= netdev_priv(ndev
);
264 unsigned int reg_val
;
267 reg_val
= readl(db
->membase
+ EMAC_TX_MODE_REG
);
269 writel(reg_val
| EMAC_TX_MODE_ABORTED_FRAME_EN
,
270 db
->membase
+ EMAC_TX_MODE_REG
);
273 reg_val
= readl(db
->membase
+ EMAC_RX_CTL_REG
);
275 writel(reg_val
| EMAC_RX_CTL_PASS_LEN_OOR_EN
|
276 EMAC_RX_CTL_ACCEPT_UNICAST_EN
| EMAC_RX_CTL_DA_FILTER_EN
|
277 EMAC_RX_CTL_ACCEPT_MULTICAST_EN
|
278 EMAC_RX_CTL_ACCEPT_BROADCAST_EN
,
279 db
->membase
+ EMAC_RX_CTL_REG
);
283 reg_val
= readl(db
->membase
+ EMAC_MAC_CTL0_REG
);
284 writel(reg_val
| EMAC_MAC_CTL0_RX_FLOW_CTL_EN
|
285 EMAC_MAC_CTL0_TX_FLOW_CTL_EN
,
286 db
->membase
+ EMAC_MAC_CTL0_REG
);
289 reg_val
= readl(db
->membase
+ EMAC_MAC_CTL1_REG
);
290 reg_val
|= EMAC_MAC_CTL1_LEN_CHECK_EN
;
291 reg_val
|= EMAC_MAC_CTL1_CRC_EN
;
292 reg_val
|= EMAC_MAC_CTL1_PAD_EN
;
293 writel(reg_val
, db
->membase
+ EMAC_MAC_CTL1_REG
);
296 writel(EMAC_MAC_IPGT_FULL_DUPLEX
, db
->membase
+ EMAC_MAC_IPGT_REG
);
299 writel((EMAC_MAC_IPGR_IPG1
<< 8) | EMAC_MAC_IPGR_IPG2
,
300 db
->membase
+ EMAC_MAC_IPGR_REG
);
302 /* set up Collison window */
303 writel((EMAC_MAC_CLRT_COLLISION_WINDOW
<< 8) | EMAC_MAC_CLRT_RM
,
304 db
->membase
+ EMAC_MAC_CLRT_REG
);
306 /* set up Max Frame Length */
307 writel(EMAC_MAX_FRAME_LEN
,
308 db
->membase
+ EMAC_MAC_MAXF_REG
);
313 static unsigned int emac_powerup(struct net_device
*ndev
)
315 struct emac_board_info
*db
= netdev_priv(ndev
);
316 unsigned int reg_val
;
320 reg_val
= readl(db
->membase
+ EMAC_RX_CTL_REG
);
322 writel(reg_val
, db
->membase
+ EMAC_RX_CTL_REG
);
327 reg_val
= readl(db
->membase
+ EMAC_MAC_CTL0_REG
);
328 reg_val
&= ~EMAC_MAC_CTL0_SOFT_RESET
;
329 writel(reg_val
, db
->membase
+ EMAC_MAC_CTL0_REG
);
332 reg_val
= readl(db
->membase
+ EMAC_MAC_MCFG_REG
);
333 reg_val
&= (~(0xf << 2));
334 reg_val
|= (0xD << 2);
335 writel(reg_val
, db
->membase
+ EMAC_MAC_MCFG_REG
);
337 /* clear RX counter */
338 writel(0x0, db
->membase
+ EMAC_RX_FBC_REG
);
340 /* disable all interrupt and clear interrupt status */
341 writel(0, db
->membase
+ EMAC_INT_CTL_REG
);
342 reg_val
= readl(db
->membase
+ EMAC_INT_STA_REG
);
343 writel(reg_val
, db
->membase
+ EMAC_INT_STA_REG
);
350 /* set mac_address to chip */
351 writel(ndev
->dev_addr
[0] << 16 | ndev
->dev_addr
[1] << 8 | ndev
->
352 dev_addr
[2], db
->membase
+ EMAC_MAC_A1_REG
);
353 writel(ndev
->dev_addr
[3] << 16 | ndev
->dev_addr
[4] << 8 | ndev
->
354 dev_addr
[5], db
->membase
+ EMAC_MAC_A0_REG
);
361 static int emac_set_mac_address(struct net_device
*dev
, void *p
)
363 struct sockaddr
*addr
= p
;
364 struct emac_board_info
*db
= netdev_priv(dev
);
366 if (netif_running(dev
))
369 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
371 writel(dev
->dev_addr
[0] << 16 | dev
->dev_addr
[1] << 8 | dev
->
372 dev_addr
[2], db
->membase
+ EMAC_MAC_A1_REG
);
373 writel(dev
->dev_addr
[3] << 16 | dev
->dev_addr
[4] << 8 | dev
->
374 dev_addr
[5], db
->membase
+ EMAC_MAC_A0_REG
);
379 /* Initialize emac board */
380 static void emac_init_device(struct net_device
*dev
)
382 struct emac_board_info
*db
= netdev_priv(dev
);
384 unsigned int reg_val
;
386 spin_lock_irqsave(&db
->lock
, flags
);
388 emac_update_speed(dev
);
389 emac_update_duplex(dev
);
392 reg_val
= readl(db
->membase
+ EMAC_CTL_REG
);
393 writel(reg_val
| EMAC_CTL_RESET
| EMAC_CTL_TX_EN
| EMAC_CTL_RX_EN
,
394 db
->membase
+ EMAC_CTL_REG
);
396 /* enable RX/TX0/RX Hlevel interrup */
397 reg_val
= readl(db
->membase
+ EMAC_INT_CTL_REG
);
398 reg_val
|= (0xf << 0) | (0x01 << 8);
399 writel(reg_val
, db
->membase
+ EMAC_INT_CTL_REG
);
401 spin_unlock_irqrestore(&db
->lock
, flags
);
404 /* Our watchdog timed out. Called by the networking layer */
405 static void emac_timeout(struct net_device
*dev
)
407 struct emac_board_info
*db
= netdev_priv(dev
);
410 if (netif_msg_timer(db
))
411 dev_err(db
->dev
, "tx time out.\n");
413 /* Save previous register address */
414 spin_lock_irqsave(&db
->lock
, flags
);
416 netif_stop_queue(dev
);
418 emac_init_device(dev
);
419 /* We can accept TX packets again */
420 dev
->trans_start
= jiffies
;
421 netif_wake_queue(dev
);
423 /* Restore previous register address */
424 spin_unlock_irqrestore(&db
->lock
, flags
);
427 /* Hardware start transmission.
428 * Send a packet to media from the upper layer.
430 static int emac_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
432 struct emac_board_info
*db
= netdev_priv(dev
);
433 unsigned long channel
;
436 channel
= db
->tx_fifo_stat
& 3;
440 channel
= (channel
== 1 ? 1 : 0);
442 spin_lock_irqsave(&db
->lock
, flags
);
444 writel(channel
, db
->membase
+ EMAC_TX_INS_REG
);
446 emac_outblk_32bit(db
->membase
+ EMAC_TX_IO_DATA_REG
,
447 skb
->data
, skb
->len
);
448 dev
->stats
.tx_bytes
+= skb
->len
;
450 db
->tx_fifo_stat
|= 1 << channel
;
451 /* TX control: First packet immediately send, second packet queue */
454 writel(skb
->len
, db
->membase
+ EMAC_TX_PL0_REG
);
455 /* start translate from fifo to phy */
456 writel(readl(db
->membase
+ EMAC_TX_CTL0_REG
) | 1,
457 db
->membase
+ EMAC_TX_CTL0_REG
);
459 /* save the time stamp */
460 dev
->trans_start
= jiffies
;
461 } else if (channel
== 1) {
463 writel(skb
->len
, db
->membase
+ EMAC_TX_PL1_REG
);
464 /* start translate from fifo to phy */
465 writel(readl(db
->membase
+ EMAC_TX_CTL1_REG
) | 1,
466 db
->membase
+ EMAC_TX_CTL1_REG
);
468 /* save the time stamp */
469 dev
->trans_start
= jiffies
;
472 if ((db
->tx_fifo_stat
& 3) == 3) {
474 netif_stop_queue(dev
);
477 spin_unlock_irqrestore(&db
->lock
, flags
);
485 /* EMAC interrupt handler
486 * receive the packet to upper layer, free the transmitted packet
488 static void emac_tx_done(struct net_device
*dev
, struct emac_board_info
*db
,
489 unsigned int tx_status
)
491 /* One packet sent complete */
492 db
->tx_fifo_stat
&= ~(tx_status
& 3);
493 if (3 == (tx_status
& 3))
494 dev
->stats
.tx_packets
+= 2;
496 dev
->stats
.tx_packets
++;
498 if (netif_msg_tx_done(db
))
499 dev_dbg(db
->dev
, "tx done, NSR %02x\n", tx_status
);
501 netif_wake_queue(dev
);
504 /* Received a packet and pass to upper layer
506 static void emac_rx(struct net_device
*dev
)
508 struct emac_board_info
*db
= netdev_priv(dev
);
512 static int rxlen_last
;
513 unsigned int reg_val
;
514 u32 rxhdr
, rxstatus
, rxcount
, rxlen
;
516 /* Check packet ready or not */
518 /* race warning: the first packet might arrive with
519 * the interrupts disabled, but the second will fix
522 rxcount
= readl(db
->membase
+ EMAC_RX_FBC_REG
);
524 if (netif_msg_rx_status(db
))
525 dev_dbg(db
->dev
, "RXCount: %x\n", rxcount
);
527 if ((db
->skb_last
!= NULL
) && (rxlen_last
> 0)) {
528 dev
->stats
.rx_bytes
+= rxlen_last
;
530 /* Pass to upper layer */
531 db
->skb_last
->protocol
= eth_type_trans(db
->skb_last
,
533 netif_rx(db
->skb_last
);
534 dev
->stats
.rx_packets
++;
538 reg_val
= readl(db
->membase
+ EMAC_RX_CTL_REG
);
539 reg_val
&= ~EMAC_RX_CTL_DMA_EN
;
540 writel(reg_val
, db
->membase
+ EMAC_RX_CTL_REG
);
544 db
->emacrx_completed_flag
= 1;
545 reg_val
= readl(db
->membase
+ EMAC_INT_CTL_REG
);
546 reg_val
|= (0xf << 0) | (0x01 << 8);
547 writel(reg_val
, db
->membase
+ EMAC_INT_CTL_REG
);
550 rxcount
= readl(db
->membase
+ EMAC_RX_FBC_REG
);
555 reg_val
= readl(db
->membase
+ EMAC_RX_IO_DATA_REG
);
556 if (netif_msg_rx_status(db
))
557 dev_dbg(db
->dev
, "receive header: %x\n", reg_val
);
558 if (reg_val
!= EMAC_UNDOCUMENTED_MAGIC
) {
560 reg_val
= readl(db
->membase
+ EMAC_CTL_REG
);
561 writel(reg_val
& ~EMAC_CTL_RX_EN
,
562 db
->membase
+ EMAC_CTL_REG
);
565 reg_val
= readl(db
->membase
+ EMAC_RX_CTL_REG
);
566 writel(reg_val
| (1 << 3),
567 db
->membase
+ EMAC_RX_CTL_REG
);
570 reg_val
= readl(db
->membase
+ EMAC_RX_CTL_REG
);
571 } while (reg_val
& (1 << 3));
574 reg_val
= readl(db
->membase
+ EMAC_CTL_REG
);
575 writel(reg_val
| EMAC_CTL_RX_EN
,
576 db
->membase
+ EMAC_CTL_REG
);
577 reg_val
= readl(db
->membase
+ EMAC_INT_CTL_REG
);
578 reg_val
|= (0xf << 0) | (0x01 << 8);
579 writel(reg_val
, db
->membase
+ EMAC_INT_CTL_REG
);
581 db
->emacrx_completed_flag
= 1;
586 /* A packet ready now & Get status/length */
589 emac_inblk_32bit(db
->membase
+ EMAC_RX_IO_DATA_REG
,
590 &rxhdr
, sizeof(rxhdr
));
592 if (netif_msg_rx_status(db
))
593 dev_dbg(db
->dev
, "rxhdr: %x\n", *((int *)(&rxhdr
)));
595 rxlen
= EMAC_RX_IO_DATA_LEN(rxhdr
);
596 rxstatus
= EMAC_RX_IO_DATA_STATUS(rxhdr
);
598 if (netif_msg_rx_status(db
))
599 dev_dbg(db
->dev
, "RX: status %02x, length %04x\n",
602 /* Packet Status check */
605 if (netif_msg_rx_err(db
))
606 dev_dbg(db
->dev
, "RX: Bad Packet (runt)\n");
609 if (unlikely(!(rxstatus
& EMAC_RX_IO_DATA_STATUS_OK
))) {
612 if (rxstatus
& EMAC_RX_IO_DATA_STATUS_CRC_ERR
) {
613 if (netif_msg_rx_err(db
))
614 dev_dbg(db
->dev
, "crc error\n");
615 dev
->stats
.rx_crc_errors
++;
618 if (rxstatus
& EMAC_RX_IO_DATA_STATUS_LEN_ERR
) {
619 if (netif_msg_rx_err(db
))
620 dev_dbg(db
->dev
, "length error\n");
621 dev
->stats
.rx_length_errors
++;
625 /* Move data from EMAC */
626 skb
= dev_alloc_skb(rxlen
+ 4);
627 if (good_packet
&& skb
) {
629 rdptr
= (u8
*) skb_put(skb
, rxlen
- 4);
631 /* Read received packet from RX SRAM */
632 if (netif_msg_rx_status(db
))
633 dev_dbg(db
->dev
, "RxLen %x\n", rxlen
);
635 emac_inblk_32bit(db
->membase
+ EMAC_RX_IO_DATA_REG
,
637 dev
->stats
.rx_bytes
+= rxlen
;
639 /* Pass to upper layer */
640 skb
->protocol
= eth_type_trans(skb
, dev
);
642 dev
->stats
.rx_packets
++;
647 static irqreturn_t
emac_interrupt(int irq
, void *dev_id
)
649 struct net_device
*dev
= dev_id
;
650 struct emac_board_info
*db
= netdev_priv(dev
);
653 unsigned int reg_val
;
655 /* A real interrupt coming */
657 /* holders of db->lock must always block IRQs */
658 spin_lock_irqsave(&db
->lock
, flags
);
660 /* Disable all interrupts */
661 writel(0, db
->membase
+ EMAC_INT_CTL_REG
);
663 /* Got EMAC interrupt status */
665 int_status
= readl(db
->membase
+ EMAC_INT_STA_REG
);
666 /* Clear ISR status */
667 writel(int_status
, db
->membase
+ EMAC_INT_STA_REG
);
669 if (netif_msg_intr(db
))
670 dev_dbg(db
->dev
, "emac interrupt %02x\n", int_status
);
672 /* Received the coming packet */
673 if ((int_status
& 0x100) && (db
->emacrx_completed_flag
== 1)) {
675 db
->emacrx_completed_flag
= 0;
679 /* Transmit Interrupt check */
680 if (int_status
& (0x01 | 0x02))
681 emac_tx_done(dev
, db
, int_status
);
683 if (int_status
& (0x04 | 0x08))
684 netdev_info(dev
, " ab : %x\n", int_status
);
686 /* Re-enable interrupt mask */
687 if (db
->emacrx_completed_flag
== 1) {
688 reg_val
= readl(db
->membase
+ EMAC_INT_CTL_REG
);
689 reg_val
|= (0xf << 0) | (0x01 << 8);
690 writel(reg_val
, db
->membase
+ EMAC_INT_CTL_REG
);
692 spin_unlock_irqrestore(&db
->lock
, flags
);
697 #ifdef CONFIG_NET_POLL_CONTROLLER
701 static void emac_poll_controller(struct net_device
*dev
)
703 disable_irq(dev
->irq
);
704 emac_interrupt(dev
->irq
, dev
);
705 enable_irq(dev
->irq
);
709 /* Open the interface.
710 * The interface is opened whenever "ifconfig" actives it.
712 static int emac_open(struct net_device
*dev
)
714 struct emac_board_info
*db
= netdev_priv(dev
);
717 if (netif_msg_ifup(db
))
718 dev_dbg(db
->dev
, "enabling %s\n", dev
->name
);
720 if (devm_request_irq(db
->dev
, dev
->irq
, &emac_interrupt
,
724 /* Initialize EMAC board */
726 emac_init_device(dev
);
728 ret
= emac_mdio_probe(dev
);
730 netdev_err(dev
, "cannot probe MDIO bus\n");
734 phy_start(db
->phy_dev
);
735 netif_start_queue(dev
);
740 static void emac_shutdown(struct net_device
*dev
)
742 unsigned int reg_val
;
743 struct emac_board_info
*db
= netdev_priv(dev
);
745 /* Disable all interrupt */
746 writel(0, db
->membase
+ EMAC_INT_CTL_REG
);
748 /* clear interupt status */
749 reg_val
= readl(db
->membase
+ EMAC_INT_STA_REG
);
750 writel(reg_val
, db
->membase
+ EMAC_INT_STA_REG
);
753 reg_val
= readl(db
->membase
+ EMAC_CTL_REG
);
754 reg_val
&= ~(EMAC_CTL_TX_EN
| EMAC_CTL_RX_EN
| EMAC_CTL_RESET
);
755 writel(reg_val
, db
->membase
+ EMAC_CTL_REG
);
758 /* Stop the interface.
759 * The interface is stopped when it is brought.
761 static int emac_stop(struct net_device
*ndev
)
763 struct emac_board_info
*db
= netdev_priv(ndev
);
765 if (netif_msg_ifdown(db
))
766 dev_dbg(db
->dev
, "shutting down %s\n", ndev
->name
);
768 netif_stop_queue(ndev
);
769 netif_carrier_off(ndev
);
771 phy_stop(db
->phy_dev
);
773 emac_mdio_remove(ndev
);
780 static const struct net_device_ops emac_netdev_ops
= {
781 .ndo_open
= emac_open
,
782 .ndo_stop
= emac_stop
,
783 .ndo_start_xmit
= emac_start_xmit
,
784 .ndo_tx_timeout
= emac_timeout
,
785 .ndo_do_ioctl
= emac_ioctl
,
786 .ndo_change_mtu
= eth_change_mtu
,
787 .ndo_validate_addr
= eth_validate_addr
,
788 .ndo_set_mac_address
= emac_set_mac_address
,
789 #ifdef CONFIG_NET_POLL_CONTROLLER
790 .ndo_poll_controller
= emac_poll_controller
,
794 /* Search EMAC board, allocate space and register it
796 static int emac_probe(struct platform_device
*pdev
)
798 struct device_node
*np
= pdev
->dev
.of_node
;
799 struct emac_board_info
*db
;
800 struct net_device
*ndev
;
802 const char *mac_addr
;
804 ndev
= alloc_etherdev(sizeof(struct emac_board_info
));
806 dev_err(&pdev
->dev
, "could not allocate device.\n");
810 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
812 db
= netdev_priv(ndev
);
813 memset(db
, 0, sizeof(*db
));
815 db
->dev
= &pdev
->dev
;
819 spin_lock_init(&db
->lock
);
821 db
->membase
= of_iomap(np
, 0);
823 dev_err(&pdev
->dev
, "failed to remap registers\n");
828 /* fill in parameters for net-dev structure */
829 ndev
->base_addr
= (unsigned long)db
->membase
;
830 ndev
->irq
= irq_of_parse_and_map(np
, 0);
831 if (ndev
->irq
== -ENXIO
) {
832 netdev_err(ndev
, "No irq resource\n");
837 db
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
841 clk_prepare_enable(db
->clk
);
843 db
->phy_node
= of_parse_phandle(np
, "phy", 0);
845 dev_err(&pdev
->dev
, "no associated PHY\n");
850 /* Read MAC-address from DT */
851 mac_addr
= of_get_mac_address(np
);
853 memcpy(ndev
->dev_addr
, mac_addr
, ETH_ALEN
);
855 /* Check if the MAC address is valid, if not get a random one */
856 if (!is_valid_ether_addr(ndev
->dev_addr
)) {
857 eth_hw_addr_random(ndev
);
858 dev_warn(&pdev
->dev
, "using random MAC address %pM\n",
862 db
->emacrx_completed_flag
= 1;
868 ndev
->netdev_ops
= &emac_netdev_ops
;
869 ndev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
870 ndev
->ethtool_ops
= &emac_ethtool_ops
;
872 platform_set_drvdata(pdev
, ndev
);
874 /* Carrier starts down, phylib will bring it up */
875 netif_carrier_off(ndev
);
877 ret
= register_netdev(ndev
);
879 dev_err(&pdev
->dev
, "Registering netdev failed!\n");
884 dev_info(&pdev
->dev
, "%s: at %p, IRQ %d MAC: %pM\n",
885 ndev
->name
, db
->membase
, ndev
->irq
, ndev
->dev_addr
);
890 dev_err(db
->dev
, "not found (%d).\n", ret
);
897 static int emac_remove(struct platform_device
*pdev
)
899 struct net_device
*ndev
= platform_get_drvdata(pdev
);
901 unregister_netdev(ndev
);
904 dev_dbg(&pdev
->dev
, "released and freed device\n");
908 static int emac_suspend(struct platform_device
*dev
, pm_message_t state
)
910 struct net_device
*ndev
= platform_get_drvdata(dev
);
912 netif_carrier_off(ndev
);
913 netif_device_detach(ndev
);
919 static int emac_resume(struct platform_device
*dev
)
921 struct net_device
*ndev
= platform_get_drvdata(dev
);
922 struct emac_board_info
*db
= netdev_priv(ndev
);
925 emac_init_device(ndev
);
926 netif_device_attach(ndev
);
931 static const struct of_device_id emac_of_match
[] = {
932 {.compatible
= "allwinner,sun4i-emac",},
936 MODULE_DEVICE_TABLE(of
, emac_of_match
);
938 static struct platform_driver emac_driver
= {
940 .name
= "sun4i-emac",
941 .of_match_table
= emac_of_match
,
944 .remove
= emac_remove
,
945 .suspend
= emac_suspend
,
946 .resume
= emac_resume
,
949 module_platform_driver(emac_driver
);
951 MODULE_AUTHOR("Stefan Roese <sr@denx.de>");
952 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
953 MODULE_DESCRIPTION("Allwinner A10 emac network driver");
954 MODULE_LICENSE("GPL");