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Merge remote-tracking branch 'regulator/fix/db8500' into tmp
[deliverable/linux.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /**
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /**
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /**
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /**
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /**
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /**
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /**
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
317 {
318 if (features & NETIF_F_HW_VLAN_RX) {
319 /* enable VLAN tag insert/strip */
320 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
321 } else {
322 /* disable VLAN tag insert/strip */
323 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
324 }
325 }
326
327 static void atl1e_vlan_mode(struct net_device *netdev,
328 netdev_features_t features)
329 {
330 struct atl1e_adapter *adapter = netdev_priv(netdev);
331 u32 mac_ctrl_data = 0;
332
333 netdev_dbg(adapter->netdev, "%s\n", __func__);
334
335 atl1e_irq_disable(adapter);
336 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
337 __atl1e_vlan_mode(features, &mac_ctrl_data);
338 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
339 atl1e_irq_enable(adapter);
340 }
341
342 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
343 {
344 netdev_dbg(adapter->netdev, "%s\n", __func__);
345 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
346 }
347
348 /**
349 * atl1e_set_mac - Change the Ethernet Address of the NIC
350 * @netdev: network interface device structure
351 * @p: pointer to an address structure
352 *
353 * Returns 0 on success, negative on failure
354 */
355 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
356 {
357 struct atl1e_adapter *adapter = netdev_priv(netdev);
358 struct sockaddr *addr = p;
359
360 if (!is_valid_ether_addr(addr->sa_data))
361 return -EADDRNOTAVAIL;
362
363 if (netif_running(netdev))
364 return -EBUSY;
365
366 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
367 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
368
369 atl1e_hw_set_mac_addr(&adapter->hw);
370
371 return 0;
372 }
373
374 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
375 netdev_features_t features)
376 {
377 /*
378 * Since there is no support for separate rx/tx vlan accel
379 * enable/disable make sure tx flag is always in same state as rx.
380 */
381 if (features & NETIF_F_HW_VLAN_RX)
382 features |= NETIF_F_HW_VLAN_TX;
383 else
384 features &= ~NETIF_F_HW_VLAN_TX;
385
386 return features;
387 }
388
389 static int atl1e_set_features(struct net_device *netdev,
390 netdev_features_t features)
391 {
392 netdev_features_t changed = netdev->features ^ features;
393
394 if (changed & NETIF_F_HW_VLAN_RX)
395 atl1e_vlan_mode(netdev, features);
396
397 return 0;
398 }
399
400 /**
401 * atl1e_change_mtu - Change the Maximum Transfer Unit
402 * @netdev: network interface device structure
403 * @new_mtu: new value for maximum frame size
404 *
405 * Returns 0 on success, negative on failure
406 */
407 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 int old_mtu = netdev->mtu;
411 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
412
413 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
414 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
415 netdev_warn(adapter->netdev, "invalid MTU setting\n");
416 return -EINVAL;
417 }
418 /* set MTU */
419 if (old_mtu != new_mtu && netif_running(netdev)) {
420 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
421 msleep(1);
422 netdev->mtu = new_mtu;
423 adapter->hw.max_frame_size = new_mtu;
424 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
425 atl1e_down(adapter);
426 atl1e_up(adapter);
427 clear_bit(__AT_RESETTING, &adapter->flags);
428 }
429 return 0;
430 }
431
432 /*
433 * caller should hold mdio_lock
434 */
435 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
436 {
437 struct atl1e_adapter *adapter = netdev_priv(netdev);
438 u16 result;
439
440 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
441 return result;
442 }
443
444 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
445 int reg_num, int val)
446 {
447 struct atl1e_adapter *adapter = netdev_priv(netdev);
448
449 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
450 }
451
452 static int atl1e_mii_ioctl(struct net_device *netdev,
453 struct ifreq *ifr, int cmd)
454 {
455 struct atl1e_adapter *adapter = netdev_priv(netdev);
456 struct mii_ioctl_data *data = if_mii(ifr);
457 unsigned long flags;
458 int retval = 0;
459
460 if (!netif_running(netdev))
461 return -EINVAL;
462
463 spin_lock_irqsave(&adapter->mdio_lock, flags);
464 switch (cmd) {
465 case SIOCGMIIPHY:
466 data->phy_id = 0;
467 break;
468
469 case SIOCGMIIREG:
470 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
471 &data->val_out)) {
472 retval = -EIO;
473 goto out;
474 }
475 break;
476
477 case SIOCSMIIREG:
478 if (data->reg_num & ~(0x1F)) {
479 retval = -EFAULT;
480 goto out;
481 }
482
483 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
484 data->reg_num, data->val_in);
485 if (atl1e_write_phy_reg(&adapter->hw,
486 data->reg_num, data->val_in)) {
487 retval = -EIO;
488 goto out;
489 }
490 break;
491
492 default:
493 retval = -EOPNOTSUPP;
494 break;
495 }
496 out:
497 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
498 return retval;
499
500 }
501
502 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
503 {
504 switch (cmd) {
505 case SIOCGMIIPHY:
506 case SIOCGMIIREG:
507 case SIOCSMIIREG:
508 return atl1e_mii_ioctl(netdev, ifr, cmd);
509 default:
510 return -EOPNOTSUPP;
511 }
512 }
513
514 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
515 {
516 u16 cmd;
517
518 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
519 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
520 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
521 pci_write_config_word(pdev, PCI_COMMAND, cmd);
522
523 /*
524 * some motherboards BIOS(PXE/EFI) driver may set PME
525 * while they transfer control to OS (Windows/Linux)
526 * so we should clear this bit before NIC work normally
527 */
528 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
529 msleep(1);
530 }
531
532 /**
533 * atl1e_alloc_queues - Allocate memory for all rings
534 * @adapter: board private structure to initialize
535 *
536 */
537 static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
538 {
539 return 0;
540 }
541
542 /**
543 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
544 * @adapter: board private structure to initialize
545 *
546 * atl1e_sw_init initializes the Adapter private data structure.
547 * Fields are initialized based on PCI device information and
548 * OS network device settings (MTU size).
549 */
550 static int atl1e_sw_init(struct atl1e_adapter *adapter)
551 {
552 struct atl1e_hw *hw = &adapter->hw;
553 struct pci_dev *pdev = adapter->pdev;
554 u32 phy_status_data = 0;
555
556 adapter->wol = 0;
557 adapter->link_speed = SPEED_0; /* hardware init */
558 adapter->link_duplex = FULL_DUPLEX;
559 adapter->num_rx_queues = 1;
560
561 /* PCI config space info */
562 hw->vendor_id = pdev->vendor;
563 hw->device_id = pdev->device;
564 hw->subsystem_vendor_id = pdev->subsystem_vendor;
565 hw->subsystem_id = pdev->subsystem_device;
566 hw->revision_id = pdev->revision;
567
568 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
569
570 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
571 /* nic type */
572 if (hw->revision_id >= 0xF0) {
573 hw->nic_type = athr_l2e_revB;
574 } else {
575 if (phy_status_data & PHY_STATUS_100M)
576 hw->nic_type = athr_l1e;
577 else
578 hw->nic_type = athr_l2e_revA;
579 }
580
581 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
582
583 if (phy_status_data & PHY_STATUS_EMI_CA)
584 hw->emi_ca = true;
585 else
586 hw->emi_ca = false;
587
588 hw->phy_configured = false;
589 hw->preamble_len = 7;
590 hw->max_frame_size = adapter->netdev->mtu;
591 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
592 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
593
594 hw->rrs_type = atl1e_rrs_disable;
595 hw->indirect_tab = 0;
596 hw->base_cpu = 0;
597
598 /* need confirm */
599
600 hw->ict = 50000; /* 100ms */
601 hw->smb_timer = 200000; /* 200ms */
602 hw->tpd_burst = 5;
603 hw->rrd_thresh = 1;
604 hw->tpd_thresh = adapter->tx_ring.count / 2;
605 hw->rx_count_down = 4; /* 2us resolution */
606 hw->tx_count_down = hw->imt * 4 / 3;
607 hw->dmar_block = atl1e_dma_req_1024;
608 hw->dmaw_block = atl1e_dma_req_1024;
609 hw->dmar_dly_cnt = 15;
610 hw->dmaw_dly_cnt = 4;
611
612 if (atl1e_alloc_queues(adapter)) {
613 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
614 return -ENOMEM;
615 }
616
617 atomic_set(&adapter->irq_sem, 1);
618 spin_lock_init(&adapter->mdio_lock);
619 spin_lock_init(&adapter->tx_lock);
620
621 set_bit(__AT_DOWN, &adapter->flags);
622
623 return 0;
624 }
625
626 /**
627 * atl1e_clean_tx_ring - Free Tx-skb
628 * @adapter: board private structure
629 */
630 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
631 {
632 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
633 struct atl1e_tx_buffer *tx_buffer = NULL;
634 struct pci_dev *pdev = adapter->pdev;
635 u16 index, ring_count;
636
637 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
638 return;
639
640 ring_count = tx_ring->count;
641 /* first unmmap dma */
642 for (index = 0; index < ring_count; index++) {
643 tx_buffer = &tx_ring->tx_buffer[index];
644 if (tx_buffer->dma) {
645 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
646 pci_unmap_single(pdev, tx_buffer->dma,
647 tx_buffer->length, PCI_DMA_TODEVICE);
648 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
649 pci_unmap_page(pdev, tx_buffer->dma,
650 tx_buffer->length, PCI_DMA_TODEVICE);
651 tx_buffer->dma = 0;
652 }
653 }
654 /* second free skb */
655 for (index = 0; index < ring_count; index++) {
656 tx_buffer = &tx_ring->tx_buffer[index];
657 if (tx_buffer->skb) {
658 dev_kfree_skb_any(tx_buffer->skb);
659 tx_buffer->skb = NULL;
660 }
661 }
662 /* Zero out Tx-buffers */
663 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
664 ring_count);
665 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
666 ring_count);
667 }
668
669 /**
670 * atl1e_clean_rx_ring - Free rx-reservation skbs
671 * @adapter: board private structure
672 */
673 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
674 {
675 struct atl1e_rx_ring *rx_ring =
676 &adapter->rx_ring;
677 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
678 u16 i, j;
679
680
681 if (adapter->ring_vir_addr == NULL)
682 return;
683 /* Zero out the descriptor ring */
684 for (i = 0; i < adapter->num_rx_queues; i++) {
685 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
686 if (rx_page_desc[i].rx_page[j].addr != NULL) {
687 memset(rx_page_desc[i].rx_page[j].addr, 0,
688 rx_ring->real_page_size);
689 }
690 }
691 }
692 }
693
694 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
695 {
696 *ring_size = ((u32)(adapter->tx_ring.count *
697 sizeof(struct atl1e_tpd_desc) + 7
698 /* tx ring, qword align */
699 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
700 adapter->num_rx_queues + 31
701 /* rx ring, 32 bytes align */
702 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
703 sizeof(u32) + 3));
704 /* tx, rx cmd, dword align */
705 }
706
707 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
708 {
709 struct atl1e_rx_ring *rx_ring = NULL;
710
711 rx_ring = &adapter->rx_ring;
712
713 rx_ring->real_page_size = adapter->rx_ring.page_size
714 + adapter->hw.max_frame_size
715 + ETH_HLEN + VLAN_HLEN
716 + ETH_FCS_LEN;
717 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
718 atl1e_cal_ring_size(adapter, &adapter->ring_size);
719
720 adapter->ring_vir_addr = NULL;
721 adapter->rx_ring.desc = NULL;
722 rwlock_init(&adapter->tx_ring.tx_lock);
723 }
724
725 /*
726 * Read / Write Ptr Initialize:
727 */
728 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
729 {
730 struct atl1e_tx_ring *tx_ring = NULL;
731 struct atl1e_rx_ring *rx_ring = NULL;
732 struct atl1e_rx_page_desc *rx_page_desc = NULL;
733 int i, j;
734
735 tx_ring = &adapter->tx_ring;
736 rx_ring = &adapter->rx_ring;
737 rx_page_desc = rx_ring->rx_page_desc;
738
739 tx_ring->next_to_use = 0;
740 atomic_set(&tx_ring->next_to_clean, 0);
741
742 for (i = 0; i < adapter->num_rx_queues; i++) {
743 rx_page_desc[i].rx_using = 0;
744 rx_page_desc[i].rx_nxseq = 0;
745 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
746 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
747 rx_page_desc[i].rx_page[j].read_offset = 0;
748 }
749 }
750 }
751
752 /**
753 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
754 * @adapter: board private structure
755 *
756 * Free all transmit software resources
757 */
758 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
759 {
760 struct pci_dev *pdev = adapter->pdev;
761
762 atl1e_clean_tx_ring(adapter);
763 atl1e_clean_rx_ring(adapter);
764
765 if (adapter->ring_vir_addr) {
766 pci_free_consistent(pdev, adapter->ring_size,
767 adapter->ring_vir_addr, adapter->ring_dma);
768 adapter->ring_vir_addr = NULL;
769 }
770
771 if (adapter->tx_ring.tx_buffer) {
772 kfree(adapter->tx_ring.tx_buffer);
773 adapter->tx_ring.tx_buffer = NULL;
774 }
775 }
776
777 /**
778 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
779 * @adapter: board private structure
780 *
781 * Return 0 on success, negative on failure
782 */
783 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
784 {
785 struct pci_dev *pdev = adapter->pdev;
786 struct atl1e_tx_ring *tx_ring;
787 struct atl1e_rx_ring *rx_ring;
788 struct atl1e_rx_page_desc *rx_page_desc;
789 int size, i, j;
790 u32 offset = 0;
791 int err = 0;
792
793 if (adapter->ring_vir_addr != NULL)
794 return 0; /* alloced already */
795
796 tx_ring = &adapter->tx_ring;
797 rx_ring = &adapter->rx_ring;
798
799 /* real ring DMA buffer */
800
801 size = adapter->ring_size;
802 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
803 adapter->ring_size, &adapter->ring_dma);
804
805 if (adapter->ring_vir_addr == NULL) {
806 netdev_err(adapter->netdev,
807 "pci_alloc_consistent failed, size = D%d\n", size);
808 return -ENOMEM;
809 }
810
811 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
812
813 rx_page_desc = rx_ring->rx_page_desc;
814
815 /* Init TPD Ring */
816 tx_ring->dma = roundup(adapter->ring_dma, 8);
817 offset = tx_ring->dma - adapter->ring_dma;
818 tx_ring->desc = adapter->ring_vir_addr + offset;
819 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
820 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
821 if (tx_ring->tx_buffer == NULL) {
822 err = -ENOMEM;
823 goto failed;
824 }
825
826 /* Init RXF-Pages */
827 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
828 offset = roundup(offset, 32);
829
830 for (i = 0; i < adapter->num_rx_queues; i++) {
831 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
832 rx_page_desc[i].rx_page[j].dma =
833 adapter->ring_dma + offset;
834 rx_page_desc[i].rx_page[j].addr =
835 adapter->ring_vir_addr + offset;
836 offset += rx_ring->real_page_size;
837 }
838 }
839
840 /* Init CMB dma address */
841 tx_ring->cmb_dma = adapter->ring_dma + offset;
842 tx_ring->cmb = adapter->ring_vir_addr + offset;
843 offset += sizeof(u32);
844
845 for (i = 0; i < adapter->num_rx_queues; i++) {
846 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
847 rx_page_desc[i].rx_page[j].write_offset_dma =
848 adapter->ring_dma + offset;
849 rx_page_desc[i].rx_page[j].write_offset_addr =
850 adapter->ring_vir_addr + offset;
851 offset += sizeof(u32);
852 }
853 }
854
855 if (unlikely(offset > adapter->ring_size)) {
856 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
857 offset, adapter->ring_size);
858 err = -1;
859 goto failed;
860 }
861
862 return 0;
863 failed:
864 if (adapter->ring_vir_addr != NULL) {
865 pci_free_consistent(pdev, adapter->ring_size,
866 adapter->ring_vir_addr, adapter->ring_dma);
867 adapter->ring_vir_addr = NULL;
868 }
869 return err;
870 }
871
872 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
873 {
874
875 struct atl1e_hw *hw = &adapter->hw;
876 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
877 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
878 struct atl1e_rx_page_desc *rx_page_desc = NULL;
879 int i, j;
880
881 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
882 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
883 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
884 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
885 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
886 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
887 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
888
889 rx_page_desc = rx_ring->rx_page_desc;
890 /* RXF Page Physical address / Page Length */
891 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
892 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
893 (u32)((adapter->ring_dma &
894 AT_DMA_HI_ADDR_MASK) >> 32));
895 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
896 u32 page_phy_addr;
897 u32 offset_phy_addr;
898
899 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
900 offset_phy_addr =
901 rx_page_desc[i].rx_page[j].write_offset_dma;
902
903 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
904 page_phy_addr & AT_DMA_LO_ADDR_MASK);
905 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
906 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
907 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
908 }
909 }
910 /* Page Length */
911 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
912 /* Load all of base address above */
913 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
914 }
915
916 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
917 {
918 struct atl1e_hw *hw = &adapter->hw;
919 u32 dev_ctrl_data = 0;
920 u32 max_pay_load = 0;
921 u32 jumbo_thresh = 0;
922 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
923
924 /* configure TXQ param */
925 if (hw->nic_type != athr_l2e_revB) {
926 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
927 if (hw->max_frame_size <= 1500) {
928 jumbo_thresh = hw->max_frame_size + extra_size;
929 } else if (hw->max_frame_size < 6*1024) {
930 jumbo_thresh =
931 (hw->max_frame_size + extra_size) * 2 / 3;
932 } else {
933 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
934 }
935 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
936 }
937
938 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
939
940 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
941 DEVICE_CTRL_MAX_PAYLOAD_MASK;
942
943 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
944
945 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
946 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
947 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
948
949 if (hw->nic_type != athr_l2e_revB)
950 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
951 atl1e_pay_load_size[hw->dmar_block]);
952 /* enable TXQ */
953 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
954 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
955 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
956 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
957 }
958
959 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
960 {
961 struct atl1e_hw *hw = &adapter->hw;
962 u32 rxf_len = 0;
963 u32 rxf_low = 0;
964 u32 rxf_high = 0;
965 u32 rxf_thresh_data = 0;
966 u32 rxq_ctrl_data = 0;
967
968 if (hw->nic_type != athr_l2e_revB) {
969 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
970 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
971 RXQ_JMBOSZ_TH_SHIFT |
972 (1 & RXQ_JMBO_LKAH_MASK) <<
973 RXQ_JMBO_LKAH_SHIFT));
974
975 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
976 rxf_high = rxf_len * 4 / 5;
977 rxf_low = rxf_len / 5;
978 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
979 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
980 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
981 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
982
983 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
984 }
985
986 /* RRS */
987 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
988 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
989
990 if (hw->rrs_type & atl1e_rrs_ipv4)
991 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
992
993 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
994 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
995
996 if (hw->rrs_type & atl1e_rrs_ipv6)
997 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
998
999 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1000 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1001
1002 if (hw->rrs_type != atl1e_rrs_disable)
1003 rxq_ctrl_data |=
1004 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1005
1006 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1007 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1008
1009 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1010 }
1011
1012 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1013 {
1014 struct atl1e_hw *hw = &adapter->hw;
1015 u32 dma_ctrl_data = 0;
1016
1017 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1018 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1019 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1020 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1021 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1022 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1023 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1024 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1025 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1026 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1027
1028 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1029 }
1030
1031 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1032 {
1033 u32 value;
1034 struct atl1e_hw *hw = &adapter->hw;
1035 struct net_device *netdev = adapter->netdev;
1036
1037 /* Config MAC CTRL Register */
1038 value = MAC_CTRL_TX_EN |
1039 MAC_CTRL_RX_EN ;
1040
1041 if (FULL_DUPLEX == adapter->link_duplex)
1042 value |= MAC_CTRL_DUPLX;
1043
1044 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1045 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1046 MAC_CTRL_SPEED_SHIFT);
1047 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1048
1049 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1050 value |= (((u32)adapter->hw.preamble_len &
1051 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1052
1053 __atl1e_vlan_mode(netdev->features, &value);
1054
1055 value |= MAC_CTRL_BC_EN;
1056 if (netdev->flags & IFF_PROMISC)
1057 value |= MAC_CTRL_PROMIS_EN;
1058 if (netdev->flags & IFF_ALLMULTI)
1059 value |= MAC_CTRL_MC_ALL_EN;
1060
1061 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1062 }
1063
1064 /**
1065 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1066 * @adapter: board private structure
1067 *
1068 * Configure the Tx /Rx unit of the MAC after a reset.
1069 */
1070 static int atl1e_configure(struct atl1e_adapter *adapter)
1071 {
1072 struct atl1e_hw *hw = &adapter->hw;
1073
1074 u32 intr_status_data = 0;
1075
1076 /* clear interrupt status */
1077 AT_WRITE_REG(hw, REG_ISR, ~0);
1078
1079 /* 1. set MAC Address */
1080 atl1e_hw_set_mac_addr(hw);
1081
1082 /* 2. Init the Multicast HASH table done by set_muti */
1083
1084 /* 3. Clear any WOL status */
1085 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1086
1087 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1088 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1089 * High 32bits memory */
1090 atl1e_configure_des_ring(adapter);
1091
1092 /* 5. set Interrupt Moderator Timer */
1093 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1094 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1095 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1096 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1097
1098 /* 6. rx/tx threshold to trig interrupt */
1099 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1100 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1101 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1102 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1103
1104 /* 7. set Interrupt Clear Timer */
1105 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1106
1107 /* 8. set MTU */
1108 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1109 VLAN_HLEN + ETH_FCS_LEN);
1110
1111 /* 9. config TXQ early tx threshold */
1112 atl1e_configure_tx(adapter);
1113
1114 /* 10. config RXQ */
1115 atl1e_configure_rx(adapter);
1116
1117 /* 11. config DMA Engine */
1118 atl1e_configure_dma(adapter);
1119
1120 /* 12. smb timer to trig interrupt */
1121 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1122
1123 intr_status_data = AT_READ_REG(hw, REG_ISR);
1124 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1125 netdev_err(adapter->netdev,
1126 "atl1e_configure failed, PCIE phy link down\n");
1127 return -1;
1128 }
1129
1130 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1131 return 0;
1132 }
1133
1134 /**
1135 * atl1e_get_stats - Get System Network Statistics
1136 * @netdev: network interface device structure
1137 *
1138 * Returns the address of the device statistics structure.
1139 * The statistics are actually updated from the timer callback.
1140 */
1141 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1142 {
1143 struct atl1e_adapter *adapter = netdev_priv(netdev);
1144 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1145 struct net_device_stats *net_stats = &netdev->stats;
1146
1147 net_stats->rx_packets = hw_stats->rx_ok;
1148 net_stats->tx_packets = hw_stats->tx_ok;
1149 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1150 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1151 net_stats->multicast = hw_stats->rx_mcast;
1152 net_stats->collisions = hw_stats->tx_1_col +
1153 hw_stats->tx_2_col * 2 +
1154 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1155
1156 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1157 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1158 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1159 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1160 net_stats->rx_length_errors = hw_stats->rx_len_err;
1161 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1162 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1163 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1164
1165 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1166
1167 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1168 hw_stats->tx_underrun + hw_stats->tx_trunc;
1169 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1170 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1171 net_stats->tx_window_errors = hw_stats->tx_late_col;
1172
1173 return net_stats;
1174 }
1175
1176 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1177 {
1178 u16 hw_reg_addr = 0;
1179 unsigned long *stats_item = NULL;
1180
1181 /* update rx status */
1182 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1183 stats_item = &adapter->hw_stats.rx_ok;
1184 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1185 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1186 stats_item++;
1187 hw_reg_addr += 4;
1188 }
1189 /* update tx status */
1190 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1191 stats_item = &adapter->hw_stats.tx_ok;
1192 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1193 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1194 stats_item++;
1195 hw_reg_addr += 4;
1196 }
1197 }
1198
1199 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1200 {
1201 u16 phy_data;
1202
1203 spin_lock(&adapter->mdio_lock);
1204 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1205 spin_unlock(&adapter->mdio_lock);
1206 }
1207
1208 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1209 {
1210 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1211 struct atl1e_tx_buffer *tx_buffer = NULL;
1212 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1213 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1214
1215 while (next_to_clean != hw_next_to_clean) {
1216 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1217 if (tx_buffer->dma) {
1218 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1219 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1220 tx_buffer->length, PCI_DMA_TODEVICE);
1221 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1222 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1223 tx_buffer->length, PCI_DMA_TODEVICE);
1224 tx_buffer->dma = 0;
1225 }
1226
1227 if (tx_buffer->skb) {
1228 dev_kfree_skb_irq(tx_buffer->skb);
1229 tx_buffer->skb = NULL;
1230 }
1231
1232 if (++next_to_clean == tx_ring->count)
1233 next_to_clean = 0;
1234 }
1235
1236 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1237
1238 if (netif_queue_stopped(adapter->netdev) &&
1239 netif_carrier_ok(adapter->netdev)) {
1240 netif_wake_queue(adapter->netdev);
1241 }
1242
1243 return true;
1244 }
1245
1246 /**
1247 * atl1e_intr - Interrupt Handler
1248 * @irq: interrupt number
1249 * @data: pointer to a network interface device structure
1250 */
1251 static irqreturn_t atl1e_intr(int irq, void *data)
1252 {
1253 struct net_device *netdev = data;
1254 struct atl1e_adapter *adapter = netdev_priv(netdev);
1255 struct atl1e_hw *hw = &adapter->hw;
1256 int max_ints = AT_MAX_INT_WORK;
1257 int handled = IRQ_NONE;
1258 u32 status;
1259
1260 do {
1261 status = AT_READ_REG(hw, REG_ISR);
1262 if ((status & IMR_NORMAL_MASK) == 0 ||
1263 (status & ISR_DIS_INT) != 0) {
1264 if (max_ints != AT_MAX_INT_WORK)
1265 handled = IRQ_HANDLED;
1266 break;
1267 }
1268 /* link event */
1269 if (status & ISR_GPHY)
1270 atl1e_clear_phy_int(adapter);
1271 /* Ack ISR */
1272 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1273
1274 handled = IRQ_HANDLED;
1275 /* check if PCIE PHY Link down */
1276 if (status & ISR_PHY_LINKDOWN) {
1277 netdev_err(adapter->netdev,
1278 "pcie phy linkdown %x\n", status);
1279 if (netif_running(adapter->netdev)) {
1280 /* reset MAC */
1281 atl1e_irq_reset(adapter);
1282 schedule_work(&adapter->reset_task);
1283 break;
1284 }
1285 }
1286
1287 /* check if DMA read/write error */
1288 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1289 netdev_err(adapter->netdev,
1290 "PCIE DMA RW error (status = 0x%x)\n",
1291 status);
1292 atl1e_irq_reset(adapter);
1293 schedule_work(&adapter->reset_task);
1294 break;
1295 }
1296
1297 if (status & ISR_SMB)
1298 atl1e_update_hw_stats(adapter);
1299
1300 /* link event */
1301 if (status & (ISR_GPHY | ISR_MANUAL)) {
1302 netdev->stats.tx_carrier_errors++;
1303 atl1e_link_chg_event(adapter);
1304 break;
1305 }
1306
1307 /* transmit event */
1308 if (status & ISR_TX_EVENT)
1309 atl1e_clean_tx_irq(adapter);
1310
1311 if (status & ISR_RX_EVENT) {
1312 /*
1313 * disable rx interrupts, without
1314 * the synchronize_irq bit
1315 */
1316 AT_WRITE_REG(hw, REG_IMR,
1317 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1318 AT_WRITE_FLUSH(hw);
1319 if (likely(napi_schedule_prep(
1320 &adapter->napi)))
1321 __napi_schedule(&adapter->napi);
1322 }
1323 } while (--max_ints > 0);
1324 /* re-enable Interrupt*/
1325 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1326
1327 return handled;
1328 }
1329
1330 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1331 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1332 {
1333 u8 *packet = (u8 *)(prrs + 1);
1334 struct iphdr *iph;
1335 u16 head_len = ETH_HLEN;
1336 u16 pkt_flags;
1337 u16 err_flags;
1338
1339 skb_checksum_none_assert(skb);
1340 pkt_flags = prrs->pkt_flag;
1341 err_flags = prrs->err_flag;
1342 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1343 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1344 if (pkt_flags & RRS_IS_IPV4) {
1345 if (pkt_flags & RRS_IS_802_3)
1346 head_len += 8;
1347 iph = (struct iphdr *) (packet + head_len);
1348 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1349 goto hw_xsum;
1350 }
1351 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1352 skb->ip_summed = CHECKSUM_UNNECESSARY;
1353 return;
1354 }
1355 }
1356
1357 hw_xsum :
1358 return;
1359 }
1360
1361 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1362 u8 que)
1363 {
1364 struct atl1e_rx_page_desc *rx_page_desc =
1365 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1366 u8 rx_using = rx_page_desc[que].rx_using;
1367
1368 return &(rx_page_desc[que].rx_page[rx_using]);
1369 }
1370
1371 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1372 int *work_done, int work_to_do)
1373 {
1374 struct net_device *netdev = adapter->netdev;
1375 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1376 struct atl1e_rx_page_desc *rx_page_desc =
1377 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1378 struct sk_buff *skb = NULL;
1379 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1380 u32 packet_size, write_offset;
1381 struct atl1e_recv_ret_status *prrs;
1382
1383 write_offset = *(rx_page->write_offset_addr);
1384 if (likely(rx_page->read_offset < write_offset)) {
1385 do {
1386 if (*work_done >= work_to_do)
1387 break;
1388 (*work_done)++;
1389 /* get new packet's rrs */
1390 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1391 rx_page->read_offset);
1392 /* check sequence number */
1393 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1394 netdev_err(netdev,
1395 "rx sequence number error (rx=%d) (expect=%d)\n",
1396 prrs->seq_num,
1397 rx_page_desc[que].rx_nxseq);
1398 rx_page_desc[que].rx_nxseq++;
1399 /* just for debug use */
1400 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1401 (((u32)prrs->seq_num) << 16) |
1402 rx_page_desc[que].rx_nxseq);
1403 goto fatal_err;
1404 }
1405 rx_page_desc[que].rx_nxseq++;
1406
1407 /* error packet */
1408 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1409 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1410 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1411 RRS_ERR_TRUNC)) {
1412 /* hardware error, discard this packet*/
1413 netdev_err(netdev,
1414 "rx packet desc error %x\n",
1415 *((u32 *)prrs + 1));
1416 goto skip_pkt;
1417 }
1418 }
1419
1420 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1421 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1422 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1423 if (skb == NULL) {
1424 netdev_warn(netdev,
1425 "Memory squeeze, deferring packet\n");
1426 goto skip_pkt;
1427 }
1428 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1429 skb_put(skb, packet_size);
1430 skb->protocol = eth_type_trans(skb, netdev);
1431 atl1e_rx_checksum(adapter, skb, prrs);
1432
1433 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1434 u16 vlan_tag = (prrs->vtag >> 4) |
1435 ((prrs->vtag & 7) << 13) |
1436 ((prrs->vtag & 8) << 9);
1437 netdev_dbg(netdev,
1438 "RXD VLAN TAG<RRD>=0x%04x\n",
1439 prrs->vtag);
1440 __vlan_hwaccel_put_tag(skb, vlan_tag);
1441 }
1442 netif_receive_skb(skb);
1443
1444 skip_pkt:
1445 /* skip current packet whether it's ok or not. */
1446 rx_page->read_offset +=
1447 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1448 RRS_PKT_SIZE_MASK) +
1449 sizeof(struct atl1e_recv_ret_status) + 31) &
1450 0xFFFFFFE0);
1451
1452 if (rx_page->read_offset >= rx_ring->page_size) {
1453 /* mark this page clean */
1454 u16 reg_addr;
1455 u8 rx_using;
1456
1457 rx_page->read_offset =
1458 *(rx_page->write_offset_addr) = 0;
1459 rx_using = rx_page_desc[que].rx_using;
1460 reg_addr =
1461 atl1e_rx_page_vld_regs[que][rx_using];
1462 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1463 rx_page_desc[que].rx_using ^= 1;
1464 rx_page = atl1e_get_rx_page(adapter, que);
1465 }
1466 write_offset = *(rx_page->write_offset_addr);
1467 } while (rx_page->read_offset < write_offset);
1468 }
1469
1470 return;
1471
1472 fatal_err:
1473 if (!test_bit(__AT_DOWN, &adapter->flags))
1474 schedule_work(&adapter->reset_task);
1475 }
1476
1477 /**
1478 * atl1e_clean - NAPI Rx polling callback
1479 */
1480 static int atl1e_clean(struct napi_struct *napi, int budget)
1481 {
1482 struct atl1e_adapter *adapter =
1483 container_of(napi, struct atl1e_adapter, napi);
1484 u32 imr_data;
1485 int work_done = 0;
1486
1487 /* Keep link state information with original netdev */
1488 if (!netif_carrier_ok(adapter->netdev))
1489 goto quit_polling;
1490
1491 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1492
1493 /* If no Tx and not enough Rx work done, exit the polling mode */
1494 if (work_done < budget) {
1495 quit_polling:
1496 napi_complete(napi);
1497 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1498 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1499 /* test debug */
1500 if (test_bit(__AT_DOWN, &adapter->flags)) {
1501 atomic_dec(&adapter->irq_sem);
1502 netdev_err(adapter->netdev,
1503 "atl1e_clean is called when AT_DOWN\n");
1504 }
1505 /* reenable RX intr */
1506 /*atl1e_irq_enable(adapter); */
1507
1508 }
1509 return work_done;
1510 }
1511
1512 #ifdef CONFIG_NET_POLL_CONTROLLER
1513
1514 /*
1515 * Polling 'interrupt' - used by things like netconsole to send skbs
1516 * without having to re-enable interrupts. It's not called while
1517 * the interrupt routine is executing.
1518 */
1519 static void atl1e_netpoll(struct net_device *netdev)
1520 {
1521 struct atl1e_adapter *adapter = netdev_priv(netdev);
1522
1523 disable_irq(adapter->pdev->irq);
1524 atl1e_intr(adapter->pdev->irq, netdev);
1525 enable_irq(adapter->pdev->irq);
1526 }
1527 #endif
1528
1529 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1530 {
1531 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1532 u16 next_to_use = 0;
1533 u16 next_to_clean = 0;
1534
1535 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1536 next_to_use = tx_ring->next_to_use;
1537
1538 return (u16)(next_to_clean > next_to_use) ?
1539 (next_to_clean - next_to_use - 1) :
1540 (tx_ring->count + next_to_clean - next_to_use - 1);
1541 }
1542
1543 /*
1544 * get next usable tpd
1545 * Note: should call atl1e_tdp_avail to make sure
1546 * there is enough tpd to use
1547 */
1548 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1549 {
1550 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1551 u16 next_to_use = 0;
1552
1553 next_to_use = tx_ring->next_to_use;
1554 if (++tx_ring->next_to_use == tx_ring->count)
1555 tx_ring->next_to_use = 0;
1556
1557 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1558 return &tx_ring->desc[next_to_use];
1559 }
1560
1561 static struct atl1e_tx_buffer *
1562 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1563 {
1564 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1565
1566 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1567 }
1568
1569 /* Calculate the transmit packet descript needed*/
1570 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1571 {
1572 int i = 0;
1573 u16 tpd_req = 1;
1574 u16 fg_size = 0;
1575 u16 proto_hdr_len = 0;
1576
1577 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1578 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1579 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1580 }
1581
1582 if (skb_is_gso(skb)) {
1583 if (skb->protocol == htons(ETH_P_IP) ||
1584 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1585 proto_hdr_len = skb_transport_offset(skb) +
1586 tcp_hdrlen(skb);
1587 if (proto_hdr_len < skb_headlen(skb)) {
1588 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1589 MAX_TX_BUF_LEN - 1) >>
1590 MAX_TX_BUF_SHIFT);
1591 }
1592 }
1593
1594 }
1595 return tpd_req;
1596 }
1597
1598 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1599 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1600 {
1601 u8 hdr_len;
1602 u32 real_len;
1603 unsigned short offload_type;
1604 int err;
1605
1606 if (skb_is_gso(skb)) {
1607 if (skb_header_cloned(skb)) {
1608 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1609 if (unlikely(err))
1610 return -1;
1611 }
1612 offload_type = skb_shinfo(skb)->gso_type;
1613
1614 if (offload_type & SKB_GSO_TCPV4) {
1615 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1616 + ntohs(ip_hdr(skb)->tot_len));
1617
1618 if (real_len < skb->len)
1619 pskb_trim(skb, real_len);
1620
1621 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1622 if (unlikely(skb->len == hdr_len)) {
1623 /* only xsum need */
1624 netdev_warn(adapter->netdev,
1625 "IPV4 tso with zero data??\n");
1626 goto check_sum;
1627 } else {
1628 ip_hdr(skb)->check = 0;
1629 ip_hdr(skb)->tot_len = 0;
1630 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1631 ip_hdr(skb)->saddr,
1632 ip_hdr(skb)->daddr,
1633 0, IPPROTO_TCP, 0);
1634 tpd->word3 |= (ip_hdr(skb)->ihl &
1635 TDP_V4_IPHL_MASK) <<
1636 TPD_V4_IPHL_SHIFT;
1637 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1638 TPD_TCPHDRLEN_MASK) <<
1639 TPD_TCPHDRLEN_SHIFT;
1640 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1641 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1642 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1643 }
1644 return 0;
1645 }
1646 }
1647
1648 check_sum:
1649 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1650 u8 css, cso;
1651
1652 cso = skb_checksum_start_offset(skb);
1653 if (unlikely(cso & 0x1)) {
1654 netdev_err(adapter->netdev,
1655 "payload offset should not ant event number\n");
1656 return -1;
1657 } else {
1658 css = cso + skb->csum_offset;
1659 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1660 TPD_PLOADOFFSET_SHIFT;
1661 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1662 TPD_CCSUMOFFSET_SHIFT;
1663 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1664 }
1665 }
1666
1667 return 0;
1668 }
1669
1670 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1671 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1672 {
1673 struct atl1e_tpd_desc *use_tpd = NULL;
1674 struct atl1e_tx_buffer *tx_buffer = NULL;
1675 u16 buf_len = skb_headlen(skb);
1676 u16 map_len = 0;
1677 u16 mapped_len = 0;
1678 u16 hdr_len = 0;
1679 u16 nr_frags;
1680 u16 f;
1681 int segment;
1682
1683 nr_frags = skb_shinfo(skb)->nr_frags;
1684 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1685 if (segment) {
1686 /* TSO */
1687 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1688 use_tpd = tpd;
1689
1690 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1691 tx_buffer->length = map_len;
1692 tx_buffer->dma = pci_map_single(adapter->pdev,
1693 skb->data, hdr_len, PCI_DMA_TODEVICE);
1694 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1695 mapped_len += map_len;
1696 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1697 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1698 ((cpu_to_le32(tx_buffer->length) &
1699 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1700 }
1701
1702 while (mapped_len < buf_len) {
1703 /* mapped_len == 0, means we should use the first tpd,
1704 which is given by caller */
1705 if (mapped_len == 0) {
1706 use_tpd = tpd;
1707 } else {
1708 use_tpd = atl1e_get_tpd(adapter);
1709 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1710 }
1711 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1712 tx_buffer->skb = NULL;
1713
1714 tx_buffer->length = map_len =
1715 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1716 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1717 tx_buffer->dma =
1718 pci_map_single(adapter->pdev, skb->data + mapped_len,
1719 map_len, PCI_DMA_TODEVICE);
1720 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1721 mapped_len += map_len;
1722 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1723 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1724 ((cpu_to_le32(tx_buffer->length) &
1725 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1726 }
1727
1728 for (f = 0; f < nr_frags; f++) {
1729 const struct skb_frag_struct *frag;
1730 u16 i;
1731 u16 seg_num;
1732
1733 frag = &skb_shinfo(skb)->frags[f];
1734 buf_len = skb_frag_size(frag);
1735
1736 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1737 for (i = 0; i < seg_num; i++) {
1738 use_tpd = atl1e_get_tpd(adapter);
1739 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1740
1741 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1742 BUG_ON(tx_buffer->skb);
1743
1744 tx_buffer->skb = NULL;
1745 tx_buffer->length =
1746 (buf_len > MAX_TX_BUF_LEN) ?
1747 MAX_TX_BUF_LEN : buf_len;
1748 buf_len -= tx_buffer->length;
1749
1750 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1751 frag,
1752 (i * MAX_TX_BUF_LEN),
1753 tx_buffer->length,
1754 DMA_TO_DEVICE);
1755 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1756 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1757 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1758 ((cpu_to_le32(tx_buffer->length) &
1759 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1760 }
1761 }
1762
1763 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1764 /* note this one is a tcp header */
1765 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1766 /* The last tpd */
1767
1768 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1769 /* The last buffer info contain the skb address,
1770 so it will be free after unmap */
1771 tx_buffer->skb = skb;
1772 }
1773
1774 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1775 struct atl1e_tpd_desc *tpd)
1776 {
1777 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1778 /* Force memory writes to complete before letting h/w
1779 * know there are new descriptors to fetch. (Only
1780 * applicable for weak-ordered memory model archs,
1781 * such as IA-64). */
1782 wmb();
1783 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1784 }
1785
1786 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1787 struct net_device *netdev)
1788 {
1789 struct atl1e_adapter *adapter = netdev_priv(netdev);
1790 unsigned long flags;
1791 u16 tpd_req = 1;
1792 struct atl1e_tpd_desc *tpd;
1793
1794 if (test_bit(__AT_DOWN, &adapter->flags)) {
1795 dev_kfree_skb_any(skb);
1796 return NETDEV_TX_OK;
1797 }
1798
1799 if (unlikely(skb->len <= 0)) {
1800 dev_kfree_skb_any(skb);
1801 return NETDEV_TX_OK;
1802 }
1803 tpd_req = atl1e_cal_tdp_req(skb);
1804 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1805 return NETDEV_TX_LOCKED;
1806
1807 if (atl1e_tpd_avail(adapter) < tpd_req) {
1808 /* no enough descriptor, just stop queue */
1809 netif_stop_queue(netdev);
1810 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1811 return NETDEV_TX_BUSY;
1812 }
1813
1814 tpd = atl1e_get_tpd(adapter);
1815
1816 if (vlan_tx_tag_present(skb)) {
1817 u16 vlan_tag = vlan_tx_tag_get(skb);
1818 u16 atl1e_vlan_tag;
1819
1820 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1821 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1822 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1823 TPD_VLAN_SHIFT;
1824 }
1825
1826 if (skb->protocol == htons(ETH_P_8021Q))
1827 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1828
1829 if (skb_network_offset(skb) != ETH_HLEN)
1830 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1831
1832 /* do TSO and check sum */
1833 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1834 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1835 dev_kfree_skb_any(skb);
1836 return NETDEV_TX_OK;
1837 }
1838
1839 atl1e_tx_map(adapter, skb, tpd);
1840 atl1e_tx_queue(adapter, tpd_req, tpd);
1841
1842 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1843 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1844 return NETDEV_TX_OK;
1845 }
1846
1847 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1848 {
1849 struct net_device *netdev = adapter->netdev;
1850
1851 free_irq(adapter->pdev->irq, netdev);
1852
1853 if (adapter->have_msi)
1854 pci_disable_msi(adapter->pdev);
1855 }
1856
1857 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1858 {
1859 struct pci_dev *pdev = adapter->pdev;
1860 struct net_device *netdev = adapter->netdev;
1861 int flags = 0;
1862 int err = 0;
1863
1864 adapter->have_msi = true;
1865 err = pci_enable_msi(pdev);
1866 if (err) {
1867 netdev_dbg(netdev,
1868 "Unable to allocate MSI interrupt Error: %d\n", err);
1869 adapter->have_msi = false;
1870 }
1871
1872 if (!adapter->have_msi)
1873 flags |= IRQF_SHARED;
1874 err = request_irq(pdev->irq, atl1e_intr, flags, netdev->name, netdev);
1875 if (err) {
1876 netdev_dbg(adapter->netdev,
1877 "Unable to allocate interrupt Error: %d\n", err);
1878 if (adapter->have_msi)
1879 pci_disable_msi(pdev);
1880 return err;
1881 }
1882 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1883 return err;
1884 }
1885
1886 int atl1e_up(struct atl1e_adapter *adapter)
1887 {
1888 struct net_device *netdev = adapter->netdev;
1889 int err = 0;
1890 u32 val;
1891
1892 /* hardware has been reset, we need to reload some things */
1893 err = atl1e_init_hw(&adapter->hw);
1894 if (err) {
1895 err = -EIO;
1896 return err;
1897 }
1898 atl1e_init_ring_ptrs(adapter);
1899 atl1e_set_multi(netdev);
1900 atl1e_restore_vlan(adapter);
1901
1902 if (atl1e_configure(adapter)) {
1903 err = -EIO;
1904 goto err_up;
1905 }
1906
1907 clear_bit(__AT_DOWN, &adapter->flags);
1908 napi_enable(&adapter->napi);
1909 atl1e_irq_enable(adapter);
1910 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1911 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1912 val | MASTER_CTRL_MANUAL_INT);
1913
1914 err_up:
1915 return err;
1916 }
1917
1918 void atl1e_down(struct atl1e_adapter *adapter)
1919 {
1920 struct net_device *netdev = adapter->netdev;
1921
1922 /* signal that we're down so the interrupt handler does not
1923 * reschedule our watchdog timer */
1924 set_bit(__AT_DOWN, &adapter->flags);
1925
1926 netif_stop_queue(netdev);
1927
1928 /* reset MAC to disable all RX/TX */
1929 atl1e_reset_hw(&adapter->hw);
1930 msleep(1);
1931
1932 napi_disable(&adapter->napi);
1933 atl1e_del_timer(adapter);
1934 atl1e_irq_disable(adapter);
1935
1936 netif_carrier_off(netdev);
1937 adapter->link_speed = SPEED_0;
1938 adapter->link_duplex = -1;
1939 atl1e_clean_tx_ring(adapter);
1940 atl1e_clean_rx_ring(adapter);
1941 }
1942
1943 /**
1944 * atl1e_open - Called when a network interface is made active
1945 * @netdev: network interface device structure
1946 *
1947 * Returns 0 on success, negative value on failure
1948 *
1949 * The open entry point is called when a network interface is made
1950 * active by the system (IFF_UP). At this point all resources needed
1951 * for transmit and receive operations are allocated, the interrupt
1952 * handler is registered with the OS, the watchdog timer is started,
1953 * and the stack is notified that the interface is ready.
1954 */
1955 static int atl1e_open(struct net_device *netdev)
1956 {
1957 struct atl1e_adapter *adapter = netdev_priv(netdev);
1958 int err;
1959
1960 /* disallow open during test */
1961 if (test_bit(__AT_TESTING, &adapter->flags))
1962 return -EBUSY;
1963
1964 /* allocate rx/tx dma buffer & descriptors */
1965 atl1e_init_ring_resources(adapter);
1966 err = atl1e_setup_ring_resources(adapter);
1967 if (unlikely(err))
1968 return err;
1969
1970 err = atl1e_request_irq(adapter);
1971 if (unlikely(err))
1972 goto err_req_irq;
1973
1974 err = atl1e_up(adapter);
1975 if (unlikely(err))
1976 goto err_up;
1977
1978 return 0;
1979
1980 err_up:
1981 atl1e_free_irq(adapter);
1982 err_req_irq:
1983 atl1e_free_ring_resources(adapter);
1984 atl1e_reset_hw(&adapter->hw);
1985
1986 return err;
1987 }
1988
1989 /**
1990 * atl1e_close - Disables a network interface
1991 * @netdev: network interface device structure
1992 *
1993 * Returns 0, this is not allowed to fail
1994 *
1995 * The close entry point is called when an interface is de-activated
1996 * by the OS. The hardware is still under the drivers control, but
1997 * needs to be disabled. A global MAC reset is issued to stop the
1998 * hardware, and all transmit and receive resources are freed.
1999 */
2000 static int atl1e_close(struct net_device *netdev)
2001 {
2002 struct atl1e_adapter *adapter = netdev_priv(netdev);
2003
2004 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2005 atl1e_down(adapter);
2006 atl1e_free_irq(adapter);
2007 atl1e_free_ring_resources(adapter);
2008
2009 return 0;
2010 }
2011
2012 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2013 {
2014 struct net_device *netdev = pci_get_drvdata(pdev);
2015 struct atl1e_adapter *adapter = netdev_priv(netdev);
2016 struct atl1e_hw *hw = &adapter->hw;
2017 u32 ctrl = 0;
2018 u32 mac_ctrl_data = 0;
2019 u32 wol_ctrl_data = 0;
2020 u16 mii_advertise_data = 0;
2021 u16 mii_bmsr_data = 0;
2022 u16 mii_intr_status_data = 0;
2023 u32 wufc = adapter->wol;
2024 u32 i;
2025 #ifdef CONFIG_PM
2026 int retval = 0;
2027 #endif
2028
2029 if (netif_running(netdev)) {
2030 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2031 atl1e_down(adapter);
2032 }
2033 netif_device_detach(netdev);
2034
2035 #ifdef CONFIG_PM
2036 retval = pci_save_state(pdev);
2037 if (retval)
2038 return retval;
2039 #endif
2040
2041 if (wufc) {
2042 /* get link status */
2043 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2044 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2045
2046 mii_advertise_data = ADVERTISE_10HALF;
2047
2048 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2049 (atl1e_write_phy_reg(hw,
2050 MII_ADVERTISE, mii_advertise_data) != 0) ||
2051 (atl1e_phy_commit(hw)) != 0) {
2052 netdev_dbg(adapter->netdev, "set phy register failed\n");
2053 goto wol_dis;
2054 }
2055
2056 hw->phy_configured = false; /* re-init PHY when resume */
2057
2058 /* turn on magic packet wol */
2059 if (wufc & AT_WUFC_MAG)
2060 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2061
2062 if (wufc & AT_WUFC_LNKC) {
2063 /* if orignal link status is link, just wait for retrive link */
2064 if (mii_bmsr_data & BMSR_LSTATUS) {
2065 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2066 msleep(100);
2067 atl1e_read_phy_reg(hw, MII_BMSR,
2068 &mii_bmsr_data);
2069 if (mii_bmsr_data & BMSR_LSTATUS)
2070 break;
2071 }
2072
2073 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2074 netdev_dbg(adapter->netdev,
2075 "Link may change when suspend\n");
2076 }
2077 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2078 /* only link up can wake up */
2079 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2080 netdev_dbg(adapter->netdev,
2081 "read write phy register failed\n");
2082 goto wol_dis;
2083 }
2084 }
2085 /* clear phy interrupt */
2086 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2087 /* Config MAC Ctrl register */
2088 mac_ctrl_data = MAC_CTRL_RX_EN;
2089 /* set to 10/100M halt duplex */
2090 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2091 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2092 MAC_CTRL_PRMLEN_MASK) <<
2093 MAC_CTRL_PRMLEN_SHIFT);
2094
2095 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2096
2097 /* magic packet maybe Broadcast&multicast&Unicast frame */
2098 if (wufc & AT_WUFC_MAG)
2099 mac_ctrl_data |= MAC_CTRL_BC_EN;
2100
2101 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2102 mac_ctrl_data);
2103
2104 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2105 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2106 /* pcie patch */
2107 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2108 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2110 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2111 goto suspend_exit;
2112 }
2113 wol_dis:
2114
2115 /* WOL disabled */
2116 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2117
2118 /* pcie patch */
2119 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2120 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2121 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2122
2123 atl1e_force_ps(hw);
2124 hw->phy_configured = false; /* re-init PHY when resume */
2125
2126 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2127
2128 suspend_exit:
2129
2130 if (netif_running(netdev))
2131 atl1e_free_irq(adapter);
2132
2133 pci_disable_device(pdev);
2134
2135 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2136
2137 return 0;
2138 }
2139
2140 #ifdef CONFIG_PM
2141 static int atl1e_resume(struct pci_dev *pdev)
2142 {
2143 struct net_device *netdev = pci_get_drvdata(pdev);
2144 struct atl1e_adapter *adapter = netdev_priv(netdev);
2145 u32 err;
2146
2147 pci_set_power_state(pdev, PCI_D0);
2148 pci_restore_state(pdev);
2149
2150 err = pci_enable_device(pdev);
2151 if (err) {
2152 netdev_err(adapter->netdev,
2153 "Cannot enable PCI device from suspend\n");
2154 return err;
2155 }
2156
2157 pci_set_master(pdev);
2158
2159 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2160
2161 pci_enable_wake(pdev, PCI_D3hot, 0);
2162 pci_enable_wake(pdev, PCI_D3cold, 0);
2163
2164 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2165
2166 if (netif_running(netdev)) {
2167 err = atl1e_request_irq(adapter);
2168 if (err)
2169 return err;
2170 }
2171
2172 atl1e_reset_hw(&adapter->hw);
2173
2174 if (netif_running(netdev))
2175 atl1e_up(adapter);
2176
2177 netif_device_attach(netdev);
2178
2179 return 0;
2180 }
2181 #endif
2182
2183 static void atl1e_shutdown(struct pci_dev *pdev)
2184 {
2185 atl1e_suspend(pdev, PMSG_SUSPEND);
2186 }
2187
2188 static const struct net_device_ops atl1e_netdev_ops = {
2189 .ndo_open = atl1e_open,
2190 .ndo_stop = atl1e_close,
2191 .ndo_start_xmit = atl1e_xmit_frame,
2192 .ndo_get_stats = atl1e_get_stats,
2193 .ndo_set_rx_mode = atl1e_set_multi,
2194 .ndo_validate_addr = eth_validate_addr,
2195 .ndo_set_mac_address = atl1e_set_mac_addr,
2196 .ndo_fix_features = atl1e_fix_features,
2197 .ndo_set_features = atl1e_set_features,
2198 .ndo_change_mtu = atl1e_change_mtu,
2199 .ndo_do_ioctl = atl1e_ioctl,
2200 .ndo_tx_timeout = atl1e_tx_timeout,
2201 #ifdef CONFIG_NET_POLL_CONTROLLER
2202 .ndo_poll_controller = atl1e_netpoll,
2203 #endif
2204
2205 };
2206
2207 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2208 {
2209 SET_NETDEV_DEV(netdev, &pdev->dev);
2210 pci_set_drvdata(pdev, netdev);
2211
2212 netdev->netdev_ops = &atl1e_netdev_ops;
2213
2214 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2215 atl1e_set_ethtool_ops(netdev);
2216
2217 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2218 NETIF_F_HW_VLAN_RX;
2219 netdev->features = netdev->hw_features | NETIF_F_LLTX |
2220 NETIF_F_HW_VLAN_TX;
2221
2222 return 0;
2223 }
2224
2225 /**
2226 * atl1e_probe - Device Initialization Routine
2227 * @pdev: PCI device information struct
2228 * @ent: entry in atl1e_pci_tbl
2229 *
2230 * Returns 0 on success, negative on failure
2231 *
2232 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2233 * The OS initialization, configuring of the adapter private structure,
2234 * and a hardware reset occur.
2235 */
2236 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2237 {
2238 struct net_device *netdev;
2239 struct atl1e_adapter *adapter = NULL;
2240 static int cards_found;
2241
2242 int err = 0;
2243
2244 err = pci_enable_device(pdev);
2245 if (err) {
2246 dev_err(&pdev->dev, "cannot enable PCI device\n");
2247 return err;
2248 }
2249
2250 /*
2251 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2252 * shared register for the high 32 bits, so only a single, aligned,
2253 * 4 GB physical address range can be used at a time.
2254 *
2255 * Supporting 64-bit DMA on this hardware is more trouble than it's
2256 * worth. It is far easier to limit to 32-bit DMA than update
2257 * various kernel subsystems to support the mechanics required by a
2258 * fixed-high-32-bit system.
2259 */
2260 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2261 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2262 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2263 goto err_dma;
2264 }
2265
2266 err = pci_request_regions(pdev, atl1e_driver_name);
2267 if (err) {
2268 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2269 goto err_pci_reg;
2270 }
2271
2272 pci_set_master(pdev);
2273
2274 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2275 if (netdev == NULL) {
2276 err = -ENOMEM;
2277 goto err_alloc_etherdev;
2278 }
2279
2280 err = atl1e_init_netdev(netdev, pdev);
2281 if (err) {
2282 netdev_err(netdev, "init netdevice failed\n");
2283 goto err_init_netdev;
2284 }
2285 adapter = netdev_priv(netdev);
2286 adapter->bd_number = cards_found;
2287 adapter->netdev = netdev;
2288 adapter->pdev = pdev;
2289 adapter->hw.adapter = adapter;
2290 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2291 if (!adapter->hw.hw_addr) {
2292 err = -EIO;
2293 netdev_err(netdev, "cannot map device registers\n");
2294 goto err_ioremap;
2295 }
2296
2297 /* init mii data */
2298 adapter->mii.dev = netdev;
2299 adapter->mii.mdio_read = atl1e_mdio_read;
2300 adapter->mii.mdio_write = atl1e_mdio_write;
2301 adapter->mii.phy_id_mask = 0x1f;
2302 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2303
2304 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2305
2306 init_timer(&adapter->phy_config_timer);
2307 adapter->phy_config_timer.function = atl1e_phy_config;
2308 adapter->phy_config_timer.data = (unsigned long) adapter;
2309
2310 /* get user settings */
2311 atl1e_check_options(adapter);
2312 /*
2313 * Mark all PCI regions associated with PCI device
2314 * pdev as being reserved by owner atl1e_driver_name
2315 * Enables bus-mastering on the device and calls
2316 * pcibios_set_master to do the needed arch specific settings
2317 */
2318 atl1e_setup_pcicmd(pdev);
2319 /* setup the private structure */
2320 err = atl1e_sw_init(adapter);
2321 if (err) {
2322 netdev_err(netdev, "net device private data init failed\n");
2323 goto err_sw_init;
2324 }
2325
2326 /* Init GPHY as early as possible due to power saving issue */
2327 atl1e_phy_init(&adapter->hw);
2328 /* reset the controller to
2329 * put the device in a known good starting state */
2330 err = atl1e_reset_hw(&adapter->hw);
2331 if (err) {
2332 err = -EIO;
2333 goto err_reset;
2334 }
2335
2336 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2337 err = -EIO;
2338 netdev_err(netdev, "get mac address failed\n");
2339 goto err_eeprom;
2340 }
2341
2342 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2343 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2344
2345 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2346 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2347 err = register_netdev(netdev);
2348 if (err) {
2349 netdev_err(netdev, "register netdevice failed\n");
2350 goto err_register;
2351 }
2352
2353 /* assume we have no link for now */
2354 netif_stop_queue(netdev);
2355 netif_carrier_off(netdev);
2356
2357 cards_found++;
2358
2359 return 0;
2360
2361 err_reset:
2362 err_register:
2363 err_sw_init:
2364 err_eeprom:
2365 iounmap(adapter->hw.hw_addr);
2366 err_init_netdev:
2367 err_ioremap:
2368 free_netdev(netdev);
2369 err_alloc_etherdev:
2370 pci_release_regions(pdev);
2371 err_pci_reg:
2372 err_dma:
2373 pci_disable_device(pdev);
2374 return err;
2375 }
2376
2377 /**
2378 * atl1e_remove - Device Removal Routine
2379 * @pdev: PCI device information struct
2380 *
2381 * atl1e_remove is called by the PCI subsystem to alert the driver
2382 * that it should release a PCI device. The could be caused by a
2383 * Hot-Plug event, or because the driver is going to be removed from
2384 * memory.
2385 */
2386 static void atl1e_remove(struct pci_dev *pdev)
2387 {
2388 struct net_device *netdev = pci_get_drvdata(pdev);
2389 struct atl1e_adapter *adapter = netdev_priv(netdev);
2390
2391 /*
2392 * flush_scheduled work may reschedule our watchdog task, so
2393 * explicitly disable watchdog tasks from being rescheduled
2394 */
2395 set_bit(__AT_DOWN, &adapter->flags);
2396
2397 atl1e_del_timer(adapter);
2398 atl1e_cancel_work(adapter);
2399
2400 unregister_netdev(netdev);
2401 atl1e_free_ring_resources(adapter);
2402 atl1e_force_ps(&adapter->hw);
2403 iounmap(adapter->hw.hw_addr);
2404 pci_release_regions(pdev);
2405 free_netdev(netdev);
2406 pci_disable_device(pdev);
2407 }
2408
2409 /**
2410 * atl1e_io_error_detected - called when PCI error is detected
2411 * @pdev: Pointer to PCI device
2412 * @state: The current pci connection state
2413 *
2414 * This function is called after a PCI bus error affecting
2415 * this device has been detected.
2416 */
2417 static pci_ers_result_t
2418 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2419 {
2420 struct net_device *netdev = pci_get_drvdata(pdev);
2421 struct atl1e_adapter *adapter = netdev_priv(netdev);
2422
2423 netif_device_detach(netdev);
2424
2425 if (state == pci_channel_io_perm_failure)
2426 return PCI_ERS_RESULT_DISCONNECT;
2427
2428 if (netif_running(netdev))
2429 atl1e_down(adapter);
2430
2431 pci_disable_device(pdev);
2432
2433 /* Request a slot slot reset. */
2434 return PCI_ERS_RESULT_NEED_RESET;
2435 }
2436
2437 /**
2438 * atl1e_io_slot_reset - called after the pci bus has been reset.
2439 * @pdev: Pointer to PCI device
2440 *
2441 * Restart the card from scratch, as if from a cold-boot. Implementation
2442 * resembles the first-half of the e1000_resume routine.
2443 */
2444 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2445 {
2446 struct net_device *netdev = pci_get_drvdata(pdev);
2447 struct atl1e_adapter *adapter = netdev_priv(netdev);
2448
2449 if (pci_enable_device(pdev)) {
2450 netdev_err(adapter->netdev,
2451 "Cannot re-enable PCI device after reset\n");
2452 return PCI_ERS_RESULT_DISCONNECT;
2453 }
2454 pci_set_master(pdev);
2455
2456 pci_enable_wake(pdev, PCI_D3hot, 0);
2457 pci_enable_wake(pdev, PCI_D3cold, 0);
2458
2459 atl1e_reset_hw(&adapter->hw);
2460
2461 return PCI_ERS_RESULT_RECOVERED;
2462 }
2463
2464 /**
2465 * atl1e_io_resume - called when traffic can start flowing again.
2466 * @pdev: Pointer to PCI device
2467 *
2468 * This callback is called when the error recovery driver tells us that
2469 * its OK to resume normal operation. Implementation resembles the
2470 * second-half of the atl1e_resume routine.
2471 */
2472 static void atl1e_io_resume(struct pci_dev *pdev)
2473 {
2474 struct net_device *netdev = pci_get_drvdata(pdev);
2475 struct atl1e_adapter *adapter = netdev_priv(netdev);
2476
2477 if (netif_running(netdev)) {
2478 if (atl1e_up(adapter)) {
2479 netdev_err(adapter->netdev,
2480 "can't bring device back up after reset\n");
2481 return;
2482 }
2483 }
2484
2485 netif_device_attach(netdev);
2486 }
2487
2488 static const struct pci_error_handlers atl1e_err_handler = {
2489 .error_detected = atl1e_io_error_detected,
2490 .slot_reset = atl1e_io_slot_reset,
2491 .resume = atl1e_io_resume,
2492 };
2493
2494 static struct pci_driver atl1e_driver = {
2495 .name = atl1e_driver_name,
2496 .id_table = atl1e_pci_tbl,
2497 .probe = atl1e_probe,
2498 .remove = atl1e_remove,
2499 /* Power Management Hooks */
2500 #ifdef CONFIG_PM
2501 .suspend = atl1e_suspend,
2502 .resume = atl1e_resume,
2503 #endif
2504 .shutdown = atl1e_shutdown,
2505 .err_handler = &atl1e_err_handler
2506 };
2507
2508 /**
2509 * atl1e_init_module - Driver Registration Routine
2510 *
2511 * atl1e_init_module is the first routine called when the driver is
2512 * loaded. All it does is register with the PCI subsystem.
2513 */
2514 static int __init atl1e_init_module(void)
2515 {
2516 return pci_register_driver(&atl1e_driver);
2517 }
2518
2519 /**
2520 * atl1e_exit_module - Driver Exit Cleanup Routine
2521 *
2522 * atl1e_exit_module is called just before the driver is removed
2523 * from memory.
2524 */
2525 static void __exit atl1e_exit_module(void)
2526 {
2527 pci_unregister_driver(&atl1e_driver);
2528 }
2529
2530 module_init(atl1e_init_module);
2531 module_exit(atl1e_exit_module);
Linux kernel - Deliverables
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