2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
43 #include "t4_values.h"
45 #include "cxgb4_debugfs.h"
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab
*tb
, loff_t pos
)
52 pos
-= tb
->skip_first
;
53 return pos
>= tb
->rows
? NULL
: &tb
->data
[pos
* tb
->width
];
56 static void *seq_tab_start(struct seq_file
*seq
, loff_t
*pos
)
58 struct seq_tab
*tb
= seq
->private;
60 if (tb
->skip_first
&& *pos
== 0)
61 return SEQ_START_TOKEN
;
63 return seq_tab_get_idx(tb
, *pos
);
66 static void *seq_tab_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
68 v
= seq_tab_get_idx(seq
->private, *pos
+ 1);
74 static void seq_tab_stop(struct seq_file
*seq
, void *v
)
78 static int seq_tab_show(struct seq_file
*seq
, void *v
)
80 const struct seq_tab
*tb
= seq
->private;
82 return tb
->show(seq
, v
, ((char *)v
- tb
->data
) / tb
->width
);
85 static const struct seq_operations seq_tab_ops
= {
86 .start
= seq_tab_start
,
92 struct seq_tab
*seq_open_tab(struct file
*f
, unsigned int rows
,
93 unsigned int width
, unsigned int have_header
,
94 int (*show
)(struct seq_file
*seq
, void *v
, int i
))
98 p
= __seq_open_private(f
, &seq_tab_ops
, sizeof(*p
) + rows
* width
);
103 p
->skip_first
= have_header
!= 0;
108 /* Trim the size of a seq_tab to the supplied number of rows. The operation is
111 static int seq_tab_trim(struct seq_tab
*p
, unsigned int new_rows
)
113 if (new_rows
> p
->rows
)
119 static int cim_la_show(struct seq_file
*seq
, void *v
, int idx
)
121 if (v
== SEQ_START_TOKEN
)
122 seq_puts(seq
, "Status Data PC LS0Stat LS0Addr "
128 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
129 (p
[0] >> 4) & 0xff, p
[0] & 0xf, p
[1] >> 4,
130 p
[1] & 0xf, p
[2] >> 4, p
[2] & 0xf, p
[3], p
[4], p
[5],
136 static int cim_la_show_3in1(struct seq_file
*seq
, void *v
, int idx
)
138 if (v
== SEQ_START_TOKEN
) {
139 seq_puts(seq
, "Status Data PC\n");
143 seq_printf(seq
, " %02x %08x %08x\n", p
[5] & 0xff, p
[6],
145 seq_printf(seq
, " %02x %02x%06x %02x%06x\n",
146 (p
[3] >> 8) & 0xff, p
[3] & 0xff, p
[4] >> 8,
147 p
[4] & 0xff, p
[5] >> 8);
148 seq_printf(seq
, " %02x %x%07x %x%07x\n", (p
[0] >> 4) & 0xff,
149 p
[0] & 0xf, p
[1] >> 4, p
[1] & 0xf, p
[2] >> 4);
154 static int cim_la_open(struct inode
*inode
, struct file
*file
)
159 struct adapter
*adap
= inode
->i_private
;
161 ret
= t4_cim_read(adap
, UP_UP_DBG_LA_CFG_A
, 1, &cfg
);
165 p
= seq_open_tab(file
, adap
->params
.cim_la_size
/ 8, 8 * sizeof(u32
), 1,
166 cfg
& UPDBGLACAPTPCONLY_F
?
167 cim_la_show_3in1
: cim_la_show
);
171 ret
= t4_cim_read_la(adap
, (u32
*)p
->data
, NULL
);
173 seq_release_private(inode
, file
);
177 static const struct file_operations cim_la_fops
= {
178 .owner
= THIS_MODULE
,
182 .release
= seq_release_private
185 static int cim_pif_la_show(struct seq_file
*seq
, void *v
, int idx
)
189 if (v
== SEQ_START_TOKEN
) {
190 seq_puts(seq
, "Cntl ID DataBE Addr Data\n");
191 } else if (idx
< CIM_PIFLA_SIZE
) {
192 seq_printf(seq
, " %02x %02x %04x %08x %08x%08x%08x%08x\n",
193 (p
[5] >> 22) & 0xff, (p
[5] >> 16) & 0x3f,
194 p
[5] & 0xffff, p
[4], p
[3], p
[2], p
[1], p
[0]);
196 if (idx
== CIM_PIFLA_SIZE
)
197 seq_puts(seq
, "\nCntl ID Data\n");
198 seq_printf(seq
, " %02x %02x %08x%08x%08x%08x\n",
199 (p
[4] >> 6) & 0xff, p
[4] & 0x3f,
200 p
[3], p
[2], p
[1], p
[0]);
205 static int cim_pif_la_open(struct inode
*inode
, struct file
*file
)
208 struct adapter
*adap
= inode
->i_private
;
210 p
= seq_open_tab(file
, 2 * CIM_PIFLA_SIZE
, 6 * sizeof(u32
), 1,
215 t4_cim_read_pif_la(adap
, (u32
*)p
->data
,
216 (u32
*)p
->data
+ 6 * CIM_PIFLA_SIZE
, NULL
, NULL
);
220 static const struct file_operations cim_pif_la_fops
= {
221 .owner
= THIS_MODULE
,
222 .open
= cim_pif_la_open
,
225 .release
= seq_release_private
228 static int cim_ma_la_show(struct seq_file
*seq
, void *v
, int idx
)
232 if (v
== SEQ_START_TOKEN
) {
234 } else if (idx
< CIM_MALA_SIZE
) {
235 seq_printf(seq
, "%02x%08x%08x%08x%08x\n",
236 p
[4], p
[3], p
[2], p
[1], p
[0]);
238 if (idx
== CIM_MALA_SIZE
)
240 "\nCnt ID Tag UE Data RDY VLD\n");
241 seq_printf(seq
, "%3u %2u %x %u %08x%08x %u %u\n",
242 (p
[2] >> 10) & 0xff, (p
[2] >> 7) & 7,
243 (p
[2] >> 3) & 0xf, (p
[2] >> 2) & 1,
244 (p
[1] >> 2) | ((p
[2] & 3) << 30),
245 (p
[0] >> 2) | ((p
[1] & 3) << 30), (p
[0] >> 1) & 1,
251 static int cim_ma_la_open(struct inode
*inode
, struct file
*file
)
254 struct adapter
*adap
= inode
->i_private
;
256 p
= seq_open_tab(file
, 2 * CIM_MALA_SIZE
, 5 * sizeof(u32
), 1,
261 t4_cim_read_ma_la(adap
, (u32
*)p
->data
,
262 (u32
*)p
->data
+ 5 * CIM_MALA_SIZE
);
266 static const struct file_operations cim_ma_la_fops
= {
267 .owner
= THIS_MODULE
,
268 .open
= cim_ma_la_open
,
271 .release
= seq_release_private
274 static int cim_qcfg_show(struct seq_file
*seq
, void *v
)
276 static const char * const qname
[] = {
277 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
278 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
283 struct adapter
*adap
= seq
->private;
284 u16 base
[CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
];
285 u16 size
[CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
];
286 u32 stat
[(4 * (CIM_NUM_IBQ
+ CIM_NUM_OBQ_T5
))];
287 u16 thres
[CIM_NUM_IBQ
];
288 u32 obq_wr_t4
[2 * CIM_NUM_OBQ
], *wr
;
289 u32 obq_wr_t5
[2 * CIM_NUM_OBQ_T5
];
291 int cim_num_obq
= is_t4(adap
->params
.chip
) ?
292 CIM_NUM_OBQ
: CIM_NUM_OBQ_T5
;
294 i
= t4_cim_read(adap
, is_t4(adap
->params
.chip
) ? UP_IBQ_0_RDADDR_A
:
295 UP_IBQ_0_SHADOW_RDADDR_A
,
296 ARRAY_SIZE(stat
), stat
);
298 if (is_t4(adap
->params
.chip
)) {
299 i
= t4_cim_read(adap
, UP_OBQ_0_REALADDR_A
,
300 ARRAY_SIZE(obq_wr_t4
), obq_wr_t4
);
303 i
= t4_cim_read(adap
, UP_OBQ_0_SHADOW_REALADDR_A
,
304 ARRAY_SIZE(obq_wr_t5
), obq_wr_t5
);
311 t4_read_cimq_cfg(adap
, base
, size
, thres
);
314 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
315 for (i
= 0; i
< CIM_NUM_IBQ
; i
++, p
+= 4)
316 seq_printf(seq
, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
317 qname
[i
], base
[i
], size
[i
], thres
[i
],
318 IBQRDADDR_G(p
[0]), IBQWRADDR_G(p
[1]),
319 QUESOPCNT_G(p
[3]), QUEEOPCNT_G(p
[3]),
320 QUEREMFLITS_G(p
[2]) * 16);
321 for ( ; i
< CIM_NUM_IBQ
+ cim_num_obq
; i
++, p
+= 4, wr
+= 2)
322 seq_printf(seq
, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
323 qname
[i
], base
[i
], size
[i
],
324 QUERDADDR_G(p
[0]) & 0x3fff, wr
[0] - base
[i
],
325 QUESOPCNT_G(p
[3]), QUEEOPCNT_G(p
[3]),
326 QUEREMFLITS_G(p
[2]) * 16);
330 static int cim_qcfg_open(struct inode
*inode
, struct file
*file
)
332 return single_open(file
, cim_qcfg_show
, inode
->i_private
);
335 static const struct file_operations cim_qcfg_fops
= {
336 .owner
= THIS_MODULE
,
337 .open
= cim_qcfg_open
,
340 .release
= single_release
,
343 static int cimq_show(struct seq_file
*seq
, void *v
, int idx
)
347 seq_printf(seq
, "%#06x: %08x %08x %08x %08x\n", idx
* 16, p
[0], p
[1],
352 static int cim_ibq_open(struct inode
*inode
, struct file
*file
)
356 unsigned int qid
= (uintptr_t)inode
->i_private
& 7;
357 struct adapter
*adap
= inode
->i_private
- qid
;
359 p
= seq_open_tab(file
, CIM_IBQ_SIZE
, 4 * sizeof(u32
), 0, cimq_show
);
363 ret
= t4_read_cim_ibq(adap
, qid
, (u32
*)p
->data
, CIM_IBQ_SIZE
* 4);
365 seq_release_private(inode
, file
);
371 static const struct file_operations cim_ibq_fops
= {
372 .owner
= THIS_MODULE
,
373 .open
= cim_ibq_open
,
376 .release
= seq_release_private
379 static int cim_obq_open(struct inode
*inode
, struct file
*file
)
383 unsigned int qid
= (uintptr_t)inode
->i_private
& 7;
384 struct adapter
*adap
= inode
->i_private
- qid
;
386 p
= seq_open_tab(file
, 6 * CIM_OBQ_SIZE
, 4 * sizeof(u32
), 0, cimq_show
);
390 ret
= t4_read_cim_obq(adap
, qid
, (u32
*)p
->data
, 6 * CIM_OBQ_SIZE
* 4);
392 seq_release_private(inode
, file
);
394 seq_tab_trim(p
, ret
/ 4);
400 static const struct file_operations cim_obq_fops
= {
401 .owner
= THIS_MODULE
,
402 .open
= cim_obq_open
,
405 .release
= seq_release_private
414 static void field_desc_show(struct seq_file
*seq
, u64 v
,
415 const struct field_desc
*p
)
421 u64 mask
= (1ULL << p
->width
) - 1;
422 int len
= scnprintf(buf
, sizeof(buf
), "%s: %llu", p
->name
,
423 ((unsigned long long)v
>> p
->start
) & mask
);
425 if (line_size
+ len
>= 79) {
427 seq_puts(seq
, "\n ");
429 seq_printf(seq
, "%s ", buf
);
430 line_size
+= len
+ 1;
436 static struct field_desc tp_la0
[] = {
437 { "RcfOpCodeOut", 60, 4 },
439 { "WcfState", 52, 4 },
440 { "RcfOpcSrcOut", 50, 2 },
441 { "CRxError", 49, 1 },
442 { "ERxError", 48, 1 },
443 { "SanityFailed", 47, 1 },
444 { "SpuriousMsg", 46, 1 },
445 { "FlushInputMsg", 45, 1 },
446 { "FlushInputCpl", 44, 1 },
447 { "RssUpBit", 43, 1 },
448 { "RssFilterHit", 42, 1 },
450 { "InitTcb", 31, 1 },
451 { "LineNumber", 24, 7 },
453 { "EdataOut", 22, 1 },
455 { "CdataOut", 20, 1 },
456 { "EreadPdu", 19, 1 },
457 { "CreadPdu", 18, 1 },
458 { "TunnelPkt", 17, 1 },
459 { "RcfPeerFin", 16, 1 },
460 { "RcfReasonOut", 12, 4 },
461 { "TxCchannel", 10, 2 },
462 { "RcfTxChannel", 8, 2 },
463 { "RxEchannel", 6, 2 },
464 { "RcfRxChannel", 5, 1 },
465 { "RcfDataOutSrdy", 4, 1 },
467 { "RxOoDvld", 2, 1 },
468 { "RxCongestion", 1, 1 },
469 { "TxCongestion", 0, 1 },
473 static int tp_la_show(struct seq_file
*seq
, void *v
, int idx
)
477 field_desc_show(seq
, *p
, tp_la0
);
481 static int tp_la_show2(struct seq_file
*seq
, void *v
, int idx
)
487 field_desc_show(seq
, p
[0], tp_la0
);
488 if (idx
< (TPLA_SIZE
/ 2 - 1) || p
[1] != ~0ULL)
489 field_desc_show(seq
, p
[1], tp_la0
);
493 static int tp_la_show3(struct seq_file
*seq
, void *v
, int idx
)
495 static struct field_desc tp_la1
[] = {
496 { "CplCmdIn", 56, 8 },
497 { "CplCmdOut", 48, 8 },
498 { "ESynOut", 47, 1 },
499 { "EAckOut", 46, 1 },
500 { "EFinOut", 45, 1 },
501 { "ERstOut", 44, 1 },
507 { "DataInVld", 38, 1 },
509 { "RxBufEmpty", 36, 1 },
511 { "RxFbCongestion", 34, 1 },
512 { "TxFbCongestion", 33, 1 },
513 { "TxPktSumSrdy", 32, 1 },
514 { "RcfUlpType", 28, 4 },
516 { "Ebypass", 26, 1 },
518 { "Static0", 24, 1 },
520 { "Cbypass", 22, 1 },
522 { "CPktOut", 20, 1 },
523 { "RxPagePoolFull", 18, 2 },
524 { "RxLpbkPkt", 17, 1 },
525 { "TxLpbkPkt", 16, 1 },
526 { "RxVfValid", 15, 1 },
527 { "SynLearned", 14, 1 },
528 { "SetDelEntry", 13, 1 },
529 { "SetInvEntry", 12, 1 },
530 { "CpcmdDvld", 11, 1 },
531 { "CpcmdSave", 10, 1 },
532 { "RxPstructsFull", 8, 2 },
533 { "EpcmdDvld", 7, 1 },
534 { "EpcmdFlush", 6, 1 },
535 { "EpcmdTrimPrefix", 5, 1 },
536 { "EpcmdTrimPostfix", 4, 1 },
537 { "ERssIp4Pkt", 3, 1 },
538 { "ERssIp6Pkt", 2, 1 },
539 { "ERssTcpUdpPkt", 1, 1 },
540 { "ERssFceFipPkt", 0, 1 },
543 static struct field_desc tp_la2
[] = {
544 { "CplCmdIn", 56, 8 },
545 { "MpsVfVld", 55, 1 },
553 { "DataInVld", 38, 1 },
555 { "RxBufEmpty", 36, 1 },
557 { "RxFbCongestion", 34, 1 },
558 { "TxFbCongestion", 33, 1 },
559 { "TxPktSumSrdy", 32, 1 },
560 { "RcfUlpType", 28, 4 },
562 { "Ebypass", 26, 1 },
564 { "Static0", 24, 1 },
566 { "Cbypass", 22, 1 },
568 { "CPktOut", 20, 1 },
569 { "RxPagePoolFull", 18, 2 },
570 { "RxLpbkPkt", 17, 1 },
571 { "TxLpbkPkt", 16, 1 },
572 { "RxVfValid", 15, 1 },
573 { "SynLearned", 14, 1 },
574 { "SetDelEntry", 13, 1 },
575 { "SetInvEntry", 12, 1 },
576 { "CpcmdDvld", 11, 1 },
577 { "CpcmdSave", 10, 1 },
578 { "RxPstructsFull", 8, 2 },
579 { "EpcmdDvld", 7, 1 },
580 { "EpcmdFlush", 6, 1 },
581 { "EpcmdTrimPrefix", 5, 1 },
582 { "EpcmdTrimPostfix", 4, 1 },
583 { "ERssIp4Pkt", 3, 1 },
584 { "ERssIp6Pkt", 2, 1 },
585 { "ERssTcpUdpPkt", 1, 1 },
586 { "ERssFceFipPkt", 0, 1 },
593 field_desc_show(seq
, p
[0], tp_la0
);
594 if (idx
< (TPLA_SIZE
/ 2 - 1) || p
[1] != ~0ULL)
595 field_desc_show(seq
, p
[1], (p
[0] & BIT(17)) ? tp_la2
: tp_la1
);
599 static int tp_la_open(struct inode
*inode
, struct file
*file
)
602 struct adapter
*adap
= inode
->i_private
;
604 switch (DBGLAMODE_G(t4_read_reg(adap
, TP_DBG_LA_CONFIG_A
))) {
606 p
= seq_open_tab(file
, TPLA_SIZE
/ 2, 2 * sizeof(u64
), 0,
610 p
= seq_open_tab(file
, TPLA_SIZE
/ 2, 2 * sizeof(u64
), 0,
614 p
= seq_open_tab(file
, TPLA_SIZE
, sizeof(u64
), 0, tp_la_show
);
619 t4_tp_read_la(adap
, (u64
*)p
->data
, NULL
);
623 static ssize_t
tp_la_write(struct file
*file
, const char __user
*buf
,
624 size_t count
, loff_t
*pos
)
629 size_t size
= min(sizeof(s
) - 1, count
);
630 struct adapter
*adap
= file_inode(file
)->i_private
;
632 if (copy_from_user(s
, buf
, size
))
635 err
= kstrtoul(s
, 0, &val
);
640 adap
->params
.tp
.la_mask
= val
<< 16;
641 t4_set_reg_field(adap
, TP_DBG_LA_CONFIG_A
, 0xffff0000U
,
642 adap
->params
.tp
.la_mask
);
646 static const struct file_operations tp_la_fops
= {
647 .owner
= THIS_MODULE
,
651 .release
= seq_release_private
,
655 static int ulprx_la_show(struct seq_file
*seq
, void *v
, int idx
)
659 if (v
== SEQ_START_TOKEN
)
660 seq_puts(seq
, " Pcmd Type Message"
663 seq_printf(seq
, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
664 p
[1], p
[0], p
[2], p
[3], p
[7], p
[6], p
[5], p
[4]);
668 static int ulprx_la_open(struct inode
*inode
, struct file
*file
)
671 struct adapter
*adap
= inode
->i_private
;
673 p
= seq_open_tab(file
, ULPRX_LA_SIZE
, 8 * sizeof(u32
), 1,
678 t4_ulprx_read_la(adap
, (u32
*)p
->data
);
682 static const struct file_operations ulprx_la_fops
= {
683 .owner
= THIS_MODULE
,
684 .open
= ulprx_la_open
,
687 .release
= seq_release_private
690 /* Show the PM memory stats. These stats include:
693 * Read: memory read operation
694 * Write Bypass: cut-through
695 * Bypass + mem: cut-through and save copy
699 * Write Bypass: cut-through
700 * Flush: payload trim or drop
702 static int pm_stats_show(struct seq_file
*seq
, void *v
)
704 static const char * const tx_pm_stats
[] = {
705 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
707 static const char * const rx_pm_stats
[] = {
708 "Read:", "Write bypass:", "Write mem:", "Flush:"
712 u32 tx_cnt
[PM_NSTATS
], rx_cnt
[PM_NSTATS
];
713 u64 tx_cyc
[PM_NSTATS
], rx_cyc
[PM_NSTATS
];
714 struct adapter
*adap
= seq
->private;
716 t4_pmtx_get_stats(adap
, tx_cnt
, tx_cyc
);
717 t4_pmrx_get_stats(adap
, rx_cnt
, rx_cyc
);
719 seq_printf(seq
, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
720 for (i
= 0; i
< PM_NSTATS
- 1; i
++)
721 seq_printf(seq
, "%-13s %10u %20llu\n",
722 tx_pm_stats
[i
], tx_cnt
[i
], tx_cyc
[i
]);
724 seq_printf(seq
, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
725 for (i
= 0; i
< PM_NSTATS
- 1; i
++)
726 seq_printf(seq
, "%-13s %10u %20llu\n",
727 rx_pm_stats
[i
], rx_cnt
[i
], rx_cyc
[i
]);
731 static int pm_stats_open(struct inode
*inode
, struct file
*file
)
733 return single_open(file
, pm_stats_show
, inode
->i_private
);
736 static ssize_t
pm_stats_clear(struct file
*file
, const char __user
*buf
,
737 size_t count
, loff_t
*pos
)
739 struct adapter
*adap
= file_inode(file
)->i_private
;
741 t4_write_reg(adap
, PM_RX_STAT_CONFIG_A
, 0);
742 t4_write_reg(adap
, PM_TX_STAT_CONFIG_A
, 0);
746 static const struct file_operations pm_stats_debugfs_fops
= {
747 .owner
= THIS_MODULE
,
748 .open
= pm_stats_open
,
751 .release
= single_release
,
752 .write
= pm_stats_clear
755 static int tx_rate_show(struct seq_file
*seq
, void *v
)
757 u64 nrate
[NCHAN
], orate
[NCHAN
];
758 struct adapter
*adap
= seq
->private;
760 t4_get_chan_txrate(adap
, nrate
, orate
);
761 if (adap
->params
.arch
.nchan
== NCHAN
) {
762 seq_puts(seq
, " channel 0 channel 1 "
763 "channel 2 channel 3\n");
764 seq_printf(seq
, "NIC B/s: %10llu %10llu %10llu %10llu\n",
765 (unsigned long long)nrate
[0],
766 (unsigned long long)nrate
[1],
767 (unsigned long long)nrate
[2],
768 (unsigned long long)nrate
[3]);
769 seq_printf(seq
, "Offload B/s: %10llu %10llu %10llu %10llu\n",
770 (unsigned long long)orate
[0],
771 (unsigned long long)orate
[1],
772 (unsigned long long)orate
[2],
773 (unsigned long long)orate
[3]);
775 seq_puts(seq
, " channel 0 channel 1\n");
776 seq_printf(seq
, "NIC B/s: %10llu %10llu\n",
777 (unsigned long long)nrate
[0],
778 (unsigned long long)nrate
[1]);
779 seq_printf(seq
, "Offload B/s: %10llu %10llu\n",
780 (unsigned long long)orate
[0],
781 (unsigned long long)orate
[1]);
786 DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate
);
788 static int cctrl_tbl_show(struct seq_file
*seq
, void *v
)
790 static const char * const dec_fac
[] = {
791 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
795 u16 (*incr
)[NCCTRL_WIN
];
796 struct adapter
*adap
= seq
->private;
798 incr
= kmalloc(sizeof(*incr
) * NMTUS
, GFP_KERNEL
);
802 t4_read_cong_tbl(adap
, incr
);
804 for (i
= 0; i
< NCCTRL_WIN
; ++i
) {
805 seq_printf(seq
, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i
,
806 incr
[0][i
], incr
[1][i
], incr
[2][i
], incr
[3][i
],
807 incr
[4][i
], incr
[5][i
], incr
[6][i
], incr
[7][i
]);
808 seq_printf(seq
, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
809 incr
[8][i
], incr
[9][i
], incr
[10][i
], incr
[11][i
],
810 incr
[12][i
], incr
[13][i
], incr
[14][i
], incr
[15][i
],
811 adap
->params
.a_wnd
[i
],
812 dec_fac
[adap
->params
.b_wnd
[i
]]);
819 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl
);
821 /* Format a value in a unit that differs from the value's native unit by the
824 static char *unit_conv(char *buf
, size_t len
, unsigned int val
,
827 unsigned int rem
= val
% factor
;
830 snprintf(buf
, len
, "%u", val
/ factor
);
832 while (rem
% 10 == 0)
834 snprintf(buf
, len
, "%u.%u", val
/ factor
, rem
);
839 static int clk_show(struct seq_file
*seq
, void *v
)
842 struct adapter
*adap
= seq
->private;
843 unsigned int cclk_ps
= 1000000000 / adap
->params
.vpd
.cclk
; /* in ps */
844 u32 res
= t4_read_reg(adap
, TP_TIMER_RESOLUTION_A
);
845 unsigned int tre
= TIMERRESOLUTION_G(res
);
846 unsigned int dack_re
= DELAYEDACKRESOLUTION_G(res
);
847 unsigned long long tp_tick_us
= (cclk_ps
<< tre
) / 1000000; /* in us */
849 seq_printf(seq
, "Core clock period: %s ns\n",
850 unit_conv(buf
, sizeof(buf
), cclk_ps
, 1000));
851 seq_printf(seq
, "TP timer tick: %s us\n",
852 unit_conv(buf
, sizeof(buf
), (cclk_ps
<< tre
), 1000000));
853 seq_printf(seq
, "TCP timestamp tick: %s us\n",
854 unit_conv(buf
, sizeof(buf
),
855 (cclk_ps
<< TIMESTAMPRESOLUTION_G(res
)), 1000000));
856 seq_printf(seq
, "DACK tick: %s us\n",
857 unit_conv(buf
, sizeof(buf
), (cclk_ps
<< dack_re
), 1000000));
858 seq_printf(seq
, "DACK timer: %u us\n",
859 ((cclk_ps
<< dack_re
) / 1000000) *
860 t4_read_reg(adap
, TP_DACK_TIMER_A
));
861 seq_printf(seq
, "Retransmit min: %llu us\n",
862 tp_tick_us
* t4_read_reg(adap
, TP_RXT_MIN_A
));
863 seq_printf(seq
, "Retransmit max: %llu us\n",
864 tp_tick_us
* t4_read_reg(adap
, TP_RXT_MAX_A
));
865 seq_printf(seq
, "Persist timer min: %llu us\n",
866 tp_tick_us
* t4_read_reg(adap
, TP_PERS_MIN_A
));
867 seq_printf(seq
, "Persist timer max: %llu us\n",
868 tp_tick_us
* t4_read_reg(adap
, TP_PERS_MAX_A
));
869 seq_printf(seq
, "Keepalive idle timer: %llu us\n",
870 tp_tick_us
* t4_read_reg(adap
, TP_KEEP_IDLE_A
));
871 seq_printf(seq
, "Keepalive interval: %llu us\n",
872 tp_tick_us
* t4_read_reg(adap
, TP_KEEP_INTVL_A
));
873 seq_printf(seq
, "Initial SRTT: %llu us\n",
874 tp_tick_us
* INITSRTT_G(t4_read_reg(adap
, TP_INIT_SRTT_A
)));
875 seq_printf(seq
, "FINWAIT2 timer: %llu us\n",
876 tp_tick_us
* t4_read_reg(adap
, TP_FINWAIT2_TIMER_A
));
881 DEFINE_SIMPLE_DEBUGFS_FILE(clk
);
883 /* Firmware Device Log dump. */
884 static const char * const devlog_level_strings
[] = {
885 [FW_DEVLOG_LEVEL_EMERG
] = "EMERG",
886 [FW_DEVLOG_LEVEL_CRIT
] = "CRIT",
887 [FW_DEVLOG_LEVEL_ERR
] = "ERR",
888 [FW_DEVLOG_LEVEL_NOTICE
] = "NOTICE",
889 [FW_DEVLOG_LEVEL_INFO
] = "INFO",
890 [FW_DEVLOG_LEVEL_DEBUG
] = "DEBUG"
893 static const char * const devlog_facility_strings
[] = {
894 [FW_DEVLOG_FACILITY_CORE
] = "CORE",
895 [FW_DEVLOG_FACILITY_SCHED
] = "SCHED",
896 [FW_DEVLOG_FACILITY_TIMER
] = "TIMER",
897 [FW_DEVLOG_FACILITY_RES
] = "RES",
898 [FW_DEVLOG_FACILITY_HW
] = "HW",
899 [FW_DEVLOG_FACILITY_FLR
] = "FLR",
900 [FW_DEVLOG_FACILITY_DMAQ
] = "DMAQ",
901 [FW_DEVLOG_FACILITY_PHY
] = "PHY",
902 [FW_DEVLOG_FACILITY_MAC
] = "MAC",
903 [FW_DEVLOG_FACILITY_PORT
] = "PORT",
904 [FW_DEVLOG_FACILITY_VI
] = "VI",
905 [FW_DEVLOG_FACILITY_FILTER
] = "FILTER",
906 [FW_DEVLOG_FACILITY_ACL
] = "ACL",
907 [FW_DEVLOG_FACILITY_TM
] = "TM",
908 [FW_DEVLOG_FACILITY_QFC
] = "QFC",
909 [FW_DEVLOG_FACILITY_DCB
] = "DCB",
910 [FW_DEVLOG_FACILITY_ETH
] = "ETH",
911 [FW_DEVLOG_FACILITY_OFLD
] = "OFLD",
912 [FW_DEVLOG_FACILITY_RI
] = "RI",
913 [FW_DEVLOG_FACILITY_ISCSI
] = "ISCSI",
914 [FW_DEVLOG_FACILITY_FCOE
] = "FCOE",
915 [FW_DEVLOG_FACILITY_FOISCSI
] = "FOISCSI",
916 [FW_DEVLOG_FACILITY_FOFCOE
] = "FOFCOE"
919 /* Information gathered by Device Log Open routine for the display routine.
922 unsigned int nentries
; /* number of entries in log[] */
923 unsigned int first
; /* first [temporal] entry in log[] */
924 struct fw_devlog_e log
[0]; /* Firmware Device Log */
927 /* Dump a Firmaware Device Log entry.
929 static int devlog_show(struct seq_file
*seq
, void *v
)
931 if (v
== SEQ_START_TOKEN
)
932 seq_printf(seq
, "%10s %15s %8s %8s %s\n",
933 "Seq#", "Tstamp", "Level", "Facility", "Message");
935 struct devlog_info
*dinfo
= seq
->private;
936 int fidx
= (uintptr_t)v
- 2;
938 struct fw_devlog_e
*e
;
940 /* Get a pointer to the log entry to display. Skip unused log
943 index
= dinfo
->first
+ fidx
;
944 if (index
>= dinfo
->nentries
)
945 index
-= dinfo
->nentries
;
946 e
= &dinfo
->log
[index
];
947 if (e
->timestamp
== 0)
950 /* Print the message. This depends on the firmware using
951 * exactly the same formating strings as the kernel so we may
952 * eventually have to put a format interpreter in here ...
954 seq_printf(seq
, "%10d %15llu %8s %8s ",
955 e
->seqno
, e
->timestamp
,
956 (e
->level
< ARRAY_SIZE(devlog_level_strings
)
957 ? devlog_level_strings
[e
->level
]
959 (e
->facility
< ARRAY_SIZE(devlog_facility_strings
)
960 ? devlog_facility_strings
[e
->facility
]
962 seq_printf(seq
, e
->fmt
, e
->params
[0], e
->params
[1],
963 e
->params
[2], e
->params
[3], e
->params
[4],
964 e
->params
[5], e
->params
[6], e
->params
[7]);
969 /* Sequential File Operations for Device Log.
971 static inline void *devlog_get_idx(struct devlog_info
*dinfo
, loff_t pos
)
973 if (pos
> dinfo
->nentries
)
976 return (void *)(uintptr_t)(pos
+ 1);
979 static void *devlog_start(struct seq_file
*seq
, loff_t
*pos
)
981 struct devlog_info
*dinfo
= seq
->private;
984 ? devlog_get_idx(dinfo
, *pos
)
988 static void *devlog_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
990 struct devlog_info
*dinfo
= seq
->private;
993 return devlog_get_idx(dinfo
, *pos
);
996 static void devlog_stop(struct seq_file
*seq
, void *v
)
1000 static const struct seq_operations devlog_seq_ops
= {
1001 .start
= devlog_start
,
1002 .next
= devlog_next
,
1003 .stop
= devlog_stop
,
1007 /* Set up for reading the firmware's device log. We read the entire log here
1008 * and then display it incrementally in devlog_show().
1010 static int devlog_open(struct inode
*inode
, struct file
*file
)
1012 struct adapter
*adap
= inode
->i_private
;
1013 struct devlog_params
*dparams
= &adap
->params
.devlog
;
1014 struct devlog_info
*dinfo
;
1019 /* If we don't know where the log is we can't do anything.
1021 if (dparams
->start
== 0)
1024 /* Allocate the space to read in the firmware's device log and set up
1025 * for the iterated call to our display function.
1027 dinfo
= __seq_open_private(file
, &devlog_seq_ops
,
1028 sizeof(*dinfo
) + dparams
->size
);
1032 /* Record the basic log buffer information and read in the raw log.
1034 dinfo
->nentries
= (dparams
->size
/ sizeof(struct fw_devlog_e
));
1036 spin_lock(&adap
->win0_lock
);
1037 ret
= t4_memory_rw(adap
, adap
->params
.drv_memwin
, dparams
->memtype
,
1038 dparams
->start
, dparams
->size
, (__be32
*)dinfo
->log
,
1040 spin_unlock(&adap
->win0_lock
);
1042 seq_release_private(inode
, file
);
1046 /* Translate log multi-byte integral elements into host native format
1047 * and determine where the first entry in the log is.
1049 for (fseqno
= ~((u32
)0), index
= 0; index
< dinfo
->nentries
; index
++) {
1050 struct fw_devlog_e
*e
= &dinfo
->log
[index
];
1054 if (e
->timestamp
== 0)
1057 e
->timestamp
= (__force __be64
)be64_to_cpu(e
->timestamp
);
1058 seqno
= be32_to_cpu(e
->seqno
);
1059 for (i
= 0; i
< 8; i
++)
1061 (__force __be32
)be32_to_cpu(e
->params
[i
]);
1063 if (seqno
< fseqno
) {
1065 dinfo
->first
= index
;
1071 static const struct file_operations devlog_fops
= {
1072 .owner
= THIS_MODULE
,
1073 .open
= devlog_open
,
1075 .llseek
= seq_lseek
,
1076 .release
= seq_release_private
1079 static int mbox_show(struct seq_file
*seq
, void *v
)
1081 static const char * const owner
[] = { "none", "FW", "driver",
1085 unsigned int mbox
= (uintptr_t)seq
->private & 7;
1086 struct adapter
*adap
= seq
->private - mbox
;
1087 void __iomem
*addr
= adap
->regs
+ PF_REG(mbox
, CIM_PF_MAILBOX_DATA_A
);
1088 unsigned int ctrl_reg
= (is_t4(adap
->params
.chip
)
1089 ? CIM_PF_MAILBOX_CTRL_A
1090 : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A
);
1091 void __iomem
*ctrl
= adap
->regs
+ PF_REG(mbox
, ctrl_reg
);
1093 i
= MBOWNER_G(readl(ctrl
));
1094 seq_printf(seq
, "mailbox owned by %s\n\n", owner
[i
]);
1096 for (i
= 0; i
< MBOX_LEN
; i
+= 8)
1097 seq_printf(seq
, "%016llx\n",
1098 (unsigned long long)readq(addr
+ i
));
1102 static int mbox_open(struct inode
*inode
, struct file
*file
)
1104 return single_open(file
, mbox_show
, inode
->i_private
);
1107 static ssize_t
mbox_write(struct file
*file
, const char __user
*buf
,
1108 size_t count
, loff_t
*pos
)
1111 char c
= '\n', s
[256];
1112 unsigned long long data
[8];
1113 const struct inode
*ino
;
1115 struct adapter
*adap
;
1119 if (count
> sizeof(s
) - 1 || !count
)
1121 if (copy_from_user(s
, buf
, count
))
1125 if (sscanf(s
, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data
[0],
1126 &data
[1], &data
[2], &data
[3], &data
[4], &data
[5], &data
[6],
1127 &data
[7], &c
) < 8 || c
!= '\n')
1130 ino
= file_inode(file
);
1131 mbox
= (uintptr_t)ino
->i_private
& 7;
1132 adap
= ino
->i_private
- mbox
;
1133 addr
= adap
->regs
+ PF_REG(mbox
, CIM_PF_MAILBOX_DATA_A
);
1134 ctrl
= addr
+ MBOX_LEN
;
1136 if (MBOWNER_G(readl(ctrl
)) != X_MBOWNER_PL
)
1139 for (i
= 0; i
< 8; i
++)
1140 writeq(data
[i
], addr
+ 8 * i
);
1142 writel(MBMSGVALID_F
| MBOWNER_V(X_MBOWNER_FW
), ctrl
);
1146 static const struct file_operations mbox_debugfs_fops
= {
1147 .owner
= THIS_MODULE
,
1150 .llseek
= seq_lseek
,
1151 .release
= single_release
,
1155 static ssize_t
flash_read(struct file
*file
, char __user
*buf
, size_t count
,
1159 loff_t avail
= file_inode(file
)->i_size
;
1160 struct adapter
*adap
= file
->private_data
;
1166 if (count
> avail
- pos
)
1167 count
= avail
- pos
;
1175 len
= min(count
+ ofst
, sizeof(data
));
1176 ret
= t4_read_flash(adap
, pos
- ofst
, (len
+ 3) / 4,
1182 if (copy_to_user(buf
, data
+ ofst
, len
))
1189 count
= pos
- *ppos
;
1194 static const struct file_operations flash_debugfs_fops
= {
1195 .owner
= THIS_MODULE
,
1200 static inline void tcamxy2valmask(u64 x
, u64 y
, u8
*addr
, u64
*mask
)
1203 y
= (__force u64
)cpu_to_be64(y
);
1204 memcpy(addr
, (char *)&y
+ 2, ETH_ALEN
);
1207 static int mps_tcam_show(struct seq_file
*seq
, void *v
)
1209 struct adapter
*adap
= seq
->private;
1210 unsigned int chip_ver
= CHELSIO_CHIP_VERSION(adap
->params
.chip
);
1212 if (v
== SEQ_START_TOKEN
) {
1213 if (adap
->params
.arch
.mps_rplc_size
> 128)
1214 seq_puts(seq
, "Idx Ethernet address Mask "
1217 " P0 P1 P2 P3 ML\n");
1219 seq_puts(seq
, "Idx Ethernet address Mask "
1220 "Vld Ports PF VF Replication"
1221 " P0 P1 P2 P3 ML\n");
1226 unsigned int idx
= (uintptr_t)v
- 2;
1227 u64 tcamy
, tcamx
, val
;
1228 u32 cls_lo
, cls_hi
, ctl
;
1231 if (chip_ver
> CHELSIO_T5
) {
1232 /* CtlCmdType - 0: Read, 1: Write
1233 * CtlTcamSel - 0: TCAM0, 1: TCAM1
1234 * CtlXYBitSel- 0: Y bit, 1: X bit
1238 ctl
= CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0);
1240 ctl
|= CTLTCAMINDEX_V(idx
) | CTLTCAMSEL_V(0);
1242 ctl
|= CTLTCAMINDEX_V(idx
- 256) |
1244 t4_write_reg(adap
, MPS_CLS_TCAM_DATA2_CTL_A
, ctl
);
1245 val
= t4_read_reg(adap
, MPS_CLS_TCAM_DATA1_A
);
1246 tcamy
= DMACH_G(val
) << 32;
1247 tcamy
|= t4_read_reg(adap
, MPS_CLS_TCAM_DATA0_A
);
1249 /* Read tcamx. Change the control param */
1250 ctl
|= CTLXYBITSEL_V(1);
1251 t4_write_reg(adap
, MPS_CLS_TCAM_DATA2_CTL_A
, ctl
);
1252 val
= t4_read_reg(adap
, MPS_CLS_TCAM_DATA1_A
);
1253 tcamx
= DMACH_G(val
) << 32;
1254 tcamx
|= t4_read_reg(adap
, MPS_CLS_TCAM_DATA0_A
);
1256 tcamy
= t4_read_reg64(adap
, MPS_CLS_TCAM_Y_L(idx
));
1257 tcamx
= t4_read_reg64(adap
, MPS_CLS_TCAM_X_L(idx
));
1260 cls_lo
= t4_read_reg(adap
, MPS_CLS_SRAM_L(idx
));
1261 cls_hi
= t4_read_reg(adap
, MPS_CLS_SRAM_H(idx
));
1263 if (tcamx
& tcamy
) {
1264 seq_printf(seq
, "%3u -\n", idx
);
1268 rplc
[0] = rplc
[1] = rplc
[2] = rplc
[3] = 0;
1269 if (chip_ver
> CHELSIO_T5
)
1270 replicate
= (cls_lo
& T6_REPLICATE_F
);
1272 replicate
= (cls_lo
& REPLICATE_F
);
1275 struct fw_ldst_cmd ldst_cmd
;
1277 struct fw_ldst_mps_rplc mps_rplc
;
1280 memset(&ldst_cmd
, 0, sizeof(ldst_cmd
));
1282 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS
);
1283 ldst_cmd
.op_to_addrspace
=
1284 htonl(FW_CMD_OP_V(FW_LDST_CMD
) |
1288 ldst_cmd
.cycles_to_len16
= htonl(FW_LEN16(ldst_cmd
));
1289 ldst_cmd
.u
.mps
.rplc
.fid_idx
=
1290 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC
) |
1291 FW_LDST_CMD_IDX_V(idx
));
1292 ret
= t4_wr_mbox(adap
, adap
->mbox
, &ldst_cmd
,
1293 sizeof(ldst_cmd
), &ldst_cmd
);
1295 dev_warn(adap
->pdev_dev
, "Can't read MPS "
1296 "replication map for idx %d: %d\n",
1299 mps_rplc
= ldst_cmd
.u
.mps
.rplc
;
1300 rplc
[0] = ntohl(mps_rplc
.rplc31_0
);
1301 rplc
[1] = ntohl(mps_rplc
.rplc63_32
);
1302 rplc
[2] = ntohl(mps_rplc
.rplc95_64
);
1303 rplc
[3] = ntohl(mps_rplc
.rplc127_96
);
1304 if (adap
->params
.arch
.mps_rplc_size
> 128) {
1305 rplc
[4] = ntohl(mps_rplc
.rplc159_128
);
1306 rplc
[5] = ntohl(mps_rplc
.rplc191_160
);
1307 rplc
[6] = ntohl(mps_rplc
.rplc223_192
);
1308 rplc
[7] = ntohl(mps_rplc
.rplc255_224
);
1313 tcamxy2valmask(tcamx
, tcamy
, addr
, &mask
);
1314 if (chip_ver
> CHELSIO_T5
)
1315 seq_printf(seq
, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1316 "%012llx%3c %#x%4u%4d",
1317 idx
, addr
[0], addr
[1], addr
[2], addr
[3],
1318 addr
[4], addr
[5], (unsigned long long)mask
,
1319 (cls_lo
& T6_SRAM_VLD_F
) ? 'Y' : 'N',
1322 (cls_lo
& T6_VF_VALID_F
) ?
1323 T6_VF_G(cls_lo
) : -1);
1325 seq_printf(seq
, "%3u %02x:%02x:%02x:%02x:%02x:%02x "
1326 "%012llx%3c %#x%4u%4d",
1327 idx
, addr
[0], addr
[1], addr
[2], addr
[3],
1328 addr
[4], addr
[5], (unsigned long long)mask
,
1329 (cls_lo
& SRAM_VLD_F
) ? 'Y' : 'N',
1332 (cls_lo
& VF_VALID_F
) ? VF_G(cls_lo
) : -1);
1335 if (adap
->params
.arch
.mps_rplc_size
> 128)
1336 seq_printf(seq
, " %08x %08x %08x %08x "
1337 "%08x %08x %08x %08x",
1338 rplc
[7], rplc
[6], rplc
[5], rplc
[4],
1339 rplc
[3], rplc
[2], rplc
[1], rplc
[0]);
1341 seq_printf(seq
, " %08x %08x %08x %08x",
1342 rplc
[3], rplc
[2], rplc
[1], rplc
[0]);
1344 if (adap
->params
.arch
.mps_rplc_size
> 128)
1345 seq_printf(seq
, "%72c", ' ');
1347 seq_printf(seq
, "%36c", ' ');
1350 if (chip_ver
> CHELSIO_T5
)
1351 seq_printf(seq
, "%4u%3u%3u%3u %#x\n",
1352 T6_SRAM_PRIO0_G(cls_lo
),
1353 T6_SRAM_PRIO1_G(cls_lo
),
1354 T6_SRAM_PRIO2_G(cls_lo
),
1355 T6_SRAM_PRIO3_G(cls_lo
),
1356 (cls_lo
>> T6_MULTILISTEN0_S
) & 0xf);
1358 seq_printf(seq
, "%4u%3u%3u%3u %#x\n",
1359 SRAM_PRIO0_G(cls_lo
), SRAM_PRIO1_G(cls_lo
),
1360 SRAM_PRIO2_G(cls_lo
), SRAM_PRIO3_G(cls_lo
),
1361 (cls_lo
>> MULTILISTEN0_S
) & 0xf);
1366 static inline void *mps_tcam_get_idx(struct seq_file
*seq
, loff_t pos
)
1368 struct adapter
*adap
= seq
->private;
1369 int max_mac_addr
= is_t4(adap
->params
.chip
) ?
1370 NUM_MPS_CLS_SRAM_L_INSTANCES
:
1371 NUM_MPS_T5_CLS_SRAM_L_INSTANCES
;
1372 return ((pos
<= max_mac_addr
) ? (void *)(uintptr_t)(pos
+ 1) : NULL
);
1375 static void *mps_tcam_start(struct seq_file
*seq
, loff_t
*pos
)
1377 return *pos
? mps_tcam_get_idx(seq
, *pos
) : SEQ_START_TOKEN
;
1380 static void *mps_tcam_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
1383 return mps_tcam_get_idx(seq
, *pos
);
1386 static void mps_tcam_stop(struct seq_file
*seq
, void *v
)
1390 static const struct seq_operations mps_tcam_seq_ops
= {
1391 .start
= mps_tcam_start
,
1392 .next
= mps_tcam_next
,
1393 .stop
= mps_tcam_stop
,
1394 .show
= mps_tcam_show
1397 static int mps_tcam_open(struct inode
*inode
, struct file
*file
)
1399 int res
= seq_open(file
, &mps_tcam_seq_ops
);
1402 struct seq_file
*seq
= file
->private_data
;
1404 seq
->private = inode
->i_private
;
1409 static const struct file_operations mps_tcam_debugfs_fops
= {
1410 .owner
= THIS_MODULE
,
1411 .open
= mps_tcam_open
,
1413 .llseek
= seq_lseek
,
1414 .release
= seq_release
,
1417 /* Display various sensor information.
1419 static int sensors_show(struct seq_file
*seq
, void *v
)
1421 struct adapter
*adap
= seq
->private;
1422 u32 param
[7], val
[7];
1425 /* Note that if the sensors haven't been initialized and turned on
1426 * we'll get values of 0, so treat those as "<unknown>" ...
1428 param
[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV
) |
1429 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG
) |
1430 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP
));
1431 param
[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV
) |
1432 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG
) |
1433 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD
));
1434 ret
= t4_query_params(adap
, adap
->mbox
, adap
->pf
, 0, 2,
1437 if (ret
< 0 || val
[0] == 0)
1438 seq_puts(seq
, "Temperature: <unknown>\n");
1440 seq_printf(seq
, "Temperature: %dC\n", val
[0]);
1442 if (ret
< 0 || val
[1] == 0)
1443 seq_puts(seq
, "Core VDD: <unknown>\n");
1445 seq_printf(seq
, "Core VDD: %dmV\n", val
[1]);
1450 DEFINE_SIMPLE_DEBUGFS_FILE(sensors
);
1452 #if IS_ENABLED(CONFIG_IPV6)
1453 static int clip_tbl_open(struct inode
*inode
, struct file
*file
)
1455 return single_open(file
, clip_tbl_show
, inode
->i_private
);
1458 static const struct file_operations clip_tbl_debugfs_fops
= {
1459 .owner
= THIS_MODULE
,
1460 .open
= clip_tbl_open
,
1462 .llseek
= seq_lseek
,
1463 .release
= single_release
1470 static int rss_show(struct seq_file
*seq
, void *v
, int idx
)
1474 seq_printf(seq
, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
1475 idx
* 8, entry
[0], entry
[1], entry
[2], entry
[3], entry
[4],
1476 entry
[5], entry
[6], entry
[7]);
1480 static int rss_open(struct inode
*inode
, struct file
*file
)
1484 struct adapter
*adap
= inode
->i_private
;
1486 p
= seq_open_tab(file
, RSS_NENTRIES
/ 8, 8 * sizeof(u16
), 0, rss_show
);
1490 ret
= t4_read_rss(adap
, (u16
*)p
->data
);
1492 seq_release_private(inode
, file
);
1497 static const struct file_operations rss_debugfs_fops
= {
1498 .owner
= THIS_MODULE
,
1501 .llseek
= seq_lseek
,
1502 .release
= seq_release_private
1505 /* RSS Configuration.
1508 /* Small utility function to return the strings "yes" or "no" if the supplied
1509 * argument is non-zero.
1511 static const char *yesno(int x
)
1513 static const char *yes
= "yes";
1514 static const char *no
= "no";
1516 return x
? yes
: no
;
1519 static int rss_config_show(struct seq_file
*seq
, void *v
)
1521 struct adapter
*adapter
= seq
->private;
1522 static const char * const keymode
[] = {
1524 "global and per-VF scramble",
1525 "per-PF and per-VF scramble",
1526 "per-VF and per-VF scramble",
1530 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_A
);
1531 seq_printf(seq
, "TP_RSS_CONFIG: %#x\n", rssconf
);
1532 seq_printf(seq
, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf
&
1534 seq_printf(seq
, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf
&
1536 seq_printf(seq
, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf
&
1538 seq_printf(seq
, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf
&
1540 seq_printf(seq
, " TnlTcpSel: %3s\n", yesno(rssconf
& TNLTCPSEL_F
));
1541 seq_printf(seq
, " TnlIp6Sel: %3s\n", yesno(rssconf
& TNLIP6SEL_F
));
1542 seq_printf(seq
, " TnlVrtSel: %3s\n", yesno(rssconf
& TNLVRTSEL_F
));
1543 seq_printf(seq
, " TnlMapEn: %3s\n", yesno(rssconf
& TNLMAPEN_F
));
1544 seq_printf(seq
, " OfdHashSave: %3s\n", yesno(rssconf
&
1546 seq_printf(seq
, " OfdVrtSel: %3s\n", yesno(rssconf
& OFDVRTSEL_F
));
1547 seq_printf(seq
, " OfdMapEn: %3s\n", yesno(rssconf
& OFDMAPEN_F
));
1548 seq_printf(seq
, " OfdLkpEn: %3s\n", yesno(rssconf
& OFDLKPEN_F
));
1549 seq_printf(seq
, " Syn4TupEnIpv6: %3s\n", yesno(rssconf
&
1551 seq_printf(seq
, " Syn2TupEnIpv6: %3s\n", yesno(rssconf
&
1553 seq_printf(seq
, " Syn4TupEnIpv4: %3s\n", yesno(rssconf
&
1555 seq_printf(seq
, " Syn2TupEnIpv4: %3s\n", yesno(rssconf
&
1557 seq_printf(seq
, " Syn4TupEnIpv6: %3s\n", yesno(rssconf
&
1559 seq_printf(seq
, " SynIp6Sel: %3s\n", yesno(rssconf
& SYNIP6SEL_F
));
1560 seq_printf(seq
, " SynVrt6Sel: %3s\n", yesno(rssconf
& SYNVRTSEL_F
));
1561 seq_printf(seq
, " SynMapEn: %3s\n", yesno(rssconf
& SYNMAPEN_F
));
1562 seq_printf(seq
, " SynLkpEn: %3s\n", yesno(rssconf
& SYNLKPEN_F
));
1563 seq_printf(seq
, " ChnEn: %3s\n", yesno(rssconf
&
1565 seq_printf(seq
, " PrtEn: %3s\n", yesno(rssconf
&
1567 seq_printf(seq
, " TnlAllLkp: %3s\n", yesno(rssconf
&
1569 seq_printf(seq
, " VrtEn: %3s\n", yesno(rssconf
&
1571 seq_printf(seq
, " CngEn: %3s\n", yesno(rssconf
&
1572 CONGESTIONENABLE_F
));
1573 seq_printf(seq
, " HashToeplitz: %3s\n", yesno(rssconf
&
1575 seq_printf(seq
, " Udp4En: %3s\n", yesno(rssconf
& UDPENABLE_F
));
1576 seq_printf(seq
, " Disable: %3s\n", yesno(rssconf
& DISABLE_F
));
1578 seq_puts(seq
, "\n");
1580 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_TNL_A
);
1581 seq_printf(seq
, "TP_RSS_CONFIG_TNL: %#x\n", rssconf
);
1582 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
1583 seq_printf(seq
, " MaskFilter: %3d\n", MASKFILTER_G(rssconf
));
1584 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) > CHELSIO_T5
) {
1585 seq_printf(seq
, " HashAll: %3s\n",
1586 yesno(rssconf
& HASHALL_F
));
1587 seq_printf(seq
, " HashEth: %3s\n",
1588 yesno(rssconf
& HASHETH_F
));
1590 seq_printf(seq
, " UseWireCh: %3s\n", yesno(rssconf
& USEWIRECH_F
));
1592 seq_puts(seq
, "\n");
1594 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_OFD_A
);
1595 seq_printf(seq
, "TP_RSS_CONFIG_OFD: %#x\n", rssconf
);
1596 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
1597 seq_printf(seq
, " RRCplMapEn: %3s\n", yesno(rssconf
&
1599 seq_printf(seq
, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf
));
1601 seq_puts(seq
, "\n");
1603 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_SYN_A
);
1604 seq_printf(seq
, "TP_RSS_CONFIG_SYN: %#x\n", rssconf
);
1605 seq_printf(seq
, " MaskSize: %3d\n", MASKSIZE_G(rssconf
));
1606 seq_printf(seq
, " UseWireCh: %3s\n", yesno(rssconf
& USEWIRECH_F
));
1608 seq_puts(seq
, "\n");
1610 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_VRT_A
);
1611 seq_printf(seq
, "TP_RSS_CONFIG_VRT: %#x\n", rssconf
);
1612 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) > CHELSIO_T5
) {
1613 seq_printf(seq
, " KeyWrAddrX: %3d\n",
1614 KEYWRADDRX_G(rssconf
));
1615 seq_printf(seq
, " KeyExtend: %3s\n",
1616 yesno(rssconf
& KEYEXTEND_F
));
1618 seq_printf(seq
, " VfRdRg: %3s\n", yesno(rssconf
& VFRDRG_F
));
1619 seq_printf(seq
, " VfRdEn: %3s\n", yesno(rssconf
& VFRDEN_F
));
1620 seq_printf(seq
, " VfPerrEn: %3s\n", yesno(rssconf
& VFPERREN_F
));
1621 seq_printf(seq
, " KeyPerrEn: %3s\n", yesno(rssconf
& KEYPERREN_F
));
1622 seq_printf(seq
, " DisVfVlan: %3s\n", yesno(rssconf
&
1624 seq_printf(seq
, " EnUpSwt: %3s\n", yesno(rssconf
& ENABLEUP0_F
));
1625 seq_printf(seq
, " HashDelay: %3d\n", HASHDELAY_G(rssconf
));
1626 if (CHELSIO_CHIP_VERSION(adapter
->params
.chip
) <= CHELSIO_T5
)
1627 seq_printf(seq
, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf
));
1629 seq_printf(seq
, " VfWrAddr: %3d\n",
1630 T6_VFWRADDR_G(rssconf
));
1631 seq_printf(seq
, " KeyMode: %s\n", keymode
[KEYMODE_G(rssconf
)]);
1632 seq_printf(seq
, " VfWrEn: %3s\n", yesno(rssconf
& VFWREN_F
));
1633 seq_printf(seq
, " KeyWrEn: %3s\n", yesno(rssconf
& KEYWREN_F
));
1634 seq_printf(seq
, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf
));
1636 seq_puts(seq
, "\n");
1638 rssconf
= t4_read_reg(adapter
, TP_RSS_CONFIG_CNG_A
);
1639 seq_printf(seq
, "TP_RSS_CONFIG_CNG: %#x\n", rssconf
);
1640 seq_printf(seq
, " ChnCount3: %3s\n", yesno(rssconf
& CHNCOUNT3_F
));
1641 seq_printf(seq
, " ChnCount2: %3s\n", yesno(rssconf
& CHNCOUNT2_F
));
1642 seq_printf(seq
, " ChnCount1: %3s\n", yesno(rssconf
& CHNCOUNT1_F
));
1643 seq_printf(seq
, " ChnCount0: %3s\n", yesno(rssconf
& CHNCOUNT0_F
));
1644 seq_printf(seq
, " ChnUndFlow3: %3s\n", yesno(rssconf
&
1646 seq_printf(seq
, " ChnUndFlow2: %3s\n", yesno(rssconf
&
1648 seq_printf(seq
, " ChnUndFlow1: %3s\n", yesno(rssconf
&
1650 seq_printf(seq
, " ChnUndFlow0: %3s\n", yesno(rssconf
&
1652 seq_printf(seq
, " RstChn3: %3s\n", yesno(rssconf
& RSTCHN3_F
));
1653 seq_printf(seq
, " RstChn2: %3s\n", yesno(rssconf
& RSTCHN2_F
));
1654 seq_printf(seq
, " RstChn1: %3s\n", yesno(rssconf
& RSTCHN1_F
));
1655 seq_printf(seq
, " RstChn0: %3s\n", yesno(rssconf
& RSTCHN0_F
));
1656 seq_printf(seq
, " UpdVld: %3s\n", yesno(rssconf
& UPDVLD_F
));
1657 seq_printf(seq
, " Xoff: %3s\n", yesno(rssconf
& XOFF_F
));
1658 seq_printf(seq
, " UpdChn3: %3s\n", yesno(rssconf
& UPDCHN3_F
));
1659 seq_printf(seq
, " UpdChn2: %3s\n", yesno(rssconf
& UPDCHN2_F
));
1660 seq_printf(seq
, " UpdChn1: %3s\n", yesno(rssconf
& UPDCHN1_F
));
1661 seq_printf(seq
, " UpdChn0: %3s\n", yesno(rssconf
& UPDCHN0_F
));
1662 seq_printf(seq
, " Queue: %3d\n", QUEUE_G(rssconf
));
1667 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config
);
1672 static int rss_key_show(struct seq_file
*seq
, void *v
)
1676 t4_read_rss_key(seq
->private, key
);
1677 seq_printf(seq
, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
1678 key
[9], key
[8], key
[7], key
[6], key
[5], key
[4], key
[3],
1679 key
[2], key
[1], key
[0]);
1683 static int rss_key_open(struct inode
*inode
, struct file
*file
)
1685 return single_open(file
, rss_key_show
, inode
->i_private
);
1688 static ssize_t
rss_key_write(struct file
*file
, const char __user
*buf
,
1689 size_t count
, loff_t
*pos
)
1694 struct adapter
*adap
= file_inode(file
)->i_private
;
1696 if (count
> sizeof(s
) - 1)
1698 if (copy_from_user(s
, buf
, count
))
1700 for (i
= count
; i
> 0 && isspace(s
[i
- 1]); i
--)
1704 for (p
= s
, i
= 9; i
>= 0; i
--) {
1706 for (j
= 0; j
< 8; j
++, p
++) {
1709 key
[i
] = (key
[i
] << 4) | hex2val(*p
);
1713 t4_write_rss_key(adap
, key
, -1);
1717 static const struct file_operations rss_key_debugfs_fops
= {
1718 .owner
= THIS_MODULE
,
1719 .open
= rss_key_open
,
1721 .llseek
= seq_lseek
,
1722 .release
= single_release
,
1723 .write
= rss_key_write
1726 /* PF RSS Configuration.
1729 struct rss_pf_conf
{
1735 static int rss_pf_config_show(struct seq_file
*seq
, void *v
, int idx
)
1737 struct rss_pf_conf
*pfconf
;
1739 if (v
== SEQ_START_TOKEN
) {
1740 /* use the 0th entry to dump the PF Map Index Size */
1741 pfconf
= seq
->private + offsetof(struct seq_tab
, data
);
1742 seq_printf(seq
, "PF Map Index Size = %d\n\n",
1743 LKPIDXSIZE_G(pfconf
->rss_pf_map
));
1745 seq_puts(seq
, " RSS PF VF Hash Tuple Enable Default\n");
1746 seq_puts(seq
, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
1747 seq_puts(seq
, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
1749 #define G_PFnLKPIDX(map, n) \
1750 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1751 #define G_PFnMSKSIZE(mask, n) \
1752 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1755 seq_printf(seq
, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
1757 yesno(pfconf
->rss_pf_config
& MAPENABLE_F
),
1758 yesno(pfconf
->rss_pf_config
& CHNENABLE_F
),
1759 yesno(pfconf
->rss_pf_config
& PRTENABLE_F
),
1760 G_PFnLKPIDX(pfconf
->rss_pf_map
, idx
),
1761 G_PFnMSKSIZE(pfconf
->rss_pf_mask
, idx
),
1762 IVFWIDTH_G(pfconf
->rss_pf_config
),
1763 yesno(pfconf
->rss_pf_config
& IP6FOURTUPEN_F
),
1764 yesno(pfconf
->rss_pf_config
& IP6TWOTUPEN_F
),
1765 yesno(pfconf
->rss_pf_config
& IP4FOURTUPEN_F
),
1766 yesno(pfconf
->rss_pf_config
& IP4TWOTUPEN_F
),
1767 yesno(pfconf
->rss_pf_config
& UDPFOURTUPEN_F
),
1768 CH1DEFAULTQUEUE_G(pfconf
->rss_pf_config
),
1769 CH0DEFAULTQUEUE_G(pfconf
->rss_pf_config
));
1777 static int rss_pf_config_open(struct inode
*inode
, struct file
*file
)
1779 struct adapter
*adapter
= inode
->i_private
;
1781 u32 rss_pf_map
, rss_pf_mask
;
1782 struct rss_pf_conf
*pfconf
;
1785 p
= seq_open_tab(file
, 8, sizeof(*pfconf
), 1, rss_pf_config_show
);
1789 pfconf
= (struct rss_pf_conf
*)p
->data
;
1790 rss_pf_map
= t4_read_rss_pf_map(adapter
);
1791 rss_pf_mask
= t4_read_rss_pf_mask(adapter
);
1792 for (pf
= 0; pf
< 8; pf
++) {
1793 pfconf
[pf
].rss_pf_map
= rss_pf_map
;
1794 pfconf
[pf
].rss_pf_mask
= rss_pf_mask
;
1795 t4_read_rss_pf_config(adapter
, pf
, &pfconf
[pf
].rss_pf_config
);
1800 static const struct file_operations rss_pf_config_debugfs_fops
= {
1801 .owner
= THIS_MODULE
,
1802 .open
= rss_pf_config_open
,
1804 .llseek
= seq_lseek
,
1805 .release
= seq_release_private
1808 /* VF RSS Configuration.
1811 struct rss_vf_conf
{
1816 static int rss_vf_config_show(struct seq_file
*seq
, void *v
, int idx
)
1818 if (v
== SEQ_START_TOKEN
) {
1819 seq_puts(seq
, " RSS Hash Tuple Enable\n");
1820 seq_puts(seq
, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
1821 seq_puts(seq
, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
1823 struct rss_vf_conf
*vfconf
= v
;
1825 seq_printf(seq
, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
1827 yesno(vfconf
->rss_vf_vfh
& VFCHNEN_F
),
1828 yesno(vfconf
->rss_vf_vfh
& VFPRTEN_F
),
1829 VFLKPIDX_G(vfconf
->rss_vf_vfh
),
1830 yesno(vfconf
->rss_vf_vfh
& VFVLNEX_F
),
1831 yesno(vfconf
->rss_vf_vfh
& VFUPEN_F
),
1832 yesno(vfconf
->rss_vf_vfh
& VFIP4FOURTUPEN_F
),
1833 yesno(vfconf
->rss_vf_vfh
& VFIP6TWOTUPEN_F
),
1834 yesno(vfconf
->rss_vf_vfh
& VFIP4FOURTUPEN_F
),
1835 yesno(vfconf
->rss_vf_vfh
& VFIP4TWOTUPEN_F
),
1836 yesno(vfconf
->rss_vf_vfh
& ENABLEUDPHASH_F
),
1837 DEFAULTQUEUE_G(vfconf
->rss_vf_vfh
),
1838 KEYINDEX_G(vfconf
->rss_vf_vfh
),
1839 vfconf
->rss_vf_vfl
);
1844 static int rss_vf_config_open(struct inode
*inode
, struct file
*file
)
1846 struct adapter
*adapter
= inode
->i_private
;
1848 struct rss_vf_conf
*vfconf
;
1849 int vf
, vfcount
= adapter
->params
.arch
.vfcount
;
1851 p
= seq_open_tab(file
, vfcount
, sizeof(*vfconf
), 1, rss_vf_config_show
);
1855 vfconf
= (struct rss_vf_conf
*)p
->data
;
1856 for (vf
= 0; vf
< vfcount
; vf
++) {
1857 t4_read_rss_vf_config(adapter
, vf
, &vfconf
[vf
].rss_vf_vfl
,
1858 &vfconf
[vf
].rss_vf_vfh
);
1863 static const struct file_operations rss_vf_config_debugfs_fops
= {
1864 .owner
= THIS_MODULE
,
1865 .open
= rss_vf_config_open
,
1867 .llseek
= seq_lseek
,
1868 .release
= seq_release_private
1872 * ethqset2pinfo - return port_info of an Ethernet Queue Set
1873 * @adap: the adapter
1874 * @qset: Ethernet Queue Set
1876 static inline struct port_info
*ethqset2pinfo(struct adapter
*adap
, int qset
)
1880 for_each_port(adap
, pidx
) {
1881 struct port_info
*pi
= adap2pinfo(adap
, pidx
);
1883 if (qset
>= pi
->first_qset
&&
1884 qset
< pi
->first_qset
+ pi
->nqsets
)
1888 /* should never happen! */
1893 static int sge_qinfo_show(struct seq_file
*seq
, void *v
)
1895 struct adapter
*adap
= seq
->private;
1896 int eth_entries
= DIV_ROUND_UP(adap
->sge
.ethqsets
, 4);
1897 int toe_entries
= DIV_ROUND_UP(adap
->sge
.ofldqsets
, 4);
1898 int rdma_entries
= DIV_ROUND_UP(adap
->sge
.rdmaqs
, 4);
1899 int ciq_entries
= DIV_ROUND_UP(adap
->sge
.rdmaciqs
, 4);
1900 int ctrl_entries
= DIV_ROUND_UP(MAX_CTRL_QUEUES
, 4);
1901 int i
, r
= (uintptr_t)v
- 1;
1902 int toe_idx
= r
- eth_entries
;
1903 int rdma_idx
= toe_idx
- toe_entries
;
1904 int ciq_idx
= rdma_idx
- rdma_entries
;
1905 int ctrl_idx
= ciq_idx
- ciq_entries
;
1906 int fq_idx
= ctrl_idx
- ctrl_entries
;
1909 seq_putc(seq
, '\n');
1911 #define S3(fmt_spec, s, v) \
1913 seq_printf(seq, "%-12s", s); \
1914 for (i = 0; i < n; ++i) \
1915 seq_printf(seq, " %16" fmt_spec, v); \
1916 seq_putc(seq, '\n'); \
1918 #define S(s, v) S3("s", s, v)
1919 #define T(s, v) S3("u", s, tx[i].v)
1920 #define R(s, v) S3("u", s, rx[i].v)
1922 if (r
< eth_entries
) {
1923 int base_qset
= r
* 4;
1924 const struct sge_eth_rxq
*rx
= &adap
->sge
.ethrxq
[base_qset
];
1925 const struct sge_eth_txq
*tx
= &adap
->sge
.ethtxq
[base_qset
];
1926 int n
= min(4, adap
->sge
.ethqsets
- 4 * r
);
1928 S("QType:", "Ethernet");
1930 rx
[i
].rspq
.netdev
? rx
[i
].rspq
.netdev
->name
: "N/A");
1931 T("TxQ ID:", q
.cntxt_id
);
1932 T("TxQ size:", q
.size
);
1933 T("TxQ inuse:", q
.in_use
);
1934 T("TxQ CIDX:", q
.cidx
);
1935 T("TxQ PIDX:", q
.pidx
);
1936 #ifdef CONFIG_CHELSIO_T4_DCB
1937 T("DCB Prio:", dcb_prio
);
1938 S3("u", "DCB PGID:",
1939 (ethqset2pinfo(adap
, base_qset
+ i
)->dcb
.pgid
>>
1940 4*(7-tx
[i
].dcb_prio
)) & 0xf);
1942 (ethqset2pinfo(adap
, base_qset
+ i
)->dcb
.pfcen
>>
1943 1*(7-tx
[i
].dcb_prio
)) & 0x1);
1945 R("RspQ ID:", rspq
.abs_id
);
1946 R("RspQ size:", rspq
.size
);
1947 R("RspQE size:", rspq
.iqe_len
);
1948 R("RspQ CIDX:", rspq
.cidx
);
1949 R("RspQ Gen:", rspq
.gen
);
1950 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1951 S3("u", "Intr pktcnt:",
1952 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1953 R("FL ID:", fl
.cntxt_id
);
1954 R("FL size:", fl
.size
- 8);
1955 R("FL pend:", fl
.pend_cred
);
1956 R("FL avail:", fl
.avail
);
1957 R("FL PIDX:", fl
.pidx
);
1958 R("FL CIDX:", fl
.cidx
);
1959 } else if (toe_idx
< toe_entries
) {
1960 const struct sge_ofld_rxq
*rx
= &adap
->sge
.ofldrxq
[toe_idx
* 4];
1961 const struct sge_ofld_txq
*tx
= &adap
->sge
.ofldtxq
[toe_idx
* 4];
1962 int n
= min(4, adap
->sge
.ofldqsets
- 4 * toe_idx
);
1965 T("TxQ ID:", q
.cntxt_id
);
1966 T("TxQ size:", q
.size
);
1967 T("TxQ inuse:", q
.in_use
);
1968 T("TxQ CIDX:", q
.cidx
);
1969 T("TxQ PIDX:", q
.pidx
);
1970 R("RspQ ID:", rspq
.abs_id
);
1971 R("RspQ size:", rspq
.size
);
1972 R("RspQE size:", rspq
.iqe_len
);
1973 R("RspQ CIDX:", rspq
.cidx
);
1974 R("RspQ Gen:", rspq
.gen
);
1975 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1976 S3("u", "Intr pktcnt:",
1977 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
1978 R("FL ID:", fl
.cntxt_id
);
1979 R("FL size:", fl
.size
- 8);
1980 R("FL pend:", fl
.pend_cred
);
1981 R("FL avail:", fl
.avail
);
1982 R("FL PIDX:", fl
.pidx
);
1983 R("FL CIDX:", fl
.cidx
);
1984 } else if (rdma_idx
< rdma_entries
) {
1985 const struct sge_ofld_rxq
*rx
=
1986 &adap
->sge
.rdmarxq
[rdma_idx
* 4];
1987 int n
= min(4, adap
->sge
.rdmaqs
- 4 * rdma_idx
);
1989 S("QType:", "RDMA-CPL");
1991 rx
[i
].rspq
.netdev
? rx
[i
].rspq
.netdev
->name
: "N/A");
1992 R("RspQ ID:", rspq
.abs_id
);
1993 R("RspQ size:", rspq
.size
);
1994 R("RspQE size:", rspq
.iqe_len
);
1995 R("RspQ CIDX:", rspq
.cidx
);
1996 R("RspQ Gen:", rspq
.gen
);
1997 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
1998 S3("u", "Intr pktcnt:",
1999 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
2000 R("FL ID:", fl
.cntxt_id
);
2001 R("FL size:", fl
.size
- 8);
2002 R("FL pend:", fl
.pend_cred
);
2003 R("FL avail:", fl
.avail
);
2004 R("FL PIDX:", fl
.pidx
);
2005 R("FL CIDX:", fl
.cidx
);
2006 } else if (ciq_idx
< ciq_entries
) {
2007 const struct sge_ofld_rxq
*rx
= &adap
->sge
.rdmaciq
[ciq_idx
* 4];
2008 int n
= min(4, adap
->sge
.rdmaciqs
- 4 * ciq_idx
);
2010 S("QType:", "RDMA-CIQ");
2012 rx
[i
].rspq
.netdev
? rx
[i
].rspq
.netdev
->name
: "N/A");
2013 R("RspQ ID:", rspq
.abs_id
);
2014 R("RspQ size:", rspq
.size
);
2015 R("RspQE size:", rspq
.iqe_len
);
2016 R("RspQ CIDX:", rspq
.cidx
);
2017 R("RspQ Gen:", rspq
.gen
);
2018 S3("u", "Intr delay:", qtimer_val(adap
, &rx
[i
].rspq
));
2019 S3("u", "Intr pktcnt:",
2020 adap
->sge
.counter_val
[rx
[i
].rspq
.pktcnt_idx
]);
2021 } else if (ctrl_idx
< ctrl_entries
) {
2022 const struct sge_ctrl_txq
*tx
= &adap
->sge
.ctrlq
[ctrl_idx
* 4];
2023 int n
= min(4, adap
->params
.nports
- 4 * ctrl_idx
);
2025 S("QType:", "Control");
2026 T("TxQ ID:", q
.cntxt_id
);
2027 T("TxQ size:", q
.size
);
2028 T("TxQ inuse:", q
.in_use
);
2029 T("TxQ CIDX:", q
.cidx
);
2030 T("TxQ PIDX:", q
.pidx
);
2031 } else if (fq_idx
== 0) {
2032 const struct sge_rspq
*evtq
= &adap
->sge
.fw_evtq
;
2034 seq_printf(seq
, "%-12s %16s\n", "QType:", "FW event queue");
2035 seq_printf(seq
, "%-12s %16u\n", "RspQ ID:", evtq
->abs_id
);
2036 seq_printf(seq
, "%-12s %16u\n", "RspQ size:", evtq
->size
);
2037 seq_printf(seq
, "%-12s %16u\n", "RspQE size:", evtq
->iqe_len
);
2038 seq_printf(seq
, "%-12s %16u\n", "RspQ CIDX:", evtq
->cidx
);
2039 seq_printf(seq
, "%-12s %16u\n", "RspQ Gen:", evtq
->gen
);
2040 seq_printf(seq
, "%-12s %16u\n", "Intr delay:",
2041 qtimer_val(adap
, evtq
));
2042 seq_printf(seq
, "%-12s %16u\n", "Intr pktcnt:",
2043 adap
->sge
.counter_val
[evtq
->pktcnt_idx
]);
2052 static int sge_queue_entries(const struct adapter
*adap
)
2054 return DIV_ROUND_UP(adap
->sge
.ethqsets
, 4) +
2055 DIV_ROUND_UP(adap
->sge
.ofldqsets
, 4) +
2056 DIV_ROUND_UP(adap
->sge
.rdmaqs
, 4) +
2057 DIV_ROUND_UP(adap
->sge
.rdmaciqs
, 4) +
2058 DIV_ROUND_UP(MAX_CTRL_QUEUES
, 4) + 1;
2061 static void *sge_queue_start(struct seq_file
*seq
, loff_t
*pos
)
2063 int entries
= sge_queue_entries(seq
->private);
2065 return *pos
< entries
? (void *)((uintptr_t)*pos
+ 1) : NULL
;
2068 static void sge_queue_stop(struct seq_file
*seq
, void *v
)
2072 static void *sge_queue_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
2074 int entries
= sge_queue_entries(seq
->private);
2077 return *pos
< entries
? (void *)((uintptr_t)*pos
+ 1) : NULL
;
2080 static const struct seq_operations sge_qinfo_seq_ops
= {
2081 .start
= sge_queue_start
,
2082 .next
= sge_queue_next
,
2083 .stop
= sge_queue_stop
,
2084 .show
= sge_qinfo_show
2087 static int sge_qinfo_open(struct inode
*inode
, struct file
*file
)
2089 int res
= seq_open(file
, &sge_qinfo_seq_ops
);
2092 struct seq_file
*seq
= file
->private_data
;
2094 seq
->private = inode
->i_private
;
2099 static const struct file_operations sge_qinfo_debugfs_fops
= {
2100 .owner
= THIS_MODULE
,
2101 .open
= sge_qinfo_open
,
2103 .llseek
= seq_lseek
,
2104 .release
= seq_release
,
2107 int mem_open(struct inode
*inode
, struct file
*file
)
2110 struct adapter
*adap
;
2112 file
->private_data
= inode
->i_private
;
2114 mem
= (uintptr_t)file
->private_data
& 0x3;
2115 adap
= file
->private_data
- mem
;
2117 (void)t4_fwcache(adap
, FW_PARAM_DEV_FWCACHE_FLUSH
);
2122 static ssize_t
mem_read(struct file
*file
, char __user
*buf
, size_t count
,
2126 loff_t avail
= file_inode(file
)->i_size
;
2127 unsigned int mem
= (uintptr_t)file
->private_data
& 3;
2128 struct adapter
*adap
= file
->private_data
- mem
;
2136 if (count
> avail
- pos
)
2137 count
= avail
- pos
;
2139 data
= t4_alloc_mem(count
);
2143 spin_lock(&adap
->win0_lock
);
2144 ret
= t4_memory_rw(adap
, 0, mem
, pos
, count
, data
, T4_MEMORY_READ
);
2145 spin_unlock(&adap
->win0_lock
);
2150 ret
= copy_to_user(buf
, data
, count
);
2156 *ppos
= pos
+ count
;
2159 static const struct file_operations mem_debugfs_fops
= {
2160 .owner
= THIS_MODULE
,
2161 .open
= simple_open
,
2163 .llseek
= default_llseek
,
2166 static void add_debugfs_mem(struct adapter
*adap
, const char *name
,
2167 unsigned int idx
, unsigned int size_mb
)
2169 debugfs_create_file_size(name
, S_IRUSR
, adap
->debugfs_root
,
2170 (void *)adap
+ idx
, &mem_debugfs_fops
,
2174 static int blocked_fl_open(struct inode
*inode
, struct file
*file
)
2176 file
->private_data
= inode
->i_private
;
2180 static ssize_t
blocked_fl_read(struct file
*filp
, char __user
*ubuf
,
2181 size_t count
, loff_t
*ppos
)
2184 const struct adapter
*adap
= filp
->private_data
;
2186 ssize_t size
= (adap
->sge
.egr_sz
+ 3) / 4 +
2187 adap
->sge
.egr_sz
/ 32 + 2; /* includes ,/\n/\0 */
2189 buf
= kzalloc(size
, GFP_KERNEL
);
2193 len
= snprintf(buf
, size
- 1, "%*pb\n",
2194 adap
->sge
.egr_sz
, adap
->sge
.blocked_fl
);
2195 len
+= sprintf(buf
+ len
, "\n");
2196 size
= simple_read_from_buffer(ubuf
, count
, ppos
, buf
, len
);
2201 static ssize_t
blocked_fl_write(struct file
*filp
, const char __user
*ubuf
,
2202 size_t count
, loff_t
*ppos
)
2206 struct adapter
*adap
= filp
->private_data
;
2208 t
= kcalloc(BITS_TO_LONGS(adap
->sge
.egr_sz
), sizeof(long), GFP_KERNEL
);
2212 err
= bitmap_parse_user(ubuf
, count
, t
, adap
->sge
.egr_sz
);
2216 bitmap_copy(adap
->sge
.blocked_fl
, t
, adap
->sge
.egr_sz
);
2221 static const struct file_operations blocked_fl_fops
= {
2222 .owner
= THIS_MODULE
,
2223 .open
= blocked_fl_open
,
2224 .read
= blocked_fl_read
,
2225 .write
= blocked_fl_write
,
2226 .llseek
= generic_file_llseek
,
2229 /* Add an array of Debug FS files.
2231 void add_debugfs_files(struct adapter
*adap
,
2232 struct t4_debugfs_entry
*files
,
2233 unsigned int nfiles
)
2237 /* debugfs support is best effort */
2238 for (i
= 0; i
< nfiles
; i
++)
2239 debugfs_create_file(files
[i
].name
, files
[i
].mode
,
2241 (void *)adap
+ files
[i
].data
,
2245 int t4_setup_debugfs(struct adapter
*adap
)
2251 static struct t4_debugfs_entry t4_debugfs_files
[] = {
2252 { "cim_la", &cim_la_fops
, S_IRUSR
, 0 },
2253 { "cim_pif_la", &cim_pif_la_fops
, S_IRUSR
, 0 },
2254 { "cim_ma_la", &cim_ma_la_fops
, S_IRUSR
, 0 },
2255 { "cim_qcfg", &cim_qcfg_fops
, S_IRUSR
, 0 },
2256 { "clk", &clk_debugfs_fops
, S_IRUSR
, 0 },
2257 { "devlog", &devlog_fops
, S_IRUSR
, 0 },
2258 { "mbox0", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 0 },
2259 { "mbox1", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 1 },
2260 { "mbox2", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 2 },
2261 { "mbox3", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 3 },
2262 { "mbox4", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 4 },
2263 { "mbox5", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 5 },
2264 { "mbox6", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 6 },
2265 { "mbox7", &mbox_debugfs_fops
, S_IRUSR
| S_IWUSR
, 7 },
2266 { "l2t", &t4_l2t_fops
, S_IRUSR
, 0},
2267 { "mps_tcam", &mps_tcam_debugfs_fops
, S_IRUSR
, 0 },
2268 { "rss", &rss_debugfs_fops
, S_IRUSR
, 0 },
2269 { "rss_config", &rss_config_debugfs_fops
, S_IRUSR
, 0 },
2270 { "rss_key", &rss_key_debugfs_fops
, S_IRUSR
, 0 },
2271 { "rss_pf_config", &rss_pf_config_debugfs_fops
, S_IRUSR
, 0 },
2272 { "rss_vf_config", &rss_vf_config_debugfs_fops
, S_IRUSR
, 0 },
2273 { "sge_qinfo", &sge_qinfo_debugfs_fops
, S_IRUSR
, 0 },
2274 { "ibq_tp0", &cim_ibq_fops
, S_IRUSR
, 0 },
2275 { "ibq_tp1", &cim_ibq_fops
, S_IRUSR
, 1 },
2276 { "ibq_ulp", &cim_ibq_fops
, S_IRUSR
, 2 },
2277 { "ibq_sge0", &cim_ibq_fops
, S_IRUSR
, 3 },
2278 { "ibq_sge1", &cim_ibq_fops
, S_IRUSR
, 4 },
2279 { "ibq_ncsi", &cim_ibq_fops
, S_IRUSR
, 5 },
2280 { "obq_ulp0", &cim_obq_fops
, S_IRUSR
, 0 },
2281 { "obq_ulp1", &cim_obq_fops
, S_IRUSR
, 1 },
2282 { "obq_ulp2", &cim_obq_fops
, S_IRUSR
, 2 },
2283 { "obq_ulp3", &cim_obq_fops
, S_IRUSR
, 3 },
2284 { "obq_sge", &cim_obq_fops
, S_IRUSR
, 4 },
2285 { "obq_ncsi", &cim_obq_fops
, S_IRUSR
, 5 },
2286 { "tp_la", &tp_la_fops
, S_IRUSR
, 0 },
2287 { "ulprx_la", &ulprx_la_fops
, S_IRUSR
, 0 },
2288 { "sensors", &sensors_debugfs_fops
, S_IRUSR
, 0 },
2289 { "pm_stats", &pm_stats_debugfs_fops
, S_IRUSR
, 0 },
2290 { "tx_rate", &tx_rate_debugfs_fops
, S_IRUSR
, 0 },
2291 { "cctrl", &cctrl_tbl_debugfs_fops
, S_IRUSR
, 0 },
2292 #if IS_ENABLED(CONFIG_IPV6)
2293 { "clip_tbl", &clip_tbl_debugfs_fops
, S_IRUSR
, 0 },
2295 { "blocked_fl", &blocked_fl_fops
, S_IRUSR
| S_IWUSR
, 0 },
2298 /* Debug FS nodes common to all T5 and later adapters.
2300 static struct t4_debugfs_entry t5_debugfs_files
[] = {
2301 { "obq_sge_rx_q0", &cim_obq_fops
, S_IRUSR
, 6 },
2302 { "obq_sge_rx_q1", &cim_obq_fops
, S_IRUSR
, 7 },
2305 add_debugfs_files(adap
,
2307 ARRAY_SIZE(t4_debugfs_files
));
2308 if (!is_t4(adap
->params
.chip
))
2309 add_debugfs_files(adap
,
2311 ARRAY_SIZE(t5_debugfs_files
));
2313 i
= t4_read_reg(adap
, MA_TARGET_MEM_ENABLE_A
);
2314 if (i
& EDRAM0_ENABLE_F
) {
2315 size
= t4_read_reg(adap
, MA_EDRAM0_BAR_A
);
2316 add_debugfs_mem(adap
, "edc0", MEM_EDC0
, EDRAM0_SIZE_G(size
));
2318 if (i
& EDRAM1_ENABLE_F
) {
2319 size
= t4_read_reg(adap
, MA_EDRAM1_BAR_A
);
2320 add_debugfs_mem(adap
, "edc1", MEM_EDC1
, EDRAM1_SIZE_G(size
));
2322 if (is_t5(adap
->params
.chip
)) {
2323 if (i
& EXT_MEM0_ENABLE_F
) {
2324 size
= t4_read_reg(adap
, MA_EXT_MEMORY0_BAR_A
);
2325 add_debugfs_mem(adap
, "mc0", MEM_MC0
,
2326 EXT_MEM0_SIZE_G(size
));
2328 if (i
& EXT_MEM1_ENABLE_F
) {
2329 size
= t4_read_reg(adap
, MA_EXT_MEMORY1_BAR_A
);
2330 add_debugfs_mem(adap
, "mc1", MEM_MC1
,
2331 EXT_MEM1_SIZE_G(size
));
2334 if (i
& EXT_MEM_ENABLE_F
)
2335 size
= t4_read_reg(adap
, MA_EXT_MEMORY_BAR_A
);
2336 add_debugfs_mem(adap
, "mc", MEM_MC
,
2337 EXT_MEM_SIZE_G(size
));
2340 de
= debugfs_create_file_size("flash", S_IRUSR
, adap
->debugfs_root
, adap
,
2341 &flash_debugfs_fops
, adap
->params
.sf_size
);