drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2014 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum mcc_base_status {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 /* Additional status */
  64 enum mcc_addl_status {
  65         MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
  66         MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
  67         MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a
  68 };
  69
  70 #define CQE_BASE_STATUS_MASK            0xFFFF
  71 #define CQE_BASE_STATUS_SHIFT           0       /* bits 0 - 15 */
  72 #define CQE_ADDL_STATUS_MASK            0xFF
  73 #define CQE_ADDL_STATUS_SHIFT           16      /* bits 16 - 31 */
  74
  75 #define base_status(status)             \
  76                 ((enum mcc_base_status) \
  77                         (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
  78 #define addl_status(status)             \
  79                 ((enum mcc_addl_status) \
  80                         (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
  81                                         CQE_ADDL_STATUS_MASK : 0))
  82
  83 struct be_mcc_compl {
  84         u32 status;             /* dword 0 */
  85         u32 tag0;               /* dword 1 */
  86         u32 tag1;               /* dword 2 */
  87         u32 flags;              /* dword 3 */
  88 };
  89
  90 /* When the async bit of mcc_compl flags is set, flags
  91  * is interpreted as follows:
  92  */
  93 #define ASYNC_EVENT_CODE_SHIFT          8       /* bits 8 - 15 */
  94 #define ASYNC_EVENT_CODE_MASK           0xFF
  95 #define ASYNC_EVENT_TYPE_SHIFT          16
  96 #define ASYNC_EVENT_TYPE_MASK           0xFF
  97 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  98 #define ASYNC_EVENT_CODE_GRP_5          0x5
  99 #define ASYNC_EVENT_QOS_SPEED           0x1
 100 #define ASYNC_EVENT_COS_PRIORITY        0x2
 101 #define ASYNC_EVENT_PVID_STATE          0x3
 102 #define ASYNC_EVENT_CODE_QNQ            0x6
 103 #define ASYNC_DEBUG_EVENT_TYPE_QNQ      1
 104
 105 enum {
 106         LINK_DOWN       = 0x0,
 107         LINK_UP         = 0x1
 108 };
 109 #define LINK_STATUS_MASK                        0x1
 110 #define LOGICAL_LINK_STATUS_MASK                0x2
 111
 112 /* When the event code of compl->flags is link-state, the mcc_compl
 113  * must be interpreted as follows
 114  */
 115 struct be_async_event_link_state {
 116         u8 physical_port;
 117         u8 port_link_status;
 118         u8 port_duplex;
 119         u8 port_speed;
 120         u8 port_fault;
 121         u8 rsvd0[7];
 122         u32 flags;
 123 } __packed;
 124
 125 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
 126  * the mcc_compl must be interpreted as follows
 127  */
 128 struct be_async_event_grp5_qos_link_speed {
 129         u8 physical_port;
 130         u8 rsvd[5];
 131         u16 qos_link_speed;
 132         u32 event_tag;
 133         u32 flags;
 134 } __packed;
 135
 136 /* When the event code of compl->flags is GRP5 and event type is
 137  * CoS-Priority, the mcc_compl must be interpreted as follows
 138  */
 139 struct be_async_event_grp5_cos_priority {
 140         u8 physical_port;
 141         u8 available_priority_bmap;
 142         u8 reco_default_priority;
 143         u8 valid;
 144         u8 rsvd0;
 145         u8 event_tag;
 146         u32 flags;
 147 } __packed;
 148
 149 /* When the event code of compl->flags is GRP5 and event type is
 150  * PVID state, the mcc_compl must be interpreted as follows
 151  */
 152 struct be_async_event_grp5_pvid_state {
 153         u8 enabled;
 154         u8 rsvd0;
 155         u16 tag;
 156         u32 event_tag;
 157         u32 rsvd1;
 158         u32 flags;
 159 } __packed;
 160
 161 /* async event indicating outer VLAN tag in QnQ */
 162 struct be_async_event_qnq {
 163         u8 valid;       /* Indicates if outer VLAN is valid */
 164         u8 rsvd0;
 165         u16 vlan_tag;
 166         u32 event_tag;
 167         u8 rsvd1[4];
 168         u32 flags;
 169 } __packed;
 170
 171 struct be_mcc_mailbox {
 172         struct be_mcc_wrb wrb;
 173         struct be_mcc_compl compl;
 174 };
 175
 176 #define CMD_SUBSYSTEM_COMMON    0x1
 177 #define CMD_SUBSYSTEM_ETH       0x3
 178 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 179
 180 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 181 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 182 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 183 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 184 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 185 #define OPCODE_COMMON_READ_FLASHROM                     6
 186 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 187 #define OPCODE_COMMON_CQ_CREATE                         12
 188 #define OPCODE_COMMON_EQ_CREATE                         13
 189 #define OPCODE_COMMON_MCC_CREATE                        21
 190 #define OPCODE_COMMON_SET_QOS                           28
 191 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 192 #define OPCODE_COMMON_SEEPROM_READ                      30
 193 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 194 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 195 #define OPCODE_COMMON_GET_FW_VERSION                    35
 196 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 197 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 198 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 199 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 200 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 201 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 202 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 203 #define OPCODE_COMMON_MCC_DESTROY                       53
 204 #define OPCODE_COMMON_CQ_DESTROY                        54
 205 #define OPCODE_COMMON_EQ_DESTROY                        55
 206 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 207 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 208 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 209 #define OPCODE_COMMON_FUNCTION_RESET                    61
 210 #define OPCODE_COMMON_MANAGE_FAT                        68
 211 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 212 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 213 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 214 #define OPCODE_COMMON_GET_PORT_NAME                     77
 215 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG           80
 216 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE              89
 217 #define OPCODE_COMMON_SET_FN_PRIVILEGES                 100
 218 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 219 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 220 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 221 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 222 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 223 #define OPCODE_COMMON_GET_MAC_LIST                      147
 224 #define OPCODE_COMMON_SET_MAC_LIST                      148
 225 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 226 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 227 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 228 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 229 #define OPCODE_COMMON_GET_ACTIVE_PROFILE                167
 230 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 231 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 232 #define OPCODE_COMMON_READ_OBJECT                       171
 233 #define OPCODE_COMMON_WRITE_OBJECT                      172
 234 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS              193
 235 #define OPCODE_COMMON_GET_IFACE_LIST                    194
 236 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 237
 238 #define OPCODE_ETH_RSS_CONFIG                           1
 239 #define OPCODE_ETH_ACPI_CONFIG                          2
 240 #define OPCODE_ETH_PROMISCUOUS                          3
 241 #define OPCODE_ETH_GET_STATISTICS                       4
 242 #define OPCODE_ETH_TX_CREATE                            7
 243 #define OPCODE_ETH_RX_CREATE                            8
 244 #define OPCODE_ETH_TX_DESTROY                           9
 245 #define OPCODE_ETH_RX_DESTROY                           10
 246 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 247 #define OPCODE_ETH_GET_PPORT_STATS                      18
 248
 249 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 250 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 251 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 252
 253 struct be_cmd_req_hdr {
 254         u8 opcode;              /* dword 0 */
 255         u8 subsystem;           /* dword 0 */
 256         u8 port_number;         /* dword 0 */
 257         u8 domain;              /* dword 0 */
 258         u32 timeout;            /* dword 1 */
 259         u32 request_length;     /* dword 2 */
 260         u8 version;             /* dword 3 */
 261         u8 rsvd[3];             /* dword 3 */
 262 };
 263
 264 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 265 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 266 struct be_cmd_resp_hdr {
 267         u8 opcode;              /* dword 0 */
 268         u8 subsystem;           /* dword 0 */
 269         u8 rsvd[2];             /* dword 0 */
 270         u8 base_status;         /* dword 1 */
 271         u8 addl_status;         /* dword 1 */
 272         u8 rsvd1[2];            /* dword 1 */
 273         u32 response_length;    /* dword 2 */
 274         u32 actual_resp_len;    /* dword 3 */
 275 };
 276
 277 struct phys_addr {
 278         u32 lo;
 279         u32 hi;
 280 };
 281
 282 /**************************
 283  * BE Command definitions *
 284  **************************/
 285
 286 /* Pseudo amap definition in which each bit of the actual structure is defined
 287  * as a byte: used to calculate offset/shift/mask of each field */
 288 struct amap_eq_context {
 289         u8 cidx[13];            /* dword 0*/
 290         u8 rsvd0[3];            /* dword 0*/
 291         u8 epidx[13];           /* dword 0*/
 292         u8 valid;               /* dword 0*/
 293         u8 rsvd1;               /* dword 0*/
 294         u8 size;                /* dword 0*/
 295         u8 pidx[13];            /* dword 1*/
 296         u8 rsvd2[3];            /* dword 1*/
 297         u8 pd[10];              /* dword 1*/
 298         u8 count[3];            /* dword 1*/
 299         u8 solevent;            /* dword 1*/
 300         u8 stalled;             /* dword 1*/
 301         u8 armed;               /* dword 1*/
 302         u8 rsvd3[4];            /* dword 2*/
 303         u8 func[8];             /* dword 2*/
 304         u8 rsvd4;               /* dword 2*/
 305         u8 delaymult[10];       /* dword 2*/
 306         u8 rsvd5[2];            /* dword 2*/
 307         u8 phase[2];            /* dword 2*/
 308         u8 nodelay;             /* dword 2*/
 309         u8 rsvd6[4];            /* dword 2*/
 310         u8 rsvd7[32];           /* dword 3*/
 311 } __packed;
 312
 313 struct be_cmd_req_eq_create {
 314         struct be_cmd_req_hdr hdr;
 315         u16 num_pages;          /* sword */
 316         u16 rsvd0;              /* sword */
 317         u8 context[sizeof(struct amap_eq_context) / 8];
 318         struct phys_addr pages[8];
 319 } __packed;
 320
 321 struct be_cmd_resp_eq_create {
 322         struct be_cmd_resp_hdr resp_hdr;
 323         u16 eq_id;              /* sword */
 324         u16 msix_idx;           /* available only in v2 */
 325 } __packed;
 326
 327 /******************** Mac query ***************************/
 328 enum {
 329         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 330         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 331         MAC_ADDRESS_TYPE_PD = 0x2,
 332         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 333 };
 334
 335 struct mac_addr {
 336         u16 size_of_struct;
 337         u8 addr[ETH_ALEN];
 338 } __packed;
 339
 340 struct be_cmd_req_mac_query {
 341         struct be_cmd_req_hdr hdr;
 342         u8 type;
 343         u8 permanent;
 344         u16 if_id;
 345         u32 pmac_id;
 346 } __packed;
 347
 348 struct be_cmd_resp_mac_query {
 349         struct be_cmd_resp_hdr hdr;
 350         struct mac_addr mac;
 351 };
 352
 353 /******************** PMac Add ***************************/
 354 struct be_cmd_req_pmac_add {
 355         struct be_cmd_req_hdr hdr;
 356         u32 if_id;
 357         u8 mac_address[ETH_ALEN];
 358         u8 rsvd0[2];
 359 } __packed;
 360
 361 struct be_cmd_resp_pmac_add {
 362         struct be_cmd_resp_hdr hdr;
 363         u32 pmac_id;
 364 };
 365
 366 /******************** PMac Del ***************************/
 367 struct be_cmd_req_pmac_del {
 368         struct be_cmd_req_hdr hdr;
 369         u32 if_id;
 370         u32 pmac_id;
 371 };
 372
 373 /******************** Create CQ ***************************/
 374 /* Pseudo amap definition in which each bit of the actual structure is defined
 375  * as a byte: used to calculate offset/shift/mask of each field */
 376 struct amap_cq_context_be {
 377         u8 cidx[11];            /* dword 0*/
 378         u8 rsvd0;               /* dword 0*/
 379         u8 coalescwm[2];        /* dword 0*/
 380         u8 nodelay;             /* dword 0*/
 381         u8 epidx[11];           /* dword 0*/
 382         u8 rsvd1;               /* dword 0*/
 383         u8 count[2];            /* dword 0*/
 384         u8 valid;               /* dword 0*/
 385         u8 solevent;            /* dword 0*/
 386         u8 eventable;           /* dword 0*/
 387         u8 pidx[11];            /* dword 1*/
 388         u8 rsvd2;               /* dword 1*/
 389         u8 pd[10];              /* dword 1*/
 390         u8 eqid[8];             /* dword 1*/
 391         u8 stalled;             /* dword 1*/
 392         u8 armed;               /* dword 1*/
 393         u8 rsvd3[4];            /* dword 2*/
 394         u8 func[8];             /* dword 2*/
 395         u8 rsvd4[20];           /* dword 2*/
 396         u8 rsvd5[32];           /* dword 3*/
 397 } __packed;
 398
 399 struct amap_cq_context_v2 {
 400         u8 rsvd0[12];           /* dword 0*/
 401         u8 coalescwm[2];        /* dword 0*/
 402         u8 nodelay;             /* dword 0*/
 403         u8 rsvd1[12];           /* dword 0*/
 404         u8 count[2];            /* dword 0*/
 405         u8 valid;               /* dword 0*/
 406         u8 rsvd2;               /* dword 0*/
 407         u8 eventable;           /* dword 0*/
 408         u8 eqid[16];            /* dword 1*/
 409         u8 rsvd3[15];           /* dword 1*/
 410         u8 armed;               /* dword 1*/
 411         u8 rsvd4[32];           /* dword 2*/
 412         u8 rsvd5[32];           /* dword 3*/
 413 } __packed;
 414
 415 struct be_cmd_req_cq_create {
 416         struct be_cmd_req_hdr hdr;
 417         u16 num_pages;
 418         u8 page_size;
 419         u8 rsvd0;
 420         u8 context[sizeof(struct amap_cq_context_be) / 8];
 421         struct phys_addr pages[8];
 422 } __packed;
 423
 424
 425 struct be_cmd_resp_cq_create {
 426         struct be_cmd_resp_hdr hdr;
 427         u16 cq_id;
 428         u16 rsvd0;
 429 } __packed;
 430
 431 struct be_cmd_req_get_fat {
 432         struct be_cmd_req_hdr hdr;
 433         u32 fat_operation;
 434         u32 read_log_offset;
 435         u32 read_log_length;
 436         u32 data_buffer_size;
 437         u32 data_buffer[1];
 438 } __packed;
 439
 440 struct be_cmd_resp_get_fat {
 441         struct be_cmd_resp_hdr hdr;
 442         u32 log_size;
 443         u32 read_log_length;
 444         u32 rsvd[2];
 445         u32 data_buffer[1];
 446 } __packed;
 447
 448
 449 /******************** Create MCCQ ***************************/
 450 /* Pseudo amap definition in which each bit of the actual structure is defined
 451  * as a byte: used to calculate offset/shift/mask of each field */
 452 struct amap_mcc_context_be {
 453         u8 con_index[14];
 454         u8 rsvd0[2];
 455         u8 ring_size[4];
 456         u8 fetch_wrb;
 457         u8 fetch_r2t;
 458         u8 cq_id[10];
 459         u8 prod_index[14];
 460         u8 fid[8];
 461         u8 pdid[9];
 462         u8 valid;
 463         u8 rsvd1[32];
 464         u8 rsvd2[32];
 465 } __packed;
 466
 467 struct amap_mcc_context_v1 {
 468         u8 async_cq_id[16];
 469         u8 ring_size[4];
 470         u8 rsvd0[12];
 471         u8 rsvd1[31];
 472         u8 valid;
 473         u8 async_cq_valid[1];
 474         u8 rsvd2[31];
 475         u8 rsvd3[32];
 476 } __packed;
 477
 478 struct be_cmd_req_mcc_create {
 479         struct be_cmd_req_hdr hdr;
 480         u16 num_pages;
 481         u16 cq_id;
 482         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 483         struct phys_addr pages[8];
 484 } __packed;
 485
 486 struct be_cmd_req_mcc_ext_create {
 487         struct be_cmd_req_hdr hdr;
 488         u16 num_pages;
 489         u16 cq_id;
 490         u32 async_event_bitmap[1];
 491         u8 context[sizeof(struct amap_mcc_context_v1) / 8];
 492         struct phys_addr pages[8];
 493 } __packed;
 494
 495 struct be_cmd_resp_mcc_create {
 496         struct be_cmd_resp_hdr hdr;
 497         u16 id;
 498         u16 rsvd0;
 499 } __packed;
 500
 501 /******************** Create TxQ ***************************/
 502 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 503 #define BE_ULP1_NUM                             1
 504
 505 struct be_cmd_req_eth_tx_create {
 506         struct be_cmd_req_hdr hdr;
 507         u8 num_pages;
 508         u8 ulp_num;
 509         u16 type;
 510         u16 if_id;
 511         u8 queue_size;
 512         u8 rsvd0;
 513         u32 rsvd1;
 514         u16 cq_id;
 515         u16 rsvd2;
 516         u32 rsvd3[13];
 517         struct phys_addr pages[8];
 518 } __packed;
 519
 520 struct be_cmd_resp_eth_tx_create {
 521         struct be_cmd_resp_hdr hdr;
 522         u16 cid;
 523         u16 rid;
 524         u32 db_offset;
 525         u32 rsvd0[4];
 526 } __packed;
 527
 528 /******************** Create RxQ ***************************/
 529 struct be_cmd_req_eth_rx_create {
 530         struct be_cmd_req_hdr hdr;
 531         u16 cq_id;
 532         u8 frag_size;
 533         u8 num_pages;
 534         struct phys_addr pages[2];
 535         u32 interface_id;
 536         u16 max_frame_size;
 537         u16 rsvd0;
 538         u32 rss_queue;
 539 } __packed;
 540
 541 struct be_cmd_resp_eth_rx_create {
 542         struct be_cmd_resp_hdr hdr;
 543         u16 id;
 544         u8 rss_id;
 545         u8 rsvd0;
 546 } __packed;
 547
 548 /******************** Q Destroy  ***************************/
 549 /* Type of Queue to be destroyed */
 550 enum {
 551         QTYPE_EQ = 1,
 552         QTYPE_CQ,
 553         QTYPE_TXQ,
 554         QTYPE_RXQ,
 555         QTYPE_MCCQ
 556 };
 557
 558 struct be_cmd_req_q_destroy {
 559         struct be_cmd_req_hdr hdr;
 560         u16 id;
 561         u16 bypass_flush;       /* valid only for rx q destroy */
 562 } __packed;
 563
 564 /************ I/f Create (it's actually I/f Config Create)**********/
 565
 566 /* Capability flags for the i/f */
 567 enum be_if_flags {
 568         BE_IF_FLAGS_RSS = 0x4,
 569         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 570         BE_IF_FLAGS_BROADCAST = 0x10,
 571         BE_IF_FLAGS_UNTAGGED = 0x20,
 572         BE_IF_FLAGS_ULP = 0x40,
 573         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 574         BE_IF_FLAGS_VLAN = 0x100,
 575         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 576         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 577         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 578         BE_IF_FLAGS_MULTICAST = 0x1000
 579 };
 580
 581 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
 582                          BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 583                          BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
 584                          BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
 585                          BE_IF_FLAGS_UNTAGGED)
 586
 587 /* An RX interface is an object with one or more MAC addresses and
 588  * filtering capabilities. */
 589 struct be_cmd_req_if_create {
 590         struct be_cmd_req_hdr hdr;
 591         u32 version;            /* ignore currently */
 592         u32 capability_flags;
 593         u32 enable_flags;
 594         u8 mac_addr[ETH_ALEN];
 595         u8 rsvd0;
 596         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 597         u32 vlan_tag;    /* not used currently */
 598 } __packed;
 599
 600 struct be_cmd_resp_if_create {
 601         struct be_cmd_resp_hdr hdr;
 602         u32 interface_id;
 603         u32 pmac_id;
 604 };
 605
 606 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 607 struct be_cmd_req_if_destroy {
 608         struct be_cmd_req_hdr hdr;
 609         u32 interface_id;
 610 };
 611
 612 /*************** HW Stats Get **********************************/
 613 struct be_port_rxf_stats_v0 {
 614         u32 rx_bytes_lsd;       /* dword 0*/
 615         u32 rx_bytes_msd;       /* dword 1*/
 616         u32 rx_total_frames;    /* dword 2*/
 617         u32 rx_unicast_frames;  /* dword 3*/
 618         u32 rx_multicast_frames;        /* dword 4*/
 619         u32 rx_broadcast_frames;        /* dword 5*/
 620         u32 rx_crc_errors;      /* dword 6*/
 621         u32 rx_alignment_symbol_errors; /* dword 7*/
 622         u32 rx_pause_frames;    /* dword 8*/
 623         u32 rx_control_frames;  /* dword 9*/
 624         u32 rx_in_range_errors; /* dword 10*/
 625         u32 rx_out_range_errors;        /* dword 11*/
 626         u32 rx_frame_too_long;  /* dword 12*/
 627         u32 rx_address_filtered;        /* dword 13*/
 628         u32 rx_vlan_filtered;   /* dword 14*/
 629         u32 rx_dropped_too_small;       /* dword 15*/
 630         u32 rx_dropped_too_short;       /* dword 16*/
 631         u32 rx_dropped_header_too_small;        /* dword 17*/
 632         u32 rx_dropped_tcp_length;      /* dword 18*/
 633         u32 rx_dropped_runt;    /* dword 19*/
 634         u32 rx_64_byte_packets; /* dword 20*/
 635         u32 rx_65_127_byte_packets;     /* dword 21*/
 636         u32 rx_128_256_byte_packets;    /* dword 22*/
 637         u32 rx_256_511_byte_packets;    /* dword 23*/
 638         u32 rx_512_1023_byte_packets;   /* dword 24*/
 639         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 640         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 641         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 642         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 643         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 644         u32 rx_ip_checksum_errs;        /* dword 30*/
 645         u32 rx_tcp_checksum_errs;       /* dword 31*/
 646         u32 rx_udp_checksum_errs;       /* dword 32*/
 647         u32 rx_non_rss_packets; /* dword 33*/
 648         u32 rx_ipv4_packets;    /* dword 34*/
 649         u32 rx_ipv6_packets;    /* dword 35*/
 650         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 651         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 652         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 653         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 654         u32 rx_chute1_packets;  /* dword 40*/
 655         u32 rx_chute2_packets;  /* dword 41*/
 656         u32 rx_chute3_packets;  /* dword 42*/
 657         u32 rx_management_packets;      /* dword 43*/
 658         u32 rx_switched_unicast_packets;        /* dword 44*/
 659         u32 rx_switched_multicast_packets;      /* dword 45*/
 660         u32 rx_switched_broadcast_packets;      /* dword 46*/
 661         u32 tx_bytes_lsd;       /* dword 47*/
 662         u32 tx_bytes_msd;       /* dword 48*/
 663         u32 tx_unicastframes;   /* dword 49*/
 664         u32 tx_multicastframes; /* dword 50*/
 665         u32 tx_broadcastframes; /* dword 51*/
 666         u32 tx_pauseframes;     /* dword 52*/
 667         u32 tx_controlframes;   /* dword 53*/
 668         u32 tx_64_byte_packets; /* dword 54*/
 669         u32 tx_65_127_byte_packets;     /* dword 55*/
 670         u32 tx_128_256_byte_packets;    /* dword 56*/
 671         u32 tx_256_511_byte_packets;    /* dword 57*/
 672         u32 tx_512_1023_byte_packets;   /* dword 58*/
 673         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 674         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 675         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 676         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 677         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 678         u32 rx_fifo_overflow;   /* dword 64*/
 679         u32 rx_input_fifo_overflow;     /* dword 65*/
 680 };
 681
 682 struct be_rxf_stats_v0 {
 683         struct be_port_rxf_stats_v0 port[2];
 684         u32 rx_drops_no_pbuf;   /* dword 132*/
 685         u32 rx_drops_no_txpb;   /* dword 133*/
 686         u32 rx_drops_no_erx_descr;      /* dword 134*/
 687         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 688         u32 management_rx_port_packets; /* dword 136*/
 689         u32 management_rx_port_bytes;   /* dword 137*/
 690         u32 management_rx_port_pause_frames;    /* dword 138*/
 691         u32 management_rx_port_errors;  /* dword 139*/
 692         u32 management_tx_port_packets; /* dword 140*/
 693         u32 management_tx_port_bytes;   /* dword 141*/
 694         u32 management_tx_port_pause;   /* dword 142*/
 695         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 696         u32 rx_drops_too_many_frags;    /* dword 144*/
 697         u32 rx_drops_invalid_ring;      /* dword 145*/
 698         u32 forwarded_packets;  /* dword 146*/
 699         u32 rx_drops_mtu;       /* dword 147*/
 700         u32 rsvd0[7];
 701         u32 port0_jabber_events;
 702         u32 port1_jabber_events;
 703         u32 rsvd1[6];
 704 };
 705
 706 struct be_erx_stats_v0 {
 707         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 708         u32 rsvd[4];
 709 };
 710
 711 struct be_pmem_stats {
 712         u32 eth_red_drops;
 713         u32 rsvd[5];
 714 };
 715
 716 struct be_hw_stats_v0 {
 717         struct be_rxf_stats_v0 rxf;
 718         u32 rsvd[48];
 719         struct be_erx_stats_v0 erx;
 720         struct be_pmem_stats pmem;
 721 };
 722
 723 struct be_cmd_req_get_stats_v0 {
 724         struct be_cmd_req_hdr hdr;
 725         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 726 };
 727
 728 struct be_cmd_resp_get_stats_v0 {
 729         struct be_cmd_resp_hdr hdr;
 730         struct be_hw_stats_v0 hw_stats;
 731 };
 732
 733 struct lancer_pport_stats {
 734         u32 tx_packets_lo;
 735         u32 tx_packets_hi;
 736         u32 tx_unicast_packets_lo;
 737         u32 tx_unicast_packets_hi;
 738         u32 tx_multicast_packets_lo;
 739         u32 tx_multicast_packets_hi;
 740         u32 tx_broadcast_packets_lo;
 741         u32 tx_broadcast_packets_hi;
 742         u32 tx_bytes_lo;
 743         u32 tx_bytes_hi;
 744         u32 tx_unicast_bytes_lo;
 745         u32 tx_unicast_bytes_hi;
 746         u32 tx_multicast_bytes_lo;
 747         u32 tx_multicast_bytes_hi;
 748         u32 tx_broadcast_bytes_lo;
 749         u32 tx_broadcast_bytes_hi;
 750         u32 tx_discards_lo;
 751         u32 tx_discards_hi;
 752         u32 tx_errors_lo;
 753         u32 tx_errors_hi;
 754         u32 tx_pause_frames_lo;
 755         u32 tx_pause_frames_hi;
 756         u32 tx_pause_on_frames_lo;
 757         u32 tx_pause_on_frames_hi;
 758         u32 tx_pause_off_frames_lo;
 759         u32 tx_pause_off_frames_hi;
 760         u32 tx_internal_mac_errors_lo;
 761         u32 tx_internal_mac_errors_hi;
 762         u32 tx_control_frames_lo;
 763         u32 tx_control_frames_hi;
 764         u32 tx_packets_64_bytes_lo;
 765         u32 tx_packets_64_bytes_hi;
 766         u32 tx_packets_65_to_127_bytes_lo;
 767         u32 tx_packets_65_to_127_bytes_hi;
 768         u32 tx_packets_128_to_255_bytes_lo;
 769         u32 tx_packets_128_to_255_bytes_hi;
 770         u32 tx_packets_256_to_511_bytes_lo;
 771         u32 tx_packets_256_to_511_bytes_hi;
 772         u32 tx_packets_512_to_1023_bytes_lo;
 773         u32 tx_packets_512_to_1023_bytes_hi;
 774         u32 tx_packets_1024_to_1518_bytes_lo;
 775         u32 tx_packets_1024_to_1518_bytes_hi;
 776         u32 tx_packets_1519_to_2047_bytes_lo;
 777         u32 tx_packets_1519_to_2047_bytes_hi;
 778         u32 tx_packets_2048_to_4095_bytes_lo;
 779         u32 tx_packets_2048_to_4095_bytes_hi;
 780         u32 tx_packets_4096_to_8191_bytes_lo;
 781         u32 tx_packets_4096_to_8191_bytes_hi;
 782         u32 tx_packets_8192_to_9216_bytes_lo;
 783         u32 tx_packets_8192_to_9216_bytes_hi;
 784         u32 tx_lso_packets_lo;
 785         u32 tx_lso_packets_hi;
 786         u32 rx_packets_lo;
 787         u32 rx_packets_hi;
 788         u32 rx_unicast_packets_lo;
 789         u32 rx_unicast_packets_hi;
 790         u32 rx_multicast_packets_lo;
 791         u32 rx_multicast_packets_hi;
 792         u32 rx_broadcast_packets_lo;
 793         u32 rx_broadcast_packets_hi;
 794         u32 rx_bytes_lo;
 795         u32 rx_bytes_hi;
 796         u32 rx_unicast_bytes_lo;
 797         u32 rx_unicast_bytes_hi;
 798         u32 rx_multicast_bytes_lo;
 799         u32 rx_multicast_bytes_hi;
 800         u32 rx_broadcast_bytes_lo;
 801         u32 rx_broadcast_bytes_hi;
 802         u32 rx_unknown_protos;
 803         u32 rsvd_69; /* Word 69 is reserved */
 804         u32 rx_discards_lo;
 805         u32 rx_discards_hi;
 806         u32 rx_errors_lo;
 807         u32 rx_errors_hi;
 808         u32 rx_crc_errors_lo;
 809         u32 rx_crc_errors_hi;
 810         u32 rx_alignment_errors_lo;
 811         u32 rx_alignment_errors_hi;
 812         u32 rx_symbol_errors_lo;
 813         u32 rx_symbol_errors_hi;
 814         u32 rx_pause_frames_lo;
 815         u32 rx_pause_frames_hi;
 816         u32 rx_pause_on_frames_lo;
 817         u32 rx_pause_on_frames_hi;
 818         u32 rx_pause_off_frames_lo;
 819         u32 rx_pause_off_frames_hi;
 820         u32 rx_frames_too_long_lo;
 821         u32 rx_frames_too_long_hi;
 822         u32 rx_internal_mac_errors_lo;
 823         u32 rx_internal_mac_errors_hi;
 824         u32 rx_undersize_packets;
 825         u32 rx_oversize_packets;
 826         u32 rx_fragment_packets;
 827         u32 rx_jabbers;
 828         u32 rx_control_frames_lo;
 829         u32 rx_control_frames_hi;
 830         u32 rx_control_frames_unknown_opcode_lo;
 831         u32 rx_control_frames_unknown_opcode_hi;
 832         u32 rx_in_range_errors;
 833         u32 rx_out_of_range_errors;
 834         u32 rx_address_filtered;
 835         u32 rx_vlan_filtered;
 836         u32 rx_dropped_too_small;
 837         u32 rx_dropped_too_short;
 838         u32 rx_dropped_header_too_small;
 839         u32 rx_dropped_invalid_tcp_length;
 840         u32 rx_dropped_runt;
 841         u32 rx_ip_checksum_errors;
 842         u32 rx_tcp_checksum_errors;
 843         u32 rx_udp_checksum_errors;
 844         u32 rx_non_rss_packets;
 845         u32 rsvd_111;
 846         u32 rx_ipv4_packets_lo;
 847         u32 rx_ipv4_packets_hi;
 848         u32 rx_ipv6_packets_lo;
 849         u32 rx_ipv6_packets_hi;
 850         u32 rx_ipv4_bytes_lo;
 851         u32 rx_ipv4_bytes_hi;
 852         u32 rx_ipv6_bytes_lo;
 853         u32 rx_ipv6_bytes_hi;
 854         u32 rx_nic_packets_lo;
 855         u32 rx_nic_packets_hi;
 856         u32 rx_tcp_packets_lo;
 857         u32 rx_tcp_packets_hi;
 858         u32 rx_iscsi_packets_lo;
 859         u32 rx_iscsi_packets_hi;
 860         u32 rx_management_packets_lo;
 861         u32 rx_management_packets_hi;
 862         u32 rx_switched_unicast_packets_lo;
 863         u32 rx_switched_unicast_packets_hi;
 864         u32 rx_switched_multicast_packets_lo;
 865         u32 rx_switched_multicast_packets_hi;
 866         u32 rx_switched_broadcast_packets_lo;
 867         u32 rx_switched_broadcast_packets_hi;
 868         u32 num_forwards_lo;
 869         u32 num_forwards_hi;
 870         u32 rx_fifo_overflow;
 871         u32 rx_input_fifo_overflow;
 872         u32 rx_drops_too_many_frags_lo;
 873         u32 rx_drops_too_many_frags_hi;
 874         u32 rx_drops_invalid_queue;
 875         u32 rsvd_141;
 876         u32 rx_drops_mtu_lo;
 877         u32 rx_drops_mtu_hi;
 878         u32 rx_packets_64_bytes_lo;
 879         u32 rx_packets_64_bytes_hi;
 880         u32 rx_packets_65_to_127_bytes_lo;
 881         u32 rx_packets_65_to_127_bytes_hi;
 882         u32 rx_packets_128_to_255_bytes_lo;
 883         u32 rx_packets_128_to_255_bytes_hi;
 884         u32 rx_packets_256_to_511_bytes_lo;
 885         u32 rx_packets_256_to_511_bytes_hi;
 886         u32 rx_packets_512_to_1023_bytes_lo;
 887         u32 rx_packets_512_to_1023_bytes_hi;
 888         u32 rx_packets_1024_to_1518_bytes_lo;
 889         u32 rx_packets_1024_to_1518_bytes_hi;
 890         u32 rx_packets_1519_to_2047_bytes_lo;
 891         u32 rx_packets_1519_to_2047_bytes_hi;
 892         u32 rx_packets_2048_to_4095_bytes_lo;
 893         u32 rx_packets_2048_to_4095_bytes_hi;
 894         u32 rx_packets_4096_to_8191_bytes_lo;
 895         u32 rx_packets_4096_to_8191_bytes_hi;
 896         u32 rx_packets_8192_to_9216_bytes_lo;
 897         u32 rx_packets_8192_to_9216_bytes_hi;
 898 };
 899
 900 struct pport_stats_params {
 901         u16 pport_num;
 902         u8 rsvd;
 903         u8 reset_stats;
 904 };
 905
 906 struct lancer_cmd_req_pport_stats {
 907         struct be_cmd_req_hdr hdr;
 908         union {
 909                 struct pport_stats_params params;
 910                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 911         } cmd_params;
 912 };
 913
 914 struct lancer_cmd_resp_pport_stats {
 915         struct be_cmd_resp_hdr hdr;
 916         struct lancer_pport_stats pport_stats;
 917 };
 918
 919 static inline struct lancer_pport_stats*
 920         pport_stats_from_cmd(struct be_adapter *adapter)
 921 {
 922         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 923         return &cmd->pport_stats;
 924 }
 925
 926 struct be_cmd_req_get_cntl_addnl_attribs {
 927         struct be_cmd_req_hdr hdr;
 928         u8 rsvd[8];
 929 };
 930
 931 struct be_cmd_resp_get_cntl_addnl_attribs {
 932         struct be_cmd_resp_hdr hdr;
 933         u16 ipl_file_number;
 934         u8 ipl_file_version;
 935         u8 rsvd0;
 936         u8 on_die_temperature; /* in degrees centigrade*/
 937         u8 rsvd1[3];
 938 };
 939
 940 struct be_cmd_req_vlan_config {
 941         struct be_cmd_req_hdr hdr;
 942         u8 interface_id;
 943         u8 promiscuous;
 944         u8 untagged;
 945         u8 num_vlan;
 946         u16 normal_vlan[64];
 947 } __packed;
 948
 949 /******************* RX FILTER ******************************/
 950 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 951 struct macaddr {
 952         u8 byte[ETH_ALEN];
 953 };
 954
 955 struct be_cmd_req_rx_filter {
 956         struct be_cmd_req_hdr hdr;
 957         u32 global_flags_mask;
 958         u32 global_flags;
 959         u32 if_flags_mask;
 960         u32 if_flags;
 961         u32 if_id;
 962         u32 mcast_num;
 963         struct macaddr mcast_mac[BE_MAX_MC];
 964 };
 965
 966 /******************** Link Status Query *******************/
 967 struct be_cmd_req_link_status {
 968         struct be_cmd_req_hdr hdr;
 969         u32 rsvd;
 970 };
 971
 972 enum {
 973         PHY_LINK_DUPLEX_NONE = 0x0,
 974         PHY_LINK_DUPLEX_HALF = 0x1,
 975         PHY_LINK_DUPLEX_FULL = 0x2
 976 };
 977
 978 enum {
 979         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 980         PHY_LINK_SPEED_10MBPS = 0x1,
 981         PHY_LINK_SPEED_100MBPS = 0x2,
 982         PHY_LINK_SPEED_1GBPS = 0x3,
 983         PHY_LINK_SPEED_10GBPS = 0x4,
 984         PHY_LINK_SPEED_20GBPS = 0x5,
 985         PHY_LINK_SPEED_25GBPS = 0x6,
 986         PHY_LINK_SPEED_40GBPS = 0x7
 987 };
 988
 989 struct be_cmd_resp_link_status {
 990         struct be_cmd_resp_hdr hdr;
 991         u8 physical_port;
 992         u8 mac_duplex;
 993         u8 mac_speed;
 994         u8 mac_fault;
 995         u8 mgmt_mac_duplex;
 996         u8 mgmt_mac_speed;
 997         u16 link_speed;
 998         u8 logical_link_status;
 999         u8 rsvd1[3];
1000 } __packed;
1001
1002 /******************** Port Identification ***************************/
1003 /*    Identifies the type of port attached to NIC     */
1004 struct be_cmd_req_port_type {
1005         struct be_cmd_req_hdr hdr;
1006         u32 page_num;
1007         u32 port;
1008 };
1009
1010 enum {
1011         TR_PAGE_A0 = 0xa0,
1012         TR_PAGE_A2 = 0xa2
1013 };
1014
1015 struct be_cmd_resp_port_type {
1016         struct be_cmd_resp_hdr hdr;
1017         u32 page_num;
1018         u32 port;
1019         struct data {
1020                 u8 identifier;
1021                 u8 identifier_ext;
1022                 u8 connector;
1023                 u8 transceiver[8];
1024                 u8 rsvd0[3];
1025                 u8 length_km;
1026                 u8 length_hm;
1027                 u8 length_om1;
1028                 u8 length_om2;
1029                 u8 length_cu;
1030                 u8 length_cu_m;
1031                 u8 vendor_name[16];
1032                 u8 rsvd;
1033                 u8 vendor_oui[3];
1034                 u8 vendor_pn[16];
1035                 u8 vendor_rev[4];
1036         } data;
1037 };
1038
1039 /******************** Get FW Version *******************/
1040 struct be_cmd_req_get_fw_version {
1041         struct be_cmd_req_hdr hdr;
1042         u8 rsvd0[FW_VER_LEN];
1043         u8 rsvd1[FW_VER_LEN];
1044 } __packed;
1045
1046 struct be_cmd_resp_get_fw_version {
1047         struct be_cmd_resp_hdr hdr;
1048         u8 firmware_version_string[FW_VER_LEN];
1049         u8 fw_on_flash_version_string[FW_VER_LEN];
1050 } __packed;
1051
1052 /******************** Set Flow Contrl *******************/
1053 struct be_cmd_req_set_flow_control {
1054         struct be_cmd_req_hdr hdr;
1055         u16 tx_flow_control;
1056         u16 rx_flow_control;
1057 } __packed;
1058
1059 /******************** Get Flow Contrl *******************/
1060 struct be_cmd_req_get_flow_control {
1061         struct be_cmd_req_hdr hdr;
1062         u32 rsvd;
1063 };
1064
1065 struct be_cmd_resp_get_flow_control {
1066         struct be_cmd_resp_hdr hdr;
1067         u16 tx_flow_control;
1068         u16 rx_flow_control;
1069 } __packed;
1070
1071 /******************** Modify EQ Delay *******************/
1072 struct be_set_eqd {
1073         u32 eq_id;
1074         u32 phase;
1075         u32 delay_multiplier;
1076 };
1077
1078 struct be_cmd_req_modify_eq_delay {
1079         struct be_cmd_req_hdr hdr;
1080         u32 num_eq;
1081         struct be_set_eqd set_eqd[MAX_EVT_QS];
1082 } __packed;
1083
1084 struct be_cmd_resp_modify_eq_delay {
1085         struct be_cmd_resp_hdr hdr;
1086         u32 rsvd0;
1087 } __packed;
1088
1089 /******************** Get FW Config *******************/
1090 /* The HW can come up in either of the following multi-channel modes
1091  * based on the skew/IPL.
1092  */
1093 #define RDMA_ENABLED                            0x4
1094 #define QNQ_MODE                                0x400
1095 #define VNIC_MODE                               0x20000
1096 #define UMC_ENABLED                             0x1000000
1097 struct be_cmd_req_query_fw_cfg {
1098         struct be_cmd_req_hdr hdr;
1099         u32 rsvd[31];
1100 };
1101
1102 struct be_cmd_resp_query_fw_cfg {
1103         struct be_cmd_resp_hdr hdr;
1104         u32 be_config_number;
1105         u32 asic_revision;
1106         u32 phys_port;
1107         u32 function_mode;
1108         u32 rsvd[26];
1109         u32 function_caps;
1110 };
1111
1112 /******************** RSS Config ****************************************/
1113 /* RSS type             Input parameters used to compute RX hash
1114  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1115  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1116  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1117  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1118  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1119  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1120  *
1121  * When multiple RSS types are enabled, HW picks the best hash policy
1122  * based on the type of the received packet.
1123  */
1124 #define RSS_ENABLE_NONE                         0x0
1125 #define RSS_ENABLE_IPV4                         0x1
1126 #define RSS_ENABLE_TCP_IPV4                     0x2
1127 #define RSS_ENABLE_IPV6                         0x4
1128 #define RSS_ENABLE_TCP_IPV6                     0x8
1129 #define RSS_ENABLE_UDP_IPV4                     0x10
1130 #define RSS_ENABLE_UDP_IPV6                     0x20
1131
1132 #define L3_RSS_FLAGS                            (RXH_IP_DST | RXH_IP_SRC)
1133 #define L4_RSS_FLAGS                            (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1134
1135 struct be_cmd_req_rss_config {
1136         struct be_cmd_req_hdr hdr;
1137         u32 if_id;
1138         u16 enable_rss;
1139         u16 cpu_table_size_log2;
1140         u32 hash[10];
1141         u8 cpu_table[128];
1142         u8 flush;
1143         u8 rsvd0[3];
1144 };
1145
1146 /******************** Port Beacon ***************************/
1147
1148 #define BEACON_STATE_ENABLED            0x1
1149 #define BEACON_STATE_DISABLED           0x0
1150
1151 struct be_cmd_req_enable_disable_beacon {
1152         struct be_cmd_req_hdr hdr;
1153         u8  port_num;
1154         u8  beacon_state;
1155         u8  beacon_duration;
1156         u8  status_duration;
1157 } __packed;
1158
1159 struct be_cmd_resp_enable_disable_beacon {
1160         struct be_cmd_resp_hdr resp_hdr;
1161         u32 rsvd0;
1162 } __packed;
1163
1164 struct be_cmd_req_get_beacon_state {
1165         struct be_cmd_req_hdr hdr;
1166         u8  port_num;
1167         u8  rsvd0;
1168         u16 rsvd1;
1169 } __packed;
1170
1171 struct be_cmd_resp_get_beacon_state {
1172         struct be_cmd_resp_hdr resp_hdr;
1173         u8 beacon_state;
1174         u8 rsvd0[3];
1175 } __packed;
1176
1177 /****************** Firmware Flash ******************/
1178 struct flashrom_params {
1179         u32 op_code;
1180         u32 op_type;
1181         u32 data_buf_size;
1182         u32 offset;
1183 };
1184
1185 struct be_cmd_write_flashrom {
1186         struct be_cmd_req_hdr hdr;
1187         struct flashrom_params params;
1188         u8 data_buf[32768];
1189         u8 rsvd[4];
1190 } __packed;
1191
1192 /* cmd to read flash crc */
1193 struct be_cmd_read_flash_crc {
1194         struct be_cmd_req_hdr hdr;
1195         struct flashrom_params params;
1196         u8 crc[4];
1197         u8 rsvd[4];
1198 } __packed;
1199
1200 /**************** Lancer Firmware Flash ************/
1201 struct amap_lancer_write_obj_context {
1202         u8 write_length[24];
1203         u8 reserved1[7];
1204         u8 eof;
1205 } __packed;
1206
1207 struct lancer_cmd_req_write_object {
1208         struct be_cmd_req_hdr hdr;
1209         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1210         u32 write_offset;
1211         u8 object_name[104];
1212         u32 descriptor_count;
1213         u32 buf_len;
1214         u32 addr_low;
1215         u32 addr_high;
1216 };
1217
1218 #define LANCER_NO_RESET_NEEDED          0x00
1219 #define LANCER_FW_RESET_NEEDED          0x02
1220 struct lancer_cmd_resp_write_object {
1221         u8 opcode;
1222         u8 subsystem;
1223         u8 rsvd1[2];
1224         u8 status;
1225         u8 additional_status;
1226         u8 rsvd2[2];
1227         u32 resp_len;
1228         u32 actual_resp_len;
1229         u32 actual_write_len;
1230         u8 change_status;
1231         u8 rsvd3[3];
1232 };
1233
1234 /************************ Lancer Read FW info **************/
1235 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1236 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1237
1238 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1239 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1240 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1241
1242 struct lancer_cmd_req_read_object {
1243         struct be_cmd_req_hdr hdr;
1244         u32 desired_read_len;
1245         u32 read_offset;
1246         u8 object_name[104];
1247         u32 descriptor_count;
1248         u32 buf_len;
1249         u32 addr_low;
1250         u32 addr_high;
1251 };
1252
1253 struct lancer_cmd_resp_read_object {
1254         u8 opcode;
1255         u8 subsystem;
1256         u8 rsvd1[2];
1257         u8 status;
1258         u8 additional_status;
1259         u8 rsvd2[2];
1260         u32 resp_len;
1261         u32 actual_resp_len;
1262         u32 actual_read_len;
1263         u32 eof;
1264 };
1265
1266 /************************ WOL *******************************/
1267 struct be_cmd_req_acpi_wol_magic_config{
1268         struct be_cmd_req_hdr hdr;
1269         u32 rsvd0[145];
1270         u8 magic_mac[6];
1271         u8 rsvd2[2];
1272 } __packed;
1273
1274 struct be_cmd_req_acpi_wol_magic_config_v1 {
1275         struct be_cmd_req_hdr hdr;
1276         u8 rsvd0[2];
1277         u8 query_options;
1278         u8 rsvd1[5];
1279         u32 rsvd2[288];
1280         u8 magic_mac[6];
1281         u8 rsvd3[22];
1282 } __packed;
1283
1284 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1285         struct be_cmd_resp_hdr hdr;
1286         u8 rsvd0[2];
1287         u8 wol_settings;
1288         u8 rsvd1[5];
1289         u32 rsvd2[295];
1290 } __packed;
1291
1292 #define BE_GET_WOL_CAP                  2
1293
1294 #define BE_WOL_CAP                      0x1
1295 #define BE_PME_D0_CAP                   0x8
1296 #define BE_PME_D1_CAP                   0x10
1297 #define BE_PME_D2_CAP                   0x20
1298 #define BE_PME_D3HOT_CAP                0x40
1299 #define BE_PME_D3COLD_CAP               0x80
1300
1301 /********************** LoopBack test *********************/
1302 struct be_cmd_req_loopback_test {
1303         struct be_cmd_req_hdr hdr;
1304         u32 loopback_type;
1305         u32 num_pkts;
1306         u64 pattern;
1307         u32 src_port;
1308         u32 dest_port;
1309         u32 pkt_size;
1310 };
1311
1312 struct be_cmd_resp_loopback_test {
1313         struct be_cmd_resp_hdr resp_hdr;
1314         u32    status;
1315         u32    num_txfer;
1316         u32    num_rx;
1317         u32    miscomp_off;
1318         u32    ticks_compl;
1319 };
1320
1321 struct be_cmd_req_set_lmode {
1322         struct be_cmd_req_hdr hdr;
1323         u8 src_port;
1324         u8 dest_port;
1325         u8 loopback_type;
1326         u8 loopback_state;
1327 };
1328
1329 struct be_cmd_resp_set_lmode {
1330         struct be_cmd_resp_hdr resp_hdr;
1331         u8 rsvd0[4];
1332 };
1333
1334 /********************** DDR DMA test *********************/
1335 struct be_cmd_req_ddrdma_test {
1336         struct be_cmd_req_hdr hdr;
1337         u64 pattern;
1338         u32 byte_count;
1339         u32 rsvd0;
1340         u8  snd_buff[4096];
1341         u8  rsvd1[4096];
1342 };
1343
1344 struct be_cmd_resp_ddrdma_test {
1345         struct be_cmd_resp_hdr hdr;
1346         u64 pattern;
1347         u32 byte_cnt;
1348         u32 snd_err;
1349         u8  rsvd0[4096];
1350         u8  rcv_buff[4096];
1351 };
1352
1353 /*********************** SEEPROM Read ***********************/
1354
1355 #define BE_READ_SEEPROM_LEN 1024
1356 struct be_cmd_req_seeprom_read {
1357         struct be_cmd_req_hdr hdr;
1358         u8 rsvd0[BE_READ_SEEPROM_LEN];
1359 };
1360
1361 struct be_cmd_resp_seeprom_read {
1362         struct be_cmd_req_hdr hdr;
1363         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1364 };
1365
1366 enum {
1367         PHY_TYPE_CX4_10GB = 0,
1368         PHY_TYPE_XFP_10GB,
1369         PHY_TYPE_SFP_1GB,
1370         PHY_TYPE_SFP_PLUS_10GB,
1371         PHY_TYPE_KR_10GB,
1372         PHY_TYPE_KX4_10GB,
1373         PHY_TYPE_BASET_10GB,
1374         PHY_TYPE_BASET_1GB,
1375         PHY_TYPE_BASEX_1GB,
1376         PHY_TYPE_SGMII,
1377         PHY_TYPE_DISABLED = 255
1378 };
1379
1380 #define BE_SUPPORTED_SPEED_NONE         0
1381 #define BE_SUPPORTED_SPEED_10MBPS       1
1382 #define BE_SUPPORTED_SPEED_100MBPS      2
1383 #define BE_SUPPORTED_SPEED_1GBPS        4
1384 #define BE_SUPPORTED_SPEED_10GBPS       8
1385
1386 #define BE_AN_EN                        0x2
1387 #define BE_PAUSE_SYM_EN                 0x80
1388
1389 /* MAC speed valid values */
1390 #define SPEED_DEFAULT  0x0
1391 #define SPEED_FORCED_10GB  0x1
1392 #define SPEED_FORCED_1GB  0x2
1393 #define SPEED_AUTONEG_10GB  0x3
1394 #define SPEED_AUTONEG_1GB  0x4
1395 #define SPEED_AUTONEG_100MB  0x5
1396 #define SPEED_AUTONEG_10GB_1GB 0x6
1397 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1398 #define SPEED_AUTONEG_1GB_100MB  0x8
1399 #define SPEED_AUTONEG_10MB  0x9
1400 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1401 #define SPEED_AUTONEG_100MB_10MB 0xb
1402 #define SPEED_FORCED_100MB  0xc
1403 #define SPEED_FORCED_10MB  0xd
1404
1405 struct be_cmd_req_get_phy_info {
1406         struct be_cmd_req_hdr hdr;
1407         u8 rsvd0[24];
1408 };
1409
1410 struct be_phy_info {
1411         u16 phy_type;
1412         u16 interface_type;
1413         u32 misc_params;
1414         u16 ext_phy_details;
1415         u16 rsvd;
1416         u16 auto_speeds_supported;
1417         u16 fixed_speeds_supported;
1418         u32 future_use[2];
1419 };
1420
1421 struct be_cmd_resp_get_phy_info {
1422         struct be_cmd_req_hdr hdr;
1423         struct be_phy_info phy_info;
1424 };
1425
1426 /*********************** Set QOS ***********************/
1427
1428 #define BE_QOS_BITS_NIC                         1
1429
1430 struct be_cmd_req_set_qos {
1431         struct be_cmd_req_hdr hdr;
1432         u32 valid_bits;
1433         u32 max_bps_nic;
1434         u32 rsvd[7];
1435 };
1436
1437 struct be_cmd_resp_set_qos {
1438         struct be_cmd_resp_hdr hdr;
1439         u32 rsvd;
1440 };
1441
1442 /*********************** Controller Attributes ***********************/
1443 struct be_cmd_req_cntl_attribs {
1444         struct be_cmd_req_hdr hdr;
1445 };
1446
1447 struct be_cmd_resp_cntl_attribs {
1448         struct be_cmd_resp_hdr hdr;
1449         struct mgmt_controller_attrib attribs;
1450 };
1451
1452 /*********************** Set driver function ***********************/
1453 #define CAPABILITY_SW_TIMESTAMPS        2
1454 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1455
1456 struct be_cmd_req_set_func_cap {
1457         struct be_cmd_req_hdr hdr;
1458         u32 valid_cap_flags;
1459         u32 cap_flags;
1460         u8 rsvd[212];
1461 };
1462
1463 struct be_cmd_resp_set_func_cap {
1464         struct be_cmd_resp_hdr hdr;
1465         u32 valid_cap_flags;
1466         u32 cap_flags;
1467         u8 rsvd[212];
1468 };
1469
1470 /*********************** Function Privileges ***********************/
1471 enum {
1472         BE_PRIV_DEFAULT = 0x1,
1473         BE_PRIV_LNKQUERY = 0x2,
1474         BE_PRIV_LNKSTATS = 0x4,
1475         BE_PRIV_LNKMGMT = 0x8,
1476         BE_PRIV_LNKDIAG = 0x10,
1477         BE_PRIV_UTILQUERY = 0x20,
1478         BE_PRIV_FILTMGMT = 0x40,
1479         BE_PRIV_IFACEMGMT = 0x80,
1480         BE_PRIV_VHADM = 0x100,
1481         BE_PRIV_DEVCFG = 0x200,
1482         BE_PRIV_DEVSEC = 0x400
1483 };
1484 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1485                                  BE_PRIV_DEVSEC)
1486 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1487
1488 struct be_cmd_priv_map {
1489         u8 opcode;
1490         u8 subsystem;
1491         u32 priv_mask;
1492 };
1493
1494 struct be_cmd_req_get_fn_privileges {
1495         struct be_cmd_req_hdr hdr;
1496         u32 rsvd;
1497 };
1498
1499 struct be_cmd_resp_get_fn_privileges {
1500         struct be_cmd_resp_hdr hdr;
1501         u32 privilege_mask;
1502 };
1503
1504 struct be_cmd_req_set_fn_privileges {
1505         struct be_cmd_req_hdr hdr;
1506         u32 privileges;         /* Used by BE3, SH-R */
1507         u32 privileges_lancer;  /* Used by Lancer */
1508 };
1509
1510 /******************** GET/SET_MACLIST  **************************/
1511 #define BE_MAX_MAC                      64
1512 struct be_cmd_req_get_mac_list {
1513         struct be_cmd_req_hdr hdr;
1514         u8 mac_type;
1515         u8 perm_override;
1516         u16 iface_id;
1517         u32 mac_id;
1518         u32 rsvd[3];
1519 } __packed;
1520
1521 struct get_list_macaddr {
1522         u16 mac_addr_size;
1523         union {
1524                 u8 macaddr[6];
1525                 struct {
1526                         u8 rsvd[2];
1527                         u32 mac_id;
1528                 } __packed s_mac_id;
1529         } __packed mac_addr_id;
1530 } __packed;
1531
1532 struct be_cmd_resp_get_mac_list {
1533         struct be_cmd_resp_hdr hdr;
1534         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1535         struct get_list_macaddr macid_macaddr; /* soft mac */
1536         u8 true_mac_count;
1537         u8 pseudo_mac_count;
1538         u8 mac_list_size;
1539         u8 rsvd;
1540         /* perm override mac */
1541         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1542 } __packed;
1543
1544 struct be_cmd_req_set_mac_list {
1545         struct be_cmd_req_hdr hdr;
1546         u8 mac_count;
1547         u8 rsvd1;
1548         u16 rsvd2;
1549         struct macaddr mac[BE_MAX_MAC];
1550 } __packed;
1551
1552 /*********************** HSW Config ***********************/
1553 #define PORT_FWD_TYPE_VEPA              0x3
1554 #define PORT_FWD_TYPE_VEB               0x2
1555
1556 struct amap_set_hsw_context {
1557         u8 interface_id[16];
1558         u8 rsvd0[14];
1559         u8 pvid_valid;
1560         u8 pport;
1561         u8 rsvd1[6];
1562         u8 port_fwd_type[3];
1563         u8 rsvd2[7];
1564         u8 pvid[16];
1565         u8 rsvd3[32];
1566         u8 rsvd4[32];
1567         u8 rsvd5[32];
1568 } __packed;
1569
1570 struct be_cmd_req_set_hsw_config {
1571         struct be_cmd_req_hdr hdr;
1572         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1573 } __packed;
1574
1575 struct be_cmd_resp_set_hsw_config {
1576         struct be_cmd_resp_hdr hdr;
1577         u32 rsvd;
1578 };
1579
1580 struct amap_get_hsw_req_context {
1581         u8 interface_id[16];
1582         u8 rsvd0[14];
1583         u8 pvid_valid;
1584         u8 pport;
1585 } __packed;
1586
1587 struct amap_get_hsw_resp_context {
1588         u8 rsvd0[6];
1589         u8 port_fwd_type[3];
1590         u8 rsvd1[7];
1591         u8 pvid[16];
1592         u8 rsvd2[32];
1593         u8 rsvd3[32];
1594         u8 rsvd4[32];
1595 } __packed;
1596
1597 struct be_cmd_req_get_hsw_config {
1598         struct be_cmd_req_hdr hdr;
1599         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1600 } __packed;
1601
1602 struct be_cmd_resp_get_hsw_config {
1603         struct be_cmd_resp_hdr hdr;
1604         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1605         u32 rsvd;
1606 };
1607
1608 /******************* get port names ***************/
1609 struct be_cmd_req_get_port_name {
1610         struct be_cmd_req_hdr hdr;
1611         u32 rsvd0;
1612 };
1613
1614 struct be_cmd_resp_get_port_name {
1615         struct be_cmd_req_hdr hdr;
1616         u8 port_name[4];
1617 };
1618
1619 /*************** HW Stats Get v1 **********************************/
1620 #define BE_TXP_SW_SZ                    48
1621 struct be_port_rxf_stats_v1 {
1622         u32 rsvd0[12];
1623         u32 rx_crc_errors;
1624         u32 rx_alignment_symbol_errors;
1625         u32 rx_pause_frames;
1626         u32 rx_priority_pause_frames;
1627         u32 rx_control_frames;
1628         u32 rx_in_range_errors;
1629         u32 rx_out_range_errors;
1630         u32 rx_frame_too_long;
1631         u32 rx_address_filtered;
1632         u32 rx_dropped_too_small;
1633         u32 rx_dropped_too_short;
1634         u32 rx_dropped_header_too_small;
1635         u32 rx_dropped_tcp_length;
1636         u32 rx_dropped_runt;
1637         u32 rsvd1[10];
1638         u32 rx_ip_checksum_errs;
1639         u32 rx_tcp_checksum_errs;
1640         u32 rx_udp_checksum_errs;
1641         u32 rsvd2[7];
1642         u32 rx_switched_unicast_packets;
1643         u32 rx_switched_multicast_packets;
1644         u32 rx_switched_broadcast_packets;
1645         u32 rsvd3[3];
1646         u32 tx_pauseframes;
1647         u32 tx_priority_pauseframes;
1648         u32 tx_controlframes;
1649         u32 rsvd4[10];
1650         u32 rxpp_fifo_overflow_drop;
1651         u32 rx_input_fifo_overflow_drop;
1652         u32 pmem_fifo_overflow_drop;
1653         u32 jabber_events;
1654         u32 rsvd5[3];
1655 };
1656
1657
1658 struct be_rxf_stats_v1 {
1659         struct be_port_rxf_stats_v1 port[4];
1660         u32 rsvd0[2];
1661         u32 rx_drops_no_pbuf;
1662         u32 rx_drops_no_txpb;
1663         u32 rx_drops_no_erx_descr;
1664         u32 rx_drops_no_tpre_descr;
1665         u32 rsvd1[6];
1666         u32 rx_drops_too_many_frags;
1667         u32 rx_drops_invalid_ring;
1668         u32 forwarded_packets;
1669         u32 rx_drops_mtu;
1670         u32 rsvd2[14];
1671 };
1672
1673 struct be_erx_stats_v1 {
1674         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1675         u32 rsvd[4];
1676 };
1677
1678 struct be_port_rxf_stats_v2 {
1679         u32 rsvd0[10];
1680         u32 roce_bytes_received_lsd;
1681         u32 roce_bytes_received_msd;
1682         u32 rsvd1[5];
1683         u32 roce_frames_received;
1684         u32 rx_crc_errors;
1685         u32 rx_alignment_symbol_errors;
1686         u32 rx_pause_frames;
1687         u32 rx_priority_pause_frames;
1688         u32 rx_control_frames;
1689         u32 rx_in_range_errors;
1690         u32 rx_out_range_errors;
1691         u32 rx_frame_too_long;
1692         u32 rx_address_filtered;
1693         u32 rx_dropped_too_small;
1694         u32 rx_dropped_too_short;
1695         u32 rx_dropped_header_too_small;
1696         u32 rx_dropped_tcp_length;
1697         u32 rx_dropped_runt;
1698         u32 rsvd2[10];
1699         u32 rx_ip_checksum_errs;
1700         u32 rx_tcp_checksum_errs;
1701         u32 rx_udp_checksum_errs;
1702         u32 rsvd3[7];
1703         u32 rx_switched_unicast_packets;
1704         u32 rx_switched_multicast_packets;
1705         u32 rx_switched_broadcast_packets;
1706         u32 rsvd4[3];
1707         u32 tx_pauseframes;
1708         u32 tx_priority_pauseframes;
1709         u32 tx_controlframes;
1710         u32 rsvd5[10];
1711         u32 rxpp_fifo_overflow_drop;
1712         u32 rx_input_fifo_overflow_drop;
1713         u32 pmem_fifo_overflow_drop;
1714         u32 jabber_events;
1715         u32 rsvd6[3];
1716         u32 rx_drops_payload_size;
1717         u32 rx_drops_clipped_header;
1718         u32 rx_drops_crc;
1719         u32 roce_drops_payload_len;
1720         u32 roce_drops_crc;
1721         u32 rsvd7[19];
1722 };
1723
1724 struct be_rxf_stats_v2 {
1725         struct be_port_rxf_stats_v2 port[4];
1726         u32 rsvd0[2];
1727         u32 rx_drops_no_pbuf;
1728         u32 rx_drops_no_txpb;
1729         u32 rx_drops_no_erx_descr;
1730         u32 rx_drops_no_tpre_descr;
1731         u32 rsvd1[6];
1732         u32 rx_drops_too_many_frags;
1733         u32 rx_drops_invalid_ring;
1734         u32 forwarded_packets;
1735         u32 rx_drops_mtu;
1736         u32 rsvd2[35];
1737 };
1738
1739 struct be_hw_stats_v1 {
1740         struct be_rxf_stats_v1 rxf;
1741         u32 rsvd0[BE_TXP_SW_SZ];
1742         struct be_erx_stats_v1 erx;
1743         struct be_pmem_stats pmem;
1744         u32 rsvd1[18];
1745 };
1746
1747 struct be_cmd_req_get_stats_v1 {
1748         struct be_cmd_req_hdr hdr;
1749         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1750 };
1751
1752 struct be_cmd_resp_get_stats_v1 {
1753         struct be_cmd_resp_hdr hdr;
1754         struct be_hw_stats_v1 hw_stats;
1755 };
1756
1757 struct be_erx_stats_v2 {
1758         u32 rx_drops_no_fragments[136];     /* dwordS 0 to 135*/
1759         u32 rsvd[3];
1760 };
1761
1762 struct be_hw_stats_v2 {
1763         struct be_rxf_stats_v2 rxf;
1764         u32 rsvd0[BE_TXP_SW_SZ];
1765         struct be_erx_stats_v2 erx;
1766         struct be_pmem_stats pmem;
1767         u32 rsvd1[18];
1768 };
1769
1770 struct be_cmd_req_get_stats_v2 {
1771         struct be_cmd_req_hdr hdr;
1772         u8 rsvd[sizeof(struct be_hw_stats_v2)];
1773 };
1774
1775 struct be_cmd_resp_get_stats_v2 {
1776         struct be_cmd_resp_hdr hdr;
1777         struct be_hw_stats_v2 hw_stats;
1778 };
1779
1780 /************** get fat capabilites *******************/
1781 #define MAX_MODULES 27
1782 #define MAX_MODES 4
1783 #define MODE_UART 0
1784 #define FW_LOG_LEVEL_DEFAULT 48
1785 #define FW_LOG_LEVEL_FATAL 64
1786
1787 struct ext_fat_mode {
1788         u8 mode;
1789         u8 rsvd0;
1790         u16 port_mask;
1791         u32 dbg_lvl;
1792         u64 fun_mask;
1793 } __packed;
1794
1795 struct ext_fat_modules {
1796         u8 modules_str[32];
1797         u32 modules_id;
1798         u32 num_modes;
1799         struct ext_fat_mode trace_lvl[MAX_MODES];
1800 } __packed;
1801
1802 struct be_fat_conf_params {
1803         u32 max_log_entries;
1804         u32 log_entry_size;
1805         u8 log_type;
1806         u8 max_log_funs;
1807         u8 max_log_ports;
1808         u8 rsvd0;
1809         u32 supp_modes;
1810         u32 num_modules;
1811         struct ext_fat_modules module[MAX_MODULES];
1812 } __packed;
1813
1814 struct be_cmd_req_get_ext_fat_caps {
1815         struct be_cmd_req_hdr hdr;
1816         u32 parameter_type;
1817 };
1818
1819 struct be_cmd_resp_get_ext_fat_caps {
1820         struct be_cmd_resp_hdr hdr;
1821         struct be_fat_conf_params get_params;
1822 };
1823
1824 struct be_cmd_req_set_ext_fat_caps {
1825         struct be_cmd_req_hdr hdr;
1826         struct be_fat_conf_params set_params;
1827 };
1828
1829 #define RESOURCE_DESC_SIZE_V0                   72
1830 #define RESOURCE_DESC_SIZE_V1                   88
1831 #define PCIE_RESOURCE_DESC_TYPE_V0              0x40
1832 #define NIC_RESOURCE_DESC_TYPE_V0               0x41
1833 #define PCIE_RESOURCE_DESC_TYPE_V1              0x50
1834 #define NIC_RESOURCE_DESC_TYPE_V1               0x51
1835 #define PORT_RESOURCE_DESC_TYPE_V1              0x55
1836 #define MAX_RESOURCE_DESC                       264
1837
1838 #define IMM_SHIFT                               6       /* Immediate */
1839 #define NOSV_SHIFT                              7       /* No save */
1840
1841 struct be_res_desc_hdr {
1842         u8 desc_type;
1843         u8 desc_len;
1844 } __packed;
1845
1846 struct be_port_res_desc {
1847         struct be_res_desc_hdr hdr;
1848         u8 rsvd0;
1849         u8 flags;
1850         u8 link_num;
1851         u8 mc_type;
1852         u16 rsvd1;
1853
1854 #define NV_TYPE_MASK                            0x3     /* bits 0-1 */
1855 #define NV_TYPE_DISABLED                        1
1856 #define NV_TYPE_VXLAN                           3
1857 #define SOCVID_SHIFT                            2       /* Strip outer vlan */
1858 #define RCVID_SHIFT                             4       /* Report vlan */
1859         u8 nv_flags;
1860         u8 rsvd2;
1861         __le16 nv_port;                                 /* vxlan/gre port */
1862         u32 rsvd3[19];
1863 } __packed;
1864
1865 struct be_pcie_res_desc {
1866         struct be_res_desc_hdr hdr;
1867         u8 rsvd0;
1868         u8 flags;
1869         u16 rsvd1;
1870         u8 pf_num;
1871         u8 rsvd2;
1872         u32 rsvd3;
1873         u8 sriov_state;
1874         u8 pf_state;
1875         u8 pf_type;
1876         u8 rsvd4;
1877         u16 num_vfs;
1878         u16 rsvd5;
1879         u32 rsvd6[17];
1880 } __packed;
1881
1882 struct be_nic_res_desc {
1883         struct be_res_desc_hdr hdr;
1884         u8 rsvd1;
1885
1886 #define QUN_SHIFT                               4 /* QoS is in absolute units */
1887         u8 flags;
1888         u8 vf_num;
1889         u8 rsvd2;
1890         u8 pf_num;
1891         u8 rsvd3;
1892         u16 unicast_mac_count;
1893         u8 rsvd4[6];
1894         u16 mcc_count;
1895         u16 vlan_count;
1896         u16 mcast_mac_count;
1897         u16 txq_count;
1898         u16 rq_count;
1899         u16 rssq_count;
1900         u16 lro_count;
1901         u16 cq_count;
1902         u16 toe_conn_count;
1903         u16 eq_count;
1904         u16 vlan_id;
1905         u16 iface_count;
1906         u32 cap_flags;
1907         u8 link_param;
1908         u8 rsvd6;
1909         u16 channel_id_param;
1910         u32 bw_min;
1911         u32 bw_max;
1912         u8 acpi_params;
1913         u8 wol_param;
1914         u16 rsvd7;
1915         u16 tunnel_iface_count;
1916         u16 direct_tenant_iface_count;
1917         u32 rsvd8[6];
1918 } __packed;
1919
1920 /************ Multi-Channel type ***********/
1921 enum mc_type {
1922         MC_NONE = 0x01,
1923         UMC = 0x02,
1924         FLEX10 = 0x03,
1925         vNIC1 = 0x04,
1926         nPAR = 0x05,
1927         UFP = 0x06,
1928         vNIC2 = 0x07
1929 };
1930
1931 /* Is BE in a multi-channel mode */
1932 static inline bool be_is_mc(struct be_adapter *adapter)
1933 {
1934         return adapter->mc_type > MC_NONE;
1935 }
1936
1937 struct be_cmd_req_get_func_config {
1938         struct be_cmd_req_hdr hdr;
1939 };
1940
1941 struct be_cmd_resp_get_func_config {
1942         struct be_cmd_resp_hdr hdr;
1943         u32 desc_count;
1944         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1945 };
1946
1947 #define ACTIVE_PROFILE_TYPE                     0x2
1948 struct be_cmd_req_get_profile_config {
1949         struct be_cmd_req_hdr hdr;
1950         u8 rsvd;
1951         u8 type;
1952         u16 rsvd1;
1953 };
1954
1955 struct be_cmd_resp_get_profile_config {
1956         struct be_cmd_resp_hdr hdr;
1957         u32 desc_count;
1958         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1959 };
1960
1961 struct be_cmd_req_set_profile_config {
1962         struct be_cmd_req_hdr hdr;
1963         u32 rsvd;
1964         u32 desc_count;
1965         u8 desc[RESOURCE_DESC_SIZE_V1];
1966 };
1967
1968 struct be_cmd_resp_set_profile_config {
1969         struct be_cmd_resp_hdr hdr;
1970 };
1971
1972 struct be_cmd_req_get_active_profile {
1973         struct be_cmd_req_hdr hdr;
1974         u32 rsvd;
1975 } __packed;
1976
1977 struct be_cmd_resp_get_active_profile {
1978         struct be_cmd_resp_hdr hdr;
1979         u16 active_profile_id;
1980         u16 next_profile_id;
1981 } __packed;
1982
1983 struct be_cmd_enable_disable_vf {
1984         struct be_cmd_req_hdr hdr;
1985         u8 enable;
1986         u8 rsvd[3];
1987 };
1988
1989 struct be_cmd_req_intr_set {
1990         struct be_cmd_req_hdr hdr;
1991         u8 intr_enabled;
1992         u8 rsvd[3];
1993 };
1994
1995 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
1996 {
1997         return flags & adapter->cmd_privileges ? true : false;
1998 }
1999
2000 /************** Get IFACE LIST *******************/
2001 struct be_if_desc {
2002         u32 if_id;
2003         u32 cap_flags;
2004         u32 en_flags;
2005 };
2006
2007 struct be_cmd_req_get_iface_list {
2008         struct be_cmd_req_hdr hdr;
2009 };
2010
2011 struct be_cmd_resp_get_iface_list {
2012         struct be_cmd_req_hdr hdr;
2013         u32 if_cnt;
2014         struct be_if_desc if_desc;
2015 };
2016
2017 /*************** Set logical link ********************/
2018 #define PLINK_TRACK_SHIFT       8
2019 struct be_cmd_req_set_ll_link {
2020         struct be_cmd_req_hdr hdr;
2021         u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2022 };
2023
2024 /************** Manage IFACE Filters *******************/
2025 #define OP_CONVERT_NORMAL_TO_TUNNEL             0
2026 #define OP_CONVERT_TUNNEL_TO_NORMAL             1
2027
2028 struct be_cmd_req_manage_iface_filters {
2029         struct be_cmd_req_hdr hdr;
2030         u8  op;
2031         u8  rsvd0;
2032         u8  flags;
2033         u8  rsvd1;
2034         u32 tunnel_iface_id;
2035         u32 target_iface_id;
2036         u8  mac[6];
2037         u16 vlan_tag;
2038         u32 tenant_id;
2039         u32 filter_id;
2040         u32 cap_flags;
2041         u32 cap_control_flags;
2042 } __packed;
2043
2044 int be_pci_fnum_get(struct be_adapter *adapter);
2045 int be_fw_wait_ready(struct be_adapter *adapter);
2046 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
2047                           bool permanent, u32 if_handle, u32 pmac_id);
2048 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
2049                     u32 *pmac_id, u32 domain);
2050 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
2051                     u32 domain);
2052 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
2053                      u32 *if_handle, u32 domain);
2054 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
2055 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
2056 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
2057                      struct be_queue_info *eq, bool no_delay,
2058                      int num_cqe_dma_coalesce);
2059 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
2060                        struct be_queue_info *cq);
2061 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
2062 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
2063                       u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
2064 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
2065                      int type);
2066 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
2067 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2068                              u8 *link_status, u32 dom);
2069 int be_cmd_reset(struct be_adapter *adapter);
2070 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
2071 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
2072                                struct be_dma_mem *nonemb_cmd);
2073 int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
2074                       char *fw_on_flash);
2075 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
2076 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2077                        u32 num);
2078 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
2079 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
2080 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2081 int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
2082                         u32 *function_mode, u32 *function_caps, u16 *asic_rev);
2083 int be_cmd_reset_function(struct be_adapter *adapter);
2084 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2085                       u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
2086 int be_process_mcc(struct be_adapter *adapter);
2087 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
2088                             u8 status, u8 state);
2089 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
2090                             u32 *state);
2091 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2092                           u32 flash_oper, u32 flash_opcode, u32 buf_size);
2093 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2094                             u32 data_size, u32 data_offset,
2095                             const char *obj_name, u32 *data_written,
2096                             u8 *change_status, u8 *addn_status);
2097 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2098                            u32 data_size, u32 data_offset, const char *obj_name,
2099                            u32 *data_read, u32 *eof, u8 *addn_status);
2100 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2101                           u16 optype, int offset);
2102 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2103                             struct be_dma_mem *nonemb_cmd);
2104 int be_cmd_fw_init(struct be_adapter *adapter);
2105 int be_cmd_fw_clean(struct be_adapter *adapter);
2106 void be_async_mcc_enable(struct be_adapter *adapter);
2107 void be_async_mcc_disable(struct be_adapter *adapter);
2108 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2109                          u32 loopback_type, u32 pkt_size, u32 num_pkts,
2110                          u64 pattern);
2111 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2112                         struct be_dma_mem *cmd);
2113 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2114                             struct be_dma_mem *nonemb_cmd);
2115 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2116                         u8 loopback_type, u8 enable);
2117 int be_cmd_get_phy_info(struct be_adapter *adapter);
2118 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
2119                       u16 link_speed, u8 domain);
2120 void be_detect_error(struct be_adapter *adapter);
2121 int be_cmd_get_die_temperature(struct be_adapter *adapter);
2122 int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2123 int be_cmd_req_native_mode(struct be_adapter *adapter);
2124 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
2125 void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
2126 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2127                              u32 domain);
2128 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2129                              u32 vf_num);
2130 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2131                              bool *pmac_id_active, u32 *pmac_id,
2132                              u32 if_handle, u8 domain);
2133 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2134                           u32 if_handle, bool active, u32 domain);
2135 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
2136 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
2137                         u32 domain);
2138 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
2139 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2140                           u16 intf_id, u16 hsw_mode);
2141 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2142                           u16 intf_id, u8 *mode);
2143 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2144 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2145 int be_cmd_get_fw_log_level(struct be_adapter *adapter);
2146 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
2147                                    struct be_dma_mem *cmd);
2148 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2149                                    struct be_dma_mem *cmd,
2150                                    struct be_fat_conf_params *cfgs);
2151 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
2152 int lancer_initiate_dump(struct be_adapter *adapter);
2153 bool dump_present(struct be_adapter *adapter);
2154 int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
2155 int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
2156 int be_cmd_get_func_config(struct be_adapter *adapter,
2157                            struct be_resources *res);
2158 int be_cmd_get_profile_config(struct be_adapter *adapter,
2159                               struct be_resources *res, u8 domain);
2160 int be_cmd_set_profile_config(struct be_adapter *adapter, void *desc,
2161                               int size, u8 version, u8 domain);
2162 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
2163 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
2164                      int vf_num);
2165 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2166 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2167 int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2168                                           int link_state, u8 domain);
2169 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2170 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);