1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* Linux PRO/1000 Ethernet Driver main header file */
34 #include <linux/bitops.h>
35 #include <linux/types.h>
36 #include <linux/timer.h>
37 #include <linux/workqueue.h>
39 #include <linux/netdevice.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/crc32.h>
43 #include <linux/if_vlan.h>
49 #define e_dbg(format, arg...) \
50 netdev_dbg(hw->adapter->netdev, format, ## arg)
51 #define e_err(format, arg...) \
52 netdev_err(adapter->netdev, format, ## arg)
53 #define e_info(format, arg...) \
54 netdev_info(adapter->netdev, format, ## arg)
55 #define e_warn(format, arg...) \
56 netdev_warn(adapter->netdev, format, ## arg)
57 #define e_notice(format, arg...) \
58 netdev_notice(adapter->netdev, format, ## arg)
61 /* Interrupt modes, as used by the IntMode parameter */
62 #define E1000E_INT_MODE_LEGACY 0
63 #define E1000E_INT_MODE_MSI 1
64 #define E1000E_INT_MODE_MSIX 2
66 /* Tx/Rx descriptor defines */
67 #define E1000_DEFAULT_TXD 256
68 #define E1000_MAX_TXD 4096
69 #define E1000_MIN_TXD 64
71 #define E1000_DEFAULT_RXD 256
72 #define E1000_MAX_RXD 4096
73 #define E1000_MIN_RXD 64
75 #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
76 #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
78 /* Early Receive defines */
79 #define E1000_ERT_2048 0x100
81 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
83 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
84 /* How many Rx Buffers do we bundle into one write to the hardware ? */
85 #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
87 #define AUTO_ALL_MODES 0
88 #define E1000_EEPROM_APME 0x0400
90 #define E1000_MNG_VLAN_NONE (-1)
92 /* Number of packet split data buffers (not including the header buffer) */
93 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
95 #define DEFAULT_JUMBO 9234
97 /* BM/HV Specific Registers */
98 #define BM_PORT_CTRL_PAGE 769
100 #define PHY_UPPER_SHIFT 21
101 #define BM_PHY_REG(page, reg) \
102 (((reg) & MAX_PHY_REG_ADDRESS) |\
103 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
104 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
106 /* PHY Wakeup Registers and defines */
107 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
108 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
109 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
110 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
111 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
112 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
113 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
114 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
115 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
116 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
118 #define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
119 #define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
120 #define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
121 #define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
122 #define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
123 #define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
124 #define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
126 #define HV_STATS_PAGE 778
127 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
128 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
129 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
130 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
131 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
132 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
133 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
134 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
135 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
136 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
137 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
138 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
139 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
140 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
142 #define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
144 /* BM PHY Copper Specific Status */
145 #define BM_CS_STATUS 17
146 #define BM_CS_STATUS_LINK_UP 0x0400
147 #define BM_CS_STATUS_RESOLVED 0x0800
148 #define BM_CS_STATUS_SPEED_MASK 0xC000
149 #define BM_CS_STATUS_SPEED_1000 0x8000
151 /* 82577 Mobile Phy Status Register */
152 #define HV_M_STATUS 26
153 #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
154 #define HV_M_STATUS_SPEED_MASK 0x0300
155 #define HV_M_STATUS_SPEED_1000 0x0200
156 #define HV_M_STATUS_LINK_UP 0x0040
158 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
159 #define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000
161 /* Time to wait before putting the device into D3 if there's no link (in ms). */
162 #define LINK_TIMEOUT 100
164 #define DEFAULT_RDTR 0
165 #define DEFAULT_RADV 8
166 #define BURST_RDTR 0x20
167 #define BURST_RADV 0x20
170 * in the case of WTHRESH, it appears at least the 82571/2 hardware
171 * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
172 * WTHRESH=4, and since we want 64 bytes at a time written back, set
175 #define E1000_TXDCTL_DMA_BURST_ENABLE \
176 (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
177 E1000_TXDCTL_COUNT_DESC | \
178 (5 << 16) | /* wthresh must be +1 more than desired */\
179 (1 << 8) | /* hthresh */ \
182 #define E1000_RXDCTL_DMA_BURST_ENABLE \
183 (0x01000000 | /* set descriptor granularity */ \
184 (4 << 16) | /* set writeback threshold */ \
185 (4 << 8) | /* set prefetch threshold */ \
186 0x20) /* set hthresh */
188 #define E1000_TIDV_FPD (1 << 31)
189 #define E1000_RDTR_FPD (1 << 31)
205 struct e1000_ps_page
{
207 u64 dma
; /* must be u64 - written to hw */
211 * wrappers around a pointer to a socket buffer,
212 * so a DMA handle can be stored along with the buffer
214 struct e1000_buffer
{
220 unsigned long time_stamp
;
224 unsigned int bytecount
;
229 /* arrays of page information for packet split */
230 struct e1000_ps_page
*ps_pages
;
237 void *desc
; /* pointer to ring memory */
238 dma_addr_t dma
; /* phys address of ring */
239 unsigned int size
; /* length of ring in bytes */
240 unsigned int count
; /* number of desc. in ring */
248 /* array of buffer information structs */
249 struct e1000_buffer
*buffer_info
;
251 char name
[IFNAMSIZ
+ 5];
254 void __iomem
*itr_register
;
257 struct sk_buff
*rx_skb_top
;
260 /* PHY register snapshot values */
261 struct e1000_phy_regs
{
262 u16 bmcr
; /* basic mode control register */
263 u16 bmsr
; /* basic mode status register */
264 u16 advertise
; /* auto-negotiation advertisement */
265 u16 lpa
; /* link partner ability register */
266 u16 expansion
; /* auto-negotiation expansion reg */
267 u16 ctrl1000
; /* 1000BASE-T control register */
268 u16 stat1000
; /* 1000BASE-T status register */
269 u16 estatus
; /* extended status register */
272 /* board specific private data structure */
273 struct e1000_adapter
{
274 struct timer_list watchdog_timer
;
275 struct timer_list phy_info_timer
;
276 struct timer_list blink_timer
;
278 struct work_struct reset_task
;
279 struct work_struct watchdog_task
;
281 const struct e1000_info
*ei
;
283 unsigned long active_vlans
[BITS_TO_LONGS(VLAN_N_VID
)];
291 /* track device up/down/testing state */
294 /* Interrupt Throttle Rate */
303 struct e1000_ring
*tx_ring
/* One per active queue */
304 ____cacheline_aligned_in_smp
;
306 struct napi_struct napi
;
308 unsigned int restart_queue
;
312 bool tx_hang_recheck
;
313 u8 tx_timeout_factor
;
316 u32 tx_abs_int_delay
;
318 unsigned int total_tx_bytes
;
319 unsigned int total_tx_packets
;
320 unsigned int total_rx_bytes
;
321 unsigned int total_rx_packets
;
328 u32 tx_timeout_count
;
337 bool (*clean_rx
) (struct e1000_adapter
*adapter
,
338 int *work_done
, int work_to_do
)
339 ____cacheline_aligned_in_smp
;
340 void (*alloc_rx_buf
) (struct e1000_adapter
*adapter
,
341 int cleaned_count
, gfp_t gfp
);
342 struct e1000_ring
*rx_ring
;
345 u32 rx_abs_int_delay
;
353 u32 alloc_rx_buff_failed
;
356 unsigned int rx_ps_pages
;
361 /* OS defined structs */
362 struct net_device
*netdev
;
363 struct pci_dev
*pdev
;
365 /* structs defined in e1000_hw.h */
368 spinlock_t stats64_lock
;
369 struct e1000_hw_stats stats
;
370 struct e1000_phy_info phy_info
;
371 struct e1000_phy_stats phy_stats
;
373 /* Snapshot of PHY registers */
374 struct e1000_phy_regs phy_regs
;
376 struct e1000_ring test_tx_ring
;
377 struct e1000_ring test_rx_ring
;
381 unsigned int num_vectors
;
382 struct msix_entry
*msix_entries
;
389 u32 max_hw_frame_size
;
395 struct work_struct downshift_task
;
396 struct work_struct update_phy_task
;
397 struct work_struct print_hang_task
;
404 enum e1000_mac_type mac
;
408 u32 max_hw_frame_size
;
409 s32 (*get_variants
)(struct e1000_adapter
*);
410 const struct e1000_mac_operations
*mac_ops
;
411 const struct e1000_phy_operations
*phy_ops
;
412 const struct e1000_nvm_operations
*nvm_ops
;
415 /* hardware capability, feature, and workaround flags */
416 #define FLAG_HAS_AMT (1 << 0)
417 #define FLAG_HAS_FLASH (1 << 1)
418 #define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
419 #define FLAG_HAS_WOL (1 << 3)
420 #define FLAG_HAS_ERT (1 << 4)
421 #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
422 #define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
423 #define FLAG_HAS_JUMBO_FRAMES (1 << 7)
424 #define FLAG_READ_ONLY_NVM (1 << 8)
425 #define FLAG_IS_ICH (1 << 9)
426 #define FLAG_HAS_MSIX (1 << 10)
427 #define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
428 #define FLAG_IS_QUAD_PORT_A (1 << 12)
429 #define FLAG_IS_QUAD_PORT (1 << 13)
430 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
431 #define FLAG_APME_IN_WUC (1 << 15)
432 #define FLAG_APME_IN_CTRL3 (1 << 16)
433 #define FLAG_APME_CHECK_PORT_B (1 << 17)
434 #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
435 #define FLAG_NO_WAKE_UCAST (1 << 19)
436 #define FLAG_MNG_PT_ENABLED (1 << 20)
437 #define FLAG_RESET_OVERWRITES_LAA (1 << 21)
438 #define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
439 #define FLAG_TARC_SET_BIT_ZERO (1 << 23)
440 #define FLAG_RX_NEEDS_RESTART (1 << 24)
441 #define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
442 #define FLAG_SMART_POWER_DOWN (1 << 26)
443 #define FLAG_MSI_ENABLED (1 << 27)
444 /* reserved (1 << 28) */
445 #define FLAG_TSO_FORCE (1 << 29)
446 #define FLAG_RX_RESTART_NOW (1 << 30)
447 #define FLAG_MSI_TEST_FAILED (1 << 31)
449 #define FLAG2_CRC_STRIPPING (1 << 0)
450 #define FLAG2_HAS_PHY_WAKEUP (1 << 1)
451 #define FLAG2_IS_DISCARDING (1 << 2)
452 #define FLAG2_DISABLE_ASPM_L1 (1 << 3)
453 #define FLAG2_HAS_PHY_STATS (1 << 4)
454 #define FLAG2_HAS_EEE (1 << 5)
455 #define FLAG2_DMA_BURST (1 << 6)
456 #define FLAG2_DISABLE_ASPM_L0S (1 << 7)
457 #define FLAG2_DISABLE_AIM (1 << 8)
458 #define FLAG2_CHECK_PHY_HANG (1 << 9)
459 #define FLAG2_NO_DISABLE_RX (1 << 10)
460 #define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
462 #define E1000_RX_DESC_PS(R, i) \
463 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
464 #define E1000_RX_DESC_EXT(R, i) \
465 (&(((union e1000_rx_desc_extended *)((R).desc))[i]))
466 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
467 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
468 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
473 __E1000_ACCESS_SHARED_RESOURCE
,
481 latency_invalid
= 255
484 extern char e1000e_driver_name
[];
485 extern const char e1000e_driver_version
[];
487 extern void e1000e_check_options(struct e1000_adapter
*adapter
);
488 extern void e1000e_set_ethtool_ops(struct net_device
*netdev
);
490 extern int e1000e_up(struct e1000_adapter
*adapter
);
491 extern void e1000e_down(struct e1000_adapter
*adapter
);
492 extern void e1000e_reinit_locked(struct e1000_adapter
*adapter
);
493 extern void e1000e_reset(struct e1000_adapter
*adapter
);
494 extern void e1000e_power_up_phy(struct e1000_adapter
*adapter
);
495 extern int e1000e_setup_rx_resources(struct e1000_adapter
*adapter
);
496 extern int e1000e_setup_tx_resources(struct e1000_adapter
*adapter
);
497 extern void e1000e_free_rx_resources(struct e1000_adapter
*adapter
);
498 extern void e1000e_free_tx_resources(struct e1000_adapter
*adapter
);
499 extern struct rtnl_link_stats64
*e1000e_get_stats64(struct net_device
*netdev
,
500 struct rtnl_link_stats64
502 extern void e1000e_set_interrupt_capability(struct e1000_adapter
*adapter
);
503 extern void e1000e_reset_interrupt_capability(struct e1000_adapter
*adapter
);
504 extern void e1000e_get_hw_control(struct e1000_adapter
*adapter
);
505 extern void e1000e_release_hw_control(struct e1000_adapter
*adapter
);
507 extern unsigned int copybreak
;
509 extern char *e1000e_get_hw_dev_name(struct e1000_hw
*hw
);
511 extern const struct e1000_info e1000_82571_info
;
512 extern const struct e1000_info e1000_82572_info
;
513 extern const struct e1000_info e1000_82573_info
;
514 extern const struct e1000_info e1000_82574_info
;
515 extern const struct e1000_info e1000_82583_info
;
516 extern const struct e1000_info e1000_ich8_info
;
517 extern const struct e1000_info e1000_ich9_info
;
518 extern const struct e1000_info e1000_ich10_info
;
519 extern const struct e1000_info e1000_pch_info
;
520 extern const struct e1000_info e1000_pch2_info
;
521 extern const struct e1000_info e1000_es2_info
;
523 extern s32
e1000_read_pba_string_generic(struct e1000_hw
*hw
, u8
*pba_num
,
526 extern s32
e1000e_commit_phy(struct e1000_hw
*hw
);
528 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw
*hw
);
530 extern bool e1000e_get_laa_state_82571(struct e1000_hw
*hw
);
531 extern void e1000e_set_laa_state_82571(struct e1000_hw
*hw
, bool state
);
533 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw
*hw
);
534 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw
*hw
,
536 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw
*hw
);
537 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw
*hw
);
538 extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw
*hw
);
539 extern void e1000_resume_workarounds_pchlan(struct e1000_hw
*hw
);
540 extern s32
e1000_configure_k1_ich8lan(struct e1000_hw
*hw
, bool k1_enable
);
541 extern s32
e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw
*hw
, bool enable
);
542 extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw
*hw
);
544 extern s32
e1000e_check_for_copper_link(struct e1000_hw
*hw
);
545 extern s32
e1000e_check_for_fiber_link(struct e1000_hw
*hw
);
546 extern s32
e1000e_check_for_serdes_link(struct e1000_hw
*hw
);
547 extern s32
e1000e_setup_led_generic(struct e1000_hw
*hw
);
548 extern s32
e1000e_cleanup_led_generic(struct e1000_hw
*hw
);
549 extern s32
e1000e_led_on_generic(struct e1000_hw
*hw
);
550 extern s32
e1000e_led_off_generic(struct e1000_hw
*hw
);
551 extern s32
e1000e_get_bus_info_pcie(struct e1000_hw
*hw
);
552 extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw
*hw
);
553 extern void e1000_set_lan_id_single_port(struct e1000_hw
*hw
);
554 extern s32
e1000e_get_speed_and_duplex_copper(struct e1000_hw
*hw
, u16
*speed
, u16
*duplex
);
555 extern s32
e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw
*hw
, u16
*speed
, u16
*duplex
);
556 extern s32
e1000e_disable_pcie_master(struct e1000_hw
*hw
);
557 extern s32
e1000e_get_auto_rd_done(struct e1000_hw
*hw
);
558 extern s32
e1000e_id_led_init(struct e1000_hw
*hw
);
559 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw
*hw
);
560 extern s32
e1000e_setup_fiber_serdes_link(struct e1000_hw
*hw
);
561 extern s32
e1000e_copper_link_setup_m88(struct e1000_hw
*hw
);
562 extern s32
e1000e_copper_link_setup_igp(struct e1000_hw
*hw
);
563 extern s32
e1000e_setup_link(struct e1000_hw
*hw
);
564 extern void e1000_clear_vfta_generic(struct e1000_hw
*hw
);
565 extern void e1000e_init_rx_addrs(struct e1000_hw
*hw
, u16 rar_count
);
566 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw
*hw
,
569 extern void e1000e_rar_set(struct e1000_hw
*hw
, u8
*addr
, u32 index
);
570 extern s32
e1000e_set_fc_watermarks(struct e1000_hw
*hw
);
571 extern void e1000e_set_pcie_no_snoop(struct e1000_hw
*hw
, u32 no_snoop
);
572 extern s32
e1000e_get_hw_semaphore(struct e1000_hw
*hw
);
573 extern s32
e1000e_valid_led_default(struct e1000_hw
*hw
, u16
*data
);
574 extern void e1000e_config_collision_dist(struct e1000_hw
*hw
);
575 extern s32
e1000e_config_fc_after_link_up(struct e1000_hw
*hw
);
576 extern s32
e1000e_force_mac_fc(struct e1000_hw
*hw
);
577 extern s32
e1000e_blink_led_generic(struct e1000_hw
*hw
);
578 extern void e1000_write_vfta_generic(struct e1000_hw
*hw
, u32 offset
, u32 value
);
579 extern s32
e1000_check_alt_mac_addr_generic(struct e1000_hw
*hw
);
580 extern void e1000e_reset_adaptive(struct e1000_hw
*hw
);
581 extern void e1000e_update_adaptive(struct e1000_hw
*hw
);
583 extern s32
e1000e_setup_copper_link(struct e1000_hw
*hw
);
584 extern s32
e1000e_get_phy_id(struct e1000_hw
*hw
);
585 extern void e1000e_put_hw_semaphore(struct e1000_hw
*hw
);
586 extern s32
e1000e_check_reset_block_generic(struct e1000_hw
*hw
);
587 extern s32
e1000e_phy_force_speed_duplex_igp(struct e1000_hw
*hw
);
588 extern s32
e1000e_get_cable_length_igp_2(struct e1000_hw
*hw
);
589 extern s32
e1000e_get_phy_info_igp(struct e1000_hw
*hw
);
590 extern s32
e1000_set_page_igp(struct e1000_hw
*hw
, u16 page
);
591 extern s32
e1000e_read_phy_reg_igp(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
592 extern s32
e1000e_read_phy_reg_igp_locked(struct e1000_hw
*hw
, u32 offset
,
594 extern s32
e1000e_phy_hw_reset_generic(struct e1000_hw
*hw
);
595 extern s32
e1000e_set_d3_lplu_state(struct e1000_hw
*hw
, bool active
);
596 extern s32
e1000e_write_phy_reg_igp(struct e1000_hw
*hw
, u32 offset
, u16 data
);
597 extern s32
e1000e_write_phy_reg_igp_locked(struct e1000_hw
*hw
, u32 offset
,
599 extern s32
e1000e_phy_sw_reset(struct e1000_hw
*hw
);
600 extern s32
e1000e_phy_force_speed_duplex_m88(struct e1000_hw
*hw
);
601 extern s32
e1000e_get_cfg_done(struct e1000_hw
*hw
);
602 extern s32
e1000e_get_cable_length_m88(struct e1000_hw
*hw
);
603 extern s32
e1000e_get_phy_info_m88(struct e1000_hw
*hw
);
604 extern s32
e1000e_read_phy_reg_m88(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
605 extern s32
e1000e_write_phy_reg_m88(struct e1000_hw
*hw
, u32 offset
, u16 data
);
606 extern s32
e1000e_phy_init_script_igp3(struct e1000_hw
*hw
);
607 extern enum e1000_phy_type
e1000e_get_phy_type_from_id(u32 phy_id
);
608 extern s32
e1000e_determine_phy_address(struct e1000_hw
*hw
);
609 extern s32
e1000e_write_phy_reg_bm(struct e1000_hw
*hw
, u32 offset
, u16 data
);
610 extern s32
e1000e_read_phy_reg_bm(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
611 extern s32
e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw
*hw
,
613 extern s32
e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw
*hw
,
615 extern s32
e1000e_read_phy_reg_bm2(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
616 extern s32
e1000e_write_phy_reg_bm2(struct e1000_hw
*hw
, u32 offset
, u16 data
);
617 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw
*hw
, u16
*phy_ctrl
);
618 extern s32
e1000e_write_kmrn_reg(struct e1000_hw
*hw
, u32 offset
, u16 data
);
619 extern s32
e1000e_write_kmrn_reg_locked(struct e1000_hw
*hw
, u32 offset
,
621 extern s32
e1000e_read_kmrn_reg(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
622 extern s32
e1000e_read_kmrn_reg_locked(struct e1000_hw
*hw
, u32 offset
,
624 extern s32
e1000e_phy_has_link_generic(struct e1000_hw
*hw
, u32 iterations
,
625 u32 usec_interval
, bool *success
);
626 extern s32
e1000e_phy_reset_dsp(struct e1000_hw
*hw
);
627 extern void e1000_power_up_phy_copper(struct e1000_hw
*hw
);
628 extern void e1000_power_down_phy_copper(struct e1000_hw
*hw
);
629 extern s32
e1000e_read_phy_reg_mdic(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
630 extern s32
e1000e_write_phy_reg_mdic(struct e1000_hw
*hw
, u32 offset
, u16 data
);
631 extern s32
e1000e_check_downshift(struct e1000_hw
*hw
);
632 extern s32
e1000_read_phy_reg_hv(struct e1000_hw
*hw
, u32 offset
, u16
*data
);
633 extern s32
e1000_read_phy_reg_hv_locked(struct e1000_hw
*hw
, u32 offset
,
635 extern s32
e1000_read_phy_reg_page_hv(struct e1000_hw
*hw
, u32 offset
,
637 extern s32
e1000_write_phy_reg_hv(struct e1000_hw
*hw
, u32 offset
, u16 data
);
638 extern s32
e1000_write_phy_reg_hv_locked(struct e1000_hw
*hw
, u32 offset
,
640 extern s32
e1000_write_phy_reg_page_hv(struct e1000_hw
*hw
, u32 offset
,
642 extern s32
e1000_link_stall_workaround_hv(struct e1000_hw
*hw
);
643 extern s32
e1000_copper_link_setup_82577(struct e1000_hw
*hw
);
644 extern s32
e1000_check_polarity_82577(struct e1000_hw
*hw
);
645 extern s32
e1000_get_phy_info_82577(struct e1000_hw
*hw
);
646 extern s32
e1000_phy_force_speed_duplex_82577(struct e1000_hw
*hw
);
647 extern s32
e1000_get_cable_length_82577(struct e1000_hw
*hw
);
649 extern s32
e1000_check_polarity_m88(struct e1000_hw
*hw
);
650 extern s32
e1000_get_phy_info_ife(struct e1000_hw
*hw
);
651 extern s32
e1000_check_polarity_ife(struct e1000_hw
*hw
);
652 extern s32
e1000_phy_force_speed_duplex_ife(struct e1000_hw
*hw
);
653 extern s32
e1000_check_polarity_igp(struct e1000_hw
*hw
);
654 extern bool e1000_check_phy_82574(struct e1000_hw
*hw
);
656 static inline s32
e1000_phy_hw_reset(struct e1000_hw
*hw
)
658 return hw
->phy
.ops
.reset(hw
);
661 static inline s32
e1000_check_reset_block(struct e1000_hw
*hw
)
663 return hw
->phy
.ops
.check_reset_block(hw
);
666 static inline s32
e1e_rphy(struct e1000_hw
*hw
, u32 offset
, u16
*data
)
668 return hw
->phy
.ops
.read_reg(hw
, offset
, data
);
671 static inline s32
e1e_wphy(struct e1000_hw
*hw
, u32 offset
, u16 data
)
673 return hw
->phy
.ops
.write_reg(hw
, offset
, data
);
676 static inline s32
e1000_get_cable_length(struct e1000_hw
*hw
)
678 return hw
->phy
.ops
.get_cable_length(hw
);
681 extern s32
e1000e_acquire_nvm(struct e1000_hw
*hw
);
682 extern s32
e1000e_write_nvm_spi(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
);
683 extern s32
e1000e_update_nvm_checksum_generic(struct e1000_hw
*hw
);
684 extern s32
e1000e_poll_eerd_eewr_done(struct e1000_hw
*hw
, int ee_reg
);
685 extern s32
e1000e_read_nvm_eerd(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
);
686 extern s32
e1000e_validate_nvm_checksum_generic(struct e1000_hw
*hw
);
687 extern void e1000e_release_nvm(struct e1000_hw
*hw
);
688 extern void e1000e_reload_nvm(struct e1000_hw
*hw
);
689 extern s32
e1000_read_mac_addr_generic(struct e1000_hw
*hw
);
691 static inline s32
e1000e_read_mac_addr(struct e1000_hw
*hw
)
693 if (hw
->mac
.ops
.read_mac_addr
)
694 return hw
->mac
.ops
.read_mac_addr(hw
);
696 return e1000_read_mac_addr_generic(hw
);
699 static inline s32
e1000_validate_nvm_checksum(struct e1000_hw
*hw
)
701 return hw
->nvm
.ops
.validate(hw
);
704 static inline s32
e1000e_update_nvm_checksum(struct e1000_hw
*hw
)
706 return hw
->nvm
.ops
.update(hw
);
709 static inline s32
e1000_read_nvm(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
711 return hw
->nvm
.ops
.read(hw
, offset
, words
, data
);
714 static inline s32
e1000_write_nvm(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
716 return hw
->nvm
.ops
.write(hw
, offset
, words
, data
);
719 static inline s32
e1000_get_phy_info(struct e1000_hw
*hw
)
721 return hw
->phy
.ops
.get_info(hw
);
724 static inline s32
e1000e_check_mng_mode(struct e1000_hw
*hw
)
726 return hw
->mac
.ops
.check_mng_mode(hw
);
729 extern bool e1000e_check_mng_mode_generic(struct e1000_hw
*hw
);
730 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw
*hw
);
731 extern s32
e1000e_mng_write_dhcp_info(struct e1000_hw
*hw
, u8
*buffer
, u16 length
);
733 static inline u32
__er32(struct e1000_hw
*hw
, unsigned long reg
)
735 return readl(hw
->hw_addr
+ reg
);
738 static inline void __ew32(struct e1000_hw
*hw
, unsigned long reg
, u32 val
)
740 writel(val
, hw
->hw_addr
+ reg
);
743 #endif /* _E1000_H_ */