drivers/net/ethernet/intel/fm10k/fm10k.h

   1 /* Intel Ethernet Switch Host Interface Driver
   2  * Copyright(c) 2013 - 2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19  */
  20
  21 #ifndef _FM10K_H_
  22 #define _FM10K_H_
  23
  24 #include <linux/types.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/rtnetlink.h>
  27 #include <linux/if_vlan.h>
  28 #include <linux/pci.h>
  29 #include <linux/net_tstamp.h>
  30 #include <linux/clocksource.h>
  31 #include <linux/ptp_clock_kernel.h>
  32
  33 #include "fm10k_pf.h"
  34 #include "fm10k_vf.h"
  35
  36 #define FM10K_MAX_JUMBO_FRAME_SIZE      15358   /* Maximum supported size 15K */
  37
  38 #define MAX_QUEUES      FM10K_MAX_QUEUES_PF
  39
  40 #define FM10K_MIN_RXD            128
  41 #define FM10K_MAX_RXD           4096
  42 #define FM10K_DEFAULT_RXD        256
  43
  44 #define FM10K_MIN_TXD            128
  45 #define FM10K_MAX_TXD           4096
  46 #define FM10K_DEFAULT_TXD        256
  47 #define FM10K_DEFAULT_TX_WORK    256
  48
  49 #define FM10K_RXBUFFER_256        256
  50 #define FM10K_RXBUFFER_16384    16384
  51 #define FM10K_RX_HDR_LEN        FM10K_RXBUFFER_256
  52 #if PAGE_SIZE <= FM10K_RXBUFFER_16384
  53 #define FM10K_RX_BUFSZ          (PAGE_SIZE / 2)
  54 #else
  55 #define FM10K_RX_BUFSZ          FM10K_RXBUFFER_16384
  56 #endif
  57
  58 /* How many Rx Buffers do we bundle into one write to the hardware ? */
  59 #define FM10K_RX_BUFFER_WRITE   16      /* Must be power of 2 */
  60
  61 #define FM10K_MAX_STATIONS      63
  62 struct fm10k_l2_accel {
  63         int size;
  64         u16 count;
  65         u16 dglort;
  66         struct rcu_head rcu;
  67         struct net_device *macvlan[0];
  68 };
  69
  70 enum fm10k_ring_state_t {
  71         __FM10K_TX_DETECT_HANG,
  72         __FM10K_HANG_CHECK_ARMED,
  73 };
  74
  75 #define check_for_tx_hang(ring) \
  76         test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  77 #define set_check_for_tx_hang(ring) \
  78         set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  79 #define clear_check_for_tx_hang(ring) \
  80         clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  81
  82 struct fm10k_tx_buffer {
  83         struct fm10k_tx_desc *next_to_watch;
  84         struct sk_buff *skb;
  85         unsigned int bytecount;
  86         u16 gso_segs;
  87         u16 tx_flags;
  88         DEFINE_DMA_UNMAP_ADDR(dma);
  89         DEFINE_DMA_UNMAP_LEN(len);
  90 };
  91
  92 struct fm10k_rx_buffer {
  93         dma_addr_t dma;
  94         struct page *page;
  95         u32 page_offset;
  96 };
  97
  98 struct fm10k_queue_stats {
  99         u64 packets;
 100         u64 bytes;
 101 };
 102
 103 struct fm10k_tx_queue_stats {
 104         u64 restart_queue;
 105         u64 csum_err;
 106         u64 tx_busy;
 107         u64 tx_done_old;
 108 };
 109
 110 struct fm10k_rx_queue_stats {
 111         u64 alloc_failed;
 112         u64 csum_err;
 113         u64 errors;
 114 };
 115
 116 struct fm10k_ring {
 117         struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
 118         struct net_device *netdev;      /* netdev ring belongs to */
 119         struct device *dev;             /* device for DMA mapping */
 120         struct fm10k_l2_accel __rcu *l2_accel;  /* L2 acceleration list */
 121         void *desc;                     /* descriptor ring memory */
 122         union {
 123                 struct fm10k_tx_buffer *tx_buffer;
 124                 struct fm10k_rx_buffer *rx_buffer;
 125         };
 126         u32 __iomem *tail;
 127         unsigned long state;
 128         dma_addr_t dma;                 /* phys. address of descriptor ring */
 129         unsigned int size;              /* length in bytes */
 130
 131         u8 queue_index;                 /* needed for queue management */
 132         u8 reg_idx;                     /* holds the special value that gets
 133                                          * the hardware register offset
 134                                          * associated with this ring, which is
 135                                          * different for DCB and RSS modes
 136                                          */
 137         u8 qos_pc;                      /* priority class of queue */
 138         u16 vid;                        /* default vlan ID of queue */
 139         u16 count;                      /* amount of descriptors */
 140
 141         u16 next_to_alloc;
 142         u16 next_to_use;
 143         u16 next_to_clean;
 144
 145         struct fm10k_queue_stats stats;
 146         struct u64_stats_sync syncp;
 147         union {
 148                 /* Tx */
 149                 struct fm10k_tx_queue_stats tx_stats;
 150                 /* Rx */
 151                 struct {
 152                         struct fm10k_rx_queue_stats rx_stats;
 153                         struct sk_buff *skb;
 154                 };
 155         };
 156 } ____cacheline_internodealigned_in_smp;
 157
 158 struct fm10k_ring_container {
 159         struct fm10k_ring *ring;        /* pointer to linked list of rings */
 160         unsigned int total_bytes;       /* total bytes processed this int */
 161         unsigned int total_packets;     /* total packets processed this int */
 162         u16 work_limit;                 /* total work allowed per interrupt */
 163         u16 itr;                        /* interrupt throttle rate value */
 164         u8 count;                       /* total number of rings in vector */
 165 };
 166
 167 #define FM10K_ITR_MAX           0x0FFF  /* maximum value for ITR */
 168 #define FM10K_ITR_10K           100     /* 100us */
 169 #define FM10K_ITR_20K           50      /* 50us */
 170 #define FM10K_ITR_ADAPTIVE      0x8000  /* adaptive interrupt moderation flag */
 171
 172 #define FM10K_ITR_ENABLE        (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
 173
 174 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
 175 {
 176         return &ring->netdev->_tx[ring->queue_index];
 177 }
 178
 179 /* iterator for handling rings in ring container */
 180 #define fm10k_for_each_ring(pos, head) \
 181         for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
 182
 183 #define MAX_Q_VECTORS 256
 184 #define MIN_Q_VECTORS   1
 185 enum fm10k_non_q_vectors {
 186         FM10K_MBX_VECTOR,
 187 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
 188         NON_Q_VECTORS_PF
 189 };
 190
 191 #define NON_Q_VECTORS(hw)       (((hw)->mac.type == fm10k_mac_pf) ? \
 192                                                 NON_Q_VECTORS_PF : \
 193                                                 NON_Q_VECTORS_VF)
 194 #define MIN_MSIX_COUNT(hw)      (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
 195
 196 struct fm10k_q_vector {
 197         struct fm10k_intfc *interface;
 198         u32 __iomem *itr;       /* pointer to ITR register for this vector */
 199         u16 v_idx;              /* index of q_vector within interface array */
 200         struct fm10k_ring_container rx, tx;
 201
 202         struct napi_struct napi;
 203         char name[IFNAMSIZ + 9];
 204
 205 #ifdef CONFIG_DEBUG_FS
 206         struct dentry *dbg_q_vector;
 207 #endif /* CONFIG_DEBUG_FS */
 208         struct rcu_head rcu;    /* to avoid race with update stats on free */
 209
 210         /* for dynamic allocation of rings associated with this q_vector */
 211         struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
 212 };
 213
 214 enum fm10k_ring_f_enum {
 215         RING_F_RSS,
 216         RING_F_QOS,
 217         RING_F_ARRAY_SIZE  /* must be last in enum set */
 218 };
 219
 220 struct fm10k_ring_feature {
 221         u16 limit;      /* upper limit on feature indices */
 222         u16 indices;    /* current value of indices */
 223         u16 mask;       /* Mask used for feature to ring mapping */
 224         u16 offset;     /* offset to start of feature */
 225 };
 226
 227 struct fm10k_iov_data {
 228         unsigned int            num_vfs;
 229         unsigned int            next_vf_mbx;
 230         struct rcu_head         rcu;
 231         struct fm10k_vf_info    vf_info[0];
 232 };
 233
 234 #define fm10k_vxlan_port_for_each(vp, intfc) \
 235         list_for_each_entry(vp, &(intfc)->vxlan_port, list)
 236 struct fm10k_vxlan_port {
 237         struct list_head        list;
 238         sa_family_t             sa_family;
 239         __be16                  port;
 240 };
 241
 242 struct fm10k_intfc {
 243         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 244         struct net_device *netdev;
 245         struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
 246         struct pci_dev *pdev;
 247         unsigned long state;
 248
 249         u32 flags;
 250 #define FM10K_FLAG_RESET_REQUESTED              (u32)(1 << 0)
 251 #define FM10K_FLAG_RSS_FIELD_IPV4_UDP           (u32)(1 << 1)
 252 #define FM10K_FLAG_RSS_FIELD_IPV6_UDP           (u32)(1 << 2)
 253 #define FM10K_FLAG_RX_TS_ENABLED                (u32)(1 << 3)
 254 #define FM10K_FLAG_SWPRI_CONFIG                 (u32)(1 << 4)
 255         int xcast_mode;
 256
 257         /* Tx fast path data */
 258         int num_tx_queues;
 259         u16 tx_itr;
 260
 261         /* Rx fast path data */
 262         int num_rx_queues;
 263         u16 rx_itr;
 264
 265         /* TX */
 266         struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
 267
 268         u64 restart_queue;
 269         u64 tx_busy;
 270         u64 tx_csum_errors;
 271         u64 alloc_failed;
 272         u64 rx_csum_errors;
 273         u64 rx_errors;
 274
 275         u64 tx_bytes_nic;
 276         u64 tx_packets_nic;
 277         u64 rx_bytes_nic;
 278         u64 rx_packets_nic;
 279         u64 rx_drops_nic;
 280         u64 rx_overrun_pf;
 281         u64 rx_overrun_vf;
 282         u32 tx_timeout_count;
 283
 284         /* RX */
 285         struct fm10k_ring *rx_ring[MAX_QUEUES];
 286
 287         /* Queueing vectors */
 288         struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
 289         struct msix_entry *msix_entries;
 290         int num_q_vectors;      /* current number of q_vectors for device */
 291         struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
 292
 293         /* SR-IOV information management structure */
 294         struct fm10k_iov_data *iov_data;
 295
 296         struct fm10k_hw_stats stats;
 297         struct fm10k_hw hw;
 298         u32 __iomem *uc_addr;
 299         u32 __iomem *sw_addr;
 300         u16 msg_enable;
 301         u16 tx_ring_count;
 302         u16 rx_ring_count;
 303         struct timer_list service_timer;
 304         struct work_struct service_task;
 305         unsigned long next_stats_update;
 306         unsigned long next_tx_hang_check;
 307         unsigned long last_reset;
 308         unsigned long link_down_event;
 309         bool host_ready;
 310
 311         u32 reta[FM10K_RETA_SIZE];
 312         u32 rssrk[FM10K_RSSRK_SIZE];
 313
 314         /* VXLAN port tracking information */
 315         struct list_head vxlan_port;
 316
 317 #ifdef CONFIG_DEBUG_FS
 318         struct dentry *dbg_intfc;
 319
 320 #endif /* CONFIG_DEBUG_FS */
 321         struct ptp_clock_info ptp_caps;
 322         struct ptp_clock *ptp_clock;
 323
 324         struct sk_buff_head ts_tx_skb_queue;
 325         u32 tx_hwtstamp_timeouts;
 326
 327         struct hwtstamp_config ts_config;
 328         /* We are unable to actually adjust the clock beyond the frequency
 329          * value.  Once the clock is started there is no resetting it.  As
 330          * such we maintain a separate offset from the actual hardware clock
 331          * to allow for offset adjustment.
 332          */
 333         s64 ptp_adjust;
 334         rwlock_t systime_lock;
 335 #ifdef CONFIG_DCB
 336         u8 pfc_en;
 337 #endif
 338         u8 rx_pause;
 339
 340         /* GLORT resources in use by PF */
 341         u16 glort;
 342         u16 glort_count;
 343
 344         /* VLAN ID for updating multicast/unicast lists */
 345         u16 vid;
 346 };
 347
 348 enum fm10k_state_t {
 349         __FM10K_RESETTING,
 350         __FM10K_DOWN,
 351         __FM10K_SERVICE_SCHED,
 352         __FM10K_SERVICE_DISABLE,
 353         __FM10K_MBX_LOCK,
 354         __FM10K_LINK_DOWN,
 355 };
 356
 357 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
 358 {
 359         /* busy loop if we cannot obtain the lock as some calls
 360          * such as ndo_set_rx_mode may be made in atomic context
 361          */
 362         while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
 363                 udelay(20);
 364 }
 365
 366 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
 367 {
 368         /* flush memory to make sure state is correct */
 369         smp_mb__before_atomic();
 370         clear_bit(__FM10K_MBX_LOCK, &interface->state);
 371 }
 372
 373 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
 374 {
 375         return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
 376 }
 377
 378 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
 379 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
 380                                         const u32 stat_err_bits)
 381 {
 382         return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
 383 }
 384
 385 /* fm10k_desc_unused - calculate if we have unused descriptors */
 386 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
 387 {
 388         s16 unused = ring->next_to_clean - ring->next_to_use - 1;
 389
 390         return likely(unused < 0) ? unused + ring->count : unused;
 391 }
 392
 393 #define FM10K_TX_DESC(R, i)     \
 394         (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
 395 #define FM10K_RX_DESC(R, i)     \
 396          (&(((union fm10k_rx_desc *)((R)->desc))[i]))
 397
 398 #define FM10K_MAX_TXD_PWR       14
 399 #define FM10K_MAX_DATA_PER_TXD  (1 << FM10K_MAX_TXD_PWR)
 400
 401 /* Tx Descriptors needed, worst case */
 402 #define TXD_USE_COUNT(S)        DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
 403 #define DESC_NEEDED     (MAX_SKB_FRAGS + 4)
 404
 405 enum fm10k_tx_flags {
 406         /* Tx offload flags */
 407         FM10K_TX_FLAGS_CSUM     = 0x01,
 408 };
 409
 410 /* This structure is stored as little endian values as that is the native
 411  * format of the Rx descriptor.  The ordering of these fields is reversed
 412  * from the actual ftag header to allow for a single bswap to take care
 413  * of placing all of the values in network order
 414  */
 415 union fm10k_ftag_info {
 416         __le64 ftag;
 417         struct {
 418                 /* dglort and sglort combined into a single 32bit desc read */
 419                 __le32 glort;
 420                 /* upper 16 bits of vlan are reserved 0 for swpri_type_user */
 421                 __le32 vlan;
 422         } d;
 423         struct {
 424                 __le16 dglort;
 425                 __le16 sglort;
 426                 __le16 vlan;
 427                 __le16 swpri_type_user;
 428         } w;
 429 };
 430
 431 struct fm10k_cb {
 432         union {
 433                 __le64 tstamp;
 434                 unsigned long ts_tx_timeout;
 435         };
 436         union fm10k_ftag_info fi;
 437 };
 438
 439 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
 440
 441 /* main */
 442 extern char fm10k_driver_name[];
 443 extern const char fm10k_driver_version[];
 444 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
 445 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
 446 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
 447                                   struct fm10k_ring *tx_ring);
 448 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
 449 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
 450 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
 451
 452 /* PCI */
 453 void fm10k_mbx_free_irq(struct fm10k_intfc *);
 454 int fm10k_mbx_request_irq(struct fm10k_intfc *);
 455 void fm10k_qv_free_irq(struct fm10k_intfc *interface);
 456 int fm10k_qv_request_irq(struct fm10k_intfc *interface);
 457 int fm10k_register_pci_driver(void);
 458 void fm10k_unregister_pci_driver(void);
 459 void fm10k_up(struct fm10k_intfc *interface);
 460 void fm10k_down(struct fm10k_intfc *interface);
 461 void fm10k_update_stats(struct fm10k_intfc *interface);
 462 void fm10k_service_event_schedule(struct fm10k_intfc *interface);
 463 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
 464
 465 /* Netdev */
 466 struct net_device *fm10k_alloc_netdev(void);
 467 int fm10k_setup_rx_resources(struct fm10k_ring *);
 468 int fm10k_setup_tx_resources(struct fm10k_ring *);
 469 void fm10k_free_rx_resources(struct fm10k_ring *);
 470 void fm10k_free_tx_resources(struct fm10k_ring *);
 471 void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
 472 void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
 473 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
 474                                       struct fm10k_tx_buffer *);
 475 void fm10k_restore_rx_state(struct fm10k_intfc *);
 476 void fm10k_reset_rx_state(struct fm10k_intfc *);
 477 int fm10k_setup_tc(struct net_device *dev, u8 tc);
 478 int fm10k_open(struct net_device *netdev);
 479 int fm10k_close(struct net_device *netdev);
 480
 481 /* Ethtool */
 482 void fm10k_set_ethtool_ops(struct net_device *dev);
 483
 484 /* IOV */
 485 s32 fm10k_iov_event(struct fm10k_intfc *interface);
 486 s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
 487 void fm10k_iov_suspend(struct pci_dev *pdev);
 488 int fm10k_iov_resume(struct pci_dev *pdev);
 489 void fm10k_iov_disable(struct pci_dev *pdev);
 490 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
 491 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
 492 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
 493 int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
 494                           int vf_idx, u16 vid, u8 qos);
 495 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
 496                         int unused);
 497 int fm10k_ndo_get_vf_config(struct net_device *netdev,
 498                             int vf_idx, struct ifla_vf_info *ivi);
 499
 500 /* DebugFS */
 501 #ifdef CONFIG_DEBUG_FS
 502 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
 503 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
 504 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
 505 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
 506 void fm10k_dbg_init(void);
 507 void fm10k_dbg_exit(void);
 508 #else
 509 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
 510 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
 511 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
 512 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
 513 static inline void fm10k_dbg_init(void) {}
 514 static inline void fm10k_dbg_exit(void) {}
 515 #endif /* CONFIG_DEBUG_FS */
 516
 517 /* Time Stamping */
 518 void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
 519                                struct skb_shared_hwtstamps *hwtstamp,
 520                                u64 systime);
 521 void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
 522 void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
 523                           u64 systime);
 524 void fm10k_ts_reset(struct fm10k_intfc *interface);
 525 void fm10k_ts_init(struct fm10k_intfc *interface);
 526 void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
 527 void fm10k_ptp_register(struct fm10k_intfc *interface);
 528 void fm10k_ptp_unregister(struct fm10k_intfc *interface);
 529 int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
 530 int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
 531
 532 /* DCB */
 533 void fm10k_dcbnl_set_ops(struct net_device *dev);
 534 #endif /* _FM10K_H_ */