drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h

   1 /*******************************************************************************
   2  *
   3  * Intel Ethernet Controller XL710 Family Linux Driver
   4  * Copyright(c) 2013 - 2014 Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * The full GNU General Public License is included in this distribution in
  19  * the file called "COPYING".
  20  *
  21  * Contact Information:
  22  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  ******************************************************************************/
  26
  27 #ifndef _I40E_LAN_HMC_H_
  28 #define _I40E_LAN_HMC_H_
  29
  30 /* forward-declare the HW struct for the compiler */
  31 struct i40e_hw;
  32
  33 /* HMC element context information */
  34
  35 /* Rx queue context data */
  36 struct i40e_hmc_obj_rxq {
  37         u16 head;
  38         u8  cpuid;
  39         u64 base;
  40         u16 qlen;
  41 #define I40E_RXQ_CTX_DBUFF_SHIFT 7
  42         u8  dbuff;
  43 #define I40E_RXQ_CTX_HBUFF_SHIFT 6
  44         u8  hbuff;
  45         u8  dtype;
  46         u8  dsize;
  47         u8  crcstrip;
  48         u8  fc_ena;
  49         u8  l2tsel;
  50         u8  hsplit_0;
  51         u8  hsplit_1;
  52         u8  showiv;
  53         u16 rxmax;
  54         u8  tphrdesc_ena;
  55         u8  tphwdesc_ena;
  56         u8  tphdata_ena;
  57         u8  tphhead_ena;
  58         u8  lrxqthresh;
  59 };
  60
  61 /* Tx queue context data */
  62 struct i40e_hmc_obj_txq {
  63         u16 head;
  64         u8  new_context;
  65         u64 base;
  66         u8  fc_ena;
  67         u8  timesync_ena;
  68         u8  fd_ena;
  69         u8  alt_vlan_ena;
  70         u16 thead_wb;
  71         u16 cpuid;
  72         u8  head_wb_ena;
  73         u16 qlen;
  74         u8  tphrdesc_ena;
  75         u8  tphrpacket_ena;
  76         u8  tphwdesc_ena;
  77         u64 head_wb_addr;
  78         u32 crc;
  79         u16 rdylist;
  80         u8  rdylist_act;
  81 };
  82
  83 /* for hsplit_0 field of Rx HMC context */
  84 enum i40e_hmc_obj_rx_hsplit_0 {
  85         I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT      = 0,
  86         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2      = 1,
  87         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP      = 2,
  88         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
  89         I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP    = 8,
  90 };
  91
  92 /* fcoe_cntx and fcoe_filt are for debugging purpose only */
  93 struct i40e_hmc_obj_fcoe_cntx {
  94         u32 rsv[32];
  95 };
  96
  97 struct i40e_hmc_obj_fcoe_filt {
  98         u32 rsv[8];
  99 };
 100
 101 /* Context sizes for LAN objects */
 102 enum i40e_hmc_lan_object_size {
 103         I40E_HMC_LAN_OBJ_SZ_8   = 0x3,
 104         I40E_HMC_LAN_OBJ_SZ_16  = 0x4,
 105         I40E_HMC_LAN_OBJ_SZ_32  = 0x5,
 106         I40E_HMC_LAN_OBJ_SZ_64  = 0x6,
 107         I40E_HMC_LAN_OBJ_SZ_128 = 0x7,
 108         I40E_HMC_LAN_OBJ_SZ_256 = 0x8,
 109         I40E_HMC_LAN_OBJ_SZ_512 = 0x9,
 110 };
 111
 112 #define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512
 113 #define I40E_HMC_OBJ_SIZE_TXQ         128
 114 #define I40E_HMC_OBJ_SIZE_RXQ         32
 115 #define I40E_HMC_OBJ_SIZE_FCOE_CNTX   64
 116 #define I40E_HMC_OBJ_SIZE_FCOE_FILT   64
 117
 118 enum i40e_hmc_lan_rsrc_type {
 119         I40E_HMC_LAN_FULL  = 0,
 120         I40E_HMC_LAN_TX    = 1,
 121         I40E_HMC_LAN_RX    = 2,
 122         I40E_HMC_FCOE_CTX  = 3,
 123         I40E_HMC_FCOE_FILT = 4,
 124         I40E_HMC_LAN_MAX   = 5
 125 };
 126
 127 enum i40e_hmc_model {
 128         I40E_HMC_MODEL_DIRECT_PREFERRED = 0,
 129         I40E_HMC_MODEL_DIRECT_ONLY      = 1,
 130         I40E_HMC_MODEL_PAGED_ONLY       = 2,
 131         I40E_HMC_MODEL_UNKNOWN,
 132 };
 133
 134 struct i40e_hmc_lan_create_obj_info {
 135         struct i40e_hmc_info *hmc_info;
 136         u32 rsrc_type;
 137         u32 start_idx;
 138         u32 count;
 139         enum i40e_sd_entry_type entry_type;
 140         u64 direct_mode_sz;
 141 };
 142
 143 struct i40e_hmc_lan_delete_obj_info {
 144         struct i40e_hmc_info *hmc_info;
 145         u32 rsrc_type;
 146         u32 start_idx;
 147         u32 count;
 148 };
 149
 150 i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
 151                                         u32 rxq_num, u32 fcoe_cntx_num,
 152                                         u32 fcoe_filt_num);
 153 i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
 154                                              enum i40e_hmc_model model);
 155 i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw);
 156
 157 i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
 158                                                       u16 queue);
 159 i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
 160                                                     u16 queue,
 161                                                     struct i40e_hmc_obj_txq *s);
 162 i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
 163                                                       u16 queue);
 164 i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
 165                                                     u16 queue,
 166                                                     struct i40e_hmc_obj_rxq *s);
 167
 168 #endif /* _I40E_LAN_HMC_H_ */