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i40e/i40evf: Bump version
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #if IS_ENABLED(CONFIG_VXLAN)
35 #include <net/vxlan.h>
36 #endif
37 #if IS_ENABLED(CONFIG_GENEVE)
38 #include <net/geneve.h>
39 #endif
40
41 const char i40e_driver_name[] = "i40e";
42 static const char i40e_driver_string[] =
43 "Intel(R) Ethernet Connection XL710 Network Driver";
44
45 #define DRV_KERN "-k"
46
47 #define DRV_VERSION_MAJOR 1
48 #define DRV_VERSION_MINOR 4
49 #define DRV_VERSION_BUILD 13
50 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
51 __stringify(DRV_VERSION_MINOR) "." \
52 __stringify(DRV_VERSION_BUILD) DRV_KERN
53 const char i40e_driver_version_str[] = DRV_VERSION;
54 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
55
56 /* a bit of forward declarations */
57 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
58 static void i40e_handle_reset_warning(struct i40e_pf *pf);
59 static int i40e_add_vsi(struct i40e_vsi *vsi);
60 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
61 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
62 static int i40e_setup_misc_vector(struct i40e_pf *pf);
63 static void i40e_determine_queue_usage(struct i40e_pf *pf);
64 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
65 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
66 u16 rss_table_size, u16 rss_size);
67 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
68 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
69
70 /* i40e_pci_tbl - PCI Device ID Table
71 *
72 * Last entry must be all 0s
73 *
74 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
75 * Class, Class Mask, private data (not used) }
76 */
77 static const struct pci_device_id i40e_pci_tbl[] = {
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
95 /* required last entry */
96 {0, }
97 };
98 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
99
100 #define I40E_MAX_VF_COUNT 128
101 static int debug = -1;
102 module_param(debug, int, 0);
103 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
104
105 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
106 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
107 MODULE_LICENSE("GPL");
108 MODULE_VERSION(DRV_VERSION);
109
110 static struct workqueue_struct *i40e_wq;
111
112 /**
113 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
114 * @hw: pointer to the HW structure
115 * @mem: ptr to mem struct to fill out
116 * @size: size of memory requested
117 * @alignment: what to align the allocation to
118 **/
119 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
120 u64 size, u32 alignment)
121 {
122 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123
124 mem->size = ALIGN(size, alignment);
125 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
126 &mem->pa, GFP_KERNEL);
127 if (!mem->va)
128 return -ENOMEM;
129
130 return 0;
131 }
132
133 /**
134 * i40e_free_dma_mem_d - OS specific memory free for shared code
135 * @hw: pointer to the HW structure
136 * @mem: ptr to mem struct to free
137 **/
138 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
139 {
140 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
141
142 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
143 mem->va = NULL;
144 mem->pa = 0;
145 mem->size = 0;
146
147 return 0;
148 }
149
150 /**
151 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
152 * @hw: pointer to the HW structure
153 * @mem: ptr to mem struct to fill out
154 * @size: size of memory requested
155 **/
156 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
157 u32 size)
158 {
159 mem->size = size;
160 mem->va = kzalloc(size, GFP_KERNEL);
161
162 if (!mem->va)
163 return -ENOMEM;
164
165 return 0;
166 }
167
168 /**
169 * i40e_free_virt_mem_d - OS specific memory free for shared code
170 * @hw: pointer to the HW structure
171 * @mem: ptr to mem struct to free
172 **/
173 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
174 {
175 /* it's ok to kfree a NULL pointer */
176 kfree(mem->va);
177 mem->va = NULL;
178 mem->size = 0;
179
180 return 0;
181 }
182
183 /**
184 * i40e_get_lump - find a lump of free generic resource
185 * @pf: board private structure
186 * @pile: the pile of resource to search
187 * @needed: the number of items needed
188 * @id: an owner id to stick on the items assigned
189 *
190 * Returns the base item index of the lump, or negative for error
191 *
192 * The search_hint trick and lack of advanced fit-finding only work
193 * because we're highly likely to have all the same size lump requests.
194 * Linear search time and any fragmentation should be minimal.
195 **/
196 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
197 u16 needed, u16 id)
198 {
199 int ret = -ENOMEM;
200 int i, j;
201
202 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
203 dev_info(&pf->pdev->dev,
204 "param err: pile=%p needed=%d id=0x%04x\n",
205 pile, needed, id);
206 return -EINVAL;
207 }
208
209 /* start the linear search with an imperfect hint */
210 i = pile->search_hint;
211 while (i < pile->num_entries) {
212 /* skip already allocated entries */
213 if (pile->list[i] & I40E_PILE_VALID_BIT) {
214 i++;
215 continue;
216 }
217
218 /* do we have enough in this lump? */
219 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
220 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
221 break;
222 }
223
224 if (j == needed) {
225 /* there was enough, so assign it to the requestor */
226 for (j = 0; j < needed; j++)
227 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
228 ret = i;
229 pile->search_hint = i + j;
230 break;
231 }
232
233 /* not enough, so skip over it and continue looking */
234 i += j;
235 }
236
237 return ret;
238 }
239
240 /**
241 * i40e_put_lump - return a lump of generic resource
242 * @pile: the pile of resource to search
243 * @index: the base item index
244 * @id: the owner id of the items assigned
245 *
246 * Returns the count of items in the lump
247 **/
248 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
249 {
250 int valid_id = (id | I40E_PILE_VALID_BIT);
251 int count = 0;
252 int i;
253
254 if (!pile || index >= pile->num_entries)
255 return -EINVAL;
256
257 for (i = index;
258 i < pile->num_entries && pile->list[i] == valid_id;
259 i++) {
260 pile->list[i] = 0;
261 count++;
262 }
263
264 if (count && index < pile->search_hint)
265 pile->search_hint = index;
266
267 return count;
268 }
269
270 /**
271 * i40e_find_vsi_from_id - searches for the vsi with the given id
272 * @pf - the pf structure to search for the vsi
273 * @id - id of the vsi it is searching for
274 **/
275 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
276 {
277 int i;
278
279 for (i = 0; i < pf->num_alloc_vsi; i++)
280 if (pf->vsi[i] && (pf->vsi[i]->id == id))
281 return pf->vsi[i];
282
283 return NULL;
284 }
285
286 /**
287 * i40e_service_event_schedule - Schedule the service task to wake up
288 * @pf: board private structure
289 *
290 * If not already scheduled, this puts the task into the work queue
291 **/
292 static void i40e_service_event_schedule(struct i40e_pf *pf)
293 {
294 if (!test_bit(__I40E_DOWN, &pf->state) &&
295 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
296 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
297 queue_work(i40e_wq, &pf->service_task);
298 }
299
300 /**
301 * i40e_tx_timeout - Respond to a Tx Hang
302 * @netdev: network interface device structure
303 *
304 * If any port has noticed a Tx timeout, it is likely that the whole
305 * device is munged, not just the one netdev port, so go for the full
306 * reset.
307 **/
308 #ifdef I40E_FCOE
309 void i40e_tx_timeout(struct net_device *netdev)
310 #else
311 static void i40e_tx_timeout(struct net_device *netdev)
312 #endif
313 {
314 struct i40e_netdev_priv *np = netdev_priv(netdev);
315 struct i40e_vsi *vsi = np->vsi;
316 struct i40e_pf *pf = vsi->back;
317 struct i40e_ring *tx_ring = NULL;
318 unsigned int i, hung_queue = 0;
319 u32 head, val;
320
321 pf->tx_timeout_count++;
322
323 /* find the stopped queue the same way the stack does */
324 for (i = 0; i < netdev->num_tx_queues; i++) {
325 struct netdev_queue *q;
326 unsigned long trans_start;
327
328 q = netdev_get_tx_queue(netdev, i);
329 trans_start = q->trans_start ? : netdev->trans_start;
330 if (netif_xmit_stopped(q) &&
331 time_after(jiffies,
332 (trans_start + netdev->watchdog_timeo))) {
333 hung_queue = i;
334 break;
335 }
336 }
337
338 if (i == netdev->num_tx_queues) {
339 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
340 } else {
341 /* now that we have an index, find the tx_ring struct */
342 for (i = 0; i < vsi->num_queue_pairs; i++) {
343 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
344 if (hung_queue ==
345 vsi->tx_rings[i]->queue_index) {
346 tx_ring = vsi->tx_rings[i];
347 break;
348 }
349 }
350 }
351 }
352
353 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
354 pf->tx_timeout_recovery_level = 1; /* reset after some time */
355 else if (time_before(jiffies,
356 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
357 return; /* don't do any new action before the next timeout */
358
359 if (tx_ring) {
360 head = i40e_get_head(tx_ring);
361 /* Read interrupt register */
362 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
363 val = rd32(&pf->hw,
364 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
365 tx_ring->vsi->base_vector - 1));
366 else
367 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
368
369 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
370 vsi->seid, hung_queue, tx_ring->next_to_clean,
371 head, tx_ring->next_to_use,
372 readl(tx_ring->tail), val);
373 }
374
375 pf->tx_timeout_last_recovery = jiffies;
376 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
377 pf->tx_timeout_recovery_level, hung_queue);
378
379 switch (pf->tx_timeout_recovery_level) {
380 case 1:
381 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
382 break;
383 case 2:
384 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
385 break;
386 case 3:
387 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
388 break;
389 default:
390 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
391 break;
392 }
393
394 i40e_service_event_schedule(pf);
395 pf->tx_timeout_recovery_level++;
396 }
397
398 /**
399 * i40e_release_rx_desc - Store the new tail and head values
400 * @rx_ring: ring to bump
401 * @val: new head index
402 **/
403 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
404 {
405 rx_ring->next_to_use = val;
406
407 /* Force memory writes to complete before letting h/w
408 * know there are new descriptors to fetch. (Only
409 * applicable for weak-ordered memory model archs,
410 * such as IA-64).
411 */
412 wmb();
413 writel(val, rx_ring->tail);
414 }
415
416 /**
417 * i40e_get_vsi_stats_struct - Get System Network Statistics
418 * @vsi: the VSI we care about
419 *
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
422 **/
423 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
424 {
425 return &vsi->net_stats;
426 }
427
428 /**
429 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
430 * @netdev: network interface device structure
431 *
432 * Returns the address of the device statistics structure.
433 * The statistics are actually updated from the service task.
434 **/
435 #ifdef I40E_FCOE
436 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
437 struct net_device *netdev,
438 struct rtnl_link_stats64 *stats)
439 #else
440 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
441 struct net_device *netdev,
442 struct rtnl_link_stats64 *stats)
443 #endif
444 {
445 struct i40e_netdev_priv *np = netdev_priv(netdev);
446 struct i40e_ring *tx_ring, *rx_ring;
447 struct i40e_vsi *vsi = np->vsi;
448 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
449 int i;
450
451 if (test_bit(__I40E_DOWN, &vsi->state))
452 return stats;
453
454 if (!vsi->tx_rings)
455 return stats;
456
457 rcu_read_lock();
458 for (i = 0; i < vsi->num_queue_pairs; i++) {
459 u64 bytes, packets;
460 unsigned int start;
461
462 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
463 if (!tx_ring)
464 continue;
465
466 do {
467 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
468 packets = tx_ring->stats.packets;
469 bytes = tx_ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
471
472 stats->tx_packets += packets;
473 stats->tx_bytes += bytes;
474 rx_ring = &tx_ring[1];
475
476 do {
477 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
478 packets = rx_ring->stats.packets;
479 bytes = rx_ring->stats.bytes;
480 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
481
482 stats->rx_packets += packets;
483 stats->rx_bytes += bytes;
484 }
485 rcu_read_unlock();
486
487 /* following stats updated by i40e_watchdog_subtask() */
488 stats->multicast = vsi_stats->multicast;
489 stats->tx_errors = vsi_stats->tx_errors;
490 stats->tx_dropped = vsi_stats->tx_dropped;
491 stats->rx_errors = vsi_stats->rx_errors;
492 stats->rx_dropped = vsi_stats->rx_dropped;
493 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
494 stats->rx_length_errors = vsi_stats->rx_length_errors;
495
496 return stats;
497 }
498
499 /**
500 * i40e_vsi_reset_stats - Resets all stats of the given vsi
501 * @vsi: the VSI to have its stats reset
502 **/
503 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
504 {
505 struct rtnl_link_stats64 *ns;
506 int i;
507
508 if (!vsi)
509 return;
510
511 ns = i40e_get_vsi_stats_struct(vsi);
512 memset(ns, 0, sizeof(*ns));
513 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
514 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
515 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
516 if (vsi->rx_rings && vsi->rx_rings[0]) {
517 for (i = 0; i < vsi->num_queue_pairs; i++) {
518 memset(&vsi->rx_rings[i]->stats, 0,
519 sizeof(vsi->rx_rings[i]->stats));
520 memset(&vsi->rx_rings[i]->rx_stats, 0,
521 sizeof(vsi->rx_rings[i]->rx_stats));
522 memset(&vsi->tx_rings[i]->stats, 0,
523 sizeof(vsi->tx_rings[i]->stats));
524 memset(&vsi->tx_rings[i]->tx_stats, 0,
525 sizeof(vsi->tx_rings[i]->tx_stats));
526 }
527 }
528 vsi->stat_offsets_loaded = false;
529 }
530
531 /**
532 * i40e_pf_reset_stats - Reset all of the stats for the given PF
533 * @pf: the PF to be reset
534 **/
535 void i40e_pf_reset_stats(struct i40e_pf *pf)
536 {
537 int i;
538
539 memset(&pf->stats, 0, sizeof(pf->stats));
540 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
541 pf->stat_offsets_loaded = false;
542
543 for (i = 0; i < I40E_MAX_VEB; i++) {
544 if (pf->veb[i]) {
545 memset(&pf->veb[i]->stats, 0,
546 sizeof(pf->veb[i]->stats));
547 memset(&pf->veb[i]->stats_offsets, 0,
548 sizeof(pf->veb[i]->stats_offsets));
549 pf->veb[i]->stat_offsets_loaded = false;
550 }
551 }
552 }
553
554 /**
555 * i40e_stat_update48 - read and update a 48 bit stat from the chip
556 * @hw: ptr to the hardware info
557 * @hireg: the high 32 bit reg to read
558 * @loreg: the low 32 bit reg to read
559 * @offset_loaded: has the initial offset been loaded yet
560 * @offset: ptr to current offset value
561 * @stat: ptr to the stat
562 *
563 * Since the device stats are not reset at PFReset, they likely will not
564 * be zeroed when the driver starts. We'll save the first values read
565 * and use them as offsets to be subtracted from the raw values in order
566 * to report stats that count from zero. In the process, we also manage
567 * the potential roll-over.
568 **/
569 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
570 bool offset_loaded, u64 *offset, u64 *stat)
571 {
572 u64 new_data;
573
574 if (hw->device_id == I40E_DEV_ID_QEMU) {
575 new_data = rd32(hw, loreg);
576 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
577 } else {
578 new_data = rd64(hw, loreg);
579 }
580 if (!offset_loaded)
581 *offset = new_data;
582 if (likely(new_data >= *offset))
583 *stat = new_data - *offset;
584 else
585 *stat = (new_data + BIT_ULL(48)) - *offset;
586 *stat &= 0xFFFFFFFFFFFFULL;
587 }
588
589 /**
590 * i40e_stat_update32 - read and update a 32 bit stat from the chip
591 * @hw: ptr to the hardware info
592 * @reg: the hw reg to read
593 * @offset_loaded: has the initial offset been loaded yet
594 * @offset: ptr to current offset value
595 * @stat: ptr to the stat
596 **/
597 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
598 bool offset_loaded, u64 *offset, u64 *stat)
599 {
600 u32 new_data;
601
602 new_data = rd32(hw, reg);
603 if (!offset_loaded)
604 *offset = new_data;
605 if (likely(new_data >= *offset))
606 *stat = (u32)(new_data - *offset);
607 else
608 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
609 }
610
611 /**
612 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
613 * @vsi: the VSI to be updated
614 **/
615 void i40e_update_eth_stats(struct i40e_vsi *vsi)
616 {
617 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
618 struct i40e_pf *pf = vsi->back;
619 struct i40e_hw *hw = &pf->hw;
620 struct i40e_eth_stats *oes;
621 struct i40e_eth_stats *es; /* device's eth stats */
622
623 es = &vsi->eth_stats;
624 oes = &vsi->eth_stats_offsets;
625
626 /* Gather up the stats that the hw collects */
627 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
628 vsi->stat_offsets_loaded,
629 &oes->tx_errors, &es->tx_errors);
630 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_discards, &es->rx_discards);
633 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
636 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
637 vsi->stat_offsets_loaded,
638 &oes->tx_errors, &es->tx_errors);
639
640 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
641 I40E_GLV_GORCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_bytes, &es->rx_bytes);
644 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
645 I40E_GLV_UPRCL(stat_idx),
646 vsi->stat_offsets_loaded,
647 &oes->rx_unicast, &es->rx_unicast);
648 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
649 I40E_GLV_MPRCL(stat_idx),
650 vsi->stat_offsets_loaded,
651 &oes->rx_multicast, &es->rx_multicast);
652 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
653 I40E_GLV_BPRCL(stat_idx),
654 vsi->stat_offsets_loaded,
655 &oes->rx_broadcast, &es->rx_broadcast);
656
657 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
658 I40E_GLV_GOTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_bytes, &es->tx_bytes);
661 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
662 I40E_GLV_UPTCL(stat_idx),
663 vsi->stat_offsets_loaded,
664 &oes->tx_unicast, &es->tx_unicast);
665 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
666 I40E_GLV_MPTCL(stat_idx),
667 vsi->stat_offsets_loaded,
668 &oes->tx_multicast, &es->tx_multicast);
669 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
670 I40E_GLV_BPTCL(stat_idx),
671 vsi->stat_offsets_loaded,
672 &oes->tx_broadcast, &es->tx_broadcast);
673 vsi->stat_offsets_loaded = true;
674 }
675
676 /**
677 * i40e_update_veb_stats - Update Switch component statistics
678 * @veb: the VEB being updated
679 **/
680 static void i40e_update_veb_stats(struct i40e_veb *veb)
681 {
682 struct i40e_pf *pf = veb->pf;
683 struct i40e_hw *hw = &pf->hw;
684 struct i40e_eth_stats *oes;
685 struct i40e_eth_stats *es; /* device's eth stats */
686 struct i40e_veb_tc_stats *veb_oes;
687 struct i40e_veb_tc_stats *veb_es;
688 int i, idx = 0;
689
690 idx = veb->stats_idx;
691 es = &veb->stats;
692 oes = &veb->stats_offsets;
693 veb_es = &veb->tc_stats;
694 veb_oes = &veb->tc_stats_offsets;
695
696 /* Gather up the stats that the hw collects */
697 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_discards, &es->tx_discards);
700 if (hw->revision_id > 0)
701 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_unknown_protocol,
704 &es->rx_unknown_protocol);
705 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->rx_bytes, &es->rx_bytes);
708 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->rx_unicast, &es->rx_unicast);
711 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->rx_multicast, &es->rx_multicast);
714 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->rx_broadcast, &es->rx_broadcast);
717
718 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
719 veb->stat_offsets_loaded,
720 &oes->tx_bytes, &es->tx_bytes);
721 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
722 veb->stat_offsets_loaded,
723 &oes->tx_unicast, &es->tx_unicast);
724 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
725 veb->stat_offsets_loaded,
726 &oes->tx_multicast, &es->tx_multicast);
727 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
728 veb->stat_offsets_loaded,
729 &oes->tx_broadcast, &es->tx_broadcast);
730 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
731 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
732 I40E_GLVEBTC_RPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_rx_packets[i],
735 &veb_es->tc_rx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
737 I40E_GLVEBTC_RBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_rx_bytes[i],
740 &veb_es->tc_rx_bytes[i]);
741 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
742 I40E_GLVEBTC_TPCL(i, idx),
743 veb->stat_offsets_loaded,
744 &veb_oes->tc_tx_packets[i],
745 &veb_es->tc_tx_packets[i]);
746 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
747 I40E_GLVEBTC_TBCL(i, idx),
748 veb->stat_offsets_loaded,
749 &veb_oes->tc_tx_bytes[i],
750 &veb_es->tc_tx_bytes[i]);
751 }
752 veb->stat_offsets_loaded = true;
753 }
754
755 #ifdef I40E_FCOE
756 /**
757 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
758 * @vsi: the VSI that is capable of doing FCoE
759 **/
760 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
761 {
762 struct i40e_pf *pf = vsi->back;
763 struct i40e_hw *hw = &pf->hw;
764 struct i40e_fcoe_stats *ofs;
765 struct i40e_fcoe_stats *fs; /* device's eth stats */
766 int idx;
767
768 if (vsi->type != I40E_VSI_FCOE)
769 return;
770
771 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
772 fs = &vsi->fcoe_stats;
773 ofs = &vsi->fcoe_stats_offsets;
774
775 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
778 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
781 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
784 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
787 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
788 vsi->fcoe_stat_offsets_loaded,
789 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
790 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
791 vsi->fcoe_stat_offsets_loaded,
792 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
793 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
794 vsi->fcoe_stat_offsets_loaded,
795 &ofs->fcoe_last_error, &fs->fcoe_last_error);
796 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
797 vsi->fcoe_stat_offsets_loaded,
798 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
799
800 vsi->fcoe_stat_offsets_loaded = true;
801 }
802
803 #endif
804 /**
805 * i40e_update_vsi_stats - Update the vsi statistics counters.
806 * @vsi: the VSI to be updated
807 *
808 * There are a few instances where we store the same stat in a
809 * couple of different structs. This is partly because we have
810 * the netdev stats that need to be filled out, which is slightly
811 * different from the "eth_stats" defined by the chip and used in
812 * VF communications. We sort it out here.
813 **/
814 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
815 {
816 struct i40e_pf *pf = vsi->back;
817 struct rtnl_link_stats64 *ons;
818 struct rtnl_link_stats64 *ns; /* netdev stats */
819 struct i40e_eth_stats *oes;
820 struct i40e_eth_stats *es; /* device's eth stats */
821 u32 tx_restart, tx_busy;
822 struct i40e_ring *p;
823 u32 rx_page, rx_buf;
824 u64 bytes, packets;
825 unsigned int start;
826 u64 tx_linearize;
827 u64 tx_force_wb;
828 u64 rx_p, rx_b;
829 u64 tx_p, tx_b;
830 u16 q;
831
832 if (test_bit(__I40E_DOWN, &vsi->state) ||
833 test_bit(__I40E_CONFIG_BUSY, &pf->state))
834 return;
835
836 ns = i40e_get_vsi_stats_struct(vsi);
837 ons = &vsi->net_stats_offsets;
838 es = &vsi->eth_stats;
839 oes = &vsi->eth_stats_offsets;
840
841 /* Gather up the netdev and vsi stats that the driver collects
842 * on the fly during packet processing
843 */
844 rx_b = rx_p = 0;
845 tx_b = tx_p = 0;
846 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
847 rx_page = 0;
848 rx_buf = 0;
849 rcu_read_lock();
850 for (q = 0; q < vsi->num_queue_pairs; q++) {
851 /* locate Tx ring */
852 p = ACCESS_ONCE(vsi->tx_rings[q]);
853
854 do {
855 start = u64_stats_fetch_begin_irq(&p->syncp);
856 packets = p->stats.packets;
857 bytes = p->stats.bytes;
858 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
859 tx_b += bytes;
860 tx_p += packets;
861 tx_restart += p->tx_stats.restart_queue;
862 tx_busy += p->tx_stats.tx_busy;
863 tx_linearize += p->tx_stats.tx_linearize;
864 tx_force_wb += p->tx_stats.tx_force_wb;
865
866 /* Rx queue is part of the same block as Tx queue */
867 p = &p[1];
868 do {
869 start = u64_stats_fetch_begin_irq(&p->syncp);
870 packets = p->stats.packets;
871 bytes = p->stats.bytes;
872 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
873 rx_b += bytes;
874 rx_p += packets;
875 rx_buf += p->rx_stats.alloc_buff_failed;
876 rx_page += p->rx_stats.alloc_page_failed;
877 }
878 rcu_read_unlock();
879 vsi->tx_restart = tx_restart;
880 vsi->tx_busy = tx_busy;
881 vsi->tx_linearize = tx_linearize;
882 vsi->tx_force_wb = tx_force_wb;
883 vsi->rx_page_failed = rx_page;
884 vsi->rx_buf_failed = rx_buf;
885
886 ns->rx_packets = rx_p;
887 ns->rx_bytes = rx_b;
888 ns->tx_packets = tx_p;
889 ns->tx_bytes = tx_b;
890
891 /* update netdev stats from eth stats */
892 i40e_update_eth_stats(vsi);
893 ons->tx_errors = oes->tx_errors;
894 ns->tx_errors = es->tx_errors;
895 ons->multicast = oes->rx_multicast;
896 ns->multicast = es->rx_multicast;
897 ons->rx_dropped = oes->rx_discards;
898 ns->rx_dropped = es->rx_discards;
899 ons->tx_dropped = oes->tx_discards;
900 ns->tx_dropped = es->tx_discards;
901
902 /* pull in a couple PF stats if this is the main vsi */
903 if (vsi == pf->vsi[pf->lan_vsi]) {
904 ns->rx_crc_errors = pf->stats.crc_errors;
905 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
906 ns->rx_length_errors = pf->stats.rx_length_errors;
907 }
908 }
909
910 /**
911 * i40e_update_pf_stats - Update the PF statistics counters.
912 * @pf: the PF to be updated
913 **/
914 static void i40e_update_pf_stats(struct i40e_pf *pf)
915 {
916 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
917 struct i40e_hw_port_stats *nsd = &pf->stats;
918 struct i40e_hw *hw = &pf->hw;
919 u32 val;
920 int i;
921
922 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
923 I40E_GLPRT_GORCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
926 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
927 I40E_GLPRT_GOTCL(hw->port),
928 pf->stat_offsets_loaded,
929 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
930 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->eth.rx_discards,
933 &nsd->eth.rx_discards);
934 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
935 I40E_GLPRT_UPRCL(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.rx_unicast,
938 &nsd->eth.rx_unicast);
939 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
940 I40E_GLPRT_MPRCL(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->eth.rx_multicast,
943 &nsd->eth.rx_multicast);
944 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
945 I40E_GLPRT_BPRCL(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->eth.rx_broadcast,
948 &nsd->eth.rx_broadcast);
949 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
950 I40E_GLPRT_UPTCL(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->eth.tx_unicast,
953 &nsd->eth.tx_unicast);
954 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
955 I40E_GLPRT_MPTCL(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->eth.tx_multicast,
958 &nsd->eth.tx_multicast);
959 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
960 I40E_GLPRT_BPTCL(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->eth.tx_broadcast,
963 &nsd->eth.tx_broadcast);
964
965 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->tx_dropped_link_down,
968 &nsd->tx_dropped_link_down);
969
970 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->crc_errors, &nsd->crc_errors);
973
974 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->illegal_bytes, &nsd->illegal_bytes);
977
978 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->mac_local_faults,
981 &nsd->mac_local_faults);
982 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->mac_remote_faults,
985 &nsd->mac_remote_faults);
986
987 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->rx_length_errors,
990 &nsd->rx_length_errors);
991
992 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->link_xon_rx, &nsd->link_xon_rx);
995 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->link_xon_tx, &nsd->link_xon_tx);
998 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1001 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1002 pf->stat_offsets_loaded,
1003 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1004
1005 for (i = 0; i < 8; i++) {
1006 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1007 pf->stat_offsets_loaded,
1008 &osd->priority_xoff_rx[i],
1009 &nsd->priority_xoff_rx[i]);
1010 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1011 pf->stat_offsets_loaded,
1012 &osd->priority_xon_rx[i],
1013 &nsd->priority_xon_rx[i]);
1014 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1015 pf->stat_offsets_loaded,
1016 &osd->priority_xon_tx[i],
1017 &nsd->priority_xon_tx[i]);
1018 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1019 pf->stat_offsets_loaded,
1020 &osd->priority_xoff_tx[i],
1021 &nsd->priority_xoff_tx[i]);
1022 i40e_stat_update32(hw,
1023 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1024 pf->stat_offsets_loaded,
1025 &osd->priority_xon_2_xoff[i],
1026 &nsd->priority_xon_2_xoff[i]);
1027 }
1028
1029 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1030 I40E_GLPRT_PRC64L(hw->port),
1031 pf->stat_offsets_loaded,
1032 &osd->rx_size_64, &nsd->rx_size_64);
1033 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1034 I40E_GLPRT_PRC127L(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->rx_size_127, &nsd->rx_size_127);
1037 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1038 I40E_GLPRT_PRC255L(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->rx_size_255, &nsd->rx_size_255);
1041 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1042 I40E_GLPRT_PRC511L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->rx_size_511, &nsd->rx_size_511);
1045 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1046 I40E_GLPRT_PRC1023L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->rx_size_1023, &nsd->rx_size_1023);
1049 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1050 I40E_GLPRT_PRC1522L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->rx_size_1522, &nsd->rx_size_1522);
1053 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1054 I40E_GLPRT_PRC9522L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->rx_size_big, &nsd->rx_size_big);
1057
1058 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1059 I40E_GLPRT_PTC64L(hw->port),
1060 pf->stat_offsets_loaded,
1061 &osd->tx_size_64, &nsd->tx_size_64);
1062 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1063 I40E_GLPRT_PTC127L(hw->port),
1064 pf->stat_offsets_loaded,
1065 &osd->tx_size_127, &nsd->tx_size_127);
1066 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1067 I40E_GLPRT_PTC255L(hw->port),
1068 pf->stat_offsets_loaded,
1069 &osd->tx_size_255, &nsd->tx_size_255);
1070 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1071 I40E_GLPRT_PTC511L(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->tx_size_511, &nsd->tx_size_511);
1074 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1075 I40E_GLPRT_PTC1023L(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->tx_size_1023, &nsd->tx_size_1023);
1078 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1079 I40E_GLPRT_PTC1522L(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->tx_size_1522, &nsd->tx_size_1522);
1082 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1083 I40E_GLPRT_PTC9522L(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->tx_size_big, &nsd->tx_size_big);
1086
1087 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1088 pf->stat_offsets_loaded,
1089 &osd->rx_undersize, &nsd->rx_undersize);
1090 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_fragments, &nsd->rx_fragments);
1093 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_oversize, &nsd->rx_oversize);
1096 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1097 pf->stat_offsets_loaded,
1098 &osd->rx_jabber, &nsd->rx_jabber);
1099
1100 /* FDIR stats */
1101 i40e_stat_update32(hw,
1102 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1103 pf->stat_offsets_loaded,
1104 &osd->fd_atr_match, &nsd->fd_atr_match);
1105 i40e_stat_update32(hw,
1106 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1107 pf->stat_offsets_loaded,
1108 &osd->fd_sb_match, &nsd->fd_sb_match);
1109 i40e_stat_update32(hw,
1110 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1111 pf->stat_offsets_loaded,
1112 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1113
1114 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1115 nsd->tx_lpi_status =
1116 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1117 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1118 nsd->rx_lpi_status =
1119 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1120 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1121 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1122 pf->stat_offsets_loaded,
1123 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1124 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1125 pf->stat_offsets_loaded,
1126 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1127
1128 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1129 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1130 nsd->fd_sb_status = true;
1131 else
1132 nsd->fd_sb_status = false;
1133
1134 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1135 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1136 nsd->fd_atr_status = true;
1137 else
1138 nsd->fd_atr_status = false;
1139
1140 pf->stat_offsets_loaded = true;
1141 }
1142
1143 /**
1144 * i40e_update_stats - Update the various statistics counters.
1145 * @vsi: the VSI to be updated
1146 *
1147 * Update the various stats for this VSI and its related entities.
1148 **/
1149 void i40e_update_stats(struct i40e_vsi *vsi)
1150 {
1151 struct i40e_pf *pf = vsi->back;
1152
1153 if (vsi == pf->vsi[pf->lan_vsi])
1154 i40e_update_pf_stats(pf);
1155
1156 i40e_update_vsi_stats(vsi);
1157 #ifdef I40E_FCOE
1158 i40e_update_fcoe_stats(vsi);
1159 #endif
1160 }
1161
1162 /**
1163 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1164 * @vsi: the VSI to be searched
1165 * @macaddr: the MAC address
1166 * @vlan: the vlan
1167 * @is_vf: make sure its a VF filter, else doesn't matter
1168 * @is_netdev: make sure its a netdev filter, else doesn't matter
1169 *
1170 * Returns ptr to the filter object or NULL
1171 **/
1172 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1173 u8 *macaddr, s16 vlan,
1174 bool is_vf, bool is_netdev)
1175 {
1176 struct i40e_mac_filter *f;
1177
1178 if (!vsi || !macaddr)
1179 return NULL;
1180
1181 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1182 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1183 (vlan == f->vlan) &&
1184 (!is_vf || f->is_vf) &&
1185 (!is_netdev || f->is_netdev))
1186 return f;
1187 }
1188 return NULL;
1189 }
1190
1191 /**
1192 * i40e_find_mac - Find a mac addr in the macvlan filters list
1193 * @vsi: the VSI to be searched
1194 * @macaddr: the MAC address we are searching for
1195 * @is_vf: make sure its a VF filter, else doesn't matter
1196 * @is_netdev: make sure its a netdev filter, else doesn't matter
1197 *
1198 * Returns the first filter with the provided MAC address or NULL if
1199 * MAC address was not found
1200 **/
1201 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1202 bool is_vf, bool is_netdev)
1203 {
1204 struct i40e_mac_filter *f;
1205
1206 if (!vsi || !macaddr)
1207 return NULL;
1208
1209 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1210 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1211 (!is_vf || f->is_vf) &&
1212 (!is_netdev || f->is_netdev))
1213 return f;
1214 }
1215 return NULL;
1216 }
1217
1218 /**
1219 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1220 * @vsi: the VSI to be searched
1221 *
1222 * Returns true if VSI is in vlan mode or false otherwise
1223 **/
1224 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1225 {
1226 struct i40e_mac_filter *f;
1227
1228 /* Only -1 for all the filters denotes not in vlan mode
1229 * so we have to go through all the list in order to make sure
1230 */
1231 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1232 if (f->vlan >= 0 || vsi->info.pvid)
1233 return true;
1234 }
1235
1236 return false;
1237 }
1238
1239 /**
1240 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1241 * @vsi: the VSI to be searched
1242 * @macaddr: the mac address to be filtered
1243 * @is_vf: true if it is a VF
1244 * @is_netdev: true if it is a netdev
1245 *
1246 * Goes through all the macvlan filters and adds a
1247 * macvlan filter for each unique vlan that already exists
1248 *
1249 * Returns first filter found on success, else NULL
1250 **/
1251 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1252 bool is_vf, bool is_netdev)
1253 {
1254 struct i40e_mac_filter *f;
1255
1256 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1257 if (vsi->info.pvid)
1258 f->vlan = le16_to_cpu(vsi->info.pvid);
1259 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1260 is_vf, is_netdev)) {
1261 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1262 is_vf, is_netdev))
1263 return NULL;
1264 }
1265 }
1266
1267 return list_first_entry_or_null(&vsi->mac_filter_list,
1268 struct i40e_mac_filter, list);
1269 }
1270
1271 /**
1272 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1273 * @vsi: the VSI to be searched
1274 * @macaddr: the mac address to be removed
1275 * @is_vf: true if it is a VF
1276 * @is_netdev: true if it is a netdev
1277 *
1278 * Removes a given MAC address from a VSI, regardless of VLAN
1279 *
1280 * Returns 0 for success, or error
1281 **/
1282 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1283 bool is_vf, bool is_netdev)
1284 {
1285 struct i40e_mac_filter *f = NULL;
1286 int changed = 0;
1287
1288 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1289 "Missing mac_filter_list_lock\n");
1290 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1291 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1292 (is_vf == f->is_vf) &&
1293 (is_netdev == f->is_netdev)) {
1294 f->counter--;
1295 f->changed = true;
1296 changed = 1;
1297 }
1298 }
1299 if (changed) {
1300 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1301 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1302 return 0;
1303 }
1304 return -ENOENT;
1305 }
1306
1307 /**
1308 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1309 * @vsi: the PF Main VSI - inappropriate for any other VSI
1310 * @macaddr: the MAC address
1311 *
1312 * Some older firmware configurations set up a default promiscuous VLAN
1313 * filter that needs to be removed.
1314 **/
1315 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1316 {
1317 struct i40e_aqc_remove_macvlan_element_data element;
1318 struct i40e_pf *pf = vsi->back;
1319 i40e_status ret;
1320
1321 /* Only appropriate for the PF main VSI */
1322 if (vsi->type != I40E_VSI_MAIN)
1323 return -EINVAL;
1324
1325 memset(&element, 0, sizeof(element));
1326 ether_addr_copy(element.mac_addr, macaddr);
1327 element.vlan_tag = 0;
1328 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1329 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1330 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1331 if (ret)
1332 return -ENOENT;
1333
1334 return 0;
1335 }
1336
1337 /**
1338 * i40e_add_filter - Add a mac/vlan filter to the VSI
1339 * @vsi: the VSI to be searched
1340 * @macaddr: the MAC address
1341 * @vlan: the vlan
1342 * @is_vf: make sure its a VF filter, else doesn't matter
1343 * @is_netdev: make sure its a netdev filter, else doesn't matter
1344 *
1345 * Returns ptr to the filter object or NULL when no memory available.
1346 *
1347 * NOTE: This function is expected to be called with mac_filter_list_lock
1348 * being held.
1349 **/
1350 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1351 u8 *macaddr, s16 vlan,
1352 bool is_vf, bool is_netdev)
1353 {
1354 struct i40e_mac_filter *f;
1355
1356 if (!vsi || !macaddr)
1357 return NULL;
1358
1359 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1360 if (!f) {
1361 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1362 if (!f)
1363 goto add_filter_out;
1364
1365 ether_addr_copy(f->macaddr, macaddr);
1366 f->vlan = vlan;
1367 f->changed = true;
1368
1369 INIT_LIST_HEAD(&f->list);
1370 list_add_tail(&f->list, &vsi->mac_filter_list);
1371 }
1372
1373 /* increment counter and add a new flag if needed */
1374 if (is_vf) {
1375 if (!f->is_vf) {
1376 f->is_vf = true;
1377 f->counter++;
1378 }
1379 } else if (is_netdev) {
1380 if (!f->is_netdev) {
1381 f->is_netdev = true;
1382 f->counter++;
1383 }
1384 } else {
1385 f->counter++;
1386 }
1387
1388 /* changed tells sync_filters_subtask to
1389 * push the filter down to the firmware
1390 */
1391 if (f->changed) {
1392 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1393 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1394 }
1395
1396 add_filter_out:
1397 return f;
1398 }
1399
1400 /**
1401 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1402 * @vsi: the VSI to be searched
1403 * @macaddr: the MAC address
1404 * @vlan: the vlan
1405 * @is_vf: make sure it's a VF filter, else doesn't matter
1406 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1407 *
1408 * NOTE: This function is expected to be called with mac_filter_list_lock
1409 * being held.
1410 **/
1411 void i40e_del_filter(struct i40e_vsi *vsi,
1412 u8 *macaddr, s16 vlan,
1413 bool is_vf, bool is_netdev)
1414 {
1415 struct i40e_mac_filter *f;
1416
1417 if (!vsi || !macaddr)
1418 return;
1419
1420 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1421 if (!f || f->counter == 0)
1422 return;
1423
1424 if (is_vf) {
1425 if (f->is_vf) {
1426 f->is_vf = false;
1427 f->counter--;
1428 }
1429 } else if (is_netdev) {
1430 if (f->is_netdev) {
1431 f->is_netdev = false;
1432 f->counter--;
1433 }
1434 } else {
1435 /* make sure we don't remove a filter in use by VF or netdev */
1436 int min_f = 0;
1437
1438 min_f += (f->is_vf ? 1 : 0);
1439 min_f += (f->is_netdev ? 1 : 0);
1440
1441 if (f->counter > min_f)
1442 f->counter--;
1443 }
1444
1445 /* counter == 0 tells sync_filters_subtask to
1446 * remove the filter from the firmware's list
1447 */
1448 if (f->counter == 0) {
1449 f->changed = true;
1450 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1451 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1452 }
1453 }
1454
1455 /**
1456 * i40e_set_mac - NDO callback to set mac address
1457 * @netdev: network interface device structure
1458 * @p: pointer to an address structure
1459 *
1460 * Returns 0 on success, negative on failure
1461 **/
1462 #ifdef I40E_FCOE
1463 int i40e_set_mac(struct net_device *netdev, void *p)
1464 #else
1465 static int i40e_set_mac(struct net_device *netdev, void *p)
1466 #endif
1467 {
1468 struct i40e_netdev_priv *np = netdev_priv(netdev);
1469 struct i40e_vsi *vsi = np->vsi;
1470 struct i40e_pf *pf = vsi->back;
1471 struct i40e_hw *hw = &pf->hw;
1472 struct sockaddr *addr = p;
1473 struct i40e_mac_filter *f;
1474
1475 if (!is_valid_ether_addr(addr->sa_data))
1476 return -EADDRNOTAVAIL;
1477
1478 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1479 netdev_info(netdev, "already using mac address %pM\n",
1480 addr->sa_data);
1481 return 0;
1482 }
1483
1484 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1485 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1486 return -EADDRNOTAVAIL;
1487
1488 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1489 netdev_info(netdev, "returning to hw mac address %pM\n",
1490 hw->mac.addr);
1491 else
1492 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1493
1494 if (vsi->type == I40E_VSI_MAIN) {
1495 i40e_status ret;
1496
1497 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1498 I40E_AQC_WRITE_TYPE_LAA_WOL,
1499 addr->sa_data, NULL);
1500 if (ret) {
1501 netdev_info(netdev,
1502 "Addr change for Main VSI failed: %d\n",
1503 ret);
1504 return -EADDRNOTAVAIL;
1505 }
1506 }
1507
1508 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1509 struct i40e_aqc_remove_macvlan_element_data element;
1510
1511 memset(&element, 0, sizeof(element));
1512 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1513 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1515 } else {
1516 spin_lock_bh(&vsi->mac_filter_list_lock);
1517 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1518 false, false);
1519 spin_unlock_bh(&vsi->mac_filter_list_lock);
1520 }
1521
1522 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1523 struct i40e_aqc_add_macvlan_element_data element;
1524
1525 memset(&element, 0, sizeof(element));
1526 ether_addr_copy(element.mac_addr, hw->mac.addr);
1527 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1528 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1529 } else {
1530 spin_lock_bh(&vsi->mac_filter_list_lock);
1531 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1532 false, false);
1533 if (f)
1534 f->is_laa = true;
1535 spin_unlock_bh(&vsi->mac_filter_list_lock);
1536 }
1537
1538 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1539
1540 /* schedule our worker thread which will take care of
1541 * applying the new filter changes
1542 */
1543 i40e_service_event_schedule(vsi->back);
1544 return 0;
1545 }
1546
1547 /**
1548 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1549 * @vsi: the VSI being setup
1550 * @ctxt: VSI context structure
1551 * @enabled_tc: Enabled TCs bitmap
1552 * @is_add: True if called before Add VSI
1553 *
1554 * Setup VSI queue mapping for enabled traffic classes.
1555 **/
1556 #ifdef I40E_FCOE
1557 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1558 struct i40e_vsi_context *ctxt,
1559 u8 enabled_tc,
1560 bool is_add)
1561 #else
1562 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1563 struct i40e_vsi_context *ctxt,
1564 u8 enabled_tc,
1565 bool is_add)
1566 #endif
1567 {
1568 struct i40e_pf *pf = vsi->back;
1569 u16 sections = 0;
1570 u8 netdev_tc = 0;
1571 u16 numtc = 0;
1572 u16 qcount;
1573 u8 offset;
1574 u16 qmap;
1575 int i;
1576 u16 num_tc_qps = 0;
1577
1578 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1579 offset = 0;
1580
1581 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1582 /* Find numtc from enabled TC bitmap */
1583 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1584 if (enabled_tc & BIT(i)) /* TC is enabled */
1585 numtc++;
1586 }
1587 if (!numtc) {
1588 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1589 numtc = 1;
1590 }
1591 } else {
1592 /* At least TC0 is enabled in case of non-DCB case */
1593 numtc = 1;
1594 }
1595
1596 vsi->tc_config.numtc = numtc;
1597 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1598 /* Number of queues per enabled TC */
1599 /* In MFP case we can have a much lower count of MSIx
1600 * vectors available and so we need to lower the used
1601 * q count.
1602 */
1603 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1604 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1605 else
1606 qcount = vsi->alloc_queue_pairs;
1607 num_tc_qps = qcount / numtc;
1608 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1609
1610 /* Setup queue offset/count for all TCs for given VSI */
1611 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1612 /* See if the given TC is enabled for the given VSI */
1613 if (vsi->tc_config.enabled_tc & BIT(i)) {
1614 /* TC is enabled */
1615 int pow, num_qps;
1616
1617 switch (vsi->type) {
1618 case I40E_VSI_MAIN:
1619 qcount = min_t(int, pf->alloc_rss_size,
1620 num_tc_qps);
1621 break;
1622 #ifdef I40E_FCOE
1623 case I40E_VSI_FCOE:
1624 qcount = num_tc_qps;
1625 break;
1626 #endif
1627 case I40E_VSI_FDIR:
1628 case I40E_VSI_SRIOV:
1629 case I40E_VSI_VMDQ2:
1630 default:
1631 qcount = num_tc_qps;
1632 WARN_ON(i != 0);
1633 break;
1634 }
1635 vsi->tc_config.tc_info[i].qoffset = offset;
1636 vsi->tc_config.tc_info[i].qcount = qcount;
1637
1638 /* find the next higher power-of-2 of num queue pairs */
1639 num_qps = qcount;
1640 pow = 0;
1641 while (num_qps && (BIT_ULL(pow) < qcount)) {
1642 pow++;
1643 num_qps >>= 1;
1644 }
1645
1646 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1647 qmap =
1648 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1649 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1650
1651 offset += qcount;
1652 } else {
1653 /* TC is not enabled so set the offset to
1654 * default queue and allocate one queue
1655 * for the given TC.
1656 */
1657 vsi->tc_config.tc_info[i].qoffset = 0;
1658 vsi->tc_config.tc_info[i].qcount = 1;
1659 vsi->tc_config.tc_info[i].netdev_tc = 0;
1660
1661 qmap = 0;
1662 }
1663 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1664 }
1665
1666 /* Set actual Tx/Rx queue pairs */
1667 vsi->num_queue_pairs = offset;
1668 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1669 if (vsi->req_queue_pairs > 0)
1670 vsi->num_queue_pairs = vsi->req_queue_pairs;
1671 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1672 vsi->num_queue_pairs = pf->num_lan_msix;
1673 }
1674
1675 /* Scheduler section valid can only be set for ADD VSI */
1676 if (is_add) {
1677 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1678
1679 ctxt->info.up_enable_bits = enabled_tc;
1680 }
1681 if (vsi->type == I40E_VSI_SRIOV) {
1682 ctxt->info.mapping_flags |=
1683 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1684 for (i = 0; i < vsi->num_queue_pairs; i++)
1685 ctxt->info.queue_mapping[i] =
1686 cpu_to_le16(vsi->base_queue + i);
1687 } else {
1688 ctxt->info.mapping_flags |=
1689 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1690 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1691 }
1692 ctxt->info.valid_sections |= cpu_to_le16(sections);
1693 }
1694
1695 /**
1696 * i40e_set_rx_mode - NDO callback to set the netdev filters
1697 * @netdev: network interface device structure
1698 **/
1699 #ifdef I40E_FCOE
1700 void i40e_set_rx_mode(struct net_device *netdev)
1701 #else
1702 static void i40e_set_rx_mode(struct net_device *netdev)
1703 #endif
1704 {
1705 struct i40e_netdev_priv *np = netdev_priv(netdev);
1706 struct i40e_mac_filter *f, *ftmp;
1707 struct i40e_vsi *vsi = np->vsi;
1708 struct netdev_hw_addr *uca;
1709 struct netdev_hw_addr *mca;
1710 struct netdev_hw_addr *ha;
1711
1712 spin_lock_bh(&vsi->mac_filter_list_lock);
1713
1714 /* add addr if not already in the filter list */
1715 netdev_for_each_uc_addr(uca, netdev) {
1716 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1717 if (i40e_is_vsi_in_vlan(vsi))
1718 i40e_put_mac_in_vlan(vsi, uca->addr,
1719 false, true);
1720 else
1721 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1722 false, true);
1723 }
1724 }
1725
1726 netdev_for_each_mc_addr(mca, netdev) {
1727 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1728 if (i40e_is_vsi_in_vlan(vsi))
1729 i40e_put_mac_in_vlan(vsi, mca->addr,
1730 false, true);
1731 else
1732 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1733 false, true);
1734 }
1735 }
1736
1737 /* remove filter if not in netdev list */
1738 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1739
1740 if (!f->is_netdev)
1741 continue;
1742
1743 netdev_for_each_mc_addr(mca, netdev)
1744 if (ether_addr_equal(mca->addr, f->macaddr))
1745 goto bottom_of_search_loop;
1746
1747 netdev_for_each_uc_addr(uca, netdev)
1748 if (ether_addr_equal(uca->addr, f->macaddr))
1749 goto bottom_of_search_loop;
1750
1751 for_each_dev_addr(netdev, ha)
1752 if (ether_addr_equal(ha->addr, f->macaddr))
1753 goto bottom_of_search_loop;
1754
1755 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1756 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1757
1758 bottom_of_search_loop:
1759 continue;
1760 }
1761 spin_unlock_bh(&vsi->mac_filter_list_lock);
1762
1763 /* check for other flag changes */
1764 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1765 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1766 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1767 }
1768
1769 /* schedule our worker thread which will take care of
1770 * applying the new filter changes
1771 */
1772 i40e_service_event_schedule(vsi->back);
1773 }
1774
1775 /**
1776 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1777 * @src: source MAC filter entry to be clones
1778 *
1779 * Returns the pointer to newly cloned MAC filter entry or NULL
1780 * in case of error
1781 **/
1782 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1783 struct i40e_mac_filter *src)
1784 {
1785 struct i40e_mac_filter *f;
1786
1787 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1788 if (!f)
1789 return NULL;
1790 *f = *src;
1791
1792 INIT_LIST_HEAD(&f->list);
1793
1794 return f;
1795 }
1796
1797 /**
1798 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1799 * @vsi: pointer to vsi struct
1800 * @from: Pointer to list which contains MAC filter entries - changes to
1801 * those entries needs to be undone.
1802 *
1803 * MAC filter entries from list were slated to be removed from device.
1804 **/
1805 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1806 struct list_head *from)
1807 {
1808 struct i40e_mac_filter *f, *ftmp;
1809
1810 list_for_each_entry_safe(f, ftmp, from, list) {
1811 f->changed = true;
1812 /* Move the element back into MAC filter list*/
1813 list_move_tail(&f->list, &vsi->mac_filter_list);
1814 }
1815 }
1816
1817 /**
1818 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1819 * @vsi: pointer to vsi struct
1820 *
1821 * MAC filter entries from list were slated to be added from device.
1822 **/
1823 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1824 {
1825 struct i40e_mac_filter *f, *ftmp;
1826
1827 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1828 if (!f->changed && f->counter)
1829 f->changed = true;
1830 }
1831 }
1832
1833 /**
1834 * i40e_cleanup_add_list - Deletes the element from add list and release
1835 * memory
1836 * @add_list: Pointer to list which contains MAC filter entries
1837 **/
1838 static void i40e_cleanup_add_list(struct list_head *add_list)
1839 {
1840 struct i40e_mac_filter *f, *ftmp;
1841
1842 list_for_each_entry_safe(f, ftmp, add_list, list) {
1843 list_del(&f->list);
1844 kfree(f);
1845 }
1846 }
1847
1848 /**
1849 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1850 * @vsi: ptr to the VSI
1851 *
1852 * Push any outstanding VSI filter changes through the AdminQ.
1853 *
1854 * Returns 0 or error value
1855 **/
1856 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1857 {
1858 struct list_head tmp_del_list, tmp_add_list;
1859 struct i40e_mac_filter *f, *ftmp, *fclone;
1860 bool promisc_forced_on = false;
1861 bool add_happened = false;
1862 int filter_list_len = 0;
1863 u32 changed_flags = 0;
1864 i40e_status aq_ret = 0;
1865 bool err_cond = false;
1866 int retval = 0;
1867 struct i40e_pf *pf;
1868 int num_add = 0;
1869 int num_del = 0;
1870 int aq_err = 0;
1871 u16 cmd_flags;
1872
1873 /* empty array typed pointers, kcalloc later */
1874 struct i40e_aqc_add_macvlan_element_data *add_list;
1875 struct i40e_aqc_remove_macvlan_element_data *del_list;
1876
1877 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1878 usleep_range(1000, 2000);
1879 pf = vsi->back;
1880
1881 if (vsi->netdev) {
1882 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1883 vsi->current_netdev_flags = vsi->netdev->flags;
1884 }
1885
1886 INIT_LIST_HEAD(&tmp_del_list);
1887 INIT_LIST_HEAD(&tmp_add_list);
1888
1889 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1890 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1891
1892 spin_lock_bh(&vsi->mac_filter_list_lock);
1893 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1894 if (!f->changed)
1895 continue;
1896
1897 if (f->counter != 0)
1898 continue;
1899 f->changed = false;
1900
1901 /* Move the element into temporary del_list */
1902 list_move_tail(&f->list, &tmp_del_list);
1903 }
1904
1905 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1906 if (!f->changed)
1907 continue;
1908
1909 if (f->counter == 0)
1910 continue;
1911 f->changed = false;
1912
1913 /* Clone MAC filter entry and add into temporary list */
1914 fclone = i40e_mac_filter_entry_clone(f);
1915 if (!fclone) {
1916 err_cond = true;
1917 break;
1918 }
1919 list_add_tail(&fclone->list, &tmp_add_list);
1920 }
1921
1922 /* if failed to clone MAC filter entry - undo */
1923 if (err_cond) {
1924 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1925 i40e_undo_add_filter_entries(vsi);
1926 }
1927 spin_unlock_bh(&vsi->mac_filter_list_lock);
1928
1929 if (err_cond) {
1930 i40e_cleanup_add_list(&tmp_add_list);
1931 retval = -ENOMEM;
1932 goto out;
1933 }
1934 }
1935
1936 /* Now process 'del_list' outside the lock */
1937 if (!list_empty(&tmp_del_list)) {
1938 int del_list_size;
1939
1940 filter_list_len = pf->hw.aq.asq_buf_size /
1941 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1942 del_list_size = filter_list_len *
1943 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1944 del_list = kzalloc(del_list_size, GFP_ATOMIC);
1945 if (!del_list) {
1946 i40e_cleanup_add_list(&tmp_add_list);
1947
1948 /* Undo VSI's MAC filter entry element updates */
1949 spin_lock_bh(&vsi->mac_filter_list_lock);
1950 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1951 i40e_undo_add_filter_entries(vsi);
1952 spin_unlock_bh(&vsi->mac_filter_list_lock);
1953 retval = -ENOMEM;
1954 goto out;
1955 }
1956
1957 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1958 cmd_flags = 0;
1959
1960 /* add to delete list */
1961 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1962 del_list[num_del].vlan_tag =
1963 cpu_to_le16((u16)(f->vlan ==
1964 I40E_VLAN_ANY ? 0 : f->vlan));
1965
1966 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1967 del_list[num_del].flags = cmd_flags;
1968 num_del++;
1969
1970 /* flush a full buffer */
1971 if (num_del == filter_list_len) {
1972 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1973 vsi->seid,
1974 del_list,
1975 num_del,
1976 NULL);
1977 aq_err = pf->hw.aq.asq_last_status;
1978 num_del = 0;
1979 memset(del_list, 0, del_list_size);
1980
1981 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1982 retval = -EIO;
1983 dev_err(&pf->pdev->dev,
1984 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1985 i40e_stat_str(&pf->hw, aq_ret),
1986 i40e_aq_str(&pf->hw, aq_err));
1987 }
1988 }
1989 /* Release memory for MAC filter entries which were
1990 * synced up with HW.
1991 */
1992 list_del(&f->list);
1993 kfree(f);
1994 }
1995
1996 if (num_del) {
1997 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1998 del_list, num_del,
1999 NULL);
2000 aq_err = pf->hw.aq.asq_last_status;
2001 num_del = 0;
2002
2003 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
2004 dev_info(&pf->pdev->dev,
2005 "ignoring delete macvlan error, err %s aq_err %s\n",
2006 i40e_stat_str(&pf->hw, aq_ret),
2007 i40e_aq_str(&pf->hw, aq_err));
2008 }
2009
2010 kfree(del_list);
2011 del_list = NULL;
2012 }
2013
2014 if (!list_empty(&tmp_add_list)) {
2015 int add_list_size;
2016
2017 /* do all the adds now */
2018 filter_list_len = pf->hw.aq.asq_buf_size /
2019 sizeof(struct i40e_aqc_add_macvlan_element_data),
2020 add_list_size = filter_list_len *
2021 sizeof(struct i40e_aqc_add_macvlan_element_data);
2022 add_list = kzalloc(add_list_size, GFP_ATOMIC);
2023 if (!add_list) {
2024 /* Purge element from temporary lists */
2025 i40e_cleanup_add_list(&tmp_add_list);
2026
2027 /* Undo add filter entries from VSI MAC filter list */
2028 spin_lock_bh(&vsi->mac_filter_list_lock);
2029 i40e_undo_add_filter_entries(vsi);
2030 spin_unlock_bh(&vsi->mac_filter_list_lock);
2031 retval = -ENOMEM;
2032 goto out;
2033 }
2034
2035 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2036
2037 add_happened = true;
2038 cmd_flags = 0;
2039
2040 /* add to add array */
2041 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2042 add_list[num_add].vlan_tag =
2043 cpu_to_le16(
2044 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2045 add_list[num_add].queue_number = 0;
2046
2047 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2048 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2049 num_add++;
2050
2051 /* flush a full buffer */
2052 if (num_add == filter_list_len) {
2053 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2054 add_list, num_add,
2055 NULL);
2056 aq_err = pf->hw.aq.asq_last_status;
2057 num_add = 0;
2058
2059 if (aq_ret)
2060 break;
2061 memset(add_list, 0, add_list_size);
2062 }
2063 /* Entries from tmp_add_list were cloned from MAC
2064 * filter list, hence clean those cloned entries
2065 */
2066 list_del(&f->list);
2067 kfree(f);
2068 }
2069
2070 if (num_add) {
2071 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2072 add_list, num_add, NULL);
2073 aq_err = pf->hw.aq.asq_last_status;
2074 num_add = 0;
2075 }
2076 kfree(add_list);
2077 add_list = NULL;
2078
2079 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2080 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2081 dev_info(&pf->pdev->dev,
2082 "add filter failed, err %s aq_err %s\n",
2083 i40e_stat_str(&pf->hw, aq_ret),
2084 i40e_aq_str(&pf->hw, aq_err));
2085 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2086 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2087 &vsi->state)) {
2088 promisc_forced_on = true;
2089 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2090 &vsi->state);
2091 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2092 }
2093 }
2094 }
2095
2096 /* check for changes in promiscuous modes */
2097 if (changed_flags & IFF_ALLMULTI) {
2098 bool cur_multipromisc;
2099
2100 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2101 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2102 vsi->seid,
2103 cur_multipromisc,
2104 NULL);
2105 if (aq_ret) {
2106 retval = i40e_aq_rc_to_posix(aq_ret,
2107 pf->hw.aq.asq_last_status);
2108 dev_info(&pf->pdev->dev,
2109 "set multi promisc failed, err %s aq_err %s\n",
2110 i40e_stat_str(&pf->hw, aq_ret),
2111 i40e_aq_str(&pf->hw,
2112 pf->hw.aq.asq_last_status));
2113 }
2114 }
2115 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2116 bool cur_promisc;
2117
2118 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2119 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2120 &vsi->state));
2121 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2122 /* set defport ON for Main VSI instead of true promisc
2123 * this way we will get all unicast/multicast and VLAN
2124 * promisc behavior but will not get VF or VMDq traffic
2125 * replicated on the Main VSI.
2126 */
2127 if (pf->cur_promisc != cur_promisc) {
2128 pf->cur_promisc = cur_promisc;
2129 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2130 }
2131 } else {
2132 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2133 &vsi->back->hw,
2134 vsi->seid,
2135 cur_promisc, NULL);
2136 if (aq_ret) {
2137 retval =
2138 i40e_aq_rc_to_posix(aq_ret,
2139 pf->hw.aq.asq_last_status);
2140 dev_info(&pf->pdev->dev,
2141 "set unicast promisc failed, err %d, aq_err %d\n",
2142 aq_ret, pf->hw.aq.asq_last_status);
2143 }
2144 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2145 &vsi->back->hw,
2146 vsi->seid,
2147 cur_promisc, NULL);
2148 if (aq_ret) {
2149 retval =
2150 i40e_aq_rc_to_posix(aq_ret,
2151 pf->hw.aq.asq_last_status);
2152 dev_info(&pf->pdev->dev,
2153 "set multicast promisc failed, err %d, aq_err %d\n",
2154 aq_ret, pf->hw.aq.asq_last_status);
2155 }
2156 }
2157 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2158 vsi->seid,
2159 cur_promisc, NULL);
2160 if (aq_ret) {
2161 retval = i40e_aq_rc_to_posix(aq_ret,
2162 pf->hw.aq.asq_last_status);
2163 dev_info(&pf->pdev->dev,
2164 "set brdcast promisc failed, err %s, aq_err %s\n",
2165 i40e_stat_str(&pf->hw, aq_ret),
2166 i40e_aq_str(&pf->hw,
2167 pf->hw.aq.asq_last_status));
2168 }
2169 }
2170 out:
2171 /* if something went wrong then set the changed flag so we try again */
2172 if (retval)
2173 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2174
2175 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2176 return retval;
2177 }
2178
2179 /**
2180 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2181 * @pf: board private structure
2182 **/
2183 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2184 {
2185 int v;
2186
2187 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2188 return;
2189 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2190
2191 for (v = 0; v < pf->num_alloc_vsi; v++) {
2192 if (pf->vsi[v] &&
2193 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2194 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2195
2196 if (ret) {
2197 /* come back and try again later */
2198 pf->flags |= I40E_FLAG_FILTER_SYNC;
2199 break;
2200 }
2201 }
2202 }
2203 }
2204
2205 /**
2206 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2207 * @netdev: network interface device structure
2208 * @new_mtu: new value for maximum frame size
2209 *
2210 * Returns 0 on success, negative on failure
2211 **/
2212 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2213 {
2214 struct i40e_netdev_priv *np = netdev_priv(netdev);
2215 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2216 struct i40e_vsi *vsi = np->vsi;
2217
2218 /* MTU < 68 is an error and causes problems on some kernels */
2219 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2220 return -EINVAL;
2221
2222 netdev_info(netdev, "changing MTU from %d to %d\n",
2223 netdev->mtu, new_mtu);
2224 netdev->mtu = new_mtu;
2225 if (netif_running(netdev))
2226 i40e_vsi_reinit_locked(vsi);
2227
2228 return 0;
2229 }
2230
2231 /**
2232 * i40e_ioctl - Access the hwtstamp interface
2233 * @netdev: network interface device structure
2234 * @ifr: interface request data
2235 * @cmd: ioctl command
2236 **/
2237 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2238 {
2239 struct i40e_netdev_priv *np = netdev_priv(netdev);
2240 struct i40e_pf *pf = np->vsi->back;
2241
2242 switch (cmd) {
2243 case SIOCGHWTSTAMP:
2244 return i40e_ptp_get_ts_config(pf, ifr);
2245 case SIOCSHWTSTAMP:
2246 return i40e_ptp_set_ts_config(pf, ifr);
2247 default:
2248 return -EOPNOTSUPP;
2249 }
2250 }
2251
2252 /**
2253 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2254 * @vsi: the vsi being adjusted
2255 **/
2256 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2257 {
2258 struct i40e_vsi_context ctxt;
2259 i40e_status ret;
2260
2261 if ((vsi->info.valid_sections &
2262 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2263 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2264 return; /* already enabled */
2265
2266 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2267 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2268 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2269
2270 ctxt.seid = vsi->seid;
2271 ctxt.info = vsi->info;
2272 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2273 if (ret) {
2274 dev_info(&vsi->back->pdev->dev,
2275 "update vlan stripping failed, err %s aq_err %s\n",
2276 i40e_stat_str(&vsi->back->hw, ret),
2277 i40e_aq_str(&vsi->back->hw,
2278 vsi->back->hw.aq.asq_last_status));
2279 }
2280 }
2281
2282 /**
2283 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2284 * @vsi: the vsi being adjusted
2285 **/
2286 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2287 {
2288 struct i40e_vsi_context ctxt;
2289 i40e_status ret;
2290
2291 if ((vsi->info.valid_sections &
2292 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2293 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2294 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2295 return; /* already disabled */
2296
2297 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2298 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2299 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2300
2301 ctxt.seid = vsi->seid;
2302 ctxt.info = vsi->info;
2303 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2304 if (ret) {
2305 dev_info(&vsi->back->pdev->dev,
2306 "update vlan stripping failed, err %s aq_err %s\n",
2307 i40e_stat_str(&vsi->back->hw, ret),
2308 i40e_aq_str(&vsi->back->hw,
2309 vsi->back->hw.aq.asq_last_status));
2310 }
2311 }
2312
2313 /**
2314 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2315 * @netdev: network interface to be adjusted
2316 * @features: netdev features to test if VLAN offload is enabled or not
2317 **/
2318 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2319 {
2320 struct i40e_netdev_priv *np = netdev_priv(netdev);
2321 struct i40e_vsi *vsi = np->vsi;
2322
2323 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2324 i40e_vlan_stripping_enable(vsi);
2325 else
2326 i40e_vlan_stripping_disable(vsi);
2327 }
2328
2329 /**
2330 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2331 * @vsi: the vsi being configured
2332 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2333 **/
2334 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2335 {
2336 struct i40e_mac_filter *f, *add_f;
2337 bool is_netdev, is_vf;
2338
2339 is_vf = (vsi->type == I40E_VSI_SRIOV);
2340 is_netdev = !!(vsi->netdev);
2341
2342 /* Locked once because all functions invoked below iterates list*/
2343 spin_lock_bh(&vsi->mac_filter_list_lock);
2344
2345 if (is_netdev) {
2346 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2347 is_vf, is_netdev);
2348 if (!add_f) {
2349 dev_info(&vsi->back->pdev->dev,
2350 "Could not add vlan filter %d for %pM\n",
2351 vid, vsi->netdev->dev_addr);
2352 spin_unlock_bh(&vsi->mac_filter_list_lock);
2353 return -ENOMEM;
2354 }
2355 }
2356
2357 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2358 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2359 if (!add_f) {
2360 dev_info(&vsi->back->pdev->dev,
2361 "Could not add vlan filter %d for %pM\n",
2362 vid, f->macaddr);
2363 spin_unlock_bh(&vsi->mac_filter_list_lock);
2364 return -ENOMEM;
2365 }
2366 }
2367
2368 /* Now if we add a vlan tag, make sure to check if it is the first
2369 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2370 * with 0, so we now accept untagged and specified tagged traffic
2371 * (and not any taged and untagged)
2372 */
2373 if (vid > 0) {
2374 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2375 I40E_VLAN_ANY,
2376 is_vf, is_netdev)) {
2377 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2378 I40E_VLAN_ANY, is_vf, is_netdev);
2379 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2380 is_vf, is_netdev);
2381 if (!add_f) {
2382 dev_info(&vsi->back->pdev->dev,
2383 "Could not add filter 0 for %pM\n",
2384 vsi->netdev->dev_addr);
2385 spin_unlock_bh(&vsi->mac_filter_list_lock);
2386 return -ENOMEM;
2387 }
2388 }
2389 }
2390
2391 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2392 if (vid > 0 && !vsi->info.pvid) {
2393 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2394 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2395 is_vf, is_netdev))
2396 continue;
2397 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2398 is_vf, is_netdev);
2399 add_f = i40e_add_filter(vsi, f->macaddr,
2400 0, is_vf, is_netdev);
2401 if (!add_f) {
2402 dev_info(&vsi->back->pdev->dev,
2403 "Could not add filter 0 for %pM\n",
2404 f->macaddr);
2405 spin_unlock_bh(&vsi->mac_filter_list_lock);
2406 return -ENOMEM;
2407 }
2408 }
2409 }
2410
2411 spin_unlock_bh(&vsi->mac_filter_list_lock);
2412
2413 /* schedule our worker thread which will take care of
2414 * applying the new filter changes
2415 */
2416 i40e_service_event_schedule(vsi->back);
2417 return 0;
2418 }
2419
2420 /**
2421 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2422 * @vsi: the vsi being configured
2423 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2424 *
2425 * Return: 0 on success or negative otherwise
2426 **/
2427 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2428 {
2429 struct net_device *netdev = vsi->netdev;
2430 struct i40e_mac_filter *f, *add_f;
2431 bool is_vf, is_netdev;
2432 int filter_count = 0;
2433
2434 is_vf = (vsi->type == I40E_VSI_SRIOV);
2435 is_netdev = !!(netdev);
2436
2437 /* Locked once because all functions invoked below iterates list */
2438 spin_lock_bh(&vsi->mac_filter_list_lock);
2439
2440 if (is_netdev)
2441 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2442
2443 list_for_each_entry(f, &vsi->mac_filter_list, list)
2444 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2445
2446 /* go through all the filters for this VSI and if there is only
2447 * vid == 0 it means there are no other filters, so vid 0 must
2448 * be replaced with -1. This signifies that we should from now
2449 * on accept any traffic (with any tag present, or untagged)
2450 */
2451 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2452 if (is_netdev) {
2453 if (f->vlan &&
2454 ether_addr_equal(netdev->dev_addr, f->macaddr))
2455 filter_count++;
2456 }
2457
2458 if (f->vlan)
2459 filter_count++;
2460 }
2461
2462 if (!filter_count && is_netdev) {
2463 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2464 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2465 is_vf, is_netdev);
2466 if (!f) {
2467 dev_info(&vsi->back->pdev->dev,
2468 "Could not add filter %d for %pM\n",
2469 I40E_VLAN_ANY, netdev->dev_addr);
2470 spin_unlock_bh(&vsi->mac_filter_list_lock);
2471 return -ENOMEM;
2472 }
2473 }
2474
2475 if (!filter_count) {
2476 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2477 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2478 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2479 is_vf, is_netdev);
2480 if (!add_f) {
2481 dev_info(&vsi->back->pdev->dev,
2482 "Could not add filter %d for %pM\n",
2483 I40E_VLAN_ANY, f->macaddr);
2484 spin_unlock_bh(&vsi->mac_filter_list_lock);
2485 return -ENOMEM;
2486 }
2487 }
2488 }
2489
2490 spin_unlock_bh(&vsi->mac_filter_list_lock);
2491
2492 /* schedule our worker thread which will take care of
2493 * applying the new filter changes
2494 */
2495 i40e_service_event_schedule(vsi->back);
2496 return 0;
2497 }
2498
2499 /**
2500 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2501 * @netdev: network interface to be adjusted
2502 * @vid: vlan id to be added
2503 *
2504 * net_device_ops implementation for adding vlan ids
2505 **/
2506 #ifdef I40E_FCOE
2507 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2508 __always_unused __be16 proto, u16 vid)
2509 #else
2510 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2511 __always_unused __be16 proto, u16 vid)
2512 #endif
2513 {
2514 struct i40e_netdev_priv *np = netdev_priv(netdev);
2515 struct i40e_vsi *vsi = np->vsi;
2516 int ret = 0;
2517
2518 if (vid > 4095)
2519 return -EINVAL;
2520
2521 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2522
2523 /* If the network stack called us with vid = 0 then
2524 * it is asking to receive priority tagged packets with
2525 * vlan id 0. Our HW receives them by default when configured
2526 * to receive untagged packets so there is no need to add an
2527 * extra filter for vlan 0 tagged packets.
2528 */
2529 if (vid)
2530 ret = i40e_vsi_add_vlan(vsi, vid);
2531
2532 if (!ret && (vid < VLAN_N_VID))
2533 set_bit(vid, vsi->active_vlans);
2534
2535 return ret;
2536 }
2537
2538 /**
2539 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2540 * @netdev: network interface to be adjusted
2541 * @vid: vlan id to be removed
2542 *
2543 * net_device_ops implementation for removing vlan ids
2544 **/
2545 #ifdef I40E_FCOE
2546 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2547 __always_unused __be16 proto, u16 vid)
2548 #else
2549 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2550 __always_unused __be16 proto, u16 vid)
2551 #endif
2552 {
2553 struct i40e_netdev_priv *np = netdev_priv(netdev);
2554 struct i40e_vsi *vsi = np->vsi;
2555
2556 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2557
2558 /* return code is ignored as there is nothing a user
2559 * can do about failure to remove and a log message was
2560 * already printed from the other function
2561 */
2562 i40e_vsi_kill_vlan(vsi, vid);
2563
2564 clear_bit(vid, vsi->active_vlans);
2565
2566 return 0;
2567 }
2568
2569 /**
2570 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2571 * @vsi: the vsi being brought back up
2572 **/
2573 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2574 {
2575 u16 vid;
2576
2577 if (!vsi->netdev)
2578 return;
2579
2580 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2581
2582 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2583 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2584 vid);
2585 }
2586
2587 /**
2588 * i40e_vsi_add_pvid - Add pvid for the VSI
2589 * @vsi: the vsi being adjusted
2590 * @vid: the vlan id to set as a PVID
2591 **/
2592 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2593 {
2594 struct i40e_vsi_context ctxt;
2595 i40e_status ret;
2596
2597 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2598 vsi->info.pvid = cpu_to_le16(vid);
2599 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2600 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2601 I40E_AQ_VSI_PVLAN_EMOD_STR;
2602
2603 ctxt.seid = vsi->seid;
2604 ctxt.info = vsi->info;
2605 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2606 if (ret) {
2607 dev_info(&vsi->back->pdev->dev,
2608 "add pvid failed, err %s aq_err %s\n",
2609 i40e_stat_str(&vsi->back->hw, ret),
2610 i40e_aq_str(&vsi->back->hw,
2611 vsi->back->hw.aq.asq_last_status));
2612 return -ENOENT;
2613 }
2614
2615 return 0;
2616 }
2617
2618 /**
2619 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2620 * @vsi: the vsi being adjusted
2621 *
2622 * Just use the vlan_rx_register() service to put it back to normal
2623 **/
2624 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2625 {
2626 i40e_vlan_stripping_disable(vsi);
2627
2628 vsi->info.pvid = 0;
2629 }
2630
2631 /**
2632 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2633 * @vsi: ptr to the VSI
2634 *
2635 * If this function returns with an error, then it's possible one or
2636 * more of the rings is populated (while the rest are not). It is the
2637 * callers duty to clean those orphaned rings.
2638 *
2639 * Return 0 on success, negative on failure
2640 **/
2641 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2642 {
2643 int i, err = 0;
2644
2645 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2646 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2647
2648 return err;
2649 }
2650
2651 /**
2652 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2653 * @vsi: ptr to the VSI
2654 *
2655 * Free VSI's transmit software resources
2656 **/
2657 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2658 {
2659 int i;
2660
2661 if (!vsi->tx_rings)
2662 return;
2663
2664 for (i = 0; i < vsi->num_queue_pairs; i++)
2665 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2666 i40e_free_tx_resources(vsi->tx_rings[i]);
2667 }
2668
2669 /**
2670 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2671 * @vsi: ptr to the VSI
2672 *
2673 * If this function returns with an error, then it's possible one or
2674 * more of the rings is populated (while the rest are not). It is the
2675 * callers duty to clean those orphaned rings.
2676 *
2677 * Return 0 on success, negative on failure
2678 **/
2679 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2680 {
2681 int i, err = 0;
2682
2683 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2684 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2685 #ifdef I40E_FCOE
2686 i40e_fcoe_setup_ddp_resources(vsi);
2687 #endif
2688 return err;
2689 }
2690
2691 /**
2692 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2693 * @vsi: ptr to the VSI
2694 *
2695 * Free all receive software resources
2696 **/
2697 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2698 {
2699 int i;
2700
2701 if (!vsi->rx_rings)
2702 return;
2703
2704 for (i = 0; i < vsi->num_queue_pairs; i++)
2705 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2706 i40e_free_rx_resources(vsi->rx_rings[i]);
2707 #ifdef I40E_FCOE
2708 i40e_fcoe_free_ddp_resources(vsi);
2709 #endif
2710 }
2711
2712 /**
2713 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2714 * @ring: The Tx ring to configure
2715 *
2716 * This enables/disables XPS for a given Tx descriptor ring
2717 * based on the TCs enabled for the VSI that ring belongs to.
2718 **/
2719 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2720 {
2721 struct i40e_vsi *vsi = ring->vsi;
2722 cpumask_var_t mask;
2723
2724 if (!ring->q_vector || !ring->netdev)
2725 return;
2726
2727 /* Single TC mode enable XPS */
2728 if (vsi->tc_config.numtc <= 1) {
2729 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2730 netif_set_xps_queue(ring->netdev,
2731 &ring->q_vector->affinity_mask,
2732 ring->queue_index);
2733 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2734 /* Disable XPS to allow selection based on TC */
2735 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2736 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2737 free_cpumask_var(mask);
2738 }
2739
2740 /* schedule our worker thread which will take care of
2741 * applying the new filter changes
2742 */
2743 i40e_service_event_schedule(vsi->back);
2744 }
2745
2746 /**
2747 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2748 * @ring: The Tx ring to configure
2749 *
2750 * Configure the Tx descriptor ring in the HMC context.
2751 **/
2752 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2753 {
2754 struct i40e_vsi *vsi = ring->vsi;
2755 u16 pf_q = vsi->base_queue + ring->queue_index;
2756 struct i40e_hw *hw = &vsi->back->hw;
2757 struct i40e_hmc_obj_txq tx_ctx;
2758 i40e_status err = 0;
2759 u32 qtx_ctl = 0;
2760
2761 /* some ATR related tx ring init */
2762 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2763 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2764 ring->atr_count = 0;
2765 } else {
2766 ring->atr_sample_rate = 0;
2767 }
2768
2769 /* configure XPS */
2770 i40e_config_xps_tx_ring(ring);
2771
2772 /* clear the context structure first */
2773 memset(&tx_ctx, 0, sizeof(tx_ctx));
2774
2775 tx_ctx.new_context = 1;
2776 tx_ctx.base = (ring->dma / 128);
2777 tx_ctx.qlen = ring->count;
2778 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2779 I40E_FLAG_FD_ATR_ENABLED));
2780 #ifdef I40E_FCOE
2781 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2782 #endif
2783 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2784 /* FDIR VSI tx ring can still use RS bit and writebacks */
2785 if (vsi->type != I40E_VSI_FDIR)
2786 tx_ctx.head_wb_ena = 1;
2787 tx_ctx.head_wb_addr = ring->dma +
2788 (ring->count * sizeof(struct i40e_tx_desc));
2789
2790 /* As part of VSI creation/update, FW allocates certain
2791 * Tx arbitration queue sets for each TC enabled for
2792 * the VSI. The FW returns the handles to these queue
2793 * sets as part of the response buffer to Add VSI,
2794 * Update VSI, etc. AQ commands. It is expected that
2795 * these queue set handles be associated with the Tx
2796 * queues by the driver as part of the TX queue context
2797 * initialization. This has to be done regardless of
2798 * DCB as by default everything is mapped to TC0.
2799 */
2800 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2801 tx_ctx.rdylist_act = 0;
2802
2803 /* clear the context in the HMC */
2804 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2805 if (err) {
2806 dev_info(&vsi->back->pdev->dev,
2807 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2808 ring->queue_index, pf_q, err);
2809 return -ENOMEM;
2810 }
2811
2812 /* set the context in the HMC */
2813 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2814 if (err) {
2815 dev_info(&vsi->back->pdev->dev,
2816 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2817 ring->queue_index, pf_q, err);
2818 return -ENOMEM;
2819 }
2820
2821 /* Now associate this queue with this PCI function */
2822 if (vsi->type == I40E_VSI_VMDQ2) {
2823 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2824 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2825 I40E_QTX_CTL_VFVM_INDX_MASK;
2826 } else {
2827 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2828 }
2829
2830 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2831 I40E_QTX_CTL_PF_INDX_MASK);
2832 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2833 i40e_flush(hw);
2834
2835 /* cache tail off for easier writes later */
2836 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2837
2838 return 0;
2839 }
2840
2841 /**
2842 * i40e_configure_rx_ring - Configure a receive ring context
2843 * @ring: The Rx ring to configure
2844 *
2845 * Configure the Rx descriptor ring in the HMC context.
2846 **/
2847 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2848 {
2849 struct i40e_vsi *vsi = ring->vsi;
2850 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2851 u16 pf_q = vsi->base_queue + ring->queue_index;
2852 struct i40e_hw *hw = &vsi->back->hw;
2853 struct i40e_hmc_obj_rxq rx_ctx;
2854 i40e_status err = 0;
2855
2856 ring->state = 0;
2857
2858 /* clear the context structure first */
2859 memset(&rx_ctx, 0, sizeof(rx_ctx));
2860
2861 ring->rx_buf_len = vsi->rx_buf_len;
2862 ring->rx_hdr_len = vsi->rx_hdr_len;
2863
2864 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2865 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2866
2867 rx_ctx.base = (ring->dma / 128);
2868 rx_ctx.qlen = ring->count;
2869
2870 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2871 set_ring_16byte_desc_enabled(ring);
2872 rx_ctx.dsize = 0;
2873 } else {
2874 rx_ctx.dsize = 1;
2875 }
2876
2877 rx_ctx.dtype = vsi->dtype;
2878 if (vsi->dtype) {
2879 set_ring_ps_enabled(ring);
2880 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2881 I40E_RX_SPLIT_IP |
2882 I40E_RX_SPLIT_TCP_UDP |
2883 I40E_RX_SPLIT_SCTP;
2884 } else {
2885 rx_ctx.hsplit_0 = 0;
2886 }
2887
2888 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2889 (chain_len * ring->rx_buf_len));
2890 if (hw->revision_id == 0)
2891 rx_ctx.lrxqthresh = 0;
2892 else
2893 rx_ctx.lrxqthresh = 2;
2894 rx_ctx.crcstrip = 1;
2895 rx_ctx.l2tsel = 1;
2896 /* this controls whether VLAN is stripped from inner headers */
2897 rx_ctx.showiv = 0;
2898 #ifdef I40E_FCOE
2899 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2900 #endif
2901 /* set the prefena field to 1 because the manual says to */
2902 rx_ctx.prefena = 1;
2903
2904 /* clear the context in the HMC */
2905 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2906 if (err) {
2907 dev_info(&vsi->back->pdev->dev,
2908 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2909 ring->queue_index, pf_q, err);
2910 return -ENOMEM;
2911 }
2912
2913 /* set the context in the HMC */
2914 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2915 if (err) {
2916 dev_info(&vsi->back->pdev->dev,
2917 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2918 ring->queue_index, pf_q, err);
2919 return -ENOMEM;
2920 }
2921
2922 /* cache tail for quicker writes, and clear the reg before use */
2923 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2924 writel(0, ring->tail);
2925
2926 if (ring_is_ps_enabled(ring)) {
2927 i40e_alloc_rx_headers(ring);
2928 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2929 } else {
2930 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2931 }
2932
2933 return 0;
2934 }
2935
2936 /**
2937 * i40e_vsi_configure_tx - Configure the VSI for Tx
2938 * @vsi: VSI structure describing this set of rings and resources
2939 *
2940 * Configure the Tx VSI for operation.
2941 **/
2942 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2943 {
2944 int err = 0;
2945 u16 i;
2946
2947 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2948 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2949
2950 return err;
2951 }
2952
2953 /**
2954 * i40e_vsi_configure_rx - Configure the VSI for Rx
2955 * @vsi: the VSI being configured
2956 *
2957 * Configure the Rx VSI for operation.
2958 **/
2959 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2960 {
2961 int err = 0;
2962 u16 i;
2963
2964 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2965 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2966 + ETH_FCS_LEN + VLAN_HLEN;
2967 else
2968 vsi->max_frame = I40E_RXBUFFER_2048;
2969
2970 /* figure out correct receive buffer length */
2971 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2972 I40E_FLAG_RX_PS_ENABLED)) {
2973 case I40E_FLAG_RX_1BUF_ENABLED:
2974 vsi->rx_hdr_len = 0;
2975 vsi->rx_buf_len = vsi->max_frame;
2976 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2977 break;
2978 case I40E_FLAG_RX_PS_ENABLED:
2979 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2980 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2981 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2982 break;
2983 default:
2984 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2985 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2986 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2987 break;
2988 }
2989
2990 #ifdef I40E_FCOE
2991 /* setup rx buffer for FCoE */
2992 if ((vsi->type == I40E_VSI_FCOE) &&
2993 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2994 vsi->rx_hdr_len = 0;
2995 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2996 vsi->max_frame = I40E_RXBUFFER_3072;
2997 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2998 }
2999
3000 #endif /* I40E_FCOE */
3001 /* round up for the chip's needs */
3002 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
3003 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
3004 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3005 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3006
3007 /* set up individual rings */
3008 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3009 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3010
3011 return err;
3012 }
3013
3014 /**
3015 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3016 * @vsi: ptr to the VSI
3017 **/
3018 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3019 {
3020 struct i40e_ring *tx_ring, *rx_ring;
3021 u16 qoffset, qcount;
3022 int i, n;
3023
3024 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3025 /* Reset the TC information */
3026 for (i = 0; i < vsi->num_queue_pairs; i++) {
3027 rx_ring = vsi->rx_rings[i];
3028 tx_ring = vsi->tx_rings[i];
3029 rx_ring->dcb_tc = 0;
3030 tx_ring->dcb_tc = 0;
3031 }
3032 }
3033
3034 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3035 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3036 continue;
3037
3038 qoffset = vsi->tc_config.tc_info[n].qoffset;
3039 qcount = vsi->tc_config.tc_info[n].qcount;
3040 for (i = qoffset; i < (qoffset + qcount); i++) {
3041 rx_ring = vsi->rx_rings[i];
3042 tx_ring = vsi->tx_rings[i];
3043 rx_ring->dcb_tc = n;
3044 tx_ring->dcb_tc = n;
3045 }
3046 }
3047 }
3048
3049 /**
3050 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3051 * @vsi: ptr to the VSI
3052 **/
3053 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3054 {
3055 if (vsi->netdev)
3056 i40e_set_rx_mode(vsi->netdev);
3057 }
3058
3059 /**
3060 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3061 * @vsi: Pointer to the targeted VSI
3062 *
3063 * This function replays the hlist on the hw where all the SB Flow Director
3064 * filters were saved.
3065 **/
3066 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3067 {
3068 struct i40e_fdir_filter *filter;
3069 struct i40e_pf *pf = vsi->back;
3070 struct hlist_node *node;
3071
3072 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3073 return;
3074
3075 hlist_for_each_entry_safe(filter, node,
3076 &pf->fdir_filter_list, fdir_node) {
3077 i40e_add_del_fdir(vsi, filter, true);
3078 }
3079 }
3080
3081 /**
3082 * i40e_vsi_configure - Set up the VSI for action
3083 * @vsi: the VSI being configured
3084 **/
3085 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3086 {
3087 int err;
3088
3089 i40e_set_vsi_rx_mode(vsi);
3090 i40e_restore_vlan(vsi);
3091 i40e_vsi_config_dcb_rings(vsi);
3092 err = i40e_vsi_configure_tx(vsi);
3093 if (!err)
3094 err = i40e_vsi_configure_rx(vsi);
3095
3096 return err;
3097 }
3098
3099 /**
3100 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3101 * @vsi: the VSI being configured
3102 **/
3103 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3104 {
3105 struct i40e_pf *pf = vsi->back;
3106 struct i40e_hw *hw = &pf->hw;
3107 u16 vector;
3108 int i, q;
3109 u32 qp;
3110
3111 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3112 * and PFINT_LNKLSTn registers, e.g.:
3113 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3114 */
3115 qp = vsi->base_queue;
3116 vector = vsi->base_vector;
3117 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3118 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3119
3120 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3121 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3122 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3123 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3124 q_vector->rx.itr);
3125 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3126 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3127 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3128 q_vector->tx.itr);
3129 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3130 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3131
3132 /* Linked list for the queuepairs assigned to this vector */
3133 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3134 for (q = 0; q < q_vector->num_ringpairs; q++) {
3135 u32 val;
3136
3137 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3138 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3139 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3140 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3141 (I40E_QUEUE_TYPE_TX
3142 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3143
3144 wr32(hw, I40E_QINT_RQCTL(qp), val);
3145
3146 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3147 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3148 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3149 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3150 (I40E_QUEUE_TYPE_RX
3151 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3152
3153 /* Terminate the linked list */
3154 if (q == (q_vector->num_ringpairs - 1))
3155 val |= (I40E_QUEUE_END_OF_LIST
3156 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3157
3158 wr32(hw, I40E_QINT_TQCTL(qp), val);
3159 qp++;
3160 }
3161 }
3162
3163 i40e_flush(hw);
3164 }
3165
3166 /**
3167 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3168 * @hw: ptr to the hardware info
3169 **/
3170 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3171 {
3172 struct i40e_hw *hw = &pf->hw;
3173 u32 val;
3174
3175 /* clear things first */
3176 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3177 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3178
3179 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3180 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3181 I40E_PFINT_ICR0_ENA_GRST_MASK |
3182 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3183 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3184 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3185 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3186 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3187
3188 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3189 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3190
3191 if (pf->flags & I40E_FLAG_PTP)
3192 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3193
3194 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3195
3196 /* SW_ITR_IDX = 0, but don't change INTENA */
3197 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3198 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3199
3200 /* OTHER_ITR_IDX = 0 */
3201 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3202 }
3203
3204 /**
3205 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3206 * @vsi: the VSI being configured
3207 **/
3208 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3209 {
3210 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3211 struct i40e_pf *pf = vsi->back;
3212 struct i40e_hw *hw = &pf->hw;
3213 u32 val;
3214
3215 /* set the ITR configuration */
3216 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3217 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3218 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3219 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3220 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3221 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3222 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3223
3224 i40e_enable_misc_int_causes(pf);
3225
3226 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3227 wr32(hw, I40E_PFINT_LNKLST0, 0);
3228
3229 /* Associate the queue pair to the vector and enable the queue int */
3230 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3231 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3232 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3233
3234 wr32(hw, I40E_QINT_RQCTL(0), val);
3235
3236 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3237 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3238 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3239
3240 wr32(hw, I40E_QINT_TQCTL(0), val);
3241 i40e_flush(hw);
3242 }
3243
3244 /**
3245 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3246 * @pf: board private structure
3247 **/
3248 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3249 {
3250 struct i40e_hw *hw = &pf->hw;
3251
3252 wr32(hw, I40E_PFINT_DYN_CTL0,
3253 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3254 i40e_flush(hw);
3255 }
3256
3257 /**
3258 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3259 * @pf: board private structure
3260 * @clearpba: true when all pending interrupt events should be cleared
3261 **/
3262 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3263 {
3264 struct i40e_hw *hw = &pf->hw;
3265 u32 val;
3266
3267 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3268 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3269 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3270
3271 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3272 i40e_flush(hw);
3273 }
3274
3275 /**
3276 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3277 * @irq: interrupt number
3278 * @data: pointer to a q_vector
3279 **/
3280 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3281 {
3282 struct i40e_q_vector *q_vector = data;
3283
3284 if (!q_vector->tx.ring && !q_vector->rx.ring)
3285 return IRQ_HANDLED;
3286
3287 napi_schedule_irqoff(&q_vector->napi);
3288
3289 return IRQ_HANDLED;
3290 }
3291
3292 /**
3293 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3294 * @vsi: the VSI being configured
3295 * @basename: name for the vector
3296 *
3297 * Allocates MSI-X vectors and requests interrupts from the kernel.
3298 **/
3299 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3300 {
3301 int q_vectors = vsi->num_q_vectors;
3302 struct i40e_pf *pf = vsi->back;
3303 int base = vsi->base_vector;
3304 int rx_int_idx = 0;
3305 int tx_int_idx = 0;
3306 int vector, err;
3307
3308 for (vector = 0; vector < q_vectors; vector++) {
3309 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3310
3311 if (q_vector->tx.ring && q_vector->rx.ring) {
3312 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3313 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3314 tx_int_idx++;
3315 } else if (q_vector->rx.ring) {
3316 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3317 "%s-%s-%d", basename, "rx", rx_int_idx++);
3318 } else if (q_vector->tx.ring) {
3319 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3320 "%s-%s-%d", basename, "tx", tx_int_idx++);
3321 } else {
3322 /* skip this unused q_vector */
3323 continue;
3324 }
3325 err = request_irq(pf->msix_entries[base + vector].vector,
3326 vsi->irq_handler,
3327 0,
3328 q_vector->name,
3329 q_vector);
3330 if (err) {
3331 dev_info(&pf->pdev->dev,
3332 "MSIX request_irq failed, error: %d\n", err);
3333 goto free_queue_irqs;
3334 }
3335 /* assign the mask for this irq */
3336 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3337 &q_vector->affinity_mask);
3338 }
3339
3340 vsi->irqs_ready = true;
3341 return 0;
3342
3343 free_queue_irqs:
3344 while (vector) {
3345 vector--;
3346 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3347 NULL);
3348 free_irq(pf->msix_entries[base + vector].vector,
3349 &(vsi->q_vectors[vector]));
3350 }
3351 return err;
3352 }
3353
3354 /**
3355 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3356 * @vsi: the VSI being un-configured
3357 **/
3358 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3359 {
3360 struct i40e_pf *pf = vsi->back;
3361 struct i40e_hw *hw = &pf->hw;
3362 int base = vsi->base_vector;
3363 int i;
3364
3365 for (i = 0; i < vsi->num_queue_pairs; i++) {
3366 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3367 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3368 }
3369
3370 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3371 for (i = vsi->base_vector;
3372 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3373 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3374
3375 i40e_flush(hw);
3376 for (i = 0; i < vsi->num_q_vectors; i++)
3377 synchronize_irq(pf->msix_entries[i + base].vector);
3378 } else {
3379 /* Legacy and MSI mode - this stops all interrupt handling */
3380 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3381 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3382 i40e_flush(hw);
3383 synchronize_irq(pf->pdev->irq);
3384 }
3385 }
3386
3387 /**
3388 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3389 * @vsi: the VSI being configured
3390 **/
3391 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3392 {
3393 struct i40e_pf *pf = vsi->back;
3394 int i;
3395
3396 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3397 for (i = 0; i < vsi->num_q_vectors; i++)
3398 i40e_irq_dynamic_enable(vsi, i);
3399 } else {
3400 i40e_irq_dynamic_enable_icr0(pf, true);
3401 }
3402
3403 i40e_flush(&pf->hw);
3404 return 0;
3405 }
3406
3407 /**
3408 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3409 * @pf: board private structure
3410 **/
3411 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3412 {
3413 /* Disable ICR 0 */
3414 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3415 i40e_flush(&pf->hw);
3416 }
3417
3418 /**
3419 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3420 * @irq: interrupt number
3421 * @data: pointer to a q_vector
3422 *
3423 * This is the handler used for all MSI/Legacy interrupts, and deals
3424 * with both queue and non-queue interrupts. This is also used in
3425 * MSIX mode to handle the non-queue interrupts.
3426 **/
3427 static irqreturn_t i40e_intr(int irq, void *data)
3428 {
3429 struct i40e_pf *pf = (struct i40e_pf *)data;
3430 struct i40e_hw *hw = &pf->hw;
3431 irqreturn_t ret = IRQ_NONE;
3432 u32 icr0, icr0_remaining;
3433 u32 val, ena_mask;
3434
3435 icr0 = rd32(hw, I40E_PFINT_ICR0);
3436 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3437
3438 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3439 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3440 goto enable_intr;
3441
3442 /* if interrupt but no bits showing, must be SWINT */
3443 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3444 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3445 pf->sw_int_count++;
3446
3447 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3448 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3449 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3450 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3451 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3452 }
3453
3454 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3455 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3456 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3457 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3458
3459 /* temporarily disable queue cause for NAPI processing */
3460 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3461
3462 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3463 wr32(hw, I40E_QINT_RQCTL(0), qval);
3464
3465 qval = rd32(hw, I40E_QINT_TQCTL(0));
3466 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3467 wr32(hw, I40E_QINT_TQCTL(0), qval);
3468
3469 if (!test_bit(__I40E_DOWN, &pf->state))
3470 napi_schedule_irqoff(&q_vector->napi);
3471 }
3472
3473 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3474 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3475 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3476 }
3477
3478 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3479 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3480 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3481 }
3482
3483 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3484 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3485 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3486 }
3487
3488 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3489 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3490 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3491 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3492 val = rd32(hw, I40E_GLGEN_RSTAT);
3493 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3494 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3495 if (val == I40E_RESET_CORER) {
3496 pf->corer_count++;
3497 } else if (val == I40E_RESET_GLOBR) {
3498 pf->globr_count++;
3499 } else if (val == I40E_RESET_EMPR) {
3500 pf->empr_count++;
3501 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3502 }
3503 }
3504
3505 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3506 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3507 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3508 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3509 rd32(hw, I40E_PFHMC_ERRORINFO),
3510 rd32(hw, I40E_PFHMC_ERRORDATA));
3511 }
3512
3513 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3514 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3515
3516 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3517 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3518 i40e_ptp_tx_hwtstamp(pf);
3519 }
3520 }
3521
3522 /* If a critical error is pending we have no choice but to reset the
3523 * device.
3524 * Report and mask out any remaining unexpected interrupts.
3525 */
3526 icr0_remaining = icr0 & ena_mask;
3527 if (icr0_remaining) {
3528 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3529 icr0_remaining);
3530 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3531 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3532 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3533 dev_info(&pf->pdev->dev, "device will be reset\n");
3534 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3535 i40e_service_event_schedule(pf);
3536 }
3537 ena_mask &= ~icr0_remaining;
3538 }
3539 ret = IRQ_HANDLED;
3540
3541 enable_intr:
3542 /* re-enable interrupt causes */
3543 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3544 if (!test_bit(__I40E_DOWN, &pf->state)) {
3545 i40e_service_event_schedule(pf);
3546 i40e_irq_dynamic_enable_icr0(pf, false);
3547 }
3548
3549 return ret;
3550 }
3551
3552 /**
3553 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3554 * @tx_ring: tx ring to clean
3555 * @budget: how many cleans we're allowed
3556 *
3557 * Returns true if there's any budget left (e.g. the clean is finished)
3558 **/
3559 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3560 {
3561 struct i40e_vsi *vsi = tx_ring->vsi;
3562 u16 i = tx_ring->next_to_clean;
3563 struct i40e_tx_buffer *tx_buf;
3564 struct i40e_tx_desc *tx_desc;
3565
3566 tx_buf = &tx_ring->tx_bi[i];
3567 tx_desc = I40E_TX_DESC(tx_ring, i);
3568 i -= tx_ring->count;
3569
3570 do {
3571 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3572
3573 /* if next_to_watch is not set then there is no work pending */
3574 if (!eop_desc)
3575 break;
3576
3577 /* prevent any other reads prior to eop_desc */
3578 read_barrier_depends();
3579
3580 /* if the descriptor isn't done, no work yet to do */
3581 if (!(eop_desc->cmd_type_offset_bsz &
3582 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3583 break;
3584
3585 /* clear next_to_watch to prevent false hangs */
3586 tx_buf->next_to_watch = NULL;
3587
3588 tx_desc->buffer_addr = 0;
3589 tx_desc->cmd_type_offset_bsz = 0;
3590 /* move past filter desc */
3591 tx_buf++;
3592 tx_desc++;
3593 i++;
3594 if (unlikely(!i)) {
3595 i -= tx_ring->count;
3596 tx_buf = tx_ring->tx_bi;
3597 tx_desc = I40E_TX_DESC(tx_ring, 0);
3598 }
3599 /* unmap skb header data */
3600 dma_unmap_single(tx_ring->dev,
3601 dma_unmap_addr(tx_buf, dma),
3602 dma_unmap_len(tx_buf, len),
3603 DMA_TO_DEVICE);
3604 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3605 kfree(tx_buf->raw_buf);
3606
3607 tx_buf->raw_buf = NULL;
3608 tx_buf->tx_flags = 0;
3609 tx_buf->next_to_watch = NULL;
3610 dma_unmap_len_set(tx_buf, len, 0);
3611 tx_desc->buffer_addr = 0;
3612 tx_desc->cmd_type_offset_bsz = 0;
3613
3614 /* move us past the eop_desc for start of next FD desc */
3615 tx_buf++;
3616 tx_desc++;
3617 i++;
3618 if (unlikely(!i)) {
3619 i -= tx_ring->count;
3620 tx_buf = tx_ring->tx_bi;
3621 tx_desc = I40E_TX_DESC(tx_ring, 0);
3622 }
3623
3624 /* update budget accounting */
3625 budget--;
3626 } while (likely(budget));
3627
3628 i += tx_ring->count;
3629 tx_ring->next_to_clean = i;
3630
3631 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3632 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3633
3634 return budget > 0;
3635 }
3636
3637 /**
3638 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3639 * @irq: interrupt number
3640 * @data: pointer to a q_vector
3641 **/
3642 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3643 {
3644 struct i40e_q_vector *q_vector = data;
3645 struct i40e_vsi *vsi;
3646
3647 if (!q_vector->tx.ring)
3648 return IRQ_HANDLED;
3649
3650 vsi = q_vector->tx.ring->vsi;
3651 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3652
3653 return IRQ_HANDLED;
3654 }
3655
3656 /**
3657 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3658 * @vsi: the VSI being configured
3659 * @v_idx: vector index
3660 * @qp_idx: queue pair index
3661 **/
3662 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3663 {
3664 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3665 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3666 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3667
3668 tx_ring->q_vector = q_vector;
3669 tx_ring->next = q_vector->tx.ring;
3670 q_vector->tx.ring = tx_ring;
3671 q_vector->tx.count++;
3672
3673 rx_ring->q_vector = q_vector;
3674 rx_ring->next = q_vector->rx.ring;
3675 q_vector->rx.ring = rx_ring;
3676 q_vector->rx.count++;
3677 }
3678
3679 /**
3680 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3681 * @vsi: the VSI being configured
3682 *
3683 * This function maps descriptor rings to the queue-specific vectors
3684 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3685 * one vector per queue pair, but on a constrained vector budget, we
3686 * group the queue pairs as "efficiently" as possible.
3687 **/
3688 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3689 {
3690 int qp_remaining = vsi->num_queue_pairs;
3691 int q_vectors = vsi->num_q_vectors;
3692 int num_ringpairs;
3693 int v_start = 0;
3694 int qp_idx = 0;
3695
3696 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3697 * group them so there are multiple queues per vector.
3698 * It is also important to go through all the vectors available to be
3699 * sure that if we don't use all the vectors, that the remaining vectors
3700 * are cleared. This is especially important when decreasing the
3701 * number of queues in use.
3702 */
3703 for (; v_start < q_vectors; v_start++) {
3704 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3705
3706 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3707
3708 q_vector->num_ringpairs = num_ringpairs;
3709
3710 q_vector->rx.count = 0;
3711 q_vector->tx.count = 0;
3712 q_vector->rx.ring = NULL;
3713 q_vector->tx.ring = NULL;
3714
3715 while (num_ringpairs--) {
3716 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3717 qp_idx++;
3718 qp_remaining--;
3719 }
3720 }
3721 }
3722
3723 /**
3724 * i40e_vsi_request_irq - Request IRQ from the OS
3725 * @vsi: the VSI being configured
3726 * @basename: name for the vector
3727 **/
3728 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3729 {
3730 struct i40e_pf *pf = vsi->back;
3731 int err;
3732
3733 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3734 err = i40e_vsi_request_irq_msix(vsi, basename);
3735 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3736 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3737 pf->int_name, pf);
3738 else
3739 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3740 pf->int_name, pf);
3741
3742 if (err)
3743 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3744
3745 return err;
3746 }
3747
3748 #ifdef CONFIG_NET_POLL_CONTROLLER
3749 /**
3750 * i40e_netpoll - A Polling 'interrupt' handler
3751 * @netdev: network interface device structure
3752 *
3753 * This is used by netconsole to send skbs without having to re-enable
3754 * interrupts. It's not called while the normal interrupt routine is executing.
3755 **/
3756 #ifdef I40E_FCOE
3757 void i40e_netpoll(struct net_device *netdev)
3758 #else
3759 static void i40e_netpoll(struct net_device *netdev)
3760 #endif
3761 {
3762 struct i40e_netdev_priv *np = netdev_priv(netdev);
3763 struct i40e_vsi *vsi = np->vsi;
3764 struct i40e_pf *pf = vsi->back;
3765 int i;
3766
3767 /* if interface is down do nothing */
3768 if (test_bit(__I40E_DOWN, &vsi->state))
3769 return;
3770
3771 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3772 for (i = 0; i < vsi->num_q_vectors; i++)
3773 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3774 } else {
3775 i40e_intr(pf->pdev->irq, netdev);
3776 }
3777 }
3778 #endif
3779
3780 /**
3781 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3782 * @pf: the PF being configured
3783 * @pf_q: the PF queue
3784 * @enable: enable or disable state of the queue
3785 *
3786 * This routine will wait for the given Tx queue of the PF to reach the
3787 * enabled or disabled state.
3788 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3789 * multiple retries; else will return 0 in case of success.
3790 **/
3791 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3792 {
3793 int i;
3794 u32 tx_reg;
3795
3796 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3797 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3798 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3799 break;
3800
3801 usleep_range(10, 20);
3802 }
3803 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3804 return -ETIMEDOUT;
3805
3806 return 0;
3807 }
3808
3809 /**
3810 * i40e_vsi_control_tx - Start or stop a VSI's rings
3811 * @vsi: the VSI being configured
3812 * @enable: start or stop the rings
3813 **/
3814 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3815 {
3816 struct i40e_pf *pf = vsi->back;
3817 struct i40e_hw *hw = &pf->hw;
3818 int i, j, pf_q, ret = 0;
3819 u32 tx_reg;
3820
3821 pf_q = vsi->base_queue;
3822 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3823
3824 /* warn the TX unit of coming changes */
3825 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3826 if (!enable)
3827 usleep_range(10, 20);
3828
3829 for (j = 0; j < 50; j++) {
3830 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3831 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3832 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3833 break;
3834 usleep_range(1000, 2000);
3835 }
3836 /* Skip if the queue is already in the requested state */
3837 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3838 continue;
3839
3840 /* turn on/off the queue */
3841 if (enable) {
3842 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3843 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3844 } else {
3845 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3846 }
3847
3848 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3849 /* No waiting for the Tx queue to disable */
3850 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3851 continue;
3852
3853 /* wait for the change to finish */
3854 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3855 if (ret) {
3856 dev_info(&pf->pdev->dev,
3857 "VSI seid %d Tx ring %d %sable timeout\n",
3858 vsi->seid, pf_q, (enable ? "en" : "dis"));
3859 break;
3860 }
3861 }
3862
3863 if (hw->revision_id == 0)
3864 mdelay(50);
3865 return ret;
3866 }
3867
3868 /**
3869 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3870 * @pf: the PF being configured
3871 * @pf_q: the PF queue
3872 * @enable: enable or disable state of the queue
3873 *
3874 * This routine will wait for the given Rx queue of the PF to reach the
3875 * enabled or disabled state.
3876 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3877 * multiple retries; else will return 0 in case of success.
3878 **/
3879 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3880 {
3881 int i;
3882 u32 rx_reg;
3883
3884 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3885 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3886 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3887 break;
3888
3889 usleep_range(10, 20);
3890 }
3891 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3892 return -ETIMEDOUT;
3893
3894 return 0;
3895 }
3896
3897 /**
3898 * i40e_vsi_control_rx - Start or stop a VSI's rings
3899 * @vsi: the VSI being configured
3900 * @enable: start or stop the rings
3901 **/
3902 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3903 {
3904 struct i40e_pf *pf = vsi->back;
3905 struct i40e_hw *hw = &pf->hw;
3906 int i, j, pf_q, ret = 0;
3907 u32 rx_reg;
3908
3909 pf_q = vsi->base_queue;
3910 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3911 for (j = 0; j < 50; j++) {
3912 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3913 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3914 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3915 break;
3916 usleep_range(1000, 2000);
3917 }
3918
3919 /* Skip if the queue is already in the requested state */
3920 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3921 continue;
3922
3923 /* turn on/off the queue */
3924 if (enable)
3925 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3926 else
3927 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3928 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3929
3930 /* wait for the change to finish */
3931 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3932 if (ret) {
3933 dev_info(&pf->pdev->dev,
3934 "VSI seid %d Rx ring %d %sable timeout\n",
3935 vsi->seid, pf_q, (enable ? "en" : "dis"));
3936 break;
3937 }
3938 }
3939
3940 return ret;
3941 }
3942
3943 /**
3944 * i40e_vsi_control_rings - Start or stop a VSI's rings
3945 * @vsi: the VSI being configured
3946 * @enable: start or stop the rings
3947 **/
3948 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3949 {
3950 int ret = 0;
3951
3952 /* do rx first for enable and last for disable */
3953 if (request) {
3954 ret = i40e_vsi_control_rx(vsi, request);
3955 if (ret)
3956 return ret;
3957 ret = i40e_vsi_control_tx(vsi, request);
3958 } else {
3959 /* Ignore return value, we need to shutdown whatever we can */
3960 i40e_vsi_control_tx(vsi, request);
3961 i40e_vsi_control_rx(vsi, request);
3962 }
3963
3964 return ret;
3965 }
3966
3967 /**
3968 * i40e_vsi_free_irq - Free the irq association with the OS
3969 * @vsi: the VSI being configured
3970 **/
3971 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3972 {
3973 struct i40e_pf *pf = vsi->back;
3974 struct i40e_hw *hw = &pf->hw;
3975 int base = vsi->base_vector;
3976 u32 val, qp;
3977 int i;
3978
3979 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3980 if (!vsi->q_vectors)
3981 return;
3982
3983 if (!vsi->irqs_ready)
3984 return;
3985
3986 vsi->irqs_ready = false;
3987 for (i = 0; i < vsi->num_q_vectors; i++) {
3988 u16 vector = i + base;
3989
3990 /* free only the irqs that were actually requested */
3991 if (!vsi->q_vectors[i] ||
3992 !vsi->q_vectors[i]->num_ringpairs)
3993 continue;
3994
3995 /* clear the affinity_mask in the IRQ descriptor */
3996 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3997 NULL);
3998 free_irq(pf->msix_entries[vector].vector,
3999 vsi->q_vectors[i]);
4000
4001 /* Tear down the interrupt queue link list
4002 *
4003 * We know that they come in pairs and always
4004 * the Rx first, then the Tx. To clear the
4005 * link list, stick the EOL value into the
4006 * next_q field of the registers.
4007 */
4008 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4009 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4010 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4011 val |= I40E_QUEUE_END_OF_LIST
4012 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4013 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4014
4015 while (qp != I40E_QUEUE_END_OF_LIST) {
4016 u32 next;
4017
4018 val = rd32(hw, I40E_QINT_RQCTL(qp));
4019
4020 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4021 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4022 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4023 I40E_QINT_RQCTL_INTEVENT_MASK);
4024
4025 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4026 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4027
4028 wr32(hw, I40E_QINT_RQCTL(qp), val);
4029
4030 val = rd32(hw, I40E_QINT_TQCTL(qp));
4031
4032 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4033 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4034
4035 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4036 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4037 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4038 I40E_QINT_TQCTL_INTEVENT_MASK);
4039
4040 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4041 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4042
4043 wr32(hw, I40E_QINT_TQCTL(qp), val);
4044 qp = next;
4045 }
4046 }
4047 } else {
4048 free_irq(pf->pdev->irq, pf);
4049
4050 val = rd32(hw, I40E_PFINT_LNKLST0);
4051 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4052 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4053 val |= I40E_QUEUE_END_OF_LIST
4054 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4055 wr32(hw, I40E_PFINT_LNKLST0, val);
4056
4057 val = rd32(hw, I40E_QINT_RQCTL(qp));
4058 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4059 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4060 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4061 I40E_QINT_RQCTL_INTEVENT_MASK);
4062
4063 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4064 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4065
4066 wr32(hw, I40E_QINT_RQCTL(qp), val);
4067
4068 val = rd32(hw, I40E_QINT_TQCTL(qp));
4069
4070 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4071 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4072 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4073 I40E_QINT_TQCTL_INTEVENT_MASK);
4074
4075 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4076 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4077
4078 wr32(hw, I40E_QINT_TQCTL(qp), val);
4079 }
4080 }
4081
4082 /**
4083 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4084 * @vsi: the VSI being configured
4085 * @v_idx: Index of vector to be freed
4086 *
4087 * This function frees the memory allocated to the q_vector. In addition if
4088 * NAPI is enabled it will delete any references to the NAPI struct prior
4089 * to freeing the q_vector.
4090 **/
4091 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4092 {
4093 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4094 struct i40e_ring *ring;
4095
4096 if (!q_vector)
4097 return;
4098
4099 /* disassociate q_vector from rings */
4100 i40e_for_each_ring(ring, q_vector->tx)
4101 ring->q_vector = NULL;
4102
4103 i40e_for_each_ring(ring, q_vector->rx)
4104 ring->q_vector = NULL;
4105
4106 /* only VSI w/ an associated netdev is set up w/ NAPI */
4107 if (vsi->netdev)
4108 netif_napi_del(&q_vector->napi);
4109
4110 vsi->q_vectors[v_idx] = NULL;
4111
4112 kfree_rcu(q_vector, rcu);
4113 }
4114
4115 /**
4116 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4117 * @vsi: the VSI being un-configured
4118 *
4119 * This frees the memory allocated to the q_vectors and
4120 * deletes references to the NAPI struct.
4121 **/
4122 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4123 {
4124 int v_idx;
4125
4126 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4127 i40e_free_q_vector(vsi, v_idx);
4128 }
4129
4130 /**
4131 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4132 * @pf: board private structure
4133 **/
4134 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4135 {
4136 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4137 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4138 pci_disable_msix(pf->pdev);
4139 kfree(pf->msix_entries);
4140 pf->msix_entries = NULL;
4141 kfree(pf->irq_pile);
4142 pf->irq_pile = NULL;
4143 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4144 pci_disable_msi(pf->pdev);
4145 }
4146 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4147 }
4148
4149 /**
4150 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4151 * @pf: board private structure
4152 *
4153 * We go through and clear interrupt specific resources and reset the structure
4154 * to pre-load conditions
4155 **/
4156 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4157 {
4158 int i;
4159
4160 i40e_stop_misc_vector(pf);
4161 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4162 synchronize_irq(pf->msix_entries[0].vector);
4163 free_irq(pf->msix_entries[0].vector, pf);
4164 }
4165
4166 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4167 for (i = 0; i < pf->num_alloc_vsi; i++)
4168 if (pf->vsi[i])
4169 i40e_vsi_free_q_vectors(pf->vsi[i]);
4170 i40e_reset_interrupt_capability(pf);
4171 }
4172
4173 /**
4174 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4175 * @vsi: the VSI being configured
4176 **/
4177 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4178 {
4179 int q_idx;
4180
4181 if (!vsi->netdev)
4182 return;
4183
4184 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4185 napi_enable(&vsi->q_vectors[q_idx]->napi);
4186 }
4187
4188 /**
4189 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4190 * @vsi: the VSI being configured
4191 **/
4192 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4193 {
4194 int q_idx;
4195
4196 if (!vsi->netdev)
4197 return;
4198
4199 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4200 napi_disable(&vsi->q_vectors[q_idx]->napi);
4201 }
4202
4203 /**
4204 * i40e_vsi_close - Shut down a VSI
4205 * @vsi: the vsi to be quelled
4206 **/
4207 static void i40e_vsi_close(struct i40e_vsi *vsi)
4208 {
4209 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4210 i40e_down(vsi);
4211 i40e_vsi_free_irq(vsi);
4212 i40e_vsi_free_tx_resources(vsi);
4213 i40e_vsi_free_rx_resources(vsi);
4214 vsi->current_netdev_flags = 0;
4215 }
4216
4217 /**
4218 * i40e_quiesce_vsi - Pause a given VSI
4219 * @vsi: the VSI being paused
4220 **/
4221 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4222 {
4223 if (test_bit(__I40E_DOWN, &vsi->state))
4224 return;
4225
4226 /* No need to disable FCoE VSI when Tx suspended */
4227 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4228 vsi->type == I40E_VSI_FCOE) {
4229 dev_dbg(&vsi->back->pdev->dev,
4230 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4231 return;
4232 }
4233
4234 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4235 if (vsi->netdev && netif_running(vsi->netdev))
4236 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4237 else
4238 i40e_vsi_close(vsi);
4239 }
4240
4241 /**
4242 * i40e_unquiesce_vsi - Resume a given VSI
4243 * @vsi: the VSI being resumed
4244 **/
4245 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4246 {
4247 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4248 return;
4249
4250 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4251 if (vsi->netdev && netif_running(vsi->netdev))
4252 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4253 else
4254 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4255 }
4256
4257 /**
4258 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4259 * @pf: the PF
4260 **/
4261 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4262 {
4263 int v;
4264
4265 for (v = 0; v < pf->num_alloc_vsi; v++) {
4266 if (pf->vsi[v])
4267 i40e_quiesce_vsi(pf->vsi[v]);
4268 }
4269 }
4270
4271 /**
4272 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4273 * @pf: the PF
4274 **/
4275 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4276 {
4277 int v;
4278
4279 for (v = 0; v < pf->num_alloc_vsi; v++) {
4280 if (pf->vsi[v])
4281 i40e_unquiesce_vsi(pf->vsi[v]);
4282 }
4283 }
4284
4285 #ifdef CONFIG_I40E_DCB
4286 /**
4287 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4288 * @vsi: the VSI being configured
4289 *
4290 * This function waits for the given VSI's Tx queues to be disabled.
4291 **/
4292 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4293 {
4294 struct i40e_pf *pf = vsi->back;
4295 int i, pf_q, ret;
4296
4297 pf_q = vsi->base_queue;
4298 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4299 /* Check and wait for the disable status of the queue */
4300 ret = i40e_pf_txq_wait(pf, pf_q, false);
4301 if (ret) {
4302 dev_info(&pf->pdev->dev,
4303 "VSI seid %d Tx ring %d disable timeout\n",
4304 vsi->seid, pf_q);
4305 return ret;
4306 }
4307 }
4308
4309 return 0;
4310 }
4311
4312 /**
4313 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4314 * @pf: the PF
4315 *
4316 * This function waits for the Tx queues to be in disabled state for all the
4317 * VSIs that are managed by this PF.
4318 **/
4319 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4320 {
4321 int v, ret = 0;
4322
4323 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4324 /* No need to wait for FCoE VSI queues */
4325 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4326 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4327 if (ret)
4328 break;
4329 }
4330 }
4331
4332 return ret;
4333 }
4334
4335 #endif
4336
4337 /**
4338 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4339 * @q_idx: TX queue number
4340 * @vsi: Pointer to VSI struct
4341 *
4342 * This function checks specified queue for given VSI. Detects hung condition.
4343 * Sets hung bit since it is two step process. Before next run of service task
4344 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4345 * hung condition remain unchanged and during subsequent run, this function
4346 * issues SW interrupt to recover from hung condition.
4347 **/
4348 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4349 {
4350 struct i40e_ring *tx_ring = NULL;
4351 struct i40e_pf *pf;
4352 u32 head, val, tx_pending;
4353 int i;
4354
4355 pf = vsi->back;
4356
4357 /* now that we have an index, find the tx_ring struct */
4358 for (i = 0; i < vsi->num_queue_pairs; i++) {
4359 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4360 if (q_idx == vsi->tx_rings[i]->queue_index) {
4361 tx_ring = vsi->tx_rings[i];
4362 break;
4363 }
4364 }
4365 }
4366
4367 if (!tx_ring)
4368 return;
4369
4370 /* Read interrupt register */
4371 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4372 val = rd32(&pf->hw,
4373 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4374 tx_ring->vsi->base_vector - 1));
4375 else
4376 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4377
4378 /* Bail out if interrupts are disabled because napi_poll
4379 * execution in-progress or will get scheduled soon.
4380 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4381 */
4382 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4383 return;
4384
4385 head = i40e_get_head(tx_ring);
4386
4387 tx_pending = i40e_get_tx_pending(tx_ring);
4388
4389 /* HW is done executing descriptors, updated HEAD write back,
4390 * but SW hasn't processed those descriptors. If interrupt is
4391 * not generated from this point ON, it could result into
4392 * dev_watchdog detecting timeout on those netdev_queue,
4393 * hence proactively trigger SW interrupt.
4394 */
4395 if (tx_pending) {
4396 /* NAPI Poll didn't run and clear since it was set */
4397 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4398 &tx_ring->q_vector->hung_detected)) {
4399 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4400 vsi->seid, q_idx, tx_pending,
4401 tx_ring->next_to_clean, head,
4402 tx_ring->next_to_use,
4403 readl(tx_ring->tail));
4404 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4405 vsi->seid, q_idx, val);
4406 i40e_force_wb(vsi, tx_ring->q_vector);
4407 } else {
4408 /* First Chance - detected possible hung */
4409 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4410 &tx_ring->q_vector->hung_detected);
4411 }
4412 }
4413 }
4414
4415 /**
4416 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4417 * @pf: pointer to PF struct
4418 *
4419 * LAN VSI has netdev and netdev has TX queues. This function is to check
4420 * each of those TX queues if they are hung, trigger recovery by issuing
4421 * SW interrupt.
4422 **/
4423 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4424 {
4425 struct net_device *netdev;
4426 struct i40e_vsi *vsi;
4427 int i;
4428
4429 /* Only for LAN VSI */
4430 vsi = pf->vsi[pf->lan_vsi];
4431
4432 if (!vsi)
4433 return;
4434
4435 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4436 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4437 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4438 return;
4439
4440 /* Make sure type is MAIN VSI */
4441 if (vsi->type != I40E_VSI_MAIN)
4442 return;
4443
4444 netdev = vsi->netdev;
4445 if (!netdev)
4446 return;
4447
4448 /* Bail out if netif_carrier is not OK */
4449 if (!netif_carrier_ok(netdev))
4450 return;
4451
4452 /* Go thru' TX queues for netdev */
4453 for (i = 0; i < netdev->num_tx_queues; i++) {
4454 struct netdev_queue *q;
4455
4456 q = netdev_get_tx_queue(netdev, i);
4457 if (q)
4458 i40e_detect_recover_hung_queue(i, vsi);
4459 }
4460 }
4461
4462 /**
4463 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4464 * @pf: pointer to PF
4465 *
4466 * Get TC map for ISCSI PF type that will include iSCSI TC
4467 * and LAN TC.
4468 **/
4469 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4470 {
4471 struct i40e_dcb_app_priority_table app;
4472 struct i40e_hw *hw = &pf->hw;
4473 u8 enabled_tc = 1; /* TC0 is always enabled */
4474 u8 tc, i;
4475 /* Get the iSCSI APP TLV */
4476 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4477
4478 for (i = 0; i < dcbcfg->numapps; i++) {
4479 app = dcbcfg->app[i];
4480 if (app.selector == I40E_APP_SEL_TCPIP &&
4481 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4482 tc = dcbcfg->etscfg.prioritytable[app.priority];
4483 enabled_tc |= BIT(tc);
4484 break;
4485 }
4486 }
4487
4488 return enabled_tc;
4489 }
4490
4491 /**
4492 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4493 * @dcbcfg: the corresponding DCBx configuration structure
4494 *
4495 * Return the number of TCs from given DCBx configuration
4496 **/
4497 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4498 {
4499 u8 num_tc = 0;
4500 int i;
4501
4502 /* Scan the ETS Config Priority Table to find
4503 * traffic class enabled for a given priority
4504 * and use the traffic class index to get the
4505 * number of traffic classes enabled
4506 */
4507 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4508 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4509 num_tc = dcbcfg->etscfg.prioritytable[i];
4510 }
4511
4512 /* Traffic class index starts from zero so
4513 * increment to return the actual count
4514 */
4515 return num_tc + 1;
4516 }
4517
4518 /**
4519 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4520 * @dcbcfg: the corresponding DCBx configuration structure
4521 *
4522 * Query the current DCB configuration and return the number of
4523 * traffic classes enabled from the given DCBX config
4524 **/
4525 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4526 {
4527 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4528 u8 enabled_tc = 1;
4529 u8 i;
4530
4531 for (i = 0; i < num_tc; i++)
4532 enabled_tc |= BIT(i);
4533
4534 return enabled_tc;
4535 }
4536
4537 /**
4538 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4539 * @pf: PF being queried
4540 *
4541 * Return number of traffic classes enabled for the given PF
4542 **/
4543 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4544 {
4545 struct i40e_hw *hw = &pf->hw;
4546 u8 i, enabled_tc;
4547 u8 num_tc = 0;
4548 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4549
4550 /* If DCB is not enabled then always in single TC */
4551 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4552 return 1;
4553
4554 /* SFP mode will be enabled for all TCs on port */
4555 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4556 return i40e_dcb_get_num_tc(dcbcfg);
4557
4558 /* MFP mode return count of enabled TCs for this PF */
4559 if (pf->hw.func_caps.iscsi)
4560 enabled_tc = i40e_get_iscsi_tc_map(pf);
4561 else
4562 return 1; /* Only TC0 */
4563
4564 /* At least have TC0 */
4565 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4566 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4567 if (enabled_tc & BIT(i))
4568 num_tc++;
4569 }
4570 return num_tc;
4571 }
4572
4573 /**
4574 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4575 * @pf: PF being queried
4576 *
4577 * Return a bitmap for first enabled traffic class for this PF.
4578 **/
4579 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4580 {
4581 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4582 u8 i = 0;
4583
4584 if (!enabled_tc)
4585 return 0x1; /* TC0 */
4586
4587 /* Find the first enabled TC */
4588 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4589 if (enabled_tc & BIT(i))
4590 break;
4591 }
4592
4593 return BIT(i);
4594 }
4595
4596 /**
4597 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4598 * @pf: PF being queried
4599 *
4600 * Return a bitmap for enabled traffic classes for this PF.
4601 **/
4602 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4603 {
4604 /* If DCB is not enabled for this PF then just return default TC */
4605 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4606 return i40e_pf_get_default_tc(pf);
4607
4608 /* SFP mode we want PF to be enabled for all TCs */
4609 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4610 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4611
4612 /* MFP enabled and iSCSI PF type */
4613 if (pf->hw.func_caps.iscsi)
4614 return i40e_get_iscsi_tc_map(pf);
4615 else
4616 return i40e_pf_get_default_tc(pf);
4617 }
4618
4619 /**
4620 * i40e_vsi_get_bw_info - Query VSI BW Information
4621 * @vsi: the VSI being queried
4622 *
4623 * Returns 0 on success, negative value on failure
4624 **/
4625 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4626 {
4627 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4628 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4629 struct i40e_pf *pf = vsi->back;
4630 struct i40e_hw *hw = &pf->hw;
4631 i40e_status ret;
4632 u32 tc_bw_max;
4633 int i;
4634
4635 /* Get the VSI level BW configuration */
4636 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4637 if (ret) {
4638 dev_info(&pf->pdev->dev,
4639 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4640 i40e_stat_str(&pf->hw, ret),
4641 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4642 return -EINVAL;
4643 }
4644
4645 /* Get the VSI level BW configuration per TC */
4646 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4647 NULL);
4648 if (ret) {
4649 dev_info(&pf->pdev->dev,
4650 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4651 i40e_stat_str(&pf->hw, ret),
4652 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4653 return -EINVAL;
4654 }
4655
4656 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4657 dev_info(&pf->pdev->dev,
4658 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4659 bw_config.tc_valid_bits,
4660 bw_ets_config.tc_valid_bits);
4661 /* Still continuing */
4662 }
4663
4664 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4665 vsi->bw_max_quanta = bw_config.max_bw;
4666 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4667 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4668 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4669 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4670 vsi->bw_ets_limit_credits[i] =
4671 le16_to_cpu(bw_ets_config.credits[i]);
4672 /* 3 bits out of 4 for each TC */
4673 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4674 }
4675
4676 return 0;
4677 }
4678
4679 /**
4680 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4681 * @vsi: the VSI being configured
4682 * @enabled_tc: TC bitmap
4683 * @bw_credits: BW shared credits per TC
4684 *
4685 * Returns 0 on success, negative value on failure
4686 **/
4687 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4688 u8 *bw_share)
4689 {
4690 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4691 i40e_status ret;
4692 int i;
4693
4694 bw_data.tc_valid_bits = enabled_tc;
4695 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4696 bw_data.tc_bw_credits[i] = bw_share[i];
4697
4698 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4699 NULL);
4700 if (ret) {
4701 dev_info(&vsi->back->pdev->dev,
4702 "AQ command Config VSI BW allocation per TC failed = %d\n",
4703 vsi->back->hw.aq.asq_last_status);
4704 return -EINVAL;
4705 }
4706
4707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4708 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4709
4710 return 0;
4711 }
4712
4713 /**
4714 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4715 * @vsi: the VSI being configured
4716 * @enabled_tc: TC map to be enabled
4717 *
4718 **/
4719 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4720 {
4721 struct net_device *netdev = vsi->netdev;
4722 struct i40e_pf *pf = vsi->back;
4723 struct i40e_hw *hw = &pf->hw;
4724 u8 netdev_tc = 0;
4725 int i;
4726 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4727
4728 if (!netdev)
4729 return;
4730
4731 if (!enabled_tc) {
4732 netdev_reset_tc(netdev);
4733 return;
4734 }
4735
4736 /* Set up actual enabled TCs on the VSI */
4737 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4738 return;
4739
4740 /* set per TC queues for the VSI */
4741 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4742 /* Only set TC queues for enabled tcs
4743 *
4744 * e.g. For a VSI that has TC0 and TC3 enabled the
4745 * enabled_tc bitmap would be 0x00001001; the driver
4746 * will set the numtc for netdev as 2 that will be
4747 * referenced by the netdev layer as TC 0 and 1.
4748 */
4749 if (vsi->tc_config.enabled_tc & BIT(i))
4750 netdev_set_tc_queue(netdev,
4751 vsi->tc_config.tc_info[i].netdev_tc,
4752 vsi->tc_config.tc_info[i].qcount,
4753 vsi->tc_config.tc_info[i].qoffset);
4754 }
4755
4756 /* Assign UP2TC map for the VSI */
4757 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4758 /* Get the actual TC# for the UP */
4759 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4760 /* Get the mapped netdev TC# for the UP */
4761 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4762 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4763 }
4764 }
4765
4766 /**
4767 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4768 * @vsi: the VSI being configured
4769 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4770 **/
4771 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4772 struct i40e_vsi_context *ctxt)
4773 {
4774 /* copy just the sections touched not the entire info
4775 * since not all sections are valid as returned by
4776 * update vsi params
4777 */
4778 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4779 memcpy(&vsi->info.queue_mapping,
4780 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4781 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4782 sizeof(vsi->info.tc_mapping));
4783 }
4784
4785 /**
4786 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4787 * @vsi: VSI to be configured
4788 * @enabled_tc: TC bitmap
4789 *
4790 * This configures a particular VSI for TCs that are mapped to the
4791 * given TC bitmap. It uses default bandwidth share for TCs across
4792 * VSIs to configure TC for a particular VSI.
4793 *
4794 * NOTE:
4795 * It is expected that the VSI queues have been quisced before calling
4796 * this function.
4797 **/
4798 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4799 {
4800 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4801 struct i40e_vsi_context ctxt;
4802 int ret = 0;
4803 int i;
4804
4805 /* Check if enabled_tc is same as existing or new TCs */
4806 if (vsi->tc_config.enabled_tc == enabled_tc)
4807 return ret;
4808
4809 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4810 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4811 if (enabled_tc & BIT(i))
4812 bw_share[i] = 1;
4813 }
4814
4815 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4816 if (ret) {
4817 dev_info(&vsi->back->pdev->dev,
4818 "Failed configuring TC map %d for VSI %d\n",
4819 enabled_tc, vsi->seid);
4820 goto out;
4821 }
4822
4823 /* Update Queue Pairs Mapping for currently enabled UPs */
4824 ctxt.seid = vsi->seid;
4825 ctxt.pf_num = vsi->back->hw.pf_id;
4826 ctxt.vf_num = 0;
4827 ctxt.uplink_seid = vsi->uplink_seid;
4828 ctxt.info = vsi->info;
4829 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4830
4831 /* Update the VSI after updating the VSI queue-mapping information */
4832 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4833 if (ret) {
4834 dev_info(&vsi->back->pdev->dev,
4835 "Update vsi tc config failed, err %s aq_err %s\n",
4836 i40e_stat_str(&vsi->back->hw, ret),
4837 i40e_aq_str(&vsi->back->hw,
4838 vsi->back->hw.aq.asq_last_status));
4839 goto out;
4840 }
4841 /* update the local VSI info with updated queue map */
4842 i40e_vsi_update_queue_map(vsi, &ctxt);
4843 vsi->info.valid_sections = 0;
4844
4845 /* Update current VSI BW information */
4846 ret = i40e_vsi_get_bw_info(vsi);
4847 if (ret) {
4848 dev_info(&vsi->back->pdev->dev,
4849 "Failed updating vsi bw info, err %s aq_err %s\n",
4850 i40e_stat_str(&vsi->back->hw, ret),
4851 i40e_aq_str(&vsi->back->hw,
4852 vsi->back->hw.aq.asq_last_status));
4853 goto out;
4854 }
4855
4856 /* Update the netdev TC setup */
4857 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4858 out:
4859 return ret;
4860 }
4861
4862 /**
4863 * i40e_veb_config_tc - Configure TCs for given VEB
4864 * @veb: given VEB
4865 * @enabled_tc: TC bitmap
4866 *
4867 * Configures given TC bitmap for VEB (switching) element
4868 **/
4869 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4870 {
4871 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4872 struct i40e_pf *pf = veb->pf;
4873 int ret = 0;
4874 int i;
4875
4876 /* No TCs or already enabled TCs just return */
4877 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4878 return ret;
4879
4880 bw_data.tc_valid_bits = enabled_tc;
4881 /* bw_data.absolute_credits is not set (relative) */
4882
4883 /* Enable ETS TCs with equal BW Share for now */
4884 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4885 if (enabled_tc & BIT(i))
4886 bw_data.tc_bw_share_credits[i] = 1;
4887 }
4888
4889 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4890 &bw_data, NULL);
4891 if (ret) {
4892 dev_info(&pf->pdev->dev,
4893 "VEB bw config failed, err %s aq_err %s\n",
4894 i40e_stat_str(&pf->hw, ret),
4895 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4896 goto out;
4897 }
4898
4899 /* Update the BW information */
4900 ret = i40e_veb_get_bw_info(veb);
4901 if (ret) {
4902 dev_info(&pf->pdev->dev,
4903 "Failed getting veb bw config, err %s aq_err %s\n",
4904 i40e_stat_str(&pf->hw, ret),
4905 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4906 }
4907
4908 out:
4909 return ret;
4910 }
4911
4912 #ifdef CONFIG_I40E_DCB
4913 /**
4914 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4915 * @pf: PF struct
4916 *
4917 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4918 * the caller would've quiesce all the VSIs before calling
4919 * this function
4920 **/
4921 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4922 {
4923 u8 tc_map = 0;
4924 int ret;
4925 u8 v;
4926
4927 /* Enable the TCs available on PF to all VEBs */
4928 tc_map = i40e_pf_get_tc_map(pf);
4929 for (v = 0; v < I40E_MAX_VEB; v++) {
4930 if (!pf->veb[v])
4931 continue;
4932 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4933 if (ret) {
4934 dev_info(&pf->pdev->dev,
4935 "Failed configuring TC for VEB seid=%d\n",
4936 pf->veb[v]->seid);
4937 /* Will try to configure as many components */
4938 }
4939 }
4940
4941 /* Update each VSI */
4942 for (v = 0; v < pf->num_alloc_vsi; v++) {
4943 if (!pf->vsi[v])
4944 continue;
4945
4946 /* - Enable all TCs for the LAN VSI
4947 #ifdef I40E_FCOE
4948 * - For FCoE VSI only enable the TC configured
4949 * as per the APP TLV
4950 #endif
4951 * - For all others keep them at TC0 for now
4952 */
4953 if (v == pf->lan_vsi)
4954 tc_map = i40e_pf_get_tc_map(pf);
4955 else
4956 tc_map = i40e_pf_get_default_tc(pf);
4957 #ifdef I40E_FCOE
4958 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4959 tc_map = i40e_get_fcoe_tc_map(pf);
4960 #endif /* #ifdef I40E_FCOE */
4961
4962 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4963 if (ret) {
4964 dev_info(&pf->pdev->dev,
4965 "Failed configuring TC for VSI seid=%d\n",
4966 pf->vsi[v]->seid);
4967 /* Will try to configure as many components */
4968 } else {
4969 /* Re-configure VSI vectors based on updated TC map */
4970 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4971 if (pf->vsi[v]->netdev)
4972 i40e_dcbnl_set_all(pf->vsi[v]);
4973 }
4974 }
4975 }
4976
4977 /**
4978 * i40e_resume_port_tx - Resume port Tx
4979 * @pf: PF struct
4980 *
4981 * Resume a port's Tx and issue a PF reset in case of failure to
4982 * resume.
4983 **/
4984 static int i40e_resume_port_tx(struct i40e_pf *pf)
4985 {
4986 struct i40e_hw *hw = &pf->hw;
4987 int ret;
4988
4989 ret = i40e_aq_resume_port_tx(hw, NULL);
4990 if (ret) {
4991 dev_info(&pf->pdev->dev,
4992 "Resume Port Tx failed, err %s aq_err %s\n",
4993 i40e_stat_str(&pf->hw, ret),
4994 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4995 /* Schedule PF reset to recover */
4996 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4997 i40e_service_event_schedule(pf);
4998 }
4999
5000 return ret;
5001 }
5002
5003 /**
5004 * i40e_init_pf_dcb - Initialize DCB configuration
5005 * @pf: PF being configured
5006 *
5007 * Query the current DCB configuration and cache it
5008 * in the hardware structure
5009 **/
5010 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5011 {
5012 struct i40e_hw *hw = &pf->hw;
5013 int err = 0;
5014
5015 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5016 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5017 goto out;
5018
5019 /* Get the initial DCB configuration */
5020 err = i40e_init_dcb(hw);
5021 if (!err) {
5022 /* Device/Function is not DCBX capable */
5023 if ((!hw->func_caps.dcb) ||
5024 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5025 dev_info(&pf->pdev->dev,
5026 "DCBX offload is not supported or is disabled for this PF.\n");
5027
5028 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5029 goto out;
5030
5031 } else {
5032 /* When status is not DISABLED then DCBX in FW */
5033 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5034 DCB_CAP_DCBX_VER_IEEE;
5035
5036 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5037 /* Enable DCB tagging only when more than one TC */
5038 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5039 pf->flags |= I40E_FLAG_DCB_ENABLED;
5040 dev_dbg(&pf->pdev->dev,
5041 "DCBX offload is supported for this PF.\n");
5042 }
5043 } else {
5044 dev_info(&pf->pdev->dev,
5045 "Query for DCB configuration failed, err %s aq_err %s\n",
5046 i40e_stat_str(&pf->hw, err),
5047 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5048 }
5049
5050 out:
5051 return err;
5052 }
5053 #endif /* CONFIG_I40E_DCB */
5054 #define SPEED_SIZE 14
5055 #define FC_SIZE 8
5056 /**
5057 * i40e_print_link_message - print link up or down
5058 * @vsi: the VSI for which link needs a message
5059 */
5060 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5061 {
5062 char *speed = "Unknown";
5063 char *fc = "Unknown";
5064
5065 if (vsi->current_isup == isup)
5066 return;
5067 vsi->current_isup = isup;
5068 if (!isup) {
5069 netdev_info(vsi->netdev, "NIC Link is Down\n");
5070 return;
5071 }
5072
5073 /* Warn user if link speed on NPAR enabled partition is not at
5074 * least 10GB
5075 */
5076 if (vsi->back->hw.func_caps.npar_enable &&
5077 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5078 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5079 netdev_warn(vsi->netdev,
5080 "The partition detected link speed that is less than 10Gbps\n");
5081
5082 switch (vsi->back->hw.phy.link_info.link_speed) {
5083 case I40E_LINK_SPEED_40GB:
5084 speed = "40 G";
5085 break;
5086 case I40E_LINK_SPEED_20GB:
5087 speed = "20 G";
5088 break;
5089 case I40E_LINK_SPEED_10GB:
5090 speed = "10 G";
5091 break;
5092 case I40E_LINK_SPEED_1GB:
5093 speed = "1000 M";
5094 break;
5095 case I40E_LINK_SPEED_100MB:
5096 speed = "100 M";
5097 break;
5098 default:
5099 break;
5100 }
5101
5102 switch (vsi->back->hw.fc.current_mode) {
5103 case I40E_FC_FULL:
5104 fc = "RX/TX";
5105 break;
5106 case I40E_FC_TX_PAUSE:
5107 fc = "TX";
5108 break;
5109 case I40E_FC_RX_PAUSE:
5110 fc = "RX";
5111 break;
5112 default:
5113 fc = "None";
5114 break;
5115 }
5116
5117 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5118 speed, fc);
5119 }
5120
5121 /**
5122 * i40e_up_complete - Finish the last steps of bringing up a connection
5123 * @vsi: the VSI being configured
5124 **/
5125 static int i40e_up_complete(struct i40e_vsi *vsi)
5126 {
5127 struct i40e_pf *pf = vsi->back;
5128 int err;
5129
5130 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5131 i40e_vsi_configure_msix(vsi);
5132 else
5133 i40e_configure_msi_and_legacy(vsi);
5134
5135 /* start rings */
5136 err = i40e_vsi_control_rings(vsi, true);
5137 if (err)
5138 return err;
5139
5140 clear_bit(__I40E_DOWN, &vsi->state);
5141 i40e_napi_enable_all(vsi);
5142 i40e_vsi_enable_irq(vsi);
5143
5144 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5145 (vsi->netdev)) {
5146 i40e_print_link_message(vsi, true);
5147 netif_tx_start_all_queues(vsi->netdev);
5148 netif_carrier_on(vsi->netdev);
5149 } else if (vsi->netdev) {
5150 i40e_print_link_message(vsi, false);
5151 /* need to check for qualified module here*/
5152 if ((pf->hw.phy.link_info.link_info &
5153 I40E_AQ_MEDIA_AVAILABLE) &&
5154 (!(pf->hw.phy.link_info.an_info &
5155 I40E_AQ_QUALIFIED_MODULE)))
5156 netdev_err(vsi->netdev,
5157 "the driver failed to link because an unqualified module was detected.");
5158 }
5159
5160 /* replay FDIR SB filters */
5161 if (vsi->type == I40E_VSI_FDIR) {
5162 /* reset fd counters */
5163 pf->fd_add_err = pf->fd_atr_cnt = 0;
5164 if (pf->fd_tcp_rule > 0) {
5165 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5166 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5167 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5168 pf->fd_tcp_rule = 0;
5169 }
5170 i40e_fdir_filter_restore(vsi);
5171 }
5172 i40e_service_event_schedule(pf);
5173
5174 return 0;
5175 }
5176
5177 /**
5178 * i40e_vsi_reinit_locked - Reset the VSI
5179 * @vsi: the VSI being configured
5180 *
5181 * Rebuild the ring structs after some configuration
5182 * has changed, e.g. MTU size.
5183 **/
5184 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5185 {
5186 struct i40e_pf *pf = vsi->back;
5187
5188 WARN_ON(in_interrupt());
5189 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5190 usleep_range(1000, 2000);
5191 i40e_down(vsi);
5192
5193 /* Give a VF some time to respond to the reset. The
5194 * two second wait is based upon the watchdog cycle in
5195 * the VF driver.
5196 */
5197 if (vsi->type == I40E_VSI_SRIOV)
5198 msleep(2000);
5199 i40e_up(vsi);
5200 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5201 }
5202
5203 /**
5204 * i40e_up - Bring the connection back up after being down
5205 * @vsi: the VSI being configured
5206 **/
5207 int i40e_up(struct i40e_vsi *vsi)
5208 {
5209 int err;
5210
5211 err = i40e_vsi_configure(vsi);
5212 if (!err)
5213 err = i40e_up_complete(vsi);
5214
5215 return err;
5216 }
5217
5218 /**
5219 * i40e_down - Shutdown the connection processing
5220 * @vsi: the VSI being stopped
5221 **/
5222 void i40e_down(struct i40e_vsi *vsi)
5223 {
5224 int i;
5225
5226 /* It is assumed that the caller of this function
5227 * sets the vsi->state __I40E_DOWN bit.
5228 */
5229 if (vsi->netdev) {
5230 netif_carrier_off(vsi->netdev);
5231 netif_tx_disable(vsi->netdev);
5232 }
5233 i40e_vsi_disable_irq(vsi);
5234 i40e_vsi_control_rings(vsi, false);
5235 i40e_napi_disable_all(vsi);
5236
5237 for (i = 0; i < vsi->num_queue_pairs; i++) {
5238 i40e_clean_tx_ring(vsi->tx_rings[i]);
5239 i40e_clean_rx_ring(vsi->rx_rings[i]);
5240 }
5241 }
5242
5243 /**
5244 * i40e_setup_tc - configure multiple traffic classes
5245 * @netdev: net device to configure
5246 * @tc: number of traffic classes to enable
5247 **/
5248 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5249 {
5250 struct i40e_netdev_priv *np = netdev_priv(netdev);
5251 struct i40e_vsi *vsi = np->vsi;
5252 struct i40e_pf *pf = vsi->back;
5253 u8 enabled_tc = 0;
5254 int ret = -EINVAL;
5255 int i;
5256
5257 /* Check if DCB enabled to continue */
5258 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5259 netdev_info(netdev, "DCB is not enabled for adapter\n");
5260 goto exit;
5261 }
5262
5263 /* Check if MFP enabled */
5264 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5265 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5266 goto exit;
5267 }
5268
5269 /* Check whether tc count is within enabled limit */
5270 if (tc > i40e_pf_get_num_tc(pf)) {
5271 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5272 goto exit;
5273 }
5274
5275 /* Generate TC map for number of tc requested */
5276 for (i = 0; i < tc; i++)
5277 enabled_tc |= BIT(i);
5278
5279 /* Requesting same TC configuration as already enabled */
5280 if (enabled_tc == vsi->tc_config.enabled_tc)
5281 return 0;
5282
5283 /* Quiesce VSI queues */
5284 i40e_quiesce_vsi(vsi);
5285
5286 /* Configure VSI for enabled TCs */
5287 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5288 if (ret) {
5289 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5290 vsi->seid);
5291 goto exit;
5292 }
5293
5294 /* Unquiesce VSI */
5295 i40e_unquiesce_vsi(vsi);
5296
5297 exit:
5298 return ret;
5299 }
5300
5301 #ifdef I40E_FCOE
5302 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5303 struct tc_to_netdev *tc)
5304 #else
5305 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5306 struct tc_to_netdev *tc)
5307 #endif
5308 {
5309 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5310 return -EINVAL;
5311 return i40e_setup_tc(netdev, tc->tc);
5312 }
5313
5314 /**
5315 * i40e_open - Called when a network interface is made active
5316 * @netdev: network interface device structure
5317 *
5318 * The open entry point is called when a network interface is made
5319 * active by the system (IFF_UP). At this point all resources needed
5320 * for transmit and receive operations are allocated, the interrupt
5321 * handler is registered with the OS, the netdev watchdog subtask is
5322 * enabled, and the stack is notified that the interface is ready.
5323 *
5324 * Returns 0 on success, negative value on failure
5325 **/
5326 int i40e_open(struct net_device *netdev)
5327 {
5328 struct i40e_netdev_priv *np = netdev_priv(netdev);
5329 struct i40e_vsi *vsi = np->vsi;
5330 struct i40e_pf *pf = vsi->back;
5331 int err;
5332
5333 /* disallow open during test or if eeprom is broken */
5334 if (test_bit(__I40E_TESTING, &pf->state) ||
5335 test_bit(__I40E_BAD_EEPROM, &pf->state))
5336 return -EBUSY;
5337
5338 netif_carrier_off(netdev);
5339
5340 err = i40e_vsi_open(vsi);
5341 if (err)
5342 return err;
5343
5344 /* configure global TSO hardware offload settings */
5345 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5346 TCP_FLAG_FIN) >> 16);
5347 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5348 TCP_FLAG_FIN |
5349 TCP_FLAG_CWR) >> 16);
5350 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5351
5352 #ifdef CONFIG_I40E_VXLAN
5353 vxlan_get_rx_port(netdev);
5354 #endif
5355 #ifdef CONFIG_I40E_GENEVE
5356 if (pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE)
5357 geneve_get_rx_port(netdev);
5358 #endif
5359
5360 return 0;
5361 }
5362
5363 /**
5364 * i40e_vsi_open -
5365 * @vsi: the VSI to open
5366 *
5367 * Finish initialization of the VSI.
5368 *
5369 * Returns 0 on success, negative value on failure
5370 **/
5371 int i40e_vsi_open(struct i40e_vsi *vsi)
5372 {
5373 struct i40e_pf *pf = vsi->back;
5374 char int_name[I40E_INT_NAME_STR_LEN];
5375 int err;
5376
5377 /* allocate descriptors */
5378 err = i40e_vsi_setup_tx_resources(vsi);
5379 if (err)
5380 goto err_setup_tx;
5381 err = i40e_vsi_setup_rx_resources(vsi);
5382 if (err)
5383 goto err_setup_rx;
5384
5385 err = i40e_vsi_configure(vsi);
5386 if (err)
5387 goto err_setup_rx;
5388
5389 if (vsi->netdev) {
5390 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5391 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5392 err = i40e_vsi_request_irq(vsi, int_name);
5393 if (err)
5394 goto err_setup_rx;
5395
5396 /* Notify the stack of the actual queue counts. */
5397 err = netif_set_real_num_tx_queues(vsi->netdev,
5398 vsi->num_queue_pairs);
5399 if (err)
5400 goto err_set_queues;
5401
5402 err = netif_set_real_num_rx_queues(vsi->netdev,
5403 vsi->num_queue_pairs);
5404 if (err)
5405 goto err_set_queues;
5406
5407 } else if (vsi->type == I40E_VSI_FDIR) {
5408 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5409 dev_driver_string(&pf->pdev->dev),
5410 dev_name(&pf->pdev->dev));
5411 err = i40e_vsi_request_irq(vsi, int_name);
5412
5413 } else {
5414 err = -EINVAL;
5415 goto err_setup_rx;
5416 }
5417
5418 err = i40e_up_complete(vsi);
5419 if (err)
5420 goto err_up_complete;
5421
5422 return 0;
5423
5424 err_up_complete:
5425 i40e_down(vsi);
5426 err_set_queues:
5427 i40e_vsi_free_irq(vsi);
5428 err_setup_rx:
5429 i40e_vsi_free_rx_resources(vsi);
5430 err_setup_tx:
5431 i40e_vsi_free_tx_resources(vsi);
5432 if (vsi == pf->vsi[pf->lan_vsi])
5433 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5434
5435 return err;
5436 }
5437
5438 /**
5439 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5440 * @pf: Pointer to PF
5441 *
5442 * This function destroys the hlist where all the Flow Director
5443 * filters were saved.
5444 **/
5445 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5446 {
5447 struct i40e_fdir_filter *filter;
5448 struct hlist_node *node2;
5449
5450 hlist_for_each_entry_safe(filter, node2,
5451 &pf->fdir_filter_list, fdir_node) {
5452 hlist_del(&filter->fdir_node);
5453 kfree(filter);
5454 }
5455 pf->fdir_pf_active_filters = 0;
5456 }
5457
5458 /**
5459 * i40e_close - Disables a network interface
5460 * @netdev: network interface device structure
5461 *
5462 * The close entry point is called when an interface is de-activated
5463 * by the OS. The hardware is still under the driver's control, but
5464 * this netdev interface is disabled.
5465 *
5466 * Returns 0, this is not allowed to fail
5467 **/
5468 #ifdef I40E_FCOE
5469 int i40e_close(struct net_device *netdev)
5470 #else
5471 static int i40e_close(struct net_device *netdev)
5472 #endif
5473 {
5474 struct i40e_netdev_priv *np = netdev_priv(netdev);
5475 struct i40e_vsi *vsi = np->vsi;
5476
5477 i40e_vsi_close(vsi);
5478
5479 return 0;
5480 }
5481
5482 /**
5483 * i40e_do_reset - Start a PF or Core Reset sequence
5484 * @pf: board private structure
5485 * @reset_flags: which reset is requested
5486 *
5487 * The essential difference in resets is that the PF Reset
5488 * doesn't clear the packet buffers, doesn't reset the PE
5489 * firmware, and doesn't bother the other PFs on the chip.
5490 **/
5491 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5492 {
5493 u32 val;
5494
5495 WARN_ON(in_interrupt());
5496
5497 if (i40e_check_asq_alive(&pf->hw))
5498 i40e_vc_notify_reset(pf);
5499
5500 /* do the biggest reset indicated */
5501 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5502
5503 /* Request a Global Reset
5504 *
5505 * This will start the chip's countdown to the actual full
5506 * chip reset event, and a warning interrupt to be sent
5507 * to all PFs, including the requestor. Our handler
5508 * for the warning interrupt will deal with the shutdown
5509 * and recovery of the switch setup.
5510 */
5511 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5512 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5513 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5514 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5515
5516 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5517
5518 /* Request a Core Reset
5519 *
5520 * Same as Global Reset, except does *not* include the MAC/PHY
5521 */
5522 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5523 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5524 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5525 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5526 i40e_flush(&pf->hw);
5527
5528 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5529
5530 /* Request a PF Reset
5531 *
5532 * Resets only the PF-specific registers
5533 *
5534 * This goes directly to the tear-down and rebuild of
5535 * the switch, since we need to do all the recovery as
5536 * for the Core Reset.
5537 */
5538 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5539 i40e_handle_reset_warning(pf);
5540
5541 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5542 int v;
5543
5544 /* Find the VSI(s) that requested a re-init */
5545 dev_info(&pf->pdev->dev,
5546 "VSI reinit requested\n");
5547 for (v = 0; v < pf->num_alloc_vsi; v++) {
5548 struct i40e_vsi *vsi = pf->vsi[v];
5549
5550 if (vsi != NULL &&
5551 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5552 i40e_vsi_reinit_locked(pf->vsi[v]);
5553 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5554 }
5555 }
5556 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5557 int v;
5558
5559 /* Find the VSI(s) that needs to be brought down */
5560 dev_info(&pf->pdev->dev, "VSI down requested\n");
5561 for (v = 0; v < pf->num_alloc_vsi; v++) {
5562 struct i40e_vsi *vsi = pf->vsi[v];
5563
5564 if (vsi != NULL &&
5565 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5566 set_bit(__I40E_DOWN, &vsi->state);
5567 i40e_down(vsi);
5568 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5569 }
5570 }
5571 } else {
5572 dev_info(&pf->pdev->dev,
5573 "bad reset request 0x%08x\n", reset_flags);
5574 }
5575 }
5576
5577 #ifdef CONFIG_I40E_DCB
5578 /**
5579 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5580 * @pf: board private structure
5581 * @old_cfg: current DCB config
5582 * @new_cfg: new DCB config
5583 **/
5584 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5585 struct i40e_dcbx_config *old_cfg,
5586 struct i40e_dcbx_config *new_cfg)
5587 {
5588 bool need_reconfig = false;
5589
5590 /* Check if ETS configuration has changed */
5591 if (memcmp(&new_cfg->etscfg,
5592 &old_cfg->etscfg,
5593 sizeof(new_cfg->etscfg))) {
5594 /* If Priority Table has changed reconfig is needed */
5595 if (memcmp(&new_cfg->etscfg.prioritytable,
5596 &old_cfg->etscfg.prioritytable,
5597 sizeof(new_cfg->etscfg.prioritytable))) {
5598 need_reconfig = true;
5599 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5600 }
5601
5602 if (memcmp(&new_cfg->etscfg.tcbwtable,
5603 &old_cfg->etscfg.tcbwtable,
5604 sizeof(new_cfg->etscfg.tcbwtable)))
5605 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5606
5607 if (memcmp(&new_cfg->etscfg.tsatable,
5608 &old_cfg->etscfg.tsatable,
5609 sizeof(new_cfg->etscfg.tsatable)))
5610 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5611 }
5612
5613 /* Check if PFC configuration has changed */
5614 if (memcmp(&new_cfg->pfc,
5615 &old_cfg->pfc,
5616 sizeof(new_cfg->pfc))) {
5617 need_reconfig = true;
5618 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5619 }
5620
5621 /* Check if APP Table has changed */
5622 if (memcmp(&new_cfg->app,
5623 &old_cfg->app,
5624 sizeof(new_cfg->app))) {
5625 need_reconfig = true;
5626 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5627 }
5628
5629 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5630 return need_reconfig;
5631 }
5632
5633 /**
5634 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5635 * @pf: board private structure
5636 * @e: event info posted on ARQ
5637 **/
5638 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5639 struct i40e_arq_event_info *e)
5640 {
5641 struct i40e_aqc_lldp_get_mib *mib =
5642 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5643 struct i40e_hw *hw = &pf->hw;
5644 struct i40e_dcbx_config tmp_dcbx_cfg;
5645 bool need_reconfig = false;
5646 int ret = 0;
5647 u8 type;
5648
5649 /* Not DCB capable or capability disabled */
5650 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5651 return ret;
5652
5653 /* Ignore if event is not for Nearest Bridge */
5654 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5655 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5656 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5657 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5658 return ret;
5659
5660 /* Check MIB Type and return if event for Remote MIB update */
5661 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5662 dev_dbg(&pf->pdev->dev,
5663 "LLDP event mib type %s\n", type ? "remote" : "local");
5664 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5665 /* Update the remote cached instance and return */
5666 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5667 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5668 &hw->remote_dcbx_config);
5669 goto exit;
5670 }
5671
5672 /* Store the old configuration */
5673 tmp_dcbx_cfg = hw->local_dcbx_config;
5674
5675 /* Reset the old DCBx configuration data */
5676 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5677 /* Get updated DCBX data from firmware */
5678 ret = i40e_get_dcb_config(&pf->hw);
5679 if (ret) {
5680 dev_info(&pf->pdev->dev,
5681 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5682 i40e_stat_str(&pf->hw, ret),
5683 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5684 goto exit;
5685 }
5686
5687 /* No change detected in DCBX configs */
5688 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5689 sizeof(tmp_dcbx_cfg))) {
5690 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5691 goto exit;
5692 }
5693
5694 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5695 &hw->local_dcbx_config);
5696
5697 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5698
5699 if (!need_reconfig)
5700 goto exit;
5701
5702 /* Enable DCB tagging only when more than one TC */
5703 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5704 pf->flags |= I40E_FLAG_DCB_ENABLED;
5705 else
5706 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5707
5708 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5709 /* Reconfiguration needed quiesce all VSIs */
5710 i40e_pf_quiesce_all_vsi(pf);
5711
5712 /* Changes in configuration update VEB/VSI */
5713 i40e_dcb_reconfigure(pf);
5714
5715 ret = i40e_resume_port_tx(pf);
5716
5717 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5718 /* In case of error no point in resuming VSIs */
5719 if (ret)
5720 goto exit;
5721
5722 /* Wait for the PF's Tx queues to be disabled */
5723 ret = i40e_pf_wait_txq_disabled(pf);
5724 if (ret) {
5725 /* Schedule PF reset to recover */
5726 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5727 i40e_service_event_schedule(pf);
5728 } else {
5729 i40e_pf_unquiesce_all_vsi(pf);
5730 }
5731
5732 exit:
5733 return ret;
5734 }
5735 #endif /* CONFIG_I40E_DCB */
5736
5737 /**
5738 * i40e_do_reset_safe - Protected reset path for userland calls.
5739 * @pf: board private structure
5740 * @reset_flags: which reset is requested
5741 *
5742 **/
5743 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5744 {
5745 rtnl_lock();
5746 i40e_do_reset(pf, reset_flags);
5747 rtnl_unlock();
5748 }
5749
5750 /**
5751 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5752 * @pf: board private structure
5753 * @e: event info posted on ARQ
5754 *
5755 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5756 * and VF queues
5757 **/
5758 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5759 struct i40e_arq_event_info *e)
5760 {
5761 struct i40e_aqc_lan_overflow *data =
5762 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5763 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5764 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5765 struct i40e_hw *hw = &pf->hw;
5766 struct i40e_vf *vf;
5767 u16 vf_id;
5768
5769 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5770 queue, qtx_ctl);
5771
5772 /* Queue belongs to VF, find the VF and issue VF reset */
5773 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5774 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5775 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5776 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5777 vf_id -= hw->func_caps.vf_base_id;
5778 vf = &pf->vf[vf_id];
5779 i40e_vc_notify_vf_reset(vf);
5780 /* Allow VF to process pending reset notification */
5781 msleep(20);
5782 i40e_reset_vf(vf, false);
5783 }
5784 }
5785
5786 /**
5787 * i40e_service_event_complete - Finish up the service event
5788 * @pf: board private structure
5789 **/
5790 static void i40e_service_event_complete(struct i40e_pf *pf)
5791 {
5792 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5793
5794 /* flush memory to make sure state is correct before next watchog */
5795 smp_mb__before_atomic();
5796 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5797 }
5798
5799 /**
5800 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5801 * @pf: board private structure
5802 **/
5803 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5804 {
5805 u32 val, fcnt_prog;
5806
5807 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5808 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5809 return fcnt_prog;
5810 }
5811
5812 /**
5813 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5814 * @pf: board private structure
5815 **/
5816 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5817 {
5818 u32 val, fcnt_prog;
5819
5820 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5821 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5822 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5823 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5824 return fcnt_prog;
5825 }
5826
5827 /**
5828 * i40e_get_global_fd_count - Get total FD filters programmed on device
5829 * @pf: board private structure
5830 **/
5831 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5832 {
5833 u32 val, fcnt_prog;
5834
5835 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5836 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5837 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5838 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5839 return fcnt_prog;
5840 }
5841
5842 /**
5843 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5844 * @pf: board private structure
5845 **/
5846 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5847 {
5848 struct i40e_fdir_filter *filter;
5849 u32 fcnt_prog, fcnt_avail;
5850 struct hlist_node *node;
5851
5852 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5853 return;
5854
5855 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5856 * to re-enable
5857 */
5858 fcnt_prog = i40e_get_global_fd_count(pf);
5859 fcnt_avail = pf->fdir_pf_filter_count;
5860 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5861 (pf->fd_add_err == 0) ||
5862 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5863 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5864 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5865 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5866 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5867 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5868 }
5869 }
5870 /* Wait for some more space to be available to turn on ATR */
5871 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5872 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5873 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5874 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5875 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5876 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5877 }
5878 }
5879
5880 /* if hw had a problem adding a filter, delete it */
5881 if (pf->fd_inv > 0) {
5882 hlist_for_each_entry_safe(filter, node,
5883 &pf->fdir_filter_list, fdir_node) {
5884 if (filter->fd_id == pf->fd_inv) {
5885 hlist_del(&filter->fdir_node);
5886 kfree(filter);
5887 pf->fdir_pf_active_filters--;
5888 }
5889 }
5890 }
5891 }
5892
5893 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5894 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5895 /**
5896 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5897 * @pf: board private structure
5898 **/
5899 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5900 {
5901 unsigned long min_flush_time;
5902 int flush_wait_retry = 50;
5903 bool disable_atr = false;
5904 int fd_room;
5905 int reg;
5906
5907 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5908 return;
5909
5910 if (!time_after(jiffies, pf->fd_flush_timestamp +
5911 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5912 return;
5913
5914 /* If the flush is happening too quick and we have mostly SB rules we
5915 * should not re-enable ATR for some time.
5916 */
5917 min_flush_time = pf->fd_flush_timestamp +
5918 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5919 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5920
5921 if (!(time_after(jiffies, min_flush_time)) &&
5922 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5923 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5924 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5925 disable_atr = true;
5926 }
5927
5928 pf->fd_flush_timestamp = jiffies;
5929 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5930 /* flush all filters */
5931 wr32(&pf->hw, I40E_PFQF_CTL_1,
5932 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5933 i40e_flush(&pf->hw);
5934 pf->fd_flush_cnt++;
5935 pf->fd_add_err = 0;
5936 do {
5937 /* Check FD flush status every 5-6msec */
5938 usleep_range(5000, 6000);
5939 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5940 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5941 break;
5942 } while (flush_wait_retry--);
5943 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5944 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5945 } else {
5946 /* replay sideband filters */
5947 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5948 if (!disable_atr)
5949 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5950 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5951 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5952 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5953 }
5954
5955 }
5956
5957 /**
5958 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5959 * @pf: board private structure
5960 **/
5961 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5962 {
5963 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5964 }
5965
5966 /* We can see up to 256 filter programming desc in transit if the filters are
5967 * being applied really fast; before we see the first
5968 * filter miss error on Rx queue 0. Accumulating enough error messages before
5969 * reacting will make sure we don't cause flush too often.
5970 */
5971 #define I40E_MAX_FD_PROGRAM_ERROR 256
5972
5973 /**
5974 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5975 * @pf: board private structure
5976 **/
5977 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5978 {
5979
5980 /* if interface is down do nothing */
5981 if (test_bit(__I40E_DOWN, &pf->state))
5982 return;
5983
5984 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5985 return;
5986
5987 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5988 i40e_fdir_flush_and_replay(pf);
5989
5990 i40e_fdir_check_and_reenable(pf);
5991
5992 }
5993
5994 /**
5995 * i40e_vsi_link_event - notify VSI of a link event
5996 * @vsi: vsi to be notified
5997 * @link_up: link up or down
5998 **/
5999 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6000 {
6001 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6002 return;
6003
6004 switch (vsi->type) {
6005 case I40E_VSI_MAIN:
6006 #ifdef I40E_FCOE
6007 case I40E_VSI_FCOE:
6008 #endif
6009 if (!vsi->netdev || !vsi->netdev_registered)
6010 break;
6011
6012 if (link_up) {
6013 netif_carrier_on(vsi->netdev);
6014 netif_tx_wake_all_queues(vsi->netdev);
6015 } else {
6016 netif_carrier_off(vsi->netdev);
6017 netif_tx_stop_all_queues(vsi->netdev);
6018 }
6019 break;
6020
6021 case I40E_VSI_SRIOV:
6022 case I40E_VSI_VMDQ2:
6023 case I40E_VSI_CTRL:
6024 case I40E_VSI_MIRROR:
6025 default:
6026 /* there is no notification for other VSIs */
6027 break;
6028 }
6029 }
6030
6031 /**
6032 * i40e_veb_link_event - notify elements on the veb of a link event
6033 * @veb: veb to be notified
6034 * @link_up: link up or down
6035 **/
6036 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6037 {
6038 struct i40e_pf *pf;
6039 int i;
6040
6041 if (!veb || !veb->pf)
6042 return;
6043 pf = veb->pf;
6044
6045 /* depth first... */
6046 for (i = 0; i < I40E_MAX_VEB; i++)
6047 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6048 i40e_veb_link_event(pf->veb[i], link_up);
6049
6050 /* ... now the local VSIs */
6051 for (i = 0; i < pf->num_alloc_vsi; i++)
6052 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6053 i40e_vsi_link_event(pf->vsi[i], link_up);
6054 }
6055
6056 /**
6057 * i40e_link_event - Update netif_carrier status
6058 * @pf: board private structure
6059 **/
6060 static void i40e_link_event(struct i40e_pf *pf)
6061 {
6062 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6063 u8 new_link_speed, old_link_speed;
6064 i40e_status status;
6065 bool new_link, old_link;
6066
6067 /* save off old link status information */
6068 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6069
6070 /* set this to force the get_link_status call to refresh state */
6071 pf->hw.phy.get_link_info = true;
6072
6073 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6074
6075 status = i40e_get_link_status(&pf->hw, &new_link);
6076 if (status) {
6077 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6078 status);
6079 return;
6080 }
6081
6082 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6083 new_link_speed = pf->hw.phy.link_info.link_speed;
6084
6085 if (new_link == old_link &&
6086 new_link_speed == old_link_speed &&
6087 (test_bit(__I40E_DOWN, &vsi->state) ||
6088 new_link == netif_carrier_ok(vsi->netdev)))
6089 return;
6090
6091 if (!test_bit(__I40E_DOWN, &vsi->state))
6092 i40e_print_link_message(vsi, new_link);
6093
6094 /* Notify the base of the switch tree connected to
6095 * the link. Floating VEBs are not notified.
6096 */
6097 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6098 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6099 else
6100 i40e_vsi_link_event(vsi, new_link);
6101
6102 if (pf->vf)
6103 i40e_vc_notify_link_state(pf);
6104
6105 if (pf->flags & I40E_FLAG_PTP)
6106 i40e_ptp_set_increment(pf);
6107 }
6108
6109 /**
6110 * i40e_watchdog_subtask - periodic checks not using event driven response
6111 * @pf: board private structure
6112 **/
6113 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6114 {
6115 int i;
6116
6117 /* if interface is down do nothing */
6118 if (test_bit(__I40E_DOWN, &pf->state) ||
6119 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6120 return;
6121
6122 /* make sure we don't do these things too often */
6123 if (time_before(jiffies, (pf->service_timer_previous +
6124 pf->service_timer_period)))
6125 return;
6126 pf->service_timer_previous = jiffies;
6127
6128 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6129 i40e_link_event(pf);
6130
6131 /* Update the stats for active netdevs so the network stack
6132 * can look at updated numbers whenever it cares to
6133 */
6134 for (i = 0; i < pf->num_alloc_vsi; i++)
6135 if (pf->vsi[i] && pf->vsi[i]->netdev)
6136 i40e_update_stats(pf->vsi[i]);
6137
6138 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6139 /* Update the stats for the active switching components */
6140 for (i = 0; i < I40E_MAX_VEB; i++)
6141 if (pf->veb[i])
6142 i40e_update_veb_stats(pf->veb[i]);
6143 }
6144
6145 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6146 }
6147
6148 /**
6149 * i40e_reset_subtask - Set up for resetting the device and driver
6150 * @pf: board private structure
6151 **/
6152 static void i40e_reset_subtask(struct i40e_pf *pf)
6153 {
6154 u32 reset_flags = 0;
6155
6156 rtnl_lock();
6157 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6158 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6159 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6160 }
6161 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6162 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6163 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6164 }
6165 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6166 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6167 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6168 }
6169 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6170 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6171 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6172 }
6173 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6174 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6175 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6176 }
6177
6178 /* If there's a recovery already waiting, it takes
6179 * precedence before starting a new reset sequence.
6180 */
6181 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6182 i40e_handle_reset_warning(pf);
6183 goto unlock;
6184 }
6185
6186 /* If we're already down or resetting, just bail */
6187 if (reset_flags &&
6188 !test_bit(__I40E_DOWN, &pf->state) &&
6189 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6190 i40e_do_reset(pf, reset_flags);
6191
6192 unlock:
6193 rtnl_unlock();
6194 }
6195
6196 /**
6197 * i40e_handle_link_event - Handle link event
6198 * @pf: board private structure
6199 * @e: event info posted on ARQ
6200 **/
6201 static void i40e_handle_link_event(struct i40e_pf *pf,
6202 struct i40e_arq_event_info *e)
6203 {
6204 struct i40e_aqc_get_link_status *status =
6205 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6206
6207 /* Do a new status request to re-enable LSE reporting
6208 * and load new status information into the hw struct
6209 * This completely ignores any state information
6210 * in the ARQ event info, instead choosing to always
6211 * issue the AQ update link status command.
6212 */
6213 i40e_link_event(pf);
6214
6215 /* check for unqualified module, if link is down */
6216 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6217 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6218 (!(status->link_info & I40E_AQ_LINK_UP)))
6219 dev_err(&pf->pdev->dev,
6220 "The driver failed to link because an unqualified module was detected.\n");
6221 }
6222
6223 /**
6224 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6225 * @pf: board private structure
6226 **/
6227 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6228 {
6229 struct i40e_arq_event_info event;
6230 struct i40e_hw *hw = &pf->hw;
6231 u16 pending, i = 0;
6232 i40e_status ret;
6233 u16 opcode;
6234 u32 oldval;
6235 u32 val;
6236
6237 /* Do not run clean AQ when PF reset fails */
6238 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6239 return;
6240
6241 /* check for error indications */
6242 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6243 oldval = val;
6244 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6245 if (hw->debug_mask & I40E_DEBUG_AQ)
6246 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6247 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6248 }
6249 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6250 if (hw->debug_mask & I40E_DEBUG_AQ)
6251 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6252 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6253 pf->arq_overflows++;
6254 }
6255 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6256 if (hw->debug_mask & I40E_DEBUG_AQ)
6257 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6258 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6259 }
6260 if (oldval != val)
6261 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6262
6263 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6264 oldval = val;
6265 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6266 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6267 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6268 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6269 }
6270 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6271 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6272 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6273 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6274 }
6275 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6276 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6277 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6278 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6279 }
6280 if (oldval != val)
6281 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6282
6283 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6284 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6285 if (!event.msg_buf)
6286 return;
6287
6288 do {
6289 ret = i40e_clean_arq_element(hw, &event, &pending);
6290 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6291 break;
6292 else if (ret) {
6293 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6294 break;
6295 }
6296
6297 opcode = le16_to_cpu(event.desc.opcode);
6298 switch (opcode) {
6299
6300 case i40e_aqc_opc_get_link_status:
6301 i40e_handle_link_event(pf, &event);
6302 break;
6303 case i40e_aqc_opc_send_msg_to_pf:
6304 ret = i40e_vc_process_vf_msg(pf,
6305 le16_to_cpu(event.desc.retval),
6306 le32_to_cpu(event.desc.cookie_high),
6307 le32_to_cpu(event.desc.cookie_low),
6308 event.msg_buf,
6309 event.msg_len);
6310 break;
6311 case i40e_aqc_opc_lldp_update_mib:
6312 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6313 #ifdef CONFIG_I40E_DCB
6314 rtnl_lock();
6315 ret = i40e_handle_lldp_event(pf, &event);
6316 rtnl_unlock();
6317 #endif /* CONFIG_I40E_DCB */
6318 break;
6319 case i40e_aqc_opc_event_lan_overflow:
6320 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6321 i40e_handle_lan_overflow_event(pf, &event);
6322 break;
6323 case i40e_aqc_opc_send_msg_to_peer:
6324 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6325 break;
6326 case i40e_aqc_opc_nvm_erase:
6327 case i40e_aqc_opc_nvm_update:
6328 case i40e_aqc_opc_oem_post_update:
6329 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6330 break;
6331 default:
6332 dev_info(&pf->pdev->dev,
6333 "ARQ Error: Unknown event 0x%04x received\n",
6334 opcode);
6335 break;
6336 }
6337 } while (pending && (i++ < pf->adminq_work_limit));
6338
6339 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6340 /* re-enable Admin queue interrupt cause */
6341 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6342 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6343 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6344 i40e_flush(hw);
6345
6346 kfree(event.msg_buf);
6347 }
6348
6349 /**
6350 * i40e_verify_eeprom - make sure eeprom is good to use
6351 * @pf: board private structure
6352 **/
6353 static void i40e_verify_eeprom(struct i40e_pf *pf)
6354 {
6355 int err;
6356
6357 err = i40e_diag_eeprom_test(&pf->hw);
6358 if (err) {
6359 /* retry in case of garbage read */
6360 err = i40e_diag_eeprom_test(&pf->hw);
6361 if (err) {
6362 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6363 err);
6364 set_bit(__I40E_BAD_EEPROM, &pf->state);
6365 }
6366 }
6367
6368 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6369 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6370 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6371 }
6372 }
6373
6374 /**
6375 * i40e_enable_pf_switch_lb
6376 * @pf: pointer to the PF structure
6377 *
6378 * enable switch loop back or die - no point in a return value
6379 **/
6380 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6381 {
6382 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6383 struct i40e_vsi_context ctxt;
6384 int ret;
6385
6386 ctxt.seid = pf->main_vsi_seid;
6387 ctxt.pf_num = pf->hw.pf_id;
6388 ctxt.vf_num = 0;
6389 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6390 if (ret) {
6391 dev_info(&pf->pdev->dev,
6392 "couldn't get PF vsi config, err %s aq_err %s\n",
6393 i40e_stat_str(&pf->hw, ret),
6394 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6395 return;
6396 }
6397 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6398 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6399 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6400
6401 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6402 if (ret) {
6403 dev_info(&pf->pdev->dev,
6404 "update vsi switch failed, err %s aq_err %s\n",
6405 i40e_stat_str(&pf->hw, ret),
6406 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6407 }
6408 }
6409
6410 /**
6411 * i40e_disable_pf_switch_lb
6412 * @pf: pointer to the PF structure
6413 *
6414 * disable switch loop back or die - no point in a return value
6415 **/
6416 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6417 {
6418 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6419 struct i40e_vsi_context ctxt;
6420 int ret;
6421
6422 ctxt.seid = pf->main_vsi_seid;
6423 ctxt.pf_num = pf->hw.pf_id;
6424 ctxt.vf_num = 0;
6425 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6426 if (ret) {
6427 dev_info(&pf->pdev->dev,
6428 "couldn't get PF vsi config, err %s aq_err %s\n",
6429 i40e_stat_str(&pf->hw, ret),
6430 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6431 return;
6432 }
6433 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6434 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6435 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6436
6437 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6438 if (ret) {
6439 dev_info(&pf->pdev->dev,
6440 "update vsi switch failed, err %s aq_err %s\n",
6441 i40e_stat_str(&pf->hw, ret),
6442 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6443 }
6444 }
6445
6446 /**
6447 * i40e_config_bridge_mode - Configure the HW bridge mode
6448 * @veb: pointer to the bridge instance
6449 *
6450 * Configure the loop back mode for the LAN VSI that is downlink to the
6451 * specified HW bridge instance. It is expected this function is called
6452 * when a new HW bridge is instantiated.
6453 **/
6454 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6455 {
6456 struct i40e_pf *pf = veb->pf;
6457
6458 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6459 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6460 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6461 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6462 i40e_disable_pf_switch_lb(pf);
6463 else
6464 i40e_enable_pf_switch_lb(pf);
6465 }
6466
6467 /**
6468 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6469 * @veb: pointer to the VEB instance
6470 *
6471 * This is a recursive function that first builds the attached VSIs then
6472 * recurses in to build the next layer of VEB. We track the connections
6473 * through our own index numbers because the seid's from the HW could
6474 * change across the reset.
6475 **/
6476 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6477 {
6478 struct i40e_vsi *ctl_vsi = NULL;
6479 struct i40e_pf *pf = veb->pf;
6480 int v, veb_idx;
6481 int ret;
6482
6483 /* build VSI that owns this VEB, temporarily attached to base VEB */
6484 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6485 if (pf->vsi[v] &&
6486 pf->vsi[v]->veb_idx == veb->idx &&
6487 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6488 ctl_vsi = pf->vsi[v];
6489 break;
6490 }
6491 }
6492 if (!ctl_vsi) {
6493 dev_info(&pf->pdev->dev,
6494 "missing owner VSI for veb_idx %d\n", veb->idx);
6495 ret = -ENOENT;
6496 goto end_reconstitute;
6497 }
6498 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6499 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6500 ret = i40e_add_vsi(ctl_vsi);
6501 if (ret) {
6502 dev_info(&pf->pdev->dev,
6503 "rebuild of veb_idx %d owner VSI failed: %d\n",
6504 veb->idx, ret);
6505 goto end_reconstitute;
6506 }
6507 i40e_vsi_reset_stats(ctl_vsi);
6508
6509 /* create the VEB in the switch and move the VSI onto the VEB */
6510 ret = i40e_add_veb(veb, ctl_vsi);
6511 if (ret)
6512 goto end_reconstitute;
6513
6514 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6515 veb->bridge_mode = BRIDGE_MODE_VEB;
6516 else
6517 veb->bridge_mode = BRIDGE_MODE_VEPA;
6518 i40e_config_bridge_mode(veb);
6519
6520 /* create the remaining VSIs attached to this VEB */
6521 for (v = 0; v < pf->num_alloc_vsi; v++) {
6522 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6523 continue;
6524
6525 if (pf->vsi[v]->veb_idx == veb->idx) {
6526 struct i40e_vsi *vsi = pf->vsi[v];
6527
6528 vsi->uplink_seid = veb->seid;
6529 ret = i40e_add_vsi(vsi);
6530 if (ret) {
6531 dev_info(&pf->pdev->dev,
6532 "rebuild of vsi_idx %d failed: %d\n",
6533 v, ret);
6534 goto end_reconstitute;
6535 }
6536 i40e_vsi_reset_stats(vsi);
6537 }
6538 }
6539
6540 /* create any VEBs attached to this VEB - RECURSION */
6541 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6542 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6543 pf->veb[veb_idx]->uplink_seid = veb->seid;
6544 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6545 if (ret)
6546 break;
6547 }
6548 }
6549
6550 end_reconstitute:
6551 return ret;
6552 }
6553
6554 /**
6555 * i40e_get_capabilities - get info about the HW
6556 * @pf: the PF struct
6557 **/
6558 static int i40e_get_capabilities(struct i40e_pf *pf)
6559 {
6560 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6561 u16 data_size;
6562 int buf_len;
6563 int err;
6564
6565 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6566 do {
6567 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6568 if (!cap_buf)
6569 return -ENOMEM;
6570
6571 /* this loads the data into the hw struct for us */
6572 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6573 &data_size,
6574 i40e_aqc_opc_list_func_capabilities,
6575 NULL);
6576 /* data loaded, buffer no longer needed */
6577 kfree(cap_buf);
6578
6579 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6580 /* retry with a larger buffer */
6581 buf_len = data_size;
6582 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6583 dev_info(&pf->pdev->dev,
6584 "capability discovery failed, err %s aq_err %s\n",
6585 i40e_stat_str(&pf->hw, err),
6586 i40e_aq_str(&pf->hw,
6587 pf->hw.aq.asq_last_status));
6588 return -ENODEV;
6589 }
6590 } while (err);
6591
6592 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6593 dev_info(&pf->pdev->dev,
6594 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6595 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6596 pf->hw.func_caps.num_msix_vectors,
6597 pf->hw.func_caps.num_msix_vectors_vf,
6598 pf->hw.func_caps.fd_filters_guaranteed,
6599 pf->hw.func_caps.fd_filters_best_effort,
6600 pf->hw.func_caps.num_tx_qp,
6601 pf->hw.func_caps.num_vsis);
6602
6603 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6604 + pf->hw.func_caps.num_vfs)
6605 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6606 dev_info(&pf->pdev->dev,
6607 "got num_vsis %d, setting num_vsis to %d\n",
6608 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6609 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6610 }
6611
6612 return 0;
6613 }
6614
6615 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6616
6617 /**
6618 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6619 * @pf: board private structure
6620 **/
6621 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6622 {
6623 struct i40e_vsi *vsi;
6624 int i;
6625
6626 /* quick workaround for an NVM issue that leaves a critical register
6627 * uninitialized
6628 */
6629 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6630 static const u32 hkey[] = {
6631 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6632 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6633 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6634 0x95b3a76d};
6635
6636 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6637 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6638 }
6639
6640 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6641 return;
6642
6643 /* find existing VSI and see if it needs configuring */
6644 vsi = NULL;
6645 for (i = 0; i < pf->num_alloc_vsi; i++) {
6646 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6647 vsi = pf->vsi[i];
6648 break;
6649 }
6650 }
6651
6652 /* create a new VSI if none exists */
6653 if (!vsi) {
6654 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6655 pf->vsi[pf->lan_vsi]->seid, 0);
6656 if (!vsi) {
6657 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6658 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6659 return;
6660 }
6661 }
6662
6663 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6664 }
6665
6666 /**
6667 * i40e_fdir_teardown - release the Flow Director resources
6668 * @pf: board private structure
6669 **/
6670 static void i40e_fdir_teardown(struct i40e_pf *pf)
6671 {
6672 int i;
6673
6674 i40e_fdir_filter_exit(pf);
6675 for (i = 0; i < pf->num_alloc_vsi; i++) {
6676 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6677 i40e_vsi_release(pf->vsi[i]);
6678 break;
6679 }
6680 }
6681 }
6682
6683 /**
6684 * i40e_prep_for_reset - prep for the core to reset
6685 * @pf: board private structure
6686 *
6687 * Close up the VFs and other things in prep for PF Reset.
6688 **/
6689 static void i40e_prep_for_reset(struct i40e_pf *pf)
6690 {
6691 struct i40e_hw *hw = &pf->hw;
6692 i40e_status ret = 0;
6693 u32 v;
6694
6695 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6696 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6697 return;
6698
6699 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6700
6701 /* quiesce the VSIs and their queues that are not already DOWN */
6702 i40e_pf_quiesce_all_vsi(pf);
6703
6704 for (v = 0; v < pf->num_alloc_vsi; v++) {
6705 if (pf->vsi[v])
6706 pf->vsi[v]->seid = 0;
6707 }
6708
6709 i40e_shutdown_adminq(&pf->hw);
6710
6711 /* call shutdown HMC */
6712 if (hw->hmc.hmc_obj) {
6713 ret = i40e_shutdown_lan_hmc(hw);
6714 if (ret)
6715 dev_warn(&pf->pdev->dev,
6716 "shutdown_lan_hmc failed: %d\n", ret);
6717 }
6718 }
6719
6720 /**
6721 * i40e_send_version - update firmware with driver version
6722 * @pf: PF struct
6723 */
6724 static void i40e_send_version(struct i40e_pf *pf)
6725 {
6726 struct i40e_driver_version dv;
6727
6728 dv.major_version = DRV_VERSION_MAJOR;
6729 dv.minor_version = DRV_VERSION_MINOR;
6730 dv.build_version = DRV_VERSION_BUILD;
6731 dv.subbuild_version = 0;
6732 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6733 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6734 }
6735
6736 /**
6737 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6738 * @pf: board private structure
6739 * @reinit: if the Main VSI needs to re-initialized.
6740 **/
6741 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6742 {
6743 struct i40e_hw *hw = &pf->hw;
6744 u8 set_fc_aq_fail = 0;
6745 i40e_status ret;
6746 u32 val;
6747 u32 v;
6748
6749 /* Now we wait for GRST to settle out.
6750 * We don't have to delete the VEBs or VSIs from the hw switch
6751 * because the reset will make them disappear.
6752 */
6753 ret = i40e_pf_reset(hw);
6754 if (ret) {
6755 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6756 set_bit(__I40E_RESET_FAILED, &pf->state);
6757 goto clear_recovery;
6758 }
6759 pf->pfr_count++;
6760
6761 if (test_bit(__I40E_DOWN, &pf->state))
6762 goto clear_recovery;
6763 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6764
6765 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6766 ret = i40e_init_adminq(&pf->hw);
6767 if (ret) {
6768 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6769 i40e_stat_str(&pf->hw, ret),
6770 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6771 goto clear_recovery;
6772 }
6773
6774 /* re-verify the eeprom if we just had an EMP reset */
6775 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6776 i40e_verify_eeprom(pf);
6777
6778 i40e_clear_pxe_mode(hw);
6779 ret = i40e_get_capabilities(pf);
6780 if (ret)
6781 goto end_core_reset;
6782
6783 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6784 hw->func_caps.num_rx_qp,
6785 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6786 if (ret) {
6787 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6788 goto end_core_reset;
6789 }
6790 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6791 if (ret) {
6792 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6793 goto end_core_reset;
6794 }
6795
6796 #ifdef CONFIG_I40E_DCB
6797 ret = i40e_init_pf_dcb(pf);
6798 if (ret) {
6799 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6800 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6801 /* Continue without DCB enabled */
6802 }
6803 #endif /* CONFIG_I40E_DCB */
6804 #ifdef I40E_FCOE
6805 i40e_init_pf_fcoe(pf);
6806
6807 #endif
6808 /* do basic switch setup */
6809 ret = i40e_setup_pf_switch(pf, reinit);
6810 if (ret)
6811 goto end_core_reset;
6812
6813 /* The driver only wants link up/down and module qualification
6814 * reports from firmware. Note the negative logic.
6815 */
6816 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6817 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6818 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6819 if (ret)
6820 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6821 i40e_stat_str(&pf->hw, ret),
6822 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6823
6824 /* make sure our flow control settings are restored */
6825 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6826 if (ret)
6827 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6828 i40e_stat_str(&pf->hw, ret),
6829 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6830
6831 /* Rebuild the VSIs and VEBs that existed before reset.
6832 * They are still in our local switch element arrays, so only
6833 * need to rebuild the switch model in the HW.
6834 *
6835 * If there were VEBs but the reconstitution failed, we'll try
6836 * try to recover minimal use by getting the basic PF VSI working.
6837 */
6838 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6839 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6840 /* find the one VEB connected to the MAC, and find orphans */
6841 for (v = 0; v < I40E_MAX_VEB; v++) {
6842 if (!pf->veb[v])
6843 continue;
6844
6845 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6846 pf->veb[v]->uplink_seid == 0) {
6847 ret = i40e_reconstitute_veb(pf->veb[v]);
6848
6849 if (!ret)
6850 continue;
6851
6852 /* If Main VEB failed, we're in deep doodoo,
6853 * so give up rebuilding the switch and set up
6854 * for minimal rebuild of PF VSI.
6855 * If orphan failed, we'll report the error
6856 * but try to keep going.
6857 */
6858 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6859 dev_info(&pf->pdev->dev,
6860 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6861 ret);
6862 pf->vsi[pf->lan_vsi]->uplink_seid
6863 = pf->mac_seid;
6864 break;
6865 } else if (pf->veb[v]->uplink_seid == 0) {
6866 dev_info(&pf->pdev->dev,
6867 "rebuild of orphan VEB failed: %d\n",
6868 ret);
6869 }
6870 }
6871 }
6872 }
6873
6874 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6875 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6876 /* no VEB, so rebuild only the Main VSI */
6877 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6878 if (ret) {
6879 dev_info(&pf->pdev->dev,
6880 "rebuild of Main VSI failed: %d\n", ret);
6881 goto end_core_reset;
6882 }
6883 }
6884
6885 /* Reconfigure hardware for allowing smaller MSS in the case
6886 * of TSO, so that we avoid the MDD being fired and causing
6887 * a reset in the case of small MSS+TSO.
6888 */
6889 #define I40E_REG_MSS 0x000E64DC
6890 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6891 #define I40E_64BYTE_MSS 0x400000
6892 val = rd32(hw, I40E_REG_MSS);
6893 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6894 val &= ~I40E_REG_MSS_MIN_MASK;
6895 val |= I40E_64BYTE_MSS;
6896 wr32(hw, I40E_REG_MSS, val);
6897 }
6898
6899 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6900 msleep(75);
6901 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6902 if (ret)
6903 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6904 i40e_stat_str(&pf->hw, ret),
6905 i40e_aq_str(&pf->hw,
6906 pf->hw.aq.asq_last_status));
6907 }
6908 /* reinit the misc interrupt */
6909 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6910 ret = i40e_setup_misc_vector(pf);
6911
6912 /* Add a filter to drop all Flow control frames from any VSI from being
6913 * transmitted. By doing so we stop a malicious VF from sending out
6914 * PAUSE or PFC frames and potentially controlling traffic for other
6915 * PF/VF VSIs.
6916 * The FW can still send Flow control frames if enabled.
6917 */
6918 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6919 pf->main_vsi_seid);
6920
6921 /* restart the VSIs that were rebuilt and running before the reset */
6922 i40e_pf_unquiesce_all_vsi(pf);
6923
6924 if (pf->num_alloc_vfs) {
6925 for (v = 0; v < pf->num_alloc_vfs; v++)
6926 i40e_reset_vf(&pf->vf[v], true);
6927 }
6928
6929 /* tell the firmware that we're starting */
6930 i40e_send_version(pf);
6931
6932 end_core_reset:
6933 clear_bit(__I40E_RESET_FAILED, &pf->state);
6934 clear_recovery:
6935 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6936 }
6937
6938 /**
6939 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6940 * @pf: board private structure
6941 *
6942 * Close up the VFs and other things in prep for a Core Reset,
6943 * then get ready to rebuild the world.
6944 **/
6945 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6946 {
6947 i40e_prep_for_reset(pf);
6948 i40e_reset_and_rebuild(pf, false);
6949 }
6950
6951 /**
6952 * i40e_handle_mdd_event
6953 * @pf: pointer to the PF structure
6954 *
6955 * Called from the MDD irq handler to identify possibly malicious vfs
6956 **/
6957 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6958 {
6959 struct i40e_hw *hw = &pf->hw;
6960 bool mdd_detected = false;
6961 bool pf_mdd_detected = false;
6962 struct i40e_vf *vf;
6963 u32 reg;
6964 int i;
6965
6966 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6967 return;
6968
6969 /* find what triggered the MDD event */
6970 reg = rd32(hw, I40E_GL_MDET_TX);
6971 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6972 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6973 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6974 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6975 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6976 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6977 I40E_GL_MDET_TX_EVENT_SHIFT;
6978 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6979 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6980 pf->hw.func_caps.base_queue;
6981 if (netif_msg_tx_err(pf))
6982 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6983 event, queue, pf_num, vf_num);
6984 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6985 mdd_detected = true;
6986 }
6987 reg = rd32(hw, I40E_GL_MDET_RX);
6988 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6989 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6990 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6991 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6992 I40E_GL_MDET_RX_EVENT_SHIFT;
6993 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6994 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6995 pf->hw.func_caps.base_queue;
6996 if (netif_msg_rx_err(pf))
6997 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6998 event, queue, func);
6999 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7000 mdd_detected = true;
7001 }
7002
7003 if (mdd_detected) {
7004 reg = rd32(hw, I40E_PF_MDET_TX);
7005 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7006 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7007 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7008 pf_mdd_detected = true;
7009 }
7010 reg = rd32(hw, I40E_PF_MDET_RX);
7011 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7012 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7013 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7014 pf_mdd_detected = true;
7015 }
7016 /* Queue belongs to the PF, initiate a reset */
7017 if (pf_mdd_detected) {
7018 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7019 i40e_service_event_schedule(pf);
7020 }
7021 }
7022
7023 /* see if one of the VFs needs its hand slapped */
7024 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7025 vf = &(pf->vf[i]);
7026 reg = rd32(hw, I40E_VP_MDET_TX(i));
7027 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7028 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7029 vf->num_mdd_events++;
7030 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7031 i);
7032 }
7033
7034 reg = rd32(hw, I40E_VP_MDET_RX(i));
7035 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7036 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7037 vf->num_mdd_events++;
7038 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7039 i);
7040 }
7041
7042 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7043 dev_info(&pf->pdev->dev,
7044 "Too many MDD events on VF %d, disabled\n", i);
7045 dev_info(&pf->pdev->dev,
7046 "Use PF Control I/F to re-enable the VF\n");
7047 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7048 }
7049 }
7050
7051 /* re-enable mdd interrupt cause */
7052 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7053 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7054 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7055 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7056 i40e_flush(hw);
7057 }
7058
7059 /**
7060 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7061 * @pf: board private structure
7062 **/
7063 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7064 {
7065 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7066 struct i40e_hw *hw = &pf->hw;
7067 i40e_status ret;
7068 __be16 port;
7069 int i;
7070
7071 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7072 return;
7073
7074 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7075
7076 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7077 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7078 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7079 port = pf->udp_ports[i].index;
7080 if (port)
7081 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7082 pf->udp_ports[i].type,
7083 NULL, NULL);
7084 else
7085 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7086
7087 if (ret) {
7088 dev_info(&pf->pdev->dev,
7089 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7090 port ? "add" : "delete",
7091 ntohs(port), i,
7092 i40e_stat_str(&pf->hw, ret),
7093 i40e_aq_str(&pf->hw,
7094 pf->hw.aq.asq_last_status));
7095 pf->udp_ports[i].index = 0;
7096 }
7097 }
7098 }
7099 #endif
7100 }
7101
7102 /**
7103 * i40e_service_task - Run the driver's async subtasks
7104 * @work: pointer to work_struct containing our data
7105 **/
7106 static void i40e_service_task(struct work_struct *work)
7107 {
7108 struct i40e_pf *pf = container_of(work,
7109 struct i40e_pf,
7110 service_task);
7111 unsigned long start_time = jiffies;
7112
7113 /* don't bother with service tasks if a reset is in progress */
7114 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7115 i40e_service_event_complete(pf);
7116 return;
7117 }
7118
7119 i40e_detect_recover_hung(pf);
7120 i40e_sync_filters_subtask(pf);
7121 i40e_reset_subtask(pf);
7122 i40e_handle_mdd_event(pf);
7123 i40e_vc_process_vflr_event(pf);
7124 i40e_watchdog_subtask(pf);
7125 i40e_fdir_reinit_subtask(pf);
7126 i40e_sync_filters_subtask(pf);
7127 i40e_sync_udp_filters_subtask(pf);
7128 i40e_clean_adminq_subtask(pf);
7129
7130 i40e_service_event_complete(pf);
7131
7132 /* If the tasks have taken longer than one timer cycle or there
7133 * is more work to be done, reschedule the service task now
7134 * rather than wait for the timer to tick again.
7135 */
7136 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7137 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7138 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7139 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7140 i40e_service_event_schedule(pf);
7141 }
7142
7143 /**
7144 * i40e_service_timer - timer callback
7145 * @data: pointer to PF struct
7146 **/
7147 static void i40e_service_timer(unsigned long data)
7148 {
7149 struct i40e_pf *pf = (struct i40e_pf *)data;
7150
7151 mod_timer(&pf->service_timer,
7152 round_jiffies(jiffies + pf->service_timer_period));
7153 i40e_service_event_schedule(pf);
7154 }
7155
7156 /**
7157 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7158 * @vsi: the VSI being configured
7159 **/
7160 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7161 {
7162 struct i40e_pf *pf = vsi->back;
7163
7164 switch (vsi->type) {
7165 case I40E_VSI_MAIN:
7166 vsi->alloc_queue_pairs = pf->num_lan_qps;
7167 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7168 I40E_REQ_DESCRIPTOR_MULTIPLE);
7169 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7170 vsi->num_q_vectors = pf->num_lan_msix;
7171 else
7172 vsi->num_q_vectors = 1;
7173
7174 break;
7175
7176 case I40E_VSI_FDIR:
7177 vsi->alloc_queue_pairs = 1;
7178 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7179 I40E_REQ_DESCRIPTOR_MULTIPLE);
7180 vsi->num_q_vectors = 1;
7181 break;
7182
7183 case I40E_VSI_VMDQ2:
7184 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7185 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7186 I40E_REQ_DESCRIPTOR_MULTIPLE);
7187 vsi->num_q_vectors = pf->num_vmdq_msix;
7188 break;
7189
7190 case I40E_VSI_SRIOV:
7191 vsi->alloc_queue_pairs = pf->num_vf_qps;
7192 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7193 I40E_REQ_DESCRIPTOR_MULTIPLE);
7194 break;
7195
7196 #ifdef I40E_FCOE
7197 case I40E_VSI_FCOE:
7198 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7199 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7200 I40E_REQ_DESCRIPTOR_MULTIPLE);
7201 vsi->num_q_vectors = pf->num_fcoe_msix;
7202 break;
7203
7204 #endif /* I40E_FCOE */
7205 default:
7206 WARN_ON(1);
7207 return -ENODATA;
7208 }
7209
7210 return 0;
7211 }
7212
7213 /**
7214 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7215 * @type: VSI pointer
7216 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7217 *
7218 * On error: returns error code (negative)
7219 * On success: returns 0
7220 **/
7221 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7222 {
7223 int size;
7224 int ret = 0;
7225
7226 /* allocate memory for both Tx and Rx ring pointers */
7227 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7228 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7229 if (!vsi->tx_rings)
7230 return -ENOMEM;
7231 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7232
7233 if (alloc_qvectors) {
7234 /* allocate memory for q_vector pointers */
7235 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7236 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7237 if (!vsi->q_vectors) {
7238 ret = -ENOMEM;
7239 goto err_vectors;
7240 }
7241 }
7242 return ret;
7243
7244 err_vectors:
7245 kfree(vsi->tx_rings);
7246 return ret;
7247 }
7248
7249 /**
7250 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7251 * @pf: board private structure
7252 * @type: type of VSI
7253 *
7254 * On error: returns error code (negative)
7255 * On success: returns vsi index in PF (positive)
7256 **/
7257 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7258 {
7259 int ret = -ENODEV;
7260 struct i40e_vsi *vsi;
7261 int vsi_idx;
7262 int i;
7263
7264 /* Need to protect the allocation of the VSIs at the PF level */
7265 mutex_lock(&pf->switch_mutex);
7266
7267 /* VSI list may be fragmented if VSI creation/destruction has
7268 * been happening. We can afford to do a quick scan to look
7269 * for any free VSIs in the list.
7270 *
7271 * find next empty vsi slot, looping back around if necessary
7272 */
7273 i = pf->next_vsi;
7274 while (i < pf->num_alloc_vsi && pf->vsi[i])
7275 i++;
7276 if (i >= pf->num_alloc_vsi) {
7277 i = 0;
7278 while (i < pf->next_vsi && pf->vsi[i])
7279 i++;
7280 }
7281
7282 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7283 vsi_idx = i; /* Found one! */
7284 } else {
7285 ret = -ENODEV;
7286 goto unlock_pf; /* out of VSI slots! */
7287 }
7288 pf->next_vsi = ++i;
7289
7290 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7291 if (!vsi) {
7292 ret = -ENOMEM;
7293 goto unlock_pf;
7294 }
7295 vsi->type = type;
7296 vsi->back = pf;
7297 set_bit(__I40E_DOWN, &vsi->state);
7298 vsi->flags = 0;
7299 vsi->idx = vsi_idx;
7300 vsi->rx_itr_setting = pf->rx_itr_default;
7301 vsi->tx_itr_setting = pf->tx_itr_default;
7302 vsi->int_rate_limit = 0;
7303 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7304 pf->rss_table_size : 64;
7305 vsi->netdev_registered = false;
7306 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7307 INIT_LIST_HEAD(&vsi->mac_filter_list);
7308 vsi->irqs_ready = false;
7309
7310 ret = i40e_set_num_rings_in_vsi(vsi);
7311 if (ret)
7312 goto err_rings;
7313
7314 ret = i40e_vsi_alloc_arrays(vsi, true);
7315 if (ret)
7316 goto err_rings;
7317
7318 /* Setup default MSIX irq handler for VSI */
7319 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7320
7321 /* Initialize VSI lock */
7322 spin_lock_init(&vsi->mac_filter_list_lock);
7323 pf->vsi[vsi_idx] = vsi;
7324 ret = vsi_idx;
7325 goto unlock_pf;
7326
7327 err_rings:
7328 pf->next_vsi = i - 1;
7329 kfree(vsi);
7330 unlock_pf:
7331 mutex_unlock(&pf->switch_mutex);
7332 return ret;
7333 }
7334
7335 /**
7336 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7337 * @type: VSI pointer
7338 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7339 *
7340 * On error: returns error code (negative)
7341 * On success: returns 0
7342 **/
7343 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7344 {
7345 /* free the ring and vector containers */
7346 if (free_qvectors) {
7347 kfree(vsi->q_vectors);
7348 vsi->q_vectors = NULL;
7349 }
7350 kfree(vsi->tx_rings);
7351 vsi->tx_rings = NULL;
7352 vsi->rx_rings = NULL;
7353 }
7354
7355 /**
7356 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7357 * and lookup table
7358 * @vsi: Pointer to VSI structure
7359 */
7360 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7361 {
7362 if (!vsi)
7363 return;
7364
7365 kfree(vsi->rss_hkey_user);
7366 vsi->rss_hkey_user = NULL;
7367
7368 kfree(vsi->rss_lut_user);
7369 vsi->rss_lut_user = NULL;
7370 }
7371
7372 /**
7373 * i40e_vsi_clear - Deallocate the VSI provided
7374 * @vsi: the VSI being un-configured
7375 **/
7376 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7377 {
7378 struct i40e_pf *pf;
7379
7380 if (!vsi)
7381 return 0;
7382
7383 if (!vsi->back)
7384 goto free_vsi;
7385 pf = vsi->back;
7386
7387 mutex_lock(&pf->switch_mutex);
7388 if (!pf->vsi[vsi->idx]) {
7389 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7390 vsi->idx, vsi->idx, vsi, vsi->type);
7391 goto unlock_vsi;
7392 }
7393
7394 if (pf->vsi[vsi->idx] != vsi) {
7395 dev_err(&pf->pdev->dev,
7396 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7397 pf->vsi[vsi->idx]->idx,
7398 pf->vsi[vsi->idx],
7399 pf->vsi[vsi->idx]->type,
7400 vsi->idx, vsi, vsi->type);
7401 goto unlock_vsi;
7402 }
7403
7404 /* updates the PF for this cleared vsi */
7405 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7406 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7407
7408 i40e_vsi_free_arrays(vsi, true);
7409 i40e_clear_rss_config_user(vsi);
7410
7411 pf->vsi[vsi->idx] = NULL;
7412 if (vsi->idx < pf->next_vsi)
7413 pf->next_vsi = vsi->idx;
7414
7415 unlock_vsi:
7416 mutex_unlock(&pf->switch_mutex);
7417 free_vsi:
7418 kfree(vsi);
7419
7420 return 0;
7421 }
7422
7423 /**
7424 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7425 * @vsi: the VSI being cleaned
7426 **/
7427 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7428 {
7429 int i;
7430
7431 if (vsi->tx_rings && vsi->tx_rings[0]) {
7432 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7433 kfree_rcu(vsi->tx_rings[i], rcu);
7434 vsi->tx_rings[i] = NULL;
7435 vsi->rx_rings[i] = NULL;
7436 }
7437 }
7438 }
7439
7440 /**
7441 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7442 * @vsi: the VSI being configured
7443 **/
7444 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7445 {
7446 struct i40e_ring *tx_ring, *rx_ring;
7447 struct i40e_pf *pf = vsi->back;
7448 int i;
7449
7450 /* Set basic values in the rings to be used later during open() */
7451 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7452 /* allocate space for both Tx and Rx in one shot */
7453 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7454 if (!tx_ring)
7455 goto err_out;
7456
7457 tx_ring->queue_index = i;
7458 tx_ring->reg_idx = vsi->base_queue + i;
7459 tx_ring->ring_active = false;
7460 tx_ring->vsi = vsi;
7461 tx_ring->netdev = vsi->netdev;
7462 tx_ring->dev = &pf->pdev->dev;
7463 tx_ring->count = vsi->num_desc;
7464 tx_ring->size = 0;
7465 tx_ring->dcb_tc = 0;
7466 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7467 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7468 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7469 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7470 vsi->tx_rings[i] = tx_ring;
7471
7472 rx_ring = &tx_ring[1];
7473 rx_ring->queue_index = i;
7474 rx_ring->reg_idx = vsi->base_queue + i;
7475 rx_ring->ring_active = false;
7476 rx_ring->vsi = vsi;
7477 rx_ring->netdev = vsi->netdev;
7478 rx_ring->dev = &pf->pdev->dev;
7479 rx_ring->count = vsi->num_desc;
7480 rx_ring->size = 0;
7481 rx_ring->dcb_tc = 0;
7482 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7483 set_ring_16byte_desc_enabled(rx_ring);
7484 else
7485 clear_ring_16byte_desc_enabled(rx_ring);
7486 vsi->rx_rings[i] = rx_ring;
7487 }
7488
7489 return 0;
7490
7491 err_out:
7492 i40e_vsi_clear_rings(vsi);
7493 return -ENOMEM;
7494 }
7495
7496 /**
7497 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7498 * @pf: board private structure
7499 * @vectors: the number of MSI-X vectors to request
7500 *
7501 * Returns the number of vectors reserved, or error
7502 **/
7503 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7504 {
7505 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7506 I40E_MIN_MSIX, vectors);
7507 if (vectors < 0) {
7508 dev_info(&pf->pdev->dev,
7509 "MSI-X vector reservation failed: %d\n", vectors);
7510 vectors = 0;
7511 }
7512
7513 return vectors;
7514 }
7515
7516 /**
7517 * i40e_init_msix - Setup the MSIX capability
7518 * @pf: board private structure
7519 *
7520 * Work with the OS to set up the MSIX vectors needed.
7521 *
7522 * Returns the number of vectors reserved or negative on failure
7523 **/
7524 static int i40e_init_msix(struct i40e_pf *pf)
7525 {
7526 struct i40e_hw *hw = &pf->hw;
7527 int vectors_left;
7528 int v_budget, i;
7529 int v_actual;
7530
7531 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7532 return -ENODEV;
7533
7534 /* The number of vectors we'll request will be comprised of:
7535 * - Add 1 for "other" cause for Admin Queue events, etc.
7536 * - The number of LAN queue pairs
7537 * - Queues being used for RSS.
7538 * We don't need as many as max_rss_size vectors.
7539 * use rss_size instead in the calculation since that
7540 * is governed by number of cpus in the system.
7541 * - assumes symmetric Tx/Rx pairing
7542 * - The number of VMDq pairs
7543 #ifdef I40E_FCOE
7544 * - The number of FCOE qps.
7545 #endif
7546 * Once we count this up, try the request.
7547 *
7548 * If we can't get what we want, we'll simplify to nearly nothing
7549 * and try again. If that still fails, we punt.
7550 */
7551 vectors_left = hw->func_caps.num_msix_vectors;
7552 v_budget = 0;
7553
7554 /* reserve one vector for miscellaneous handler */
7555 if (vectors_left) {
7556 v_budget++;
7557 vectors_left--;
7558 }
7559
7560 /* reserve vectors for the main PF traffic queues */
7561 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7562 vectors_left -= pf->num_lan_msix;
7563 v_budget += pf->num_lan_msix;
7564
7565 /* reserve one vector for sideband flow director */
7566 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7567 if (vectors_left) {
7568 v_budget++;
7569 vectors_left--;
7570 } else {
7571 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7572 }
7573 }
7574
7575 #ifdef I40E_FCOE
7576 /* can we reserve enough for FCoE? */
7577 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7578 if (!vectors_left)
7579 pf->num_fcoe_msix = 0;
7580 else if (vectors_left >= pf->num_fcoe_qps)
7581 pf->num_fcoe_msix = pf->num_fcoe_qps;
7582 else
7583 pf->num_fcoe_msix = 1;
7584 v_budget += pf->num_fcoe_msix;
7585 vectors_left -= pf->num_fcoe_msix;
7586 }
7587
7588 #endif
7589 /* any vectors left over go for VMDq support */
7590 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7591 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7592 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7593
7594 /* if we're short on vectors for what's desired, we limit
7595 * the queues per vmdq. If this is still more than are
7596 * available, the user will need to change the number of
7597 * queues/vectors used by the PF later with the ethtool
7598 * channels command
7599 */
7600 if (vmdq_vecs < vmdq_vecs_wanted)
7601 pf->num_vmdq_qps = 1;
7602 pf->num_vmdq_msix = pf->num_vmdq_qps;
7603
7604 v_budget += vmdq_vecs;
7605 vectors_left -= vmdq_vecs;
7606 }
7607
7608 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7609 GFP_KERNEL);
7610 if (!pf->msix_entries)
7611 return -ENOMEM;
7612
7613 for (i = 0; i < v_budget; i++)
7614 pf->msix_entries[i].entry = i;
7615 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7616
7617 if (v_actual != v_budget) {
7618 /* If we have limited resources, we will start with no vectors
7619 * for the special features and then allocate vectors to some
7620 * of these features based on the policy and at the end disable
7621 * the features that did not get any vectors.
7622 */
7623 #ifdef I40E_FCOE
7624 pf->num_fcoe_qps = 0;
7625 pf->num_fcoe_msix = 0;
7626 #endif
7627 pf->num_vmdq_msix = 0;
7628 }
7629
7630 if (v_actual < I40E_MIN_MSIX) {
7631 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7632 kfree(pf->msix_entries);
7633 pf->msix_entries = NULL;
7634 return -ENODEV;
7635
7636 } else if (v_actual == I40E_MIN_MSIX) {
7637 /* Adjust for minimal MSIX use */
7638 pf->num_vmdq_vsis = 0;
7639 pf->num_vmdq_qps = 0;
7640 pf->num_lan_qps = 1;
7641 pf->num_lan_msix = 1;
7642
7643 } else if (v_actual != v_budget) {
7644 int vec;
7645
7646 /* reserve the misc vector */
7647 vec = v_actual - 1;
7648
7649 /* Scale vector usage down */
7650 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7651 pf->num_vmdq_vsis = 1;
7652 pf->num_vmdq_qps = 1;
7653 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7654
7655 /* partition out the remaining vectors */
7656 switch (vec) {
7657 case 2:
7658 pf->num_lan_msix = 1;
7659 break;
7660 case 3:
7661 #ifdef I40E_FCOE
7662 /* give one vector to FCoE */
7663 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7664 pf->num_lan_msix = 1;
7665 pf->num_fcoe_msix = 1;
7666 }
7667 #else
7668 pf->num_lan_msix = 2;
7669 #endif
7670 break;
7671 default:
7672 #ifdef I40E_FCOE
7673 /* give one vector to FCoE */
7674 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7675 pf->num_fcoe_msix = 1;
7676 vec--;
7677 }
7678 #endif
7679 /* give the rest to the PF */
7680 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7681 break;
7682 }
7683 }
7684
7685 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7686 (pf->num_vmdq_msix == 0)) {
7687 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7688 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7689 }
7690 #ifdef I40E_FCOE
7691
7692 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7693 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7694 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7695 }
7696 #endif
7697 return v_actual;
7698 }
7699
7700 /**
7701 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7702 * @vsi: the VSI being configured
7703 * @v_idx: index of the vector in the vsi struct
7704 *
7705 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7706 **/
7707 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7708 {
7709 struct i40e_q_vector *q_vector;
7710
7711 /* allocate q_vector */
7712 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7713 if (!q_vector)
7714 return -ENOMEM;
7715
7716 q_vector->vsi = vsi;
7717 q_vector->v_idx = v_idx;
7718 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7719 if (vsi->netdev)
7720 netif_napi_add(vsi->netdev, &q_vector->napi,
7721 i40e_napi_poll, NAPI_POLL_WEIGHT);
7722
7723 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7724 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7725
7726 /* tie q_vector and vsi together */
7727 vsi->q_vectors[v_idx] = q_vector;
7728
7729 return 0;
7730 }
7731
7732 /**
7733 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7734 * @vsi: the VSI being configured
7735 *
7736 * We allocate one q_vector per queue interrupt. If allocation fails we
7737 * return -ENOMEM.
7738 **/
7739 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7740 {
7741 struct i40e_pf *pf = vsi->back;
7742 int v_idx, num_q_vectors;
7743 int err;
7744
7745 /* if not MSIX, give the one vector only to the LAN VSI */
7746 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7747 num_q_vectors = vsi->num_q_vectors;
7748 else if (vsi == pf->vsi[pf->lan_vsi])
7749 num_q_vectors = 1;
7750 else
7751 return -EINVAL;
7752
7753 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7754 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7755 if (err)
7756 goto err_out;
7757 }
7758
7759 return 0;
7760
7761 err_out:
7762 while (v_idx--)
7763 i40e_free_q_vector(vsi, v_idx);
7764
7765 return err;
7766 }
7767
7768 /**
7769 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7770 * @pf: board private structure to initialize
7771 **/
7772 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7773 {
7774 int vectors = 0;
7775 ssize_t size;
7776
7777 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7778 vectors = i40e_init_msix(pf);
7779 if (vectors < 0) {
7780 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7781 #ifdef I40E_FCOE
7782 I40E_FLAG_FCOE_ENABLED |
7783 #endif
7784 I40E_FLAG_RSS_ENABLED |
7785 I40E_FLAG_DCB_CAPABLE |
7786 I40E_FLAG_SRIOV_ENABLED |
7787 I40E_FLAG_FD_SB_ENABLED |
7788 I40E_FLAG_FD_ATR_ENABLED |
7789 I40E_FLAG_VMDQ_ENABLED);
7790
7791 /* rework the queue expectations without MSIX */
7792 i40e_determine_queue_usage(pf);
7793 }
7794 }
7795
7796 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7797 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7798 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7799 vectors = pci_enable_msi(pf->pdev);
7800 if (vectors < 0) {
7801 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7802 vectors);
7803 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7804 }
7805 vectors = 1; /* one MSI or Legacy vector */
7806 }
7807
7808 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7809 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7810
7811 /* set up vector assignment tracking */
7812 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7813 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7814 if (!pf->irq_pile) {
7815 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7816 return -ENOMEM;
7817 }
7818 pf->irq_pile->num_entries = vectors;
7819 pf->irq_pile->search_hint = 0;
7820
7821 /* track first vector for misc interrupts, ignore return */
7822 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7823
7824 return 0;
7825 }
7826
7827 /**
7828 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7829 * @pf: board private structure
7830 *
7831 * This sets up the handler for MSIX 0, which is used to manage the
7832 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7833 * when in MSI or Legacy interrupt mode.
7834 **/
7835 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7836 {
7837 struct i40e_hw *hw = &pf->hw;
7838 int err = 0;
7839
7840 /* Only request the irq if this is the first time through, and
7841 * not when we're rebuilding after a Reset
7842 */
7843 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7844 err = request_irq(pf->msix_entries[0].vector,
7845 i40e_intr, 0, pf->int_name, pf);
7846 if (err) {
7847 dev_info(&pf->pdev->dev,
7848 "request_irq for %s failed: %d\n",
7849 pf->int_name, err);
7850 return -EFAULT;
7851 }
7852 }
7853
7854 i40e_enable_misc_int_causes(pf);
7855
7856 /* associate no queues to the misc vector */
7857 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7858 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7859
7860 i40e_flush(hw);
7861
7862 i40e_irq_dynamic_enable_icr0(pf, true);
7863
7864 return err;
7865 }
7866
7867 /**
7868 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7869 * @vsi: vsi structure
7870 * @seed: RSS hash seed
7871 **/
7872 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7873 u8 *lut, u16 lut_size)
7874 {
7875 struct i40e_aqc_get_set_rss_key_data rss_key;
7876 struct i40e_pf *pf = vsi->back;
7877 struct i40e_hw *hw = &pf->hw;
7878 bool pf_lut = false;
7879 u8 *rss_lut;
7880 int ret, i;
7881
7882 memset(&rss_key, 0, sizeof(rss_key));
7883 memcpy(&rss_key, seed, sizeof(rss_key));
7884
7885 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7886 if (!rss_lut)
7887 return -ENOMEM;
7888
7889 /* Populate the LUT with max no. of queues in round robin fashion */
7890 for (i = 0; i < vsi->rss_table_size; i++)
7891 rss_lut[i] = i % vsi->rss_size;
7892
7893 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7894 if (ret) {
7895 dev_info(&pf->pdev->dev,
7896 "Cannot set RSS key, err %s aq_err %s\n",
7897 i40e_stat_str(&pf->hw, ret),
7898 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7899 goto config_rss_aq_out;
7900 }
7901
7902 if (vsi->type == I40E_VSI_MAIN)
7903 pf_lut = true;
7904
7905 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7906 vsi->rss_table_size);
7907 if (ret)
7908 dev_info(&pf->pdev->dev,
7909 "Cannot set RSS lut, err %s aq_err %s\n",
7910 i40e_stat_str(&pf->hw, ret),
7911 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7912
7913 config_rss_aq_out:
7914 kfree(rss_lut);
7915 return ret;
7916 }
7917
7918 /**
7919 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7920 * @vsi: VSI structure
7921 **/
7922 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7923 {
7924 u8 seed[I40E_HKEY_ARRAY_SIZE];
7925 struct i40e_pf *pf = vsi->back;
7926 u8 *lut;
7927 int ret;
7928
7929 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7930 return 0;
7931
7932 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7933 if (!lut)
7934 return -ENOMEM;
7935
7936 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7937 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7938 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7939 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7940 kfree(lut);
7941
7942 return ret;
7943 }
7944
7945 /**
7946 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
7947 * @vsi: Pointer to vsi structure
7948 * @seed: Buffter to store the hash keys
7949 * @lut: Buffer to store the lookup table entries
7950 * @lut_size: Size of buffer to store the lookup table entries
7951 *
7952 * Return 0 on success, negative on failure
7953 */
7954 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7955 u8 *lut, u16 lut_size)
7956 {
7957 struct i40e_pf *pf = vsi->back;
7958 struct i40e_hw *hw = &pf->hw;
7959 int ret = 0;
7960
7961 if (seed) {
7962 ret = i40e_aq_get_rss_key(hw, vsi->id,
7963 (struct i40e_aqc_get_set_rss_key_data *)seed);
7964 if (ret) {
7965 dev_info(&pf->pdev->dev,
7966 "Cannot get RSS key, err %s aq_err %s\n",
7967 i40e_stat_str(&pf->hw, ret),
7968 i40e_aq_str(&pf->hw,
7969 pf->hw.aq.asq_last_status));
7970 return ret;
7971 }
7972 }
7973
7974 if (lut) {
7975 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
7976
7977 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
7978 if (ret) {
7979 dev_info(&pf->pdev->dev,
7980 "Cannot get RSS lut, err %s aq_err %s\n",
7981 i40e_stat_str(&pf->hw, ret),
7982 i40e_aq_str(&pf->hw,
7983 pf->hw.aq.asq_last_status));
7984 return ret;
7985 }
7986 }
7987
7988 return ret;
7989 }
7990
7991 /**
7992 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7993 * @vsi: Pointer to vsi structure
7994 * @seed: RSS hash seed
7995 * @lut: Lookup table
7996 * @lut_size: Lookup table size
7997 *
7998 * Returns 0 on success, negative on failure
7999 **/
8000 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8001 const u8 *lut, u16 lut_size)
8002 {
8003 struct i40e_pf *pf = vsi->back;
8004 struct i40e_hw *hw = &pf->hw;
8005 u8 i;
8006
8007 /* Fill out hash function seed */
8008 if (seed) {
8009 u32 *seed_dw = (u32 *)seed;
8010
8011 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8012 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8013 }
8014
8015 if (lut) {
8016 u32 *lut_dw = (u32 *)lut;
8017
8018 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8019 return -EINVAL;
8020
8021 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8022 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8023 }
8024 i40e_flush(hw);
8025
8026 return 0;
8027 }
8028
8029 /**
8030 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8031 * @vsi: Pointer to VSI structure
8032 * @seed: Buffer to store the keys
8033 * @lut: Buffer to store the lookup table entries
8034 * @lut_size: Size of buffer to store the lookup table entries
8035 *
8036 * Returns 0 on success, negative on failure
8037 */
8038 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8039 u8 *lut, u16 lut_size)
8040 {
8041 struct i40e_pf *pf = vsi->back;
8042 struct i40e_hw *hw = &pf->hw;
8043 u16 i;
8044
8045 if (seed) {
8046 u32 *seed_dw = (u32 *)seed;
8047
8048 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8049 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8050 }
8051 if (lut) {
8052 u32 *lut_dw = (u32 *)lut;
8053
8054 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8055 return -EINVAL;
8056 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8057 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8058 }
8059
8060 return 0;
8061 }
8062
8063 /**
8064 * i40e_config_rss - Configure RSS keys and lut
8065 * @vsi: Pointer to VSI structure
8066 * @seed: RSS hash seed
8067 * @lut: Lookup table
8068 * @lut_size: Lookup table size
8069 *
8070 * Returns 0 on success, negative on failure
8071 */
8072 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8073 {
8074 struct i40e_pf *pf = vsi->back;
8075
8076 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8077 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8078 else
8079 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8080 }
8081
8082 /**
8083 * i40e_get_rss - Get RSS keys and lut
8084 * @vsi: Pointer to VSI structure
8085 * @seed: Buffer to store the keys
8086 * @lut: Buffer to store the lookup table entries
8087 * lut_size: Size of buffer to store the lookup table entries
8088 *
8089 * Returns 0 on success, negative on failure
8090 */
8091 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8092 {
8093 struct i40e_pf *pf = vsi->back;
8094
8095 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8096 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8097 else
8098 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8099 }
8100
8101 /**
8102 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8103 * @pf: Pointer to board private structure
8104 * @lut: Lookup table
8105 * @rss_table_size: Lookup table size
8106 * @rss_size: Range of queue number for hashing
8107 */
8108 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8109 u16 rss_table_size, u16 rss_size)
8110 {
8111 u16 i;
8112
8113 for (i = 0; i < rss_table_size; i++)
8114 lut[i] = i % rss_size;
8115 }
8116
8117 /**
8118 * i40e_pf_config_rss - Prepare for RSS if used
8119 * @pf: board private structure
8120 **/
8121 static int i40e_pf_config_rss(struct i40e_pf *pf)
8122 {
8123 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8124 u8 seed[I40E_HKEY_ARRAY_SIZE];
8125 u8 *lut;
8126 struct i40e_hw *hw = &pf->hw;
8127 u32 reg_val;
8128 u64 hena;
8129 int ret;
8130
8131 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8132 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8133 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8134 hena |= i40e_pf_get_default_rss_hena(pf);
8135
8136 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8137 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8138
8139 /* Determine the RSS table size based on the hardware capabilities */
8140 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8141 reg_val = (pf->rss_table_size == 512) ?
8142 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8143 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8144 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8145
8146 /* Determine the RSS size of the VSI */
8147 if (!vsi->rss_size)
8148 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8149 vsi->num_queue_pairs);
8150
8151 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8152 if (!lut)
8153 return -ENOMEM;
8154
8155 /* Use user configured lut if there is one, otherwise use default */
8156 if (vsi->rss_lut_user)
8157 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8158 else
8159 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8160
8161 /* Use user configured hash key if there is one, otherwise
8162 * use default.
8163 */
8164 if (vsi->rss_hkey_user)
8165 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8166 else
8167 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8168 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8169 kfree(lut);
8170
8171 return ret;
8172 }
8173
8174 /**
8175 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8176 * @pf: board private structure
8177 * @queue_count: the requested queue count for rss.
8178 *
8179 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8180 * count which may be different from the requested queue count.
8181 **/
8182 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8183 {
8184 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8185 int new_rss_size;
8186
8187 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8188 return 0;
8189
8190 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8191
8192 if (queue_count != vsi->num_queue_pairs) {
8193 vsi->req_queue_pairs = queue_count;
8194 i40e_prep_for_reset(pf);
8195
8196 pf->alloc_rss_size = new_rss_size;
8197
8198 i40e_reset_and_rebuild(pf, true);
8199
8200 /* Discard the user configured hash keys and lut, if less
8201 * queues are enabled.
8202 */
8203 if (queue_count < vsi->rss_size) {
8204 i40e_clear_rss_config_user(vsi);
8205 dev_dbg(&pf->pdev->dev,
8206 "discard user configured hash keys and lut\n");
8207 }
8208
8209 /* Reset vsi->rss_size, as number of enabled queues changed */
8210 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8211 vsi->num_queue_pairs);
8212
8213 i40e_pf_config_rss(pf);
8214 }
8215 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8216 pf->alloc_rss_size, pf->rss_size_max);
8217 return pf->alloc_rss_size;
8218 }
8219
8220 /**
8221 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8222 * @pf: board private structure
8223 **/
8224 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8225 {
8226 i40e_status status;
8227 bool min_valid, max_valid;
8228 u32 max_bw, min_bw;
8229
8230 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8231 &min_valid, &max_valid);
8232
8233 if (!status) {
8234 if (min_valid)
8235 pf->npar_min_bw = min_bw;
8236 if (max_valid)
8237 pf->npar_max_bw = max_bw;
8238 }
8239
8240 return status;
8241 }
8242
8243 /**
8244 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8245 * @pf: board private structure
8246 **/
8247 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8248 {
8249 struct i40e_aqc_configure_partition_bw_data bw_data;
8250 i40e_status status;
8251
8252 /* Set the valid bit for this PF */
8253 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8254 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8255 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8256
8257 /* Set the new bandwidths */
8258 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8259
8260 return status;
8261 }
8262
8263 /**
8264 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8265 * @pf: board private structure
8266 **/
8267 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8268 {
8269 /* Commit temporary BW setting to permanent NVM image */
8270 enum i40e_admin_queue_err last_aq_status;
8271 i40e_status ret;
8272 u16 nvm_word;
8273
8274 if (pf->hw.partition_id != 1) {
8275 dev_info(&pf->pdev->dev,
8276 "Commit BW only works on partition 1! This is partition %d",
8277 pf->hw.partition_id);
8278 ret = I40E_NOT_SUPPORTED;
8279 goto bw_commit_out;
8280 }
8281
8282 /* Acquire NVM for read access */
8283 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8284 last_aq_status = pf->hw.aq.asq_last_status;
8285 if (ret) {
8286 dev_info(&pf->pdev->dev,
8287 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8288 i40e_stat_str(&pf->hw, ret),
8289 i40e_aq_str(&pf->hw, last_aq_status));
8290 goto bw_commit_out;
8291 }
8292
8293 /* Read word 0x10 of NVM - SW compatibility word 1 */
8294 ret = i40e_aq_read_nvm(&pf->hw,
8295 I40E_SR_NVM_CONTROL_WORD,
8296 0x10, sizeof(nvm_word), &nvm_word,
8297 false, NULL);
8298 /* Save off last admin queue command status before releasing
8299 * the NVM
8300 */
8301 last_aq_status = pf->hw.aq.asq_last_status;
8302 i40e_release_nvm(&pf->hw);
8303 if (ret) {
8304 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8305 i40e_stat_str(&pf->hw, ret),
8306 i40e_aq_str(&pf->hw, last_aq_status));
8307 goto bw_commit_out;
8308 }
8309
8310 /* Wait a bit for NVM release to complete */
8311 msleep(50);
8312
8313 /* Acquire NVM for write access */
8314 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8315 last_aq_status = pf->hw.aq.asq_last_status;
8316 if (ret) {
8317 dev_info(&pf->pdev->dev,
8318 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8319 i40e_stat_str(&pf->hw, ret),
8320 i40e_aq_str(&pf->hw, last_aq_status));
8321 goto bw_commit_out;
8322 }
8323 /* Write it back out unchanged to initiate update NVM,
8324 * which will force a write of the shadow (alt) RAM to
8325 * the NVM - thus storing the bandwidth values permanently.
8326 */
8327 ret = i40e_aq_update_nvm(&pf->hw,
8328 I40E_SR_NVM_CONTROL_WORD,
8329 0x10, sizeof(nvm_word),
8330 &nvm_word, true, NULL);
8331 /* Save off last admin queue command status before releasing
8332 * the NVM
8333 */
8334 last_aq_status = pf->hw.aq.asq_last_status;
8335 i40e_release_nvm(&pf->hw);
8336 if (ret)
8337 dev_info(&pf->pdev->dev,
8338 "BW settings NOT SAVED, err %s aq_err %s\n",
8339 i40e_stat_str(&pf->hw, ret),
8340 i40e_aq_str(&pf->hw, last_aq_status));
8341 bw_commit_out:
8342
8343 return ret;
8344 }
8345
8346 /**
8347 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8348 * @pf: board private structure to initialize
8349 *
8350 * i40e_sw_init initializes the Adapter private data structure.
8351 * Fields are initialized based on PCI device information and
8352 * OS network device settings (MTU size).
8353 **/
8354 static int i40e_sw_init(struct i40e_pf *pf)
8355 {
8356 int err = 0;
8357 int size;
8358
8359 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8360 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8361 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8362 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8363 if (I40E_DEBUG_USER & debug)
8364 pf->hw.debug_mask = debug;
8365 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8366 I40E_DEFAULT_MSG_ENABLE);
8367 }
8368
8369 /* Set default capability flags */
8370 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8371 I40E_FLAG_MSI_ENABLED |
8372 I40E_FLAG_LINK_POLLING_ENABLED |
8373 I40E_FLAG_MSIX_ENABLED;
8374
8375 if (iommu_present(&pci_bus_type))
8376 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8377 else
8378 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8379
8380 /* Set default ITR */
8381 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8382 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8383
8384 /* Depending on PF configurations, it is possible that the RSS
8385 * maximum might end up larger than the available queues
8386 */
8387 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8388 pf->alloc_rss_size = 1;
8389 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8390 pf->rss_size_max = min_t(int, pf->rss_size_max,
8391 pf->hw.func_caps.num_tx_qp);
8392 if (pf->hw.func_caps.rss) {
8393 pf->flags |= I40E_FLAG_RSS_ENABLED;
8394 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8395 num_online_cpus());
8396 }
8397
8398 /* MFP mode enabled */
8399 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8400 pf->flags |= I40E_FLAG_MFP_ENABLED;
8401 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8402 if (i40e_get_npar_bw_setting(pf))
8403 dev_warn(&pf->pdev->dev,
8404 "Could not get NPAR bw settings\n");
8405 else
8406 dev_info(&pf->pdev->dev,
8407 "Min BW = %8.8x, Max BW = %8.8x\n",
8408 pf->npar_min_bw, pf->npar_max_bw);
8409 }
8410
8411 /* FW/NVM is not yet fixed in this regard */
8412 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8413 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8414 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8415 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8416 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8417 pf->hw.num_partitions > 1)
8418 dev_info(&pf->pdev->dev,
8419 "Flow Director Sideband mode Disabled in MFP mode\n");
8420 else
8421 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8422 pf->fdir_pf_filter_count =
8423 pf->hw.func_caps.fd_filters_guaranteed;
8424 pf->hw.fdir_shared_filter_count =
8425 pf->hw.func_caps.fd_filters_best_effort;
8426 }
8427
8428 if (i40e_is_mac_710(&pf->hw) &&
8429 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8430 (pf->hw.aq.fw_maj_ver < 4))) {
8431 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8432 /* No DCB support for FW < v4.33 */
8433 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8434 }
8435
8436 /* Disable FW LLDP if FW < v4.3 */
8437 if (i40e_is_mac_710(&pf->hw) &&
8438 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8439 (pf->hw.aq.fw_maj_ver < 4)))
8440 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8441
8442 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8443 if (i40e_is_mac_710(&pf->hw) &&
8444 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8445 (pf->hw.aq.fw_maj_ver >= 5)))
8446 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8447
8448 if (pf->hw.func_caps.vmdq) {
8449 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8450 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8451 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8452 }
8453
8454 #ifdef I40E_FCOE
8455 i40e_init_pf_fcoe(pf);
8456
8457 #endif /* I40E_FCOE */
8458 #ifdef CONFIG_PCI_IOV
8459 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8460 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8461 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8462 pf->num_req_vfs = min_t(int,
8463 pf->hw.func_caps.num_vfs,
8464 I40E_MAX_VF_COUNT);
8465 }
8466 #endif /* CONFIG_PCI_IOV */
8467 if (pf->hw.mac.type == I40E_MAC_X722) {
8468 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8469 I40E_FLAG_128_QP_RSS_CAPABLE |
8470 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8471 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8472 I40E_FLAG_WB_ON_ITR_CAPABLE |
8473 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8474 I40E_FLAG_100M_SGMII_CAPABLE |
8475 I40E_FLAG_USE_SET_LLDP_MIB |
8476 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8477 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8478 ((pf->hw.aq.api_maj_ver == 1) &&
8479 (pf->hw.aq.api_min_ver > 4))) {
8480 /* Supported in FW API version higher than 1.4 */
8481 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8482 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8483 } else {
8484 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8485 }
8486
8487 pf->eeprom_version = 0xDEAD;
8488 pf->lan_veb = I40E_NO_VEB;
8489 pf->lan_vsi = I40E_NO_VSI;
8490
8491 /* By default FW has this off for performance reasons */
8492 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8493
8494 /* set up queue assignment tracking */
8495 size = sizeof(struct i40e_lump_tracking)
8496 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8497 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8498 if (!pf->qp_pile) {
8499 err = -ENOMEM;
8500 goto sw_init_done;
8501 }
8502 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8503 pf->qp_pile->search_hint = 0;
8504
8505 pf->tx_timeout_recovery_level = 1;
8506
8507 mutex_init(&pf->switch_mutex);
8508
8509 /* If NPAR is enabled nudge the Tx scheduler */
8510 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8511 i40e_set_npar_bw_setting(pf);
8512
8513 sw_init_done:
8514 return err;
8515 }
8516
8517 /**
8518 * i40e_set_ntuple - set the ntuple feature flag and take action
8519 * @pf: board private structure to initialize
8520 * @features: the feature set that the stack is suggesting
8521 *
8522 * returns a bool to indicate if reset needs to happen
8523 **/
8524 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8525 {
8526 bool need_reset = false;
8527
8528 /* Check if Flow Director n-tuple support was enabled or disabled. If
8529 * the state changed, we need to reset.
8530 */
8531 if (features & NETIF_F_NTUPLE) {
8532 /* Enable filters and mark for reset */
8533 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8534 need_reset = true;
8535 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8536 } else {
8537 /* turn off filters, mark for reset and clear SW filter list */
8538 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8539 need_reset = true;
8540 i40e_fdir_filter_exit(pf);
8541 }
8542 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8543 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8544 /* reset fd counters */
8545 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8546 pf->fdir_pf_active_filters = 0;
8547 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8548 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8549 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8550 /* if ATR was auto disabled it can be re-enabled. */
8551 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8552 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8553 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8554 }
8555 return need_reset;
8556 }
8557
8558 /**
8559 * i40e_set_features - set the netdev feature flags
8560 * @netdev: ptr to the netdev being adjusted
8561 * @features: the feature set that the stack is suggesting
8562 **/
8563 static int i40e_set_features(struct net_device *netdev,
8564 netdev_features_t features)
8565 {
8566 struct i40e_netdev_priv *np = netdev_priv(netdev);
8567 struct i40e_vsi *vsi = np->vsi;
8568 struct i40e_pf *pf = vsi->back;
8569 bool need_reset;
8570
8571 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8572 i40e_vlan_stripping_enable(vsi);
8573 else
8574 i40e_vlan_stripping_disable(vsi);
8575
8576 need_reset = i40e_set_ntuple(pf, features);
8577
8578 if (need_reset)
8579 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8580
8581 return 0;
8582 }
8583
8584 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8585 /**
8586 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8587 * @pf: board private structure
8588 * @port: The UDP port to look up
8589 *
8590 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8591 **/
8592 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8593 {
8594 u8 i;
8595
8596 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8597 if (pf->udp_ports[i].index == port)
8598 return i;
8599 }
8600
8601 return i;
8602 }
8603
8604 #endif
8605
8606 #if IS_ENABLED(CONFIG_VXLAN)
8607 /**
8608 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8609 * @netdev: This physical port's netdev
8610 * @sa_family: Socket Family that VXLAN is notifying us about
8611 * @port: New UDP port number that VXLAN started listening to
8612 **/
8613 static void i40e_add_vxlan_port(struct net_device *netdev,
8614 sa_family_t sa_family, __be16 port)
8615 {
8616 struct i40e_netdev_priv *np = netdev_priv(netdev);
8617 struct i40e_vsi *vsi = np->vsi;
8618 struct i40e_pf *pf = vsi->back;
8619 u8 next_idx;
8620 u8 idx;
8621
8622 if (sa_family == AF_INET6)
8623 return;
8624
8625 idx = i40e_get_udp_port_idx(pf, port);
8626
8627 /* Check if port already exists */
8628 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8629 netdev_info(netdev, "vxlan port %d already offloaded\n",
8630 ntohs(port));
8631 return;
8632 }
8633
8634 /* Now check if there is space to add the new port */
8635 next_idx = i40e_get_udp_port_idx(pf, 0);
8636
8637 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8638 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8639 ntohs(port));
8640 return;
8641 }
8642
8643 /* New port: add it and mark its index in the bitmap */
8644 pf->udp_ports[next_idx].index = port;
8645 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8646 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8647 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8648 }
8649
8650 /**
8651 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8652 * @netdev: This physical port's netdev
8653 * @sa_family: Socket Family that VXLAN is notifying us about
8654 * @port: UDP port number that VXLAN stopped listening to
8655 **/
8656 static void i40e_del_vxlan_port(struct net_device *netdev,
8657 sa_family_t sa_family, __be16 port)
8658 {
8659 struct i40e_netdev_priv *np = netdev_priv(netdev);
8660 struct i40e_vsi *vsi = np->vsi;
8661 struct i40e_pf *pf = vsi->back;
8662 u8 idx;
8663
8664 if (sa_family == AF_INET6)
8665 return;
8666
8667 idx = i40e_get_udp_port_idx(pf, port);
8668
8669 /* Check if port already exists */
8670 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8671 /* if port exists, set it to 0 (mark for deletion)
8672 * and make it pending
8673 */
8674 pf->udp_ports[idx].index = 0;
8675 pf->pending_udp_bitmap |= BIT_ULL(idx);
8676 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8677 } else {
8678 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8679 ntohs(port));
8680 }
8681 }
8682 #endif
8683
8684 #if IS_ENABLED(CONFIG_GENEVE)
8685 /**
8686 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8687 * @netdev: This physical port's netdev
8688 * @sa_family: Socket Family that GENEVE is notifying us about
8689 * @port: New UDP port number that GENEVE started listening to
8690 **/
8691 static void i40e_add_geneve_port(struct net_device *netdev,
8692 sa_family_t sa_family, __be16 port)
8693 {
8694 struct i40e_netdev_priv *np = netdev_priv(netdev);
8695 struct i40e_vsi *vsi = np->vsi;
8696 struct i40e_pf *pf = vsi->back;
8697 u8 next_idx;
8698 u8 idx;
8699
8700 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8701 return;
8702
8703 if (sa_family == AF_INET6)
8704 return;
8705
8706 idx = i40e_get_udp_port_idx(pf, port);
8707
8708 /* Check if port already exists */
8709 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8710 netdev_info(netdev, "udp port %d already offloaded\n",
8711 ntohs(port));
8712 return;
8713 }
8714
8715 /* Now check if there is space to add the new port */
8716 next_idx = i40e_get_udp_port_idx(pf, 0);
8717
8718 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8719 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8720 ntohs(port));
8721 return;
8722 }
8723
8724 /* New port: add it and mark its index in the bitmap */
8725 pf->udp_ports[next_idx].index = port;
8726 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8727 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8728 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8729
8730 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8731 }
8732
8733 /**
8734 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8735 * @netdev: This physical port's netdev
8736 * @sa_family: Socket Family that GENEVE is notifying us about
8737 * @port: UDP port number that GENEVE stopped listening to
8738 **/
8739 static void i40e_del_geneve_port(struct net_device *netdev,
8740 sa_family_t sa_family, __be16 port)
8741 {
8742 struct i40e_netdev_priv *np = netdev_priv(netdev);
8743 struct i40e_vsi *vsi = np->vsi;
8744 struct i40e_pf *pf = vsi->back;
8745 u8 idx;
8746
8747 if (sa_family == AF_INET6)
8748 return;
8749
8750 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8751 return;
8752
8753 idx = i40e_get_udp_port_idx(pf, port);
8754
8755 /* Check if port already exists */
8756 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8757 /* if port exists, set it to 0 (mark for deletion)
8758 * and make it pending
8759 */
8760 pf->udp_ports[idx].index = 0;
8761 pf->pending_udp_bitmap |= BIT_ULL(idx);
8762 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8763
8764 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8765 ntohs(port));
8766 } else {
8767 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8768 ntohs(port));
8769 }
8770 }
8771 #endif
8772
8773 static int i40e_get_phys_port_id(struct net_device *netdev,
8774 struct netdev_phys_item_id *ppid)
8775 {
8776 struct i40e_netdev_priv *np = netdev_priv(netdev);
8777 struct i40e_pf *pf = np->vsi->back;
8778 struct i40e_hw *hw = &pf->hw;
8779
8780 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8781 return -EOPNOTSUPP;
8782
8783 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8784 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8785
8786 return 0;
8787 }
8788
8789 /**
8790 * i40e_ndo_fdb_add - add an entry to the hardware database
8791 * @ndm: the input from the stack
8792 * @tb: pointer to array of nladdr (unused)
8793 * @dev: the net device pointer
8794 * @addr: the MAC address entry being added
8795 * @flags: instructions from stack about fdb operation
8796 */
8797 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8798 struct net_device *dev,
8799 const unsigned char *addr, u16 vid,
8800 u16 flags)
8801 {
8802 struct i40e_netdev_priv *np = netdev_priv(dev);
8803 struct i40e_pf *pf = np->vsi->back;
8804 int err = 0;
8805
8806 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8807 return -EOPNOTSUPP;
8808
8809 if (vid) {
8810 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8811 return -EINVAL;
8812 }
8813
8814 /* Hardware does not support aging addresses so if a
8815 * ndm_state is given only allow permanent addresses
8816 */
8817 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8818 netdev_info(dev, "FDB only supports static addresses\n");
8819 return -EINVAL;
8820 }
8821
8822 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8823 err = dev_uc_add_excl(dev, addr);
8824 else if (is_multicast_ether_addr(addr))
8825 err = dev_mc_add_excl(dev, addr);
8826 else
8827 err = -EINVAL;
8828
8829 /* Only return duplicate errors if NLM_F_EXCL is set */
8830 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8831 err = 0;
8832
8833 return err;
8834 }
8835
8836 /**
8837 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8838 * @dev: the netdev being configured
8839 * @nlh: RTNL message
8840 *
8841 * Inserts a new hardware bridge if not already created and
8842 * enables the bridging mode requested (VEB or VEPA). If the
8843 * hardware bridge has already been inserted and the request
8844 * is to change the mode then that requires a PF reset to
8845 * allow rebuild of the components with required hardware
8846 * bridge mode enabled.
8847 **/
8848 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8849 struct nlmsghdr *nlh,
8850 u16 flags)
8851 {
8852 struct i40e_netdev_priv *np = netdev_priv(dev);
8853 struct i40e_vsi *vsi = np->vsi;
8854 struct i40e_pf *pf = vsi->back;
8855 struct i40e_veb *veb = NULL;
8856 struct nlattr *attr, *br_spec;
8857 int i, rem;
8858
8859 /* Only for PF VSI for now */
8860 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8861 return -EOPNOTSUPP;
8862
8863 /* Find the HW bridge for PF VSI */
8864 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8865 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8866 veb = pf->veb[i];
8867 }
8868
8869 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8870
8871 nla_for_each_nested(attr, br_spec, rem) {
8872 __u16 mode;
8873
8874 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8875 continue;
8876
8877 mode = nla_get_u16(attr);
8878 if ((mode != BRIDGE_MODE_VEPA) &&
8879 (mode != BRIDGE_MODE_VEB))
8880 return -EINVAL;
8881
8882 /* Insert a new HW bridge */
8883 if (!veb) {
8884 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8885 vsi->tc_config.enabled_tc);
8886 if (veb) {
8887 veb->bridge_mode = mode;
8888 i40e_config_bridge_mode(veb);
8889 } else {
8890 /* No Bridge HW offload available */
8891 return -ENOENT;
8892 }
8893 break;
8894 } else if (mode != veb->bridge_mode) {
8895 /* Existing HW bridge but different mode needs reset */
8896 veb->bridge_mode = mode;
8897 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8898 if (mode == BRIDGE_MODE_VEB)
8899 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8900 else
8901 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8902 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8903 break;
8904 }
8905 }
8906
8907 return 0;
8908 }
8909
8910 /**
8911 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8912 * @skb: skb buff
8913 * @pid: process id
8914 * @seq: RTNL message seq #
8915 * @dev: the netdev being configured
8916 * @filter_mask: unused
8917 * @nlflags: netlink flags passed in
8918 *
8919 * Return the mode in which the hardware bridge is operating in
8920 * i.e VEB or VEPA.
8921 **/
8922 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8923 struct net_device *dev,
8924 u32 __always_unused filter_mask,
8925 int nlflags)
8926 {
8927 struct i40e_netdev_priv *np = netdev_priv(dev);
8928 struct i40e_vsi *vsi = np->vsi;
8929 struct i40e_pf *pf = vsi->back;
8930 struct i40e_veb *veb = NULL;
8931 int i;
8932
8933 /* Only for PF VSI for now */
8934 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8935 return -EOPNOTSUPP;
8936
8937 /* Find the HW bridge for the PF VSI */
8938 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8939 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8940 veb = pf->veb[i];
8941 }
8942
8943 if (!veb)
8944 return 0;
8945
8946 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8947 nlflags, 0, 0, filter_mask, NULL);
8948 }
8949
8950 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8951 * inner mac plus all inner ethertypes.
8952 */
8953 #define I40E_MAX_TUNNEL_HDR_LEN 128
8954 /**
8955 * i40e_features_check - Validate encapsulated packet conforms to limits
8956 * @skb: skb buff
8957 * @dev: This physical port's netdev
8958 * @features: Offload features that the stack believes apply
8959 **/
8960 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8961 struct net_device *dev,
8962 netdev_features_t features)
8963 {
8964 if (skb->encapsulation &&
8965 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8966 I40E_MAX_TUNNEL_HDR_LEN))
8967 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8968
8969 return features;
8970 }
8971
8972 static const struct net_device_ops i40e_netdev_ops = {
8973 .ndo_open = i40e_open,
8974 .ndo_stop = i40e_close,
8975 .ndo_start_xmit = i40e_lan_xmit_frame,
8976 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8977 .ndo_set_rx_mode = i40e_set_rx_mode,
8978 .ndo_validate_addr = eth_validate_addr,
8979 .ndo_set_mac_address = i40e_set_mac,
8980 .ndo_change_mtu = i40e_change_mtu,
8981 .ndo_do_ioctl = i40e_ioctl,
8982 .ndo_tx_timeout = i40e_tx_timeout,
8983 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8984 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8985 #ifdef CONFIG_NET_POLL_CONTROLLER
8986 .ndo_poll_controller = i40e_netpoll,
8987 #endif
8988 .ndo_setup_tc = __i40e_setup_tc,
8989 #ifdef I40E_FCOE
8990 .ndo_fcoe_enable = i40e_fcoe_enable,
8991 .ndo_fcoe_disable = i40e_fcoe_disable,
8992 #endif
8993 .ndo_set_features = i40e_set_features,
8994 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8995 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8996 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8997 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8998 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8999 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9000 #if IS_ENABLED(CONFIG_VXLAN)
9001 .ndo_add_vxlan_port = i40e_add_vxlan_port,
9002 .ndo_del_vxlan_port = i40e_del_vxlan_port,
9003 #endif
9004 #if IS_ENABLED(CONFIG_GENEVE)
9005 .ndo_add_geneve_port = i40e_add_geneve_port,
9006 .ndo_del_geneve_port = i40e_del_geneve_port,
9007 #endif
9008 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9009 .ndo_fdb_add = i40e_ndo_fdb_add,
9010 .ndo_features_check = i40e_features_check,
9011 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9012 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9013 };
9014
9015 /**
9016 * i40e_config_netdev - Setup the netdev flags
9017 * @vsi: the VSI being configured
9018 *
9019 * Returns 0 on success, negative value on failure
9020 **/
9021 static int i40e_config_netdev(struct i40e_vsi *vsi)
9022 {
9023 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
9024 struct i40e_pf *pf = vsi->back;
9025 struct i40e_hw *hw = &pf->hw;
9026 struct i40e_netdev_priv *np;
9027 struct net_device *netdev;
9028 u8 mac_addr[ETH_ALEN];
9029 int etherdev_size;
9030
9031 etherdev_size = sizeof(struct i40e_netdev_priv);
9032 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9033 if (!netdev)
9034 return -ENOMEM;
9035
9036 vsi->netdev = netdev;
9037 np = netdev_priv(netdev);
9038 np->vsi = vsi;
9039
9040 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
9041 NETIF_F_GSO_UDP_TUNNEL |
9042 NETIF_F_GSO_GRE |
9043 NETIF_F_TSO |
9044 0;
9045
9046 netdev->features = NETIF_F_SG |
9047 NETIF_F_IP_CSUM |
9048 NETIF_F_SCTP_CRC |
9049 NETIF_F_HIGHDMA |
9050 NETIF_F_GSO_UDP_TUNNEL |
9051 NETIF_F_GSO_GRE |
9052 NETIF_F_HW_VLAN_CTAG_TX |
9053 NETIF_F_HW_VLAN_CTAG_RX |
9054 NETIF_F_HW_VLAN_CTAG_FILTER |
9055 NETIF_F_IPV6_CSUM |
9056 NETIF_F_TSO |
9057 NETIF_F_TSO_ECN |
9058 NETIF_F_TSO6 |
9059 NETIF_F_RXCSUM |
9060 NETIF_F_RXHASH |
9061 0;
9062
9063 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9064 netdev->features |= NETIF_F_NTUPLE;
9065
9066 /* copy netdev features into list of user selectable features */
9067 netdev->hw_features |= netdev->features;
9068
9069 if (vsi->type == I40E_VSI_MAIN) {
9070 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9071 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9072 /* The following steps are necessary to prevent reception
9073 * of tagged packets - some older NVM configurations load a
9074 * default a MAC-VLAN filter that accepts any tagged packet
9075 * which must be replaced by a normal filter.
9076 */
9077 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9078 spin_lock_bh(&vsi->mac_filter_list_lock);
9079 i40e_add_filter(vsi, mac_addr,
9080 I40E_VLAN_ANY, false, true);
9081 spin_unlock_bh(&vsi->mac_filter_list_lock);
9082 }
9083 } else {
9084 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9085 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9086 pf->vsi[pf->lan_vsi]->netdev->name);
9087 random_ether_addr(mac_addr);
9088
9089 spin_lock_bh(&vsi->mac_filter_list_lock);
9090 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9091 spin_unlock_bh(&vsi->mac_filter_list_lock);
9092 }
9093
9094 spin_lock_bh(&vsi->mac_filter_list_lock);
9095 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9096 spin_unlock_bh(&vsi->mac_filter_list_lock);
9097
9098 ether_addr_copy(netdev->dev_addr, mac_addr);
9099 ether_addr_copy(netdev->perm_addr, mac_addr);
9100 /* vlan gets same features (except vlan offload)
9101 * after any tweaks for specific VSI types
9102 */
9103 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9104 NETIF_F_HW_VLAN_CTAG_RX |
9105 NETIF_F_HW_VLAN_CTAG_FILTER);
9106 netdev->priv_flags |= IFF_UNICAST_FLT;
9107 netdev->priv_flags |= IFF_SUPP_NOFCS;
9108 /* Setup netdev TC information */
9109 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9110
9111 netdev->netdev_ops = &i40e_netdev_ops;
9112 netdev->watchdog_timeo = 5 * HZ;
9113 i40e_set_ethtool_ops(netdev);
9114 #ifdef I40E_FCOE
9115 i40e_fcoe_config_netdev(netdev, vsi);
9116 #endif
9117
9118 return 0;
9119 }
9120
9121 /**
9122 * i40e_vsi_delete - Delete a VSI from the switch
9123 * @vsi: the VSI being removed
9124 *
9125 * Returns 0 on success, negative value on failure
9126 **/
9127 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9128 {
9129 /* remove default VSI is not allowed */
9130 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9131 return;
9132
9133 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9134 }
9135
9136 /**
9137 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9138 * @vsi: the VSI being queried
9139 *
9140 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9141 **/
9142 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9143 {
9144 struct i40e_veb *veb;
9145 struct i40e_pf *pf = vsi->back;
9146
9147 /* Uplink is not a bridge so default to VEB */
9148 if (vsi->veb_idx == I40E_NO_VEB)
9149 return 1;
9150
9151 veb = pf->veb[vsi->veb_idx];
9152 if (!veb) {
9153 dev_info(&pf->pdev->dev,
9154 "There is no veb associated with the bridge\n");
9155 return -ENOENT;
9156 }
9157
9158 /* Uplink is a bridge in VEPA mode */
9159 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9160 return 0;
9161 } else {
9162 /* Uplink is a bridge in VEB mode */
9163 return 1;
9164 }
9165
9166 /* VEPA is now default bridge, so return 0 */
9167 return 0;
9168 }
9169
9170 /**
9171 * i40e_add_vsi - Add a VSI to the switch
9172 * @vsi: the VSI being configured
9173 *
9174 * This initializes a VSI context depending on the VSI type to be added and
9175 * passes it down to the add_vsi aq command.
9176 **/
9177 static int i40e_add_vsi(struct i40e_vsi *vsi)
9178 {
9179 int ret = -ENODEV;
9180 u8 laa_macaddr[ETH_ALEN];
9181 bool found_laa_mac_filter = false;
9182 struct i40e_pf *pf = vsi->back;
9183 struct i40e_hw *hw = &pf->hw;
9184 struct i40e_vsi_context ctxt;
9185 struct i40e_mac_filter *f, *ftmp;
9186
9187 u8 enabled_tc = 0x1; /* TC0 enabled */
9188 int f_count = 0;
9189
9190 memset(&ctxt, 0, sizeof(ctxt));
9191 switch (vsi->type) {
9192 case I40E_VSI_MAIN:
9193 /* The PF's main VSI is already setup as part of the
9194 * device initialization, so we'll not bother with
9195 * the add_vsi call, but we will retrieve the current
9196 * VSI context.
9197 */
9198 ctxt.seid = pf->main_vsi_seid;
9199 ctxt.pf_num = pf->hw.pf_id;
9200 ctxt.vf_num = 0;
9201 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9202 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9203 if (ret) {
9204 dev_info(&pf->pdev->dev,
9205 "couldn't get PF vsi config, err %s aq_err %s\n",
9206 i40e_stat_str(&pf->hw, ret),
9207 i40e_aq_str(&pf->hw,
9208 pf->hw.aq.asq_last_status));
9209 return -ENOENT;
9210 }
9211 vsi->info = ctxt.info;
9212 vsi->info.valid_sections = 0;
9213
9214 vsi->seid = ctxt.seid;
9215 vsi->id = ctxt.vsi_number;
9216
9217 enabled_tc = i40e_pf_get_tc_map(pf);
9218
9219 /* MFP mode setup queue map and update VSI */
9220 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9221 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9222 memset(&ctxt, 0, sizeof(ctxt));
9223 ctxt.seid = pf->main_vsi_seid;
9224 ctxt.pf_num = pf->hw.pf_id;
9225 ctxt.vf_num = 0;
9226 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9227 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9228 if (ret) {
9229 dev_info(&pf->pdev->dev,
9230 "update vsi failed, err %s aq_err %s\n",
9231 i40e_stat_str(&pf->hw, ret),
9232 i40e_aq_str(&pf->hw,
9233 pf->hw.aq.asq_last_status));
9234 ret = -ENOENT;
9235 goto err;
9236 }
9237 /* update the local VSI info queue map */
9238 i40e_vsi_update_queue_map(vsi, &ctxt);
9239 vsi->info.valid_sections = 0;
9240 } else {
9241 /* Default/Main VSI is only enabled for TC0
9242 * reconfigure it to enable all TCs that are
9243 * available on the port in SFP mode.
9244 * For MFP case the iSCSI PF would use this
9245 * flow to enable LAN+iSCSI TC.
9246 */
9247 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9248 if (ret) {
9249 dev_info(&pf->pdev->dev,
9250 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9251 enabled_tc,
9252 i40e_stat_str(&pf->hw, ret),
9253 i40e_aq_str(&pf->hw,
9254 pf->hw.aq.asq_last_status));
9255 ret = -ENOENT;
9256 }
9257 }
9258 break;
9259
9260 case I40E_VSI_FDIR:
9261 ctxt.pf_num = hw->pf_id;
9262 ctxt.vf_num = 0;
9263 ctxt.uplink_seid = vsi->uplink_seid;
9264 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9265 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9266 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9267 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9268 ctxt.info.valid_sections |=
9269 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9270 ctxt.info.switch_id =
9271 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9272 }
9273 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9274 break;
9275
9276 case I40E_VSI_VMDQ2:
9277 ctxt.pf_num = hw->pf_id;
9278 ctxt.vf_num = 0;
9279 ctxt.uplink_seid = vsi->uplink_seid;
9280 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9281 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9282
9283 /* This VSI is connected to VEB so the switch_id
9284 * should be set to zero by default.
9285 */
9286 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9287 ctxt.info.valid_sections |=
9288 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9289 ctxt.info.switch_id =
9290 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9291 }
9292
9293 /* Setup the VSI tx/rx queue map for TC0 only for now */
9294 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9295 break;
9296
9297 case I40E_VSI_SRIOV:
9298 ctxt.pf_num = hw->pf_id;
9299 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9300 ctxt.uplink_seid = vsi->uplink_seid;
9301 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9302 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9303
9304 /* This VSI is connected to VEB so the switch_id
9305 * should be set to zero by default.
9306 */
9307 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9308 ctxt.info.valid_sections |=
9309 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9310 ctxt.info.switch_id =
9311 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9312 }
9313
9314 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9315 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9316 if (pf->vf[vsi->vf_id].spoofchk) {
9317 ctxt.info.valid_sections |=
9318 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9319 ctxt.info.sec_flags |=
9320 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9321 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9322 }
9323 /* Setup the VSI tx/rx queue map for TC0 only for now */
9324 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9325 break;
9326
9327 #ifdef I40E_FCOE
9328 case I40E_VSI_FCOE:
9329 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9330 if (ret) {
9331 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9332 return ret;
9333 }
9334 break;
9335
9336 #endif /* I40E_FCOE */
9337 default:
9338 return -ENODEV;
9339 }
9340
9341 if (vsi->type != I40E_VSI_MAIN) {
9342 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9343 if (ret) {
9344 dev_info(&vsi->back->pdev->dev,
9345 "add vsi failed, err %s aq_err %s\n",
9346 i40e_stat_str(&pf->hw, ret),
9347 i40e_aq_str(&pf->hw,
9348 pf->hw.aq.asq_last_status));
9349 ret = -ENOENT;
9350 goto err;
9351 }
9352 vsi->info = ctxt.info;
9353 vsi->info.valid_sections = 0;
9354 vsi->seid = ctxt.seid;
9355 vsi->id = ctxt.vsi_number;
9356 }
9357
9358 spin_lock_bh(&vsi->mac_filter_list_lock);
9359 /* If macvlan filters already exist, force them to get loaded */
9360 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9361 f->changed = true;
9362 f_count++;
9363
9364 /* Expected to have only one MAC filter entry for LAA in list */
9365 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9366 ether_addr_copy(laa_macaddr, f->macaddr);
9367 found_laa_mac_filter = true;
9368 }
9369 }
9370 spin_unlock_bh(&vsi->mac_filter_list_lock);
9371
9372 if (found_laa_mac_filter) {
9373 struct i40e_aqc_remove_macvlan_element_data element;
9374
9375 memset(&element, 0, sizeof(element));
9376 ether_addr_copy(element.mac_addr, laa_macaddr);
9377 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9378 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9379 &element, 1, NULL);
9380 if (ret) {
9381 /* some older FW has a different default */
9382 element.flags |=
9383 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9384 i40e_aq_remove_macvlan(hw, vsi->seid,
9385 &element, 1, NULL);
9386 }
9387
9388 i40e_aq_mac_address_write(hw,
9389 I40E_AQC_WRITE_TYPE_LAA_WOL,
9390 laa_macaddr, NULL);
9391 }
9392
9393 if (f_count) {
9394 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9395 pf->flags |= I40E_FLAG_FILTER_SYNC;
9396 }
9397
9398 /* Update VSI BW information */
9399 ret = i40e_vsi_get_bw_info(vsi);
9400 if (ret) {
9401 dev_info(&pf->pdev->dev,
9402 "couldn't get vsi bw info, err %s aq_err %s\n",
9403 i40e_stat_str(&pf->hw, ret),
9404 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9405 /* VSI is already added so not tearing that up */
9406 ret = 0;
9407 }
9408
9409 err:
9410 return ret;
9411 }
9412
9413 /**
9414 * i40e_vsi_release - Delete a VSI and free its resources
9415 * @vsi: the VSI being removed
9416 *
9417 * Returns 0 on success or < 0 on error
9418 **/
9419 int i40e_vsi_release(struct i40e_vsi *vsi)
9420 {
9421 struct i40e_mac_filter *f, *ftmp;
9422 struct i40e_veb *veb = NULL;
9423 struct i40e_pf *pf;
9424 u16 uplink_seid;
9425 int i, n;
9426
9427 pf = vsi->back;
9428
9429 /* release of a VEB-owner or last VSI is not allowed */
9430 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9431 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9432 vsi->seid, vsi->uplink_seid);
9433 return -ENODEV;
9434 }
9435 if (vsi == pf->vsi[pf->lan_vsi] &&
9436 !test_bit(__I40E_DOWN, &pf->state)) {
9437 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9438 return -ENODEV;
9439 }
9440
9441 uplink_seid = vsi->uplink_seid;
9442 if (vsi->type != I40E_VSI_SRIOV) {
9443 if (vsi->netdev_registered) {
9444 vsi->netdev_registered = false;
9445 if (vsi->netdev) {
9446 /* results in a call to i40e_close() */
9447 unregister_netdev(vsi->netdev);
9448 }
9449 } else {
9450 i40e_vsi_close(vsi);
9451 }
9452 i40e_vsi_disable_irq(vsi);
9453 }
9454
9455 spin_lock_bh(&vsi->mac_filter_list_lock);
9456 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9457 i40e_del_filter(vsi, f->macaddr, f->vlan,
9458 f->is_vf, f->is_netdev);
9459 spin_unlock_bh(&vsi->mac_filter_list_lock);
9460
9461 i40e_sync_vsi_filters(vsi);
9462
9463 i40e_vsi_delete(vsi);
9464 i40e_vsi_free_q_vectors(vsi);
9465 if (vsi->netdev) {
9466 free_netdev(vsi->netdev);
9467 vsi->netdev = NULL;
9468 }
9469 i40e_vsi_clear_rings(vsi);
9470 i40e_vsi_clear(vsi);
9471
9472 /* If this was the last thing on the VEB, except for the
9473 * controlling VSI, remove the VEB, which puts the controlling
9474 * VSI onto the next level down in the switch.
9475 *
9476 * Well, okay, there's one more exception here: don't remove
9477 * the orphan VEBs yet. We'll wait for an explicit remove request
9478 * from up the network stack.
9479 */
9480 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9481 if (pf->vsi[i] &&
9482 pf->vsi[i]->uplink_seid == uplink_seid &&
9483 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9484 n++; /* count the VSIs */
9485 }
9486 }
9487 for (i = 0; i < I40E_MAX_VEB; i++) {
9488 if (!pf->veb[i])
9489 continue;
9490 if (pf->veb[i]->uplink_seid == uplink_seid)
9491 n++; /* count the VEBs */
9492 if (pf->veb[i]->seid == uplink_seid)
9493 veb = pf->veb[i];
9494 }
9495 if (n == 0 && veb && veb->uplink_seid != 0)
9496 i40e_veb_release(veb);
9497
9498 return 0;
9499 }
9500
9501 /**
9502 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9503 * @vsi: ptr to the VSI
9504 *
9505 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9506 * corresponding SW VSI structure and initializes num_queue_pairs for the
9507 * newly allocated VSI.
9508 *
9509 * Returns 0 on success or negative on failure
9510 **/
9511 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9512 {
9513 int ret = -ENOENT;
9514 struct i40e_pf *pf = vsi->back;
9515
9516 if (vsi->q_vectors[0]) {
9517 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9518 vsi->seid);
9519 return -EEXIST;
9520 }
9521
9522 if (vsi->base_vector) {
9523 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9524 vsi->seid, vsi->base_vector);
9525 return -EEXIST;
9526 }
9527
9528 ret = i40e_vsi_alloc_q_vectors(vsi);
9529 if (ret) {
9530 dev_info(&pf->pdev->dev,
9531 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9532 vsi->num_q_vectors, vsi->seid, ret);
9533 vsi->num_q_vectors = 0;
9534 goto vector_setup_out;
9535 }
9536
9537 /* In Legacy mode, we do not have to get any other vector since we
9538 * piggyback on the misc/ICR0 for queue interrupts.
9539 */
9540 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9541 return ret;
9542 if (vsi->num_q_vectors)
9543 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9544 vsi->num_q_vectors, vsi->idx);
9545 if (vsi->base_vector < 0) {
9546 dev_info(&pf->pdev->dev,
9547 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9548 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9549 i40e_vsi_free_q_vectors(vsi);
9550 ret = -ENOENT;
9551 goto vector_setup_out;
9552 }
9553
9554 vector_setup_out:
9555 return ret;
9556 }
9557
9558 /**
9559 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9560 * @vsi: pointer to the vsi.
9561 *
9562 * This re-allocates a vsi's queue resources.
9563 *
9564 * Returns pointer to the successfully allocated and configured VSI sw struct
9565 * on success, otherwise returns NULL on failure.
9566 **/
9567 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9568 {
9569 struct i40e_pf *pf = vsi->back;
9570 u8 enabled_tc;
9571 int ret;
9572
9573 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9574 i40e_vsi_clear_rings(vsi);
9575
9576 i40e_vsi_free_arrays(vsi, false);
9577 i40e_set_num_rings_in_vsi(vsi);
9578 ret = i40e_vsi_alloc_arrays(vsi, false);
9579 if (ret)
9580 goto err_vsi;
9581
9582 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9583 if (ret < 0) {
9584 dev_info(&pf->pdev->dev,
9585 "failed to get tracking for %d queues for VSI %d err %d\n",
9586 vsi->alloc_queue_pairs, vsi->seid, ret);
9587 goto err_vsi;
9588 }
9589 vsi->base_queue = ret;
9590
9591 /* Update the FW view of the VSI. Force a reset of TC and queue
9592 * layout configurations.
9593 */
9594 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9595 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9596 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9597 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9598
9599 /* assign it some queues */
9600 ret = i40e_alloc_rings(vsi);
9601 if (ret)
9602 goto err_rings;
9603
9604 /* map all of the rings to the q_vectors */
9605 i40e_vsi_map_rings_to_vectors(vsi);
9606 return vsi;
9607
9608 err_rings:
9609 i40e_vsi_free_q_vectors(vsi);
9610 if (vsi->netdev_registered) {
9611 vsi->netdev_registered = false;
9612 unregister_netdev(vsi->netdev);
9613 free_netdev(vsi->netdev);
9614 vsi->netdev = NULL;
9615 }
9616 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9617 err_vsi:
9618 i40e_vsi_clear(vsi);
9619 return NULL;
9620 }
9621
9622 /**
9623 * i40e_macaddr_init - explicitly write the mac address filters.
9624 *
9625 * @vsi: pointer to the vsi.
9626 * @macaddr: the MAC address
9627 *
9628 * This is needed when the macaddr has been obtained by other
9629 * means than the default, e.g., from Open Firmware or IDPROM.
9630 * Returns 0 on success, negative on failure
9631 **/
9632 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9633 {
9634 int ret;
9635 struct i40e_aqc_add_macvlan_element_data element;
9636
9637 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9638 I40E_AQC_WRITE_TYPE_LAA_WOL,
9639 macaddr, NULL);
9640 if (ret) {
9641 dev_info(&vsi->back->pdev->dev,
9642 "Addr change for VSI failed: %d\n", ret);
9643 return -EADDRNOTAVAIL;
9644 }
9645
9646 memset(&element, 0, sizeof(element));
9647 ether_addr_copy(element.mac_addr, macaddr);
9648 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9649 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9650 if (ret) {
9651 dev_info(&vsi->back->pdev->dev,
9652 "add filter failed err %s aq_err %s\n",
9653 i40e_stat_str(&vsi->back->hw, ret),
9654 i40e_aq_str(&vsi->back->hw,
9655 vsi->back->hw.aq.asq_last_status));
9656 }
9657 return ret;
9658 }
9659
9660 /**
9661 * i40e_vsi_setup - Set up a VSI by a given type
9662 * @pf: board private structure
9663 * @type: VSI type
9664 * @uplink_seid: the switch element to link to
9665 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9666 *
9667 * This allocates the sw VSI structure and its queue resources, then add a VSI
9668 * to the identified VEB.
9669 *
9670 * Returns pointer to the successfully allocated and configure VSI sw struct on
9671 * success, otherwise returns NULL on failure.
9672 **/
9673 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9674 u16 uplink_seid, u32 param1)
9675 {
9676 struct i40e_vsi *vsi = NULL;
9677 struct i40e_veb *veb = NULL;
9678 int ret, i;
9679 int v_idx;
9680
9681 /* The requested uplink_seid must be either
9682 * - the PF's port seid
9683 * no VEB is needed because this is the PF
9684 * or this is a Flow Director special case VSI
9685 * - seid of an existing VEB
9686 * - seid of a VSI that owns an existing VEB
9687 * - seid of a VSI that doesn't own a VEB
9688 * a new VEB is created and the VSI becomes the owner
9689 * - seid of the PF VSI, which is what creates the first VEB
9690 * this is a special case of the previous
9691 *
9692 * Find which uplink_seid we were given and create a new VEB if needed
9693 */
9694 for (i = 0; i < I40E_MAX_VEB; i++) {
9695 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9696 veb = pf->veb[i];
9697 break;
9698 }
9699 }
9700
9701 if (!veb && uplink_seid != pf->mac_seid) {
9702
9703 for (i = 0; i < pf->num_alloc_vsi; i++) {
9704 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9705 vsi = pf->vsi[i];
9706 break;
9707 }
9708 }
9709 if (!vsi) {
9710 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9711 uplink_seid);
9712 return NULL;
9713 }
9714
9715 if (vsi->uplink_seid == pf->mac_seid)
9716 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9717 vsi->tc_config.enabled_tc);
9718 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9719 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9720 vsi->tc_config.enabled_tc);
9721 if (veb) {
9722 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9723 dev_info(&vsi->back->pdev->dev,
9724 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9725 return NULL;
9726 }
9727 /* We come up by default in VEPA mode if SRIOV is not
9728 * already enabled, in which case we can't force VEPA
9729 * mode.
9730 */
9731 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9732 veb->bridge_mode = BRIDGE_MODE_VEPA;
9733 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9734 }
9735 i40e_config_bridge_mode(veb);
9736 }
9737 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9738 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9739 veb = pf->veb[i];
9740 }
9741 if (!veb) {
9742 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9743 return NULL;
9744 }
9745
9746 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9747 uplink_seid = veb->seid;
9748 }
9749
9750 /* get vsi sw struct */
9751 v_idx = i40e_vsi_mem_alloc(pf, type);
9752 if (v_idx < 0)
9753 goto err_alloc;
9754 vsi = pf->vsi[v_idx];
9755 if (!vsi)
9756 goto err_alloc;
9757 vsi->type = type;
9758 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9759
9760 if (type == I40E_VSI_MAIN)
9761 pf->lan_vsi = v_idx;
9762 else if (type == I40E_VSI_SRIOV)
9763 vsi->vf_id = param1;
9764 /* assign it some queues */
9765 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9766 vsi->idx);
9767 if (ret < 0) {
9768 dev_info(&pf->pdev->dev,
9769 "failed to get tracking for %d queues for VSI %d err=%d\n",
9770 vsi->alloc_queue_pairs, vsi->seid, ret);
9771 goto err_vsi;
9772 }
9773 vsi->base_queue = ret;
9774
9775 /* get a VSI from the hardware */
9776 vsi->uplink_seid = uplink_seid;
9777 ret = i40e_add_vsi(vsi);
9778 if (ret)
9779 goto err_vsi;
9780
9781 switch (vsi->type) {
9782 /* setup the netdev if needed */
9783 case I40E_VSI_MAIN:
9784 /* Apply relevant filters if a platform-specific mac
9785 * address was selected.
9786 */
9787 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9788 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9789 if (ret) {
9790 dev_warn(&pf->pdev->dev,
9791 "could not set up macaddr; err %d\n",
9792 ret);
9793 }
9794 }
9795 case I40E_VSI_VMDQ2:
9796 case I40E_VSI_FCOE:
9797 ret = i40e_config_netdev(vsi);
9798 if (ret)
9799 goto err_netdev;
9800 ret = register_netdev(vsi->netdev);
9801 if (ret)
9802 goto err_netdev;
9803 vsi->netdev_registered = true;
9804 netif_carrier_off(vsi->netdev);
9805 #ifdef CONFIG_I40E_DCB
9806 /* Setup DCB netlink interface */
9807 i40e_dcbnl_setup(vsi);
9808 #endif /* CONFIG_I40E_DCB */
9809 /* fall through */
9810
9811 case I40E_VSI_FDIR:
9812 /* set up vectors and rings if needed */
9813 ret = i40e_vsi_setup_vectors(vsi);
9814 if (ret)
9815 goto err_msix;
9816
9817 ret = i40e_alloc_rings(vsi);
9818 if (ret)
9819 goto err_rings;
9820
9821 /* map all of the rings to the q_vectors */
9822 i40e_vsi_map_rings_to_vectors(vsi);
9823
9824 i40e_vsi_reset_stats(vsi);
9825 break;
9826
9827 default:
9828 /* no netdev or rings for the other VSI types */
9829 break;
9830 }
9831
9832 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9833 (vsi->type == I40E_VSI_VMDQ2)) {
9834 ret = i40e_vsi_config_rss(vsi);
9835 }
9836 return vsi;
9837
9838 err_rings:
9839 i40e_vsi_free_q_vectors(vsi);
9840 err_msix:
9841 if (vsi->netdev_registered) {
9842 vsi->netdev_registered = false;
9843 unregister_netdev(vsi->netdev);
9844 free_netdev(vsi->netdev);
9845 vsi->netdev = NULL;
9846 }
9847 err_netdev:
9848 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9849 err_vsi:
9850 i40e_vsi_clear(vsi);
9851 err_alloc:
9852 return NULL;
9853 }
9854
9855 /**
9856 * i40e_veb_get_bw_info - Query VEB BW information
9857 * @veb: the veb to query
9858 *
9859 * Query the Tx scheduler BW configuration data for given VEB
9860 **/
9861 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9862 {
9863 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9864 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9865 struct i40e_pf *pf = veb->pf;
9866 struct i40e_hw *hw = &pf->hw;
9867 u32 tc_bw_max;
9868 int ret = 0;
9869 int i;
9870
9871 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9872 &bw_data, NULL);
9873 if (ret) {
9874 dev_info(&pf->pdev->dev,
9875 "query veb bw config failed, err %s aq_err %s\n",
9876 i40e_stat_str(&pf->hw, ret),
9877 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9878 goto out;
9879 }
9880
9881 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9882 &ets_data, NULL);
9883 if (ret) {
9884 dev_info(&pf->pdev->dev,
9885 "query veb bw ets config failed, err %s aq_err %s\n",
9886 i40e_stat_str(&pf->hw, ret),
9887 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9888 goto out;
9889 }
9890
9891 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9892 veb->bw_max_quanta = ets_data.tc_bw_max;
9893 veb->is_abs_credits = bw_data.absolute_credits_enable;
9894 veb->enabled_tc = ets_data.tc_valid_bits;
9895 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9896 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9897 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9898 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9899 veb->bw_tc_limit_credits[i] =
9900 le16_to_cpu(bw_data.tc_bw_limits[i]);
9901 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9902 }
9903
9904 out:
9905 return ret;
9906 }
9907
9908 /**
9909 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9910 * @pf: board private structure
9911 *
9912 * On error: returns error code (negative)
9913 * On success: returns vsi index in PF (positive)
9914 **/
9915 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9916 {
9917 int ret = -ENOENT;
9918 struct i40e_veb *veb;
9919 int i;
9920
9921 /* Need to protect the allocation of switch elements at the PF level */
9922 mutex_lock(&pf->switch_mutex);
9923
9924 /* VEB list may be fragmented if VEB creation/destruction has
9925 * been happening. We can afford to do a quick scan to look
9926 * for any free slots in the list.
9927 *
9928 * find next empty veb slot, looping back around if necessary
9929 */
9930 i = 0;
9931 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9932 i++;
9933 if (i >= I40E_MAX_VEB) {
9934 ret = -ENOMEM;
9935 goto err_alloc_veb; /* out of VEB slots! */
9936 }
9937
9938 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9939 if (!veb) {
9940 ret = -ENOMEM;
9941 goto err_alloc_veb;
9942 }
9943 veb->pf = pf;
9944 veb->idx = i;
9945 veb->enabled_tc = 1;
9946
9947 pf->veb[i] = veb;
9948 ret = i;
9949 err_alloc_veb:
9950 mutex_unlock(&pf->switch_mutex);
9951 return ret;
9952 }
9953
9954 /**
9955 * i40e_switch_branch_release - Delete a branch of the switch tree
9956 * @branch: where to start deleting
9957 *
9958 * This uses recursion to find the tips of the branch to be
9959 * removed, deleting until we get back to and can delete this VEB.
9960 **/
9961 static void i40e_switch_branch_release(struct i40e_veb *branch)
9962 {
9963 struct i40e_pf *pf = branch->pf;
9964 u16 branch_seid = branch->seid;
9965 u16 veb_idx = branch->idx;
9966 int i;
9967
9968 /* release any VEBs on this VEB - RECURSION */
9969 for (i = 0; i < I40E_MAX_VEB; i++) {
9970 if (!pf->veb[i])
9971 continue;
9972 if (pf->veb[i]->uplink_seid == branch->seid)
9973 i40e_switch_branch_release(pf->veb[i]);
9974 }
9975
9976 /* Release the VSIs on this VEB, but not the owner VSI.
9977 *
9978 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9979 * the VEB itself, so don't use (*branch) after this loop.
9980 */
9981 for (i = 0; i < pf->num_alloc_vsi; i++) {
9982 if (!pf->vsi[i])
9983 continue;
9984 if (pf->vsi[i]->uplink_seid == branch_seid &&
9985 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9986 i40e_vsi_release(pf->vsi[i]);
9987 }
9988 }
9989
9990 /* There's one corner case where the VEB might not have been
9991 * removed, so double check it here and remove it if needed.
9992 * This case happens if the veb was created from the debugfs
9993 * commands and no VSIs were added to it.
9994 */
9995 if (pf->veb[veb_idx])
9996 i40e_veb_release(pf->veb[veb_idx]);
9997 }
9998
9999 /**
10000 * i40e_veb_clear - remove veb struct
10001 * @veb: the veb to remove
10002 **/
10003 static void i40e_veb_clear(struct i40e_veb *veb)
10004 {
10005 if (!veb)
10006 return;
10007
10008 if (veb->pf) {
10009 struct i40e_pf *pf = veb->pf;
10010
10011 mutex_lock(&pf->switch_mutex);
10012 if (pf->veb[veb->idx] == veb)
10013 pf->veb[veb->idx] = NULL;
10014 mutex_unlock(&pf->switch_mutex);
10015 }
10016
10017 kfree(veb);
10018 }
10019
10020 /**
10021 * i40e_veb_release - Delete a VEB and free its resources
10022 * @veb: the VEB being removed
10023 **/
10024 void i40e_veb_release(struct i40e_veb *veb)
10025 {
10026 struct i40e_vsi *vsi = NULL;
10027 struct i40e_pf *pf;
10028 int i, n = 0;
10029
10030 pf = veb->pf;
10031
10032 /* find the remaining VSI and check for extras */
10033 for (i = 0; i < pf->num_alloc_vsi; i++) {
10034 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10035 n++;
10036 vsi = pf->vsi[i];
10037 }
10038 }
10039 if (n != 1) {
10040 dev_info(&pf->pdev->dev,
10041 "can't remove VEB %d with %d VSIs left\n",
10042 veb->seid, n);
10043 return;
10044 }
10045
10046 /* move the remaining VSI to uplink veb */
10047 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10048 if (veb->uplink_seid) {
10049 vsi->uplink_seid = veb->uplink_seid;
10050 if (veb->uplink_seid == pf->mac_seid)
10051 vsi->veb_idx = I40E_NO_VEB;
10052 else
10053 vsi->veb_idx = veb->veb_idx;
10054 } else {
10055 /* floating VEB */
10056 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10057 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10058 }
10059
10060 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10061 i40e_veb_clear(veb);
10062 }
10063
10064 /**
10065 * i40e_add_veb - create the VEB in the switch
10066 * @veb: the VEB to be instantiated
10067 * @vsi: the controlling VSI
10068 **/
10069 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10070 {
10071 struct i40e_pf *pf = veb->pf;
10072 bool is_default = veb->pf->cur_promisc;
10073 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10074 int ret;
10075
10076 /* get a VEB from the hardware */
10077 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10078 veb->enabled_tc, is_default,
10079 &veb->seid, enable_stats, NULL);
10080 if (ret) {
10081 dev_info(&pf->pdev->dev,
10082 "couldn't add VEB, err %s aq_err %s\n",
10083 i40e_stat_str(&pf->hw, ret),
10084 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10085 return -EPERM;
10086 }
10087
10088 /* get statistics counter */
10089 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10090 &veb->stats_idx, NULL, NULL, NULL);
10091 if (ret) {
10092 dev_info(&pf->pdev->dev,
10093 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10094 i40e_stat_str(&pf->hw, ret),
10095 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10096 return -EPERM;
10097 }
10098 ret = i40e_veb_get_bw_info(veb);
10099 if (ret) {
10100 dev_info(&pf->pdev->dev,
10101 "couldn't get VEB bw info, err %s aq_err %s\n",
10102 i40e_stat_str(&pf->hw, ret),
10103 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10104 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10105 return -ENOENT;
10106 }
10107
10108 vsi->uplink_seid = veb->seid;
10109 vsi->veb_idx = veb->idx;
10110 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10111
10112 return 0;
10113 }
10114
10115 /**
10116 * i40e_veb_setup - Set up a VEB
10117 * @pf: board private structure
10118 * @flags: VEB setup flags
10119 * @uplink_seid: the switch element to link to
10120 * @vsi_seid: the initial VSI seid
10121 * @enabled_tc: Enabled TC bit-map
10122 *
10123 * This allocates the sw VEB structure and links it into the switch
10124 * It is possible and legal for this to be a duplicate of an already
10125 * existing VEB. It is also possible for both uplink and vsi seids
10126 * to be zero, in order to create a floating VEB.
10127 *
10128 * Returns pointer to the successfully allocated VEB sw struct on
10129 * success, otherwise returns NULL on failure.
10130 **/
10131 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10132 u16 uplink_seid, u16 vsi_seid,
10133 u8 enabled_tc)
10134 {
10135 struct i40e_veb *veb, *uplink_veb = NULL;
10136 int vsi_idx, veb_idx;
10137 int ret;
10138
10139 /* if one seid is 0, the other must be 0 to create a floating relay */
10140 if ((uplink_seid == 0 || vsi_seid == 0) &&
10141 (uplink_seid + vsi_seid != 0)) {
10142 dev_info(&pf->pdev->dev,
10143 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10144 uplink_seid, vsi_seid);
10145 return NULL;
10146 }
10147
10148 /* make sure there is such a vsi and uplink */
10149 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10150 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10151 break;
10152 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10153 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10154 vsi_seid);
10155 return NULL;
10156 }
10157
10158 if (uplink_seid && uplink_seid != pf->mac_seid) {
10159 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10160 if (pf->veb[veb_idx] &&
10161 pf->veb[veb_idx]->seid == uplink_seid) {
10162 uplink_veb = pf->veb[veb_idx];
10163 break;
10164 }
10165 }
10166 if (!uplink_veb) {
10167 dev_info(&pf->pdev->dev,
10168 "uplink seid %d not found\n", uplink_seid);
10169 return NULL;
10170 }
10171 }
10172
10173 /* get veb sw struct */
10174 veb_idx = i40e_veb_mem_alloc(pf);
10175 if (veb_idx < 0)
10176 goto err_alloc;
10177 veb = pf->veb[veb_idx];
10178 veb->flags = flags;
10179 veb->uplink_seid = uplink_seid;
10180 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10181 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10182
10183 /* create the VEB in the switch */
10184 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10185 if (ret)
10186 goto err_veb;
10187 if (vsi_idx == pf->lan_vsi)
10188 pf->lan_veb = veb->idx;
10189
10190 return veb;
10191
10192 err_veb:
10193 i40e_veb_clear(veb);
10194 err_alloc:
10195 return NULL;
10196 }
10197
10198 /**
10199 * i40e_setup_pf_switch_element - set PF vars based on switch type
10200 * @pf: board private structure
10201 * @ele: element we are building info from
10202 * @num_reported: total number of elements
10203 * @printconfig: should we print the contents
10204 *
10205 * helper function to assist in extracting a few useful SEID values.
10206 **/
10207 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10208 struct i40e_aqc_switch_config_element_resp *ele,
10209 u16 num_reported, bool printconfig)
10210 {
10211 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10212 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10213 u8 element_type = ele->element_type;
10214 u16 seid = le16_to_cpu(ele->seid);
10215
10216 if (printconfig)
10217 dev_info(&pf->pdev->dev,
10218 "type=%d seid=%d uplink=%d downlink=%d\n",
10219 element_type, seid, uplink_seid, downlink_seid);
10220
10221 switch (element_type) {
10222 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10223 pf->mac_seid = seid;
10224 break;
10225 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10226 /* Main VEB? */
10227 if (uplink_seid != pf->mac_seid)
10228 break;
10229 if (pf->lan_veb == I40E_NO_VEB) {
10230 int v;
10231
10232 /* find existing or else empty VEB */
10233 for (v = 0; v < I40E_MAX_VEB; v++) {
10234 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10235 pf->lan_veb = v;
10236 break;
10237 }
10238 }
10239 if (pf->lan_veb == I40E_NO_VEB) {
10240 v = i40e_veb_mem_alloc(pf);
10241 if (v < 0)
10242 break;
10243 pf->lan_veb = v;
10244 }
10245 }
10246
10247 pf->veb[pf->lan_veb]->seid = seid;
10248 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10249 pf->veb[pf->lan_veb]->pf = pf;
10250 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10251 break;
10252 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10253 if (num_reported != 1)
10254 break;
10255 /* This is immediately after a reset so we can assume this is
10256 * the PF's VSI
10257 */
10258 pf->mac_seid = uplink_seid;
10259 pf->pf_seid = downlink_seid;
10260 pf->main_vsi_seid = seid;
10261 if (printconfig)
10262 dev_info(&pf->pdev->dev,
10263 "pf_seid=%d main_vsi_seid=%d\n",
10264 pf->pf_seid, pf->main_vsi_seid);
10265 break;
10266 case I40E_SWITCH_ELEMENT_TYPE_PF:
10267 case I40E_SWITCH_ELEMENT_TYPE_VF:
10268 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10269 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10270 case I40E_SWITCH_ELEMENT_TYPE_PE:
10271 case I40E_SWITCH_ELEMENT_TYPE_PA:
10272 /* ignore these for now */
10273 break;
10274 default:
10275 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10276 element_type, seid);
10277 break;
10278 }
10279 }
10280
10281 /**
10282 * i40e_fetch_switch_configuration - Get switch config from firmware
10283 * @pf: board private structure
10284 * @printconfig: should we print the contents
10285 *
10286 * Get the current switch configuration from the device and
10287 * extract a few useful SEID values.
10288 **/
10289 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10290 {
10291 struct i40e_aqc_get_switch_config_resp *sw_config;
10292 u16 next_seid = 0;
10293 int ret = 0;
10294 u8 *aq_buf;
10295 int i;
10296
10297 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10298 if (!aq_buf)
10299 return -ENOMEM;
10300
10301 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10302 do {
10303 u16 num_reported, num_total;
10304
10305 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10306 I40E_AQ_LARGE_BUF,
10307 &next_seid, NULL);
10308 if (ret) {
10309 dev_info(&pf->pdev->dev,
10310 "get switch config failed err %s aq_err %s\n",
10311 i40e_stat_str(&pf->hw, ret),
10312 i40e_aq_str(&pf->hw,
10313 pf->hw.aq.asq_last_status));
10314 kfree(aq_buf);
10315 return -ENOENT;
10316 }
10317
10318 num_reported = le16_to_cpu(sw_config->header.num_reported);
10319 num_total = le16_to_cpu(sw_config->header.num_total);
10320
10321 if (printconfig)
10322 dev_info(&pf->pdev->dev,
10323 "header: %d reported %d total\n",
10324 num_reported, num_total);
10325
10326 for (i = 0; i < num_reported; i++) {
10327 struct i40e_aqc_switch_config_element_resp *ele =
10328 &sw_config->element[i];
10329
10330 i40e_setup_pf_switch_element(pf, ele, num_reported,
10331 printconfig);
10332 }
10333 } while (next_seid != 0);
10334
10335 kfree(aq_buf);
10336 return ret;
10337 }
10338
10339 /**
10340 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10341 * @pf: board private structure
10342 * @reinit: if the Main VSI needs to re-initialized.
10343 *
10344 * Returns 0 on success, negative value on failure
10345 **/
10346 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10347 {
10348 int ret;
10349
10350 /* find out what's out there already */
10351 ret = i40e_fetch_switch_configuration(pf, false);
10352 if (ret) {
10353 dev_info(&pf->pdev->dev,
10354 "couldn't fetch switch config, err %s aq_err %s\n",
10355 i40e_stat_str(&pf->hw, ret),
10356 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10357 return ret;
10358 }
10359 i40e_pf_reset_stats(pf);
10360
10361 /* first time setup */
10362 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10363 struct i40e_vsi *vsi = NULL;
10364 u16 uplink_seid;
10365
10366 /* Set up the PF VSI associated with the PF's main VSI
10367 * that is already in the HW switch
10368 */
10369 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10370 uplink_seid = pf->veb[pf->lan_veb]->seid;
10371 else
10372 uplink_seid = pf->mac_seid;
10373 if (pf->lan_vsi == I40E_NO_VSI)
10374 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10375 else if (reinit)
10376 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10377 if (!vsi) {
10378 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10379 i40e_fdir_teardown(pf);
10380 return -EAGAIN;
10381 }
10382 } else {
10383 /* force a reset of TC and queue layout configurations */
10384 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10385
10386 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10387 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10388 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10389 }
10390 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10391
10392 i40e_fdir_sb_setup(pf);
10393
10394 /* Setup static PF queue filter control settings */
10395 ret = i40e_setup_pf_filter_control(pf);
10396 if (ret) {
10397 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10398 ret);
10399 /* Failure here should not stop continuing other steps */
10400 }
10401
10402 /* enable RSS in the HW, even for only one queue, as the stack can use
10403 * the hash
10404 */
10405 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10406 i40e_pf_config_rss(pf);
10407
10408 /* fill in link information and enable LSE reporting */
10409 i40e_update_link_info(&pf->hw);
10410 i40e_link_event(pf);
10411
10412 /* Initialize user-specific link properties */
10413 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10414 I40E_AQ_AN_COMPLETED) ? true : false);
10415
10416 i40e_ptp_init(pf);
10417
10418 return ret;
10419 }
10420
10421 /**
10422 * i40e_determine_queue_usage - Work out queue distribution
10423 * @pf: board private structure
10424 **/
10425 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10426 {
10427 int queues_left;
10428
10429 pf->num_lan_qps = 0;
10430 #ifdef I40E_FCOE
10431 pf->num_fcoe_qps = 0;
10432 #endif
10433
10434 /* Find the max queues to be put into basic use. We'll always be
10435 * using TC0, whether or not DCB is running, and TC0 will get the
10436 * big RSS set.
10437 */
10438 queues_left = pf->hw.func_caps.num_tx_qp;
10439
10440 if ((queues_left == 1) ||
10441 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10442 /* one qp for PF, no queues for anything else */
10443 queues_left = 0;
10444 pf->alloc_rss_size = pf->num_lan_qps = 1;
10445
10446 /* make sure all the fancies are disabled */
10447 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10448 #ifdef I40E_FCOE
10449 I40E_FLAG_FCOE_ENABLED |
10450 #endif
10451 I40E_FLAG_FD_SB_ENABLED |
10452 I40E_FLAG_FD_ATR_ENABLED |
10453 I40E_FLAG_DCB_CAPABLE |
10454 I40E_FLAG_SRIOV_ENABLED |
10455 I40E_FLAG_VMDQ_ENABLED);
10456 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10457 I40E_FLAG_FD_SB_ENABLED |
10458 I40E_FLAG_FD_ATR_ENABLED |
10459 I40E_FLAG_DCB_CAPABLE))) {
10460 /* one qp for PF */
10461 pf->alloc_rss_size = pf->num_lan_qps = 1;
10462 queues_left -= pf->num_lan_qps;
10463
10464 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10465 #ifdef I40E_FCOE
10466 I40E_FLAG_FCOE_ENABLED |
10467 #endif
10468 I40E_FLAG_FD_SB_ENABLED |
10469 I40E_FLAG_FD_ATR_ENABLED |
10470 I40E_FLAG_DCB_ENABLED |
10471 I40E_FLAG_VMDQ_ENABLED);
10472 } else {
10473 /* Not enough queues for all TCs */
10474 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10475 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10476 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10477 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10478 }
10479 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10480 num_online_cpus());
10481 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10482 pf->hw.func_caps.num_tx_qp);
10483
10484 queues_left -= pf->num_lan_qps;
10485 }
10486
10487 #ifdef I40E_FCOE
10488 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10489 if (I40E_DEFAULT_FCOE <= queues_left) {
10490 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10491 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10492 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10493 } else {
10494 pf->num_fcoe_qps = 0;
10495 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10496 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10497 }
10498
10499 queues_left -= pf->num_fcoe_qps;
10500 }
10501
10502 #endif
10503 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10504 if (queues_left > 1) {
10505 queues_left -= 1; /* save 1 queue for FD */
10506 } else {
10507 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10508 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10509 }
10510 }
10511
10512 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10513 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10514 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10515 (queues_left / pf->num_vf_qps));
10516 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10517 }
10518
10519 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10520 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10521 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10522 (queues_left / pf->num_vmdq_qps));
10523 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10524 }
10525
10526 pf->queues_left = queues_left;
10527 dev_dbg(&pf->pdev->dev,
10528 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10529 pf->hw.func_caps.num_tx_qp,
10530 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10531 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10532 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10533 queues_left);
10534 #ifdef I40E_FCOE
10535 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10536 #endif
10537 }
10538
10539 /**
10540 * i40e_setup_pf_filter_control - Setup PF static filter control
10541 * @pf: PF to be setup
10542 *
10543 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10544 * settings. If PE/FCoE are enabled then it will also set the per PF
10545 * based filter sizes required for them. It also enables Flow director,
10546 * ethertype and macvlan type filter settings for the pf.
10547 *
10548 * Returns 0 on success, negative on failure
10549 **/
10550 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10551 {
10552 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10553
10554 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10555
10556 /* Flow Director is enabled */
10557 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10558 settings->enable_fdir = true;
10559
10560 /* Ethtype and MACVLAN filters enabled for PF */
10561 settings->enable_ethtype = true;
10562 settings->enable_macvlan = true;
10563
10564 if (i40e_set_filter_control(&pf->hw, settings))
10565 return -ENOENT;
10566
10567 return 0;
10568 }
10569
10570 #define INFO_STRING_LEN 255
10571 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10572 static void i40e_print_features(struct i40e_pf *pf)
10573 {
10574 struct i40e_hw *hw = &pf->hw;
10575 char *buf;
10576 int i;
10577
10578 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10579 if (!buf)
10580 return;
10581
10582 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10583 #ifdef CONFIG_PCI_IOV
10584 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10585 #endif
10586 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10587 pf->hw.func_caps.num_vsis,
10588 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10589 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10590
10591 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10592 i += snprintf(&buf[i], REMAIN(i), " RSS");
10593 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10594 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10595 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10596 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10597 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10598 }
10599 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10600 i += snprintf(&buf[i], REMAIN(i), " DCB");
10601 #if IS_ENABLED(CONFIG_VXLAN)
10602 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10603 #endif
10604 #if IS_ENABLED(CONFIG_GENEVE)
10605 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10606 #endif
10607 if (pf->flags & I40E_FLAG_PTP)
10608 i += snprintf(&buf[i], REMAIN(i), " PTP");
10609 #ifdef I40E_FCOE
10610 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10611 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10612 #endif
10613 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10614 i += snprintf(&buf[i], REMAIN(i), " VEB");
10615 else
10616 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10617
10618 dev_info(&pf->pdev->dev, "%s\n", buf);
10619 kfree(buf);
10620 WARN_ON(i > INFO_STRING_LEN);
10621 }
10622
10623 /**
10624 * i40e_get_platform_mac_addr - get platform-specific MAC address
10625 *
10626 * @pdev: PCI device information struct
10627 * @pf: board private structure
10628 *
10629 * Look up the MAC address in Open Firmware on systems that support it,
10630 * and use IDPROM on SPARC if no OF address is found. On return, the
10631 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10632 * has been selected.
10633 **/
10634 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10635 {
10636 pf->flags &= ~I40E_FLAG_PF_MAC;
10637 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10638 pf->flags |= I40E_FLAG_PF_MAC;
10639 }
10640
10641 /**
10642 * i40e_probe - Device initialization routine
10643 * @pdev: PCI device information struct
10644 * @ent: entry in i40e_pci_tbl
10645 *
10646 * i40e_probe initializes a PF identified by a pci_dev structure.
10647 * The OS initialization, configuring of the PF private structure,
10648 * and a hardware reset occur.
10649 *
10650 * Returns 0 on success, negative on failure
10651 **/
10652 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10653 {
10654 struct i40e_aq_get_phy_abilities_resp abilities;
10655 struct i40e_pf *pf;
10656 struct i40e_hw *hw;
10657 static u16 pfs_found;
10658 u16 wol_nvm_bits;
10659 u16 link_status;
10660 int err;
10661 u32 val;
10662 u32 i;
10663 u8 set_fc_aq_fail;
10664
10665 err = pci_enable_device_mem(pdev);
10666 if (err)
10667 return err;
10668
10669 /* set up for high or low dma */
10670 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10671 if (err) {
10672 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10673 if (err) {
10674 dev_err(&pdev->dev,
10675 "DMA configuration failed: 0x%x\n", err);
10676 goto err_dma;
10677 }
10678 }
10679
10680 /* set up pci connections */
10681 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10682 IORESOURCE_MEM), i40e_driver_name);
10683 if (err) {
10684 dev_info(&pdev->dev,
10685 "pci_request_selected_regions failed %d\n", err);
10686 goto err_pci_reg;
10687 }
10688
10689 pci_enable_pcie_error_reporting(pdev);
10690 pci_set_master(pdev);
10691
10692 /* Now that we have a PCI connection, we need to do the
10693 * low level device setup. This is primarily setting up
10694 * the Admin Queue structures and then querying for the
10695 * device's current profile information.
10696 */
10697 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10698 if (!pf) {
10699 err = -ENOMEM;
10700 goto err_pf_alloc;
10701 }
10702 pf->next_vsi = 0;
10703 pf->pdev = pdev;
10704 set_bit(__I40E_DOWN, &pf->state);
10705
10706 hw = &pf->hw;
10707 hw->back = pf;
10708
10709 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10710 I40E_MAX_CSR_SPACE);
10711
10712 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10713 if (!hw->hw_addr) {
10714 err = -EIO;
10715 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10716 (unsigned int)pci_resource_start(pdev, 0),
10717 pf->ioremap_len, err);
10718 goto err_ioremap;
10719 }
10720 hw->vendor_id = pdev->vendor;
10721 hw->device_id = pdev->device;
10722 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10723 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10724 hw->subsystem_device_id = pdev->subsystem_device;
10725 hw->bus.device = PCI_SLOT(pdev->devfn);
10726 hw->bus.func = PCI_FUNC(pdev->devfn);
10727 pf->instance = pfs_found;
10728
10729 if (debug != -1) {
10730 pf->msg_enable = pf->hw.debug_mask;
10731 pf->msg_enable = debug;
10732 }
10733
10734 /* do a special CORER for clearing PXE mode once at init */
10735 if (hw->revision_id == 0 &&
10736 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10737 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10738 i40e_flush(hw);
10739 msleep(200);
10740 pf->corer_count++;
10741
10742 i40e_clear_pxe_mode(hw);
10743 }
10744
10745 /* Reset here to make sure all is clean and to define PF 'n' */
10746 i40e_clear_hw(hw);
10747 err = i40e_pf_reset(hw);
10748 if (err) {
10749 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10750 goto err_pf_reset;
10751 }
10752 pf->pfr_count++;
10753
10754 hw->aq.num_arq_entries = I40E_AQ_LEN;
10755 hw->aq.num_asq_entries = I40E_AQ_LEN;
10756 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10757 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10758 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10759
10760 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10761 "%s-%s:misc",
10762 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10763
10764 err = i40e_init_shared_code(hw);
10765 if (err) {
10766 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10767 err);
10768 goto err_pf_reset;
10769 }
10770
10771 /* set up a default setting for link flow control */
10772 pf->hw.fc.requested_mode = I40E_FC_NONE;
10773
10774 /* set up the locks for the AQ, do this only once in probe
10775 * and destroy them only once in remove
10776 */
10777 mutex_init(&hw->aq.asq_mutex);
10778 mutex_init(&hw->aq.arq_mutex);
10779
10780 err = i40e_init_adminq(hw);
10781 if (err) {
10782 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10783 dev_info(&pdev->dev,
10784 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10785 else
10786 dev_info(&pdev->dev,
10787 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10788
10789 goto err_pf_reset;
10790 }
10791
10792 /* provide nvm, fw, api versions */
10793 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10794 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10795 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10796 i40e_nvm_version_str(hw));
10797
10798 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10799 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10800 dev_info(&pdev->dev,
10801 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10802 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10803 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10804 dev_info(&pdev->dev,
10805 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10806
10807 i40e_verify_eeprom(pf);
10808
10809 /* Rev 0 hardware was never productized */
10810 if (hw->revision_id < 1)
10811 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10812
10813 i40e_clear_pxe_mode(hw);
10814 err = i40e_get_capabilities(pf);
10815 if (err)
10816 goto err_adminq_setup;
10817
10818 err = i40e_sw_init(pf);
10819 if (err) {
10820 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10821 goto err_sw_init;
10822 }
10823
10824 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10825 hw->func_caps.num_rx_qp,
10826 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10827 if (err) {
10828 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10829 goto err_init_lan_hmc;
10830 }
10831
10832 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10833 if (err) {
10834 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10835 err = -ENOENT;
10836 goto err_configure_lan_hmc;
10837 }
10838
10839 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10840 * Ignore error return codes because if it was already disabled via
10841 * hardware settings this will fail
10842 */
10843 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10844 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10845 i40e_aq_stop_lldp(hw, true, NULL);
10846 }
10847
10848 i40e_get_mac_addr(hw, hw->mac.addr);
10849 /* allow a platform config to override the HW addr */
10850 i40e_get_platform_mac_addr(pdev, pf);
10851 if (!is_valid_ether_addr(hw->mac.addr)) {
10852 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10853 err = -EIO;
10854 goto err_mac_addr;
10855 }
10856 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10857 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10858 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10859 if (is_valid_ether_addr(hw->mac.port_addr))
10860 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10861 #ifdef I40E_FCOE
10862 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10863 if (err)
10864 dev_info(&pdev->dev,
10865 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10866 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10867 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10868 hw->mac.san_addr);
10869 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10870 }
10871 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10872 #endif /* I40E_FCOE */
10873
10874 pci_set_drvdata(pdev, pf);
10875 pci_save_state(pdev);
10876 #ifdef CONFIG_I40E_DCB
10877 err = i40e_init_pf_dcb(pf);
10878 if (err) {
10879 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10880 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10881 /* Continue without DCB enabled */
10882 }
10883 #endif /* CONFIG_I40E_DCB */
10884
10885 /* set up periodic task facility */
10886 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10887 pf->service_timer_period = HZ;
10888
10889 INIT_WORK(&pf->service_task, i40e_service_task);
10890 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10891 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10892
10893 /* NVM bit on means WoL disabled for the port */
10894 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10895 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10896 pf->wol_en = false;
10897 else
10898 pf->wol_en = true;
10899 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10900
10901 /* set up the main switch operations */
10902 i40e_determine_queue_usage(pf);
10903 err = i40e_init_interrupt_scheme(pf);
10904 if (err)
10905 goto err_switch_setup;
10906
10907 /* The number of VSIs reported by the FW is the minimum guaranteed
10908 * to us; HW supports far more and we share the remaining pool with
10909 * the other PFs. We allocate space for more than the guarantee with
10910 * the understanding that we might not get them all later.
10911 */
10912 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10913 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10914 else
10915 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10916
10917 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10918 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10919 GFP_KERNEL);
10920 if (!pf->vsi) {
10921 err = -ENOMEM;
10922 goto err_switch_setup;
10923 }
10924
10925 #ifdef CONFIG_PCI_IOV
10926 /* prep for VF support */
10927 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10928 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10929 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10930 if (pci_num_vf(pdev))
10931 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10932 }
10933 #endif
10934 err = i40e_setup_pf_switch(pf, false);
10935 if (err) {
10936 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10937 goto err_vsis;
10938 }
10939
10940 /* Make sure flow control is set according to current settings */
10941 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10942 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10943 dev_dbg(&pf->pdev->dev,
10944 "Set fc with err %s aq_err %s on get_phy_cap\n",
10945 i40e_stat_str(hw, err),
10946 i40e_aq_str(hw, hw->aq.asq_last_status));
10947 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10948 dev_dbg(&pf->pdev->dev,
10949 "Set fc with err %s aq_err %s on set_phy_config\n",
10950 i40e_stat_str(hw, err),
10951 i40e_aq_str(hw, hw->aq.asq_last_status));
10952 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10953 dev_dbg(&pf->pdev->dev,
10954 "Set fc with err %s aq_err %s on get_link_info\n",
10955 i40e_stat_str(hw, err),
10956 i40e_aq_str(hw, hw->aq.asq_last_status));
10957
10958 /* if FDIR VSI was set up, start it now */
10959 for (i = 0; i < pf->num_alloc_vsi; i++) {
10960 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10961 i40e_vsi_open(pf->vsi[i]);
10962 break;
10963 }
10964 }
10965
10966 /* The driver only wants link up/down and module qualification
10967 * reports from firmware. Note the negative logic.
10968 */
10969 err = i40e_aq_set_phy_int_mask(&pf->hw,
10970 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10971 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10972 if (err)
10973 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10974 i40e_stat_str(&pf->hw, err),
10975 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10976
10977 /* Reconfigure hardware for allowing smaller MSS in the case
10978 * of TSO, so that we avoid the MDD being fired and causing
10979 * a reset in the case of small MSS+TSO.
10980 */
10981 val = rd32(hw, I40E_REG_MSS);
10982 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10983 val &= ~I40E_REG_MSS_MIN_MASK;
10984 val |= I40E_64BYTE_MSS;
10985 wr32(hw, I40E_REG_MSS, val);
10986 }
10987
10988 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
10989 msleep(75);
10990 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10991 if (err)
10992 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10993 i40e_stat_str(&pf->hw, err),
10994 i40e_aq_str(&pf->hw,
10995 pf->hw.aq.asq_last_status));
10996 }
10997 /* The main driver is (mostly) up and happy. We need to set this state
10998 * before setting up the misc vector or we get a race and the vector
10999 * ends up disabled forever.
11000 */
11001 clear_bit(__I40E_DOWN, &pf->state);
11002
11003 /* In case of MSIX we are going to setup the misc vector right here
11004 * to handle admin queue events etc. In case of legacy and MSI
11005 * the misc functionality and queue processing is combined in
11006 * the same vector and that gets setup at open.
11007 */
11008 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11009 err = i40e_setup_misc_vector(pf);
11010 if (err) {
11011 dev_info(&pdev->dev,
11012 "setup of misc vector failed: %d\n", err);
11013 goto err_vsis;
11014 }
11015 }
11016
11017 #ifdef CONFIG_PCI_IOV
11018 /* prep for VF support */
11019 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11020 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11021 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11022 /* disable link interrupts for VFs */
11023 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11024 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11025 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11026 i40e_flush(hw);
11027
11028 if (pci_num_vf(pdev)) {
11029 dev_info(&pdev->dev,
11030 "Active VFs found, allocating resources.\n");
11031 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11032 if (err)
11033 dev_info(&pdev->dev,
11034 "Error %d allocating resources for existing VFs\n",
11035 err);
11036 }
11037 }
11038 #endif /* CONFIG_PCI_IOV */
11039
11040 pfs_found++;
11041
11042 i40e_dbg_pf_init(pf);
11043
11044 /* tell the firmware that we're starting */
11045 i40e_send_version(pf);
11046
11047 /* since everything's happy, start the service_task timer */
11048 mod_timer(&pf->service_timer,
11049 round_jiffies(jiffies + pf->service_timer_period));
11050
11051 #ifdef I40E_FCOE
11052 /* create FCoE interface */
11053 i40e_fcoe_vsi_setup(pf);
11054
11055 #endif
11056 #define PCI_SPEED_SIZE 8
11057 #define PCI_WIDTH_SIZE 8
11058 /* Devices on the IOSF bus do not have this information
11059 * and will report PCI Gen 1 x 1 by default so don't bother
11060 * checking them.
11061 */
11062 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11063 char speed[PCI_SPEED_SIZE] = "Unknown";
11064 char width[PCI_WIDTH_SIZE] = "Unknown";
11065
11066 /* Get the negotiated link width and speed from PCI config
11067 * space
11068 */
11069 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11070 &link_status);
11071
11072 i40e_set_pci_config_data(hw, link_status);
11073
11074 switch (hw->bus.speed) {
11075 case i40e_bus_speed_8000:
11076 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11077 case i40e_bus_speed_5000:
11078 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11079 case i40e_bus_speed_2500:
11080 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11081 default:
11082 break;
11083 }
11084 switch (hw->bus.width) {
11085 case i40e_bus_width_pcie_x8:
11086 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11087 case i40e_bus_width_pcie_x4:
11088 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11089 case i40e_bus_width_pcie_x2:
11090 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11091 case i40e_bus_width_pcie_x1:
11092 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11093 default:
11094 break;
11095 }
11096
11097 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11098 speed, width);
11099
11100 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11101 hw->bus.speed < i40e_bus_speed_8000) {
11102 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11103 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11104 }
11105 }
11106
11107 /* get the requested speeds from the fw */
11108 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11109 if (err)
11110 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11111 i40e_stat_str(&pf->hw, err),
11112 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11113 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11114
11115 /* get the supported phy types from the fw */
11116 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11117 if (err)
11118 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11119 i40e_stat_str(&pf->hw, err),
11120 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11121 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11122
11123 /* Add a filter to drop all Flow control frames from any VSI from being
11124 * transmitted. By doing so we stop a malicious VF from sending out
11125 * PAUSE or PFC frames and potentially controlling traffic for other
11126 * PF/VF VSIs.
11127 * The FW can still send Flow control frames if enabled.
11128 */
11129 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11130 pf->main_vsi_seid);
11131
11132 /* print a string summarizing features */
11133 i40e_print_features(pf);
11134
11135 return 0;
11136
11137 /* Unwind what we've done if something failed in the setup */
11138 err_vsis:
11139 set_bit(__I40E_DOWN, &pf->state);
11140 i40e_clear_interrupt_scheme(pf);
11141 kfree(pf->vsi);
11142 err_switch_setup:
11143 i40e_reset_interrupt_capability(pf);
11144 del_timer_sync(&pf->service_timer);
11145 err_mac_addr:
11146 err_configure_lan_hmc:
11147 (void)i40e_shutdown_lan_hmc(hw);
11148 err_init_lan_hmc:
11149 kfree(pf->qp_pile);
11150 err_sw_init:
11151 err_adminq_setup:
11152 (void)i40e_shutdown_adminq(hw);
11153 err_pf_reset:
11154 iounmap(hw->hw_addr);
11155 err_ioremap:
11156 kfree(pf);
11157 err_pf_alloc:
11158 pci_disable_pcie_error_reporting(pdev);
11159 pci_release_selected_regions(pdev,
11160 pci_select_bars(pdev, IORESOURCE_MEM));
11161 err_pci_reg:
11162 err_dma:
11163 pci_disable_device(pdev);
11164 return err;
11165 }
11166
11167 /**
11168 * i40e_remove - Device removal routine
11169 * @pdev: PCI device information struct
11170 *
11171 * i40e_remove is called by the PCI subsystem to alert the driver
11172 * that is should release a PCI device. This could be caused by a
11173 * Hot-Plug event, or because the driver is going to be removed from
11174 * memory.
11175 **/
11176 static void i40e_remove(struct pci_dev *pdev)
11177 {
11178 struct i40e_pf *pf = pci_get_drvdata(pdev);
11179 struct i40e_hw *hw = &pf->hw;
11180 i40e_status ret_code;
11181 int i;
11182
11183 i40e_dbg_pf_exit(pf);
11184
11185 i40e_ptp_stop(pf);
11186
11187 /* Disable RSS in hw */
11188 wr32(hw, I40E_PFQF_HENA(0), 0);
11189 wr32(hw, I40E_PFQF_HENA(1), 0);
11190
11191 /* no more scheduling of any task */
11192 set_bit(__I40E_DOWN, &pf->state);
11193 del_timer_sync(&pf->service_timer);
11194 cancel_work_sync(&pf->service_task);
11195
11196 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11197 i40e_free_vfs(pf);
11198 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11199 }
11200
11201 i40e_fdir_teardown(pf);
11202
11203 /* If there is a switch structure or any orphans, remove them.
11204 * This will leave only the PF's VSI remaining.
11205 */
11206 for (i = 0; i < I40E_MAX_VEB; i++) {
11207 if (!pf->veb[i])
11208 continue;
11209
11210 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11211 pf->veb[i]->uplink_seid == 0)
11212 i40e_switch_branch_release(pf->veb[i]);
11213 }
11214
11215 /* Now we can shutdown the PF's VSI, just before we kill
11216 * adminq and hmc.
11217 */
11218 if (pf->vsi[pf->lan_vsi])
11219 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11220
11221 /* shutdown and destroy the HMC */
11222 if (pf->hw.hmc.hmc_obj) {
11223 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11224 if (ret_code)
11225 dev_warn(&pdev->dev,
11226 "Failed to destroy the HMC resources: %d\n",
11227 ret_code);
11228 }
11229
11230 /* shutdown the adminq */
11231 ret_code = i40e_shutdown_adminq(&pf->hw);
11232 if (ret_code)
11233 dev_warn(&pdev->dev,
11234 "Failed to destroy the Admin Queue resources: %d\n",
11235 ret_code);
11236
11237 /* destroy the locks only once, here */
11238 mutex_destroy(&hw->aq.arq_mutex);
11239 mutex_destroy(&hw->aq.asq_mutex);
11240
11241 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11242 i40e_clear_interrupt_scheme(pf);
11243 for (i = 0; i < pf->num_alloc_vsi; i++) {
11244 if (pf->vsi[i]) {
11245 i40e_vsi_clear_rings(pf->vsi[i]);
11246 i40e_vsi_clear(pf->vsi[i]);
11247 pf->vsi[i] = NULL;
11248 }
11249 }
11250
11251 for (i = 0; i < I40E_MAX_VEB; i++) {
11252 kfree(pf->veb[i]);
11253 pf->veb[i] = NULL;
11254 }
11255
11256 kfree(pf->qp_pile);
11257 kfree(pf->vsi);
11258
11259 iounmap(pf->hw.hw_addr);
11260 kfree(pf);
11261 pci_release_selected_regions(pdev,
11262 pci_select_bars(pdev, IORESOURCE_MEM));
11263
11264 pci_disable_pcie_error_reporting(pdev);
11265 pci_disable_device(pdev);
11266 }
11267
11268 /**
11269 * i40e_pci_error_detected - warning that something funky happened in PCI land
11270 * @pdev: PCI device information struct
11271 *
11272 * Called to warn that something happened and the error handling steps
11273 * are in progress. Allows the driver to quiesce things, be ready for
11274 * remediation.
11275 **/
11276 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11277 enum pci_channel_state error)
11278 {
11279 struct i40e_pf *pf = pci_get_drvdata(pdev);
11280
11281 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11282
11283 /* shutdown all operations */
11284 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11285 rtnl_lock();
11286 i40e_prep_for_reset(pf);
11287 rtnl_unlock();
11288 }
11289
11290 /* Request a slot reset */
11291 return PCI_ERS_RESULT_NEED_RESET;
11292 }
11293
11294 /**
11295 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11296 * @pdev: PCI device information struct
11297 *
11298 * Called to find if the driver can work with the device now that
11299 * the pci slot has been reset. If a basic connection seems good
11300 * (registers are readable and have sane content) then return a
11301 * happy little PCI_ERS_RESULT_xxx.
11302 **/
11303 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11304 {
11305 struct i40e_pf *pf = pci_get_drvdata(pdev);
11306 pci_ers_result_t result;
11307 int err;
11308 u32 reg;
11309
11310 dev_dbg(&pdev->dev, "%s\n", __func__);
11311 if (pci_enable_device_mem(pdev)) {
11312 dev_info(&pdev->dev,
11313 "Cannot re-enable PCI device after reset.\n");
11314 result = PCI_ERS_RESULT_DISCONNECT;
11315 } else {
11316 pci_set_master(pdev);
11317 pci_restore_state(pdev);
11318 pci_save_state(pdev);
11319 pci_wake_from_d3(pdev, false);
11320
11321 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11322 if (reg == 0)
11323 result = PCI_ERS_RESULT_RECOVERED;
11324 else
11325 result = PCI_ERS_RESULT_DISCONNECT;
11326 }
11327
11328 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11329 if (err) {
11330 dev_info(&pdev->dev,
11331 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11332 err);
11333 /* non-fatal, continue */
11334 }
11335
11336 return result;
11337 }
11338
11339 /**
11340 * i40e_pci_error_resume - restart operations after PCI error recovery
11341 * @pdev: PCI device information struct
11342 *
11343 * Called to allow the driver to bring things back up after PCI error
11344 * and/or reset recovery has finished.
11345 **/
11346 static void i40e_pci_error_resume(struct pci_dev *pdev)
11347 {
11348 struct i40e_pf *pf = pci_get_drvdata(pdev);
11349
11350 dev_dbg(&pdev->dev, "%s\n", __func__);
11351 if (test_bit(__I40E_SUSPENDED, &pf->state))
11352 return;
11353
11354 rtnl_lock();
11355 i40e_handle_reset_warning(pf);
11356 rtnl_unlock();
11357 }
11358
11359 /**
11360 * i40e_shutdown - PCI callback for shutting down
11361 * @pdev: PCI device information struct
11362 **/
11363 static void i40e_shutdown(struct pci_dev *pdev)
11364 {
11365 struct i40e_pf *pf = pci_get_drvdata(pdev);
11366 struct i40e_hw *hw = &pf->hw;
11367
11368 set_bit(__I40E_SUSPENDED, &pf->state);
11369 set_bit(__I40E_DOWN, &pf->state);
11370 rtnl_lock();
11371 i40e_prep_for_reset(pf);
11372 rtnl_unlock();
11373
11374 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11375 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11376
11377 del_timer_sync(&pf->service_timer);
11378 cancel_work_sync(&pf->service_task);
11379 i40e_fdir_teardown(pf);
11380
11381 rtnl_lock();
11382 i40e_prep_for_reset(pf);
11383 rtnl_unlock();
11384
11385 wr32(hw, I40E_PFPM_APM,
11386 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11387 wr32(hw, I40E_PFPM_WUFC,
11388 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11389
11390 i40e_clear_interrupt_scheme(pf);
11391
11392 if (system_state == SYSTEM_POWER_OFF) {
11393 pci_wake_from_d3(pdev, pf->wol_en);
11394 pci_set_power_state(pdev, PCI_D3hot);
11395 }
11396 }
11397
11398 #ifdef CONFIG_PM
11399 /**
11400 * i40e_suspend - PCI callback for moving to D3
11401 * @pdev: PCI device information struct
11402 **/
11403 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11404 {
11405 struct i40e_pf *pf = pci_get_drvdata(pdev);
11406 struct i40e_hw *hw = &pf->hw;
11407
11408 set_bit(__I40E_SUSPENDED, &pf->state);
11409 set_bit(__I40E_DOWN, &pf->state);
11410
11411 rtnl_lock();
11412 i40e_prep_for_reset(pf);
11413 rtnl_unlock();
11414
11415 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11416 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11417
11418 pci_wake_from_d3(pdev, pf->wol_en);
11419 pci_set_power_state(pdev, PCI_D3hot);
11420
11421 return 0;
11422 }
11423
11424 /**
11425 * i40e_resume - PCI callback for waking up from D3
11426 * @pdev: PCI device information struct
11427 **/
11428 static int i40e_resume(struct pci_dev *pdev)
11429 {
11430 struct i40e_pf *pf = pci_get_drvdata(pdev);
11431 u32 err;
11432
11433 pci_set_power_state(pdev, PCI_D0);
11434 pci_restore_state(pdev);
11435 /* pci_restore_state() clears dev->state_saves, so
11436 * call pci_save_state() again to restore it.
11437 */
11438 pci_save_state(pdev);
11439
11440 err = pci_enable_device_mem(pdev);
11441 if (err) {
11442 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11443 return err;
11444 }
11445 pci_set_master(pdev);
11446
11447 /* no wakeup events while running */
11448 pci_wake_from_d3(pdev, false);
11449
11450 /* handling the reset will rebuild the device state */
11451 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11452 clear_bit(__I40E_DOWN, &pf->state);
11453 rtnl_lock();
11454 i40e_reset_and_rebuild(pf, false);
11455 rtnl_unlock();
11456 }
11457
11458 return 0;
11459 }
11460
11461 #endif
11462 static const struct pci_error_handlers i40e_err_handler = {
11463 .error_detected = i40e_pci_error_detected,
11464 .slot_reset = i40e_pci_error_slot_reset,
11465 .resume = i40e_pci_error_resume,
11466 };
11467
11468 static struct pci_driver i40e_driver = {
11469 .name = i40e_driver_name,
11470 .id_table = i40e_pci_tbl,
11471 .probe = i40e_probe,
11472 .remove = i40e_remove,
11473 #ifdef CONFIG_PM
11474 .suspend = i40e_suspend,
11475 .resume = i40e_resume,
11476 #endif
11477 .shutdown = i40e_shutdown,
11478 .err_handler = &i40e_err_handler,
11479 .sriov_configure = i40e_pci_sriov_configure,
11480 };
11481
11482 /**
11483 * i40e_init_module - Driver registration routine
11484 *
11485 * i40e_init_module is the first routine called when the driver is
11486 * loaded. All it does is register with the PCI subsystem.
11487 **/
11488 static int __init i40e_init_module(void)
11489 {
11490 pr_info("%s: %s - version %s\n", i40e_driver_name,
11491 i40e_driver_string, i40e_driver_version_str);
11492 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11493
11494 /* we will see if single thread per module is enough for now,
11495 * it can't be any worse than using the system workqueue which
11496 * was already single threaded
11497 */
11498 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11499 if (!i40e_wq) {
11500 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11501 return -ENOMEM;
11502 }
11503
11504 i40e_dbg_init();
11505 return pci_register_driver(&i40e_driver);
11506 }
11507 module_init(i40e_init_module);
11508
11509 /**
11510 * i40e_exit_module - Driver exit cleanup routine
11511 *
11512 * i40e_exit_module is called just before the driver is removed
11513 * from memory.
11514 **/
11515 static void __exit i40e_exit_module(void)
11516 {
11517 pci_unregister_driver(&i40e_driver);
11518 destroy_workqueue(i40e_wq);
11519 i40e_dbg_exit();
11520 }
11521 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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