1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, see <http://www.gnu.org/licenses/>.
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *******************************************************************************/
27 #include <linux/if_ether.h>
28 #include <linux/delay.h>
30 #include "e1000_mac.h"
31 #include "e1000_nvm.h"
34 * igb_raise_eec_clk - Raise EEPROM clock
35 * @hw: pointer to the HW structure
36 * @eecd: pointer to the EEPROM
38 * Enable/Raise the EEPROM clock bit.
40 static void igb_raise_eec_clk(struct e1000_hw
*hw
, u32
*eecd
)
42 *eecd
= *eecd
| E1000_EECD_SK
;
43 wr32(E1000_EECD
, *eecd
);
45 udelay(hw
->nvm
.delay_usec
);
49 * igb_lower_eec_clk - Lower EEPROM clock
50 * @hw: pointer to the HW structure
51 * @eecd: pointer to the EEPROM
53 * Clear/Lower the EEPROM clock bit.
55 static void igb_lower_eec_clk(struct e1000_hw
*hw
, u32
*eecd
)
57 *eecd
= *eecd
& ~E1000_EECD_SK
;
58 wr32(E1000_EECD
, *eecd
);
60 udelay(hw
->nvm
.delay_usec
);
64 * igb_shift_out_eec_bits - Shift data bits our to the EEPROM
65 * @hw: pointer to the HW structure
66 * @data: data to send to the EEPROM
67 * @count: number of bits to shift out
69 * We need to shift 'count' bits out to the EEPROM. So, the value in the
70 * "data" parameter will be shifted out to the EEPROM one bit at a time.
71 * In order to do this, "data" must be broken down into bits.
73 static void igb_shift_out_eec_bits(struct e1000_hw
*hw
, u16 data
, u16 count
)
75 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
76 u32 eecd
= rd32(E1000_EECD
);
79 mask
= 0x01 << (count
- 1);
80 if (nvm
->type
== e1000_nvm_eeprom_spi
)
81 eecd
|= E1000_EECD_DO
;
84 eecd
&= ~E1000_EECD_DI
;
87 eecd
|= E1000_EECD_DI
;
89 wr32(E1000_EECD
, eecd
);
92 udelay(nvm
->delay_usec
);
94 igb_raise_eec_clk(hw
, &eecd
);
95 igb_lower_eec_clk(hw
, &eecd
);
100 eecd
&= ~E1000_EECD_DI
;
101 wr32(E1000_EECD
, eecd
);
105 * igb_shift_in_eec_bits - Shift data bits in from the EEPROM
106 * @hw: pointer to the HW structure
107 * @count: number of bits to shift in
109 * In order to read a register from the EEPROM, we need to shift 'count' bits
110 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
111 * the EEPROM (setting the SK bit), and then reading the value of the data out
112 * "DO" bit. During this "shifting in" process the data in "DI" bit should
115 static u16
igb_shift_in_eec_bits(struct e1000_hw
*hw
, u16 count
)
121 eecd
= rd32(E1000_EECD
);
123 eecd
&= ~(E1000_EECD_DO
| E1000_EECD_DI
);
126 for (i
= 0; i
< count
; i
++) {
128 igb_raise_eec_clk(hw
, &eecd
);
130 eecd
= rd32(E1000_EECD
);
132 eecd
&= ~E1000_EECD_DI
;
133 if (eecd
& E1000_EECD_DO
)
136 igb_lower_eec_clk(hw
, &eecd
);
143 * igb_poll_eerd_eewr_done - Poll for EEPROM read/write completion
144 * @hw: pointer to the HW structure
145 * @ee_reg: EEPROM flag for polling
147 * Polls the EEPROM status bit for either read or write completion based
148 * upon the value of 'ee_reg'.
150 static s32
igb_poll_eerd_eewr_done(struct e1000_hw
*hw
, int ee_reg
)
152 u32 attempts
= 100000;
154 s32 ret_val
= -E1000_ERR_NVM
;
156 for (i
= 0; i
< attempts
; i
++) {
157 if (ee_reg
== E1000_NVM_POLL_READ
)
158 reg
= rd32(E1000_EERD
);
160 reg
= rd32(E1000_EEWR
);
162 if (reg
& E1000_NVM_RW_REG_DONE
) {
174 * igb_acquire_nvm - Generic request for access to EEPROM
175 * @hw: pointer to the HW structure
177 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
178 * Return successful if access grant bit set, else clear the request for
179 * EEPROM access and return -E1000_ERR_NVM (-1).
181 s32
igb_acquire_nvm(struct e1000_hw
*hw
)
183 u32 eecd
= rd32(E1000_EECD
);
184 s32 timeout
= E1000_NVM_GRANT_ATTEMPTS
;
188 wr32(E1000_EECD
, eecd
| E1000_EECD_REQ
);
189 eecd
= rd32(E1000_EECD
);
192 if (eecd
& E1000_EECD_GNT
)
195 eecd
= rd32(E1000_EECD
);
200 eecd
&= ~E1000_EECD_REQ
;
201 wr32(E1000_EECD
, eecd
);
202 hw_dbg("Could not acquire NVM grant\n");
203 ret_val
= -E1000_ERR_NVM
;
210 * igb_standby_nvm - Return EEPROM to standby state
211 * @hw: pointer to the HW structure
213 * Return the EEPROM to a standby state.
215 static void igb_standby_nvm(struct e1000_hw
*hw
)
217 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
218 u32 eecd
= rd32(E1000_EECD
);
220 if (nvm
->type
== e1000_nvm_eeprom_spi
) {
221 /* Toggle CS to flush commands */
222 eecd
|= E1000_EECD_CS
;
223 wr32(E1000_EECD
, eecd
);
225 udelay(nvm
->delay_usec
);
226 eecd
&= ~E1000_EECD_CS
;
227 wr32(E1000_EECD
, eecd
);
229 udelay(nvm
->delay_usec
);
234 * e1000_stop_nvm - Terminate EEPROM command
235 * @hw: pointer to the HW structure
237 * Terminates the current command by inverting the EEPROM's chip select pin.
239 static void e1000_stop_nvm(struct e1000_hw
*hw
)
243 eecd
= rd32(E1000_EECD
);
244 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
) {
246 eecd
|= E1000_EECD_CS
;
247 igb_lower_eec_clk(hw
, &eecd
);
252 * igb_release_nvm - Release exclusive access to EEPROM
253 * @hw: pointer to the HW structure
255 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
257 void igb_release_nvm(struct e1000_hw
*hw
)
263 eecd
= rd32(E1000_EECD
);
264 eecd
&= ~E1000_EECD_REQ
;
265 wr32(E1000_EECD
, eecd
);
269 * igb_ready_nvm_eeprom - Prepares EEPROM for read/write
270 * @hw: pointer to the HW structure
272 * Setups the EEPROM for reading and writing.
274 static s32
igb_ready_nvm_eeprom(struct e1000_hw
*hw
)
276 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
277 u32 eecd
= rd32(E1000_EECD
);
283 if (nvm
->type
== e1000_nvm_eeprom_spi
) {
284 /* Clear SK and CS */
285 eecd
&= ~(E1000_EECD_CS
| E1000_EECD_SK
);
286 wr32(E1000_EECD
, eecd
);
289 timeout
= NVM_MAX_RETRY_SPI
;
291 /* Read "Status Register" repeatedly until the LSB is cleared.
292 * The EEPROM will signal that the command has been completed
293 * by clearing bit 0 of the internal status register. If it's
294 * not cleared within 'timeout', then error out.
297 igb_shift_out_eec_bits(hw
, NVM_RDSR_OPCODE_SPI
,
298 hw
->nvm
.opcode_bits
);
299 spi_stat_reg
= (u8
)igb_shift_in_eec_bits(hw
, 8);
300 if (!(spi_stat_reg
& NVM_STATUS_RDY_SPI
))
309 hw_dbg("SPI NVM Status error\n");
310 ret_val
= -E1000_ERR_NVM
;
320 * igb_read_nvm_spi - Read EEPROM's using SPI
321 * @hw: pointer to the HW structure
322 * @offset: offset of word in the EEPROM to read
323 * @words: number of words to read
324 * @data: word read from the EEPROM
326 * Reads a 16 bit word from the EEPROM.
328 s32
igb_read_nvm_spi(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
330 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
334 u8 read_opcode
= NVM_READ_OPCODE_SPI
;
336 /* A check for invalid values: offset too large, too many words,
337 * and not enough words.
339 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
341 hw_dbg("nvm parameter(s) out of bounds\n");
342 ret_val
= -E1000_ERR_NVM
;
346 ret_val
= nvm
->ops
.acquire(hw
);
350 ret_val
= igb_ready_nvm_eeprom(hw
);
356 if ((nvm
->address_bits
== 8) && (offset
>= 128))
357 read_opcode
|= NVM_A8_OPCODE_SPI
;
359 /* Send the READ command (opcode + addr) */
360 igb_shift_out_eec_bits(hw
, read_opcode
, nvm
->opcode_bits
);
361 igb_shift_out_eec_bits(hw
, (u16
)(offset
*2), nvm
->address_bits
);
363 /* Read the data. SPI NVMs increment the address with each byte
364 * read and will roll over if reading beyond the end. This allows
365 * us to read the whole NVM from any offset
367 for (i
= 0; i
< words
; i
++) {
368 word_in
= igb_shift_in_eec_bits(hw
, 16);
369 data
[i
] = (word_in
>> 8) | (word_in
<< 8);
373 nvm
->ops
.release(hw
);
380 * igb_read_nvm_eerd - Reads EEPROM using EERD register
381 * @hw: pointer to the HW structure
382 * @offset: offset of word in the EEPROM to read
383 * @words: number of words to read
384 * @data: word read from the EEPROM
386 * Reads a 16 bit word from the EEPROM using the EERD register.
388 s32
igb_read_nvm_eerd(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
390 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
394 /* A check for invalid values: offset too large, too many words,
395 * and not enough words.
397 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
399 hw_dbg("nvm parameter(s) out of bounds\n");
400 ret_val
= -E1000_ERR_NVM
;
404 for (i
= 0; i
< words
; i
++) {
405 eerd
= ((offset
+i
) << E1000_NVM_RW_ADDR_SHIFT
) +
406 E1000_NVM_RW_REG_START
;
408 wr32(E1000_EERD
, eerd
);
409 ret_val
= igb_poll_eerd_eewr_done(hw
, E1000_NVM_POLL_READ
);
413 data
[i
] = (rd32(E1000_EERD
) >>
414 E1000_NVM_RW_REG_DATA
);
422 * igb_write_nvm_spi - Write to EEPROM using SPI
423 * @hw: pointer to the HW structure
424 * @offset: offset within the EEPROM to be written to
425 * @words: number of words to write
426 * @data: 16 bit word(s) to be written to the EEPROM
428 * Writes data to EEPROM at offset using SPI interface.
430 * If e1000_update_nvm_checksum is not called after this function , the
431 * EEPROM will most likley contain an invalid checksum.
433 s32
igb_write_nvm_spi(struct e1000_hw
*hw
, u16 offset
, u16 words
, u16
*data
)
435 struct e1000_nvm_info
*nvm
= &hw
->nvm
;
436 s32 ret_val
= -E1000_ERR_NVM
;
439 /* A check for invalid values: offset too large, too many words,
440 * and not enough words.
442 if ((offset
>= nvm
->word_size
) || (words
> (nvm
->word_size
- offset
)) ||
444 hw_dbg("nvm parameter(s) out of bounds\n");
448 while (widx
< words
) {
449 u8 write_opcode
= NVM_WRITE_OPCODE_SPI
;
451 ret_val
= nvm
->ops
.acquire(hw
);
455 ret_val
= igb_ready_nvm_eeprom(hw
);
457 nvm
->ops
.release(hw
);
463 /* Send the WRITE ENABLE command (8 bit opcode) */
464 igb_shift_out_eec_bits(hw
, NVM_WREN_OPCODE_SPI
,
469 /* Some SPI eeproms use the 8th address bit embedded in the
472 if ((nvm
->address_bits
== 8) && (offset
>= 128))
473 write_opcode
|= NVM_A8_OPCODE_SPI
;
475 /* Send the Write command (8-bit opcode + addr) */
476 igb_shift_out_eec_bits(hw
, write_opcode
, nvm
->opcode_bits
);
477 igb_shift_out_eec_bits(hw
, (u16
)((offset
+ widx
) * 2),
480 /* Loop to allow for up to whole page write of eeprom */
481 while (widx
< words
) {
482 u16 word_out
= data
[widx
];
483 word_out
= (word_out
>> 8) | (word_out
<< 8);
484 igb_shift_out_eec_bits(hw
, word_out
, 16);
487 if ((((offset
+ widx
) * 2) % nvm
->page_size
) == 0) {
492 usleep_range(1000, 2000);
493 nvm
->ops
.release(hw
);
500 * igb_read_part_string - Read device part number
501 * @hw: pointer to the HW structure
502 * @part_num: pointer to device part number
503 * @part_num_size: size of part number buffer
505 * Reads the product board assembly (PBA) number from the EEPROM and stores
506 * the value in part_num.
508 s32
igb_read_part_string(struct e1000_hw
*hw
, u8
*part_num
, u32 part_num_size
)
516 if (part_num
== NULL
) {
517 hw_dbg("PBA string buffer was null\n");
518 ret_val
= E1000_ERR_INVALID_ARGUMENT
;
522 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_0
, 1, &nvm_data
);
524 hw_dbg("NVM Read Error\n");
528 ret_val
= hw
->nvm
.ops
.read(hw
, NVM_PBA_OFFSET_1
, 1, &pointer
);
530 hw_dbg("NVM Read Error\n");
534 /* if nvm_data is not ptr guard the PBA must be in legacy format which
535 * means pointer is actually our second data word for the PBA number
536 * and we can decode it into an ascii string
538 if (nvm_data
!= NVM_PBA_PTR_GUARD
) {
539 hw_dbg("NVM PBA number is not stored as string\n");
541 /* we will need 11 characters to store the PBA */
542 if (part_num_size
< 11) {
543 hw_dbg("PBA string buffer too small\n");
544 return E1000_ERR_NO_SPACE
;
547 /* extract hex string from data and pointer */
548 part_num
[0] = (nvm_data
>> 12) & 0xF;
549 part_num
[1] = (nvm_data
>> 8) & 0xF;
550 part_num
[2] = (nvm_data
>> 4) & 0xF;
551 part_num
[3] = nvm_data
& 0xF;
552 part_num
[4] = (pointer
>> 12) & 0xF;
553 part_num
[5] = (pointer
>> 8) & 0xF;
556 part_num
[8] = (pointer
>> 4) & 0xF;
557 part_num
[9] = pointer
& 0xF;
559 /* put a null character on the end of our string */
562 /* switch all the data but the '-' to hex char */
563 for (offset
= 0; offset
< 10; offset
++) {
564 if (part_num
[offset
] < 0xA)
565 part_num
[offset
] += '0';
566 else if (part_num
[offset
] < 0x10)
567 part_num
[offset
] += 'A' - 0xA;
573 ret_val
= hw
->nvm
.ops
.read(hw
, pointer
, 1, &length
);
575 hw_dbg("NVM Read Error\n");
579 if (length
== 0xFFFF || length
== 0) {
580 hw_dbg("NVM PBA number section invalid length\n");
581 ret_val
= E1000_ERR_NVM_PBA_SECTION
;
584 /* check if part_num buffer is big enough */
585 if (part_num_size
< (((u32
)length
* 2) - 1)) {
586 hw_dbg("PBA string buffer too small\n");
587 ret_val
= E1000_ERR_NO_SPACE
;
591 /* trim pba length from start of string */
595 for (offset
= 0; offset
< length
; offset
++) {
596 ret_val
= hw
->nvm
.ops
.read(hw
, pointer
+ offset
, 1, &nvm_data
);
598 hw_dbg("NVM Read Error\n");
601 part_num
[offset
* 2] = (u8
)(nvm_data
>> 8);
602 part_num
[(offset
* 2) + 1] = (u8
)(nvm_data
& 0xFF);
604 part_num
[offset
* 2] = '\0';
611 * igb_read_mac_addr - Read device MAC address
612 * @hw: pointer to the HW structure
614 * Reads the device MAC address from the EEPROM and stores the value.
615 * Since devices with two ports use the same EEPROM, we increment the
616 * last bit in the MAC address for the second port.
618 s32
igb_read_mac_addr(struct e1000_hw
*hw
)
624 rar_high
= rd32(E1000_RAH(0));
625 rar_low
= rd32(E1000_RAL(0));
627 for (i
= 0; i
< E1000_RAL_MAC_ADDR_LEN
; i
++)
628 hw
->mac
.perm_addr
[i
] = (u8
)(rar_low
>> (i
*8));
630 for (i
= 0; i
< E1000_RAH_MAC_ADDR_LEN
; i
++)
631 hw
->mac
.perm_addr
[i
+4] = (u8
)(rar_high
>> (i
*8));
633 for (i
= 0; i
< ETH_ALEN
; i
++)
634 hw
->mac
.addr
[i
] = hw
->mac
.perm_addr
[i
];
640 * igb_validate_nvm_checksum - Validate EEPROM checksum
641 * @hw: pointer to the HW structure
643 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
644 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
646 s32
igb_validate_nvm_checksum(struct e1000_hw
*hw
)
652 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
653 ret_val
= hw
->nvm
.ops
.read(hw
, i
, 1, &nvm_data
);
655 hw_dbg("NVM Read Error\n");
658 checksum
+= nvm_data
;
661 if (checksum
!= (u16
) NVM_SUM
) {
662 hw_dbg("NVM Checksum Invalid\n");
663 ret_val
= -E1000_ERR_NVM
;
672 * igb_update_nvm_checksum - Update EEPROM checksum
673 * @hw: pointer to the HW structure
675 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
676 * up to the checksum. Then calculates the EEPROM checksum and writes the
677 * value to the EEPROM.
679 s32
igb_update_nvm_checksum(struct e1000_hw
*hw
)
685 for (i
= 0; i
< NVM_CHECKSUM_REG
; i
++) {
686 ret_val
= hw
->nvm
.ops
.read(hw
, i
, 1, &nvm_data
);
688 hw_dbg("NVM Read Error while updating checksum.\n");
691 checksum
+= nvm_data
;
693 checksum
= (u16
) NVM_SUM
- checksum
;
694 ret_val
= hw
->nvm
.ops
.write(hw
, NVM_CHECKSUM_REG
, 1, &checksum
);
696 hw_dbg("NVM Write Error while updating checksum.\n");
703 * igb_get_fw_version - Get firmware version information
704 * @hw: pointer to the HW structure
705 * @fw_vers: pointer to output structure
707 * unsupported MAC types will return all 0 version structure
709 void igb_get_fw_version(struct e1000_hw
*hw
, struct e1000_fw_version
*fw_vers
)
711 u16 eeprom_verh
, eeprom_verl
, etrack_test
, fw_version
;
712 u8 q
, hval
, rem
, result
;
713 u16 comb_verh
, comb_verl
, comb_offset
;
715 memset(fw_vers
, 0, sizeof(struct e1000_fw_version
));
717 /* basic eeprom version numbers and bits used vary by part and by tool
718 * used to create the nvm images. Check which data format we have.
720 hw
->nvm
.ops
.read(hw
, NVM_ETRACK_HIWORD
, 1, &etrack_test
);
721 switch (hw
->mac
.type
) {
723 igb_read_invm_version(hw
, fw_vers
);
728 /* Use this format, unless EETRACK ID exists,
729 * then use alternate format
731 if ((etrack_test
& NVM_MAJOR_MASK
) != NVM_ETRACK_VALID
) {
732 hw
->nvm
.ops
.read(hw
, NVM_VERSION
, 1, &fw_version
);
733 fw_vers
->eep_major
= (fw_version
& NVM_MAJOR_MASK
)
735 fw_vers
->eep_minor
= (fw_version
& NVM_MINOR_MASK
)
737 fw_vers
->eep_build
= (fw_version
& NVM_IMAGE_ID_MASK
);
742 if (!(igb_get_flash_presence_i210(hw
))) {
743 igb_read_invm_version(hw
, fw_vers
);
748 /* find combo image version */
749 hw
->nvm
.ops
.read(hw
, NVM_COMB_VER_PTR
, 1, &comb_offset
);
750 if ((comb_offset
!= 0x0) &&
751 (comb_offset
!= NVM_VER_INVALID
)) {
753 hw
->nvm
.ops
.read(hw
, (NVM_COMB_VER_OFF
+ comb_offset
754 + 1), 1, &comb_verh
);
755 hw
->nvm
.ops
.read(hw
, (NVM_COMB_VER_OFF
+ comb_offset
),
758 /* get Option Rom version if it exists and is valid */
759 if ((comb_verh
&& comb_verl
) &&
760 ((comb_verh
!= NVM_VER_INVALID
) &&
761 (comb_verl
!= NVM_VER_INVALID
))) {
763 fw_vers
->or_valid
= true;
765 comb_verl
>> NVM_COMB_VER_SHFT
;
767 (comb_verl
<< NVM_COMB_VER_SHFT
)
768 | (comb_verh
>> NVM_COMB_VER_SHFT
);
770 comb_verh
& NVM_COMB_VER_MASK
;
777 hw
->nvm
.ops
.read(hw
, NVM_VERSION
, 1, &fw_version
);
778 fw_vers
->eep_major
= (fw_version
& NVM_MAJOR_MASK
)
781 /* check for old style version format in newer images*/
782 if ((fw_version
& NVM_NEW_DEC_MASK
) == 0x0) {
783 eeprom_verl
= (fw_version
& NVM_COMB_VER_MASK
);
785 eeprom_verl
= (fw_version
& NVM_MINOR_MASK
)
788 /* Convert minor value to hex before assigning to output struct
789 * Val to be converted will not be higher than 99, per tool output
791 q
= eeprom_verl
/ NVM_HEX_CONV
;
792 hval
= q
* NVM_HEX_TENS
;
793 rem
= eeprom_verl
% NVM_HEX_CONV
;
795 fw_vers
->eep_minor
= result
;
798 if ((etrack_test
& NVM_MAJOR_MASK
) == NVM_ETRACK_VALID
) {
799 hw
->nvm
.ops
.read(hw
, NVM_ETRACK_WORD
, 1, &eeprom_verl
);
800 hw
->nvm
.ops
.read(hw
, (NVM_ETRACK_WORD
+ 1), 1, &eeprom_verh
);
801 fw_vers
->etrack_id
= (eeprom_verh
<< NVM_ETRACK_SHIFT
)