1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 /* ethtool support for ixgbe */
31 #include <linux/interrupt.h>
32 #include <linux/types.h>
33 #include <linux/module.h>
34 #include <linux/slab.h>
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/ethtool.h>
38 #include <linux/vmalloc.h>
39 #include <linux/highmem.h>
40 #include <linux/uaccess.h>
43 #include "ixgbe_phy.h"
46 #define IXGBE_ALL_RAR_ENTRIES 16
48 enum {NETDEV_STATS
, IXGBE_STATS
};
51 char stat_string
[ETH_GSTRING_LEN
];
57 #define IXGBE_STAT(m) IXGBE_STATS, \
58 sizeof(((struct ixgbe_adapter *)0)->m), \
59 offsetof(struct ixgbe_adapter, m)
60 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
61 sizeof(((struct rtnl_link_stats64 *)0)->m), \
62 offsetof(struct rtnl_link_stats64, m)
64 static const struct ixgbe_stats ixgbe_gstrings_stats
[] = {
65 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets
)},
66 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets
)},
67 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes
)},
68 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes
)},
69 {"rx_pkts_nic", IXGBE_STAT(stats
.gprc
)},
70 {"tx_pkts_nic", IXGBE_STAT(stats
.gptc
)},
71 {"rx_bytes_nic", IXGBE_STAT(stats
.gorc
)},
72 {"tx_bytes_nic", IXGBE_STAT(stats
.gotc
)},
73 {"lsc_int", IXGBE_STAT(lsc_int
)},
74 {"tx_busy", IXGBE_STAT(tx_busy
)},
75 {"non_eop_descs", IXGBE_STAT(non_eop_descs
)},
76 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors
)},
77 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors
)},
78 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped
)},
79 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped
)},
80 {"multicast", IXGBE_NETDEV_STAT(multicast
)},
81 {"broadcast", IXGBE_STAT(stats
.bprc
)},
82 {"rx_no_buffer_count", IXGBE_STAT(stats
.rnbc
[0]) },
83 {"collisions", IXGBE_NETDEV_STAT(collisions
)},
84 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors
)},
85 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors
)},
86 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors
)},
87 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count
)},
88 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush
)},
89 {"fdir_match", IXGBE_STAT(stats
.fdirmatch
)},
90 {"fdir_miss", IXGBE_STAT(stats
.fdirmiss
)},
91 {"fdir_overflow", IXGBE_STAT(fdir_overflow
)},
92 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors
)},
93 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors
)},
94 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors
)},
95 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors
)},
96 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors
)},
97 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors
)},
98 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count
)},
99 {"tx_restart_queue", IXGBE_STAT(restart_queue
)},
100 {"rx_long_length_errors", IXGBE_STAT(stats
.roc
)},
101 {"rx_short_length_errors", IXGBE_STAT(stats
.ruc
)},
102 {"tx_flow_control_xon", IXGBE_STAT(stats
.lxontxc
)},
103 {"rx_flow_control_xon", IXGBE_STAT(stats
.lxonrxc
)},
104 {"tx_flow_control_xoff", IXGBE_STAT(stats
.lxofftxc
)},
105 {"rx_flow_control_xoff", IXGBE_STAT(stats
.lxoffrxc
)},
106 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error
)},
107 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed
)},
108 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed
)},
109 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources
)},
110 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats
.o2bgptc
)},
111 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats
.b2ospc
)},
112 {"os2bmc_tx_by_host", IXGBE_STAT(stats
.o2bspc
)},
113 {"os2bmc_rx_by_host", IXGBE_STAT(stats
.b2ogprc
)},
115 {"fcoe_bad_fccrc", IXGBE_STAT(stats
.fccrc
)},
116 {"rx_fcoe_dropped", IXGBE_STAT(stats
.fcoerpdc
)},
117 {"rx_fcoe_packets", IXGBE_STAT(stats
.fcoeprc
)},
118 {"rx_fcoe_dwords", IXGBE_STAT(stats
.fcoedwrc
)},
119 {"fcoe_noddp", IXGBE_STAT(stats
.fcoe_noddp
)},
120 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats
.fcoe_noddp_ext_buff
)},
121 {"tx_fcoe_packets", IXGBE_STAT(stats
.fcoeptc
)},
122 {"tx_fcoe_dwords", IXGBE_STAT(stats
.fcoedwtc
)},
123 #endif /* IXGBE_FCOE */
126 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
127 * we set the num_rx_queues to evaluate to num_tx_queues. This is
128 * used because we do not have a good way to get the max number of
129 * rx queues with CONFIG_RPS disabled.
131 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
133 #define IXGBE_QUEUE_STATS_LEN ( \
134 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
135 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
136 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
137 #define IXGBE_PB_STATS_LEN ( \
138 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
139 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
140 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
141 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
143 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
144 IXGBE_PB_STATS_LEN + \
145 IXGBE_QUEUE_STATS_LEN)
147 static const char ixgbe_gstrings_test
[][ETH_GSTRING_LEN
] = {
148 "Register test (offline)", "Eeprom test (offline)",
149 "Interrupt test (offline)", "Loopback test (offline)",
150 "Link test (on/offline)"
152 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
154 static int ixgbe_get_settings(struct net_device
*netdev
,
155 struct ethtool_cmd
*ecmd
)
157 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
158 struct ixgbe_hw
*hw
= &adapter
->hw
;
159 ixgbe_link_speed supported_link
;
161 bool autoneg
= false;
164 hw
->mac
.ops
.get_link_capabilities(hw
, &supported_link
, &autoneg
);
166 /* set the supported link speeds */
167 if (supported_link
& IXGBE_LINK_SPEED_10GB_FULL
)
168 ecmd
->supported
|= SUPPORTED_10000baseT_Full
;
169 if (supported_link
& IXGBE_LINK_SPEED_1GB_FULL
)
170 ecmd
->supported
|= SUPPORTED_1000baseT_Full
;
171 if (supported_link
& IXGBE_LINK_SPEED_100_FULL
)
172 ecmd
->supported
|= SUPPORTED_100baseT_Full
;
174 /* set the advertised speeds */
175 if (hw
->phy
.autoneg_advertised
) {
176 if (hw
->phy
.autoneg_advertised
& IXGBE_LINK_SPEED_100_FULL
)
177 ecmd
->advertising
|= ADVERTISED_100baseT_Full
;
178 if (hw
->phy
.autoneg_advertised
& IXGBE_LINK_SPEED_10GB_FULL
)
179 ecmd
->advertising
|= ADVERTISED_10000baseT_Full
;
180 if (hw
->phy
.autoneg_advertised
& IXGBE_LINK_SPEED_1GB_FULL
)
181 ecmd
->advertising
|= ADVERTISED_1000baseT_Full
;
183 /* default modes in case phy.autoneg_advertised isn't set */
184 if (supported_link
& IXGBE_LINK_SPEED_10GB_FULL
)
185 ecmd
->advertising
|= ADVERTISED_10000baseT_Full
;
186 if (supported_link
& IXGBE_LINK_SPEED_1GB_FULL
)
187 ecmd
->advertising
|= ADVERTISED_1000baseT_Full
;
188 if (supported_link
& IXGBE_LINK_SPEED_100_FULL
)
189 ecmd
->advertising
|= ADVERTISED_100baseT_Full
;
191 if (hw
->phy
.multispeed_fiber
&& !autoneg
) {
192 if (supported_link
& IXGBE_LINK_SPEED_10GB_FULL
)
193 ecmd
->advertising
= ADVERTISED_10000baseT_Full
;
198 ecmd
->supported
|= SUPPORTED_Autoneg
;
199 ecmd
->advertising
|= ADVERTISED_Autoneg
;
200 ecmd
->autoneg
= AUTONEG_ENABLE
;
202 ecmd
->autoneg
= AUTONEG_DISABLE
;
204 ecmd
->transceiver
= XCVR_EXTERNAL
;
206 /* Determine the remaining settings based on the PHY type. */
207 switch (adapter
->hw
.phy
.type
) {
210 case ixgbe_phy_cu_unknown
:
211 ecmd
->supported
|= SUPPORTED_TP
;
212 ecmd
->advertising
|= ADVERTISED_TP
;
213 ecmd
->port
= PORT_TP
;
216 ecmd
->supported
|= SUPPORTED_FIBRE
;
217 ecmd
->advertising
|= ADVERTISED_FIBRE
;
218 ecmd
->port
= PORT_FIBRE
;
221 case ixgbe_phy_sfp_passive_tyco
:
222 case ixgbe_phy_sfp_passive_unknown
:
223 case ixgbe_phy_sfp_ftl
:
224 case ixgbe_phy_sfp_avago
:
225 case ixgbe_phy_sfp_intel
:
226 case ixgbe_phy_sfp_unknown
:
227 /* SFP+ devices, further checking needed */
228 switch (adapter
->hw
.phy
.sfp_type
) {
229 case ixgbe_sfp_type_da_cu
:
230 case ixgbe_sfp_type_da_cu_core0
:
231 case ixgbe_sfp_type_da_cu_core1
:
232 ecmd
->supported
|= SUPPORTED_FIBRE
;
233 ecmd
->advertising
|= ADVERTISED_FIBRE
;
234 ecmd
->port
= PORT_DA
;
236 case ixgbe_sfp_type_sr
:
237 case ixgbe_sfp_type_lr
:
238 case ixgbe_sfp_type_srlr_core0
:
239 case ixgbe_sfp_type_srlr_core1
:
240 case ixgbe_sfp_type_1g_sx_core0
:
241 case ixgbe_sfp_type_1g_sx_core1
:
242 case ixgbe_sfp_type_1g_lx_core0
:
243 case ixgbe_sfp_type_1g_lx_core1
:
244 ecmd
->supported
|= SUPPORTED_FIBRE
;
245 ecmd
->advertising
|= ADVERTISED_FIBRE
;
246 ecmd
->port
= PORT_FIBRE
;
248 case ixgbe_sfp_type_not_present
:
249 ecmd
->supported
|= SUPPORTED_FIBRE
;
250 ecmd
->advertising
|= ADVERTISED_FIBRE
;
251 ecmd
->port
= PORT_NONE
;
253 case ixgbe_sfp_type_1g_cu_core0
:
254 case ixgbe_sfp_type_1g_cu_core1
:
255 ecmd
->supported
|= SUPPORTED_TP
;
256 ecmd
->advertising
|= ADVERTISED_TP
;
257 ecmd
->port
= PORT_TP
;
259 case ixgbe_sfp_type_unknown
:
261 ecmd
->supported
|= SUPPORTED_FIBRE
;
262 ecmd
->advertising
|= ADVERTISED_FIBRE
;
263 ecmd
->port
= PORT_OTHER
;
268 ecmd
->supported
|= SUPPORTED_FIBRE
;
269 ecmd
->advertising
|= ADVERTISED_FIBRE
;
270 ecmd
->port
= PORT_NONE
;
272 case ixgbe_phy_unknown
:
273 case ixgbe_phy_generic
:
274 case ixgbe_phy_sfp_unsupported
:
276 ecmd
->supported
|= SUPPORTED_FIBRE
;
277 ecmd
->advertising
|= ADVERTISED_FIBRE
;
278 ecmd
->port
= PORT_OTHER
;
282 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
284 switch (link_speed
) {
285 case IXGBE_LINK_SPEED_10GB_FULL
:
286 ethtool_cmd_speed_set(ecmd
, SPEED_10000
);
288 case IXGBE_LINK_SPEED_1GB_FULL
:
289 ethtool_cmd_speed_set(ecmd
, SPEED_1000
);
291 case IXGBE_LINK_SPEED_100_FULL
:
292 ethtool_cmd_speed_set(ecmd
, SPEED_100
);
297 ecmd
->duplex
= DUPLEX_FULL
;
299 ethtool_cmd_speed_set(ecmd
, SPEED_UNKNOWN
);
300 ecmd
->duplex
= DUPLEX_UNKNOWN
;
306 static int ixgbe_set_settings(struct net_device
*netdev
,
307 struct ethtool_cmd
*ecmd
)
309 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
310 struct ixgbe_hw
*hw
= &adapter
->hw
;
314 if ((hw
->phy
.media_type
== ixgbe_media_type_copper
) ||
315 (hw
->phy
.multispeed_fiber
)) {
317 * this function does not support duplex forcing, but can
318 * limit the advertising of the adapter to the specified speed
320 if (ecmd
->advertising
& ~ecmd
->supported
)
323 /* only allow one speed at a time if no autoneg */
324 if (!ecmd
->autoneg
&& hw
->phy
.multispeed_fiber
) {
325 if (ecmd
->advertising
==
326 (ADVERTISED_10000baseT_Full
|
327 ADVERTISED_1000baseT_Full
))
331 old
= hw
->phy
.autoneg_advertised
;
333 if (ecmd
->advertising
& ADVERTISED_10000baseT_Full
)
334 advertised
|= IXGBE_LINK_SPEED_10GB_FULL
;
336 if (ecmd
->advertising
& ADVERTISED_1000baseT_Full
)
337 advertised
|= IXGBE_LINK_SPEED_1GB_FULL
;
339 if (ecmd
->advertising
& ADVERTISED_100baseT_Full
)
340 advertised
|= IXGBE_LINK_SPEED_100_FULL
;
342 if (old
== advertised
)
344 /* this sets the link speed and restarts auto-neg */
345 hw
->mac
.autotry_restart
= true;
346 err
= hw
->mac
.ops
.setup_link(hw
, advertised
, true);
348 e_info(probe
, "setup link failed with code %d\n", err
);
349 hw
->mac
.ops
.setup_link(hw
, old
, true);
352 /* in this case we currently only support 10Gb/FULL */
353 u32 speed
= ethtool_cmd_speed(ecmd
);
354 if ((ecmd
->autoneg
== AUTONEG_ENABLE
) ||
355 (ecmd
->advertising
!= ADVERTISED_10000baseT_Full
) ||
356 (speed
+ ecmd
->duplex
!= SPEED_10000
+ DUPLEX_FULL
))
363 static void ixgbe_get_pauseparam(struct net_device
*netdev
,
364 struct ethtool_pauseparam
*pause
)
366 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
367 struct ixgbe_hw
*hw
= &adapter
->hw
;
369 if (ixgbe_device_supports_autoneg_fc(hw
) &&
370 !hw
->fc
.disable_fc_autoneg
)
375 if (hw
->fc
.current_mode
== ixgbe_fc_rx_pause
) {
377 } else if (hw
->fc
.current_mode
== ixgbe_fc_tx_pause
) {
379 } else if (hw
->fc
.current_mode
== ixgbe_fc_full
) {
385 static int ixgbe_set_pauseparam(struct net_device
*netdev
,
386 struct ethtool_pauseparam
*pause
)
388 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
389 struct ixgbe_hw
*hw
= &adapter
->hw
;
390 struct ixgbe_fc_info fc
= hw
->fc
;
392 /* 82598 does no support link flow control with DCB enabled */
393 if ((hw
->mac
.type
== ixgbe_mac_82598EB
) &&
394 (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
397 /* some devices do not support autoneg of link flow control */
398 if ((pause
->autoneg
== AUTONEG_ENABLE
) &&
399 !ixgbe_device_supports_autoneg_fc(hw
))
402 fc
.disable_fc_autoneg
= (pause
->autoneg
!= AUTONEG_ENABLE
);
404 if ((pause
->rx_pause
&& pause
->tx_pause
) || pause
->autoneg
)
405 fc
.requested_mode
= ixgbe_fc_full
;
406 else if (pause
->rx_pause
&& !pause
->tx_pause
)
407 fc
.requested_mode
= ixgbe_fc_rx_pause
;
408 else if (!pause
->rx_pause
&& pause
->tx_pause
)
409 fc
.requested_mode
= ixgbe_fc_tx_pause
;
411 fc
.requested_mode
= ixgbe_fc_none
;
413 /* if the thing changed then we'll update and use new autoneg */
414 if (memcmp(&fc
, &hw
->fc
, sizeof(struct ixgbe_fc_info
))) {
416 if (netif_running(netdev
))
417 ixgbe_reinit_locked(adapter
);
419 ixgbe_reset(adapter
);
425 static u32
ixgbe_get_msglevel(struct net_device
*netdev
)
427 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
428 return adapter
->msg_enable
;
431 static void ixgbe_set_msglevel(struct net_device
*netdev
, u32 data
)
433 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
434 adapter
->msg_enable
= data
;
437 static int ixgbe_get_regs_len(struct net_device
*netdev
)
439 #define IXGBE_REGS_LEN 1139
440 return IXGBE_REGS_LEN
* sizeof(u32
);
443 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
445 static void ixgbe_get_regs(struct net_device
*netdev
,
446 struct ethtool_regs
*regs
, void *p
)
448 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
449 struct ixgbe_hw
*hw
= &adapter
->hw
;
453 memset(p
, 0, IXGBE_REGS_LEN
* sizeof(u32
));
455 regs
->version
= hw
->mac
.type
<< 24 | hw
->revision_id
<< 16 |
458 /* General Registers */
459 regs_buff
[0] = IXGBE_READ_REG(hw
, IXGBE_CTRL
);
460 regs_buff
[1] = IXGBE_READ_REG(hw
, IXGBE_STATUS
);
461 regs_buff
[2] = IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
462 regs_buff
[3] = IXGBE_READ_REG(hw
, IXGBE_ESDP
);
463 regs_buff
[4] = IXGBE_READ_REG(hw
, IXGBE_EODSDP
);
464 regs_buff
[5] = IXGBE_READ_REG(hw
, IXGBE_LEDCTL
);
465 regs_buff
[6] = IXGBE_READ_REG(hw
, IXGBE_FRTIMER
);
466 regs_buff
[7] = IXGBE_READ_REG(hw
, IXGBE_TCPTIMER
);
469 regs_buff
[8] = IXGBE_READ_REG(hw
, IXGBE_EEC
);
470 regs_buff
[9] = IXGBE_READ_REG(hw
, IXGBE_EERD
);
471 regs_buff
[10] = IXGBE_READ_REG(hw
, IXGBE_FLA
);
472 regs_buff
[11] = IXGBE_READ_REG(hw
, IXGBE_EEMNGCTL
);
473 regs_buff
[12] = IXGBE_READ_REG(hw
, IXGBE_EEMNGDATA
);
474 regs_buff
[13] = IXGBE_READ_REG(hw
, IXGBE_FLMNGCTL
);
475 regs_buff
[14] = IXGBE_READ_REG(hw
, IXGBE_FLMNGDATA
);
476 regs_buff
[15] = IXGBE_READ_REG(hw
, IXGBE_FLMNGCNT
);
477 regs_buff
[16] = IXGBE_READ_REG(hw
, IXGBE_FLOP
);
478 regs_buff
[17] = IXGBE_READ_REG(hw
, IXGBE_GRC
);
481 /* don't read EICR because it can clear interrupt causes, instead
482 * read EICS which is a shadow but doesn't clear EICR */
483 regs_buff
[18] = IXGBE_READ_REG(hw
, IXGBE_EICS
);
484 regs_buff
[19] = IXGBE_READ_REG(hw
, IXGBE_EICS
);
485 regs_buff
[20] = IXGBE_READ_REG(hw
, IXGBE_EIMS
);
486 regs_buff
[21] = IXGBE_READ_REG(hw
, IXGBE_EIMC
);
487 regs_buff
[22] = IXGBE_READ_REG(hw
, IXGBE_EIAC
);
488 regs_buff
[23] = IXGBE_READ_REG(hw
, IXGBE_EIAM
);
489 regs_buff
[24] = IXGBE_READ_REG(hw
, IXGBE_EITR(0));
490 regs_buff
[25] = IXGBE_READ_REG(hw
, IXGBE_IVAR(0));
491 regs_buff
[26] = IXGBE_READ_REG(hw
, IXGBE_MSIXT
);
492 regs_buff
[27] = IXGBE_READ_REG(hw
, IXGBE_MSIXPBA
);
493 regs_buff
[28] = IXGBE_READ_REG(hw
, IXGBE_PBACL(0));
494 regs_buff
[29] = IXGBE_READ_REG(hw
, IXGBE_GPIE
);
497 regs_buff
[30] = IXGBE_READ_REG(hw
, IXGBE_PFCTOP
);
498 regs_buff
[31] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(0));
499 regs_buff
[32] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(1));
500 regs_buff
[33] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(2));
501 regs_buff
[34] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(3));
502 for (i
= 0; i
< 8; i
++) {
503 switch (hw
->mac
.type
) {
504 case ixgbe_mac_82598EB
:
505 regs_buff
[35 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTL(i
));
506 regs_buff
[43 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTH(i
));
508 case ixgbe_mac_82599EB
:
510 regs_buff
[35 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTL_82599(i
));
511 regs_buff
[43 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTH_82599(i
));
517 regs_buff
[51] = IXGBE_READ_REG(hw
, IXGBE_FCRTV
);
518 regs_buff
[52] = IXGBE_READ_REG(hw
, IXGBE_TFCS
);
521 for (i
= 0; i
< 64; i
++)
522 regs_buff
[53 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
523 for (i
= 0; i
< 64; i
++)
524 regs_buff
[117 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
525 for (i
= 0; i
< 64; i
++)
526 regs_buff
[181 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
527 for (i
= 0; i
< 64; i
++)
528 regs_buff
[245 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
529 for (i
= 0; i
< 64; i
++)
530 regs_buff
[309 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
531 for (i
= 0; i
< 64; i
++)
532 regs_buff
[373 + i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
533 for (i
= 0; i
< 16; i
++)
534 regs_buff
[437 + i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
535 for (i
= 0; i
< 16; i
++)
536 regs_buff
[453 + i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
537 regs_buff
[469] = IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
538 for (i
= 0; i
< 8; i
++)
539 regs_buff
[470 + i
] = IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(i
));
540 regs_buff
[478] = IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
541 regs_buff
[479] = IXGBE_READ_REG(hw
, IXGBE_DROPEN
);
544 regs_buff
[480] = IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
545 regs_buff
[481] = IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
546 for (i
= 0; i
< 16; i
++)
547 regs_buff
[482 + i
] = IXGBE_READ_REG(hw
, IXGBE_RAL(i
));
548 for (i
= 0; i
< 16; i
++)
549 regs_buff
[498 + i
] = IXGBE_READ_REG(hw
, IXGBE_RAH(i
));
550 regs_buff
[514] = IXGBE_READ_REG(hw
, IXGBE_PSRTYPE(0));
551 regs_buff
[515] = IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
552 regs_buff
[516] = IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
553 regs_buff
[517] = IXGBE_READ_REG(hw
, IXGBE_MCSTCTRL
);
554 regs_buff
[518] = IXGBE_READ_REG(hw
, IXGBE_MRQC
);
555 regs_buff
[519] = IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
556 for (i
= 0; i
< 8; i
++)
557 regs_buff
[520 + i
] = IXGBE_READ_REG(hw
, IXGBE_IMIR(i
));
558 for (i
= 0; i
< 8; i
++)
559 regs_buff
[528 + i
] = IXGBE_READ_REG(hw
, IXGBE_IMIREXT(i
));
560 regs_buff
[536] = IXGBE_READ_REG(hw
, IXGBE_IMIRVP
);
563 for (i
= 0; i
< 32; i
++)
564 regs_buff
[537 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
565 for (i
= 0; i
< 32; i
++)
566 regs_buff
[569 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
567 for (i
= 0; i
< 32; i
++)
568 regs_buff
[601 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
569 for (i
= 0; i
< 32; i
++)
570 regs_buff
[633 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
571 for (i
= 0; i
< 32; i
++)
572 regs_buff
[665 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
573 for (i
= 0; i
< 32; i
++)
574 regs_buff
[697 + i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
575 for (i
= 0; i
< 32; i
++)
576 regs_buff
[729 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDWBAL(i
));
577 for (i
= 0; i
< 32; i
++)
578 regs_buff
[761 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDWBAH(i
));
579 regs_buff
[793] = IXGBE_READ_REG(hw
, IXGBE_DTXCTL
);
580 for (i
= 0; i
< 16; i
++)
581 regs_buff
[794 + i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(i
));
582 regs_buff
[810] = IXGBE_READ_REG(hw
, IXGBE_TIPG
);
583 for (i
= 0; i
< 8; i
++)
584 regs_buff
[811 + i
] = IXGBE_READ_REG(hw
, IXGBE_TXPBSIZE(i
));
585 regs_buff
[819] = IXGBE_READ_REG(hw
, IXGBE_MNGTXMAP
);
588 regs_buff
[820] = IXGBE_READ_REG(hw
, IXGBE_WUC
);
589 regs_buff
[821] = IXGBE_READ_REG(hw
, IXGBE_WUFC
);
590 regs_buff
[822] = IXGBE_READ_REG(hw
, IXGBE_WUS
);
591 regs_buff
[823] = IXGBE_READ_REG(hw
, IXGBE_IPAV
);
592 regs_buff
[824] = IXGBE_READ_REG(hw
, IXGBE_IP4AT
);
593 regs_buff
[825] = IXGBE_READ_REG(hw
, IXGBE_IP6AT
);
594 regs_buff
[826] = IXGBE_READ_REG(hw
, IXGBE_WUPL
);
595 regs_buff
[827] = IXGBE_READ_REG(hw
, IXGBE_WUPM
);
596 regs_buff
[828] = IXGBE_READ_REG(hw
, IXGBE_FHFT(0));
599 regs_buff
[829] = IXGBE_READ_REG(hw
, IXGBE_RMCS
); /* same as FCCFG */
600 regs_buff
[831] = IXGBE_READ_REG(hw
, IXGBE_PDPMCS
); /* same as RTTPCS */
602 switch (hw
->mac
.type
) {
603 case ixgbe_mac_82598EB
:
604 regs_buff
[830] = IXGBE_READ_REG(hw
, IXGBE_DPMCS
);
605 regs_buff
[832] = IXGBE_READ_REG(hw
, IXGBE_RUPPBMR
);
606 for (i
= 0; i
< 8; i
++)
608 IXGBE_READ_REG(hw
, IXGBE_RT2CR(i
));
609 for (i
= 0; i
< 8; i
++)
611 IXGBE_READ_REG(hw
, IXGBE_RT2SR(i
));
612 for (i
= 0; i
< 8; i
++)
614 IXGBE_READ_REG(hw
, IXGBE_TDTQ2TCCR(i
));
615 for (i
= 0; i
< 8; i
++)
617 IXGBE_READ_REG(hw
, IXGBE_TDTQ2TCSR(i
));
619 case ixgbe_mac_82599EB
:
621 regs_buff
[830] = IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
622 regs_buff
[832] = IXGBE_READ_REG(hw
, IXGBE_RTRPCS
);
623 for (i
= 0; i
< 8; i
++)
625 IXGBE_READ_REG(hw
, IXGBE_RTRPT4C(i
));
626 for (i
= 0; i
< 8; i
++)
628 IXGBE_READ_REG(hw
, IXGBE_RTRPT4S(i
));
629 for (i
= 0; i
< 8; i
++)
631 IXGBE_READ_REG(hw
, IXGBE_RTTDT2C(i
));
632 for (i
= 0; i
< 8; i
++)
634 IXGBE_READ_REG(hw
, IXGBE_RTTDT2S(i
));
640 for (i
= 0; i
< 8; i
++)
642 IXGBE_READ_REG(hw
, IXGBE_TDPT2TCCR(i
)); /* same as RTTPT2C */
643 for (i
= 0; i
< 8; i
++)
645 IXGBE_READ_REG(hw
, IXGBE_TDPT2TCSR(i
)); /* same as RTTPT2S */
648 regs_buff
[881] = IXGBE_GET_STAT(adapter
, crcerrs
);
649 regs_buff
[882] = IXGBE_GET_STAT(adapter
, illerrc
);
650 regs_buff
[883] = IXGBE_GET_STAT(adapter
, errbc
);
651 regs_buff
[884] = IXGBE_GET_STAT(adapter
, mspdc
);
652 for (i
= 0; i
< 8; i
++)
653 regs_buff
[885 + i
] = IXGBE_GET_STAT(adapter
, mpc
[i
]);
654 regs_buff
[893] = IXGBE_GET_STAT(adapter
, mlfc
);
655 regs_buff
[894] = IXGBE_GET_STAT(adapter
, mrfc
);
656 regs_buff
[895] = IXGBE_GET_STAT(adapter
, rlec
);
657 regs_buff
[896] = IXGBE_GET_STAT(adapter
, lxontxc
);
658 regs_buff
[897] = IXGBE_GET_STAT(adapter
, lxonrxc
);
659 regs_buff
[898] = IXGBE_GET_STAT(adapter
, lxofftxc
);
660 regs_buff
[899] = IXGBE_GET_STAT(adapter
, lxoffrxc
);
661 for (i
= 0; i
< 8; i
++)
662 regs_buff
[900 + i
] = IXGBE_GET_STAT(adapter
, pxontxc
[i
]);
663 for (i
= 0; i
< 8; i
++)
664 regs_buff
[908 + i
] = IXGBE_GET_STAT(adapter
, pxonrxc
[i
]);
665 for (i
= 0; i
< 8; i
++)
666 regs_buff
[916 + i
] = IXGBE_GET_STAT(adapter
, pxofftxc
[i
]);
667 for (i
= 0; i
< 8; i
++)
668 regs_buff
[924 + i
] = IXGBE_GET_STAT(adapter
, pxoffrxc
[i
]);
669 regs_buff
[932] = IXGBE_GET_STAT(adapter
, prc64
);
670 regs_buff
[933] = IXGBE_GET_STAT(adapter
, prc127
);
671 regs_buff
[934] = IXGBE_GET_STAT(adapter
, prc255
);
672 regs_buff
[935] = IXGBE_GET_STAT(adapter
, prc511
);
673 regs_buff
[936] = IXGBE_GET_STAT(adapter
, prc1023
);
674 regs_buff
[937] = IXGBE_GET_STAT(adapter
, prc1522
);
675 regs_buff
[938] = IXGBE_GET_STAT(adapter
, gprc
);
676 regs_buff
[939] = IXGBE_GET_STAT(adapter
, bprc
);
677 regs_buff
[940] = IXGBE_GET_STAT(adapter
, mprc
);
678 regs_buff
[941] = IXGBE_GET_STAT(adapter
, gptc
);
679 regs_buff
[942] = IXGBE_GET_STAT(adapter
, gorc
);
680 regs_buff
[944] = IXGBE_GET_STAT(adapter
, gotc
);
681 for (i
= 0; i
< 8; i
++)
682 regs_buff
[946 + i
] = IXGBE_GET_STAT(adapter
, rnbc
[i
]);
683 regs_buff
[954] = IXGBE_GET_STAT(adapter
, ruc
);
684 regs_buff
[955] = IXGBE_GET_STAT(adapter
, rfc
);
685 regs_buff
[956] = IXGBE_GET_STAT(adapter
, roc
);
686 regs_buff
[957] = IXGBE_GET_STAT(adapter
, rjc
);
687 regs_buff
[958] = IXGBE_GET_STAT(adapter
, mngprc
);
688 regs_buff
[959] = IXGBE_GET_STAT(adapter
, mngpdc
);
689 regs_buff
[960] = IXGBE_GET_STAT(adapter
, mngptc
);
690 regs_buff
[961] = IXGBE_GET_STAT(adapter
, tor
);
691 regs_buff
[963] = IXGBE_GET_STAT(adapter
, tpr
);
692 regs_buff
[964] = IXGBE_GET_STAT(adapter
, tpt
);
693 regs_buff
[965] = IXGBE_GET_STAT(adapter
, ptc64
);
694 regs_buff
[966] = IXGBE_GET_STAT(adapter
, ptc127
);
695 regs_buff
[967] = IXGBE_GET_STAT(adapter
, ptc255
);
696 regs_buff
[968] = IXGBE_GET_STAT(adapter
, ptc511
);
697 regs_buff
[969] = IXGBE_GET_STAT(adapter
, ptc1023
);
698 regs_buff
[970] = IXGBE_GET_STAT(adapter
, ptc1522
);
699 regs_buff
[971] = IXGBE_GET_STAT(adapter
, mptc
);
700 regs_buff
[972] = IXGBE_GET_STAT(adapter
, bptc
);
701 regs_buff
[973] = IXGBE_GET_STAT(adapter
, xec
);
702 for (i
= 0; i
< 16; i
++)
703 regs_buff
[974 + i
] = IXGBE_GET_STAT(adapter
, qprc
[i
]);
704 for (i
= 0; i
< 16; i
++)
705 regs_buff
[990 + i
] = IXGBE_GET_STAT(adapter
, qptc
[i
]);
706 for (i
= 0; i
< 16; i
++)
707 regs_buff
[1006 + i
] = IXGBE_GET_STAT(adapter
, qbrc
[i
]);
708 for (i
= 0; i
< 16; i
++)
709 regs_buff
[1022 + i
] = IXGBE_GET_STAT(adapter
, qbtc
[i
]);
712 regs_buff
[1038] = IXGBE_READ_REG(hw
, IXGBE_PCS1GCFIG
);
713 regs_buff
[1039] = IXGBE_READ_REG(hw
, IXGBE_PCS1GLCTL
);
714 regs_buff
[1040] = IXGBE_READ_REG(hw
, IXGBE_PCS1GLSTA
);
715 regs_buff
[1041] = IXGBE_READ_REG(hw
, IXGBE_PCS1GDBG0
);
716 regs_buff
[1042] = IXGBE_READ_REG(hw
, IXGBE_PCS1GDBG1
);
717 regs_buff
[1043] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANA
);
718 regs_buff
[1044] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANLP
);
719 regs_buff
[1045] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANNP
);
720 regs_buff
[1046] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANLPNP
);
721 regs_buff
[1047] = IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
722 regs_buff
[1048] = IXGBE_READ_REG(hw
, IXGBE_HLREG1
);
723 regs_buff
[1049] = IXGBE_READ_REG(hw
, IXGBE_PAP
);
724 regs_buff
[1050] = IXGBE_READ_REG(hw
, IXGBE_MACA
);
725 regs_buff
[1051] = IXGBE_READ_REG(hw
, IXGBE_APAE
);
726 regs_buff
[1052] = IXGBE_READ_REG(hw
, IXGBE_ARD
);
727 regs_buff
[1053] = IXGBE_READ_REG(hw
, IXGBE_AIS
);
728 regs_buff
[1054] = IXGBE_READ_REG(hw
, IXGBE_MSCA
);
729 regs_buff
[1055] = IXGBE_READ_REG(hw
, IXGBE_MSRWD
);
730 regs_buff
[1056] = IXGBE_READ_REG(hw
, IXGBE_MLADD
);
731 regs_buff
[1057] = IXGBE_READ_REG(hw
, IXGBE_MHADD
);
732 regs_buff
[1058] = IXGBE_READ_REG(hw
, IXGBE_TREG
);
733 regs_buff
[1059] = IXGBE_READ_REG(hw
, IXGBE_PCSS1
);
734 regs_buff
[1060] = IXGBE_READ_REG(hw
, IXGBE_PCSS2
);
735 regs_buff
[1061] = IXGBE_READ_REG(hw
, IXGBE_XPCSS
);
736 regs_buff
[1062] = IXGBE_READ_REG(hw
, IXGBE_SERDESC
);
737 regs_buff
[1063] = IXGBE_READ_REG(hw
, IXGBE_MACS
);
738 regs_buff
[1064] = IXGBE_READ_REG(hw
, IXGBE_AUTOC
);
739 regs_buff
[1065] = IXGBE_READ_REG(hw
, IXGBE_LINKS
);
740 regs_buff
[1066] = IXGBE_READ_REG(hw
, IXGBE_AUTOC2
);
741 regs_buff
[1067] = IXGBE_READ_REG(hw
, IXGBE_AUTOC3
);
742 regs_buff
[1068] = IXGBE_READ_REG(hw
, IXGBE_ANLP1
);
743 regs_buff
[1069] = IXGBE_READ_REG(hw
, IXGBE_ANLP2
);
744 regs_buff
[1070] = IXGBE_READ_REG(hw
, IXGBE_ATLASCTL
);
747 regs_buff
[1071] = IXGBE_READ_REG(hw
, IXGBE_RDSTATCTL
);
748 for (i
= 0; i
< 8; i
++)
749 regs_buff
[1072 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDSTAT(i
));
750 regs_buff
[1080] = IXGBE_READ_REG(hw
, IXGBE_RDHMPN
);
751 for (i
= 0; i
< 4; i
++)
752 regs_buff
[1081 + i
] = IXGBE_READ_REG(hw
, IXGBE_RIC_DW(i
));
753 regs_buff
[1085] = IXGBE_READ_REG(hw
, IXGBE_RDPROBE
);
754 regs_buff
[1086] = IXGBE_READ_REG(hw
, IXGBE_TDSTATCTL
);
755 for (i
= 0; i
< 8; i
++)
756 regs_buff
[1087 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDSTAT(i
));
757 regs_buff
[1095] = IXGBE_READ_REG(hw
, IXGBE_TDHMPN
);
758 for (i
= 0; i
< 4; i
++)
759 regs_buff
[1096 + i
] = IXGBE_READ_REG(hw
, IXGBE_TIC_DW(i
));
760 regs_buff
[1100] = IXGBE_READ_REG(hw
, IXGBE_TDPROBE
);
761 regs_buff
[1101] = IXGBE_READ_REG(hw
, IXGBE_TXBUFCTRL
);
762 regs_buff
[1102] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA0
);
763 regs_buff
[1103] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA1
);
764 regs_buff
[1104] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA2
);
765 regs_buff
[1105] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA3
);
766 regs_buff
[1106] = IXGBE_READ_REG(hw
, IXGBE_RXBUFCTRL
);
767 regs_buff
[1107] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA0
);
768 regs_buff
[1108] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA1
);
769 regs_buff
[1109] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA2
);
770 regs_buff
[1110] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA3
);
771 for (i
= 0; i
< 8; i
++)
772 regs_buff
[1111 + i
] = IXGBE_READ_REG(hw
, IXGBE_PCIE_DIAG(i
));
773 regs_buff
[1119] = IXGBE_READ_REG(hw
, IXGBE_RFVAL
);
774 regs_buff
[1120] = IXGBE_READ_REG(hw
, IXGBE_MDFTC1
);
775 regs_buff
[1121] = IXGBE_READ_REG(hw
, IXGBE_MDFTC2
);
776 regs_buff
[1122] = IXGBE_READ_REG(hw
, IXGBE_MDFTFIFO1
);
777 regs_buff
[1123] = IXGBE_READ_REG(hw
, IXGBE_MDFTFIFO2
);
778 regs_buff
[1124] = IXGBE_READ_REG(hw
, IXGBE_MDFTS
);
779 regs_buff
[1125] = IXGBE_READ_REG(hw
, IXGBE_PCIEECCCTL
);
780 regs_buff
[1126] = IXGBE_READ_REG(hw
, IXGBE_PBTXECC
);
781 regs_buff
[1127] = IXGBE_READ_REG(hw
, IXGBE_PBRXECC
);
783 /* 82599 X540 specific registers */
784 regs_buff
[1128] = IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
786 /* 82599 X540 specific DCB registers */
787 regs_buff
[1129] = IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
788 regs_buff
[1130] = IXGBE_READ_REG(hw
, IXGBE_RTTUP2TC
);
789 for (i
= 0; i
< 4; i
++)
790 regs_buff
[1131 + i
] = IXGBE_READ_REG(hw
, IXGBE_TXLLQ(i
));
791 regs_buff
[1135] = IXGBE_READ_REG(hw
, IXGBE_RTTBCNRM
);
792 /* same as RTTQCNRM */
793 regs_buff
[1136] = IXGBE_READ_REG(hw
, IXGBE_RTTBCNRD
);
794 /* same as RTTQCNRR */
796 /* X540 specific DCB registers */
797 regs_buff
[1137] = IXGBE_READ_REG(hw
, IXGBE_RTTQCNCR
);
798 regs_buff
[1138] = IXGBE_READ_REG(hw
, IXGBE_RTTQCNTG
);
801 static int ixgbe_get_eeprom_len(struct net_device
*netdev
)
803 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
804 return adapter
->hw
.eeprom
.word_size
* 2;
807 static int ixgbe_get_eeprom(struct net_device
*netdev
,
808 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
810 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
811 struct ixgbe_hw
*hw
= &adapter
->hw
;
813 int first_word
, last_word
, eeprom_len
;
817 if (eeprom
->len
== 0)
820 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
822 first_word
= eeprom
->offset
>> 1;
823 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
824 eeprom_len
= last_word
- first_word
+ 1;
826 eeprom_buff
= kmalloc(sizeof(u16
) * eeprom_len
, GFP_KERNEL
);
830 ret_val
= hw
->eeprom
.ops
.read_buffer(hw
, first_word
, eeprom_len
,
833 /* Device's eeprom is always little-endian, word addressable */
834 for (i
= 0; i
< eeprom_len
; i
++)
835 le16_to_cpus(&eeprom_buff
[i
]);
837 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1), eeprom
->len
);
843 static int ixgbe_set_eeprom(struct net_device
*netdev
,
844 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
846 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
847 struct ixgbe_hw
*hw
= &adapter
->hw
;
850 int max_len
, first_word
, last_word
, ret_val
= 0;
853 if (eeprom
->len
== 0)
856 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
859 max_len
= hw
->eeprom
.word_size
* 2;
861 first_word
= eeprom
->offset
>> 1;
862 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
863 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
869 if (eeprom
->offset
& 1) {
871 * need read/modify/write of first changed EEPROM word
872 * only the second byte of the word is being modified
874 ret_val
= hw
->eeprom
.ops
.read(hw
, first_word
, &eeprom_buff
[0]);
880 if ((eeprom
->offset
+ eeprom
->len
) & 1) {
882 * need read/modify/write of last changed EEPROM word
883 * only the first byte of the word is being modified
885 ret_val
= hw
->eeprom
.ops
.read(hw
, last_word
,
886 &eeprom_buff
[last_word
- first_word
]);
891 /* Device's eeprom is always little-endian, word addressable */
892 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
893 le16_to_cpus(&eeprom_buff
[i
]);
895 memcpy(ptr
, bytes
, eeprom
->len
);
897 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
898 cpu_to_le16s(&eeprom_buff
[i
]);
900 ret_val
= hw
->eeprom
.ops
.write_buffer(hw
, first_word
,
901 last_word
- first_word
+ 1,
904 /* Update the checksum */
906 hw
->eeprom
.ops
.update_checksum(hw
);
913 static void ixgbe_get_drvinfo(struct net_device
*netdev
,
914 struct ethtool_drvinfo
*drvinfo
)
916 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
919 strlcpy(drvinfo
->driver
, ixgbe_driver_name
, sizeof(drvinfo
->driver
));
920 strlcpy(drvinfo
->version
, ixgbe_driver_version
,
921 sizeof(drvinfo
->version
));
923 nvm_track_id
= (adapter
->eeprom_verh
<< 16) |
924 adapter
->eeprom_verl
;
925 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
), "0x%08x",
928 strlcpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
),
929 sizeof(drvinfo
->bus_info
));
930 drvinfo
->n_stats
= IXGBE_STATS_LEN
;
931 drvinfo
->testinfo_len
= IXGBE_TEST_LEN
;
932 drvinfo
->regdump_len
= ixgbe_get_regs_len(netdev
);
935 static void ixgbe_get_ringparam(struct net_device
*netdev
,
936 struct ethtool_ringparam
*ring
)
938 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
939 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[0];
940 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[0];
942 ring
->rx_max_pending
= IXGBE_MAX_RXD
;
943 ring
->tx_max_pending
= IXGBE_MAX_TXD
;
944 ring
->rx_pending
= rx_ring
->count
;
945 ring
->tx_pending
= tx_ring
->count
;
948 static int ixgbe_set_ringparam(struct net_device
*netdev
,
949 struct ethtool_ringparam
*ring
)
951 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
952 struct ixgbe_ring
*temp_ring
;
954 u32 new_rx_count
, new_tx_count
;
956 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
959 new_tx_count
= clamp_t(u32
, ring
->tx_pending
,
960 IXGBE_MIN_TXD
, IXGBE_MAX_TXD
);
961 new_tx_count
= ALIGN(new_tx_count
, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE
);
963 new_rx_count
= clamp_t(u32
, ring
->rx_pending
,
964 IXGBE_MIN_RXD
, IXGBE_MAX_RXD
);
965 new_rx_count
= ALIGN(new_rx_count
, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE
);
967 if ((new_tx_count
== adapter
->tx_ring_count
) &&
968 (new_rx_count
== adapter
->rx_ring_count
)) {
973 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
974 usleep_range(1000, 2000);
976 if (!netif_running(adapter
->netdev
)) {
977 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
978 adapter
->tx_ring
[i
]->count
= new_tx_count
;
979 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
980 adapter
->rx_ring
[i
]->count
= new_rx_count
;
981 adapter
->tx_ring_count
= new_tx_count
;
982 adapter
->rx_ring_count
= new_rx_count
;
986 /* allocate temporary buffer to store rings in */
987 i
= max_t(int, adapter
->num_tx_queues
, adapter
->num_rx_queues
);
988 temp_ring
= vmalloc(i
* sizeof(struct ixgbe_ring
));
998 * Setup new Tx resources and free the old Tx resources in that order.
999 * We can then assign the new resources to the rings via a memcpy.
1000 * The advantage to this approach is that we are guaranteed to still
1001 * have resources even in the case of an allocation failure.
1003 if (new_tx_count
!= adapter
->tx_ring_count
) {
1004 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1005 memcpy(&temp_ring
[i
], adapter
->tx_ring
[i
],
1006 sizeof(struct ixgbe_ring
));
1008 temp_ring
[i
].count
= new_tx_count
;
1009 err
= ixgbe_setup_tx_resources(&temp_ring
[i
]);
1013 ixgbe_free_tx_resources(&temp_ring
[i
]);
1019 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1020 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
1022 memcpy(adapter
->tx_ring
[i
], &temp_ring
[i
],
1023 sizeof(struct ixgbe_ring
));
1026 adapter
->tx_ring_count
= new_tx_count
;
1029 /* Repeat the process for the Rx rings if needed */
1030 if (new_rx_count
!= adapter
->rx_ring_count
) {
1031 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1032 memcpy(&temp_ring
[i
], adapter
->rx_ring
[i
],
1033 sizeof(struct ixgbe_ring
));
1035 temp_ring
[i
].count
= new_rx_count
;
1036 err
= ixgbe_setup_rx_resources(&temp_ring
[i
]);
1040 ixgbe_free_rx_resources(&temp_ring
[i
]);
1047 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1048 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
1050 memcpy(adapter
->rx_ring
[i
], &temp_ring
[i
],
1051 sizeof(struct ixgbe_ring
));
1054 adapter
->rx_ring_count
= new_rx_count
;
1061 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
1065 static int ixgbe_get_sset_count(struct net_device
*netdev
, int sset
)
1069 return IXGBE_TEST_LEN
;
1071 return IXGBE_STATS_LEN
;
1077 static void ixgbe_get_ethtool_stats(struct net_device
*netdev
,
1078 struct ethtool_stats
*stats
, u64
*data
)
1080 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1081 struct rtnl_link_stats64 temp
;
1082 const struct rtnl_link_stats64
*net_stats
;
1084 struct ixgbe_ring
*ring
;
1088 ixgbe_update_stats(adapter
);
1089 net_stats
= dev_get_stats(netdev
, &temp
);
1090 for (i
= 0; i
< IXGBE_GLOBAL_STATS_LEN
; i
++) {
1091 switch (ixgbe_gstrings_stats
[i
].type
) {
1093 p
= (char *) net_stats
+
1094 ixgbe_gstrings_stats
[i
].stat_offset
;
1097 p
= (char *) adapter
+
1098 ixgbe_gstrings_stats
[i
].stat_offset
;
1105 data
[i
] = (ixgbe_gstrings_stats
[i
].sizeof_stat
==
1106 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
1108 for (j
= 0; j
< netdev
->num_tx_queues
; j
++) {
1109 ring
= adapter
->tx_ring
[j
];
1114 #ifdef BP_EXTENDED_STATS
1124 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1125 data
[i
] = ring
->stats
.packets
;
1126 data
[i
+1] = ring
->stats
.bytes
;
1127 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1129 #ifdef BP_EXTENDED_STATS
1130 data
[i
] = ring
->stats
.yields
;
1131 data
[i
+1] = ring
->stats
.misses
;
1132 data
[i
+2] = ring
->stats
.cleaned
;
1136 for (j
= 0; j
< IXGBE_NUM_RX_QUEUES
; j
++) {
1137 ring
= adapter
->rx_ring
[j
];
1142 #ifdef BP_EXTENDED_STATS
1152 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1153 data
[i
] = ring
->stats
.packets
;
1154 data
[i
+1] = ring
->stats
.bytes
;
1155 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1157 #ifdef BP_EXTENDED_STATS
1158 data
[i
] = ring
->stats
.yields
;
1159 data
[i
+1] = ring
->stats
.misses
;
1160 data
[i
+2] = ring
->stats
.cleaned
;
1165 for (j
= 0; j
< IXGBE_MAX_PACKET_BUFFERS
; j
++) {
1166 data
[i
++] = adapter
->stats
.pxontxc
[j
];
1167 data
[i
++] = adapter
->stats
.pxofftxc
[j
];
1169 for (j
= 0; j
< IXGBE_MAX_PACKET_BUFFERS
; j
++) {
1170 data
[i
++] = adapter
->stats
.pxonrxc
[j
];
1171 data
[i
++] = adapter
->stats
.pxoffrxc
[j
];
1175 static void ixgbe_get_strings(struct net_device
*netdev
, u32 stringset
,
1178 char *p
= (char *)data
;
1181 switch (stringset
) {
1183 for (i
= 0; i
< IXGBE_TEST_LEN
; i
++) {
1184 memcpy(data
, ixgbe_gstrings_test
[i
], ETH_GSTRING_LEN
);
1185 data
+= ETH_GSTRING_LEN
;
1189 for (i
= 0; i
< IXGBE_GLOBAL_STATS_LEN
; i
++) {
1190 memcpy(p
, ixgbe_gstrings_stats
[i
].stat_string
,
1192 p
+= ETH_GSTRING_LEN
;
1194 for (i
= 0; i
< netdev
->num_tx_queues
; i
++) {
1195 sprintf(p
, "tx_queue_%u_packets", i
);
1196 p
+= ETH_GSTRING_LEN
;
1197 sprintf(p
, "tx_queue_%u_bytes", i
);
1198 p
+= ETH_GSTRING_LEN
;
1199 #ifdef BP_EXTENDED_STATS
1200 sprintf(p
, "tx_queue_%u_bp_napi_yield", i
);
1201 p
+= ETH_GSTRING_LEN
;
1202 sprintf(p
, "tx_queue_%u_bp_misses", i
);
1203 p
+= ETH_GSTRING_LEN
;
1204 sprintf(p
, "tx_queue_%u_bp_cleaned", i
);
1205 p
+= ETH_GSTRING_LEN
;
1206 #endif /* BP_EXTENDED_STATS */
1208 for (i
= 0; i
< IXGBE_NUM_RX_QUEUES
; i
++) {
1209 sprintf(p
, "rx_queue_%u_packets", i
);
1210 p
+= ETH_GSTRING_LEN
;
1211 sprintf(p
, "rx_queue_%u_bytes", i
);
1212 p
+= ETH_GSTRING_LEN
;
1213 #ifdef BP_EXTENDED_STATS
1214 sprintf(p
, "rx_queue_%u_bp_poll_yield", i
);
1215 p
+= ETH_GSTRING_LEN
;
1216 sprintf(p
, "rx_queue_%u_bp_misses", i
);
1217 p
+= ETH_GSTRING_LEN
;
1218 sprintf(p
, "rx_queue_%u_bp_cleaned", i
);
1219 p
+= ETH_GSTRING_LEN
;
1220 #endif /* BP_EXTENDED_STATS */
1222 for (i
= 0; i
< IXGBE_MAX_PACKET_BUFFERS
; i
++) {
1223 sprintf(p
, "tx_pb_%u_pxon", i
);
1224 p
+= ETH_GSTRING_LEN
;
1225 sprintf(p
, "tx_pb_%u_pxoff", i
);
1226 p
+= ETH_GSTRING_LEN
;
1228 for (i
= 0; i
< IXGBE_MAX_PACKET_BUFFERS
; i
++) {
1229 sprintf(p
, "rx_pb_%u_pxon", i
);
1230 p
+= ETH_GSTRING_LEN
;
1231 sprintf(p
, "rx_pb_%u_pxoff", i
);
1232 p
+= ETH_GSTRING_LEN
;
1234 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1239 static int ixgbe_link_test(struct ixgbe_adapter
*adapter
, u64
*data
)
1241 struct ixgbe_hw
*hw
= &adapter
->hw
;
1245 if (ixgbe_removed(hw
->hw_addr
)) {
1251 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, true);
1259 /* ethtool register test data */
1260 struct ixgbe_reg_test
{
1268 /* In the hardware, registers are laid out either singly, in arrays
1269 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1270 * most tests take place on arrays or single registers (handled
1271 * as a single-element array) and special-case the tables.
1272 * Table tests are always pattern tests.
1274 * We also make provision for some required setup steps by specifying
1275 * registers to be written without any read-back testing.
1278 #define PATTERN_TEST 1
1279 #define SET_READ_TEST 2
1280 #define WRITE_NO_TEST 3
1281 #define TABLE32_TEST 4
1282 #define TABLE64_TEST_LO 5
1283 #define TABLE64_TEST_HI 6
1285 /* default 82599 register test */
1286 static const struct ixgbe_reg_test reg_test_82599
[] = {
1287 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1288 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1289 { IXGBE_PFCTOP
, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1290 { IXGBE_VLNCTRL
, 1, PATTERN_TEST
, 0x00000000, 0x00000000 },
1291 { IXGBE_RDBAL(0), 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFF80 },
1292 { IXGBE_RDBAH(0), 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1293 { IXGBE_RDLEN(0), 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1294 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST
, 0, IXGBE_RXDCTL_ENABLE
},
1295 { IXGBE_RDT(0), 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1296 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST
, 0, 0 },
1297 { IXGBE_FCRTH(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1298 { IXGBE_FCTTV(0), 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1299 { IXGBE_TDBAL(0), 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1300 { IXGBE_TDBAH(0), 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1301 { IXGBE_TDLEN(0), 4, PATTERN_TEST
, 0x000FFF80, 0x000FFF80 },
1302 { IXGBE_RXCTRL
, 1, SET_READ_TEST
, 0x00000001, 0x00000001 },
1303 { IXGBE_RAL(0), 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
1304 { IXGBE_RAL(0), 16, TABLE64_TEST_HI
, 0x8001FFFF, 0x800CFFFF },
1305 { IXGBE_MTA(0), 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1309 /* default 82598 register test */
1310 static const struct ixgbe_reg_test reg_test_82598
[] = {
1311 { IXGBE_FCRTL(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1312 { IXGBE_FCRTH(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1313 { IXGBE_PFCTOP
, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1314 { IXGBE_VLNCTRL
, 1, PATTERN_TEST
, 0x00000000, 0x00000000 },
1315 { IXGBE_RDBAL(0), 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1316 { IXGBE_RDBAH(0), 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1317 { IXGBE_RDLEN(0), 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1318 /* Enable all four RX queues before testing. */
1319 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST
, 0, IXGBE_RXDCTL_ENABLE
},
1320 /* RDH is read-only for 82598, only test RDT. */
1321 { IXGBE_RDT(0), 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1322 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST
, 0, 0 },
1323 { IXGBE_FCRTH(0), 1, PATTERN_TEST
, 0x8007FFF0, 0x8007FFF0 },
1324 { IXGBE_FCTTV(0), 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1325 { IXGBE_TIPG
, 1, PATTERN_TEST
, 0x000000FF, 0x000000FF },
1326 { IXGBE_TDBAL(0), 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1327 { IXGBE_TDBAH(0), 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1328 { IXGBE_TDLEN(0), 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1329 { IXGBE_RXCTRL
, 1, SET_READ_TEST
, 0x00000003, 0x00000003 },
1330 { IXGBE_DTXCTL
, 1, SET_READ_TEST
, 0x00000005, 0x00000005 },
1331 { IXGBE_RAL(0), 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
1332 { IXGBE_RAL(0), 16, TABLE64_TEST_HI
, 0x800CFFFF, 0x800CFFFF },
1333 { IXGBE_MTA(0), 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1337 static bool reg_pattern_test(struct ixgbe_adapter
*adapter
, u64
*data
, int reg
,
1338 u32 mask
, u32 write
)
1340 u32 pat
, val
, before
;
1341 static const u32 test_pattern
[] = {
1342 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1344 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
1348 for (pat
= 0; pat
< ARRAY_SIZE(test_pattern
); pat
++) {
1349 before
= ixgbe_read_reg(&adapter
->hw
, reg
);
1350 ixgbe_write_reg(&adapter
->hw
, reg
, test_pattern
[pat
] & write
);
1351 val
= ixgbe_read_reg(&adapter
->hw
, reg
);
1352 if (val
!= (test_pattern
[pat
] & write
& mask
)) {
1353 e_err(drv
, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1354 reg
, val
, (test_pattern
[pat
] & write
& mask
));
1356 ixgbe_write_reg(&adapter
->hw
, reg
, before
);
1359 ixgbe_write_reg(&adapter
->hw
, reg
, before
);
1364 static bool reg_set_and_check(struct ixgbe_adapter
*adapter
, u64
*data
, int reg
,
1365 u32 mask
, u32 write
)
1369 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
1373 before
= ixgbe_read_reg(&adapter
->hw
, reg
);
1374 ixgbe_write_reg(&adapter
->hw
, reg
, write
& mask
);
1375 val
= ixgbe_read_reg(&adapter
->hw
, reg
);
1376 if ((write
& mask
) != (val
& mask
)) {
1377 e_err(drv
, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1378 reg
, (val
& mask
), (write
& mask
));
1380 ixgbe_write_reg(&adapter
->hw
, reg
, before
);
1383 ixgbe_write_reg(&adapter
->hw
, reg
, before
);
1387 static int ixgbe_reg_test(struct ixgbe_adapter
*adapter
, u64
*data
)
1389 const struct ixgbe_reg_test
*test
;
1390 u32 value
, before
, after
;
1393 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
1394 e_err(drv
, "Adapter removed - register test blocked\n");
1398 switch (adapter
->hw
.mac
.type
) {
1399 case ixgbe_mac_82598EB
:
1400 toggle
= 0x7FFFF3FF;
1401 test
= reg_test_82598
;
1403 case ixgbe_mac_82599EB
:
1404 case ixgbe_mac_X540
:
1405 toggle
= 0x7FFFF30F;
1406 test
= reg_test_82599
;
1414 * Because the status register is such a special case,
1415 * we handle it separately from the rest of the register
1416 * tests. Some bits are read-only, some toggle, and some
1417 * are writeable on newer MACs.
1419 before
= ixgbe_read_reg(&adapter
->hw
, IXGBE_STATUS
);
1420 value
= (ixgbe_read_reg(&adapter
->hw
, IXGBE_STATUS
) & toggle
);
1421 ixgbe_write_reg(&adapter
->hw
, IXGBE_STATUS
, toggle
);
1422 after
= ixgbe_read_reg(&adapter
->hw
, IXGBE_STATUS
) & toggle
;
1423 if (value
!= after
) {
1424 e_err(drv
, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1429 /* restore previous status */
1430 ixgbe_write_reg(&adapter
->hw
, IXGBE_STATUS
, before
);
1433 * Perform the remainder of the register test, looping through
1434 * the test table until we either fail or reach the null entry.
1437 for (i
= 0; i
< test
->array_len
; i
++) {
1440 switch (test
->test_type
) {
1442 b
= reg_pattern_test(adapter
, data
,
1443 test
->reg
+ (i
* 0x40),
1448 b
= reg_set_and_check(adapter
, data
,
1449 test
->reg
+ (i
* 0x40),
1454 ixgbe_write_reg(&adapter
->hw
,
1455 test
->reg
+ (i
* 0x40),
1459 b
= reg_pattern_test(adapter
, data
,
1460 test
->reg
+ (i
* 4),
1464 case TABLE64_TEST_LO
:
1465 b
= reg_pattern_test(adapter
, data
,
1466 test
->reg
+ (i
* 8),
1470 case TABLE64_TEST_HI
:
1471 b
= reg_pattern_test(adapter
, data
,
1472 (test
->reg
+ 4) + (i
* 8),
1487 static int ixgbe_eeprom_test(struct ixgbe_adapter
*adapter
, u64
*data
)
1489 struct ixgbe_hw
*hw
= &adapter
->hw
;
1490 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
))
1497 static irqreturn_t
ixgbe_test_intr(int irq
, void *data
)
1499 struct net_device
*netdev
= (struct net_device
*) data
;
1500 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1502 adapter
->test_icr
|= IXGBE_READ_REG(&adapter
->hw
, IXGBE_EICR
);
1507 static int ixgbe_intr_test(struct ixgbe_adapter
*adapter
, u64
*data
)
1509 struct net_device
*netdev
= adapter
->netdev
;
1510 u32 mask
, i
= 0, shared_int
= true;
1511 u32 irq
= adapter
->pdev
->irq
;
1515 /* Hook up test interrupt handler just for this test */
1516 if (adapter
->msix_entries
) {
1517 /* NOTE: we don't test MSI-X interrupts here, yet */
1519 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1521 if (request_irq(irq
, ixgbe_test_intr
, 0, netdev
->name
,
1526 } else if (!request_irq(irq
, ixgbe_test_intr
, IRQF_PROBE_SHARED
,
1527 netdev
->name
, netdev
)) {
1529 } else if (request_irq(irq
, ixgbe_test_intr
, IRQF_SHARED
,
1530 netdev
->name
, netdev
)) {
1534 e_info(hw
, "testing %s interrupt\n", shared_int
?
1535 "shared" : "unshared");
1537 /* Disable all the interrupts */
1538 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFFFFFF);
1539 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1540 usleep_range(10000, 20000);
1542 /* Test each interrupt */
1543 for (; i
< 10; i
++) {
1544 /* Interrupt to test */
1549 * Disable the interrupts to be reported in
1550 * the cause register and then force the same
1551 * interrupt and see if one gets posted. If
1552 * an interrupt was posted to the bus, the
1555 adapter
->test_icr
= 0;
1556 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
,
1557 ~mask
& 0x00007FFF);
1558 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
,
1559 ~mask
& 0x00007FFF);
1560 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1561 usleep_range(10000, 20000);
1563 if (adapter
->test_icr
& mask
) {
1570 * Enable the interrupt to be reported in the cause
1571 * register and then force the same interrupt and see
1572 * if one gets posted. If an interrupt was not posted
1573 * to the bus, the test failed.
1575 adapter
->test_icr
= 0;
1576 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1577 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
1578 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1579 usleep_range(10000, 20000);
1581 if (!(adapter
->test_icr
& mask
)) {
1588 * Disable the other interrupts to be reported in
1589 * the cause register and then force the other
1590 * interrupts and see if any get posted. If
1591 * an interrupt was posted to the bus, the
1594 adapter
->test_icr
= 0;
1595 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
,
1596 ~mask
& 0x00007FFF);
1597 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
,
1598 ~mask
& 0x00007FFF);
1599 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1600 usleep_range(10000, 20000);
1602 if (adapter
->test_icr
) {
1609 /* Disable all the interrupts */
1610 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFFFFFF);
1611 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1612 usleep_range(10000, 20000);
1614 /* Unhook test interrupt handler */
1615 free_irq(irq
, netdev
);
1620 static void ixgbe_free_desc_rings(struct ixgbe_adapter
*adapter
)
1622 struct ixgbe_ring
*tx_ring
= &adapter
->test_tx_ring
;
1623 struct ixgbe_ring
*rx_ring
= &adapter
->test_rx_ring
;
1624 struct ixgbe_hw
*hw
= &adapter
->hw
;
1627 /* shut down the DMA engines now so they can be reinitialized later */
1630 reg_ctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1631 reg_ctl
&= ~IXGBE_RXCTRL_RXEN
;
1632 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, reg_ctl
);
1633 ixgbe_disable_rx_queue(adapter
, rx_ring
);
1636 reg_ctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(tx_ring
->reg_idx
));
1637 reg_ctl
&= ~IXGBE_TXDCTL_ENABLE
;
1638 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(tx_ring
->reg_idx
), reg_ctl
);
1640 switch (hw
->mac
.type
) {
1641 case ixgbe_mac_82599EB
:
1642 case ixgbe_mac_X540
:
1643 reg_ctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
1644 reg_ctl
&= ~IXGBE_DMATXCTL_TE
;
1645 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, reg_ctl
);
1651 ixgbe_reset(adapter
);
1653 ixgbe_free_tx_resources(&adapter
->test_tx_ring
);
1654 ixgbe_free_rx_resources(&adapter
->test_rx_ring
);
1657 static int ixgbe_setup_desc_rings(struct ixgbe_adapter
*adapter
)
1659 struct ixgbe_ring
*tx_ring
= &adapter
->test_tx_ring
;
1660 struct ixgbe_ring
*rx_ring
= &adapter
->test_rx_ring
;
1665 /* Setup Tx descriptor ring and Tx buffers */
1666 tx_ring
->count
= IXGBE_DEFAULT_TXD
;
1667 tx_ring
->queue_index
= 0;
1668 tx_ring
->dev
= &adapter
->pdev
->dev
;
1669 tx_ring
->netdev
= adapter
->netdev
;
1670 tx_ring
->reg_idx
= adapter
->tx_ring
[0]->reg_idx
;
1672 err
= ixgbe_setup_tx_resources(tx_ring
);
1676 switch (adapter
->hw
.mac
.type
) {
1677 case ixgbe_mac_82599EB
:
1678 case ixgbe_mac_X540
:
1679 reg_data
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DMATXCTL
);
1680 reg_data
|= IXGBE_DMATXCTL_TE
;
1681 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DMATXCTL
, reg_data
);
1687 ixgbe_configure_tx_ring(adapter
, tx_ring
);
1689 /* Setup Rx Descriptor ring and Rx buffers */
1690 rx_ring
->count
= IXGBE_DEFAULT_RXD
;
1691 rx_ring
->queue_index
= 0;
1692 rx_ring
->dev
= &adapter
->pdev
->dev
;
1693 rx_ring
->netdev
= adapter
->netdev
;
1694 rx_ring
->reg_idx
= adapter
->rx_ring
[0]->reg_idx
;
1696 err
= ixgbe_setup_rx_resources(rx_ring
);
1702 rctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_RXCTRL
);
1703 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXCTRL
, rctl
& ~IXGBE_RXCTRL_RXEN
);
1705 ixgbe_configure_rx_ring(adapter
, rx_ring
);
1707 rctl
|= IXGBE_RXCTRL_RXEN
| IXGBE_RXCTRL_DMBYPS
;
1708 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_RXCTRL
, rctl
);
1713 ixgbe_free_desc_rings(adapter
);
1717 static int ixgbe_setup_loopback_test(struct ixgbe_adapter
*adapter
)
1719 struct ixgbe_hw
*hw
= &adapter
->hw
;
1723 /* Setup MAC loopback */
1724 reg_data
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1725 reg_data
|= IXGBE_HLREG0_LPBK
;
1726 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, reg_data
);
1728 reg_data
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1729 reg_data
|= IXGBE_FCTRL_BAM
| IXGBE_FCTRL_SBP
| IXGBE_FCTRL_MPE
;
1730 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, reg_data
);
1732 /* X540 needs to set the MACC.FLU bit to force link up */
1733 if (adapter
->hw
.mac
.type
== ixgbe_mac_X540
) {
1734 reg_data
= IXGBE_READ_REG(hw
, IXGBE_MACC
);
1735 reg_data
|= IXGBE_MACC_FLU
;
1736 IXGBE_WRITE_REG(hw
, IXGBE_MACC
, reg_data
);
1738 if (hw
->mac
.orig_autoc
) {
1739 reg_data
= hw
->mac
.orig_autoc
| IXGBE_AUTOC_FLU
;
1740 IXGBE_WRITE_REG(hw
, IXGBE_AUTOC
, reg_data
);
1745 IXGBE_WRITE_FLUSH(hw
);
1746 usleep_range(10000, 20000);
1748 /* Disable Atlas Tx lanes; re-enabled in reset path */
1749 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
1752 hw
->mac
.ops
.read_analog_reg8(hw
, IXGBE_ATLAS_PDN_LPBK
, &atlas
);
1753 atlas
|= IXGBE_ATLAS_PDN_TX_REG_EN
;
1754 hw
->mac
.ops
.write_analog_reg8(hw
, IXGBE_ATLAS_PDN_LPBK
, atlas
);
1756 hw
->mac
.ops
.read_analog_reg8(hw
, IXGBE_ATLAS_PDN_10G
, &atlas
);
1757 atlas
|= IXGBE_ATLAS_PDN_TX_10G_QL_ALL
;
1758 hw
->mac
.ops
.write_analog_reg8(hw
, IXGBE_ATLAS_PDN_10G
, atlas
);
1760 hw
->mac
.ops
.read_analog_reg8(hw
, IXGBE_ATLAS_PDN_1G
, &atlas
);
1761 atlas
|= IXGBE_ATLAS_PDN_TX_1G_QL_ALL
;
1762 hw
->mac
.ops
.write_analog_reg8(hw
, IXGBE_ATLAS_PDN_1G
, atlas
);
1764 hw
->mac
.ops
.read_analog_reg8(hw
, IXGBE_ATLAS_PDN_AN
, &atlas
);
1765 atlas
|= IXGBE_ATLAS_PDN_TX_AN_QL_ALL
;
1766 hw
->mac
.ops
.write_analog_reg8(hw
, IXGBE_ATLAS_PDN_AN
, atlas
);
1772 static void ixgbe_loopback_cleanup(struct ixgbe_adapter
*adapter
)
1776 reg_data
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_HLREG0
);
1777 reg_data
&= ~IXGBE_HLREG0_LPBK
;
1778 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_HLREG0
, reg_data
);
1781 static void ixgbe_create_lbtest_frame(struct sk_buff
*skb
,
1782 unsigned int frame_size
)
1784 memset(skb
->data
, 0xFF, frame_size
);
1786 memset(&skb
->data
[frame_size
], 0xAA, frame_size
/ 2 - 1);
1787 memset(&skb
->data
[frame_size
+ 10], 0xBE, 1);
1788 memset(&skb
->data
[frame_size
+ 12], 0xAF, 1);
1791 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer
*rx_buffer
,
1792 unsigned int frame_size
)
1794 unsigned char *data
;
1799 data
= kmap(rx_buffer
->page
) + rx_buffer
->page_offset
;
1801 if (data
[3] != 0xFF ||
1802 data
[frame_size
+ 10] != 0xBE ||
1803 data
[frame_size
+ 12] != 0xAF)
1806 kunmap(rx_buffer
->page
);
1811 static u16
ixgbe_clean_test_rings(struct ixgbe_ring
*rx_ring
,
1812 struct ixgbe_ring
*tx_ring
,
1815 union ixgbe_adv_rx_desc
*rx_desc
;
1816 struct ixgbe_rx_buffer
*rx_buffer
;
1817 struct ixgbe_tx_buffer
*tx_buffer
;
1818 u16 rx_ntc
, tx_ntc
, count
= 0;
1820 /* initialize next to clean and descriptor values */
1821 rx_ntc
= rx_ring
->next_to_clean
;
1822 tx_ntc
= tx_ring
->next_to_clean
;
1823 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ntc
);
1825 while (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
)) {
1826 /* check Rx buffer */
1827 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ntc
];
1829 /* sync Rx buffer for CPU read */
1830 dma_sync_single_for_cpu(rx_ring
->dev
,
1832 ixgbe_rx_bufsz(rx_ring
),
1835 /* verify contents of skb */
1836 if (ixgbe_check_lbtest_frame(rx_buffer
, size
))
1839 /* sync Rx buffer for device write */
1840 dma_sync_single_for_device(rx_ring
->dev
,
1842 ixgbe_rx_bufsz(rx_ring
),
1845 /* unmap buffer on Tx side */
1846 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ntc
];
1847 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
1849 /* increment Rx/Tx next to clean counters */
1851 if (rx_ntc
== rx_ring
->count
)
1854 if (tx_ntc
== tx_ring
->count
)
1857 /* fetch next descriptor */
1858 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ntc
);
1861 netdev_tx_reset_queue(txring_txq(tx_ring
));
1863 /* re-map buffers to ring, store next to clean values */
1864 ixgbe_alloc_rx_buffers(rx_ring
, count
);
1865 rx_ring
->next_to_clean
= rx_ntc
;
1866 tx_ring
->next_to_clean
= tx_ntc
;
1871 static int ixgbe_run_loopback_test(struct ixgbe_adapter
*adapter
)
1873 struct ixgbe_ring
*tx_ring
= &adapter
->test_tx_ring
;
1874 struct ixgbe_ring
*rx_ring
= &adapter
->test_rx_ring
;
1875 int i
, j
, lc
, good_cnt
, ret_val
= 0;
1876 unsigned int size
= 1024;
1877 netdev_tx_t tx_ret_val
;
1878 struct sk_buff
*skb
;
1879 u32 flags_orig
= adapter
->flags
;
1881 /* DCB can modify the frames on Tx */
1882 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
1884 /* allocate test skb */
1885 skb
= alloc_skb(size
, GFP_KERNEL
);
1889 /* place data into test skb */
1890 ixgbe_create_lbtest_frame(skb
, size
);
1894 * Calculate the loop count based on the largest descriptor ring
1895 * The idea is to wrap the largest ring a number of times using 64
1896 * send/receive pairs during each loop
1899 if (rx_ring
->count
<= tx_ring
->count
)
1900 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1902 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1904 for (j
= 0; j
<= lc
; j
++) {
1905 /* reset count of good packets */
1908 /* place 64 packets on the transmit queue*/
1909 for (i
= 0; i
< 64; i
++) {
1911 tx_ret_val
= ixgbe_xmit_frame_ring(skb
,
1914 if (tx_ret_val
== NETDEV_TX_OK
)
1918 if (good_cnt
!= 64) {
1923 /* allow 200 milliseconds for packets to go from Tx to Rx */
1926 good_cnt
= ixgbe_clean_test_rings(rx_ring
, tx_ring
, size
);
1927 if (good_cnt
!= 64) {
1933 /* free the original skb */
1935 adapter
->flags
= flags_orig
;
1940 static int ixgbe_loopback_test(struct ixgbe_adapter
*adapter
, u64
*data
)
1942 *data
= ixgbe_setup_desc_rings(adapter
);
1945 *data
= ixgbe_setup_loopback_test(adapter
);
1948 *data
= ixgbe_run_loopback_test(adapter
);
1949 ixgbe_loopback_cleanup(adapter
);
1952 ixgbe_free_desc_rings(adapter
);
1957 static void ixgbe_diag_test(struct net_device
*netdev
,
1958 struct ethtool_test
*eth_test
, u64
*data
)
1960 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1961 bool if_running
= netif_running(netdev
);
1963 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
1964 e_err(hw
, "Adapter removed - test blocked\n");
1970 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1973 set_bit(__IXGBE_TESTING
, &adapter
->state
);
1974 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1975 struct ixgbe_hw
*hw
= &adapter
->hw
;
1977 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
1979 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
1980 if (adapter
->vfinfo
[i
].clear_to_send
) {
1981 netdev_warn(netdev
, "offline diagnostic is not supported when VFs are present\n");
1987 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1988 clear_bit(__IXGBE_TESTING
,
1996 e_info(hw
, "offline testing starting\n");
1998 /* Link test performed before hardware reset so autoneg doesn't
1999 * interfere with test result
2001 if (ixgbe_link_test(adapter
, &data
[4]))
2002 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2005 /* indicate we're in test mode */
2008 ixgbe_reset(adapter
);
2010 e_info(hw
, "register testing starting\n");
2011 if (ixgbe_reg_test(adapter
, &data
[0]))
2012 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2014 ixgbe_reset(adapter
);
2015 e_info(hw
, "eeprom testing starting\n");
2016 if (ixgbe_eeprom_test(adapter
, &data
[1]))
2017 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2019 ixgbe_reset(adapter
);
2020 e_info(hw
, "interrupt testing starting\n");
2021 if (ixgbe_intr_test(adapter
, &data
[2]))
2022 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2024 /* If SRIOV or VMDq is enabled then skip MAC
2025 * loopback diagnostic. */
2026 if (adapter
->flags
& (IXGBE_FLAG_SRIOV_ENABLED
|
2027 IXGBE_FLAG_VMDQ_ENABLED
)) {
2028 e_info(hw
, "Skip MAC loopback diagnostic in VT mode\n");
2033 ixgbe_reset(adapter
);
2034 e_info(hw
, "loopback testing starting\n");
2035 if (ixgbe_loopback_test(adapter
, &data
[3]))
2036 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2039 ixgbe_reset(adapter
);
2041 /* clear testing bit and return adapter to previous state */
2042 clear_bit(__IXGBE_TESTING
, &adapter
->state
);
2045 else if (hw
->mac
.ops
.disable_tx_laser
)
2046 hw
->mac
.ops
.disable_tx_laser(hw
);
2048 e_info(hw
, "online testing starting\n");
2051 if (ixgbe_link_test(adapter
, &data
[4]))
2052 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2054 /* Offline tests aren't run; pass by default */
2060 clear_bit(__IXGBE_TESTING
, &adapter
->state
);
2064 msleep_interruptible(4 * 1000);
2067 static int ixgbe_wol_exclusion(struct ixgbe_adapter
*adapter
,
2068 struct ethtool_wolinfo
*wol
)
2070 struct ixgbe_hw
*hw
= &adapter
->hw
;
2073 /* WOL not supported for all devices */
2074 if (!ixgbe_wol_supported(adapter
, hw
->device_id
,
2075 hw
->subsystem_device_id
)) {
2083 static void ixgbe_get_wol(struct net_device
*netdev
,
2084 struct ethtool_wolinfo
*wol
)
2086 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2088 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
2089 WAKE_BCAST
| WAKE_MAGIC
;
2092 if (ixgbe_wol_exclusion(adapter
, wol
) ||
2093 !device_can_wakeup(&adapter
->pdev
->dev
))
2096 if (adapter
->wol
& IXGBE_WUFC_EX
)
2097 wol
->wolopts
|= WAKE_UCAST
;
2098 if (adapter
->wol
& IXGBE_WUFC_MC
)
2099 wol
->wolopts
|= WAKE_MCAST
;
2100 if (adapter
->wol
& IXGBE_WUFC_BC
)
2101 wol
->wolopts
|= WAKE_BCAST
;
2102 if (adapter
->wol
& IXGBE_WUFC_MAG
)
2103 wol
->wolopts
|= WAKE_MAGIC
;
2106 static int ixgbe_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
2108 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2110 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
2113 if (ixgbe_wol_exclusion(adapter
, wol
))
2114 return wol
->wolopts
? -EOPNOTSUPP
: 0;
2118 if (wol
->wolopts
& WAKE_UCAST
)
2119 adapter
->wol
|= IXGBE_WUFC_EX
;
2120 if (wol
->wolopts
& WAKE_MCAST
)
2121 adapter
->wol
|= IXGBE_WUFC_MC
;
2122 if (wol
->wolopts
& WAKE_BCAST
)
2123 adapter
->wol
|= IXGBE_WUFC_BC
;
2124 if (wol
->wolopts
& WAKE_MAGIC
)
2125 adapter
->wol
|= IXGBE_WUFC_MAG
;
2127 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
2132 static int ixgbe_nway_reset(struct net_device
*netdev
)
2134 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2136 if (netif_running(netdev
))
2137 ixgbe_reinit_locked(adapter
);
2142 static int ixgbe_set_phys_id(struct net_device
*netdev
,
2143 enum ethtool_phys_id_state state
)
2145 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2146 struct ixgbe_hw
*hw
= &adapter
->hw
;
2149 case ETHTOOL_ID_ACTIVE
:
2150 adapter
->led_reg
= IXGBE_READ_REG(hw
, IXGBE_LEDCTL
);
2154 hw
->mac
.ops
.led_on(hw
, IXGBE_LED_ON
);
2157 case ETHTOOL_ID_OFF
:
2158 hw
->mac
.ops
.led_off(hw
, IXGBE_LED_ON
);
2161 case ETHTOOL_ID_INACTIVE
:
2162 /* Restore LED settings */
2163 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_LEDCTL
, adapter
->led_reg
);
2170 static int ixgbe_get_coalesce(struct net_device
*netdev
,
2171 struct ethtool_coalesce
*ec
)
2173 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2175 /* only valid if in constant ITR mode */
2176 if (adapter
->rx_itr_setting
<= 1)
2177 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
;
2179 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
>> 2;
2181 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2182 if (adapter
->q_vector
[0]->tx
.count
&& adapter
->q_vector
[0]->rx
.count
)
2185 /* only valid if in constant ITR mode */
2186 if (adapter
->tx_itr_setting
<= 1)
2187 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
;
2189 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
>> 2;
2195 * this function must be called before setting the new value of
2198 static bool ixgbe_update_rsc(struct ixgbe_adapter
*adapter
)
2200 struct net_device
*netdev
= adapter
->netdev
;
2202 /* nothing to do if LRO or RSC are not enabled */
2203 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) ||
2204 !(netdev
->features
& NETIF_F_LRO
))
2207 /* check the feature flag value and enable RSC if necessary */
2208 if (adapter
->rx_itr_setting
== 1 ||
2209 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
2210 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
2211 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
2212 e_info(probe
, "rx-usecs value high enough to re-enable RSC\n");
2215 /* if interrupt rate is too high then disable RSC */
2216 } else if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
2217 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
2218 e_info(probe
, "rx-usecs set too low, disabling RSC\n");
2224 static int ixgbe_set_coalesce(struct net_device
*netdev
,
2225 struct ethtool_coalesce
*ec
)
2227 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2228 struct ixgbe_q_vector
*q_vector
;
2230 u16 tx_itr_param
, rx_itr_param
, tx_itr_prev
;
2231 bool need_reset
= false;
2233 if (adapter
->q_vector
[0]->tx
.count
&& adapter
->q_vector
[0]->rx
.count
) {
2234 /* reject Tx specific changes in case of mixed RxTx vectors */
2235 if (ec
->tx_coalesce_usecs
)
2237 tx_itr_prev
= adapter
->rx_itr_setting
;
2239 tx_itr_prev
= adapter
->tx_itr_setting
;
2242 if ((ec
->rx_coalesce_usecs
> (IXGBE_MAX_EITR
>> 2)) ||
2243 (ec
->tx_coalesce_usecs
> (IXGBE_MAX_EITR
>> 2)))
2246 if (ec
->rx_coalesce_usecs
> 1)
2247 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
<< 2;
2249 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
;
2251 if (adapter
->rx_itr_setting
== 1)
2252 rx_itr_param
= IXGBE_20K_ITR
;
2254 rx_itr_param
= adapter
->rx_itr_setting
;
2256 if (ec
->tx_coalesce_usecs
> 1)
2257 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
<< 2;
2259 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
;
2261 if (adapter
->tx_itr_setting
== 1)
2262 tx_itr_param
= IXGBE_10K_ITR
;
2264 tx_itr_param
= adapter
->tx_itr_setting
;
2267 if (adapter
->q_vector
[0]->tx
.count
&& adapter
->q_vector
[0]->rx
.count
)
2268 adapter
->tx_itr_setting
= adapter
->rx_itr_setting
;
2270 #if IS_ENABLED(CONFIG_BQL)
2271 /* detect ITR changes that require update of TXDCTL.WTHRESH */
2272 if ((adapter
->tx_itr_setting
!= 1) &&
2273 (adapter
->tx_itr_setting
< IXGBE_100K_ITR
)) {
2274 if ((tx_itr_prev
== 1) ||
2275 (tx_itr_prev
>= IXGBE_100K_ITR
))
2278 if ((tx_itr_prev
!= 1) &&
2279 (tx_itr_prev
< IXGBE_100K_ITR
))
2283 /* check the old value and enable RSC if necessary */
2284 need_reset
|= ixgbe_update_rsc(adapter
);
2286 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
2287 q_vector
= adapter
->q_vector
[i
];
2288 if (q_vector
->tx
.count
&& !q_vector
->rx
.count
)
2290 q_vector
->itr
= tx_itr_param
;
2292 /* rx only or mixed */
2293 q_vector
->itr
= rx_itr_param
;
2294 ixgbe_write_eitr(q_vector
);
2298 * do reset here at the end to make sure EITR==0 case is handled
2299 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2300 * also locks in RSC enable/disable which requires reset
2303 ixgbe_do_reset(netdev
);
2308 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter
*adapter
,
2309 struct ethtool_rxnfc
*cmd
)
2311 union ixgbe_atr_input
*mask
= &adapter
->fdir_mask
;
2312 struct ethtool_rx_flow_spec
*fsp
=
2313 (struct ethtool_rx_flow_spec
*)&cmd
->fs
;
2314 struct hlist_node
*node2
;
2315 struct ixgbe_fdir_filter
*rule
= NULL
;
2317 /* report total rule count */
2318 cmd
->data
= (1024 << adapter
->fdir_pballoc
) - 2;
2320 hlist_for_each_entry_safe(rule
, node2
,
2321 &adapter
->fdir_filter_list
, fdir_node
) {
2322 if (fsp
->location
<= rule
->sw_idx
)
2326 if (!rule
|| fsp
->location
!= rule
->sw_idx
)
2329 /* fill out the flow spec entry */
2331 /* set flow type field */
2332 switch (rule
->filter
.formatted
.flow_type
) {
2333 case IXGBE_ATR_FLOW_TYPE_TCPV4
:
2334 fsp
->flow_type
= TCP_V4_FLOW
;
2336 case IXGBE_ATR_FLOW_TYPE_UDPV4
:
2337 fsp
->flow_type
= UDP_V4_FLOW
;
2339 case IXGBE_ATR_FLOW_TYPE_SCTPV4
:
2340 fsp
->flow_type
= SCTP_V4_FLOW
;
2342 case IXGBE_ATR_FLOW_TYPE_IPV4
:
2343 fsp
->flow_type
= IP_USER_FLOW
;
2344 fsp
->h_u
.usr_ip4_spec
.ip_ver
= ETH_RX_NFC_IP4
;
2345 fsp
->h_u
.usr_ip4_spec
.proto
= 0;
2346 fsp
->m_u
.usr_ip4_spec
.proto
= 0;
2352 fsp
->h_u
.tcp_ip4_spec
.psrc
= rule
->filter
.formatted
.src_port
;
2353 fsp
->m_u
.tcp_ip4_spec
.psrc
= mask
->formatted
.src_port
;
2354 fsp
->h_u
.tcp_ip4_spec
.pdst
= rule
->filter
.formatted
.dst_port
;
2355 fsp
->m_u
.tcp_ip4_spec
.pdst
= mask
->formatted
.dst_port
;
2356 fsp
->h_u
.tcp_ip4_spec
.ip4src
= rule
->filter
.formatted
.src_ip
[0];
2357 fsp
->m_u
.tcp_ip4_spec
.ip4src
= mask
->formatted
.src_ip
[0];
2358 fsp
->h_u
.tcp_ip4_spec
.ip4dst
= rule
->filter
.formatted
.dst_ip
[0];
2359 fsp
->m_u
.tcp_ip4_spec
.ip4dst
= mask
->formatted
.dst_ip
[0];
2360 fsp
->h_ext
.vlan_tci
= rule
->filter
.formatted
.vlan_id
;
2361 fsp
->m_ext
.vlan_tci
= mask
->formatted
.vlan_id
;
2362 fsp
->h_ext
.vlan_etype
= rule
->filter
.formatted
.flex_bytes
;
2363 fsp
->m_ext
.vlan_etype
= mask
->formatted
.flex_bytes
;
2364 fsp
->h_ext
.data
[1] = htonl(rule
->filter
.formatted
.vm_pool
);
2365 fsp
->m_ext
.data
[1] = htonl(mask
->formatted
.vm_pool
);
2366 fsp
->flow_type
|= FLOW_EXT
;
2369 if (rule
->action
== IXGBE_FDIR_DROP_QUEUE
)
2370 fsp
->ring_cookie
= RX_CLS_FLOW_DISC
;
2372 fsp
->ring_cookie
= rule
->action
;
2377 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter
*adapter
,
2378 struct ethtool_rxnfc
*cmd
,
2381 struct hlist_node
*node2
;
2382 struct ixgbe_fdir_filter
*rule
;
2385 /* report total rule count */
2386 cmd
->data
= (1024 << adapter
->fdir_pballoc
) - 2;
2388 hlist_for_each_entry_safe(rule
, node2
,
2389 &adapter
->fdir_filter_list
, fdir_node
) {
2390 if (cnt
== cmd
->rule_cnt
)
2392 rule_locs
[cnt
] = rule
->sw_idx
;
2396 cmd
->rule_cnt
= cnt
;
2401 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter
*adapter
,
2402 struct ethtool_rxnfc
*cmd
)
2406 /* Report default options for RSS on ixgbe */
2407 switch (cmd
->flow_type
) {
2409 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2412 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
2413 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2416 case AH_ESP_V4_FLOW
:
2420 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
;
2423 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2426 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
2427 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2430 case AH_ESP_V6_FLOW
:
2434 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
;
2443 static int ixgbe_get_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
,
2446 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2447 int ret
= -EOPNOTSUPP
;
2450 case ETHTOOL_GRXRINGS
:
2451 cmd
->data
= adapter
->num_rx_queues
;
2454 case ETHTOOL_GRXCLSRLCNT
:
2455 cmd
->rule_cnt
= adapter
->fdir_filter_count
;
2458 case ETHTOOL_GRXCLSRULE
:
2459 ret
= ixgbe_get_ethtool_fdir_entry(adapter
, cmd
);
2461 case ETHTOOL_GRXCLSRLALL
:
2462 ret
= ixgbe_get_ethtool_fdir_all(adapter
, cmd
, rule_locs
);
2465 ret
= ixgbe_get_rss_hash_opts(adapter
, cmd
);
2474 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter
*adapter
,
2475 struct ixgbe_fdir_filter
*input
,
2478 struct ixgbe_hw
*hw
= &adapter
->hw
;
2479 struct hlist_node
*node2
;
2480 struct ixgbe_fdir_filter
*rule
, *parent
;
2486 hlist_for_each_entry_safe(rule
, node2
,
2487 &adapter
->fdir_filter_list
, fdir_node
) {
2488 /* hash found, or no matching entry */
2489 if (rule
->sw_idx
>= sw_idx
)
2494 /* if there is an old rule occupying our place remove it */
2495 if (rule
&& (rule
->sw_idx
== sw_idx
)) {
2496 if (!input
|| (rule
->filter
.formatted
.bkt_hash
!=
2497 input
->filter
.formatted
.bkt_hash
)) {
2498 err
= ixgbe_fdir_erase_perfect_filter_82599(hw
,
2503 hlist_del(&rule
->fdir_node
);
2505 adapter
->fdir_filter_count
--;
2509 * If no input this was a delete, err should be 0 if a rule was
2510 * successfully found and removed from the list else -EINVAL
2515 /* initialize node and set software index */
2516 INIT_HLIST_NODE(&input
->fdir_node
);
2518 /* add filter to the list */
2520 hlist_add_behind(&input
->fdir_node
, &parent
->fdir_node
);
2522 hlist_add_head(&input
->fdir_node
,
2523 &adapter
->fdir_filter_list
);
2526 adapter
->fdir_filter_count
++;
2531 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec
*fsp
,
2534 switch (fsp
->flow_type
& ~FLOW_EXT
) {
2536 *flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
2539 *flow_type
= IXGBE_ATR_FLOW_TYPE_UDPV4
;
2542 *flow_type
= IXGBE_ATR_FLOW_TYPE_SCTPV4
;
2545 switch (fsp
->h_u
.usr_ip4_spec
.proto
) {
2547 *flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
2550 *flow_type
= IXGBE_ATR_FLOW_TYPE_UDPV4
;
2553 *flow_type
= IXGBE_ATR_FLOW_TYPE_SCTPV4
;
2556 if (!fsp
->m_u
.usr_ip4_spec
.proto
) {
2557 *flow_type
= IXGBE_ATR_FLOW_TYPE_IPV4
;
2571 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter
*adapter
,
2572 struct ethtool_rxnfc
*cmd
)
2574 struct ethtool_rx_flow_spec
*fsp
=
2575 (struct ethtool_rx_flow_spec
*)&cmd
->fs
;
2576 struct ixgbe_hw
*hw
= &adapter
->hw
;
2577 struct ixgbe_fdir_filter
*input
;
2578 union ixgbe_atr_input mask
;
2581 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
2585 * Don't allow programming if the action is a queue greater than
2586 * the number of online Rx queues.
2588 if ((fsp
->ring_cookie
!= RX_CLS_FLOW_DISC
) &&
2589 (fsp
->ring_cookie
>= adapter
->num_rx_queues
))
2592 /* Don't allow indexes to exist outside of available space */
2593 if (fsp
->location
>= ((1024 << adapter
->fdir_pballoc
) - 2)) {
2594 e_err(drv
, "Location out of range\n");
2598 input
= kzalloc(sizeof(*input
), GFP_ATOMIC
);
2602 memset(&mask
, 0, sizeof(union ixgbe_atr_input
));
2605 input
->sw_idx
= fsp
->location
;
2607 /* record flow type */
2608 if (!ixgbe_flowspec_to_flow_type(fsp
,
2609 &input
->filter
.formatted
.flow_type
)) {
2610 e_err(drv
, "Unrecognized flow type\n");
2614 mask
.formatted
.flow_type
= IXGBE_ATR_L4TYPE_IPV6_MASK
|
2615 IXGBE_ATR_L4TYPE_MASK
;
2617 if (input
->filter
.formatted
.flow_type
== IXGBE_ATR_FLOW_TYPE_IPV4
)
2618 mask
.formatted
.flow_type
&= IXGBE_ATR_L4TYPE_IPV6_MASK
;
2620 /* Copy input into formatted structures */
2621 input
->filter
.formatted
.src_ip
[0] = fsp
->h_u
.tcp_ip4_spec
.ip4src
;
2622 mask
.formatted
.src_ip
[0] = fsp
->m_u
.tcp_ip4_spec
.ip4src
;
2623 input
->filter
.formatted
.dst_ip
[0] = fsp
->h_u
.tcp_ip4_spec
.ip4dst
;
2624 mask
.formatted
.dst_ip
[0] = fsp
->m_u
.tcp_ip4_spec
.ip4dst
;
2625 input
->filter
.formatted
.src_port
= fsp
->h_u
.tcp_ip4_spec
.psrc
;
2626 mask
.formatted
.src_port
= fsp
->m_u
.tcp_ip4_spec
.psrc
;
2627 input
->filter
.formatted
.dst_port
= fsp
->h_u
.tcp_ip4_spec
.pdst
;
2628 mask
.formatted
.dst_port
= fsp
->m_u
.tcp_ip4_spec
.pdst
;
2630 if (fsp
->flow_type
& FLOW_EXT
) {
2631 input
->filter
.formatted
.vm_pool
=
2632 (unsigned char)ntohl(fsp
->h_ext
.data
[1]);
2633 mask
.formatted
.vm_pool
=
2634 (unsigned char)ntohl(fsp
->m_ext
.data
[1]);
2635 input
->filter
.formatted
.vlan_id
= fsp
->h_ext
.vlan_tci
;
2636 mask
.formatted
.vlan_id
= fsp
->m_ext
.vlan_tci
;
2637 input
->filter
.formatted
.flex_bytes
=
2638 fsp
->h_ext
.vlan_etype
;
2639 mask
.formatted
.flex_bytes
= fsp
->m_ext
.vlan_etype
;
2642 /* determine if we need to drop or route the packet */
2643 if (fsp
->ring_cookie
== RX_CLS_FLOW_DISC
)
2644 input
->action
= IXGBE_FDIR_DROP_QUEUE
;
2646 input
->action
= fsp
->ring_cookie
;
2648 spin_lock(&adapter
->fdir_perfect_lock
);
2650 if (hlist_empty(&adapter
->fdir_filter_list
)) {
2651 /* save mask and program input mask into HW */
2652 memcpy(&adapter
->fdir_mask
, &mask
, sizeof(mask
));
2653 err
= ixgbe_fdir_set_input_mask_82599(hw
, &mask
);
2655 e_err(drv
, "Error writing mask\n");
2656 goto err_out_w_lock
;
2658 } else if (memcmp(&adapter
->fdir_mask
, &mask
, sizeof(mask
))) {
2659 e_err(drv
, "Only one mask supported per port\n");
2660 goto err_out_w_lock
;
2663 /* apply mask and compute/store hash */
2664 ixgbe_atr_compute_perfect_hash_82599(&input
->filter
, &mask
);
2666 /* program filters to filter memory */
2667 err
= ixgbe_fdir_write_perfect_filter_82599(hw
,
2668 &input
->filter
, input
->sw_idx
,
2669 (input
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
2670 IXGBE_FDIR_DROP_QUEUE
:
2671 adapter
->rx_ring
[input
->action
]->reg_idx
);
2673 goto err_out_w_lock
;
2675 ixgbe_update_ethtool_fdir_entry(adapter
, input
, input
->sw_idx
);
2677 spin_unlock(&adapter
->fdir_perfect_lock
);
2681 spin_unlock(&adapter
->fdir_perfect_lock
);
2687 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter
*adapter
,
2688 struct ethtool_rxnfc
*cmd
)
2690 struct ethtool_rx_flow_spec
*fsp
=
2691 (struct ethtool_rx_flow_spec
*)&cmd
->fs
;
2694 spin_lock(&adapter
->fdir_perfect_lock
);
2695 err
= ixgbe_update_ethtool_fdir_entry(adapter
, NULL
, fsp
->location
);
2696 spin_unlock(&adapter
->fdir_perfect_lock
);
2701 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2702 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2703 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter
*adapter
,
2704 struct ethtool_rxnfc
*nfc
)
2706 u32 flags2
= adapter
->flags2
;
2709 * RSS does not support anything other than hashing
2710 * to queues on src and dst IPs and ports
2712 if (nfc
->data
& ~(RXH_IP_SRC
| RXH_IP_DST
|
2713 RXH_L4_B_0_1
| RXH_L4_B_2_3
))
2716 switch (nfc
->flow_type
) {
2719 if (!(nfc
->data
& RXH_IP_SRC
) ||
2720 !(nfc
->data
& RXH_IP_DST
) ||
2721 !(nfc
->data
& RXH_L4_B_0_1
) ||
2722 !(nfc
->data
& RXH_L4_B_2_3
))
2726 if (!(nfc
->data
& RXH_IP_SRC
) ||
2727 !(nfc
->data
& RXH_IP_DST
))
2729 switch (nfc
->data
& (RXH_L4_B_0_1
| RXH_L4_B_2_3
)) {
2731 flags2
&= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
;
2733 case (RXH_L4_B_0_1
| RXH_L4_B_2_3
):
2734 flags2
|= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
;
2741 if (!(nfc
->data
& RXH_IP_SRC
) ||
2742 !(nfc
->data
& RXH_IP_DST
))
2744 switch (nfc
->data
& (RXH_L4_B_0_1
| RXH_L4_B_2_3
)) {
2746 flags2
&= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
;
2748 case (RXH_L4_B_0_1
| RXH_L4_B_2_3
):
2749 flags2
|= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
;
2755 case AH_ESP_V4_FLOW
:
2759 case AH_ESP_V6_FLOW
:
2763 if (!(nfc
->data
& RXH_IP_SRC
) ||
2764 !(nfc
->data
& RXH_IP_DST
) ||
2765 (nfc
->data
& RXH_L4_B_0_1
) ||
2766 (nfc
->data
& RXH_L4_B_2_3
))
2773 /* if we changed something we need to update flags */
2774 if (flags2
!= adapter
->flags2
) {
2775 struct ixgbe_hw
*hw
= &adapter
->hw
;
2776 u32 mrqc
= IXGBE_READ_REG(hw
, IXGBE_MRQC
);
2778 if ((flags2
& UDP_RSS_FLAGS
) &&
2779 !(adapter
->flags2
& UDP_RSS_FLAGS
))
2780 e_warn(drv
, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2782 adapter
->flags2
= flags2
;
2784 /* Perform hash on these packet types */
2785 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2786 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2787 | IXGBE_MRQC_RSS_FIELD_IPV6
2788 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2790 mrqc
&= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP
|
2791 IXGBE_MRQC_RSS_FIELD_IPV6_UDP
);
2793 if (flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
2794 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
2796 if (flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
2797 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2799 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2805 static int ixgbe_set_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
)
2807 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2808 int ret
= -EOPNOTSUPP
;
2811 case ETHTOOL_SRXCLSRLINS
:
2812 ret
= ixgbe_add_ethtool_fdir_entry(adapter
, cmd
);
2814 case ETHTOOL_SRXCLSRLDEL
:
2815 ret
= ixgbe_del_ethtool_fdir_entry(adapter
, cmd
);
2818 ret
= ixgbe_set_rss_hash_opt(adapter
, cmd
);
2827 static int ixgbe_get_ts_info(struct net_device
*dev
,
2828 struct ethtool_ts_info
*info
)
2830 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2832 switch (adapter
->hw
.mac
.type
) {
2833 case ixgbe_mac_X540
:
2834 case ixgbe_mac_82599EB
:
2835 info
->so_timestamping
=
2836 SOF_TIMESTAMPING_TX_SOFTWARE
|
2837 SOF_TIMESTAMPING_RX_SOFTWARE
|
2838 SOF_TIMESTAMPING_SOFTWARE
|
2839 SOF_TIMESTAMPING_TX_HARDWARE
|
2840 SOF_TIMESTAMPING_RX_HARDWARE
|
2841 SOF_TIMESTAMPING_RAW_HARDWARE
;
2843 if (adapter
->ptp_clock
)
2844 info
->phc_index
= ptp_clock_index(adapter
->ptp_clock
);
2846 info
->phc_index
= -1;
2849 (1 << HWTSTAMP_TX_OFF
) |
2850 (1 << HWTSTAMP_TX_ON
);
2853 (1 << HWTSTAMP_FILTER_NONE
) |
2854 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC
) |
2855 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
) |
2856 (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT
) |
2857 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT
) |
2858 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC
) |
2859 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC
) |
2860 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC
) |
2861 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
) |
2862 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
) |
2863 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
) |
2864 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT
);
2867 return ethtool_op_get_ts_info(dev
, info
);
2872 static unsigned int ixgbe_max_channels(struct ixgbe_adapter
*adapter
)
2874 unsigned int max_combined
;
2875 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2877 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2878 /* We only support one q_vector without MSI-X */
2880 } else if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2881 /* SR-IOV currently only allows one queue on the PF */
2883 } else if (tcs
> 1) {
2884 /* For DCB report channels per traffic class */
2885 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
2886 /* 8 TC w/ 4 queues per TC */
2888 } else if (tcs
> 4) {
2889 /* 8 TC w/ 8 queues per TC */
2892 /* 4 TC w/ 16 queues per TC */
2895 } else if (adapter
->atr_sample_rate
) {
2896 /* support up to 64 queues with ATR */
2897 max_combined
= IXGBE_MAX_FDIR_INDICES
;
2899 /* support up to 16 queues with RSS */
2900 max_combined
= IXGBE_MAX_RSS_INDICES
;
2903 return max_combined
;
2906 static void ixgbe_get_channels(struct net_device
*dev
,
2907 struct ethtool_channels
*ch
)
2909 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2911 /* report maximum channels */
2912 ch
->max_combined
= ixgbe_max_channels(adapter
);
2914 /* report info for other vector */
2915 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2916 ch
->max_other
= NON_Q_VECTORS
;
2917 ch
->other_count
= NON_Q_VECTORS
;
2920 /* record RSS queues */
2921 ch
->combined_count
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2923 /* nothing else to report if RSS is disabled */
2924 if (ch
->combined_count
== 1)
2927 /* we do not support ATR queueing if SR-IOV is enabled */
2928 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
2931 /* same thing goes for being DCB enabled */
2932 if (netdev_get_num_tc(dev
) > 1)
2935 /* if ATR is disabled we can exit */
2936 if (!adapter
->atr_sample_rate
)
2939 /* report flow director queues as maximum channels */
2940 ch
->combined_count
= adapter
->ring_feature
[RING_F_FDIR
].indices
;
2943 static int ixgbe_set_channels(struct net_device
*dev
,
2944 struct ethtool_channels
*ch
)
2946 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2947 unsigned int count
= ch
->combined_count
;
2949 /* verify they are not requesting separate vectors */
2950 if (!count
|| ch
->rx_count
|| ch
->tx_count
)
2953 /* verify other_count has not changed */
2954 if (ch
->other_count
!= NON_Q_VECTORS
)
2957 /* verify the number of channels does not exceed hardware limits */
2958 if (count
> ixgbe_max_channels(adapter
))
2961 /* update feature limits from largest to smallest supported values */
2962 adapter
->ring_feature
[RING_F_FDIR
].limit
= count
;
2964 /* cap RSS limit at 16 */
2965 if (count
> IXGBE_MAX_RSS_INDICES
)
2966 count
= IXGBE_MAX_RSS_INDICES
;
2967 adapter
->ring_feature
[RING_F_RSS
].limit
= count
;
2970 /* cap FCoE limit at 8 */
2971 if (count
> IXGBE_FCRETA_SIZE
)
2972 count
= IXGBE_FCRETA_SIZE
;
2973 adapter
->ring_feature
[RING_F_FCOE
].limit
= count
;
2976 /* use setup TC to update any traffic class queue mapping */
2977 return ixgbe_setup_tc(dev
, netdev_get_num_tc(dev
));
2980 static int ixgbe_get_module_info(struct net_device
*dev
,
2981 struct ethtool_modinfo
*modinfo
)
2983 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
2984 struct ixgbe_hw
*hw
= &adapter
->hw
;
2986 u8 sff8472_rev
, addr_mode
;
2987 bool page_swap
= false;
2989 /* Check whether we support SFF-8472 or not */
2990 status
= hw
->phy
.ops
.read_i2c_eeprom(hw
,
2991 IXGBE_SFF_SFF_8472_COMP
,
2996 /* addressing mode is not supported */
2997 status
= hw
->phy
.ops
.read_i2c_eeprom(hw
,
2998 IXGBE_SFF_SFF_8472_SWAP
,
3003 if (addr_mode
& IXGBE_SFF_ADDRESSING_MODE
) {
3004 e_err(drv
, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3008 if (sff8472_rev
== IXGBE_SFF_SFF_8472_UNSUP
|| page_swap
) {
3009 /* We have a SFP, but it does not support SFF-8472 */
3010 modinfo
->type
= ETH_MODULE_SFF_8079
;
3011 modinfo
->eeprom_len
= ETH_MODULE_SFF_8079_LEN
;
3013 /* We have a SFP which supports a revision of SFF-8472. */
3014 modinfo
->type
= ETH_MODULE_SFF_8472
;
3015 modinfo
->eeprom_len
= ETH_MODULE_SFF_8472_LEN
;
3021 static int ixgbe_get_module_eeprom(struct net_device
*dev
,
3022 struct ethtool_eeprom
*ee
,
3025 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
3026 struct ixgbe_hw
*hw
= &adapter
->hw
;
3027 u32 status
= IXGBE_ERR_PHY_ADDR_INVALID
;
3034 for (i
= ee
->offset
; i
< ee
->offset
+ ee
->len
; i
++) {
3035 /* I2C reads can take long time */
3036 if (test_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
3039 if (i
< ETH_MODULE_SFF_8079_LEN
)
3040 status
= hw
->phy
.ops
.read_i2c_eeprom(hw
, i
, &databyte
);
3042 status
= hw
->phy
.ops
.read_i2c_sff8472(hw
, i
, &databyte
);
3047 data
[i
- ee
->offset
] = databyte
;
3053 static const struct ethtool_ops ixgbe_ethtool_ops
= {
3054 .get_settings
= ixgbe_get_settings
,
3055 .set_settings
= ixgbe_set_settings
,
3056 .get_drvinfo
= ixgbe_get_drvinfo
,
3057 .get_regs_len
= ixgbe_get_regs_len
,
3058 .get_regs
= ixgbe_get_regs
,
3059 .get_wol
= ixgbe_get_wol
,
3060 .set_wol
= ixgbe_set_wol
,
3061 .nway_reset
= ixgbe_nway_reset
,
3062 .get_link
= ethtool_op_get_link
,
3063 .get_eeprom_len
= ixgbe_get_eeprom_len
,
3064 .get_eeprom
= ixgbe_get_eeprom
,
3065 .set_eeprom
= ixgbe_set_eeprom
,
3066 .get_ringparam
= ixgbe_get_ringparam
,
3067 .set_ringparam
= ixgbe_set_ringparam
,
3068 .get_pauseparam
= ixgbe_get_pauseparam
,
3069 .set_pauseparam
= ixgbe_set_pauseparam
,
3070 .get_msglevel
= ixgbe_get_msglevel
,
3071 .set_msglevel
= ixgbe_set_msglevel
,
3072 .self_test
= ixgbe_diag_test
,
3073 .get_strings
= ixgbe_get_strings
,
3074 .set_phys_id
= ixgbe_set_phys_id
,
3075 .get_sset_count
= ixgbe_get_sset_count
,
3076 .get_ethtool_stats
= ixgbe_get_ethtool_stats
,
3077 .get_coalesce
= ixgbe_get_coalesce
,
3078 .set_coalesce
= ixgbe_set_coalesce
,
3079 .get_rxnfc
= ixgbe_get_rxnfc
,
3080 .set_rxnfc
= ixgbe_set_rxnfc
,
3081 .get_channels
= ixgbe_get_channels
,
3082 .set_channels
= ixgbe_set_channels
,
3083 .get_ts_info
= ixgbe_get_ts_info
,
3084 .get_module_info
= ixgbe_get_module_info
,
3085 .get_module_eeprom
= ixgbe_get_module_eeprom
,
3088 void ixgbe_set_ethtool_ops(struct net_device
*netdev
)
3090 netdev
->ethtool_ops
= &ixgbe_ethtool_ops
;