1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name
[] = "ixgbe";
56 static const char ixgbe_driver_string
[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr
[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr
[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version
[] = DRV_VERSION
;
71 static const char ixgbe_copyright
[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
75 [board_82598
] = &ixgbe_82598_info
,
76 [board_82599
] = &ixgbe_82599_info
,
77 [board_X540
] = &ixgbe_X540_info
,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
125 static struct notifier_block dca_notifier
= {
126 .notifier_call
= ixgbe_notify_dca
,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs
;
134 module_param(max_vfs
, uint
, 0);
135 MODULE_PARM_DESC(max_vfs
,
136 "Maximum number of virtual functions to allocate per physical function");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp
;
140 module_param(allow_unsupported_sfp
, uint
, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp
,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug
= -1;
146 module_param(debug
, int, 0);
147 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION
);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
156 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
158 schedule_work(&adapter
->service_task
);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
170 struct ixgbe_reg_info
{
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
177 /* General Registers */
178 {IXGBE_CTRL
, "CTRL"},
179 {IXGBE_STATUS
, "STATUS"},
180 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR
, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
217 switch (reginfo
->ofs
) {
218 case IXGBE_SRRCTL(0):
219 for (i
= 0; i
< 64; i
++)
220 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i
= 0; i
< 64; i
++)
224 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
227 for (i
= 0; i
< 64; i
++)
228 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
231 for (i
= 0; i
< 64; i
++)
232 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
235 for (i
= 0; i
< 64; i
++)
236 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
238 case IXGBE_RXDCTL(0):
239 for (i
= 0; i
< 64; i
++)
240 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
243 for (i
= 0; i
< 64; i
++)
244 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
247 for (i
= 0; i
< 64; i
++)
248 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
251 for (i
= 0; i
< 64; i
++)
252 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
255 for (i
= 0; i
< 64; i
++)
256 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
259 for (i
= 0; i
< 64; i
++)
260 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
263 for (i
= 0; i
< 64; i
++)
264 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
267 for (i
= 0; i
< 64; i
++)
268 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
270 case IXGBE_TXDCTL(0):
271 for (i
= 0; i
< 64; i
++)
272 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
275 pr_info("%-15s %08x\n", reginfo
->name
,
276 IXGBE_READ_REG(hw
, reginfo
->ofs
));
280 for (i
= 0; i
< 8; i
++) {
281 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
282 pr_err("%-15s", rname
);
283 for (j
= 0; j
< 8; j
++)
284 pr_cont(" %08x", regs
[i
*8+j
]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
295 struct net_device
*netdev
= adapter
->netdev
;
296 struct ixgbe_hw
*hw
= &adapter
->hw
;
297 struct ixgbe_reg_info
*reginfo
;
299 struct ixgbe_ring
*tx_ring
;
300 struct ixgbe_tx_buffer
*tx_buffer
;
301 union ixgbe_adv_tx_desc
*tx_desc
;
302 struct my_u0
{ u64 a
; u64 b
; } *u0
;
303 struct ixgbe_ring
*rx_ring
;
304 union ixgbe_adv_rx_desc
*rx_desc
;
305 struct ixgbe_rx_buffer
*rx_buffer_info
;
309 if (!netif_msg_hw(adapter
))
312 /* Print netdevice Info */
314 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
328 reginfo
->name
; reginfo
++) {
329 ixgbe_regdump(hw
, reginfo
);
332 /* Print TX Ring Summary */
333 if (!netdev
|| !netif_running(netdev
))
336 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
339 tx_ring
= adapter
->tx_ring
[n
];
340 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
343 (u64
)dma_unmap_addr(tx_buffer
, dma
),
344 dma_unmap_len(tx_buffer
, len
),
345 tx_buffer
->next_to_watch
,
346 (u64
)tx_buffer
->time_stamp
);
350 if (!netif_msg_tx_done(adapter
))
351 goto rx_ring_summary
;
353 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
367 tx_ring
= adapter
->tx_ring
[n
];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
376 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
377 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
378 u0
= (struct my_u0
*)tx_desc
;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i
,
383 (u64
)dma_unmap_addr(tx_buffer
, dma
),
384 dma_unmap_len(tx_buffer
, len
),
385 tx_buffer
->next_to_watch
,
386 (u64
)tx_buffer
->time_stamp
,
388 if (i
== tx_ring
->next_to_use
&&
389 i
== tx_ring
->next_to_clean
)
391 else if (i
== tx_ring
->next_to_use
)
393 else if (i
== tx_ring
->next_to_clean
)
398 if (netif_msg_pktdata(adapter
) &&
399 dma_unmap_len(tx_buffer
, len
) != 0)
400 print_hex_dump(KERN_INFO
, "",
401 DUMP_PREFIX_ADDRESS
, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer
,
404 dma_unmap_len(tx_buffer
, len
),
409 /* Print RX Rings Summary */
411 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
414 rx_ring
= adapter
->rx_ring
[n
];
415 pr_info("%5d %5X %5X\n",
416 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
420 if (!netif_msg_rx_status(adapter
))
423 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
446 rx_ring
= adapter
->rx_ring
[n
];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i
= 0; i
< rx_ring
->count
; i
++) {
458 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
459 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
460 u0
= (struct my_u0
*)rx_desc
;
461 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
462 if (staterr
& IXGBE_RXD_STAT_DD
) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i
,
468 rx_buffer_info
->skb
);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i
,
474 (u64
)rx_buffer_info
->dma
,
475 rx_buffer_info
->skb
);
477 if (netif_msg_pktdata(adapter
)) {
478 print_hex_dump(KERN_INFO
, "",
479 DUMP_PREFIX_ADDRESS
, 16, 1,
480 phys_to_virt(rx_buffer_info
->dma
),
481 ixgbe_rx_bufsz(rx_ring
), true);
485 if (i
== rx_ring
->next_to_use
)
487 else if (i
== rx_ring
->next_to_clean
)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
503 /* Let firmware take over control of h/w */
504 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
505 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
506 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
515 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
516 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
528 u8 queue
, u8 msix_vector
)
531 struct ixgbe_hw
*hw
= &adapter
->hw
;
532 switch (hw
->mac
.type
) {
533 case ixgbe_mac_82598EB
:
534 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
537 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
538 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
539 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
540 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
541 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
543 case ixgbe_mac_82599EB
:
545 if (direction
== -1) {
547 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
548 index
= ((queue
& 1) * 8);
549 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
550 ivar
&= ~(0xFF << index
);
551 ivar
|= (msix_vector
<< index
);
552 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
555 /* tx or rx causes */
556 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
557 index
= ((16 * (queue
& 1)) + (8 * direction
));
558 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
559 ivar
&= ~(0xFF << index
);
560 ivar
|= (msix_vector
<< index
);
561 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
574 switch (adapter
->hw
.mac
.type
) {
575 case ixgbe_mac_82598EB
:
576 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
577 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
579 case ixgbe_mac_82599EB
:
581 mask
= (qmask
& 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
583 mask
= (qmask
>> 32);
584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
592 struct ixgbe_tx_buffer
*tx_buffer
)
594 if (tx_buffer
->skb
) {
595 dev_kfree_skb_any(tx_buffer
->skb
);
596 if (dma_unmap_len(tx_buffer
, len
))
597 dma_unmap_single(ring
->dev
,
598 dma_unmap_addr(tx_buffer
, dma
),
599 dma_unmap_len(tx_buffer
, len
),
601 } else if (dma_unmap_len(tx_buffer
, len
)) {
602 dma_unmap_page(ring
->dev
,
603 dma_unmap_addr(tx_buffer
, dma
),
604 dma_unmap_len(tx_buffer
, len
),
607 tx_buffer
->next_to_watch
= NULL
;
608 tx_buffer
->skb
= NULL
;
609 dma_unmap_len_set(tx_buffer
, len
, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
615 struct ixgbe_hw
*hw
= &adapter
->hw
;
616 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
621 if ((hw
->fc
.current_mode
== ixgbe_fc_full
) ||
622 (hw
->fc
.current_mode
== ixgbe_fc_rx_pause
)) {
623 switch (hw
->mac
.type
) {
624 case ixgbe_mac_82598EB
:
625 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
628 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
630 hwstats
->lxoffrxc
+= data
;
632 /* refill credits (no tx hang) if we received xoff */
636 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
637 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
638 &adapter
->tx_ring
[i
]->state
);
640 } else if (!(adapter
->dcb_cfg
.pfc_mode_enable
))
643 /* update stats for each tc, only valid with PFC enabled */
644 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
645 switch (hw
->mac
.type
) {
646 case ixgbe_mac_82598EB
:
647 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
650 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
652 hwstats
->pxoffrxc
[i
] += xoff
[i
];
655 /* disarm tx queues that have received xoff frames */
656 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
657 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
658 u8 tc
= tx_ring
->dcb_tc
;
661 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
665 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
667 return ring
->stats
.packets
;
670 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
672 struct ixgbe_adapter
*adapter
= netdev_priv(ring
->netdev
);
673 struct ixgbe_hw
*hw
= &adapter
->hw
;
675 u32 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
676 u32 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
679 return (head
< tail
) ?
680 tail
- head
: (tail
+ ring
->count
- head
);
685 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
687 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
688 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
689 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
692 clear_check_for_tx_hang(tx_ring
);
695 * Check for a hung queue, but be thorough. This verifies
696 * that a transmit has been completed since the previous
697 * check AND there is at least one packet pending. The
698 * ARMED bit is set to indicate a potential hang. The
699 * bit is cleared if a pause frame is received to remove
700 * false hang detection due to PFC or 802.3x frames. By
701 * requiring this to fail twice we avoid races with
702 * pfc clearing the ARMED bit and conditions where we
703 * run the check_tx_hang logic with a transmit completion
704 * pending but without time to complete it yet.
706 if ((tx_done_old
== tx_done
) && tx_pending
) {
707 /* make sure it is true for two checks in a row */
708 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
711 /* update completed stats and continue */
712 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
713 /* reset the countdown */
714 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
721 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
722 * @adapter: driver private struct
724 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
727 /* Do the reset outside of interrupt context */
728 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
729 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
730 ixgbe_service_event_schedule(adapter
);
735 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
736 * @q_vector: structure containing interrupt and ring information
737 * @tx_ring: tx ring to clean
739 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
740 struct ixgbe_ring
*tx_ring
)
742 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
743 struct ixgbe_tx_buffer
*tx_buffer
;
744 union ixgbe_adv_tx_desc
*tx_desc
;
745 unsigned int total_bytes
= 0, total_packets
= 0;
746 unsigned int budget
= q_vector
->tx
.work_limit
;
747 unsigned int i
= tx_ring
->next_to_clean
;
749 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
752 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
753 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
757 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
759 /* if next_to_watch is not set then there is no work pending */
763 /* prevent any other reads prior to eop_desc */
766 /* if DD is not set pending work has not been completed */
767 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
770 /* clear next_to_watch to prevent false hangs */
771 tx_buffer
->next_to_watch
= NULL
;
773 /* update the statistics for this packet */
774 total_bytes
+= tx_buffer
->bytecount
;
775 total_packets
+= tx_buffer
->gso_segs
;
778 dev_kfree_skb_any(tx_buffer
->skb
);
780 /* unmap skb header data */
781 dma_unmap_single(tx_ring
->dev
,
782 dma_unmap_addr(tx_buffer
, dma
),
783 dma_unmap_len(tx_buffer
, len
),
786 /* clear tx_buffer data */
787 tx_buffer
->skb
= NULL
;
788 dma_unmap_len_set(tx_buffer
, len
, 0);
790 /* unmap remaining buffers */
791 while (tx_desc
!= eop_desc
) {
797 tx_buffer
= tx_ring
->tx_buffer_info
;
798 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
801 /* unmap any remaining paged data */
802 if (dma_unmap_len(tx_buffer
, len
)) {
803 dma_unmap_page(tx_ring
->dev
,
804 dma_unmap_addr(tx_buffer
, dma
),
805 dma_unmap_len(tx_buffer
, len
),
807 dma_unmap_len_set(tx_buffer
, len
, 0);
811 /* move us one more past the eop_desc for start of next pkt */
817 tx_buffer
= tx_ring
->tx_buffer_info
;
818 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
821 /* issue prefetch for next Tx descriptor */
824 /* update budget accounting */
826 } while (likely(budget
));
829 tx_ring
->next_to_clean
= i
;
830 u64_stats_update_begin(&tx_ring
->syncp
);
831 tx_ring
->stats
.bytes
+= total_bytes
;
832 tx_ring
->stats
.packets
+= total_packets
;
833 u64_stats_update_end(&tx_ring
->syncp
);
834 q_vector
->tx
.total_bytes
+= total_bytes
;
835 q_vector
->tx
.total_packets
+= total_packets
;
837 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
838 /* schedule immediate reset if we believe we hung */
839 struct ixgbe_hw
*hw
= &adapter
->hw
;
840 e_err(drv
, "Detected Tx Unit Hang\n"
842 " TDH, TDT <%x>, <%x>\n"
843 " next_to_use <%x>\n"
844 " next_to_clean <%x>\n"
845 "tx_buffer_info[next_to_clean]\n"
846 " time_stamp <%lx>\n"
848 tx_ring
->queue_index
,
849 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
850 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
851 tx_ring
->next_to_use
, i
,
852 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
854 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
857 "tx hang %d detected on queue %d, resetting adapter\n",
858 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
860 /* schedule immediate reset if we believe we hung */
861 ixgbe_tx_timeout_reset(adapter
);
863 /* the adapter is about to reset, no point in enabling stuff */
867 netdev_tx_completed_queue(txring_txq(tx_ring
),
868 total_packets
, total_bytes
);
870 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
871 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
872 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
873 /* Make sure that anybody stopping the queue after this
874 * sees the new next_to_clean.
877 if (__netif_subqueue_stopped(tx_ring
->netdev
,
878 tx_ring
->queue_index
)
879 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
880 netif_wake_subqueue(tx_ring
->netdev
,
881 tx_ring
->queue_index
);
882 ++tx_ring
->tx_stats
.restart_queue
;
889 #ifdef CONFIG_IXGBE_DCA
890 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
891 struct ixgbe_ring
*tx_ring
,
894 struct ixgbe_hw
*hw
= &adapter
->hw
;
895 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
898 switch (hw
->mac
.type
) {
899 case ixgbe_mac_82598EB
:
900 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
902 case ixgbe_mac_82599EB
:
904 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
905 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
908 /* for unknown hardware do not write register */
913 * We can enable relaxed ordering for reads, but not writes when
914 * DCA is enabled. This is due to a known issue in some chipsets
915 * which will cause the DCA tag to be cleared.
917 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
918 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
919 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
921 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
924 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
925 struct ixgbe_ring
*rx_ring
,
928 struct ixgbe_hw
*hw
= &adapter
->hw
;
929 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
930 u8 reg_idx
= rx_ring
->reg_idx
;
933 switch (hw
->mac
.type
) {
934 case ixgbe_mac_82599EB
:
936 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
943 * We can enable relaxed ordering for reads, but not writes when
944 * DCA is enabled. This is due to a known issue in some chipsets
945 * which will cause the DCA tag to be cleared.
947 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
948 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
949 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
951 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
954 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
956 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
957 struct ixgbe_ring
*ring
;
960 if (q_vector
->cpu
== cpu
)
963 ixgbe_for_each_ring(ring
, q_vector
->tx
)
964 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
966 ixgbe_for_each_ring(ring
, q_vector
->rx
)
967 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
974 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
979 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
982 /* always use CB2 mode, difference is masked in the CB driver */
983 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
985 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
986 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
990 for (i
= 0; i
< num_q_vectors
; i
++) {
991 adapter
->q_vector
[i
]->cpu
= -1;
992 ixgbe_update_dca(adapter
->q_vector
[i
]);
996 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
998 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
999 unsigned long event
= *(unsigned long *)data
;
1001 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1005 case DCA_PROVIDER_ADD
:
1006 /* if we're already enabled, don't do it again */
1007 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1009 if (dca_add_requester(dev
) == 0) {
1010 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1011 ixgbe_setup_dca(adapter
);
1014 /* Fall Through since DCA is disabled. */
1015 case DCA_PROVIDER_REMOVE
:
1016 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1017 dca_remove_requester(dev
);
1018 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1019 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1027 #endif /* CONFIG_IXGBE_DCA */
1028 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1029 union ixgbe_adv_rx_desc
*rx_desc
,
1030 struct sk_buff
*skb
)
1032 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1033 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
1038 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1039 * @adapter: address of board private structure
1040 * @rx_desc: advanced rx descriptor
1042 * Returns : true if it is FCoE pkt
1044 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_adapter
*adapter
,
1045 union ixgbe_adv_rx_desc
*rx_desc
)
1047 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1049 return (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
1050 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1051 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1052 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1055 #endif /* IXGBE_FCOE */
1057 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1058 * @ring: structure containing ring specific data
1059 * @rx_desc: current Rx descriptor being processed
1060 * @skb: skb currently being received and modified
1062 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1063 union ixgbe_adv_rx_desc
*rx_desc
,
1064 struct sk_buff
*skb
)
1066 skb_checksum_none_assert(skb
);
1068 /* Rx csum disabled */
1069 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1072 /* if IP and error */
1073 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1074 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1075 ring
->rx_stats
.csum_err
++;
1079 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1082 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1083 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1086 * 82599 errata, UDP frames with a 0 checksum can be marked as
1089 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1090 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1093 ring
->rx_stats
.csum_err
++;
1097 /* It must be a TCP or UDP packet with a valid checksum */
1098 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1101 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1103 rx_ring
->next_to_use
= val
;
1105 /* update next to alloc since we have filled the ring */
1106 rx_ring
->next_to_alloc
= val
;
1108 * Force memory writes to complete before letting h/w
1109 * know there are new descriptors to fetch. (Only
1110 * applicable for weak-ordered memory model archs,
1114 writel(val
, rx_ring
->tail
);
1117 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1118 struct ixgbe_rx_buffer
*bi
)
1120 struct page
*page
= bi
->page
;
1121 dma_addr_t dma
= bi
->dma
;
1123 /* since we are recycling buffers we should seldom need to alloc */
1127 /* alloc new page for storage */
1128 if (likely(!page
)) {
1129 page
= alloc_pages(GFP_ATOMIC
| __GFP_COLD
,
1130 ixgbe_rx_pg_order(rx_ring
));
1131 if (unlikely(!page
)) {
1132 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1138 /* map page for use */
1139 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1140 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1143 * if mapping failed free memory back to system since
1144 * there isn't much point in holding memory we can't use
1146 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1150 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1155 bi
->page_offset
^= ixgbe_rx_bufsz(rx_ring
);
1161 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1162 * @rx_ring: ring to place buffers on
1163 * @cleaned_count: number of buffers to replace
1165 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1167 union ixgbe_adv_rx_desc
*rx_desc
;
1168 struct ixgbe_rx_buffer
*bi
;
1169 u16 i
= rx_ring
->next_to_use
;
1175 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1176 bi
= &rx_ring
->rx_buffer_info
[i
];
1177 i
-= rx_ring
->count
;
1180 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1184 * Refresh the desc even if buffer_addrs didn't change
1185 * because each write-back erases this info.
1187 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1193 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1194 bi
= rx_ring
->rx_buffer_info
;
1195 i
-= rx_ring
->count
;
1198 /* clear the hdr_addr for the next_to_use descriptor */
1199 rx_desc
->read
.hdr_addr
= 0;
1202 } while (cleaned_count
);
1204 i
+= rx_ring
->count
;
1206 if (rx_ring
->next_to_use
!= i
)
1207 ixgbe_release_rx_desc(rx_ring
, i
);
1211 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1212 * @data: pointer to the start of the headers
1213 * @max_len: total length of section to find headers in
1215 * This function is meant to determine the length of headers that will
1216 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1217 * motivation of doing this is to only perform one pull for IPv4 TCP
1218 * packets so that we can do basic things like calculating the gso_size
1219 * based on the average data per packet.
1221 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1222 unsigned int max_len
)
1225 unsigned char *network
;
1228 struct vlan_hdr
*vlan
;
1233 u8 nexthdr
= 0; /* default to not TCP */
1236 /* this should never happen, but better safe than sorry */
1237 if (max_len
< ETH_HLEN
)
1240 /* initialize network frame pointer */
1243 /* set first protocol and move network header forward */
1244 protocol
= hdr
.eth
->h_proto
;
1245 hdr
.network
+= ETH_HLEN
;
1247 /* handle any vlan tag if present */
1248 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
1249 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1252 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1253 hdr
.network
+= VLAN_HLEN
;
1256 /* handle L3 protocols */
1257 if (protocol
== __constant_htons(ETH_P_IP
)) {
1258 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1261 /* access ihl as a u8 to avoid unaligned access on ia64 */
1262 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1264 /* verify hlen meets minimum size requirements */
1265 if (hlen
< sizeof(struct iphdr
))
1266 return hdr
.network
- data
;
1268 /* record next protocol */
1269 nexthdr
= hdr
.ipv4
->protocol
;
1270 hdr
.network
+= hlen
;
1272 } else if (protocol
== __constant_htons(ETH_P_FCOE
)) {
1273 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1275 hdr
.network
+= FCOE_HEADER_LEN
;
1278 return hdr
.network
- data
;
1281 /* finally sort out TCP */
1282 if (nexthdr
== IPPROTO_TCP
) {
1283 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1286 /* access doff as a u8 to avoid unaligned access on ia64 */
1287 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1289 /* verify hlen meets minimum size requirements */
1290 if (hlen
< sizeof(struct tcphdr
))
1291 return hdr
.network
- data
;
1293 hdr
.network
+= hlen
;
1297 * If everything has gone correctly hdr.network should be the
1298 * data section of the packet and will be the end of the header.
1299 * If not then it probably represents the end of the last recognized
1302 if ((hdr
.network
- data
) < max_len
)
1303 return hdr
.network
- data
;
1308 static void ixgbe_get_rsc_cnt(struct ixgbe_ring
*rx_ring
,
1309 union ixgbe_adv_rx_desc
*rx_desc
,
1310 struct sk_buff
*skb
)
1315 if (!ring_is_rsc_enabled(rx_ring
))
1318 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1319 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1321 /* If this is an RSC frame rsc_cnt should be non-zero */
1325 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1326 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1328 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1331 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1332 struct sk_buff
*skb
)
1334 u16 hdr_len
= skb_headlen(skb
);
1336 /* set gso_size to avoid messing up TCP MSS */
1337 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1338 IXGBE_CB(skb
)->append_cnt
);
1341 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1342 struct sk_buff
*skb
)
1344 /* if append_cnt is 0 then frame is not RSC */
1345 if (!IXGBE_CB(skb
)->append_cnt
)
1348 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1349 rx_ring
->rx_stats
.rsc_flush
++;
1351 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1353 /* gso_size is computed using append_cnt so always clear it last */
1354 IXGBE_CB(skb
)->append_cnt
= 0;
1358 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1359 * @rx_ring: rx descriptor ring packet is being transacted on
1360 * @rx_desc: pointer to the EOP Rx descriptor
1361 * @skb: pointer to current skb being populated
1363 * This function checks the ring, descriptor, and packet information in
1364 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1365 * other fields within the skb.
1367 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1368 union ixgbe_adv_rx_desc
*rx_desc
,
1369 struct sk_buff
*skb
)
1371 ixgbe_update_rsc_stats(rx_ring
, skb
);
1373 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1375 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1377 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1378 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1379 __vlan_hwaccel_put_tag(skb
, vid
);
1382 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1384 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
1387 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1388 struct sk_buff
*skb
)
1390 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1392 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1393 napi_gro_receive(&q_vector
->napi
, skb
);
1399 * ixgbe_is_non_eop - process handling of non-EOP buffers
1400 * @rx_ring: Rx ring being processed
1401 * @rx_desc: Rx descriptor for current buffer
1402 * @skb: Current socket buffer containing buffer in progress
1404 * This function updates next to clean. If the buffer is an EOP buffer
1405 * this function exits returning false, otherwise it will place the
1406 * sk_buff in the next buffer to be chained and return true indicating
1407 * that this is in fact a non-EOP buffer.
1409 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1410 union ixgbe_adv_rx_desc
*rx_desc
,
1411 struct sk_buff
*skb
)
1413 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1415 /* fetch, update, and store next to clean */
1416 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1417 rx_ring
->next_to_clean
= ntc
;
1419 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1421 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1424 /* append_cnt indicates packet is RSC, if so fetch nextp */
1425 if (IXGBE_CB(skb
)->append_cnt
) {
1426 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1427 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1428 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1431 /* place skb in next buffer to be received */
1432 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1433 rx_ring
->rx_stats
.non_eop_descs
++;
1439 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1440 * @rx_ring: rx descriptor ring packet is being transacted on
1441 * @rx_desc: pointer to the EOP Rx descriptor
1442 * @skb: pointer to current skb being fixed
1444 * Check for corrupted packet headers caused by senders on the local L2
1445 * embedded NIC switch not setting up their Tx Descriptors right. These
1446 * should be very rare.
1448 * Also address the case where we are pulling data in on pages only
1449 * and as such no data is present in the skb header.
1451 * In addition if skb is not at least 60 bytes we need to pad it so that
1452 * it is large enough to qualify as a valid Ethernet frame.
1454 * Returns true if an error was encountered and skb was freed.
1456 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1457 union ixgbe_adv_rx_desc
*rx_desc
,
1458 struct sk_buff
*skb
)
1460 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1461 struct net_device
*netdev
= rx_ring
->netdev
;
1463 unsigned int pull_len
;
1465 /* if the page was released unmap it, else just sync our portion */
1466 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1467 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1468 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1469 IXGBE_CB(skb
)->page_released
= false;
1471 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1474 ixgbe_rx_bufsz(rx_ring
),
1477 IXGBE_CB(skb
)->dma
= 0;
1479 /* verify that the packet does not have any known errors */
1480 if (unlikely(ixgbe_test_staterr(rx_desc
,
1481 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1482 !(netdev
->features
& NETIF_F_RXALL
))) {
1483 dev_kfree_skb_any(skb
);
1488 * it is valid to use page_address instead of kmap since we are
1489 * working with pages allocated out of the lomem pool per
1490 * alloc_page(GFP_ATOMIC)
1492 va
= skb_frag_address(frag
);
1495 * we need the header to contain the greater of either ETH_HLEN or
1496 * 60 bytes if the skb->len is less than 60 for skb_pad.
1498 pull_len
= skb_frag_size(frag
);
1500 pull_len
= ixgbe_get_headlen(va
, pull_len
);
1502 /* align pull length to size of long to optimize memcpy performance */
1503 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1505 /* update all of the pointers */
1506 skb_frag_size_sub(frag
, pull_len
);
1507 frag
->page_offset
+= pull_len
;
1508 skb
->data_len
-= pull_len
;
1509 skb
->tail
+= pull_len
;
1512 * if we sucked the frag empty then we should free it,
1513 * if there are other frags here something is screwed up in hardware
1515 if (skb_frag_size(frag
) == 0) {
1516 BUG_ON(skb_shinfo(skb
)->nr_frags
!= 1);
1517 skb_shinfo(skb
)->nr_frags
= 0;
1518 __skb_frag_unref(frag
);
1519 skb
->truesize
-= ixgbe_rx_bufsz(rx_ring
);
1522 /* if skb_pad returns an error the skb was freed */
1523 if (unlikely(skb
->len
< 60)) {
1524 int pad_len
= 60 - skb
->len
;
1526 if (skb_pad(skb
, pad_len
))
1528 __skb_put(skb
, pad_len
);
1535 * ixgbe_can_reuse_page - determine if we can reuse a page
1536 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1538 * Returns true if page can be reused in another Rx buffer
1540 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer
*rx_buffer
)
1542 struct page
*page
= rx_buffer
->page
;
1544 /* if we are only owner of page and it is local we can reuse it */
1545 return likely(page_count(page
) == 1) &&
1546 likely(page_to_nid(page
) == numa_node_id());
1550 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1551 * @rx_ring: rx descriptor ring to store buffers on
1552 * @old_buff: donor buffer to have page reused
1554 * Syncronizes page for reuse by the adapter
1556 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1557 struct ixgbe_rx_buffer
*old_buff
)
1559 struct ixgbe_rx_buffer
*new_buff
;
1560 u16 nta
= rx_ring
->next_to_alloc
;
1561 u16 bufsz
= ixgbe_rx_bufsz(rx_ring
);
1563 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1565 /* update, and store next to alloc */
1567 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1569 /* transfer page from old buffer to new buffer */
1570 new_buff
->page
= old_buff
->page
;
1571 new_buff
->dma
= old_buff
->dma
;
1573 /* flip page offset to other buffer and store to new_buff */
1574 new_buff
->page_offset
= old_buff
->page_offset
^ bufsz
;
1576 /* sync the buffer for use by the device */
1577 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1578 new_buff
->page_offset
, bufsz
,
1581 /* bump ref count on page before it is given to the stack */
1582 get_page(new_buff
->page
);
1586 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1587 * @rx_ring: rx descriptor ring to transact packets on
1588 * @rx_buffer: buffer containing page to add
1589 * @rx_desc: descriptor containing length of buffer written by hardware
1590 * @skb: sk_buff to place the data into
1592 * This function is based on skb_add_rx_frag. I would have used that
1593 * function however it doesn't handle the truesize case correctly since we
1594 * are allocating more memory than might be used for a single receive.
1596 static void ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1597 struct ixgbe_rx_buffer
*rx_buffer
,
1598 struct sk_buff
*skb
, int size
)
1600 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1601 rx_buffer
->page
, rx_buffer
->page_offset
,
1604 skb
->data_len
+= size
;
1605 skb
->truesize
+= ixgbe_rx_bufsz(rx_ring
);
1609 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1610 * @q_vector: structure containing interrupt and ring information
1611 * @rx_ring: rx descriptor ring to transact packets on
1612 * @budget: Total limit on number of packets to process
1614 * This function provides a "bounce buffer" approach to Rx interrupt
1615 * processing. The advantage to this is that on systems that have
1616 * expensive overhead for IOMMU access this provides a means of avoiding
1617 * it by maintaining the mapping of the page to the syste.
1619 * Returns true if all work is completed without reaching budget
1621 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1622 struct ixgbe_ring
*rx_ring
,
1625 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1627 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1629 #endif /* IXGBE_FCOE */
1630 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
1633 struct ixgbe_rx_buffer
*rx_buffer
;
1634 union ixgbe_adv_rx_desc
*rx_desc
;
1635 struct sk_buff
*skb
;
1639 /* return some buffers to hardware, one at a time is too slow */
1640 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1641 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1645 ntc
= rx_ring
->next_to_clean
;
1646 rx_desc
= IXGBE_RX_DESC(rx_ring
, ntc
);
1647 rx_buffer
= &rx_ring
->rx_buffer_info
[ntc
];
1649 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
1653 * This memory barrier is needed to keep us from reading
1654 * any other fields out of the rx_desc until we know the
1655 * RXD_STAT_DD bit is set
1659 page
= rx_buffer
->page
;
1662 skb
= rx_buffer
->skb
;
1665 void *page_addr
= page_address(page
) +
1666 rx_buffer
->page_offset
;
1668 /* prefetch first cache line of first page */
1669 prefetch(page_addr
);
1670 #if L1_CACHE_BYTES < 128
1671 prefetch(page_addr
+ L1_CACHE_BYTES
);
1674 /* allocate a skb to store the frags */
1675 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
1677 if (unlikely(!skb
)) {
1678 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1683 * we will be copying header into skb->data in
1684 * pskb_may_pull so it is in our interest to prefetch
1685 * it now to avoid a possible cache miss
1687 prefetchw(skb
->data
);
1690 * Delay unmapping of the first packet. It carries the
1691 * header information, HW may still access the header
1692 * after the writeback. Only unmap it when EOP is
1695 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1697 /* we are reusing so sync this buffer for CPU use */
1698 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1700 rx_buffer
->page_offset
,
1701 ixgbe_rx_bufsz(rx_ring
),
1705 /* pull page into skb */
1706 ixgbe_add_rx_frag(rx_ring
, rx_buffer
, skb
,
1707 le16_to_cpu(rx_desc
->wb
.upper
.length
));
1709 if (ixgbe_can_reuse_page(rx_buffer
)) {
1710 /* hand second half of page back to the ring */
1711 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1712 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1713 /* the page has been released from the ring */
1714 IXGBE_CB(skb
)->page_released
= true;
1716 /* we are not reusing the buffer so unmap it */
1717 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1718 ixgbe_rx_pg_size(rx_ring
),
1722 /* clear contents of buffer_info */
1723 rx_buffer
->skb
= NULL
;
1725 rx_buffer
->page
= NULL
;
1727 ixgbe_get_rsc_cnt(rx_ring
, rx_desc
, skb
);
1731 /* place incomplete frames back on ring for completion */
1732 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
1735 /* verify the packet layout is correct */
1736 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
1739 /* probably a little skewed due to removing CRC */
1740 total_rx_bytes
+= skb
->len
;
1743 /* populate checksum, timestamp, VLAN, and protocol */
1744 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
1747 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1748 if (ixgbe_rx_is_fcoe(adapter
, rx_desc
)) {
1749 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1751 dev_kfree_skb_any(skb
);
1756 #endif /* IXGBE_FCOE */
1757 ixgbe_rx_skb(q_vector
, skb
);
1759 /* update budget accounting */
1761 } while (likely(budget
));
1764 /* include DDPed FCoE data */
1765 if (ddp_bytes
> 0) {
1768 mss
= rx_ring
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1769 sizeof(struct fc_frame_header
) -
1770 sizeof(struct fcoe_crc_eof
);
1773 total_rx_bytes
+= ddp_bytes
;
1774 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1777 #endif /* IXGBE_FCOE */
1778 u64_stats_update_begin(&rx_ring
->syncp
);
1779 rx_ring
->stats
.packets
+= total_rx_packets
;
1780 rx_ring
->stats
.bytes
+= total_rx_bytes
;
1781 u64_stats_update_end(&rx_ring
->syncp
);
1782 q_vector
->rx
.total_packets
+= total_rx_packets
;
1783 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
1786 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1792 * ixgbe_configure_msix - Configure MSI-X hardware
1793 * @adapter: board private structure
1795 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1798 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1800 struct ixgbe_q_vector
*q_vector
;
1801 int q_vectors
, v_idx
;
1804 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1806 /* Populate MSIX to EITR Select */
1807 if (adapter
->num_vfs
> 32) {
1808 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
1809 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
1813 * Populate the IVAR table and set the ITR values to the
1814 * corresponding register.
1816 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
1817 struct ixgbe_ring
*ring
;
1818 q_vector
= adapter
->q_vector
[v_idx
];
1820 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1821 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
1823 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1824 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
1826 if (q_vector
->tx
.ring
&& !q_vector
->rx
.ring
) {
1827 /* tx only vector */
1828 if (adapter
->tx_itr_setting
== 1)
1829 q_vector
->itr
= IXGBE_10K_ITR
;
1831 q_vector
->itr
= adapter
->tx_itr_setting
;
1833 /* rx or rx/tx vector */
1834 if (adapter
->rx_itr_setting
== 1)
1835 q_vector
->itr
= IXGBE_20K_ITR
;
1837 q_vector
->itr
= adapter
->rx_itr_setting
;
1840 ixgbe_write_eitr(q_vector
);
1843 switch (adapter
->hw
.mac
.type
) {
1844 case ixgbe_mac_82598EB
:
1845 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1848 case ixgbe_mac_82599EB
:
1849 case ixgbe_mac_X540
:
1850 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1855 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1857 /* set up to autoclear timer, and the vectors */
1858 mask
= IXGBE_EIMS_ENABLE_MASK
;
1859 mask
&= ~(IXGBE_EIMS_OTHER
|
1860 IXGBE_EIMS_MAILBOX
|
1863 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1866 enum latency_range
{
1870 latency_invalid
= 255
1874 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1875 * @q_vector: structure containing interrupt and ring information
1876 * @ring_container: structure containing ring performance data
1878 * Stores a new ITR value based on packets and byte
1879 * counts during the last interrupt. The advantage of per interrupt
1880 * computation is faster updates and more accurate ITR for the current
1881 * traffic pattern. Constants in this function were computed
1882 * based on theoretical maximum wire speed and thresholds were set based
1883 * on testing data as well as attempting to minimize response time
1884 * while increasing bulk throughput.
1885 * this functionality is controlled by the InterruptThrottleRate module
1886 * parameter (see ixgbe_param.c)
1888 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
1889 struct ixgbe_ring_container
*ring_container
)
1891 int bytes
= ring_container
->total_bytes
;
1892 int packets
= ring_container
->total_packets
;
1895 u8 itr_setting
= ring_container
->itr
;
1900 /* simple throttlerate management
1901 * 0-10MB/s lowest (100000 ints/s)
1902 * 10-20MB/s low (20000 ints/s)
1903 * 20-1249MB/s bulk (8000 ints/s)
1905 /* what was last interrupt timeslice? */
1906 timepassed_us
= q_vector
->itr
>> 2;
1907 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1909 switch (itr_setting
) {
1910 case lowest_latency
:
1911 if (bytes_perint
> 10)
1912 itr_setting
= low_latency
;
1915 if (bytes_perint
> 20)
1916 itr_setting
= bulk_latency
;
1917 else if (bytes_perint
<= 10)
1918 itr_setting
= lowest_latency
;
1921 if (bytes_perint
<= 20)
1922 itr_setting
= low_latency
;
1926 /* clear work counters since we have the values we need */
1927 ring_container
->total_bytes
= 0;
1928 ring_container
->total_packets
= 0;
1930 /* write updated itr to ring container */
1931 ring_container
->itr
= itr_setting
;
1935 * ixgbe_write_eitr - write EITR register in hardware specific way
1936 * @q_vector: structure containing interrupt and ring information
1938 * This function is made to be called by ethtool and by the driver
1939 * when it needs to update EITR registers at runtime. Hardware
1940 * specific quirks/differences are taken care of here.
1942 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1944 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1945 struct ixgbe_hw
*hw
= &adapter
->hw
;
1946 int v_idx
= q_vector
->v_idx
;
1947 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
1949 switch (adapter
->hw
.mac
.type
) {
1950 case ixgbe_mac_82598EB
:
1951 /* must write high and low 16 bits to reset counter */
1952 itr_reg
|= (itr_reg
<< 16);
1954 case ixgbe_mac_82599EB
:
1955 case ixgbe_mac_X540
:
1957 * set the WDIS bit to not clear the timer bits and cause an
1958 * immediate assertion of the interrupt
1960 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1965 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1968 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
1970 u32 new_itr
= q_vector
->itr
;
1973 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
1974 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
1976 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
1978 switch (current_itr
) {
1979 /* counts and packets in update_itr are dependent on these numbers */
1980 case lowest_latency
:
1981 new_itr
= IXGBE_100K_ITR
;
1984 new_itr
= IXGBE_20K_ITR
;
1987 new_itr
= IXGBE_8K_ITR
;
1993 if (new_itr
!= q_vector
->itr
) {
1994 /* do an exponential smoothing */
1995 new_itr
= (10 * new_itr
* q_vector
->itr
) /
1996 ((9 * new_itr
) + q_vector
->itr
);
1998 /* save the algorithm value here */
1999 q_vector
->itr
= new_itr
;
2001 ixgbe_write_eitr(q_vector
);
2006 * ixgbe_check_overtemp_subtask - check for over temperature
2007 * @adapter: pointer to adapter
2009 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2011 struct ixgbe_hw
*hw
= &adapter
->hw
;
2012 u32 eicr
= adapter
->interrupt_event
;
2014 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2017 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2018 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2021 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2023 switch (hw
->device_id
) {
2024 case IXGBE_DEV_ID_82599_T3_LOM
:
2026 * Since the warning interrupt is for both ports
2027 * we don't have to check if:
2028 * - This interrupt wasn't for our port.
2029 * - We may have missed the interrupt so always have to
2030 * check if we got a LSC
2032 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2033 !(eicr
& IXGBE_EICR_LSC
))
2036 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2038 bool link_up
= false;
2040 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2046 /* Check if this is not due to overtemp */
2047 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2052 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2057 "Network adapter has been stopped because it has over heated. "
2058 "Restart the computer. If the problem persists, "
2059 "power off the system and replace the adapter\n");
2061 adapter
->interrupt_event
= 0;
2064 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2066 struct ixgbe_hw
*hw
= &adapter
->hw
;
2068 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2069 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2070 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2071 /* write to clear the interrupt */
2072 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2076 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2078 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2081 switch (adapter
->hw
.mac
.type
) {
2082 case ixgbe_mac_82599EB
:
2084 * Need to check link state so complete overtemp check
2087 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2088 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2089 adapter
->interrupt_event
= eicr
;
2090 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2091 ixgbe_service_event_schedule(adapter
);
2095 case ixgbe_mac_X540
:
2096 if (!(eicr
& IXGBE_EICR_TS
))
2104 "Network adapter has been stopped because it has over heated. "
2105 "Restart the computer. If the problem persists, "
2106 "power off the system and replace the adapter\n");
2109 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2111 struct ixgbe_hw
*hw
= &adapter
->hw
;
2113 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2114 /* Clear the interrupt */
2115 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2116 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2117 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2118 ixgbe_service_event_schedule(adapter
);
2122 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2123 /* Clear the interrupt */
2124 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2125 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2126 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2127 ixgbe_service_event_schedule(adapter
);
2132 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2134 struct ixgbe_hw
*hw
= &adapter
->hw
;
2137 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2138 adapter
->link_check_timeout
= jiffies
;
2139 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2140 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2141 IXGBE_WRITE_FLUSH(hw
);
2142 ixgbe_service_event_schedule(adapter
);
2146 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2150 struct ixgbe_hw
*hw
= &adapter
->hw
;
2152 switch (hw
->mac
.type
) {
2153 case ixgbe_mac_82598EB
:
2154 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2155 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2157 case ixgbe_mac_82599EB
:
2158 case ixgbe_mac_X540
:
2159 mask
= (qmask
& 0xFFFFFFFF);
2161 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2162 mask
= (qmask
>> 32);
2164 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2169 /* skip the flush */
2172 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2176 struct ixgbe_hw
*hw
= &adapter
->hw
;
2178 switch (hw
->mac
.type
) {
2179 case ixgbe_mac_82598EB
:
2180 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2181 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2183 case ixgbe_mac_82599EB
:
2184 case ixgbe_mac_X540
:
2185 mask
= (qmask
& 0xFFFFFFFF);
2187 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2188 mask
= (qmask
>> 32);
2190 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2195 /* skip the flush */
2199 * ixgbe_irq_enable - Enable default interrupt generation settings
2200 * @adapter: board private structure
2202 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2205 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2207 /* don't reenable LSC while waiting for link */
2208 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2209 mask
&= ~IXGBE_EIMS_LSC
;
2211 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2212 switch (adapter
->hw
.mac
.type
) {
2213 case ixgbe_mac_82599EB
:
2214 mask
|= IXGBE_EIMS_GPI_SDP0
;
2216 case ixgbe_mac_X540
:
2217 mask
|= IXGBE_EIMS_TS
;
2222 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2223 mask
|= IXGBE_EIMS_GPI_SDP1
;
2224 switch (adapter
->hw
.mac
.type
) {
2225 case ixgbe_mac_82599EB
:
2226 mask
|= IXGBE_EIMS_GPI_SDP1
;
2227 mask
|= IXGBE_EIMS_GPI_SDP2
;
2228 case ixgbe_mac_X540
:
2229 mask
|= IXGBE_EIMS_ECC
;
2230 mask
|= IXGBE_EIMS_MAILBOX
;
2235 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2236 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2237 mask
|= IXGBE_EIMS_FLOW_DIR
;
2239 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2241 ixgbe_irq_enable_queues(adapter
, ~0);
2243 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2246 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2248 struct ixgbe_adapter
*adapter
= data
;
2249 struct ixgbe_hw
*hw
= &adapter
->hw
;
2253 * Workaround for Silicon errata. Use clear-by-write instead
2254 * of clear-by-read. Reading with EICS will return the
2255 * interrupt causes without clearing, which later be done
2256 * with the write to EICR.
2258 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2259 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2261 if (eicr
& IXGBE_EICR_LSC
)
2262 ixgbe_check_lsc(adapter
);
2264 if (eicr
& IXGBE_EICR_MAILBOX
)
2265 ixgbe_msg_task(adapter
);
2267 switch (hw
->mac
.type
) {
2268 case ixgbe_mac_82599EB
:
2269 case ixgbe_mac_X540
:
2270 if (eicr
& IXGBE_EICR_ECC
)
2271 e_info(link
, "Received unrecoverable ECC Err, please "
2273 /* Handle Flow Director Full threshold interrupt */
2274 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2275 int reinit_count
= 0;
2277 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2278 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2279 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2284 /* no more flow director interrupts until after init */
2285 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2286 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2287 ixgbe_service_event_schedule(adapter
);
2290 ixgbe_check_sfp_event(adapter
, eicr
);
2291 ixgbe_check_overtemp_event(adapter
, eicr
);
2297 ixgbe_check_fan_failure(adapter
, eicr
);
2299 /* re-enable the original interrupt state, no lsc, no queues */
2300 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2301 ixgbe_irq_enable(adapter
, false, false);
2306 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2308 struct ixgbe_q_vector
*q_vector
= data
;
2310 /* EIAM disabled interrupts (on this vector) for us */
2312 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2313 napi_schedule(&q_vector
->napi
);
2319 * ixgbe_poll - NAPI Rx polling callback
2320 * @napi: structure for representing this polling device
2321 * @budget: how many packets driver is allowed to clean
2323 * This function is used for legacy and MSI, NAPI mode
2325 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2327 struct ixgbe_q_vector
*q_vector
=
2328 container_of(napi
, struct ixgbe_q_vector
, napi
);
2329 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2330 struct ixgbe_ring
*ring
;
2331 int per_ring_budget
;
2332 bool clean_complete
= true;
2334 #ifdef CONFIG_IXGBE_DCA
2335 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2336 ixgbe_update_dca(q_vector
);
2339 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2340 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2342 /* attempt to distribute budget to each queue fairly, but don't allow
2343 * the budget to go below 1 because we'll exit polling */
2344 if (q_vector
->rx
.count
> 1)
2345 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2347 per_ring_budget
= budget
;
2349 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2350 clean_complete
&= ixgbe_clean_rx_irq(q_vector
, ring
,
2353 /* If all work not completed, return budget and keep polling */
2354 if (!clean_complete
)
2357 /* all work done, exit the polling mode */
2358 napi_complete(napi
);
2359 if (adapter
->rx_itr_setting
& 1)
2360 ixgbe_set_itr(q_vector
);
2361 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2362 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2368 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2369 * @adapter: board private structure
2371 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2372 * interrupts from the kernel.
2374 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2376 struct net_device
*netdev
= adapter
->netdev
;
2377 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2381 for (vector
= 0; vector
< q_vectors
; vector
++) {
2382 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2383 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2385 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2386 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2387 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2389 } else if (q_vector
->rx
.ring
) {
2390 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2391 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2392 } else if (q_vector
->tx
.ring
) {
2393 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2394 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2396 /* skip this unused q_vector */
2399 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2400 q_vector
->name
, q_vector
);
2402 e_err(probe
, "request_irq failed for MSIX interrupt "
2403 "Error: %d\n", err
);
2404 goto free_queue_irqs
;
2406 /* If Flow Director is enabled, set interrupt affinity */
2407 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2408 /* assign the mask for this irq */
2409 irq_set_affinity_hint(entry
->vector
,
2410 &q_vector
->affinity_mask
);
2414 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2415 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2417 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2418 goto free_queue_irqs
;
2426 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2428 free_irq(adapter
->msix_entries
[vector
].vector
,
2429 adapter
->q_vector
[vector
]);
2431 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2432 pci_disable_msix(adapter
->pdev
);
2433 kfree(adapter
->msix_entries
);
2434 adapter
->msix_entries
= NULL
;
2439 * ixgbe_intr - legacy mode Interrupt Handler
2440 * @irq: interrupt number
2441 * @data: pointer to a network interface device structure
2443 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2445 struct ixgbe_adapter
*adapter
= data
;
2446 struct ixgbe_hw
*hw
= &adapter
->hw
;
2447 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2451 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2452 * before the read of EICR.
2454 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2456 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2457 * therefore no explicit interrupt disable is necessary */
2458 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2461 * shared interrupt alert!
2462 * make sure interrupts are enabled because the read will
2463 * have disabled interrupts due to EIAM
2464 * finish the workaround of silicon errata on 82598. Unmask
2465 * the interrupt that we masked before the EICR read.
2467 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2468 ixgbe_irq_enable(adapter
, true, true);
2469 return IRQ_NONE
; /* Not our interrupt */
2472 if (eicr
& IXGBE_EICR_LSC
)
2473 ixgbe_check_lsc(adapter
);
2475 switch (hw
->mac
.type
) {
2476 case ixgbe_mac_82599EB
:
2477 ixgbe_check_sfp_event(adapter
, eicr
);
2479 case ixgbe_mac_X540
:
2480 if (eicr
& IXGBE_EICR_ECC
)
2481 e_info(link
, "Received unrecoverable ECC err, please "
2483 ixgbe_check_overtemp_event(adapter
, eicr
);
2489 ixgbe_check_fan_failure(adapter
, eicr
);
2491 /* would disable interrupts here but EIAM disabled it */
2492 napi_schedule(&q_vector
->napi
);
2495 * re-enable link(maybe) and non-queue interrupts, no flush.
2496 * ixgbe_poll will re-enable the queue interrupts
2498 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2499 ixgbe_irq_enable(adapter
, false, false);
2505 * ixgbe_request_irq - initialize interrupts
2506 * @adapter: board private structure
2508 * Attempts to configure interrupts using the best available
2509 * capabilities of the hardware and kernel.
2511 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2513 struct net_device
*netdev
= adapter
->netdev
;
2516 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2517 err
= ixgbe_request_msix_irqs(adapter
);
2518 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2519 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2520 netdev
->name
, adapter
);
2522 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2523 netdev
->name
, adapter
);
2526 e_err(probe
, "request_irq failed, Error %d\n", err
);
2531 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2533 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2536 q_vectors
= adapter
->num_msix_vectors
;
2538 free_irq(adapter
->msix_entries
[i
].vector
, adapter
);
2541 for (; i
>= 0; i
--) {
2542 /* free only the irqs that were actually requested */
2543 if (!adapter
->q_vector
[i
]->rx
.ring
&&
2544 !adapter
->q_vector
[i
]->tx
.ring
)
2547 /* clear the affinity_mask in the IRQ descriptor */
2548 irq_set_affinity_hint(adapter
->msix_entries
[i
].vector
,
2551 free_irq(adapter
->msix_entries
[i
].vector
,
2552 adapter
->q_vector
[i
]);
2555 free_irq(adapter
->pdev
->irq
, adapter
);
2560 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2561 * @adapter: board private structure
2563 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2565 switch (adapter
->hw
.mac
.type
) {
2566 case ixgbe_mac_82598EB
:
2567 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2569 case ixgbe_mac_82599EB
:
2570 case ixgbe_mac_X540
:
2571 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2572 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2573 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2578 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2579 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2581 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
2582 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2584 synchronize_irq(adapter
->pdev
->irq
);
2589 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2592 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2594 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2597 if (adapter
->rx_itr_setting
== 1)
2598 q_vector
->itr
= IXGBE_20K_ITR
;
2600 q_vector
->itr
= adapter
->rx_itr_setting
;
2602 ixgbe_write_eitr(q_vector
);
2604 ixgbe_set_ivar(adapter
, 0, 0, 0);
2605 ixgbe_set_ivar(adapter
, 1, 0, 0);
2607 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2611 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2612 * @adapter: board private structure
2613 * @ring: structure containing ring specific data
2615 * Configure the Tx descriptor ring after a reset.
2617 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2618 struct ixgbe_ring
*ring
)
2620 struct ixgbe_hw
*hw
= &adapter
->hw
;
2621 u64 tdba
= ring
->dma
;
2623 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2624 u8 reg_idx
= ring
->reg_idx
;
2626 /* disable queue to avoid issues while updating state */
2627 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2628 IXGBE_WRITE_FLUSH(hw
);
2630 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2631 (tdba
& DMA_BIT_MASK(32)));
2632 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2633 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2634 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2635 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2636 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2637 ring
->tail
= hw
->hw_addr
+ IXGBE_TDT(reg_idx
);
2640 * set WTHRESH to encourage burst writeback, it should not be set
2641 * higher than 1 when ITR is 0 as it could cause false TX hangs
2643 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2644 * to or less than the number of on chip descriptors, which is
2647 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
2648 txdctl
|= (1 << 16); /* WTHRESH = 1 */
2650 txdctl
|= (8 << 16); /* WTHRESH = 8 */
2653 * Setting PTHRESH to 32 both improves performance
2654 * and avoids a TX hang with DFP enabled
2656 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
2657 32; /* PTHRESH = 32 */
2659 /* reinitialize flowdirector state */
2660 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2661 adapter
->atr_sample_rate
) {
2662 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
2663 ring
->atr_count
= 0;
2664 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
2666 ring
->atr_sample_rate
= 0;
2669 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
2672 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2674 netdev_tx_reset_queue(txring_txq(ring
));
2676 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2677 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2678 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2681 /* poll to verify queue is enabled */
2683 usleep_range(1000, 2000);
2684 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2685 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2687 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2690 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2692 struct ixgbe_hw
*hw
= &adapter
->hw
;
2695 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2697 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2700 /* disable the arbiter while setting MTQC */
2701 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2702 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2703 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2705 /* set transmit pool layout */
2706 switch (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2707 case (IXGBE_FLAG_SRIOV_ENABLED
):
2708 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2709 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2713 reg
= IXGBE_MTQC_64Q_1PB
;
2715 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
2717 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
2719 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, reg
);
2721 /* Enable Security TX Buffer IFG for multiple pb */
2723 reg
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
2724 reg
|= IXGBE_SECTX_DCB
;
2725 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, reg
);
2730 /* re-enable the arbiter */
2731 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2732 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2736 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2737 * @adapter: board private structure
2739 * Configure the Tx unit of the MAC after a reset.
2741 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2743 struct ixgbe_hw
*hw
= &adapter
->hw
;
2747 ixgbe_setup_mtqc(adapter
);
2749 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2750 /* DMATXCTL.EN must be before Tx queues are enabled */
2751 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2752 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2753 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2756 /* Setup the HW Tx Head and Tail descriptor pointers */
2757 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2758 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2761 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2763 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2764 struct ixgbe_ring
*rx_ring
)
2767 u8 reg_idx
= rx_ring
->reg_idx
;
2769 switch (adapter
->hw
.mac
.type
) {
2770 case ixgbe_mac_82598EB
: {
2771 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
2772 const int mask
= feature
[RING_F_RSS
].mask
;
2773 reg_idx
= reg_idx
& mask
;
2776 case ixgbe_mac_82599EB
:
2777 case ixgbe_mac_X540
:
2782 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(reg_idx
));
2784 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2785 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2786 if (adapter
->num_vfs
)
2787 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2789 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2790 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2792 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2793 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2795 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2797 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2799 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2802 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2804 struct ixgbe_hw
*hw
= &adapter
->hw
;
2805 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2806 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2807 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2808 u32 mrqc
= 0, reta
= 0;
2811 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2812 int maxq
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2815 maxq
= min(maxq
, adapter
->num_tx_queues
/ tcs
);
2817 /* Fill out hash function seeds */
2818 for (i
= 0; i
< 10; i
++)
2819 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2821 /* Fill out redirection table */
2822 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2825 /* reta = 4-byte sliding window of
2826 * 0x00..(indices-1)(indices-1)00..etc. */
2827 reta
= (reta
<< 8) | (j
* 0x11);
2829 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2832 /* Disable indicating checksum in descriptor, enables RSS hash */
2833 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2834 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2835 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2837 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
&&
2838 (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
2839 mrqc
= IXGBE_MRQC_RSSEN
;
2841 int mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2842 | IXGBE_FLAG_SRIOV_ENABLED
);
2845 case (IXGBE_FLAG_RSS_ENABLED
):
2847 mrqc
= IXGBE_MRQC_RSSEN
;
2849 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
2851 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
2853 case (IXGBE_FLAG_SRIOV_ENABLED
):
2854 mrqc
= IXGBE_MRQC_VMDQEN
;
2861 /* Perform hash on these packet types */
2862 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2863 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2864 | IXGBE_MRQC_RSS_FIELD_IPV6
2865 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2867 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
2868 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
2869 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
2870 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2872 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2876 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2877 * @adapter: address of board private structure
2878 * @index: index of ring to set
2880 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
2881 struct ixgbe_ring
*ring
)
2883 struct ixgbe_hw
*hw
= &adapter
->hw
;
2885 u8 reg_idx
= ring
->reg_idx
;
2887 if (!ring_is_rsc_enabled(ring
))
2890 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
2891 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2893 * we must limit the number of descriptors so that the
2894 * total size of max desc * buf_len is not greater
2897 #if (PAGE_SIZE <= 8192)
2898 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2899 #elif (PAGE_SIZE <= 16384)
2900 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2902 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2904 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
2908 * ixgbe_set_uta - Set unicast filter table address
2909 * @adapter: board private structure
2911 * The unicast table address is a register array of 32-bit registers.
2912 * The table is meant to be used in a way similar to how the MTA is used
2913 * however due to certain limitations in the hardware it is necessary to
2914 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
2915 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
2917 static void ixgbe_set_uta(struct ixgbe_adapter
*adapter
)
2919 struct ixgbe_hw
*hw
= &adapter
->hw
;
2922 /* The UTA table only exists on 82599 hardware and newer */
2923 if (hw
->mac
.type
< ixgbe_mac_82599EB
)
2926 /* we only need to do this if VMDq is enabled */
2927 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
2930 for (i
= 0; i
< 128; i
++)
2931 IXGBE_WRITE_REG(hw
, IXGBE_UTA(i
), ~0);
2934 #define IXGBE_MAX_RX_DESC_POLL 10
2935 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2936 struct ixgbe_ring
*ring
)
2938 struct ixgbe_hw
*hw
= &adapter
->hw
;
2939 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
2941 u8 reg_idx
= ring
->reg_idx
;
2943 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2944 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2945 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2949 usleep_range(1000, 2000);
2950 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2951 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
2954 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
2955 "the polling period\n", reg_idx
);
2959 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
2960 struct ixgbe_ring
*ring
)
2962 struct ixgbe_hw
*hw
= &adapter
->hw
;
2963 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
2965 u8 reg_idx
= ring
->reg_idx
;
2967 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2968 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
2970 /* write value back with RXDCTL.ENABLE bit cleared */
2971 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
2973 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2974 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2977 /* the hardware may take up to 100us to really disable the rx queue */
2980 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2981 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
2984 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
2985 "the polling period\n", reg_idx
);
2989 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
2990 struct ixgbe_ring
*ring
)
2992 struct ixgbe_hw
*hw
= &adapter
->hw
;
2993 u64 rdba
= ring
->dma
;
2995 u8 reg_idx
= ring
->reg_idx
;
2997 /* disable queue to avoid issues while updating state */
2998 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
2999 ixgbe_disable_rx_queue(adapter
, ring
);
3001 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3002 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3003 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3004 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3005 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3006 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3007 ring
->tail
= hw
->hw_addr
+ IXGBE_RDT(reg_idx
);
3009 ixgbe_configure_srrctl(adapter
, ring
);
3010 ixgbe_configure_rscctl(adapter
, ring
);
3012 /* If operating in IOV mode set RLPML for X540 */
3013 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
3014 hw
->mac
.type
== ixgbe_mac_X540
) {
3015 rxdctl
&= ~IXGBE_RXDCTL_RLPMLMASK
;
3016 rxdctl
|= ((ring
->netdev
->mtu
+ ETH_HLEN
+
3017 ETH_FCS_LEN
+ VLAN_HLEN
) | IXGBE_RXDCTL_RLPML_EN
);
3020 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3022 * enable cache line friendly hardware writes:
3023 * PTHRESH=32 descriptors (half the internal cache),
3024 * this also removes ugly rx_no_buffer_count increment
3025 * HTHRESH=4 descriptors (to minimize latency on fetch)
3026 * WTHRESH=8 burst writeback up to two cache lines
3028 rxdctl
&= ~0x3FFFFF;
3032 /* enable receive descriptor ring */
3033 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3034 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3036 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3037 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3040 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3042 struct ixgbe_hw
*hw
= &adapter
->hw
;
3045 /* PSRTYPE must be initialized in non 82598 adapters */
3046 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3047 IXGBE_PSRTYPE_UDPHDR
|
3048 IXGBE_PSRTYPE_IPV4HDR
|
3049 IXGBE_PSRTYPE_L2HDR
|
3050 IXGBE_PSRTYPE_IPV6HDR
;
3052 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3055 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)
3056 psrtype
|= (adapter
->num_rx_queues_per_pool
<< 29);
3058 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
3059 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(adapter
->num_vfs
+ p
),
3063 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3065 struct ixgbe_hw
*hw
= &adapter
->hw
;
3068 u32 reg_offset
, vf_shift
;
3072 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3075 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3076 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
| IXGBE_VT_CTL_REPLEN
;
3077 vt_reg_bits
|= (adapter
->num_vfs
<< IXGBE_VT_CTL_POOL_SHIFT
);
3078 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
3080 vf_shift
= adapter
->num_vfs
% 32;
3081 reg_offset
= (adapter
->num_vfs
>= 32) ? 1 : 0;
3083 /* Enable only the PF's pool for Tx/Rx */
3084 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
3085 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), 0);
3086 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
3087 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), 0);
3088 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3090 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3091 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
3094 * Set up VF register offsets for selected VT Mode,
3095 * i.e. 32 or 64 VFs for SR-IOV
3097 gcr_ext
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
3098 gcr_ext
|= IXGBE_GCR_EXT_MSIX_EN
;
3099 gcr_ext
|= IXGBE_GCR_EXT_VT_MODE_64
;
3100 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3102 /* enable Tx loopback for VF/PF communication */
3103 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3104 /* Enable MAC Anti-Spoofing */
3105 hw
->mac
.ops
.set_mac_anti_spoofing(hw
,
3106 (adapter
->num_vfs
!= 0),
3108 /* For VFs that have spoof checking turned off */
3109 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3110 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3111 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3115 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3117 struct ixgbe_hw
*hw
= &adapter
->hw
;
3118 struct net_device
*netdev
= adapter
->netdev
;
3119 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3120 struct ixgbe_ring
*rx_ring
;
3125 /* adjust max frame to be able to do baby jumbo for FCoE */
3126 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3127 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3128 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3130 #endif /* IXGBE_FCOE */
3131 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3132 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3133 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3134 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3136 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3139 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3140 max_frame
+= VLAN_HLEN
;
3142 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3143 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3144 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3145 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3148 * Setup the HW Rx Head and Tail Descriptor Pointers and
3149 * the Base and Length of the Rx Descriptor Ring
3151 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3152 rx_ring
= adapter
->rx_ring
[i
];
3153 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3154 set_ring_rsc_enabled(rx_ring
);
3156 clear_ring_rsc_enabled(rx_ring
);
3158 if (netdev
->features
& NETIF_F_FCOE_MTU
) {
3159 struct ixgbe_ring_feature
*f
;
3160 f
= &adapter
->ring_feature
[RING_F_FCOE
];
3161 if ((i
>= f
->mask
) && (i
< f
->mask
+ f
->indices
))
3162 set_bit(__IXGBE_RX_FCOE_BUFSZ
, &rx_ring
->state
);
3164 #endif /* IXGBE_FCOE */
3168 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3170 struct ixgbe_hw
*hw
= &adapter
->hw
;
3171 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3173 switch (hw
->mac
.type
) {
3174 case ixgbe_mac_82598EB
:
3176 * For VMDq support of different descriptor types or
3177 * buffer sizes through the use of multiple SRRCTL
3178 * registers, RDRXCTL.MVMEN must be set to 1
3180 * also, the manual doesn't mention it clearly but DCA hints
3181 * will only use queue 0's tags unless this bit is set. Side
3182 * effects of setting this bit are only that SRRCTL must be
3183 * fully programmed [0..15]
3185 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3187 case ixgbe_mac_82599EB
:
3188 case ixgbe_mac_X540
:
3189 /* Disable RSC for ACK packets */
3190 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3191 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3192 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3193 /* hardware requires some bits to be set by default */
3194 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3195 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3198 /* We should do nothing since we don't know this hardware */
3202 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3206 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3207 * @adapter: board private structure
3209 * Configure the Rx unit of the MAC after a reset.
3211 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3213 struct ixgbe_hw
*hw
= &adapter
->hw
;
3217 /* disable receives while setting up the descriptors */
3218 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3219 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3221 ixgbe_setup_psrtype(adapter
);
3222 ixgbe_setup_rdrxctl(adapter
);
3224 /* Program registers for the distribution of queues */
3225 ixgbe_setup_mrqc(adapter
);
3227 ixgbe_set_uta(adapter
);
3229 /* set_rx_buffer_len must be called before ring initialization */
3230 ixgbe_set_rx_buffer_len(adapter
);
3233 * Setup the HW Rx Head and Tail Descriptor Pointers and
3234 * the Base and Length of the Rx Descriptor Ring
3236 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3237 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3239 /* disable drop enable for 82598 parts */
3240 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3241 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3243 /* enable all receives */
3244 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3245 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3248 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3250 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3251 struct ixgbe_hw
*hw
= &adapter
->hw
;
3252 int pool_ndx
= adapter
->num_vfs
;
3254 /* add VID to filter table */
3255 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
3256 set_bit(vid
, adapter
->active_vlans
);
3261 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3263 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3264 struct ixgbe_hw
*hw
= &adapter
->hw
;
3265 int pool_ndx
= adapter
->num_vfs
;
3267 /* remove VID from filter table */
3268 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
3269 clear_bit(vid
, adapter
->active_vlans
);
3275 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3276 * @adapter: driver data
3278 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3280 struct ixgbe_hw
*hw
= &adapter
->hw
;
3283 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3284 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3285 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3289 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3290 * @adapter: driver data
3292 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3294 struct ixgbe_hw
*hw
= &adapter
->hw
;
3297 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3298 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3299 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3300 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3304 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3305 * @adapter: driver data
3307 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3309 struct ixgbe_hw
*hw
= &adapter
->hw
;
3313 switch (hw
->mac
.type
) {
3314 case ixgbe_mac_82598EB
:
3315 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3316 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3317 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3319 case ixgbe_mac_82599EB
:
3320 case ixgbe_mac_X540
:
3321 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3322 j
= adapter
->rx_ring
[i
]->reg_idx
;
3323 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3324 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3325 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3334 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3335 * @adapter: driver data
3337 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3339 struct ixgbe_hw
*hw
= &adapter
->hw
;
3343 switch (hw
->mac
.type
) {
3344 case ixgbe_mac_82598EB
:
3345 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3346 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3347 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3349 case ixgbe_mac_82599EB
:
3350 case ixgbe_mac_X540
:
3351 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3352 j
= adapter
->rx_ring
[i
]->reg_idx
;
3353 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3354 vlnctrl
|= IXGBE_RXDCTL_VME
;
3355 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3363 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3367 ixgbe_vlan_rx_add_vid(adapter
->netdev
, 0);
3369 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3370 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3374 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3375 * @netdev: network interface device structure
3377 * Writes unicast address list to the RAR table.
3378 * Returns: -ENOMEM on failure/insufficient address space
3379 * 0 on no addresses written
3380 * X on writing X addresses to the RAR table
3382 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3384 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3385 struct ixgbe_hw
*hw
= &adapter
->hw
;
3386 unsigned int vfn
= adapter
->num_vfs
;
3387 unsigned int rar_entries
= IXGBE_MAX_PF_MACVLANS
;
3390 /* return ENOMEM indicating insufficient memory for addresses */
3391 if (netdev_uc_count(netdev
) > rar_entries
)
3394 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3395 struct netdev_hw_addr
*ha
;
3396 /* return error if we do not support writing to RAR table */
3397 if (!hw
->mac
.ops
.set_rar
)
3400 netdev_for_each_uc_addr(ha
, netdev
) {
3403 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3408 /* write the addresses in reverse order to avoid write combining */
3409 for (; rar_entries
> 0 ; rar_entries
--)
3410 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3416 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3417 * @netdev: network interface device structure
3419 * The set_rx_method entry point is called whenever the unicast/multicast
3420 * address list or the network interface flags are updated. This routine is
3421 * responsible for configuring the hardware for proper unicast, multicast and
3424 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3426 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3427 struct ixgbe_hw
*hw
= &adapter
->hw
;
3428 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3431 /* Check for Promiscuous and All Multicast modes */
3433 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3435 /* set all bits that we expect to always be set */
3436 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3437 fctrl
|= IXGBE_FCTRL_BAM
;
3438 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3439 fctrl
|= IXGBE_FCTRL_PMCF
;
3441 /* clear the bits we are changing the status of */
3442 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3444 if (netdev
->flags
& IFF_PROMISC
) {
3445 hw
->addr_ctrl
.user_set_promisc
= true;
3446 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3447 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3448 /* don't hardware filter vlans in promisc mode */
3449 ixgbe_vlan_filter_disable(adapter
);
3451 if (netdev
->flags
& IFF_ALLMULTI
) {
3452 fctrl
|= IXGBE_FCTRL_MPE
;
3453 vmolr
|= IXGBE_VMOLR_MPE
;
3456 * Write addresses to the MTA, if the attempt fails
3457 * then we should just turn on promiscuous mode so
3458 * that we can at least receive multicast traffic
3460 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3461 vmolr
|= IXGBE_VMOLR_ROMPE
;
3463 ixgbe_vlan_filter_enable(adapter
);
3464 hw
->addr_ctrl
.user_set_promisc
= false;
3466 * Write addresses to available RAR registers, if there is not
3467 * sufficient space to store all the addresses then enable
3468 * unicast promiscuous mode
3470 count
= ixgbe_write_uc_addr_list(netdev
);
3472 fctrl
|= IXGBE_FCTRL_UPE
;
3473 vmolr
|= IXGBE_VMOLR_ROPE
;
3477 if (adapter
->num_vfs
) {
3478 ixgbe_restore_vf_multicasts(adapter
);
3479 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
)) &
3480 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3482 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
), vmolr
);
3485 /* This is useful for sniffing bad packets. */
3486 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3487 /* UPE and MPE will be handled by normal PROMISC logic
3488 * in e1000e_set_rx_mode */
3489 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3490 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3491 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3493 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3494 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3497 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3499 if (netdev
->features
& NETIF_F_HW_VLAN_RX
)
3500 ixgbe_vlan_strip_enable(adapter
);
3502 ixgbe_vlan_strip_disable(adapter
);
3505 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3508 struct ixgbe_q_vector
*q_vector
;
3509 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3511 /* legacy and MSI only use one vector */
3512 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3515 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3516 q_vector
= adapter
->q_vector
[q_idx
];
3517 napi_enable(&q_vector
->napi
);
3521 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3524 struct ixgbe_q_vector
*q_vector
;
3525 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3527 /* legacy and MSI only use one vector */
3528 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3531 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3532 q_vector
= adapter
->q_vector
[q_idx
];
3533 napi_disable(&q_vector
->napi
);
3537 #ifdef CONFIG_IXGBE_DCB
3539 * ixgbe_configure_dcb - Configure DCB hardware
3540 * @adapter: ixgbe adapter struct
3542 * This is called by the driver on open to configure the DCB hardware.
3543 * This is also called by the gennetlink interface when reconfiguring
3546 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3548 struct ixgbe_hw
*hw
= &adapter
->hw
;
3549 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3551 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3552 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3553 netif_set_gso_max_size(adapter
->netdev
, 65536);
3557 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3558 netif_set_gso_max_size(adapter
->netdev
, 32768);
3561 /* Enable VLAN tag insert/strip */
3562 adapter
->netdev
->features
|= NETIF_F_HW_VLAN_RX
;
3564 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3567 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3568 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3571 /* reconfigure the hardware */
3572 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
3573 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3575 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3577 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
3578 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
3579 ixgbe_dcb_hw_ets(&adapter
->hw
,
3580 adapter
->ixgbe_ieee_ets
,
3582 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
3583 adapter
->ixgbe_ieee_pfc
->pfc_en
,
3584 adapter
->ixgbe_ieee_ets
->prio_tc
);
3587 /* Enable RSS Hash per TC */
3588 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3592 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
3594 u8 cnt
= adapter
->netdev
->tc_to_txq
[i
].count
;
3599 reg
|= msb
<< IXGBE_RQTC_SHIFT_TC(i
);
3601 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, reg
);
3606 /* Additional bittime to account for IXGBE framing */
3607 #define IXGBE_ETH_FRAMING 20
3610 * ixgbe_hpbthresh - calculate high water mark for flow control
3612 * @adapter: board private structure to calculate for
3613 * @pb - packet buffer to calculate
3615 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
3617 struct ixgbe_hw
*hw
= &adapter
->hw
;
3618 struct net_device
*dev
= adapter
->netdev
;
3619 int link
, tc
, kb
, marker
;
3622 /* Calculate max LAN frame size */
3623 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
3626 /* FCoE traffic class uses FCOE jumbo frames */
3627 if (dev
->features
& NETIF_F_FCOE_MTU
) {
3630 #ifdef CONFIG_IXGBE_DCB
3631 fcoe_pb
= netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
);
3634 if (fcoe_pb
== pb
&& tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
3635 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3639 /* Calculate delay value for device */
3640 switch (hw
->mac
.type
) {
3641 case ixgbe_mac_X540
:
3642 dv_id
= IXGBE_DV_X540(link
, tc
);
3645 dv_id
= IXGBE_DV(link
, tc
);
3649 /* Loopback switch introduces additional latency */
3650 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3651 dv_id
+= IXGBE_B2BT(tc
);
3653 /* Delay value is calculated in bit times convert to KB */
3654 kb
= IXGBE_BT2KB(dv_id
);
3655 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
3657 marker
= rx_pba
- kb
;
3659 /* It is possible that the packet buffer is not large enough
3660 * to provide required headroom. In this case throw an error
3661 * to user and a do the best we can.
3664 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
3665 "headroom to support flow control."
3666 "Decrease MTU or number of traffic classes\n", pb
);
3674 * ixgbe_lpbthresh - calculate low water mark for for flow control
3676 * @adapter: board private structure to calculate for
3677 * @pb - packet buffer to calculate
3679 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
3681 struct ixgbe_hw
*hw
= &adapter
->hw
;
3682 struct net_device
*dev
= adapter
->netdev
;
3686 /* Calculate max LAN frame size */
3687 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3689 /* Calculate delay value for device */
3690 switch (hw
->mac
.type
) {
3691 case ixgbe_mac_X540
:
3692 dv_id
= IXGBE_LOW_DV_X540(tc
);
3695 dv_id
= IXGBE_LOW_DV(tc
);
3699 /* Delay value is calculated in bit times convert to KB */
3700 return IXGBE_BT2KB(dv_id
);
3704 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3706 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
3708 struct ixgbe_hw
*hw
= &adapter
->hw
;
3709 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
3715 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
3717 for (i
= 0; i
< num_tc
; i
++) {
3718 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
3720 /* Low water marks must not be larger than high water marks */
3721 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
3722 hw
->fc
.low_water
= 0;
3726 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
3728 struct ixgbe_hw
*hw
= &adapter
->hw
;
3730 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
3732 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3733 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3734 hdrm
= 32 << adapter
->fdir_pballoc
;
3738 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
3739 ixgbe_pbthresh_setup(adapter
);
3742 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
3744 struct ixgbe_hw
*hw
= &adapter
->hw
;
3745 struct hlist_node
*node
, *node2
;
3746 struct ixgbe_fdir_filter
*filter
;
3748 spin_lock(&adapter
->fdir_perfect_lock
);
3750 if (!hlist_empty(&adapter
->fdir_filter_list
))
3751 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
3753 hlist_for_each_entry_safe(filter
, node
, node2
,
3754 &adapter
->fdir_filter_list
, fdir_node
) {
3755 ixgbe_fdir_write_perfect_filter_82599(hw
,
3758 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
3759 IXGBE_FDIR_DROP_QUEUE
:
3760 adapter
->rx_ring
[filter
->action
]->reg_idx
);
3763 spin_unlock(&adapter
->fdir_perfect_lock
);
3766 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3768 struct ixgbe_hw
*hw
= &adapter
->hw
;
3770 ixgbe_configure_pb(adapter
);
3771 #ifdef CONFIG_IXGBE_DCB
3772 ixgbe_configure_dcb(adapter
);
3775 ixgbe_set_rx_mode(adapter
->netdev
);
3776 ixgbe_restore_vlan(adapter
);
3779 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3780 ixgbe_configure_fcoe(adapter
);
3782 #endif /* IXGBE_FCOE */
3784 switch (hw
->mac
.type
) {
3785 case ixgbe_mac_82599EB
:
3786 case ixgbe_mac_X540
:
3787 hw
->mac
.ops
.disable_rx_buff(hw
);
3793 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3794 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
3795 adapter
->fdir_pballoc
);
3796 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3797 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
3798 adapter
->fdir_pballoc
);
3799 ixgbe_fdir_filter_restore(adapter
);
3802 switch (hw
->mac
.type
) {
3803 case ixgbe_mac_82599EB
:
3804 case ixgbe_mac_X540
:
3805 hw
->mac
.ops
.enable_rx_buff(hw
);
3811 ixgbe_configure_virtualization(adapter
);
3813 ixgbe_configure_tx(adapter
);
3814 ixgbe_configure_rx(adapter
);
3817 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3819 switch (hw
->phy
.type
) {
3820 case ixgbe_phy_sfp_avago
:
3821 case ixgbe_phy_sfp_ftl
:
3822 case ixgbe_phy_sfp_intel
:
3823 case ixgbe_phy_sfp_unknown
:
3824 case ixgbe_phy_sfp_passive_tyco
:
3825 case ixgbe_phy_sfp_passive_unknown
:
3826 case ixgbe_phy_sfp_active_unknown
:
3827 case ixgbe_phy_sfp_ftl_active
:
3830 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3838 * ixgbe_sfp_link_config - set up SFP+ link
3839 * @adapter: pointer to private adapter struct
3841 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3844 * We are assuming the worst case scenario here, and that
3845 * is that an SFP was inserted/removed after the reset
3846 * but before SFP detection was enabled. As such the best
3847 * solution is to just start searching as soon as we start
3849 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3850 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
3852 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
3856 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3857 * @hw: pointer to private hardware struct
3859 * Returns 0 on success, negative on failure
3861 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3864 bool negotiation
, link_up
= false;
3865 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3867 if (hw
->mac
.ops
.check_link
)
3868 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3873 autoneg
= hw
->phy
.autoneg_advertised
;
3874 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
3875 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3880 if (hw
->mac
.ops
.setup_link
)
3881 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3886 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
3888 struct ixgbe_hw
*hw
= &adapter
->hw
;
3891 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3892 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
3894 gpie
|= IXGBE_GPIE_EIAME
;
3896 * use EIAM to auto-mask when MSI-X interrupt is asserted
3897 * this saves a register write for every interrupt
3899 switch (hw
->mac
.type
) {
3900 case ixgbe_mac_82598EB
:
3901 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3903 case ixgbe_mac_82599EB
:
3904 case ixgbe_mac_X540
:
3906 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3907 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3911 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3912 * specifically only auto mask tx and rx interrupts */
3913 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3916 /* XXX: to interrupt immediately for EICS writes, enable this */
3917 /* gpie |= IXGBE_GPIE_EIMEN; */
3919 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3920 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3921 gpie
|= IXGBE_GPIE_VTMODE_64
;
3924 /* Enable Thermal over heat sensor interrupt */
3925 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
3926 switch (adapter
->hw
.mac
.type
) {
3927 case ixgbe_mac_82599EB
:
3928 gpie
|= IXGBE_SDP0_GPIEN
;
3930 case ixgbe_mac_X540
:
3931 gpie
|= IXGBE_EIMS_TS
;
3938 /* Enable fan failure interrupt */
3939 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3940 gpie
|= IXGBE_SDP1_GPIEN
;
3942 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3943 gpie
|= IXGBE_SDP1_GPIEN
;
3944 gpie
|= IXGBE_SDP2_GPIEN
;
3947 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3950 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
3952 struct ixgbe_hw
*hw
= &adapter
->hw
;
3956 ixgbe_get_hw_control(adapter
);
3957 ixgbe_setup_gpie(adapter
);
3959 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3960 ixgbe_configure_msix(adapter
);
3962 ixgbe_configure_msi_and_legacy(adapter
);
3964 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
3965 if (hw
->mac
.ops
.enable_tx_laser
&&
3966 ((hw
->phy
.multispeed_fiber
) ||
3967 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
3968 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
3969 hw
->mac
.ops
.enable_tx_laser(hw
);
3971 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
3972 ixgbe_napi_enable_all(adapter
);
3974 if (ixgbe_is_sfp(hw
)) {
3975 ixgbe_sfp_link_config(adapter
);
3977 err
= ixgbe_non_sfp_link_config(hw
);
3979 e_err(probe
, "link_config FAILED %d\n", err
);
3982 /* clear any pending interrupts, may auto mask */
3983 IXGBE_READ_REG(hw
, IXGBE_EICR
);
3984 ixgbe_irq_enable(adapter
, true, true);
3987 * If this adapter has a fan, check to see if we had a failure
3988 * before we enabled the interrupt.
3990 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
3991 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
3992 if (esdp
& IXGBE_ESDP_SDP1
)
3993 e_crit(drv
, "Fan has stopped, replace the adapter\n");
3996 /* enable transmits */
3997 netif_tx_start_all_queues(adapter
->netdev
);
3999 /* bring the link up in the watchdog, this could race with our first
4000 * link up interrupt but shouldn't be a problem */
4001 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4002 adapter
->link_check_timeout
= jiffies
;
4003 mod_timer(&adapter
->service_timer
, jiffies
);
4005 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4006 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4007 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4008 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4011 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4013 WARN_ON(in_interrupt());
4014 /* put off any impending NetWatchDogTimeout */
4015 adapter
->netdev
->trans_start
= jiffies
;
4017 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4018 usleep_range(1000, 2000);
4019 ixgbe_down(adapter
);
4021 * If SR-IOV enabled then wait a bit before bringing the adapter
4022 * back up to give the VFs time to respond to the reset. The
4023 * two second wait is based upon the watchdog timer cycle in
4026 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4029 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4032 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4034 /* hardware has been reset, we need to reload some things */
4035 ixgbe_configure(adapter
);
4037 ixgbe_up_complete(adapter
);
4040 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4042 struct ixgbe_hw
*hw
= &adapter
->hw
;
4045 /* lock SFP init bit to prevent race conditions with the watchdog */
4046 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4047 usleep_range(1000, 2000);
4049 /* clear all SFP and link config related flags while holding SFP_INIT */
4050 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4051 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4052 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4054 err
= hw
->mac
.ops
.init_hw(hw
);
4057 case IXGBE_ERR_SFP_NOT_PRESENT
:
4058 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4060 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4061 e_dev_err("master disable timed out\n");
4063 case IXGBE_ERR_EEPROM_VERSION
:
4064 /* We are running on a pre-production device, log a warning */
4065 e_dev_warn("This device is a pre-production adapter/LOM. "
4066 "Please be aware there may be issues associated with "
4067 "your hardware. If you are experiencing problems "
4068 "please contact your Intel or hardware "
4069 "representative who provided you with this "
4073 e_dev_err("Hardware Error: %d\n", err
);
4076 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4078 /* reprogram the RAR[0] in case user changed it. */
4079 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
4084 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4085 * @rx_ring: ring to setup
4087 * On many IA platforms the L1 cache has a critical stride of 4K, this
4088 * results in each receive buffer starting in the same cache set. To help
4089 * reduce the pressure on this cache set we can interleave the offsets so
4090 * that only every other buffer will be in the same cache set.
4092 static void ixgbe_init_rx_page_offset(struct ixgbe_ring
*rx_ring
)
4094 struct ixgbe_rx_buffer
*rx_buffer
= rx_ring
->rx_buffer_info
;
4097 for (i
= 0; i
< rx_ring
->count
; i
+= 2) {
4098 rx_buffer
[0].page_offset
= 0;
4099 rx_buffer
[1].page_offset
= ixgbe_rx_bufsz(rx_ring
);
4100 rx_buffer
= &rx_buffer
[2];
4105 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4106 * @rx_ring: ring to free buffers from
4108 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4110 struct device
*dev
= rx_ring
->dev
;
4114 /* ring already cleared, nothing to do */
4115 if (!rx_ring
->rx_buffer_info
)
4118 /* Free all the Rx ring sk_buffs */
4119 for (i
= 0; i
< rx_ring
->count
; i
++) {
4120 struct ixgbe_rx_buffer
*rx_buffer
;
4122 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4123 if (rx_buffer
->skb
) {
4124 struct sk_buff
*skb
= rx_buffer
->skb
;
4125 if (IXGBE_CB(skb
)->page_released
) {
4128 ixgbe_rx_bufsz(rx_ring
),
4130 IXGBE_CB(skb
)->page_released
= false;
4134 rx_buffer
->skb
= NULL
;
4136 dma_unmap_page(dev
, rx_buffer
->dma
,
4137 ixgbe_rx_pg_size(rx_ring
),
4140 if (rx_buffer
->page
)
4141 put_page(rx_buffer
->page
);
4142 rx_buffer
->page
= NULL
;
4145 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4146 memset(rx_ring
->rx_buffer_info
, 0, size
);
4148 ixgbe_init_rx_page_offset(rx_ring
);
4150 /* Zero out the descriptor ring */
4151 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4153 rx_ring
->next_to_alloc
= 0;
4154 rx_ring
->next_to_clean
= 0;
4155 rx_ring
->next_to_use
= 0;
4159 * ixgbe_clean_tx_ring - Free Tx Buffers
4160 * @tx_ring: ring to be cleaned
4162 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4164 struct ixgbe_tx_buffer
*tx_buffer_info
;
4168 /* ring already cleared, nothing to do */
4169 if (!tx_ring
->tx_buffer_info
)
4172 /* Free all the Tx ring sk_buffs */
4173 for (i
= 0; i
< tx_ring
->count
; i
++) {
4174 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4175 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4178 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4179 memset(tx_ring
->tx_buffer_info
, 0, size
);
4181 /* Zero out the descriptor ring */
4182 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4184 tx_ring
->next_to_use
= 0;
4185 tx_ring
->next_to_clean
= 0;
4189 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4190 * @adapter: board private structure
4192 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4196 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4197 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4201 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4202 * @adapter: board private structure
4204 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4208 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4209 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4212 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4214 struct hlist_node
*node
, *node2
;
4215 struct ixgbe_fdir_filter
*filter
;
4217 spin_lock(&adapter
->fdir_perfect_lock
);
4219 hlist_for_each_entry_safe(filter
, node
, node2
,
4220 &adapter
->fdir_filter_list
, fdir_node
) {
4221 hlist_del(&filter
->fdir_node
);
4224 adapter
->fdir_filter_count
= 0;
4226 spin_unlock(&adapter
->fdir_perfect_lock
);
4229 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4231 struct net_device
*netdev
= adapter
->netdev
;
4232 struct ixgbe_hw
*hw
= &adapter
->hw
;
4236 /* signal that we are down to the interrupt handler */
4237 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4239 /* disable receives */
4240 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4241 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4243 /* disable all enabled rx queues */
4244 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4245 /* this call also flushes the previous write */
4246 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4248 usleep_range(10000, 20000);
4250 netif_tx_stop_all_queues(netdev
);
4252 /* call carrier off first to avoid false dev_watchdog timeouts */
4253 netif_carrier_off(netdev
);
4254 netif_tx_disable(netdev
);
4256 ixgbe_irq_disable(adapter
);
4258 ixgbe_napi_disable_all(adapter
);
4260 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4261 IXGBE_FLAG2_RESET_REQUESTED
);
4262 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4264 del_timer_sync(&adapter
->service_timer
);
4266 if (adapter
->num_vfs
) {
4267 /* Clear EITR Select mapping */
4268 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4270 /* Mark all the VFs as inactive */
4271 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4272 adapter
->vfinfo
[i
].clear_to_send
= false;
4274 /* ping all the active vfs to let them know we are going down */
4275 ixgbe_ping_all_vfs(adapter
);
4277 /* Disable all VFTE/VFRE TX/RX */
4278 ixgbe_disable_tx_rx(adapter
);
4281 /* disable transmits in the hardware now that interrupts are off */
4282 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4283 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4284 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4287 /* Disable the Tx DMA engine on 82599 and X540 */
4288 switch (hw
->mac
.type
) {
4289 case ixgbe_mac_82599EB
:
4290 case ixgbe_mac_X540
:
4291 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4292 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4293 ~IXGBE_DMATXCTL_TE
));
4299 if (!pci_channel_offline(adapter
->pdev
))
4300 ixgbe_reset(adapter
);
4302 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4303 if (hw
->mac
.ops
.disable_tx_laser
&&
4304 ((hw
->phy
.multispeed_fiber
) ||
4305 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4306 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4307 hw
->mac
.ops
.disable_tx_laser(hw
);
4309 ixgbe_clean_all_tx_rings(adapter
);
4310 ixgbe_clean_all_rx_rings(adapter
);
4312 #ifdef CONFIG_IXGBE_DCA
4313 /* since we reset the hardware DCA settings were cleared */
4314 ixgbe_setup_dca(adapter
);
4319 * ixgbe_tx_timeout - Respond to a Tx Hang
4320 * @netdev: network interface device structure
4322 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4324 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4326 /* Do the reset outside of interrupt context */
4327 ixgbe_tx_timeout_reset(adapter
);
4331 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4332 * @adapter: board private structure to initialize
4334 * ixgbe_sw_init initializes the Adapter private data structure.
4335 * Fields are initialized based on PCI device information and
4336 * OS network device settings (MTU size).
4338 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4340 struct ixgbe_hw
*hw
= &adapter
->hw
;
4341 struct pci_dev
*pdev
= adapter
->pdev
;
4343 #ifdef CONFIG_IXGBE_DCB
4345 struct tc_configuration
*tc
;
4348 /* PCI config space info */
4350 hw
->vendor_id
= pdev
->vendor
;
4351 hw
->device_id
= pdev
->device
;
4352 hw
->revision_id
= pdev
->revision
;
4353 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4354 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4356 /* Set capability flags */
4357 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
4358 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
4359 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4360 switch (hw
->mac
.type
) {
4361 case ixgbe_mac_82598EB
:
4362 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4363 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4364 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
4366 case ixgbe_mac_X540
:
4367 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4368 case ixgbe_mac_82599EB
:
4369 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
4370 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4371 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4372 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4373 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4374 /* Flow Director hash filters enabled */
4375 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4376 adapter
->atr_sample_rate
= 20;
4377 adapter
->ring_feature
[RING_F_FDIR
].indices
=
4378 IXGBE_MAX_FDIR_INDICES
;
4379 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
4381 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4382 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4383 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
4384 #ifdef CONFIG_IXGBE_DCB
4385 /* Default traffic class to use for FCoE */
4386 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4388 #endif /* IXGBE_FCOE */
4394 /* n-tuple support exists, always init our spinlock */
4395 spin_lock_init(&adapter
->fdir_perfect_lock
);
4397 #ifdef CONFIG_IXGBE_DCB
4398 switch (hw
->mac
.type
) {
4399 case ixgbe_mac_X540
:
4400 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
4401 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
4404 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
4405 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
4409 /* Configure DCB traffic classes */
4410 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4411 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4412 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4413 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4414 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4415 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4416 tc
->dcb_pfc
= pfc_disabled
;
4419 /* Initialize default user to priority mapping, UPx->TC0 */
4420 tc
= &adapter
->dcb_cfg
.tc_config
[0];
4421 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4422 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4424 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4425 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4426 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4427 adapter
->dcb_set_bitmap
= 0x00;
4428 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
4429 ixgbe_copy_dcb_cfg(&adapter
->dcb_cfg
, &adapter
->temp_dcb_cfg
,
4434 /* default flow control settings */
4435 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4436 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4438 adapter
->last_lfc_mode
= hw
->fc
.current_mode
;
4440 ixgbe_pbthresh_setup(adapter
);
4441 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4442 hw
->fc
.send_xon
= true;
4443 hw
->fc
.disable_fc_autoneg
= false;
4445 /* enable itr by default in dynamic mode */
4446 adapter
->rx_itr_setting
= 1;
4447 adapter
->tx_itr_setting
= 1;
4449 /* set default ring sizes */
4450 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4451 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4453 /* set default work limits */
4454 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
4456 /* initialize eeprom parameters */
4457 if (ixgbe_init_eeprom_params_generic(hw
)) {
4458 e_dev_err("EEPROM initialization failed\n");
4462 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4468 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4469 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4471 * Return 0 on success, negative on failure
4473 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
4475 struct device
*dev
= tx_ring
->dev
;
4476 int orig_node
= dev_to_node(dev
);
4480 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4482 if (tx_ring
->q_vector
)
4483 numa_node
= tx_ring
->q_vector
->numa_node
;
4485 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
4486 if (!tx_ring
->tx_buffer_info
)
4487 tx_ring
->tx_buffer_info
= vzalloc(size
);
4488 if (!tx_ring
->tx_buffer_info
)
4491 /* round up to nearest 4K */
4492 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4493 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4495 set_dev_node(dev
, numa_node
);
4496 tx_ring
->desc
= dma_alloc_coherent(dev
,
4500 set_dev_node(dev
, orig_node
);
4502 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
4503 &tx_ring
->dma
, GFP_KERNEL
);
4507 tx_ring
->next_to_use
= 0;
4508 tx_ring
->next_to_clean
= 0;
4512 vfree(tx_ring
->tx_buffer_info
);
4513 tx_ring
->tx_buffer_info
= NULL
;
4514 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
4519 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4520 * @adapter: board private structure
4522 * If this function returns with an error, then it's possible one or
4523 * more of the rings is populated (while the rest are not). It is the
4524 * callers duty to clean those orphaned rings.
4526 * Return 0 on success, negative on failure
4528 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4532 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4533 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
4536 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
4544 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4545 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4547 * Returns 0 on success, negative on failure
4549 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
4551 struct device
*dev
= rx_ring
->dev
;
4552 int orig_node
= dev_to_node(dev
);
4556 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4558 if (rx_ring
->q_vector
)
4559 numa_node
= rx_ring
->q_vector
->numa_node
;
4561 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
4562 if (!rx_ring
->rx_buffer_info
)
4563 rx_ring
->rx_buffer_info
= vzalloc(size
);
4564 if (!rx_ring
->rx_buffer_info
)
4567 /* Round up to nearest 4K */
4568 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4569 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4571 set_dev_node(dev
, numa_node
);
4572 rx_ring
->desc
= dma_alloc_coherent(dev
,
4576 set_dev_node(dev
, orig_node
);
4578 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
4579 &rx_ring
->dma
, GFP_KERNEL
);
4583 rx_ring
->next_to_clean
= 0;
4584 rx_ring
->next_to_use
= 0;
4586 ixgbe_init_rx_page_offset(rx_ring
);
4590 vfree(rx_ring
->rx_buffer_info
);
4591 rx_ring
->rx_buffer_info
= NULL
;
4592 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
4597 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4598 * @adapter: board private structure
4600 * If this function returns with an error, then it's possible one or
4601 * more of the rings is populated (while the rest are not). It is the
4602 * callers duty to clean those orphaned rings.
4604 * Return 0 on success, negative on failure
4606 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4610 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4611 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
4614 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
4622 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4623 * @tx_ring: Tx descriptor ring for a specific queue
4625 * Free all transmit software resources
4627 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
4629 ixgbe_clean_tx_ring(tx_ring
);
4631 vfree(tx_ring
->tx_buffer_info
);
4632 tx_ring
->tx_buffer_info
= NULL
;
4634 /* if not set, then don't free */
4638 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
4639 tx_ring
->desc
, tx_ring
->dma
);
4641 tx_ring
->desc
= NULL
;
4645 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4646 * @adapter: board private structure
4648 * Free all transmit software resources
4650 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4654 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4655 if (adapter
->tx_ring
[i
]->desc
)
4656 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
4660 * ixgbe_free_rx_resources - Free Rx Resources
4661 * @rx_ring: ring to clean the resources from
4663 * Free all receive software resources
4665 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
4667 ixgbe_clean_rx_ring(rx_ring
);
4669 vfree(rx_ring
->rx_buffer_info
);
4670 rx_ring
->rx_buffer_info
= NULL
;
4672 /* if not set, then don't free */
4676 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
4677 rx_ring
->desc
, rx_ring
->dma
);
4679 rx_ring
->desc
= NULL
;
4683 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4684 * @adapter: board private structure
4686 * Free all receive software resources
4688 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4692 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4693 if (adapter
->rx_ring
[i
]->desc
)
4694 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
4698 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4699 * @netdev: network interface device structure
4700 * @new_mtu: new value for maximum frame size
4702 * Returns 0 on success, negative on failure
4704 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4706 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4707 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4709 /* MTU < 68 is an error and causes problems on some kernels */
4710 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4714 * For 82599EB we cannot allow PF to change MTU greater than 1500
4715 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4716 * don't allocate and chain buffers correctly.
4718 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
4719 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
4720 (max_frame
> MAXIMUM_ETHERNET_VLAN_SIZE
))
4723 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
4725 /* must set new MTU before calling down or up */
4726 netdev
->mtu
= new_mtu
;
4728 if (netif_running(netdev
))
4729 ixgbe_reinit_locked(adapter
);
4735 * ixgbe_open - Called when a network interface is made active
4736 * @netdev: network interface device structure
4738 * Returns 0 on success, negative value on failure
4740 * The open entry point is called when a network interface is made
4741 * active by the system (IFF_UP). At this point all resources needed
4742 * for transmit and receive operations are allocated, the interrupt
4743 * handler is registered with the OS, the watchdog timer is started,
4744 * and the stack is notified that the interface is ready.
4746 static int ixgbe_open(struct net_device
*netdev
)
4748 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4751 /* disallow open during test */
4752 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4755 netif_carrier_off(netdev
);
4757 /* allocate transmit descriptors */
4758 err
= ixgbe_setup_all_tx_resources(adapter
);
4762 /* allocate receive descriptors */
4763 err
= ixgbe_setup_all_rx_resources(adapter
);
4767 ixgbe_configure(adapter
);
4769 err
= ixgbe_request_irq(adapter
);
4773 ixgbe_up_complete(adapter
);
4779 ixgbe_free_all_rx_resources(adapter
);
4781 ixgbe_free_all_tx_resources(adapter
);
4782 ixgbe_reset(adapter
);
4788 * ixgbe_close - Disables a network interface
4789 * @netdev: network interface device structure
4791 * Returns 0, this is not allowed to fail
4793 * The close entry point is called when an interface is de-activated
4794 * by the OS. The hardware is still under the drivers control, but
4795 * needs to be disabled. A global MAC reset is issued to stop the
4796 * hardware, and all transmit and receive resources are freed.
4798 static int ixgbe_close(struct net_device
*netdev
)
4800 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4802 ixgbe_down(adapter
);
4803 ixgbe_free_irq(adapter
);
4805 ixgbe_fdir_filter_exit(adapter
);
4807 ixgbe_free_all_tx_resources(adapter
);
4808 ixgbe_free_all_rx_resources(adapter
);
4810 ixgbe_release_hw_control(adapter
);
4816 static int ixgbe_resume(struct pci_dev
*pdev
)
4818 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4819 struct net_device
*netdev
= adapter
->netdev
;
4822 pci_set_power_state(pdev
, PCI_D0
);
4823 pci_restore_state(pdev
);
4825 * pci_restore_state clears dev->state_saved so call
4826 * pci_save_state to restore it.
4828 pci_save_state(pdev
);
4830 err
= pci_enable_device_mem(pdev
);
4832 e_dev_err("Cannot enable PCI device from suspend\n");
4835 pci_set_master(pdev
);
4837 pci_wake_from_d3(pdev
, false);
4839 err
= ixgbe_init_interrupt_scheme(adapter
);
4841 e_dev_err("Cannot initialize interrupts for device\n");
4845 ixgbe_reset(adapter
);
4847 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4849 if (netif_running(netdev
)) {
4850 err
= ixgbe_open(netdev
);
4855 netif_device_attach(netdev
);
4859 #endif /* CONFIG_PM */
4861 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
4863 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4864 struct net_device
*netdev
= adapter
->netdev
;
4865 struct ixgbe_hw
*hw
= &adapter
->hw
;
4867 u32 wufc
= adapter
->wol
;
4872 netif_device_detach(netdev
);
4874 if (netif_running(netdev
)) {
4875 ixgbe_down(adapter
);
4876 ixgbe_free_irq(adapter
);
4877 ixgbe_free_all_tx_resources(adapter
);
4878 ixgbe_free_all_rx_resources(adapter
);
4881 ixgbe_clear_interrupt_scheme(adapter
);
4883 kfree(adapter
->ixgbe_ieee_pfc
);
4884 kfree(adapter
->ixgbe_ieee_ets
);
4888 retval
= pci_save_state(pdev
);
4894 ixgbe_set_rx_mode(netdev
);
4896 /* turn on all-multi mode if wake on multicast is enabled */
4897 if (wufc
& IXGBE_WUFC_MC
) {
4898 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4899 fctrl
|= IXGBE_FCTRL_MPE
;
4900 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4903 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
4904 ctrl
|= IXGBE_CTRL_GIO_DIS
;
4905 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
4907 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
4909 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
4910 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
4913 switch (hw
->mac
.type
) {
4914 case ixgbe_mac_82598EB
:
4915 pci_wake_from_d3(pdev
, false);
4917 case ixgbe_mac_82599EB
:
4918 case ixgbe_mac_X540
:
4919 pci_wake_from_d3(pdev
, !!wufc
);
4925 *enable_wake
= !!wufc
;
4927 ixgbe_release_hw_control(adapter
);
4929 pci_disable_device(pdev
);
4935 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4940 retval
= __ixgbe_shutdown(pdev
, &wake
);
4945 pci_prepare_to_sleep(pdev
);
4947 pci_wake_from_d3(pdev
, false);
4948 pci_set_power_state(pdev
, PCI_D3hot
);
4953 #endif /* CONFIG_PM */
4955 static void ixgbe_shutdown(struct pci_dev
*pdev
)
4959 __ixgbe_shutdown(pdev
, &wake
);
4961 if (system_state
== SYSTEM_POWER_OFF
) {
4962 pci_wake_from_d3(pdev
, wake
);
4963 pci_set_power_state(pdev
, PCI_D3hot
);
4968 * ixgbe_update_stats - Update the board statistics counters.
4969 * @adapter: board private structure
4971 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
4973 struct net_device
*netdev
= adapter
->netdev
;
4974 struct ixgbe_hw
*hw
= &adapter
->hw
;
4975 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
4977 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
4978 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
4979 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
4980 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
4982 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
4984 u64 fcoe_noddp_counts_sum
= 0, fcoe_noddp_ext_buff_counts_sum
= 0;
4985 #endif /* IXGBE_FCOE */
4987 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
4988 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
4991 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
4994 for (i
= 0; i
< 16; i
++)
4995 adapter
->hw_rx_no_dma_resources
+=
4996 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
4997 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4998 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
4999 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5001 adapter
->rsc_total_count
= rsc_count
;
5002 adapter
->rsc_total_flush
= rsc_flush
;
5005 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5006 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5007 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5008 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5009 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5010 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5011 bytes
+= rx_ring
->stats
.bytes
;
5012 packets
+= rx_ring
->stats
.packets
;
5014 adapter
->non_eop_descs
= non_eop_descs
;
5015 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5016 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5017 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5018 netdev
->stats
.rx_bytes
= bytes
;
5019 netdev
->stats
.rx_packets
= packets
;
5023 /* gather some stats to the adapter struct that are per queue */
5024 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5025 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5026 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5027 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5028 bytes
+= tx_ring
->stats
.bytes
;
5029 packets
+= tx_ring
->stats
.packets
;
5031 adapter
->restart_queue
= restart_queue
;
5032 adapter
->tx_busy
= tx_busy
;
5033 netdev
->stats
.tx_bytes
= bytes
;
5034 netdev
->stats
.tx_packets
= packets
;
5036 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5038 /* 8 register reads */
5039 for (i
= 0; i
< 8; i
++) {
5040 /* for packet buffers not used, the register should read 0 */
5041 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5043 hwstats
->mpc
[i
] += mpc
;
5044 total_mpc
+= hwstats
->mpc
[i
];
5045 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5046 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5047 switch (hw
->mac
.type
) {
5048 case ixgbe_mac_82598EB
:
5049 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5050 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5051 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5052 hwstats
->pxonrxc
[i
] +=
5053 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5055 case ixgbe_mac_82599EB
:
5056 case ixgbe_mac_X540
:
5057 hwstats
->pxonrxc
[i
] +=
5058 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5065 /*16 register reads */
5066 for (i
= 0; i
< 16; i
++) {
5067 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5068 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5069 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5070 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5071 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5072 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5073 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5074 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5078 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5079 /* work around hardware counting issue */
5080 hwstats
->gprc
-= missed_rx
;
5082 ixgbe_update_xoff_received(adapter
);
5084 /* 82598 hardware only has a 32 bit counter in the high register */
5085 switch (hw
->mac
.type
) {
5086 case ixgbe_mac_82598EB
:
5087 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5088 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5089 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5090 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5092 case ixgbe_mac_X540
:
5093 /* OS2BMC stats are X540 only*/
5094 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5095 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5096 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5097 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5098 case ixgbe_mac_82599EB
:
5099 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5100 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5101 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5102 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5103 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5104 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5105 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5106 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5107 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5109 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5110 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5111 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5112 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5113 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5114 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5115 /* Add up per cpu counters for total ddp aloc fail */
5116 if (fcoe
->pcpu_noddp
&& fcoe
->pcpu_noddp_ext_buff
) {
5117 for_each_possible_cpu(cpu
) {
5118 fcoe_noddp_counts_sum
+=
5119 *per_cpu_ptr(fcoe
->pcpu_noddp
, cpu
);
5120 fcoe_noddp_ext_buff_counts_sum
+=
5122 pcpu_noddp_ext_buff
, cpu
);
5125 hwstats
->fcoe_noddp
= fcoe_noddp_counts_sum
;
5126 hwstats
->fcoe_noddp_ext_buff
= fcoe_noddp_ext_buff_counts_sum
;
5127 #endif /* IXGBE_FCOE */
5132 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5133 hwstats
->bprc
+= bprc
;
5134 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5135 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5136 hwstats
->mprc
-= bprc
;
5137 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5138 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5139 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5140 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5141 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5142 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5143 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5144 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5145 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5146 hwstats
->lxontxc
+= lxon
;
5147 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5148 hwstats
->lxofftxc
+= lxoff
;
5149 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5150 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5152 * 82598 errata - tx of flow control packets is included in tx counters
5154 xon_off_tot
= lxon
+ lxoff
;
5155 hwstats
->gptc
-= xon_off_tot
;
5156 hwstats
->mptc
-= xon_off_tot
;
5157 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5158 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5159 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5160 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5161 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5162 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5163 hwstats
->ptc64
-= xon_off_tot
;
5164 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5165 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5166 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5167 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5168 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5169 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5171 /* Fill out the OS statistics structure */
5172 netdev
->stats
.multicast
= hwstats
->mprc
;
5175 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5176 netdev
->stats
.rx_dropped
= 0;
5177 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5178 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5179 netdev
->stats
.rx_missed_errors
= total_mpc
;
5183 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5184 * @adapter - pointer to the device adapter structure
5186 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5188 struct ixgbe_hw
*hw
= &adapter
->hw
;
5191 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5194 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5196 /* if interface is down do nothing */
5197 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5200 /* do nothing if we are not using signature filters */
5201 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5204 adapter
->fdir_overflow
++;
5206 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5207 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5208 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5209 &(adapter
->tx_ring
[i
]->state
));
5210 /* re-enable flow director interrupts */
5211 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5213 e_err(probe
, "failed to finish FDIR re-initialization, "
5214 "ignored adding FDIR ATR filters\n");
5219 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5220 * @adapter - pointer to the device adapter structure
5222 * This function serves two purposes. First it strobes the interrupt lines
5223 * in order to make certain interrupts are occurring. Secondly it sets the
5224 * bits needed to check for TX hangs. As a result we should immediately
5225 * determine if a hang has occurred.
5227 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5229 struct ixgbe_hw
*hw
= &adapter
->hw
;
5233 /* If we're down or resetting, just bail */
5234 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5235 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5238 /* Force detection of hung controller */
5239 if (netif_carrier_ok(adapter
->netdev
)) {
5240 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5241 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5244 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5246 * for legacy and MSI interrupts don't set any bits
5247 * that are enabled for EIAM, because this operation
5248 * would set *both* EIMS and EICS for any bit in EIAM
5250 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5251 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5253 /* get one bit for every active tx/rx interrupt vector */
5254 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
5255 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5256 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5257 eics
|= ((u64
)1 << i
);
5261 /* Cause software interrupt to ensure rings are cleaned */
5262 ixgbe_irq_rearm_queues(adapter
, eics
);
5267 * ixgbe_watchdog_update_link - update the link status
5268 * @adapter - pointer to the device adapter structure
5269 * @link_speed - pointer to a u32 to store the link_speed
5271 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
5273 struct ixgbe_hw
*hw
= &adapter
->hw
;
5274 u32 link_speed
= adapter
->link_speed
;
5275 bool link_up
= adapter
->link_up
;
5278 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5281 if (hw
->mac
.ops
.check_link
) {
5282 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5284 /* always assume link is up, if no check link function */
5285 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
5289 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) {
5290 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++)
5291 hw
->mac
.ops
.fc_enable(hw
, i
);
5293 hw
->mac
.ops
.fc_enable(hw
, 0);
5298 time_after(jiffies
, (adapter
->link_check_timeout
+
5299 IXGBE_TRY_LINK_TIMEOUT
))) {
5300 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5301 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5302 IXGBE_WRITE_FLUSH(hw
);
5305 adapter
->link_up
= link_up
;
5306 adapter
->link_speed
= link_speed
;
5310 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5311 * print link up message
5312 * @adapter - pointer to the device adapter structure
5314 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
5316 struct net_device
*netdev
= adapter
->netdev
;
5317 struct ixgbe_hw
*hw
= &adapter
->hw
;
5318 u32 link_speed
= adapter
->link_speed
;
5319 bool flow_rx
, flow_tx
;
5321 /* only continue if link was previously down */
5322 if (netif_carrier_ok(netdev
))
5325 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
5327 switch (hw
->mac
.type
) {
5328 case ixgbe_mac_82598EB
: {
5329 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5330 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5331 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5332 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5335 case ixgbe_mac_X540
:
5336 case ixgbe_mac_82599EB
: {
5337 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5338 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5339 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5340 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5348 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5349 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5351 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5353 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
5356 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5358 (flow_tx
? "TX" : "None"))));
5360 netif_carrier_on(netdev
);
5361 ixgbe_check_vf_rate_limit(adapter
);
5365 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5366 * print link down message
5367 * @adapter - pointer to the adapter structure
5369 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
5371 struct net_device
*netdev
= adapter
->netdev
;
5372 struct ixgbe_hw
*hw
= &adapter
->hw
;
5374 adapter
->link_up
= false;
5375 adapter
->link_speed
= 0;
5377 /* only continue if link was up previously */
5378 if (!netif_carrier_ok(netdev
))
5381 /* poll for SFP+ cable when link is down */
5382 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
5383 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5385 e_info(drv
, "NIC Link is Down\n");
5386 netif_carrier_off(netdev
);
5390 * ixgbe_watchdog_flush_tx - flush queues on link down
5391 * @adapter - pointer to the device adapter structure
5393 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
5396 int some_tx_pending
= 0;
5398 if (!netif_carrier_ok(adapter
->netdev
)) {
5399 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5400 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5401 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5402 some_tx_pending
= 1;
5407 if (some_tx_pending
) {
5408 /* We've lost link, so the controller stops DMA,
5409 * but we've got queued Tx work that's never going
5410 * to get done, so reset controller to flush Tx.
5411 * (Do the reset outside of interrupt context).
5413 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
5418 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
5422 /* Do not perform spoof check for 82598 */
5423 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5426 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
5429 * ssvpc register is cleared on read, if zero then no
5430 * spoofed packets in the last interval.
5435 e_warn(drv
, "%d Spoofed packets detected\n", ssvpc
);
5439 * ixgbe_watchdog_subtask - check and bring link up
5440 * @adapter - pointer to the device adapter structure
5442 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
5444 /* if interface is down do nothing */
5445 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5446 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5449 ixgbe_watchdog_update_link(adapter
);
5451 if (adapter
->link_up
)
5452 ixgbe_watchdog_link_is_up(adapter
);
5454 ixgbe_watchdog_link_is_down(adapter
);
5456 ixgbe_spoof_check(adapter
);
5457 ixgbe_update_stats(adapter
);
5459 ixgbe_watchdog_flush_tx(adapter
);
5463 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5464 * @adapter - the ixgbe adapter structure
5466 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
5468 struct ixgbe_hw
*hw
= &adapter
->hw
;
5471 /* not searching for SFP so there is nothing to do here */
5472 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
5473 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5476 /* someone else is in init, wait until next service event */
5477 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5480 err
= hw
->phy
.ops
.identify_sfp(hw
);
5481 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5484 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
5485 /* If no cable is present, then we need to reset
5486 * the next time we find a good cable. */
5487 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5494 /* exit if reset not needed */
5495 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5498 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
5501 * A module may be identified correctly, but the EEPROM may not have
5502 * support for that module. setup_sfp() will fail in that case, so
5503 * we should not allow that module to load.
5505 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5506 err
= hw
->phy
.ops
.reset(hw
);
5508 err
= hw
->mac
.ops
.setup_sfp(hw
);
5510 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5513 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
5514 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
5517 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5519 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
5520 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
5521 e_dev_err("failed to initialize because an unsupported "
5522 "SFP+ module type was detected.\n");
5523 e_dev_err("Reload the driver after installing a "
5524 "supported module.\n");
5525 unregister_netdev(adapter
->netdev
);
5530 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5531 * @adapter - the ixgbe adapter structure
5533 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
5535 struct ixgbe_hw
*hw
= &adapter
->hw
;
5539 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
5542 /* someone else is in init, wait until next service event */
5543 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5546 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5548 autoneg
= hw
->phy
.autoneg_advertised
;
5549 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5550 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5551 if (hw
->mac
.ops
.setup_link
)
5552 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5554 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5555 adapter
->link_check_timeout
= jiffies
;
5556 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5559 #ifdef CONFIG_PCI_IOV
5560 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
5563 struct ixgbe_hw
*hw
= &adapter
->hw
;
5564 struct net_device
*netdev
= adapter
->netdev
;
5568 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
5569 if (gpc
) /* If incrementing then no need for the check below */
5572 * Check to see if a bad DMA write target from an errant or
5573 * malicious VF has caused a PCIe error. If so then we can
5574 * issue a VFLR to the offending VF(s) and then resume without
5575 * requesting a full slot reset.
5578 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
5579 ciaa
= (vf
<< 16) | 0x80000000;
5580 /* 32 bit read so align, we really want status at offset 6 */
5581 ciaa
|= PCI_COMMAND
;
5582 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5583 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
5585 /* disable debug mode asap after reading data */
5586 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5587 /* Get the upper 16 bits which will be the PCI status reg */
5589 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
5590 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
5592 ciaa
= (vf
<< 16) | 0x80000000;
5594 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5595 ciad
= 0x00008000; /* VFLR */
5596 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
5598 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5605 * ixgbe_service_timer - Timer Call-back
5606 * @data: pointer to adapter cast into an unsigned long
5608 static void ixgbe_service_timer(unsigned long data
)
5610 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5611 unsigned long next_event_offset
;
5614 /* poll faster when waiting for link */
5615 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
5616 next_event_offset
= HZ
/ 10;
5618 next_event_offset
= HZ
* 2;
5620 #ifdef CONFIG_PCI_IOV
5622 * don't bother with SR-IOV VF DMA hang check if there are
5623 * no VFs or the link is down
5625 if (!adapter
->num_vfs
||
5626 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5627 goto normal_timer_service
;
5629 /* If we have VFs allocated then we must check for DMA hangs */
5630 ixgbe_check_for_bad_vf(adapter
);
5631 next_event_offset
= HZ
/ 50;
5632 adapter
->timer_event_accumulator
++;
5634 if (adapter
->timer_event_accumulator
>= 100)
5635 adapter
->timer_event_accumulator
= 0;
5639 normal_timer_service
:
5641 /* Reset the timer */
5642 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
5645 ixgbe_service_event_schedule(adapter
);
5648 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
5650 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
5653 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
5655 /* If we're already down or resetting, just bail */
5656 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5657 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5660 ixgbe_dump(adapter
);
5661 netdev_err(adapter
->netdev
, "Reset adapter\n");
5662 adapter
->tx_timeout_count
++;
5664 ixgbe_reinit_locked(adapter
);
5668 * ixgbe_service_task - manages and runs subtasks
5669 * @work: pointer to work_struct containing our data
5671 static void ixgbe_service_task(struct work_struct
*work
)
5673 struct ixgbe_adapter
*adapter
= container_of(work
,
5674 struct ixgbe_adapter
,
5677 ixgbe_reset_subtask(adapter
);
5678 ixgbe_sfp_detection_subtask(adapter
);
5679 ixgbe_sfp_link_config_subtask(adapter
);
5680 ixgbe_check_overtemp_subtask(adapter
);
5681 ixgbe_watchdog_subtask(adapter
);
5682 ixgbe_fdir_reinit_subtask(adapter
);
5683 ixgbe_check_hang_subtask(adapter
);
5685 ixgbe_service_event_complete(adapter
);
5688 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
5689 struct ixgbe_tx_buffer
*first
,
5692 struct sk_buff
*skb
= first
->skb
;
5693 u32 vlan_macip_lens
, type_tucmd
;
5694 u32 mss_l4len_idx
, l4len
;
5696 if (!skb_is_gso(skb
))
5699 if (skb_header_cloned(skb
)) {
5700 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5705 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5706 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5708 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
5709 struct iphdr
*iph
= ip_hdr(skb
);
5712 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5716 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5717 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5718 IXGBE_TX_FLAGS_CSUM
|
5719 IXGBE_TX_FLAGS_IPV4
;
5720 } else if (skb_is_gso_v6(skb
)) {
5721 ipv6_hdr(skb
)->payload_len
= 0;
5722 tcp_hdr(skb
)->check
=
5723 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5724 &ipv6_hdr(skb
)->daddr
,
5726 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5727 IXGBE_TX_FLAGS_CSUM
;
5730 /* compute header lengths */
5731 l4len
= tcp_hdrlen(skb
);
5732 *hdr_len
= skb_transport_offset(skb
) + l4len
;
5734 /* update gso size and bytecount with header size */
5735 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
5736 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
5738 /* mss_l4len_id: use 1 as index for TSO */
5739 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
5740 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
5741 mss_l4len_idx
|= 1 << IXGBE_ADVTXD_IDX_SHIFT
;
5743 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5744 vlan_macip_lens
= skb_network_header_len(skb
);
5745 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5746 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5748 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
5754 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
5755 struct ixgbe_tx_buffer
*first
)
5757 struct sk_buff
*skb
= first
->skb
;
5758 u32 vlan_macip_lens
= 0;
5759 u32 mss_l4len_idx
= 0;
5762 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5763 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
5764 !(first
->tx_flags
& IXGBE_TX_FLAGS_TXSW
))
5768 switch (first
->protocol
) {
5769 case __constant_htons(ETH_P_IP
):
5770 vlan_macip_lens
|= skb_network_header_len(skb
);
5771 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5772 l4_hdr
= ip_hdr(skb
)->protocol
;
5774 case __constant_htons(ETH_P_IPV6
):
5775 vlan_macip_lens
|= skb_network_header_len(skb
);
5776 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
5779 if (unlikely(net_ratelimit())) {
5780 dev_warn(tx_ring
->dev
,
5781 "partial checksum but proto=%x!\n",
5789 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5790 mss_l4len_idx
= tcp_hdrlen(skb
) <<
5791 IXGBE_ADVTXD_L4LEN_SHIFT
;
5794 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5795 mss_l4len_idx
= sizeof(struct sctphdr
) <<
5796 IXGBE_ADVTXD_L4LEN_SHIFT
;
5799 mss_l4len_idx
= sizeof(struct udphdr
) <<
5800 IXGBE_ADVTXD_L4LEN_SHIFT
;
5803 if (unlikely(net_ratelimit())) {
5804 dev_warn(tx_ring
->dev
,
5805 "partial checksum but l4 proto=%x!\n",
5811 /* update TX checksum flag */
5812 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5815 /* vlan_macip_lens: MACLEN, VLAN tag */
5816 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5817 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5819 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
5820 type_tucmd
, mss_l4len_idx
);
5823 static __le32
ixgbe_tx_cmd_type(u32 tx_flags
)
5825 /* set type for advanced descriptor with frame checksum insertion */
5826 __le32 cmd_type
= cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA
|
5827 IXGBE_ADVTXD_DCMD_IFCS
|
5828 IXGBE_ADVTXD_DCMD_DEXT
);
5830 /* set HW vlan bit if vlan is present */
5831 if (tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
)
5832 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE
);
5834 /* set segmentation enable bits for TSO/FSO */
5836 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FSO
))
5838 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5840 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE
);
5845 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
5846 u32 tx_flags
, unsigned int paylen
)
5848 __le32 olinfo_status
= cpu_to_le32(paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
);
5850 /* enable L4 checksum for TSO and TX checksum offload */
5851 if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
5852 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM
);
5854 /* enble IPv4 checksum for TSO */
5855 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
5856 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM
);
5858 /* use index 1 context for TSO/FSO/FCOE */
5860 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FCOE
))
5862 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5864 olinfo_status
|= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT
);
5867 * Check Context must be set if Tx switch is enabled, which it
5868 * always is for case where virtual functions are running
5871 if (tx_flags
& (IXGBE_TX_FLAGS_TXSW
| IXGBE_TX_FLAGS_FCOE
))
5873 if (tx_flags
& IXGBE_TX_FLAGS_TXSW
)
5875 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_CC
);
5877 tx_desc
->read
.olinfo_status
= olinfo_status
;
5880 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5883 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
5884 struct ixgbe_tx_buffer
*first
,
5888 struct sk_buff
*skb
= first
->skb
;
5889 struct ixgbe_tx_buffer
*tx_buffer
;
5890 union ixgbe_adv_tx_desc
*tx_desc
;
5891 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
5892 unsigned int data_len
= skb
->data_len
;
5893 unsigned int size
= skb_headlen(skb
);
5894 unsigned int paylen
= skb
->len
- hdr_len
;
5895 u32 tx_flags
= first
->tx_flags
;
5897 u16 i
= tx_ring
->next_to_use
;
5899 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
5901 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, paylen
);
5902 cmd_type
= ixgbe_tx_cmd_type(tx_flags
);
5905 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5906 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
5907 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
5910 data_len
-= sizeof(struct fcoe_crc_eof
);
5915 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
5916 if (dma_mapping_error(tx_ring
->dev
, dma
))
5919 /* record length, and DMA address */
5920 dma_unmap_len_set(first
, len
, size
);
5921 dma_unmap_addr_set(first
, dma
, dma
);
5923 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5926 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
5927 tx_desc
->read
.cmd_type_len
=
5928 cmd_type
| cpu_to_le32(IXGBE_MAX_DATA_PER_TXD
);
5932 if (i
== tx_ring
->count
) {
5933 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
5937 dma
+= IXGBE_MAX_DATA_PER_TXD
;
5938 size
-= IXGBE_MAX_DATA_PER_TXD
;
5940 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5941 tx_desc
->read
.olinfo_status
= 0;
5944 if (likely(!data_len
))
5947 if (unlikely(skb
->no_fcs
))
5948 cmd_type
&= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS
));
5949 tx_desc
->read
.cmd_type_len
= cmd_type
| cpu_to_le32(size
);
5953 if (i
== tx_ring
->count
) {
5954 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
5959 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
5961 size
= skb_frag_size(frag
);
5965 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
5967 if (dma_mapping_error(tx_ring
->dev
, dma
))
5970 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5971 dma_unmap_len_set(tx_buffer
, len
, size
);
5972 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
5974 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5975 tx_desc
->read
.olinfo_status
= 0;
5980 /* write last descriptor with RS and EOP bits */
5981 cmd_type
|= cpu_to_le32(size
) | cpu_to_le32(IXGBE_TXD_CMD
);
5982 tx_desc
->read
.cmd_type_len
= cmd_type
;
5984 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
5986 /* set the timestamp */
5987 first
->time_stamp
= jiffies
;
5990 * Force memory writes to complete before letting h/w know there
5991 * are new descriptors to fetch. (Only applicable for weak-ordered
5992 * memory model archs, such as IA-64).
5994 * We also need this memory barrier to make certain all of the
5995 * status bits have been updated before next_to_watch is written.
5999 /* set next_to_watch value indicating a packet is present */
6000 first
->next_to_watch
= tx_desc
;
6003 if (i
== tx_ring
->count
)
6006 tx_ring
->next_to_use
= i
;
6008 /* notify HW of packet */
6009 writel(i
, tx_ring
->tail
);
6013 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6015 /* clear dma mappings for failed tx_buffer_info map */
6017 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6018 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6019 if (tx_buffer
== first
)
6026 tx_ring
->next_to_use
= i
;
6029 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6030 struct ixgbe_tx_buffer
*first
)
6032 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6033 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6034 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6036 unsigned char *network
;
6038 struct ipv6hdr
*ipv6
;
6043 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6047 /* do nothing if sampling is disabled */
6048 if (!ring
->atr_sample_rate
)
6053 /* snag network header to get L4 type and address */
6054 hdr
.network
= skb_network_header(first
->skb
);
6056 /* Currently only IPv4/IPv6 with TCP is supported */
6057 if ((first
->protocol
!= __constant_htons(ETH_P_IPV6
) ||
6058 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6059 (first
->protocol
!= __constant_htons(ETH_P_IP
) ||
6060 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6063 th
= tcp_hdr(first
->skb
);
6065 /* skip this packet since it is invalid or the socket is closing */
6069 /* sample on all syn packets or once every atr sample count */
6070 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6073 /* reset sample count */
6074 ring
->atr_count
= 0;
6076 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6079 * src and dst are inverted, think how the receiver sees them
6081 * The input is broken into two sections, a non-compressed section
6082 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6083 * is XORed together and stored in the compressed dword.
6085 input
.formatted
.vlan_id
= vlan_id
;
6088 * since src port and flex bytes occupy the same word XOR them together
6089 * and write the value to source port portion of compressed dword
6091 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6092 common
.port
.src
^= th
->dest
^ __constant_htons(ETH_P_8021Q
);
6094 common
.port
.src
^= th
->dest
^ first
->protocol
;
6095 common
.port
.dst
^= th
->source
;
6097 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6098 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6099 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6101 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6102 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6103 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6104 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6105 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6106 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6107 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6108 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6109 hdr
.ipv6
->daddr
.s6_addr32
[3];
6112 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6113 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6114 input
, common
, ring
->queue_index
);
6117 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6119 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6120 /* Herbert's original patch had:
6121 * smp_mb__after_netif_stop_queue();
6122 * but since that doesn't exist yet, just open code it. */
6125 /* We need to check again in a case another CPU has just
6126 * made room available. */
6127 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6130 /* A reprieve! - use start_queue because it doesn't call schedule */
6131 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6132 ++tx_ring
->tx_stats
.restart_queue
;
6136 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6138 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6140 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6143 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6145 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6146 int txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6149 __be16 protocol
= vlan_get_protocol(skb
);
6151 if (((protocol
== htons(ETH_P_FCOE
)) ||
6152 (protocol
== htons(ETH_P_FIP
))) &&
6153 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6154 txq
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
6155 txq
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
6160 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6161 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6162 txq
-= dev
->real_num_tx_queues
;
6166 return skb_tx_hash(dev
, skb
);
6169 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6170 struct ixgbe_adapter
*adapter
,
6171 struct ixgbe_ring
*tx_ring
)
6173 struct ixgbe_tx_buffer
*first
;
6176 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6179 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
6180 __be16 protocol
= skb
->protocol
;
6184 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6185 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6186 * + 2 desc gap to keep tail from touching head,
6187 * + 1 desc for context descriptor,
6188 * otherwise try next time
6190 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6191 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6192 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6194 count
+= skb_shinfo(skb
)->nr_frags
;
6196 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
6197 tx_ring
->tx_stats
.tx_busy
++;
6198 return NETDEV_TX_BUSY
;
6201 /* record the location of the first descriptor for this packet */
6202 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
6204 first
->bytecount
= skb
->len
;
6205 first
->gso_segs
= 1;
6207 /* if we have a HW VLAN tag being added default to the HW one */
6208 if (vlan_tx_tag_present(skb
)) {
6209 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
6210 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6211 /* else if it is a SW VLAN check the next protocol and store the tag */
6212 } else if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6213 struct vlan_hdr
*vhdr
, _vhdr
;
6214 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
6218 protocol
= vhdr
->h_vlan_encapsulated_proto
;
6219 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
6220 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6221 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
6224 #ifdef CONFIG_PCI_IOV
6226 * Use the l2switch_enable flag - would be false if the DMA
6227 * Tx switch had been disabled.
6229 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6230 tx_flags
|= IXGBE_TX_FLAGS_TXSW
;
6233 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6234 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
6235 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
6236 (skb
->priority
!= TC_PRIO_CONTROL
))) {
6237 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6238 tx_flags
|= (skb
->priority
& 0x7) <<
6239 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
6240 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
6241 struct vlan_ethhdr
*vhdr
;
6242 if (skb_header_cloned(skb
) &&
6243 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
6245 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
6246 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
6247 IXGBE_TX_FLAGS_VLAN_SHIFT
);
6249 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6253 /* record initial flags and protocol */
6254 first
->tx_flags
= tx_flags
;
6255 first
->protocol
= protocol
;
6258 /* setup tx offload for FCoE */
6259 if ((protocol
== __constant_htons(ETH_P_FCOE
)) &&
6260 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6261 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
6268 #endif /* IXGBE_FCOE */
6269 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
6273 ixgbe_tx_csum(tx_ring
, first
);
6275 /* add the ATR filter if ATR is on */
6276 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
6277 ixgbe_atr(tx_ring
, first
);
6281 #endif /* IXGBE_FCOE */
6282 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
6284 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
6286 return NETDEV_TX_OK
;
6289 dev_kfree_skb_any(first
->skb
);
6292 return NETDEV_TX_OK
;
6295 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
6296 struct net_device
*netdev
)
6298 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6299 struct ixgbe_ring
*tx_ring
;
6301 if (skb
->len
<= 0) {
6302 dev_kfree_skb_any(skb
);
6303 return NETDEV_TX_OK
;
6307 * The minimum packet size for olinfo paylen is 17 so pad the skb
6308 * in order to meet this minimum size requirement.
6310 if (skb
->len
< 17) {
6311 if (skb_padto(skb
, 17))
6312 return NETDEV_TX_OK
;
6316 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6317 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
6321 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6322 * @netdev: network interface device structure
6323 * @p: pointer to an address structure
6325 * Returns 0 on success, negative on failure
6327 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6329 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6330 struct ixgbe_hw
*hw
= &adapter
->hw
;
6331 struct sockaddr
*addr
= p
;
6333 if (!is_valid_ether_addr(addr
->sa_data
))
6334 return -EADDRNOTAVAIL
;
6336 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6337 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6339 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6346 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6348 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6349 struct ixgbe_hw
*hw
= &adapter
->hw
;
6353 if (prtad
!= hw
->phy
.mdio
.prtad
)
6355 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6361 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6362 u16 addr
, u16 value
)
6364 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6365 struct ixgbe_hw
*hw
= &adapter
->hw
;
6367 if (prtad
!= hw
->phy
.mdio
.prtad
)
6369 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6372 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6374 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6376 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6380 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6382 * @netdev: network interface device structure
6384 * Returns non-zero on failure
6386 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6389 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6390 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6392 if (is_valid_ether_addr(mac
->san_addr
)) {
6394 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6401 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6403 * @netdev: network interface device structure
6405 * Returns non-zero on failure
6407 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6410 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6411 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6413 if (is_valid_ether_addr(mac
->san_addr
)) {
6415 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6421 #ifdef CONFIG_NET_POLL_CONTROLLER
6423 * Polling 'interrupt' - used by things like netconsole to send skbs
6424 * without having to re-enable interrupts. It's not called while
6425 * the interrupt routine is executing.
6427 static void ixgbe_netpoll(struct net_device
*netdev
)
6429 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6432 /* if interface is down do nothing */
6433 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6436 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6437 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6438 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
6439 for (i
= 0; i
< num_q_vectors
; i
++) {
6440 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
6441 ixgbe_msix_clean_rings(0, q_vector
);
6444 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6446 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6450 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
6451 struct rtnl_link_stats64
*stats
)
6453 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6457 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6458 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
6464 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6465 packets
= ring
->stats
.packets
;
6466 bytes
= ring
->stats
.bytes
;
6467 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6468 stats
->rx_packets
+= packets
;
6469 stats
->rx_bytes
+= bytes
;
6473 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6474 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
6480 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6481 packets
= ring
->stats
.packets
;
6482 bytes
= ring
->stats
.bytes
;
6483 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6484 stats
->tx_packets
+= packets
;
6485 stats
->tx_bytes
+= bytes
;
6489 /* following stats updated by ixgbe_watchdog_task() */
6490 stats
->multicast
= netdev
->stats
.multicast
;
6491 stats
->rx_errors
= netdev
->stats
.rx_errors
;
6492 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
6493 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
6494 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
6498 #ifdef CONFIG_IXGBE_DCB
6499 /* ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6500 * #adapter: pointer to ixgbe_adapter
6501 * @tc: number of traffic classes currently enabled
6503 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6504 * 802.1Q priority maps to a packet buffer that exists.
6506 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
6508 struct ixgbe_hw
*hw
= &adapter
->hw
;
6512 /* 82598 have a static priority to TC mapping that can not
6513 * be changed so no validation is needed.
6515 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6518 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
6521 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
6522 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
6524 /* If up2tc is out of bounds default to zero */
6526 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
6530 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
6535 /* ixgbe_setup_tc - routine to configure net_device for multiple traffic
6538 * @netdev: net device to configure
6539 * @tc: number of traffic classes to enable
6541 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
6543 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6544 struct ixgbe_hw
*hw
= &adapter
->hw
;
6546 /* Multiple traffic classes requires multiple queues */
6547 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6548 e_err(drv
, "Enable failed, needs MSI-X\n");
6552 /* Hardware supports up to 8 traffic classes */
6553 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
6554 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
6555 tc
< MAX_TRAFFIC_CLASS
))
6558 /* Hardware has to reinitialize queues and interrupts to
6559 * match packet buffer alignment. Unfortunately, the
6560 * hardware is not flexible enough to do this dynamically.
6562 if (netif_running(dev
))
6564 ixgbe_clear_interrupt_scheme(adapter
);
6567 netdev_set_num_tc(dev
, tc
);
6568 adapter
->last_lfc_mode
= adapter
->hw
.fc
.current_mode
;
6569 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
6570 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6572 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
6573 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
6575 netdev_reset_tc(dev
);
6576 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
6578 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
6579 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6581 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
6582 adapter
->dcb_cfg
.pfc_mode_enable
= false;
6585 ixgbe_init_interrupt_scheme(adapter
);
6586 ixgbe_validate_rtr(adapter
, tc
);
6587 if (netif_running(dev
))
6593 #endif /* CONFIG_IXGBE_DCB */
6594 void ixgbe_do_reset(struct net_device
*netdev
)
6596 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6598 if (netif_running(netdev
))
6599 ixgbe_reinit_locked(adapter
);
6601 ixgbe_reset(adapter
);
6604 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
6605 netdev_features_t features
)
6607 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6610 if (adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)
6611 features
&= ~NETIF_F_HW_VLAN_RX
;
6614 /* return error if RXHASH is being enabled when RSS is not supported */
6615 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
))
6616 features
&= ~NETIF_F_RXHASH
;
6618 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6619 if (!(features
& NETIF_F_RXCSUM
))
6620 features
&= ~NETIF_F_LRO
;
6622 /* Turn off LRO if not RSC capable */
6623 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
6624 features
&= ~NETIF_F_LRO
;
6630 static int ixgbe_set_features(struct net_device
*netdev
,
6631 netdev_features_t features
)
6633 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6634 netdev_features_t changed
= netdev
->features
^ features
;
6635 bool need_reset
= false;
6637 /* Make sure RSC matches LRO, reset if change */
6638 if (!(features
& NETIF_F_LRO
)) {
6639 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6641 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
6642 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
6643 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
6644 if (adapter
->rx_itr_setting
== 1 ||
6645 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
6646 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
6648 } else if ((changed
^ features
) & NETIF_F_LRO
) {
6649 e_info(probe
, "rx-usecs set too low, "
6655 * Check if Flow Director n-tuple support was enabled or disabled. If
6656 * the state changed, we need to reset.
6658 if (!(features
& NETIF_F_NTUPLE
)) {
6659 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
6660 /* turn off Flow Director, set ATR and reset */
6661 if ((adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) &&
6662 !(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
6663 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6666 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6667 } else if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)) {
6668 /* turn off ATR, enable perfect filters and reset */
6669 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6670 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6674 if (changed
& NETIF_F_RXALL
)
6677 netdev
->features
= features
;
6679 ixgbe_do_reset(netdev
);
6684 static const struct net_device_ops ixgbe_netdev_ops
= {
6685 .ndo_open
= ixgbe_open
,
6686 .ndo_stop
= ixgbe_close
,
6687 .ndo_start_xmit
= ixgbe_xmit_frame
,
6688 .ndo_select_queue
= ixgbe_select_queue
,
6689 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6690 .ndo_validate_addr
= eth_validate_addr
,
6691 .ndo_set_mac_address
= ixgbe_set_mac
,
6692 .ndo_change_mtu
= ixgbe_change_mtu
,
6693 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6694 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6695 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6696 .ndo_do_ioctl
= ixgbe_ioctl
,
6697 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
6698 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
6699 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
6700 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
6701 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
6702 .ndo_get_stats64
= ixgbe_get_stats64
,
6703 #ifdef CONFIG_IXGBE_DCB
6704 .ndo_setup_tc
= ixgbe_setup_tc
,
6706 #ifdef CONFIG_NET_POLL_CONTROLLER
6707 .ndo_poll_controller
= ixgbe_netpoll
,
6710 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6711 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
6712 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6713 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6714 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6715 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6716 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
6717 #endif /* IXGBE_FCOE */
6718 .ndo_set_features
= ixgbe_set_features
,
6719 .ndo_fix_features
= ixgbe_fix_features
,
6722 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6723 const struct ixgbe_info
*ii
)
6725 #ifdef CONFIG_PCI_IOV
6726 struct ixgbe_hw
*hw
= &adapter
->hw
;
6728 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6731 /* The 82599 supports up to 64 VFs per physical function
6732 * but this implementation limits allocation to 63 so that
6733 * basic networking resources are still available to the
6736 adapter
->num_vfs
= (max_vfs
> 63) ? 63 : max_vfs
;
6737 ixgbe_enable_sriov(adapter
, ii
);
6738 #endif /* CONFIG_PCI_IOV */
6742 * ixgbe_probe - Device Initialization Routine
6743 * @pdev: PCI device information struct
6744 * @ent: entry in ixgbe_pci_tbl
6746 * Returns 0 on success, negative on failure
6748 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6749 * The OS initialization, configuring of the adapter private structure,
6750 * and a hardware reset occur.
6752 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6753 const struct pci_device_id
*ent
)
6755 struct net_device
*netdev
;
6756 struct ixgbe_adapter
*adapter
= NULL
;
6757 struct ixgbe_hw
*hw
;
6758 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6759 static int cards_found
;
6760 int i
, err
, pci_using_dac
;
6761 u8 part_str
[IXGBE_PBANUM_LENGTH
];
6762 unsigned int indices
= num_possible_cpus();
6769 /* Catch broken hardware that put the wrong VF device ID in
6770 * the PCIe SR-IOV capability.
6772 if (pdev
->is_virtfn
) {
6773 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
6774 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
6778 err
= pci_enable_device_mem(pdev
);
6782 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6783 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
6786 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
6788 err
= dma_set_coherent_mask(&pdev
->dev
,
6792 "No usable DMA configuration, aborting\n");
6799 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
6800 IORESOURCE_MEM
), ixgbe_driver_name
);
6803 "pci_request_selected_regions failed 0x%x\n", err
);
6807 pci_enable_pcie_error_reporting(pdev
);
6809 pci_set_master(pdev
);
6810 pci_save_state(pdev
);
6812 #ifdef CONFIG_IXGBE_DCB
6813 indices
*= MAX_TRAFFIC_CLASS
;
6816 if (ii
->mac
== ixgbe_mac_82598EB
)
6817 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
6819 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
6822 indices
+= min_t(unsigned int, num_possible_cpus(),
6823 IXGBE_MAX_FCOE_INDICES
);
6825 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
6828 goto err_alloc_etherdev
;
6831 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
6833 adapter
= netdev_priv(netdev
);
6834 pci_set_drvdata(pdev
, adapter
);
6836 adapter
->netdev
= netdev
;
6837 adapter
->pdev
= pdev
;
6840 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
6842 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
6843 pci_resource_len(pdev
, 0));
6849 for (i
= 1; i
<= 5; i
++) {
6850 if (pci_resource_len(pdev
, i
) == 0)
6854 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
6855 ixgbe_set_ethtool_ops(netdev
);
6856 netdev
->watchdog_timeo
= 5 * HZ
;
6857 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
6859 adapter
->bd_number
= cards_found
;
6862 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
6863 hw
->mac
.type
= ii
->mac
;
6866 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
6867 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
6868 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6869 if (!(eec
& (1 << 8)))
6870 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
6873 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
6874 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
6875 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6876 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
6877 hw
->phy
.mdio
.mmds
= 0;
6878 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
6879 hw
->phy
.mdio
.dev
= netdev
;
6880 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
6881 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
6883 ii
->get_invariants(hw
);
6885 /* setup the private structure */
6886 err
= ixgbe_sw_init(adapter
);
6890 /* Make it possible the adapter to be woken up via WOL */
6891 switch (adapter
->hw
.mac
.type
) {
6892 case ixgbe_mac_82599EB
:
6893 case ixgbe_mac_X540
:
6894 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6901 * If there is a fan on this device and it has failed log the
6904 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
6905 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
6906 if (esdp
& IXGBE_ESDP_SDP1
)
6907 e_crit(probe
, "Fan has stopped, replace the adapter\n");
6910 if (allow_unsupported_sfp
)
6911 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
6913 /* reset_hw fills in the perm_addr as well */
6914 hw
->phy
.reset_if_overtemp
= true;
6915 err
= hw
->mac
.ops
.reset_hw(hw
);
6916 hw
->phy
.reset_if_overtemp
= false;
6917 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
6918 hw
->mac
.type
== ixgbe_mac_82598EB
) {
6920 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
6921 e_dev_err("failed to load because an unsupported SFP+ "
6922 "module type was detected.\n");
6923 e_dev_err("Reload the driver after installing a supported "
6927 e_dev_err("HW Init failed: %d\n", err
);
6931 ixgbe_probe_vf(adapter
, ii
);
6933 netdev
->features
= NETIF_F_SG
|
6936 NETIF_F_HW_VLAN_TX
|
6937 NETIF_F_HW_VLAN_RX
|
6938 NETIF_F_HW_VLAN_FILTER
|
6944 netdev
->hw_features
= netdev
->features
;
6946 switch (adapter
->hw
.mac
.type
) {
6947 case ixgbe_mac_82599EB
:
6948 case ixgbe_mac_X540
:
6949 netdev
->features
|= NETIF_F_SCTP_CSUM
;
6950 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
6957 netdev
->hw_features
|= NETIF_F_RXALL
;
6959 netdev
->vlan_features
|= NETIF_F_TSO
;
6960 netdev
->vlan_features
|= NETIF_F_TSO6
;
6961 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
6962 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
6963 netdev
->vlan_features
|= NETIF_F_SG
;
6965 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
6966 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
6968 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6969 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
6970 IXGBE_FLAG_DCB_ENABLED
);
6972 #ifdef CONFIG_IXGBE_DCB
6973 netdev
->dcbnl_ops
= &dcbnl_ops
;
6977 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6978 if (hw
->mac
.ops
.get_device_caps
) {
6979 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
6980 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
6981 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
6984 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
6985 netdev
->vlan_features
|= NETIF_F_FCOE_CRC
;
6986 netdev
->vlan_features
|= NETIF_F_FSO
;
6987 netdev
->vlan_features
|= NETIF_F_FCOE_MTU
;
6989 #endif /* IXGBE_FCOE */
6990 if (pci_using_dac
) {
6991 netdev
->features
|= NETIF_F_HIGHDMA
;
6992 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
6995 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
6996 netdev
->hw_features
|= NETIF_F_LRO
;
6997 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6998 netdev
->features
|= NETIF_F_LRO
;
7000 /* make sure the EEPROM is good */
7001 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
7002 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7007 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7008 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7010 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
7011 e_dev_err("invalid MAC address\n");
7016 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
7017 (unsigned long) adapter
);
7019 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
7020 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
7022 err
= ixgbe_init_interrupt_scheme(adapter
);
7026 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
7027 netdev
->hw_features
&= ~NETIF_F_RXHASH
;
7028 netdev
->features
&= ~NETIF_F_RXHASH
;
7031 /* WOL not supported for all but the following */
7033 switch (pdev
->device
) {
7034 case IXGBE_DEV_ID_82599_SFP
:
7035 /* Only these subdevice supports WOL */
7036 switch (pdev
->subsystem_device
) {
7037 case IXGBE_SUBDEV_ID_82599_560FLR
:
7038 /* only support first port */
7039 if (hw
->bus
.func
!= 0)
7041 case IXGBE_SUBDEV_ID_82599_SFP
:
7042 adapter
->wol
= IXGBE_WUFC_MAG
;
7046 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
7047 /* All except this subdevice support WOL */
7048 if (pdev
->subsystem_device
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
7049 adapter
->wol
= IXGBE_WUFC_MAG
;
7051 case IXGBE_DEV_ID_82599_KX4
:
7052 adapter
->wol
= IXGBE_WUFC_MAG
;
7054 case IXGBE_DEV_ID_X540T
:
7055 /* Check eeprom to see if it is enabled */
7056 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
7057 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
7059 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
7060 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
7061 (hw
->bus
.func
== 0)))
7062 adapter
->wol
= IXGBE_WUFC_MAG
;
7065 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
7067 /* save off EEPROM version number */
7068 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
7069 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
7071 /* pick up the PCI bus settings for reporting later */
7072 hw
->mac
.ops
.get_bus_info(hw
);
7074 /* print bus type/speed/width info */
7075 e_dev_info("(PCI Express:%s:%s) %pM\n",
7076 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0GT/s" :
7077 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5GT/s" :
7079 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
7080 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
7081 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
7085 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
7087 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
7088 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
7089 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7090 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
7093 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7094 hw
->mac
.type
, hw
->phy
.type
, part_str
);
7096 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
7097 e_dev_warn("PCI-Express bandwidth available for this card is "
7098 "not sufficient for optimal performance.\n");
7099 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7103 /* reset the hardware with the new settings */
7104 err
= hw
->mac
.ops
.start_hw(hw
);
7105 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
7106 /* We are running on a pre-production device, log a warning */
7107 e_dev_warn("This device is a pre-production adapter/LOM. "
7108 "Please be aware there may be issues associated "
7109 "with your hardware. If you are experiencing "
7110 "problems please contact your Intel or hardware "
7111 "representative who provided you with this "
7114 strcpy(netdev
->name
, "eth%d");
7115 err
= register_netdev(netdev
);
7119 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7120 if (hw
->mac
.ops
.disable_tx_laser
&&
7121 ((hw
->phy
.multispeed_fiber
) ||
7122 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
7123 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
7124 hw
->mac
.ops
.disable_tx_laser(hw
);
7126 /* carrier off reporting is important to ethtool even BEFORE open */
7127 netif_carrier_off(netdev
);
7129 #ifdef CONFIG_IXGBE_DCA
7130 if (dca_add_requester(&pdev
->dev
) == 0) {
7131 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
7132 ixgbe_setup_dca(adapter
);
7135 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7136 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
7137 for (i
= 0; i
< adapter
->num_vfs
; i
++)
7138 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
7141 /* firmware requires driver version to be 0xFFFFFFFF
7142 * since os does not support feature
7144 if (hw
->mac
.ops
.set_fw_drv_ver
)
7145 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
7148 /* add san mac addr to netdev */
7149 ixgbe_add_sanmac_netdev(netdev
);
7151 e_dev_info("%s\n", ixgbe_default_device_descr
);
7156 ixgbe_release_hw_control(adapter
);
7157 ixgbe_clear_interrupt_scheme(adapter
);
7159 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7160 ixgbe_disable_sriov(adapter
);
7161 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
7162 iounmap(hw
->hw_addr
);
7164 free_netdev(netdev
);
7166 pci_release_selected_regions(pdev
,
7167 pci_select_bars(pdev
, IORESOURCE_MEM
));
7170 pci_disable_device(pdev
);
7175 * ixgbe_remove - Device Removal Routine
7176 * @pdev: PCI device information struct
7178 * ixgbe_remove is called by the PCI subsystem to alert the driver
7179 * that it should release a PCI device. The could be caused by a
7180 * Hot-Plug event, or because the driver is going to be removed from
7183 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7185 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7186 struct net_device
*netdev
= adapter
->netdev
;
7188 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7189 cancel_work_sync(&adapter
->service_task
);
7191 #ifdef CONFIG_IXGBE_DCA
7192 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7193 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7194 dca_remove_requester(&pdev
->dev
);
7195 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7200 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7201 ixgbe_cleanup_fcoe(adapter
);
7203 #endif /* IXGBE_FCOE */
7205 /* remove the added san mac */
7206 ixgbe_del_sanmac_netdev(netdev
);
7208 if (netdev
->reg_state
== NETREG_REGISTERED
)
7209 unregister_netdev(netdev
);
7211 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7212 if (!(ixgbe_check_vf_assignment(adapter
)))
7213 ixgbe_disable_sriov(adapter
);
7215 e_dev_warn("Unloading driver while VFs are assigned "
7216 "- VFs will not be deallocated\n");
7219 ixgbe_clear_interrupt_scheme(adapter
);
7221 ixgbe_release_hw_control(adapter
);
7223 iounmap(adapter
->hw
.hw_addr
);
7224 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7227 e_dev_info("complete\n");
7229 free_netdev(netdev
);
7231 pci_disable_pcie_error_reporting(pdev
);
7233 pci_disable_device(pdev
);
7237 * ixgbe_io_error_detected - called when PCI error is detected
7238 * @pdev: Pointer to PCI device
7239 * @state: The current pci connection state
7241 * This function is called after a PCI bus error affecting
7242 * this device has been detected.
7244 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7245 pci_channel_state_t state
)
7247 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7248 struct net_device
*netdev
= adapter
->netdev
;
7250 #ifdef CONFIG_PCI_IOV
7251 struct pci_dev
*bdev
, *vfdev
;
7252 u32 dw0
, dw1
, dw2
, dw3
;
7254 u16 req_id
, pf_func
;
7256 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7257 adapter
->num_vfs
== 0)
7258 goto skip_bad_vf_detection
;
7260 bdev
= pdev
->bus
->self
;
7261 while (bdev
&& (bdev
->pcie_type
!= PCI_EXP_TYPE_ROOT_PORT
))
7262 bdev
= bdev
->bus
->self
;
7265 goto skip_bad_vf_detection
;
7267 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
7269 goto skip_bad_vf_detection
;
7271 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
, &dw0
);
7272 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 4, &dw1
);
7273 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 8, &dw2
);
7274 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 12, &dw3
);
7277 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7278 if (!(req_id
& 0x0080))
7279 goto skip_bad_vf_detection
;
7281 pf_func
= req_id
& 0x01;
7282 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
7283 unsigned int device_id
;
7285 vf
= (req_id
& 0x7F) >> 1;
7286 e_dev_err("VF %d has caused a PCIe error\n", vf
);
7287 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7288 "%8.8x\tdw3: %8.8x\n",
7289 dw0
, dw1
, dw2
, dw3
);
7290 switch (adapter
->hw
.mac
.type
) {
7291 case ixgbe_mac_82599EB
:
7292 device_id
= IXGBE_82599_VF_DEVICE_ID
;
7294 case ixgbe_mac_X540
:
7295 device_id
= IXGBE_X540_VF_DEVICE_ID
;
7302 /* Find the pci device of the offending VF */
7303 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
, device_id
, NULL
);
7305 if (vfdev
->devfn
== (req_id
& 0xFF))
7307 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
,
7311 * There's a slim chance the VF could have been hot plugged,
7312 * so if it is no longer present we don't need to issue the
7313 * VFLR. Just clean up the AER in that case.
7316 e_dev_err("Issuing VFLR to VF %d\n", vf
);
7317 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
7320 pci_cleanup_aer_uncorrect_error_status(pdev
);
7324 * Even though the error may have occurred on the other port
7325 * we still need to increment the vf error reference count for
7326 * both ports because the I/O resume function will be called
7329 adapter
->vferr_refcount
++;
7331 return PCI_ERS_RESULT_RECOVERED
;
7333 skip_bad_vf_detection
:
7334 #endif /* CONFIG_PCI_IOV */
7335 netif_device_detach(netdev
);
7337 if (state
== pci_channel_io_perm_failure
)
7338 return PCI_ERS_RESULT_DISCONNECT
;
7340 if (netif_running(netdev
))
7341 ixgbe_down(adapter
);
7342 pci_disable_device(pdev
);
7344 /* Request a slot reset. */
7345 return PCI_ERS_RESULT_NEED_RESET
;
7349 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7350 * @pdev: Pointer to PCI device
7352 * Restart the card from scratch, as if from a cold-boot.
7354 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7356 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7357 pci_ers_result_t result
;
7360 if (pci_enable_device_mem(pdev
)) {
7361 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7362 result
= PCI_ERS_RESULT_DISCONNECT
;
7364 pci_set_master(pdev
);
7365 pci_restore_state(pdev
);
7366 pci_save_state(pdev
);
7368 pci_wake_from_d3(pdev
, false);
7370 ixgbe_reset(adapter
);
7371 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7372 result
= PCI_ERS_RESULT_RECOVERED
;
7375 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7377 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7378 "failed 0x%0x\n", err
);
7379 /* non-fatal, continue */
7386 * ixgbe_io_resume - called when traffic can start flowing again.
7387 * @pdev: Pointer to PCI device
7389 * This callback is called when the error recovery driver tells us that
7390 * its OK to resume normal operation.
7392 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7394 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7395 struct net_device
*netdev
= adapter
->netdev
;
7397 #ifdef CONFIG_PCI_IOV
7398 if (adapter
->vferr_refcount
) {
7399 e_info(drv
, "Resuming after VF err\n");
7400 adapter
->vferr_refcount
--;
7405 if (netif_running(netdev
))
7408 netif_device_attach(netdev
);
7411 static struct pci_error_handlers ixgbe_err_handler
= {
7412 .error_detected
= ixgbe_io_error_detected
,
7413 .slot_reset
= ixgbe_io_slot_reset
,
7414 .resume
= ixgbe_io_resume
,
7417 static struct pci_driver ixgbe_driver
= {
7418 .name
= ixgbe_driver_name
,
7419 .id_table
= ixgbe_pci_tbl
,
7420 .probe
= ixgbe_probe
,
7421 .remove
= __devexit_p(ixgbe_remove
),
7423 .suspend
= ixgbe_suspend
,
7424 .resume
= ixgbe_resume
,
7426 .shutdown
= ixgbe_shutdown
,
7427 .err_handler
= &ixgbe_err_handler
7431 * ixgbe_init_module - Driver Registration Routine
7433 * ixgbe_init_module is the first routine called when the driver is
7434 * loaded. All it does is register with the PCI subsystem.
7436 static int __init
ixgbe_init_module(void)
7439 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7440 pr_info("%s\n", ixgbe_copyright
);
7442 #ifdef CONFIG_IXGBE_DCA
7443 dca_register_notify(&dca_notifier
);
7446 ret
= pci_register_driver(&ixgbe_driver
);
7450 module_init(ixgbe_init_module
);
7453 * ixgbe_exit_module - Driver Exit Cleanup Routine
7455 * ixgbe_exit_module is called just before the driver is removed
7458 static void __exit
ixgbe_exit_module(void)
7460 #ifdef CONFIG_IXGBE_DCA
7461 dca_unregister_notify(&dca_notifier
);
7463 pci_unregister_driver(&ixgbe_driver
);
7464 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7467 #ifdef CONFIG_IXGBE_DCA
7468 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7473 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7474 __ixgbe_notify_dca
);
7476 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7479 #endif /* CONFIG_IXGBE_DCA */
7481 module_exit(ixgbe_exit_module
);