2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cq.h>
35 #include <linux/slab.h>
36 #include <linux/mlx4/qp.h>
37 #include <linux/skbuff.h>
38 #include <linux/if_ether.h>
39 #include <linux/if_vlan.h>
40 #include <linux/vmalloc.h>
44 static int mlx4_en_alloc_frags(struct mlx4_en_priv
*priv
,
45 struct mlx4_en_rx_desc
*rx_desc
,
46 struct mlx4_en_rx_alloc
*frags
,
47 struct mlx4_en_rx_alloc
*ring_alloc
)
49 struct mlx4_en_rx_alloc page_alloc
[MLX4_EN_MAX_RX_FRAGS
];
50 struct mlx4_en_frag_info
*frag_info
;
55 for (i
= 0; i
< priv
->num_frags
; i
++) {
56 frag_info
= &priv
->frag_info
[i
];
57 if (ring_alloc
[i
].offset
== frag_info
->last_offset
) {
58 page
= alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
62 dma
= dma_map_page(priv
->ddev
, page
, 0,
63 MLX4_EN_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
64 if (dma_mapping_error(priv
->ddev
, dma
)) {
68 page_alloc
[i
].page
= page
;
69 page_alloc
[i
].dma
= dma
;
70 page_alloc
[i
].offset
= frag_info
->frag_align
;
72 page_alloc
[i
].page
= ring_alloc
[i
].page
;
73 get_page(ring_alloc
[i
].page
);
74 page_alloc
[i
].dma
= ring_alloc
[i
].dma
;
75 page_alloc
[i
].offset
= ring_alloc
[i
].offset
+
76 frag_info
->frag_stride
;
80 for (i
= 0; i
< priv
->num_frags
; i
++) {
81 frags
[i
] = ring_alloc
[i
];
82 dma
= ring_alloc
[i
].dma
+ ring_alloc
[i
].offset
;
83 ring_alloc
[i
] = page_alloc
[i
];
84 rx_desc
->data
[i
].addr
= cpu_to_be64(dma
);
92 frag_info
= &priv
->frag_info
[i
];
93 if (ring_alloc
[i
].offset
== frag_info
->last_offset
)
94 dma_unmap_page(priv
->ddev
, page_alloc
[i
].dma
,
95 MLX4_EN_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
96 put_page(page_alloc
[i
].page
);
101 static void mlx4_en_free_frag(struct mlx4_en_priv
*priv
,
102 struct mlx4_en_rx_alloc
*frags
,
105 struct mlx4_en_frag_info
*frag_info
= &priv
->frag_info
[i
];
107 if (frags
[i
].offset
== frag_info
->last_offset
) {
108 dma_unmap_page(priv
->ddev
, frags
[i
].dma
, MLX4_EN_ALLOC_SIZE
,
112 put_page(frags
[i
].page
);
115 static int mlx4_en_init_allocator(struct mlx4_en_priv
*priv
,
116 struct mlx4_en_rx_ring
*ring
)
118 struct mlx4_en_rx_alloc
*page_alloc
;
121 for (i
= 0; i
< priv
->num_frags
; i
++) {
122 page_alloc
= &ring
->page_alloc
[i
];
123 page_alloc
->page
= alloc_pages(GFP_ATOMIC
| __GFP_COMP
,
124 MLX4_EN_ALLOC_ORDER
);
125 if (!page_alloc
->page
)
128 page_alloc
->dma
= dma_map_page(priv
->ddev
, page_alloc
->page
, 0,
129 MLX4_EN_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
130 if (dma_mapping_error(priv
->ddev
, page_alloc
->dma
)) {
131 put_page(page_alloc
->page
);
132 page_alloc
->page
= NULL
;
135 page_alloc
->offset
= priv
->frag_info
[i
].frag_align
;
136 en_dbg(DRV
, priv
, "Initialized allocator:%d with page:%p\n",
137 i
, page_alloc
->page
);
143 page_alloc
= &ring
->page_alloc
[i
];
144 dma_unmap_page(priv
->ddev
, page_alloc
->dma
,
145 MLX4_EN_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
146 put_page(page_alloc
->page
);
147 page_alloc
->page
= NULL
;
152 static void mlx4_en_destroy_allocator(struct mlx4_en_priv
*priv
,
153 struct mlx4_en_rx_ring
*ring
)
155 struct mlx4_en_rx_alloc
*page_alloc
;
158 for (i
= 0; i
< priv
->num_frags
; i
++) {
159 page_alloc
= &ring
->page_alloc
[i
];
160 en_dbg(DRV
, priv
, "Freeing allocator:%d count:%d\n",
161 i
, page_count(page_alloc
->page
));
163 dma_unmap_page(priv
->ddev
, page_alloc
->dma
,
164 MLX4_EN_ALLOC_SIZE
, PCI_DMA_FROMDEVICE
);
165 put_page(page_alloc
->page
);
166 page_alloc
->page
= NULL
;
170 static void mlx4_en_init_rx_desc(struct mlx4_en_priv
*priv
,
171 struct mlx4_en_rx_ring
*ring
, int index
)
173 struct mlx4_en_rx_desc
*rx_desc
= ring
->buf
+ ring
->stride
* index
;
177 /* Set size and memtype fields */
178 for (i
= 0; i
< priv
->num_frags
; i
++) {
179 rx_desc
->data
[i
].byte_count
=
180 cpu_to_be32(priv
->frag_info
[i
].frag_size
);
181 rx_desc
->data
[i
].lkey
= cpu_to_be32(priv
->mdev
->mr
.key
);
184 /* If the number of used fragments does not fill up the ring stride,
185 * remaining (unused) fragments must be padded with null address/size
186 * and a special memory key */
187 possible_frags
= (ring
->stride
- sizeof(struct mlx4_en_rx_desc
)) / DS_SIZE
;
188 for (i
= priv
->num_frags
; i
< possible_frags
; i
++) {
189 rx_desc
->data
[i
].byte_count
= 0;
190 rx_desc
->data
[i
].lkey
= cpu_to_be32(MLX4_EN_MEMTYPE_PAD
);
191 rx_desc
->data
[i
].addr
= 0;
195 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv
*priv
,
196 struct mlx4_en_rx_ring
*ring
, int index
)
198 struct mlx4_en_rx_desc
*rx_desc
= ring
->buf
+ (index
* ring
->stride
);
199 struct mlx4_en_rx_alloc
*frags
= ring
->rx_info
+
200 (index
<< priv
->log_rx_info
);
202 return mlx4_en_alloc_frags(priv
, rx_desc
, frags
, ring
->page_alloc
);
205 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring
*ring
)
207 *ring
->wqres
.db
.db
= cpu_to_be32(ring
->prod
& 0xffff);
210 static void mlx4_en_free_rx_desc(struct mlx4_en_priv
*priv
,
211 struct mlx4_en_rx_ring
*ring
,
214 struct mlx4_en_rx_alloc
*frags
;
217 frags
= ring
->rx_info
+ (index
<< priv
->log_rx_info
);
218 for (nr
= 0; nr
< priv
->num_frags
; nr
++) {
219 en_dbg(DRV
, priv
, "Freeing fragment:%d\n", nr
);
220 mlx4_en_free_frag(priv
, frags
, nr
);
224 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv
*priv
)
226 struct mlx4_en_rx_ring
*ring
;
231 for (buf_ind
= 0; buf_ind
< priv
->prof
->rx_ring_size
; buf_ind
++) {
232 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
233 ring
= &priv
->rx_ring
[ring_ind
];
235 if (mlx4_en_prepare_rx_desc(priv
, ring
,
236 ring
->actual_size
)) {
237 if (ring
->actual_size
< MLX4_EN_MIN_RX_SIZE
) {
238 en_err(priv
, "Failed to allocate "
239 "enough rx buffers\n");
242 new_size
= rounddown_pow_of_two(ring
->actual_size
);
243 en_warn(priv
, "Only %d buffers allocated "
244 "reducing ring size to %d",
245 ring
->actual_size
, new_size
);
256 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
257 ring
= &priv
->rx_ring
[ring_ind
];
258 while (ring
->actual_size
> new_size
) {
261 mlx4_en_free_rx_desc(priv
, ring
, ring
->actual_size
);
268 static void mlx4_en_free_rx_buf(struct mlx4_en_priv
*priv
,
269 struct mlx4_en_rx_ring
*ring
)
273 en_dbg(DRV
, priv
, "Freeing Rx buf - cons:%d prod:%d\n",
274 ring
->cons
, ring
->prod
);
276 /* Unmap and free Rx buffers */
277 BUG_ON((u32
) (ring
->prod
- ring
->cons
) > ring
->actual_size
);
278 while (ring
->cons
!= ring
->prod
) {
279 index
= ring
->cons
& ring
->size_mask
;
280 en_dbg(DRV
, priv
, "Processing descriptor:%d\n", index
);
281 mlx4_en_free_rx_desc(priv
, ring
, index
);
286 int mlx4_en_create_rx_ring(struct mlx4_en_priv
*priv
,
287 struct mlx4_en_rx_ring
*ring
, u32 size
, u16 stride
)
289 struct mlx4_en_dev
*mdev
= priv
->mdev
;
296 ring
->size_mask
= size
- 1;
297 ring
->stride
= stride
;
298 ring
->log_stride
= ffs(ring
->stride
) - 1;
299 ring
->buf_size
= ring
->size
* ring
->stride
+ TXBB_SIZE
;
301 tmp
= size
* roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS
*
302 sizeof(struct mlx4_en_rx_alloc
));
303 ring
->rx_info
= vmalloc(tmp
);
307 en_dbg(DRV
, priv
, "Allocated rx_info ring at addr:%p size:%d\n",
310 err
= mlx4_alloc_hwq_res(mdev
->dev
, &ring
->wqres
,
311 ring
->buf_size
, 2 * PAGE_SIZE
);
315 err
= mlx4_en_map_buffer(&ring
->wqres
.buf
);
317 en_err(priv
, "Failed to map RX buffer\n");
320 ring
->buf
= ring
->wqres
.buf
.direct
.buf
;
325 mlx4_free_hwq_res(mdev
->dev
, &ring
->wqres
, ring
->buf_size
);
327 vfree(ring
->rx_info
);
328 ring
->rx_info
= NULL
;
332 int mlx4_en_activate_rx_rings(struct mlx4_en_priv
*priv
)
334 struct mlx4_en_rx_ring
*ring
;
338 int stride
= roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc
) +
339 DS_SIZE
* priv
->num_frags
);
341 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
342 ring
= &priv
->rx_ring
[ring_ind
];
346 ring
->actual_size
= 0;
347 ring
->cqn
= priv
->rx_cq
[ring_ind
].mcq
.cqn
;
349 ring
->stride
= stride
;
350 if (ring
->stride
<= TXBB_SIZE
)
351 ring
->buf
+= TXBB_SIZE
;
353 ring
->log_stride
= ffs(ring
->stride
) - 1;
354 ring
->buf_size
= ring
->size
* ring
->stride
;
356 memset(ring
->buf
, 0, ring
->buf_size
);
357 mlx4_en_update_rx_prod_db(ring
);
359 /* Initialize all descriptors */
360 for (i
= 0; i
< ring
->size
; i
++)
361 mlx4_en_init_rx_desc(priv
, ring
, i
);
363 /* Initialize page allocators */
364 err
= mlx4_en_init_allocator(priv
, ring
);
366 en_err(priv
, "Failed initializing ring allocator\n");
367 if (ring
->stride
<= TXBB_SIZE
)
368 ring
->buf
-= TXBB_SIZE
;
373 err
= mlx4_en_fill_rx_buffers(priv
);
377 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++) {
378 ring
= &priv
->rx_ring
[ring_ind
];
380 ring
->size_mask
= ring
->actual_size
- 1;
381 mlx4_en_update_rx_prod_db(ring
);
387 for (ring_ind
= 0; ring_ind
< priv
->rx_ring_num
; ring_ind
++)
388 mlx4_en_free_rx_buf(priv
, &priv
->rx_ring
[ring_ind
]);
390 ring_ind
= priv
->rx_ring_num
- 1;
392 while (ring_ind
>= 0) {
393 if (priv
->rx_ring
[ring_ind
].stride
<= TXBB_SIZE
)
394 priv
->rx_ring
[ring_ind
].buf
-= TXBB_SIZE
;
395 mlx4_en_destroy_allocator(priv
, &priv
->rx_ring
[ring_ind
]);
401 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv
*priv
,
402 struct mlx4_en_rx_ring
*ring
, u32 size
, u16 stride
)
404 struct mlx4_en_dev
*mdev
= priv
->mdev
;
406 mlx4_en_unmap_buffer(&ring
->wqres
.buf
);
407 mlx4_free_hwq_res(mdev
->dev
, &ring
->wqres
, size
* stride
+ TXBB_SIZE
);
408 vfree(ring
->rx_info
);
409 ring
->rx_info
= NULL
;
410 #ifdef CONFIG_RFS_ACCEL
411 mlx4_en_cleanup_filters(priv
, ring
);
415 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv
*priv
,
416 struct mlx4_en_rx_ring
*ring
)
418 mlx4_en_free_rx_buf(priv
, ring
);
419 if (ring
->stride
<= TXBB_SIZE
)
420 ring
->buf
-= TXBB_SIZE
;
421 mlx4_en_destroy_allocator(priv
, ring
);
425 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv
*priv
,
426 struct mlx4_en_rx_desc
*rx_desc
,
427 struct mlx4_en_rx_alloc
*frags
,
431 struct skb_frag_struct
*skb_frags_rx
= skb_shinfo(skb
)->frags
;
432 struct mlx4_en_frag_info
*frag_info
;
436 /* Collect used fragments while replacing them in the HW descriptors */
437 for (nr
= 0; nr
< priv
->num_frags
; nr
++) {
438 frag_info
= &priv
->frag_info
[nr
];
439 if (length
<= frag_info
->frag_prefix_size
)
444 dma
= be64_to_cpu(rx_desc
->data
[nr
].addr
);
445 dma_sync_single_for_cpu(priv
->ddev
, dma
, frag_info
->frag_size
,
448 /* Save page reference in skb */
449 get_page(frags
[nr
].page
);
450 __skb_frag_set_page(&skb_frags_rx
[nr
], frags
[nr
].page
);
451 skb_frag_size_set(&skb_frags_rx
[nr
], frag_info
->frag_size
);
452 skb_frags_rx
[nr
].page_offset
= frags
[nr
].offset
;
453 skb
->truesize
+= frag_info
->frag_stride
;
455 /* Adjust size of last fragment to match actual length */
457 skb_frag_size_set(&skb_frags_rx
[nr
- 1],
458 length
- priv
->frag_info
[nr
- 1].frag_prefix_size
);
464 __skb_frag_unref(&skb_frags_rx
[nr
]);
470 static struct sk_buff
*mlx4_en_rx_skb(struct mlx4_en_priv
*priv
,
471 struct mlx4_en_rx_desc
*rx_desc
,
472 struct mlx4_en_rx_alloc
*frags
,
480 skb
= netdev_alloc_skb(priv
->dev
, SMALL_PACKET_SIZE
+ NET_IP_ALIGN
);
482 en_dbg(RX_ERR
, priv
, "Failed allocating skb\n");
485 skb_reserve(skb
, NET_IP_ALIGN
);
488 /* Get pointer to first fragment so we could copy the headers into the
489 * (linear part of the) skb */
490 va
= page_address(frags
[0].page
) + frags
[0].offset
;
492 if (length
<= SMALL_PACKET_SIZE
) {
493 /* We are copying all relevant data to the skb - temporarily
494 * sync buffers for the copy */
495 dma
= be64_to_cpu(rx_desc
->data
[0].addr
);
496 dma_sync_single_for_cpu(priv
->ddev
, dma
, length
,
498 skb_copy_to_linear_data(skb
, va
, length
);
501 /* Move relevant fragments to skb */
502 used_frags
= mlx4_en_complete_rx_desc(priv
, rx_desc
, frags
,
504 if (unlikely(!used_frags
)) {
508 skb_shinfo(skb
)->nr_frags
= used_frags
;
510 /* Copy headers into the skb linear buffer */
511 memcpy(skb
->data
, va
, HEADER_COPY_SIZE
);
512 skb
->tail
+= HEADER_COPY_SIZE
;
514 /* Skip headers in first fragment */
515 skb_shinfo(skb
)->frags
[0].page_offset
+= HEADER_COPY_SIZE
;
517 /* Adjust size of first fragment */
518 skb_frag_size_sub(&skb_shinfo(skb
)->frags
[0], HEADER_COPY_SIZE
);
519 skb
->data_len
= length
- HEADER_COPY_SIZE
;
524 static void validate_loopback(struct mlx4_en_priv
*priv
, struct sk_buff
*skb
)
527 int offset
= ETH_HLEN
;
529 for (i
= 0; i
< MLX4_LOOPBACK_TEST_PAYLOAD
; i
++, offset
++) {
530 if (*(skb
->data
+ offset
) != (unsigned char) (i
& 0xff))
534 priv
->loopback_ok
= 1;
537 dev_kfree_skb_any(skb
);
540 static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv
*priv
,
541 struct mlx4_en_rx_ring
*ring
)
543 int index
= ring
->prod
& ring
->size_mask
;
545 while ((u32
) (ring
->prod
- ring
->cons
) < ring
->actual_size
) {
546 if (mlx4_en_prepare_rx_desc(priv
, ring
, index
))
549 index
= ring
->prod
& ring
->size_mask
;
553 int mlx4_en_process_rx_cq(struct net_device
*dev
, struct mlx4_en_cq
*cq
, int budget
)
555 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
556 struct mlx4_cqe
*cqe
;
557 struct mlx4_en_rx_ring
*ring
= &priv
->rx_ring
[cq
->ring
];
558 struct mlx4_en_rx_alloc
*frags
;
559 struct mlx4_en_rx_desc
*rx_desc
;
566 int factor
= priv
->cqe_factor
;
571 /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
572 * descriptor offset can be deduced from the CQE index instead of
573 * reading 'cqe->index' */
574 index
= cq
->mcq
.cons_index
& ring
->size_mask
;
575 cqe
= &cq
->buf
[(index
<< factor
) + factor
];
577 /* Process all completed CQEs */
578 while (XNOR(cqe
->owner_sr_opcode
& MLX4_CQE_OWNER_MASK
,
579 cq
->mcq
.cons_index
& cq
->size
)) {
581 frags
= ring
->rx_info
+ (index
<< priv
->log_rx_info
);
582 rx_desc
= ring
->buf
+ (index
<< ring
->log_stride
);
585 * make sure we read the CQE after we read the ownership bit
589 /* Drop packet on bad receive or bad checksum */
590 if (unlikely((cqe
->owner_sr_opcode
& MLX4_CQE_OPCODE_MASK
) ==
591 MLX4_CQE_OPCODE_ERROR
)) {
592 en_err(priv
, "CQE completed in error - vendor "
593 "syndrom:%d syndrom:%d\n",
594 ((struct mlx4_err_cqe
*) cqe
)->vendor_err_syndrome
,
595 ((struct mlx4_err_cqe
*) cqe
)->syndrome
);
598 if (unlikely(cqe
->badfcs_enc
& MLX4_CQE_BAD_FCS
)) {
599 en_dbg(RX_ERR
, priv
, "Accepted frame with bad FCS\n");
603 /* Check if we need to drop the packet if SRIOV is not enabled
604 * and not performing the selftest or flb disabled
606 if (priv
->flags
& MLX4_EN_FLAG_RX_FILTER_NEEDED
) {
610 /* Get pointer to first fragment since we haven't
611 * skb yet and cast it to ethhdr struct
613 dma
= be64_to_cpu(rx_desc
->data
[0].addr
);
614 dma_sync_single_for_cpu(priv
->ddev
, dma
, sizeof(*ethh
),
616 ethh
= (struct ethhdr
*)(page_address(frags
[0].page
) +
619 /* Drop the packet, since HW loopback-ed it */
620 s_mac
= mlx4_en_mac_to_u64(ethh
->h_source
);
621 if (s_mac
== priv
->mac
)
626 * Packet is OK - process it.
628 length
= be32_to_cpu(cqe
->byte_cnt
);
629 length
-= ring
->fcs_del
;
630 ring
->bytes
+= length
;
633 if (likely(dev
->features
& NETIF_F_RXCSUM
)) {
634 if ((cqe
->status
& cpu_to_be16(MLX4_CQE_STATUS_IPOK
)) &&
635 (cqe
->checksum
== cpu_to_be16(0xffff))) {
637 /* This packet is eligible for GRO if it is:
638 * - DIX Ethernet (type interpretation)
640 * - without IP options
641 * - not an IP fragment */
642 if (dev
->features
& NETIF_F_GRO
) {
643 struct sk_buff
*gro_skb
= napi_get_frags(&cq
->napi
);
647 nr
= mlx4_en_complete_rx_desc(priv
,
648 rx_desc
, frags
, gro_skb
,
653 skb_shinfo(gro_skb
)->nr_frags
= nr
;
654 gro_skb
->len
= length
;
655 gro_skb
->data_len
= length
;
656 gro_skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
658 if (cqe
->vlan_my_qpn
&
659 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK
)) {
660 u16 vid
= be16_to_cpu(cqe
->sl_vid
);
662 __vlan_hwaccel_put_tag(gro_skb
, vid
);
665 if (dev
->features
& NETIF_F_RXHASH
)
666 gro_skb
->rxhash
= be32_to_cpu(cqe
->immed_rss_invalid
);
668 skb_record_rx_queue(gro_skb
, cq
->ring
);
669 napi_gro_frags(&cq
->napi
);
674 /* GRO not possible, complete processing here */
675 ip_summed
= CHECKSUM_UNNECESSARY
;
677 ip_summed
= CHECKSUM_NONE
;
681 ip_summed
= CHECKSUM_NONE
;
685 skb
= mlx4_en_rx_skb(priv
, rx_desc
, frags
, length
);
687 priv
->stats
.rx_dropped
++;
691 if (unlikely(priv
->validate_loopback
)) {
692 validate_loopback(priv
, skb
);
696 skb
->ip_summed
= ip_summed
;
697 skb
->protocol
= eth_type_trans(skb
, dev
);
698 skb_record_rx_queue(skb
, cq
->ring
);
700 if (dev
->features
& NETIF_F_RXHASH
)
701 skb
->rxhash
= be32_to_cpu(cqe
->immed_rss_invalid
);
703 if (be32_to_cpu(cqe
->vlan_my_qpn
) &
704 MLX4_CQE_VLAN_PRESENT_MASK
)
705 __vlan_hwaccel_put_tag(skb
, be16_to_cpu(cqe
->sl_vid
));
707 /* Push it up the stack */
708 netif_receive_skb(skb
);
711 for (nr
= 0; nr
< priv
->num_frags
; nr
++)
712 mlx4_en_free_frag(priv
, frags
, nr
);
714 ++cq
->mcq
.cons_index
;
715 index
= (cq
->mcq
.cons_index
) & ring
->size_mask
;
716 cqe
= &cq
->buf
[(index
<< factor
) + factor
];
717 if (++polled
== budget
)
722 AVG_PERF_COUNTER(priv
->pstats
.rx_coal_avg
, polled
);
723 mlx4_cq_set_ci(&cq
->mcq
);
724 wmb(); /* ensure HW sees CQ consumer before we post new buffers */
725 ring
->cons
= cq
->mcq
.cons_index
;
726 mlx4_en_refill_rx_buffers(priv
, ring
);
727 mlx4_en_update_rx_prod_db(ring
);
732 void mlx4_en_rx_irq(struct mlx4_cq
*mcq
)
734 struct mlx4_en_cq
*cq
= container_of(mcq
, struct mlx4_en_cq
, mcq
);
735 struct mlx4_en_priv
*priv
= netdev_priv(cq
->dev
);
738 napi_schedule(&cq
->napi
);
740 mlx4_en_arm_cq(priv
, cq
);
743 /* Rx CQ polling - called by NAPI */
744 int mlx4_en_poll_rx_cq(struct napi_struct
*napi
, int budget
)
746 struct mlx4_en_cq
*cq
= container_of(napi
, struct mlx4_en_cq
, napi
);
747 struct net_device
*dev
= cq
->dev
;
748 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
751 done
= mlx4_en_process_rx_cq(dev
, cq
, budget
);
753 /* If we used up all the quota - we're probably not done yet... */
755 INC_PERF_COUNTER(priv
->pstats
.napi_quota
);
759 mlx4_en_arm_cq(priv
, cq
);
765 /* Calculate the last offset position that accommodates a full fragment
766 * (assuming fagment size = stride-align) */
767 static int mlx4_en_last_alloc_offset(struct mlx4_en_priv
*priv
, u16 stride
, u16 align
)
769 u16 res
= MLX4_EN_ALLOC_SIZE
% stride
;
770 u16 offset
= MLX4_EN_ALLOC_SIZE
- stride
- res
+ align
;
772 en_dbg(DRV
, priv
, "Calculated last offset for stride:%d align:%d "
773 "res:%d offset:%d\n", stride
, align
, res
, offset
);
778 static int frag_sizes
[] = {
785 void mlx4_en_calc_rx_buf(struct net_device
*dev
)
787 struct mlx4_en_priv
*priv
= netdev_priv(dev
);
788 int eff_mtu
= dev
->mtu
+ ETH_HLEN
+ VLAN_HLEN
+ ETH_LLC_SNAP_SIZE
;
792 while (buf_size
< eff_mtu
) {
793 priv
->frag_info
[i
].frag_size
=
794 (eff_mtu
> buf_size
+ frag_sizes
[i
]) ?
795 frag_sizes
[i
] : eff_mtu
- buf_size
;
796 priv
->frag_info
[i
].frag_prefix_size
= buf_size
;
798 priv
->frag_info
[i
].frag_align
= NET_IP_ALIGN
;
799 priv
->frag_info
[i
].frag_stride
=
800 ALIGN(frag_sizes
[i
] + NET_IP_ALIGN
, SMP_CACHE_BYTES
);
802 priv
->frag_info
[i
].frag_align
= 0;
803 priv
->frag_info
[i
].frag_stride
=
804 ALIGN(frag_sizes
[i
], SMP_CACHE_BYTES
);
806 priv
->frag_info
[i
].last_offset
= mlx4_en_last_alloc_offset(
807 priv
, priv
->frag_info
[i
].frag_stride
,
808 priv
->frag_info
[i
].frag_align
);
809 buf_size
+= priv
->frag_info
[i
].frag_size
;
814 priv
->rx_skb_size
= eff_mtu
;
815 priv
->log_rx_info
= ROUNDUP_LOG2(i
* sizeof(struct mlx4_en_rx_alloc
));
817 en_dbg(DRV
, priv
, "Rx buffer scatter-list (effective-mtu:%d "
818 "num_frags:%d):\n", eff_mtu
, priv
->num_frags
);
819 for (i
= 0; i
< priv
->num_frags
; i
++) {
820 en_dbg(DRV
, priv
, " frag:%d - size:%d prefix:%d align:%d "
821 "stride:%d last_offset:%d\n", i
,
822 priv
->frag_info
[i
].frag_size
,
823 priv
->frag_info
[i
].frag_prefix_size
,
824 priv
->frag_info
[i
].frag_align
,
825 priv
->frag_info
[i
].frag_stride
,
826 priv
->frag_info
[i
].last_offset
);
830 /* RSS related functions */
832 static int mlx4_en_config_rss_qp(struct mlx4_en_priv
*priv
, int qpn
,
833 struct mlx4_en_rx_ring
*ring
,
834 enum mlx4_qp_state
*state
,
837 struct mlx4_en_dev
*mdev
= priv
->mdev
;
838 struct mlx4_qp_context
*context
;
841 context
= kmalloc(sizeof *context
, GFP_KERNEL
);
843 en_err(priv
, "Failed to allocate qp context\n");
847 err
= mlx4_qp_alloc(mdev
->dev
, qpn
, qp
);
849 en_err(priv
, "Failed to allocate qp #%x\n", qpn
);
852 qp
->event
= mlx4_en_sqp_event
;
854 memset(context
, 0, sizeof *context
);
855 mlx4_en_fill_qp_context(priv
, ring
->actual_size
, ring
->stride
, 0, 0,
856 qpn
, ring
->cqn
, -1, context
);
857 context
->db_rec_addr
= cpu_to_be64(ring
->wqres
.db
.dma
);
859 /* Cancel FCS removal if FW allows */
860 if (mdev
->dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_FCS_KEEP
) {
861 context
->param3
|= cpu_to_be32(1 << 29);
862 ring
->fcs_del
= ETH_FCS_LEN
;
866 err
= mlx4_qp_to_ready(mdev
->dev
, &ring
->wqres
.mtt
, context
, qp
, state
);
868 mlx4_qp_remove(mdev
->dev
, qp
);
869 mlx4_qp_free(mdev
->dev
, qp
);
871 mlx4_en_update_rx_prod_db(ring
);
877 int mlx4_en_create_drop_qp(struct mlx4_en_priv
*priv
)
882 err
= mlx4_qp_reserve_range(priv
->mdev
->dev
, 1, 1, &qpn
);
884 en_err(priv
, "Failed reserving drop qpn\n");
887 err
= mlx4_qp_alloc(priv
->mdev
->dev
, qpn
, &priv
->drop_qp
);
889 en_err(priv
, "Failed allocating drop qp\n");
890 mlx4_qp_release_range(priv
->mdev
->dev
, qpn
, 1);
897 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv
*priv
)
901 qpn
= priv
->drop_qp
.qpn
;
902 mlx4_qp_remove(priv
->mdev
->dev
, &priv
->drop_qp
);
903 mlx4_qp_free(priv
->mdev
->dev
, &priv
->drop_qp
);
904 mlx4_qp_release_range(priv
->mdev
->dev
, qpn
, 1);
907 /* Allocate rx qp's and configure them according to rss map */
908 int mlx4_en_config_rss_steer(struct mlx4_en_priv
*priv
)
910 struct mlx4_en_dev
*mdev
= priv
->mdev
;
911 struct mlx4_en_rss_map
*rss_map
= &priv
->rss_map
;
912 struct mlx4_qp_context context
;
913 struct mlx4_rss_context
*rss_context
;
916 u8 rss_mask
= (MLX4_RSS_IPV4
| MLX4_RSS_TCP_IPV4
| MLX4_RSS_IPV6
|
921 static const u32 rsskey
[10] = { 0xD181C62C, 0xF7F4DB5B, 0x1983A2FC,
922 0x943E1ADB, 0xD9389E6B, 0xD1039C2C, 0xA74499AD,
923 0x593D56D9, 0xF3253C06, 0x2ADC1FFC};
925 en_dbg(DRV
, priv
, "Configuring rss steering\n");
926 err
= mlx4_qp_reserve_range(mdev
->dev
, priv
->rx_ring_num
,
930 en_err(priv
, "Failed reserving %d qps\n", priv
->rx_ring_num
);
934 for (i
= 0; i
< priv
->rx_ring_num
; i
++) {
935 qpn
= rss_map
->base_qpn
+ i
;
936 err
= mlx4_en_config_rss_qp(priv
, qpn
, &priv
->rx_ring
[i
],
945 /* Configure RSS indirection qp */
946 err
= mlx4_qp_alloc(mdev
->dev
, priv
->base_qpn
, &rss_map
->indir_qp
);
948 en_err(priv
, "Failed to allocate RSS indirection QP\n");
951 rss_map
->indir_qp
.event
= mlx4_en_sqp_event
;
952 mlx4_en_fill_qp_context(priv
, 0, 0, 0, 1, priv
->base_qpn
,
953 priv
->rx_ring
[0].cqn
, -1, &context
);
955 if (!priv
->prof
->rss_rings
|| priv
->prof
->rss_rings
> priv
->rx_ring_num
)
956 rss_rings
= priv
->rx_ring_num
;
958 rss_rings
= priv
->prof
->rss_rings
;
960 ptr
= ((void *) &context
) + offsetof(struct mlx4_qp_context
, pri_path
)
961 + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH
;
963 rss_context
->base_qpn
= cpu_to_be32(ilog2(rss_rings
) << 24 |
964 (rss_map
->base_qpn
));
965 rss_context
->default_qpn
= cpu_to_be32(rss_map
->base_qpn
);
966 if (priv
->mdev
->profile
.udp_rss
) {
967 rss_mask
|= MLX4_RSS_UDP_IPV4
| MLX4_RSS_UDP_IPV6
;
968 rss_context
->base_qpn_udp
= rss_context
->default_qpn
;
970 rss_context
->flags
= rss_mask
;
971 rss_context
->hash_fn
= MLX4_RSS_HASH_TOP
;
972 for (i
= 0; i
< 10; i
++)
973 rss_context
->rss_key
[i
] = cpu_to_be32(rsskey
[i
]);
975 err
= mlx4_qp_to_ready(mdev
->dev
, &priv
->res
.mtt
, &context
,
976 &rss_map
->indir_qp
, &rss_map
->indir_state
);
983 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->indir_state
,
984 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->indir_qp
);
985 mlx4_qp_remove(mdev
->dev
, &rss_map
->indir_qp
);
986 mlx4_qp_free(mdev
->dev
, &rss_map
->indir_qp
);
988 for (i
= 0; i
< good_qps
; i
++) {
989 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->state
[i
],
990 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->qps
[i
]);
991 mlx4_qp_remove(mdev
->dev
, &rss_map
->qps
[i
]);
992 mlx4_qp_free(mdev
->dev
, &rss_map
->qps
[i
]);
994 mlx4_qp_release_range(mdev
->dev
, rss_map
->base_qpn
, priv
->rx_ring_num
);
998 void mlx4_en_release_rss_steer(struct mlx4_en_priv
*priv
)
1000 struct mlx4_en_dev
*mdev
= priv
->mdev
;
1001 struct mlx4_en_rss_map
*rss_map
= &priv
->rss_map
;
1004 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->indir_state
,
1005 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->indir_qp
);
1006 mlx4_qp_remove(mdev
->dev
, &rss_map
->indir_qp
);
1007 mlx4_qp_free(mdev
->dev
, &rss_map
->indir_qp
);
1009 for (i
= 0; i
< priv
->rx_ring_num
; i
++) {
1010 mlx4_qp_modify(mdev
->dev
, NULL
, rss_map
->state
[i
],
1011 MLX4_QP_STATE_RST
, NULL
, 0, 0, &rss_map
->qps
[i
]);
1012 mlx4_qp_remove(mdev
->dev
, &rss_map
->qps
[i
]);
1013 mlx4_qp_free(mdev
->dev
, &rss_map
->qps
[i
]);
1015 mlx4_qp_release_range(mdev
->dev
, rss_map
->base_qpn
, priv
->rx_ring_num
);