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Merge remote-tracking branch 'asoc/fix/sgtl5000' into asoc-linus
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic.h
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #ifndef _QLCNIC_H_
9 #define _QLCNIC_H_
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ip.h>
19 #include <linux/in.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23
24 #include <linux/ethtool.h>
25 #include <linux/mii.h>
26 #include <linux/timer.h>
27
28 #include <linux/vmalloc.h>
29
30 #include <linux/io.h>
31 #include <asm/byteorder.h>
32 #include <linux/bitops.h>
33 #include <linux/if_vlan.h>
34
35 #include "qlcnic_hdr.h"
36 #include "qlcnic_hw.h"
37 #include "qlcnic_83xx_hw.h"
38
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 2
41 #define _QLCNIC_LINUX_SUBVERSION 44
42 #define QLCNIC_LINUX_VERSIONID "5.2.44"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
46
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
51
52 /* version in image has weird encoding:
53 * 7:0 - major
54 * 15:8 - minor
55 * 31:16 - build (little endian)
56 */
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
59
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
65
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
76
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
79
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
81
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
84
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
88
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
93
94 /* Tx defines */
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
99 + MGMT_CMD_DESC_RESV)
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
101 /*
102 * Following are the states of the Phantom. Phantom will set them and
103 * Host will read to check if the fields are correct.
104 */
105 #define PHAN_INITIALIZE_FAILED 0xffff
106 #define PHAN_INITIALIZE_COMPLETE 0xff01
107
108 /* Host writes the following to notify that it has done the init-handshake */
109 #define PHAN_INITIALIZE_ACK 0xf00f
110 #define PHAN_PEG_RCV_INITIALIZED 0xff01
111
112 #define NUM_RCV_DESC_RINGS 3
113
114 #define RCV_RING_NORMAL 0
115 #define RCV_RING_JUMBO 1
116
117 #define MIN_CMD_DESCRIPTORS 64
118 #define MIN_RCV_DESCRIPTORS 64
119 #define MIN_JUMBO_DESCRIPTORS 32
120
121 #define MAX_CMD_DESCRIPTORS 1024
122 #define MAX_RCV_DESCRIPTORS_1G 4096
123 #define MAX_RCV_DESCRIPTORS_10G 8192
124 #define MAX_RCV_DESCRIPTORS_VF 2048
125 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
126 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
127
128 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
129 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
130 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
131 #define MAX_RDS_RINGS 2
132
133 #define get_next_index(index, length) \
134 (((index) + 1) & ((length) - 1))
135
136 /*
137 * Following data structures describe the descriptors that will be used.
138 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
139 * we are doing LSO (above the 1500 size packet) only.
140 */
141 struct cmd_desc_type0 {
142 u8 tcp_hdr_offset; /* For LSO only */
143 u8 ip_hdr_offset; /* For LSO only */
144 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
145 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
146
147 __le64 addr_buffer2;
148
149 __le16 reference_handle;
150 __le16 mss;
151 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
152 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
153 __le16 conn_id; /* IPSec offoad only */
154
155 __le64 addr_buffer3;
156 __le64 addr_buffer1;
157
158 __le16 buffer_length[4];
159
160 __le64 addr_buffer4;
161
162 u8 eth_addr[ETH_ALEN];
163 __le16 vlan_TCI;
164
165 } __attribute__ ((aligned(64)));
166
167 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
168 struct rcv_desc {
169 __le16 reference_handle;
170 __le16 reserved;
171 __le32 buffer_length; /* allocated buffer length (usually 2K) */
172 __le64 addr_buffer;
173 } __packed;
174
175 struct status_desc {
176 __le64 status_desc_data[2];
177 } __attribute__ ((aligned(16)));
178
179 /* UNIFIED ROMIMAGE */
180 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
181 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
182 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
183 #define QLCNIC_UNI_DIR_SECT_FW 0x7
184
185 /*Offsets */
186 #define QLCNIC_UNI_CHIP_REV_OFF 10
187 #define QLCNIC_UNI_FLAGS_OFF 11
188 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
189 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
190 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
191
192 struct uni_table_desc{
193 __le32 findex;
194 __le32 num_entries;
195 __le32 entry_size;
196 __le32 reserved[5];
197 };
198
199 struct uni_data_desc{
200 __le32 findex;
201 __le32 size;
202 __le32 reserved[5];
203 };
204
205 /* Flash Defines and Structures */
206 #define QLCNIC_FLT_LOCATION 0x3F1000
207 #define QLCNIC_FDT_LOCATION 0x3F0000
208 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
209 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
210 #define QLCNIC_BOOTLD_REGION 0X72
211 struct qlcnic_flt_header {
212 u16 version;
213 u16 len;
214 u16 checksum;
215 u16 reserved;
216 };
217
218 struct qlcnic_flt_entry {
219 u8 region;
220 u8 reserved0;
221 u8 attrib;
222 u8 reserved1;
223 u32 size;
224 u32 start_addr;
225 u32 end_addr;
226 };
227
228 /* Flash Descriptor Table */
229 struct qlcnic_fdt {
230 u32 valid;
231 u16 ver;
232 u16 len;
233 u16 cksum;
234 u16 unused;
235 u8 model[16];
236 u16 mfg_id;
237 u16 id;
238 u8 flag;
239 u8 erase_cmd;
240 u8 alt_erase_cmd;
241 u8 write_enable_cmd;
242 u8 write_enable_bits;
243 u8 write_statusreg_cmd;
244 u8 unprotected_sec_cmd;
245 u8 read_manuf_cmd;
246 u32 block_size;
247 u32 alt_block_size;
248 u32 flash_size;
249 u32 write_enable_data;
250 u8 readid_addr_len;
251 u8 write_disable_bits;
252 u8 read_dev_id_len;
253 u8 chip_erase_cmd;
254 u16 read_timeo;
255 u8 protected_sec_cmd;
256 u8 resvd[65];
257 };
258 /* Magic number to let user know flash is programmed */
259 #define QLCNIC_BDINFO_MAGIC 0x12345678
260
261 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
262 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
263 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
264 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
265 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
266 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
267 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
268 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
269 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
270 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
271 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
272 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
273 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
274 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
275
276 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
277
278 /* Flash memory map */
279 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
280 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
281 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
282 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
283
284 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
285 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
286 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
287 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
288
289 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
290 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
291
292 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
293 #define QLCNIC_UNIFIED_ROMIMAGE 0
294 #define QLCNIC_FLASH_ROMIMAGE 1
295 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
296
297 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
298 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
299
300 extern char qlcnic_driver_name[];
301
302 extern int qlcnic_use_msi;
303 extern int qlcnic_use_msi_x;
304 extern int qlcnic_auto_fw_reset;
305 extern int qlcnic_load_fw_file;
306
307 /* Number of status descriptors to handle per interrupt */
308 #define MAX_STATUS_HANDLE (64)
309
310 /*
311 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
312 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
313 */
314 struct qlcnic_skb_frag {
315 u64 dma;
316 u64 length;
317 };
318
319 /* Following defines are for the state of the buffers */
320 #define QLCNIC_BUFFER_FREE 0
321 #define QLCNIC_BUFFER_BUSY 1
322
323 /*
324 * There will be one qlcnic_buffer per skb packet. These will be
325 * used to save the dma info for pci_unmap_page()
326 */
327 struct qlcnic_cmd_buffer {
328 struct sk_buff *skb;
329 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
330 u32 frag_count;
331 };
332
333 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
334 struct qlcnic_rx_buffer {
335 u16 ref_handle;
336 struct sk_buff *skb;
337 struct list_head list;
338 u64 dma;
339 };
340
341 /* Board types */
342 #define QLCNIC_GBE 0x01
343 #define QLCNIC_XGBE 0x02
344
345 /*
346 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
347 * adjusted based on configured MTU.
348 */
349 #define QLCNIC_INTR_COAL_TYPE_RX 1
350 #define QLCNIC_INTR_COAL_TYPE_TX 2
351
352 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
353 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
354
355 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
356 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
357
358 #define QLCNIC_INTR_DEFAULT 0x04
359 #define QLCNIC_CONFIG_INTR_COALESCE 3
360 #define QLCNIC_DEV_INFO_SIZE 1
361
362 struct qlcnic_nic_intr_coalesce {
363 u8 type;
364 u8 sts_ring_mask;
365 u16 rx_packets;
366 u16 rx_time_us;
367 u16 tx_packets;
368 u16 tx_time_us;
369 u16 flag;
370 u32 timer_out;
371 };
372
373 struct qlcnic_dump_template_hdr {
374 u32 type;
375 u32 offset;
376 u32 size;
377 u32 cap_mask;
378 u32 num_entries;
379 u32 version;
380 u32 timestamp;
381 u32 checksum;
382 u32 drv_cap_mask;
383 u32 sys_info[3];
384 u32 saved_state[16];
385 u32 cap_sizes[8];
386 u32 ocm_wnd_reg[16];
387 u32 rsvd[0];
388 };
389
390 struct qlcnic_fw_dump {
391 u8 clr; /* flag to indicate if dump is cleared */
392 u8 enable; /* enable/disable dump */
393 u32 size; /* total size of the dump */
394 void *data; /* dump data area */
395 struct qlcnic_dump_template_hdr *tmpl_hdr;
396 dma_addr_t phys_addr;
397 void *dma_buffer;
398 bool use_pex_dma;
399 };
400
401 /*
402 * One hardware_context{} per adapter
403 * contains interrupt info as well shared hardware info.
404 */
405 struct qlcnic_hardware_context {
406 void __iomem *pci_base0;
407 void __iomem *ocm_win_crb;
408
409 unsigned long pci_len0;
410
411 rwlock_t crb_lock;
412 struct mutex mem_lock;
413
414 u8 revision_id;
415 u8 pci_func;
416 u8 linkup;
417 u8 loopback_state;
418 u8 beacon_state;
419 u8 has_link_events;
420 u8 fw_type;
421 u8 physical_port;
422 u8 reset_context;
423 u8 msix_supported;
424 u8 max_mac_filters;
425 u8 mc_enabled;
426 u8 max_mc_count;
427 u8 diag_test;
428 u8 num_msix;
429 u8 nic_mode;
430 char diag_cnt;
431
432 u16 max_uc_count;
433 u16 port_type;
434 u16 board_type;
435 u16 supported_type;
436
437 u16 link_speed;
438 u16 link_duplex;
439 u16 link_autoneg;
440 u16 module_type;
441
442 u16 op_mode;
443 u16 switch_mode;
444 u16 max_tx_ques;
445 u16 max_rx_ques;
446 u16 max_mtu;
447 u32 msg_enable;
448 u16 act_pci_func;
449 u16 max_pci_func;
450
451 u32 capabilities;
452 u32 extra_capability[3];
453 u32 temp;
454 u32 int_vec_bit;
455 u32 fw_hal_version;
456 u32 port_config;
457 struct qlcnic_hardware_ops *hw_ops;
458 struct qlcnic_nic_intr_coalesce coal;
459 struct qlcnic_fw_dump fw_dump;
460 struct qlcnic_fdt fdt;
461 struct qlc_83xx_reset reset;
462 struct qlc_83xx_idc idc;
463 struct qlc_83xx_fw_info fw_info;
464 struct qlcnic_intrpt_config *intr_tbl;
465 struct qlcnic_sriov *sriov;
466 u32 *reg_tbl;
467 u32 *ext_reg_tbl;
468 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
469 u32 mbox_reg[4];
470 spinlock_t mbx_lock;
471 };
472
473 struct qlcnic_adapter_stats {
474 u64 xmitcalled;
475 u64 xmitfinished;
476 u64 rxdropped;
477 u64 txdropped;
478 u64 csummed;
479 u64 rx_pkts;
480 u64 lro_pkts;
481 u64 rxbytes;
482 u64 txbytes;
483 u64 lrobytes;
484 u64 lso_frames;
485 u64 xmit_on;
486 u64 xmit_off;
487 u64 skb_alloc_failure;
488 u64 null_rxbuf;
489 u64 rx_dma_map_error;
490 u64 tx_dma_map_error;
491 u64 spurious_intr;
492 u64 mac_filter_limit_overrun;
493 };
494
495 /*
496 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
497 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
498 */
499 struct qlcnic_host_rds_ring {
500 void __iomem *crb_rcv_producer;
501 struct rcv_desc *desc_head;
502 struct qlcnic_rx_buffer *rx_buf_arr;
503 u32 num_desc;
504 u32 producer;
505 u32 dma_size;
506 u32 skb_size;
507 u32 flags;
508 struct list_head free_list;
509 spinlock_t lock;
510 dma_addr_t phys_addr;
511 } ____cacheline_internodealigned_in_smp;
512
513 struct qlcnic_host_sds_ring {
514 u32 consumer;
515 u32 num_desc;
516 void __iomem *crb_sts_consumer;
517
518 struct status_desc *desc_head;
519 struct qlcnic_adapter *adapter;
520 struct napi_struct napi;
521 struct list_head free_list[NUM_RCV_DESC_RINGS];
522
523 void __iomem *crb_intr_mask;
524 int irq;
525
526 dma_addr_t phys_addr;
527 char name[IFNAMSIZ + 12];
528 } ____cacheline_internodealigned_in_smp;
529
530 struct qlcnic_host_tx_ring {
531 int irq;
532 void __iomem *crb_intr_mask;
533 char name[IFNAMSIZ + 12];
534 u16 ctx_id;
535 u32 producer;
536 u32 sw_consumer;
537 u32 num_desc;
538 void __iomem *crb_cmd_producer;
539 struct cmd_desc_type0 *desc_head;
540 struct qlcnic_adapter *adapter;
541 struct napi_struct napi;
542 struct qlcnic_cmd_buffer *cmd_buf_arr;
543 __le32 *hw_consumer;
544
545 dma_addr_t phys_addr;
546 dma_addr_t hw_cons_phys_addr;
547 struct netdev_queue *txq;
548 } ____cacheline_internodealigned_in_smp;
549
550 /*
551 * Receive context. There is one such structure per instance of the
552 * receive processing. Any state information that is relevant to
553 * the receive, and is must be in this structure. The global data may be
554 * present elsewhere.
555 */
556 struct qlcnic_recv_context {
557 struct qlcnic_host_rds_ring *rds_rings;
558 struct qlcnic_host_sds_ring *sds_rings;
559 u32 state;
560 u16 context_id;
561 u16 virt_port;
562
563 };
564
565 /* HW context creation */
566
567 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
568
569 #define QLCNIC_CDRP_CMD_BIT 0x80000000
570
571 /*
572 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
573 * in the crb QLCNIC_CDRP_CRB_OFFSET.
574 */
575 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
576 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
577
578 #define QLCNIC_CDRP_RSP_OK 0x00000001
579 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
580 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
581
582 /*
583 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
584 * the crb QLCNIC_CDRP_CRB_OFFSET.
585 */
586 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
587
588 #define QLCNIC_RCODE_SUCCESS 0
589 #define QLCNIC_RCODE_INVALID_ARGS 6
590 #define QLCNIC_RCODE_NOT_SUPPORTED 9
591 #define QLCNIC_RCODE_NOT_PERMITTED 10
592 #define QLCNIC_RCODE_NOT_IMPL 15
593 #define QLCNIC_RCODE_INVALID 16
594 #define QLCNIC_RCODE_TIMEOUT 17
595 #define QLCNIC_DESTROY_CTX_RESET 0
596
597 /*
598 * Capabilities Announced
599 */
600 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
601 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
602 #define QLCNIC_CAP0_LSO (1 << 6)
603 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
604 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
605 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
606 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
607
608 /*
609 * Context state
610 */
611 #define QLCNIC_HOST_CTX_STATE_FREED 0
612 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
613
614 /*
615 * Rx context
616 */
617
618 struct qlcnic_hostrq_sds_ring {
619 __le64 host_phys_addr; /* Ring base addr */
620 __le32 ring_size; /* Ring entries */
621 __le16 msi_index;
622 __le16 rsvd; /* Padding */
623 } __packed;
624
625 struct qlcnic_hostrq_rds_ring {
626 __le64 host_phys_addr; /* Ring base addr */
627 __le64 buff_size; /* Packet buffer size */
628 __le32 ring_size; /* Ring entries */
629 __le32 ring_kind; /* Class of ring */
630 } __packed;
631
632 struct qlcnic_hostrq_rx_ctx {
633 __le64 host_rsp_dma_addr; /* Response dma'd here */
634 __le32 capabilities[4]; /* Flag bit vector */
635 __le32 host_int_crb_mode; /* Interrupt crb usage */
636 __le32 host_rds_crb_mode; /* RDS crb usage */
637 /* These ring offsets are relative to data[0] below */
638 __le32 rds_ring_offset; /* Offset to RDS config */
639 __le32 sds_ring_offset; /* Offset to SDS config */
640 __le16 num_rds_rings; /* Count of RDS rings */
641 __le16 num_sds_rings; /* Count of SDS rings */
642 __le16 valid_field_offset;
643 u8 txrx_sds_binding;
644 u8 msix_handler;
645 u8 reserved[128]; /* reserve space for future expansion*/
646 /* MUST BE 64-bit aligned.
647 The following is packed:
648 - N hostrq_rds_rings
649 - N hostrq_sds_rings */
650 char data[0];
651 } __packed;
652
653 struct qlcnic_cardrsp_rds_ring{
654 __le32 host_producer_crb; /* Crb to use */
655 __le32 rsvd1; /* Padding */
656 } __packed;
657
658 struct qlcnic_cardrsp_sds_ring {
659 __le32 host_consumer_crb; /* Crb to use */
660 __le32 interrupt_crb; /* Crb to use */
661 } __packed;
662
663 struct qlcnic_cardrsp_rx_ctx {
664 /* These ring offsets are relative to data[0] below */
665 __le32 rds_ring_offset; /* Offset to RDS config */
666 __le32 sds_ring_offset; /* Offset to SDS config */
667 __le32 host_ctx_state; /* Starting State */
668 __le32 num_fn_per_port; /* How many PCI fn share the port */
669 __le16 num_rds_rings; /* Count of RDS rings */
670 __le16 num_sds_rings; /* Count of SDS rings */
671 __le16 context_id; /* Handle for context */
672 u8 phys_port; /* Physical id of port */
673 u8 virt_port; /* Virtual/Logical id of port */
674 u8 reserved[128]; /* save space for future expansion */
675 /* MUST BE 64-bit aligned.
676 The following is packed:
677 - N cardrsp_rds_rings
678 - N cardrs_sds_rings */
679 char data[0];
680 } __packed;
681
682 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
683 (sizeof(HOSTRQ_RX) + \
684 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
685 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
686
687 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
688 (sizeof(CARDRSP_RX) + \
689 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
690 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
691
692 /*
693 * Tx context
694 */
695
696 struct qlcnic_hostrq_cds_ring {
697 __le64 host_phys_addr; /* Ring base addr */
698 __le32 ring_size; /* Ring entries */
699 __le32 rsvd; /* Padding */
700 } __packed;
701
702 struct qlcnic_hostrq_tx_ctx {
703 __le64 host_rsp_dma_addr; /* Response dma'd here */
704 __le64 cmd_cons_dma_addr; /* */
705 __le64 dummy_dma_addr; /* */
706 __le32 capabilities[4]; /* Flag bit vector */
707 __le32 host_int_crb_mode; /* Interrupt crb usage */
708 __le32 rsvd1; /* Padding */
709 __le16 rsvd2; /* Padding */
710 __le16 interrupt_ctl;
711 __le16 msi_index;
712 __le16 rsvd3; /* Padding */
713 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
714 u8 reserved[128]; /* future expansion */
715 } __packed;
716
717 struct qlcnic_cardrsp_cds_ring {
718 __le32 host_producer_crb; /* Crb to use */
719 __le32 interrupt_crb; /* Crb to use */
720 } __packed;
721
722 struct qlcnic_cardrsp_tx_ctx {
723 __le32 host_ctx_state; /* Starting state */
724 __le16 context_id; /* Handle for context */
725 u8 phys_port; /* Physical id of port */
726 u8 virt_port; /* Virtual/Logical id of port */
727 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
728 u8 reserved[128]; /* future expansion */
729 } __packed;
730
731 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
732 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
733
734 /* CRB */
735
736 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
737 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
738 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
739 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
740
741 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
742 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
743 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
744 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
745 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
746
747
748 /* MAC */
749
750 #define MC_COUNT_P3P 38
751
752 #define QLCNIC_MAC_NOOP 0
753 #define QLCNIC_MAC_ADD 1
754 #define QLCNIC_MAC_DEL 2
755 #define QLCNIC_MAC_VLAN_ADD 3
756 #define QLCNIC_MAC_VLAN_DEL 4
757
758 struct qlcnic_mac_list_s {
759 struct list_head list;
760 uint8_t mac_addr[ETH_ALEN+2];
761 };
762
763 /* MAC Learn */
764 #define NO_MAC_LEARN 0
765 #define DRV_MAC_LEARN 1
766 #define FDB_MAC_LEARN 2
767
768 #define QLCNIC_HOST_REQUEST 0x13
769 #define QLCNIC_REQUEST 0x14
770
771 #define QLCNIC_MAC_EVENT 0x1
772
773 #define QLCNIC_IP_UP 2
774 #define QLCNIC_IP_DOWN 3
775
776 #define QLCNIC_ILB_MODE 0x1
777 #define QLCNIC_ELB_MODE 0x2
778
779 #define QLCNIC_LINKEVENT 0x1
780 #define QLCNIC_LB_RESPONSE 0x2
781 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
782 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
783
784 /*
785 * Driver --> Firmware
786 */
787 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
788 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
789 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
790 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
791 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
792 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
793
794 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
795 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
796 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
797 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
798
799 /*
800 * Firmware --> Driver
801 */
802
803 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
804 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
805
806 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
807 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
808 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
809
810 #define QLCNIC_LRO_REQUEST_CLEANUP 4
811
812 /* Capabilites received */
813 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
814 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
815 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
816 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
817 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
818 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
819
820 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
821 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
822 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
823 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
824
825 /* module types */
826 #define LINKEVENT_MODULE_NOT_PRESENT 1
827 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
828 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
829 #define LINKEVENT_MODULE_OPTICAL_LRM 4
830 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
831 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
832 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
833 #define LINKEVENT_MODULE_TWINAX 8
834
835 #define LINKSPEED_10GBPS 10000
836 #define LINKSPEED_1GBPS 1000
837 #define LINKSPEED_100MBPS 100
838 #define LINKSPEED_10MBPS 10
839
840 #define LINKSPEED_ENCODED_10MBPS 0
841 #define LINKSPEED_ENCODED_100MBPS 1
842 #define LINKSPEED_ENCODED_1GBPS 2
843
844 #define LINKEVENT_AUTONEG_DISABLED 0
845 #define LINKEVENT_AUTONEG_ENABLED 1
846
847 #define LINKEVENT_HALF_DUPLEX 0
848 #define LINKEVENT_FULL_DUPLEX 1
849
850 #define LINKEVENT_LINKSPEED_MBPS 0
851 #define LINKEVENT_LINKSPEED_ENCODED 1
852
853 /* firmware response header:
854 * 63:58 - message type
855 * 57:56 - owner
856 * 55:53 - desc count
857 * 52:48 - reserved
858 * 47:40 - completion id
859 * 39:32 - opcode
860 * 31:16 - error code
861 * 15:00 - reserved
862 */
863 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
864 ((msg_hdr >> 32) & 0xFF)
865
866 struct qlcnic_fw_msg {
867 union {
868 struct {
869 u64 hdr;
870 u64 body[7];
871 };
872 u64 words[8];
873 };
874 };
875
876 struct qlcnic_nic_req {
877 __le64 qhdr;
878 __le64 req_hdr;
879 __le64 words[6];
880 } __packed;
881
882 struct qlcnic_mac_req {
883 u8 op;
884 u8 tag;
885 u8 mac_addr[6];
886 };
887
888 struct qlcnic_vlan_req {
889 __le16 vlan_id;
890 __le16 rsvd[3];
891 } __packed;
892
893 struct qlcnic_ipaddr {
894 __be32 ipv4;
895 __be32 ipv6[4];
896 };
897
898 #define QLCNIC_MSI_ENABLED 0x02
899 #define QLCNIC_MSIX_ENABLED 0x04
900 #define QLCNIC_LRO_ENABLED 0x01
901 #define QLCNIC_LRO_DISABLED 0x00
902 #define QLCNIC_BRIDGE_ENABLED 0X10
903 #define QLCNIC_DIAG_ENABLED 0x20
904 #define QLCNIC_ESWITCH_ENABLED 0x40
905 #define QLCNIC_ADAPTER_INITIALIZED 0x80
906 #define QLCNIC_TAGGING_ENABLED 0x100
907 #define QLCNIC_MACSPOOF 0x200
908 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
909 #define QLCNIC_PROMISC_DISABLED 0x800
910 #define QLCNIC_NEED_FLR 0x1000
911 #define QLCNIC_FW_RESET_OWNER 0x2000
912 #define QLCNIC_FW_HANG 0x4000
913 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
914 #define QLCNIC_TX_INTR_SHARED 0x10000
915 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
916 #define QLCNIC_IS_MSI_FAMILY(adapter) \
917 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
918 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
919 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
920
921 #define QLCNIC_BEACON_EANBLE 0xC
922 #define QLCNIC_BEACON_DISABLE 0xD
923
924 #define QLCNIC_DEF_NUM_STS_DESC_RINGS 4
925 #define QLCNIC_MSIX_TBL_SPACE 8192
926 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
927 #define QLCNIC_MSIX_TBL_PGSIZE 4096
928
929 #define QLCNIC_NETDEV_WEIGHT 128
930 #define QLCNIC_ADAPTER_UP_MAGIC 777
931
932 #define __QLCNIC_FW_ATTACHED 0
933 #define __QLCNIC_DEV_UP 1
934 #define __QLCNIC_RESETTING 2
935 #define __QLCNIC_START_FW 4
936 #define __QLCNIC_AER 5
937 #define __QLCNIC_DIAG_RES_ALLOC 6
938 #define __QLCNIC_LED_ENABLE 7
939 #define __QLCNIC_ELB_INPROGRESS 8
940 #define __QLCNIC_SRIOV_ENABLE 10
941 #define __QLCNIC_SRIOV_CAPABLE 11
942 #define __QLCNIC_MBX_POLL_ENABLE 12
943 #define __QLCNIC_DIAG_MODE 13
944
945 #define QLCNIC_INTERRUPT_TEST 1
946 #define QLCNIC_LOOPBACK_TEST 2
947 #define QLCNIC_LED_TEST 3
948
949 #define QLCNIC_FILTER_AGE 80
950 #define QLCNIC_READD_AGE 20
951 #define QLCNIC_LB_MAX_FILTERS 64
952 #define QLCNIC_LB_BUCKET_SIZE 32
953
954 /* QLCNIC Driver Error Code */
955 #define QLCNIC_FW_NOT_RESPOND 51
956 #define QLCNIC_TEST_IN_PROGRESS 52
957 #define QLCNIC_UNDEFINED_ERROR 53
958 #define QLCNIC_LB_CABLE_NOT_CONN 54
959 #define QLCNIC_ILB_MAX_RCV_LOOP 10
960
961 struct qlcnic_filter {
962 struct hlist_node fnode;
963 u8 faddr[ETH_ALEN];
964 u16 vlan_id;
965 unsigned long ftime;
966 };
967
968 struct qlcnic_filter_hash {
969 struct hlist_head *fhead;
970 u8 fnum;
971 u16 fmax;
972 u16 fbucket_size;
973 };
974
975 struct qlcnic_adapter {
976 struct qlcnic_hardware_context *ahw;
977 struct qlcnic_recv_context *recv_ctx;
978 struct qlcnic_host_tx_ring *tx_ring;
979 struct net_device *netdev;
980 struct pci_dev *pdev;
981
982 unsigned long state;
983 u32 flags;
984
985 int max_drv_tx_rings;
986 u16 num_txd;
987 u16 num_rxd;
988 u16 num_jumbo_rxd;
989 u16 max_rxd;
990 u16 max_jumbo_rxd;
991
992 u8 max_rds_rings;
993 u8 max_sds_rings;
994 u8 rx_csum;
995 u8 portnum;
996
997 u8 fw_wait_cnt;
998 u8 fw_fail_cnt;
999 u8 tx_timeo_cnt;
1000 u8 need_fw_reset;
1001 u8 reset_ctx_cnt;
1002
1003 u16 is_up;
1004 u16 rx_pvid;
1005 u16 tx_pvid;
1006
1007 u32 irq;
1008 u32 heartbeat;
1009
1010 u8 dev_state;
1011 u8 reset_ack_timeo;
1012 u8 dev_init_timeo;
1013
1014 u8 mac_addr[ETH_ALEN];
1015
1016 u64 dev_rst_time;
1017 bool drv_mac_learn;
1018 bool fdb_mac_learn;
1019 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1020 u8 flash_mfg_id;
1021 struct qlcnic_npar_info *npars;
1022 struct qlcnic_eswitch *eswitch;
1023 struct qlcnic_nic_template *nic_ops;
1024
1025 struct qlcnic_adapter_stats stats;
1026 struct list_head mac_list;
1027
1028 void __iomem *tgt_mask_reg;
1029 void __iomem *tgt_status_reg;
1030 void __iomem *crb_int_state_reg;
1031 void __iomem *isr_int_vec;
1032
1033 struct msix_entry *msix_entries;
1034 struct workqueue_struct *qlcnic_wq;
1035 struct delayed_work fw_work;
1036 struct delayed_work idc_aen_work;
1037 struct delayed_work mbx_poll_work;
1038
1039 struct qlcnic_filter_hash fhash;
1040 struct qlcnic_filter_hash rx_fhash;
1041 struct list_head vf_mc_list;
1042
1043 spinlock_t tx_clean_lock;
1044 spinlock_t mac_learn_lock;
1045 /* spinlock for catching rcv filters for eswitch traffic */
1046 spinlock_t rx_mac_learn_lock;
1047 u32 file_prd_off; /*File fw product offset*/
1048 u32 fw_version;
1049 u32 offload_flags;
1050 const struct firmware *fw;
1051 };
1052
1053 struct qlcnic_info_le {
1054 __le16 pci_func;
1055 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1056 __le16 phys_port;
1057 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1058
1059 __le32 capabilities;
1060 u8 max_mac_filters;
1061 u8 reserved1;
1062 __le16 max_mtu;
1063
1064 __le16 max_tx_ques;
1065 __le16 max_rx_ques;
1066 __le16 min_tx_bw;
1067 __le16 max_tx_bw;
1068 __le32 op_type;
1069 __le16 max_bw_reg_offset;
1070 __le16 max_linkspeed_reg_offset;
1071 __le32 capability1;
1072 __le32 capability2;
1073 __le32 capability3;
1074 __le16 max_tx_mac_filters;
1075 __le16 max_rx_mcast_mac_filters;
1076 __le16 max_rx_ucast_mac_filters;
1077 __le16 max_rx_ip_addr;
1078 __le16 max_rx_lro_flow;
1079 __le16 max_rx_status_rings;
1080 __le16 max_rx_buf_rings;
1081 __le16 max_tx_vlan_keys;
1082 u8 total_pf;
1083 u8 total_rss_engines;
1084 __le16 max_vports;
1085 __le16 linkstate_reg_offset;
1086 __le16 bit_offsets;
1087 __le16 max_local_ipv6_addrs;
1088 __le16 max_remote_ipv6_addrs;
1089 u8 reserved2[56];
1090 } __packed;
1091
1092 struct qlcnic_info {
1093 u16 pci_func;
1094 u16 op_mode;
1095 u16 phys_port;
1096 u16 switch_mode;
1097 u32 capabilities;
1098 u8 max_mac_filters;
1099 u16 max_mtu;
1100 u16 max_tx_ques;
1101 u16 max_rx_ques;
1102 u16 min_tx_bw;
1103 u16 max_tx_bw;
1104 u32 op_type;
1105 u16 max_bw_reg_offset;
1106 u16 max_linkspeed_reg_offset;
1107 u32 capability1;
1108 u32 capability2;
1109 u32 capability3;
1110 u16 max_tx_mac_filters;
1111 u16 max_rx_mcast_mac_filters;
1112 u16 max_rx_ucast_mac_filters;
1113 u16 max_rx_ip_addr;
1114 u16 max_rx_lro_flow;
1115 u16 max_rx_status_rings;
1116 u16 max_rx_buf_rings;
1117 u16 max_tx_vlan_keys;
1118 u8 total_pf;
1119 u8 total_rss_engines;
1120 u16 max_vports;
1121 u16 linkstate_reg_offset;
1122 u16 bit_offsets;
1123 u16 max_local_ipv6_addrs;
1124 u16 max_remote_ipv6_addrs;
1125 };
1126
1127 struct qlcnic_pci_info_le {
1128 __le16 id; /* pci function id */
1129 __le16 active; /* 1 = Enabled */
1130 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1131 __le16 default_port; /* default port number */
1132
1133 __le16 tx_min_bw; /* Multiple of 100mbpc */
1134 __le16 tx_max_bw;
1135 __le16 reserved1[2];
1136
1137 u8 mac[ETH_ALEN];
1138 __le16 func_count;
1139 u8 reserved2[104];
1140
1141 } __packed;
1142
1143 struct qlcnic_pci_info {
1144 u16 id;
1145 u16 active;
1146 u16 type;
1147 u16 default_port;
1148 u16 tx_min_bw;
1149 u16 tx_max_bw;
1150 u8 mac[ETH_ALEN];
1151 u16 func_count;
1152 };
1153
1154 struct qlcnic_npar_info {
1155 u16 pvid;
1156 u16 min_bw;
1157 u16 max_bw;
1158 u8 phy_port;
1159 u8 type;
1160 u8 active;
1161 u8 enable_pm;
1162 u8 dest_npar;
1163 u8 discard_tagged;
1164 u8 mac_override;
1165 u8 mac_anti_spoof;
1166 u8 promisc_mode;
1167 u8 offload_flags;
1168 u8 pci_func;
1169 };
1170
1171 struct qlcnic_eswitch {
1172 u8 port;
1173 u8 active_vports;
1174 u8 active_vlans;
1175 u8 active_ucast_filters;
1176 u8 max_ucast_filters;
1177 u8 max_active_vlans;
1178
1179 u32 flags;
1180 #define QLCNIC_SWITCH_ENABLE BIT_1
1181 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1182 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1183 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1184 };
1185
1186
1187 /* Return codes for Error handling */
1188 #define QL_STATUS_INVALID_PARAM -1
1189
1190 #define MAX_BW 100 /* % of link speed */
1191 #define MAX_VLAN_ID 4095
1192 #define MIN_VLAN_ID 2
1193 #define DEFAULT_MAC_LEARN 1
1194
1195 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1196 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1197
1198 struct qlcnic_pci_func_cfg {
1199 u16 func_type;
1200 u16 min_bw;
1201 u16 max_bw;
1202 u16 port_num;
1203 u8 pci_func;
1204 u8 func_state;
1205 u8 def_mac_addr[6];
1206 };
1207
1208 struct qlcnic_npar_func_cfg {
1209 u32 fw_capab;
1210 u16 port_num;
1211 u16 min_bw;
1212 u16 max_bw;
1213 u16 max_tx_queues;
1214 u16 max_rx_queues;
1215 u8 pci_func;
1216 u8 op_mode;
1217 };
1218
1219 struct qlcnic_pm_func_cfg {
1220 u8 pci_func;
1221 u8 action;
1222 u8 dest_npar;
1223 u8 reserved[5];
1224 };
1225
1226 struct qlcnic_esw_func_cfg {
1227 u16 vlan_id;
1228 u8 op_mode;
1229 u8 op_type;
1230 u8 pci_func;
1231 u8 host_vlan_tag;
1232 u8 promisc_mode;
1233 u8 discard_tagged;
1234 u8 mac_override;
1235 u8 mac_anti_spoof;
1236 u8 offload_flags;
1237 u8 reserved[5];
1238 };
1239
1240 #define QLCNIC_STATS_VERSION 1
1241 #define QLCNIC_STATS_PORT 1
1242 #define QLCNIC_STATS_ESWITCH 2
1243 #define QLCNIC_QUERY_RX_COUNTER 0
1244 #define QLCNIC_QUERY_TX_COUNTER 1
1245 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1246 #define QLCNIC_FILL_STATS(VAL1) \
1247 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1248 #define QLCNIC_MAC_STATS 1
1249 #define QLCNIC_ESW_STATS 2
1250
1251 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1252 do { \
1253 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1254 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1255 (VAL1) = (VAL2); \
1256 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1257 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1258 (VAL1) += (VAL2); \
1259 } while (0)
1260
1261 struct qlcnic_mac_statistics_le {
1262 __le64 mac_tx_frames;
1263 __le64 mac_tx_bytes;
1264 __le64 mac_tx_mcast_pkts;
1265 __le64 mac_tx_bcast_pkts;
1266 __le64 mac_tx_pause_cnt;
1267 __le64 mac_tx_ctrl_pkt;
1268 __le64 mac_tx_lt_64b_pkts;
1269 __le64 mac_tx_lt_127b_pkts;
1270 __le64 mac_tx_lt_255b_pkts;
1271 __le64 mac_tx_lt_511b_pkts;
1272 __le64 mac_tx_lt_1023b_pkts;
1273 __le64 mac_tx_lt_1518b_pkts;
1274 __le64 mac_tx_gt_1518b_pkts;
1275 __le64 rsvd1[3];
1276
1277 __le64 mac_rx_frames;
1278 __le64 mac_rx_bytes;
1279 __le64 mac_rx_mcast_pkts;
1280 __le64 mac_rx_bcast_pkts;
1281 __le64 mac_rx_pause_cnt;
1282 __le64 mac_rx_ctrl_pkt;
1283 __le64 mac_rx_lt_64b_pkts;
1284 __le64 mac_rx_lt_127b_pkts;
1285 __le64 mac_rx_lt_255b_pkts;
1286 __le64 mac_rx_lt_511b_pkts;
1287 __le64 mac_rx_lt_1023b_pkts;
1288 __le64 mac_rx_lt_1518b_pkts;
1289 __le64 mac_rx_gt_1518b_pkts;
1290 __le64 rsvd2[3];
1291
1292 __le64 mac_rx_length_error;
1293 __le64 mac_rx_length_small;
1294 __le64 mac_rx_length_large;
1295 __le64 mac_rx_jabber;
1296 __le64 mac_rx_dropped;
1297 __le64 mac_rx_crc_error;
1298 __le64 mac_align_error;
1299 } __packed;
1300
1301 struct qlcnic_mac_statistics {
1302 u64 mac_tx_frames;
1303 u64 mac_tx_bytes;
1304 u64 mac_tx_mcast_pkts;
1305 u64 mac_tx_bcast_pkts;
1306 u64 mac_tx_pause_cnt;
1307 u64 mac_tx_ctrl_pkt;
1308 u64 mac_tx_lt_64b_pkts;
1309 u64 mac_tx_lt_127b_pkts;
1310 u64 mac_tx_lt_255b_pkts;
1311 u64 mac_tx_lt_511b_pkts;
1312 u64 mac_tx_lt_1023b_pkts;
1313 u64 mac_tx_lt_1518b_pkts;
1314 u64 mac_tx_gt_1518b_pkts;
1315 u64 rsvd1[3];
1316 u64 mac_rx_frames;
1317 u64 mac_rx_bytes;
1318 u64 mac_rx_mcast_pkts;
1319 u64 mac_rx_bcast_pkts;
1320 u64 mac_rx_pause_cnt;
1321 u64 mac_rx_ctrl_pkt;
1322 u64 mac_rx_lt_64b_pkts;
1323 u64 mac_rx_lt_127b_pkts;
1324 u64 mac_rx_lt_255b_pkts;
1325 u64 mac_rx_lt_511b_pkts;
1326 u64 mac_rx_lt_1023b_pkts;
1327 u64 mac_rx_lt_1518b_pkts;
1328 u64 mac_rx_gt_1518b_pkts;
1329 u64 rsvd2[3];
1330 u64 mac_rx_length_error;
1331 u64 mac_rx_length_small;
1332 u64 mac_rx_length_large;
1333 u64 mac_rx_jabber;
1334 u64 mac_rx_dropped;
1335 u64 mac_rx_crc_error;
1336 u64 mac_align_error;
1337 };
1338
1339 struct qlcnic_esw_stats_le {
1340 __le16 context_id;
1341 __le16 version;
1342 __le16 size;
1343 __le16 unused;
1344 __le64 unicast_frames;
1345 __le64 multicast_frames;
1346 __le64 broadcast_frames;
1347 __le64 dropped_frames;
1348 __le64 errors;
1349 __le64 local_frames;
1350 __le64 numbytes;
1351 __le64 rsvd[3];
1352 } __packed;
1353
1354 struct __qlcnic_esw_statistics {
1355 u16 context_id;
1356 u16 version;
1357 u16 size;
1358 u16 unused;
1359 u64 unicast_frames;
1360 u64 multicast_frames;
1361 u64 broadcast_frames;
1362 u64 dropped_frames;
1363 u64 errors;
1364 u64 local_frames;
1365 u64 numbytes;
1366 u64 rsvd[3];
1367 };
1368
1369 struct qlcnic_esw_statistics {
1370 struct __qlcnic_esw_statistics rx;
1371 struct __qlcnic_esw_statistics tx;
1372 };
1373
1374 #define QLCNIC_DUMP_MASK_DEF 0x1f
1375 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1376 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1377 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1378 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1379 #define QLCNIC_SET_QUIESCENT 0xadd00010
1380 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1381
1382 struct _cdrp_cmd {
1383 u32 num;
1384 u32 *arg;
1385 };
1386
1387 struct qlcnic_cmd_args {
1388 struct _cdrp_cmd req;
1389 struct _cdrp_cmd rsp;
1390 int op_type;
1391 };
1392
1393 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1394 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1395 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1396 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1397 void qlcnic_pci_camqm_read_2M(struct qlcnic_adapter *, u64, u64 *);
1398 void qlcnic_pci_camqm_write_2M(struct qlcnic_adapter *, u64, u64);
1399
1400 #define ADDR_IN_RANGE(addr, low, high) \
1401 (((addr) < (high)) && ((addr) >= (low)))
1402
1403 #define QLCRD32(adapter, off, err) \
1404 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1405
1406 #define QLCWR32(adapter, off, val) \
1407 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1408
1409 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1410 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1411
1412 #define qlcnic_rom_lock(a) \
1413 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1414 #define qlcnic_rom_unlock(a) \
1415 qlcnic_pcie_sem_unlock((a), 2)
1416 #define qlcnic_phy_lock(a) \
1417 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1418 #define qlcnic_phy_unlock(a) \
1419 qlcnic_pcie_sem_unlock((a), 3)
1420 #define qlcnic_sw_lock(a) \
1421 qlcnic_pcie_sem_lock((a), 6, 0)
1422 #define qlcnic_sw_unlock(a) \
1423 qlcnic_pcie_sem_unlock((a), 6)
1424 #define crb_win_lock(a) \
1425 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1426 #define crb_win_unlock(a) \
1427 qlcnic_pcie_sem_unlock((a), 7)
1428
1429 #define __QLCNIC_MAX_LED_RATE 0xf
1430 #define __QLCNIC_MAX_LED_STATE 0x2
1431
1432 #define MAX_CTL_CHECK 1000
1433
1434 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
1435 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1436 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1437 int qlcnic_dump_fw(struct qlcnic_adapter *);
1438
1439 /* Functions from qlcnic_init.c */
1440 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1441 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1442 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1443 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1444 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1445 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1446 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1447 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1448
1449 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1450 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1451 u8 *bytes, size_t size);
1452 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1453 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1454
1455 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1456
1457 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1458 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1459
1460 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1461 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1462
1463 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1464 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1465 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter);
1466
1467 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1468 void qlcnic_watchdog_task(struct work_struct *work);
1469 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1470 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1471 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
1472 void qlcnic_set_multi(struct net_device *netdev);
1473 void __qlcnic_set_multi(struct net_device *, u16);
1474 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1475 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1476 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1477
1478 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1479 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1480 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1481 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1482 netdev_features_t features);
1483 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1484 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1485 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
1486 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1487
1488 /* Functions from qlcnic_ethtool.c */
1489 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1490 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1491 int qlcnic_loopback_test(struct net_device *, u8);
1492
1493 /* Functions from qlcnic_main.c */
1494 int qlcnic_reset_context(struct qlcnic_adapter *);
1495 void qlcnic_diag_free_res(struct net_device *netdev, int max_sds_rings);
1496 int qlcnic_diag_alloc_res(struct net_device *netdev, int test);
1497 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
1498 int qlcnic_set_max_rss(struct qlcnic_adapter *, u8, size_t);
1499 int qlcnic_validate_max_rss(struct qlcnic_adapter *, __u32);
1500 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1501 void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *);
1502 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1503 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1504
1505 /* eSwitch management functions */
1506 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1507 struct qlcnic_esw_func_cfg *);
1508
1509 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1510 struct qlcnic_esw_func_cfg *);
1511 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1512 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1513 struct __qlcnic_esw_statistics *);
1514 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1515 struct __qlcnic_esw_statistics *);
1516 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1517 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1518
1519 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1520
1521 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1522 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1523 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1524 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1525 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1526
1527 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1528 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1529 void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter);
1530 void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter);
1531 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1532 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1533 int qlcnic_82xx_get_settings(struct qlcnic_adapter *, struct ethtool_cmd *);
1534
1535 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1536 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1537 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1538 struct qlcnic_esw_func_cfg *);
1539 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1540 struct qlcnic_esw_func_cfg *);
1541
1542 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1543 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1544 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1545 void qlcnic_detach(struct qlcnic_adapter *);
1546 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1547 int qlcnic_attach(struct qlcnic_adapter *);
1548 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1549 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1550
1551 int qlcnic_check_temp(struct qlcnic_adapter *);
1552 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1553 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1554 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1555 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1556 void qlcnic_add_lb_filter(struct qlcnic_adapter *, struct sk_buff *, int, u16);
1557 int qlcnic_get_beacon_state(struct qlcnic_adapter *, u8 *);
1558 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1559 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1560 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1561 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1562 struct qlcnic_esw_func_cfg *);
1563 void qlcnic_sriov_vf_schedule_multi(struct net_device *);
1564 void qlcnic_vf_add_mc_list(struct net_device *, u16);
1565
1566 /*
1567 * QLOGIC Board information
1568 */
1569
1570 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1571 struct qlcnic_board_info {
1572 unsigned short vendor;
1573 unsigned short device;
1574 unsigned short sub_vendor;
1575 unsigned short sub_device;
1576 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1577 };
1578
1579 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1580 {
1581 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1582 return tx_ring->sw_consumer - tx_ring->producer;
1583 else
1584 return tx_ring->sw_consumer + tx_ring->num_desc -
1585 tx_ring->producer;
1586 }
1587
1588 struct qlcnic_nic_template {
1589 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1590 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1591 int (*start_firmware) (struct qlcnic_adapter *);
1592 int (*init_driver) (struct qlcnic_adapter *);
1593 void (*request_reset) (struct qlcnic_adapter *, u32);
1594 void (*cancel_idc_work) (struct qlcnic_adapter *);
1595 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1596 void (*napi_del)(struct qlcnic_adapter *);
1597 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1598 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1599 int (*shutdown)(struct pci_dev *);
1600 int (*resume)(struct qlcnic_adapter *);
1601 };
1602
1603 /* Adapter hardware abstraction */
1604 struct qlcnic_hardware_ops {
1605 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1606 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1607 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1608 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1609 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1610 int (*get_mac_address) (struct qlcnic_adapter *, u8 *);
1611 int (*setup_intr) (struct qlcnic_adapter *, u8);
1612 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1613 struct qlcnic_adapter *, u32);
1614 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1615 void (*get_func_no) (struct qlcnic_adapter *);
1616 int (*api_lock) (struct qlcnic_adapter *);
1617 void (*api_unlock) (struct qlcnic_adapter *);
1618 void (*add_sysfs) (struct qlcnic_adapter *);
1619 void (*remove_sysfs) (struct qlcnic_adapter *);
1620 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1621 int (*create_rx_ctx) (struct qlcnic_adapter *);
1622 int (*create_tx_ctx) (struct qlcnic_adapter *,
1623 struct qlcnic_host_tx_ring *, int);
1624 void (*del_rx_ctx) (struct qlcnic_adapter *);
1625 void (*del_tx_ctx) (struct qlcnic_adapter *,
1626 struct qlcnic_host_tx_ring *);
1627 int (*setup_link_event) (struct qlcnic_adapter *, int);
1628 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1629 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1630 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1631 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1632 void (*napi_enable) (struct qlcnic_adapter *);
1633 void (*napi_disable) (struct qlcnic_adapter *);
1634 void (*config_intr_coal) (struct qlcnic_adapter *);
1635 int (*config_rss) (struct qlcnic_adapter *, int);
1636 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1637 int (*config_loopback) (struct qlcnic_adapter *, u8);
1638 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1639 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1640 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1641 int (*get_board_info) (struct qlcnic_adapter *);
1642 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1643 void (*free_mac_list) (struct qlcnic_adapter *);
1644 };
1645
1646 extern struct qlcnic_nic_template qlcnic_vf_ops;
1647
1648 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1649 {
1650 return adapter->nic_ops->start_firmware(adapter);
1651 }
1652
1653 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1654 loff_t offset, size_t size)
1655 {
1656 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1657 }
1658
1659 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1660 loff_t offset, size_t size)
1661 {
1662 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1663 }
1664
1665 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1666 ulong off, u32 data)
1667 {
1668 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1669 }
1670
1671 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1672 u8 *mac)
1673 {
1674 return adapter->ahw->hw_ops->get_mac_address(adapter, mac);
1675 }
1676
1677 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter, u8 num_intr)
1678 {
1679 return adapter->ahw->hw_ops->setup_intr(adapter, num_intr);
1680 }
1681
1682 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1683 struct qlcnic_adapter *adapter, u32 arg)
1684 {
1685 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1686 }
1687
1688 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1689 struct qlcnic_cmd_args *cmd)
1690 {
1691 if (adapter->ahw->hw_ops->mbx_cmd)
1692 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1693
1694 return -EIO;
1695 }
1696
1697 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1698 {
1699 adapter->ahw->hw_ops->get_func_no(adapter);
1700 }
1701
1702 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1703 {
1704 return adapter->ahw->hw_ops->api_lock(adapter);
1705 }
1706
1707 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1708 {
1709 adapter->ahw->hw_ops->api_unlock(adapter);
1710 }
1711
1712 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1713 {
1714 if (adapter->ahw->hw_ops->add_sysfs)
1715 adapter->ahw->hw_ops->add_sysfs(adapter);
1716 }
1717
1718 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1719 {
1720 if (adapter->ahw->hw_ops->remove_sysfs)
1721 adapter->ahw->hw_ops->remove_sysfs(adapter);
1722 }
1723
1724 static inline void
1725 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1726 {
1727 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1728 }
1729
1730 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1731 {
1732 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1733 }
1734
1735 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1736 struct qlcnic_host_tx_ring *ptr,
1737 int ring)
1738 {
1739 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1740 }
1741
1742 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1743 {
1744 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1745 }
1746
1747 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1748 struct qlcnic_host_tx_ring *ptr)
1749 {
1750 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1751 }
1752
1753 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1754 int enable)
1755 {
1756 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1757 }
1758
1759 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1760 struct qlcnic_info *info, u8 id)
1761 {
1762 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1763 }
1764
1765 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1766 struct qlcnic_pci_info *info)
1767 {
1768 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1769 }
1770
1771 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1772 struct qlcnic_info *info)
1773 {
1774 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1775 }
1776
1777 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1778 u8 *addr, u16 id, u8 cmd)
1779 {
1780 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1781 }
1782
1783 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1784 struct net_device *netdev)
1785 {
1786 return adapter->nic_ops->napi_add(adapter, netdev);
1787 }
1788
1789 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1790 {
1791 adapter->nic_ops->napi_del(adapter);
1792 }
1793
1794 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1795 {
1796 adapter->ahw->hw_ops->napi_enable(adapter);
1797 }
1798
1799 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1800 {
1801 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1802
1803 return adapter->nic_ops->shutdown(pdev);
1804 }
1805
1806 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
1807 {
1808 return adapter->nic_ops->resume(adapter);
1809 }
1810
1811 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1812 {
1813 adapter->ahw->hw_ops->napi_disable(adapter);
1814 }
1815
1816 static inline void qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter)
1817 {
1818 adapter->ahw->hw_ops->config_intr_coal(adapter);
1819 }
1820
1821 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1822 {
1823 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1824 }
1825
1826 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1827 int enable)
1828 {
1829 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1830 }
1831
1832 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1833 {
1834 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1835 }
1836
1837 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1838 {
1839 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
1840 }
1841
1842 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1843 u32 mode)
1844 {
1845 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1846 }
1847
1848 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1849 u64 *addr, u16 id)
1850 {
1851 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1852 }
1853
1854 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1855 {
1856 return adapter->ahw->hw_ops->get_board_info(adapter);
1857 }
1858
1859 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
1860 {
1861 return adapter->ahw->hw_ops->free_mac_list(adapter);
1862 }
1863
1864 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
1865 {
1866 if (adapter->ahw->hw_ops->set_mac_filter_count)
1867 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
1868 }
1869
1870 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
1871 u32 key)
1872 {
1873 if (adapter->nic_ops->request_reset)
1874 adapter->nic_ops->request_reset(adapter, key);
1875 }
1876
1877 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
1878 {
1879 if (adapter->nic_ops->cancel_idc_work)
1880 adapter->nic_ops->cancel_idc_work(adapter);
1881 }
1882
1883 static inline irqreturn_t
1884 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
1885 {
1886 return adapter->nic_ops->clear_legacy_intr(adapter);
1887 }
1888
1889 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
1890 u32 rate)
1891 {
1892 return adapter->nic_ops->config_led(adapter, state, rate);
1893 }
1894
1895 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
1896 __be32 ip, int cmd)
1897 {
1898 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
1899 }
1900
1901 static inline void qlcnic_disable_int(struct qlcnic_host_sds_ring *sds_ring)
1902 {
1903 writel(0, sds_ring->crb_intr_mask);
1904 }
1905
1906 static inline void qlcnic_enable_int(struct qlcnic_host_sds_ring *sds_ring)
1907 {
1908 struct qlcnic_adapter *adapter = sds_ring->adapter;
1909
1910 writel(0x1, sds_ring->crb_intr_mask);
1911
1912 if (!QLCNIC_IS_MSI_FAMILY(adapter))
1913 writel(0xfbff, adapter->tgt_mask_reg);
1914 }
1915
1916 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
1917 {
1918 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
1919 }
1920
1921 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
1922 {
1923 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
1924 }
1925
1926 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
1927 {
1928 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
1929 }
1930
1931 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
1932 extern const struct ethtool_ops qlcnic_ethtool_ops;
1933 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
1934
1935 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
1936 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
1937 printk(KERN_INFO "%s: %s: " _fmt, \
1938 dev_name(&adapter->pdev->dev), \
1939 __func__, ##_args); \
1940 } while (0)
1941
1942 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
1943 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
1944 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
1945
1946 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
1947 {
1948 unsigned short device = adapter->pdev->device;
1949 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
1950 }
1951
1952 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
1953 {
1954 unsigned short device = adapter->pdev->device;
1955 bool status;
1956
1957 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
1958 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
1959
1960 return status;
1961 }
1962
1963 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
1964 {
1965 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
1966 }
1967
1968 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
1969 {
1970 unsigned short device = adapter->pdev->device;
1971
1972 return (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ? true : false;
1973 }
1974 #endif /* __QLCNIC_H_ */
Linux kernel - Deliverables
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