2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
10 static const struct qlcnic_mailbox_metadata qlcnic_mbx_tbl
[] = {
11 {QLCNIC_CMD_CREATE_RX_CTX
, 4, 1},
12 {QLCNIC_CMD_DESTROY_RX_CTX
, 2, 1},
13 {QLCNIC_CMD_CREATE_TX_CTX
, 4, 1},
14 {QLCNIC_CMD_DESTROY_TX_CTX
, 2, 1},
15 {QLCNIC_CMD_INTRPT_TEST
, 4, 1},
16 {QLCNIC_CMD_SET_MTU
, 4, 1},
17 {QLCNIC_CMD_READ_PHY
, 4, 2},
18 {QLCNIC_CMD_WRITE_PHY
, 5, 1},
19 {QLCNIC_CMD_READ_HW_REG
, 4, 1},
20 {QLCNIC_CMD_GET_FLOW_CTL
, 4, 2},
21 {QLCNIC_CMD_SET_FLOW_CTL
, 4, 1},
22 {QLCNIC_CMD_READ_MAX_MTU
, 4, 2},
23 {QLCNIC_CMD_READ_MAX_LRO
, 4, 2},
24 {QLCNIC_CMD_MAC_ADDRESS
, 4, 3},
25 {QLCNIC_CMD_GET_PCI_INFO
, 4, 1},
26 {QLCNIC_CMD_GET_NIC_INFO
, 4, 1},
27 {QLCNIC_CMD_SET_NIC_INFO
, 4, 1},
28 {QLCNIC_CMD_GET_ESWITCH_CAPABILITY
, 4, 3},
29 {QLCNIC_CMD_TOGGLE_ESWITCH
, 4, 1},
30 {QLCNIC_CMD_GET_ESWITCH_STATUS
, 4, 3},
31 {QLCNIC_CMD_SET_PORTMIRRORING
, 4, 1},
32 {QLCNIC_CMD_CONFIGURE_ESWITCH
, 4, 1},
33 {QLCNIC_CMD_GET_MAC_STATS
, 4, 1},
34 {QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG
, 4, 3},
35 {QLCNIC_CMD_GET_ESWITCH_STATS
, 5, 1},
36 {QLCNIC_CMD_CONFIG_PORT
, 4, 1},
37 {QLCNIC_CMD_TEMP_SIZE
, 4, 4},
38 {QLCNIC_CMD_GET_TEMP_HDR
, 4, 1},
39 {QLCNIC_CMD_82XX_SET_DRV_VER
, 4, 1},
40 {QLCNIC_CMD_GET_LED_STATUS
, 4, 2},
43 static inline u32
qlcnic_get_cmd_signature(struct qlcnic_hardware_context
*ahw
)
45 return (ahw
->pci_func
& 0xff) | ((ahw
->fw_hal_version
& 0xff) << 8) |
49 /* Allocate mailbox registers */
50 int qlcnic_82xx_alloc_mbx_args(struct qlcnic_cmd_args
*mbx
,
51 struct qlcnic_adapter
*adapter
, u32 type
)
54 const struct qlcnic_mailbox_metadata
*mbx_tbl
;
56 mbx_tbl
= qlcnic_mbx_tbl
;
57 size
= ARRAY_SIZE(qlcnic_mbx_tbl
);
58 for (i
= 0; i
< size
; i
++) {
59 if (type
== mbx_tbl
[i
].cmd
) {
60 mbx
->req
.num
= mbx_tbl
[i
].in_args
;
61 mbx
->rsp
.num
= mbx_tbl
[i
].out_args
;
62 mbx
->req
.arg
= kcalloc(mbx
->req
.num
,
63 sizeof(u32
), GFP_ATOMIC
);
66 mbx
->rsp
.arg
= kcalloc(mbx
->rsp
.num
,
67 sizeof(u32
), GFP_ATOMIC
);
73 memset(mbx
->req
.arg
, 0, sizeof(u32
) * mbx
->req
.num
);
74 memset(mbx
->rsp
.arg
, 0, sizeof(u32
) * mbx
->rsp
.num
);
75 mbx
->req
.arg
[0] = type
;
82 /* Free up mailbox registers */
83 void qlcnic_free_mbx_args(struct qlcnic_cmd_args
*cmd
)
91 static int qlcnic_is_valid_nic_func(struct qlcnic_adapter
*adapter
, u8 pci_func
)
95 for (i
= 0; i
< adapter
->ahw
->act_pci_func
; i
++) {
96 if (adapter
->npars
[i
].pci_func
== pci_func
)
104 qlcnic_poll_rsp(struct qlcnic_adapter
*adapter
)
107 int timeout
= 0, err
= 0;
110 /* give atleast 1ms for firmware to respond */
113 if (++timeout
> QLCNIC_OS_CRB_RETRY_COUNT
)
114 return QLCNIC_CDRP_RSP_TIMEOUT
;
116 rsp
= QLCRD32(adapter
, QLCNIC_CDRP_CRB_OFFSET
, &err
);
117 } while (!QLCNIC_CDRP_IS_RSP(rsp
));
122 int qlcnic_82xx_issue_cmd(struct qlcnic_adapter
*adapter
,
123 struct qlcnic_cmd_args
*cmd
)
128 struct pci_dev
*pdev
= adapter
->pdev
;
129 struct qlcnic_hardware_context
*ahw
= adapter
->ahw
;
132 signature
= qlcnic_get_cmd_signature(ahw
);
134 /* Acquire semaphore before accessing CRB */
135 if (qlcnic_api_lock(adapter
)) {
136 cmd
->rsp
.arg
[0] = QLCNIC_RCODE_TIMEOUT
;
137 return cmd
->rsp
.arg
[0];
140 QLCWR32(adapter
, QLCNIC_SIGN_CRB_OFFSET
, signature
);
141 for (i
= 1; i
< QLCNIC_CDRP_MAX_ARGS
; i
++)
142 QLCWR32(adapter
, QLCNIC_CDRP_ARG(i
), cmd
->req
.arg
[i
]);
143 QLCWR32(adapter
, QLCNIC_CDRP_CRB_OFFSET
,
144 QLCNIC_CDRP_FORM_CMD(cmd
->req
.arg
[0]));
145 rsp
= qlcnic_poll_rsp(adapter
);
147 if (rsp
== QLCNIC_CDRP_RSP_TIMEOUT
) {
148 dev_err(&pdev
->dev
, "card response timeout.\n");
149 cmd
->rsp
.arg
[0] = QLCNIC_RCODE_TIMEOUT
;
150 } else if (rsp
== QLCNIC_CDRP_RSP_FAIL
) {
151 cmd
->rsp
.arg
[0] = QLCRD32(adapter
, QLCNIC_CDRP_ARG(1), &err
);
152 switch (cmd
->rsp
.arg
[0]) {
153 case QLCNIC_RCODE_INVALID_ARGS
:
154 fmt
= "CDRP invalid args: [%d]\n";
156 case QLCNIC_RCODE_NOT_SUPPORTED
:
157 case QLCNIC_RCODE_NOT_IMPL
:
158 fmt
= "CDRP command not supported: [%d]\n";
160 case QLCNIC_RCODE_NOT_PERMITTED
:
161 fmt
= "CDRP requested action not permitted: [%d]\n";
163 case QLCNIC_RCODE_INVALID
:
164 fmt
= "CDRP invalid or unknown cmd received: [%d]\n";
166 case QLCNIC_RCODE_TIMEOUT
:
167 fmt
= "CDRP command timeout: [%d]\n";
170 fmt
= "CDRP command failed: [%d]\n";
173 dev_err(&pdev
->dev
, fmt
, cmd
->rsp
.arg
[0]);
174 } else if (rsp
== QLCNIC_CDRP_RSP_OK
)
175 cmd
->rsp
.arg
[0] = QLCNIC_RCODE_SUCCESS
;
177 for (i
= 1; i
< cmd
->rsp
.num
; i
++)
178 cmd
->rsp
.arg
[i
] = QLCRD32(adapter
, QLCNIC_CDRP_ARG(i
), &err
);
180 /* Release semaphore */
181 qlcnic_api_unlock(adapter
);
182 return cmd
->rsp
.arg
[0];
185 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter
*adapter
, u32 fw_cmd
)
187 struct qlcnic_cmd_args cmd
;
188 u32 arg1
, arg2
, arg3
;
192 memset(drv_string
, 0, sizeof(drv_string
));
193 snprintf(drv_string
, sizeof(drv_string
), "%d"".""%d"".""%d",
194 _QLCNIC_LINUX_MAJOR
, _QLCNIC_LINUX_MINOR
,
195 _QLCNIC_LINUX_SUBVERSION
);
197 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, fw_cmd
);
201 memcpy(&arg1
, drv_string
, sizeof(u32
));
202 memcpy(&arg2
, drv_string
+ 4, sizeof(u32
));
203 memcpy(&arg3
, drv_string
+ 8, sizeof(u32
));
205 cmd
.req
.arg
[1] = arg1
;
206 cmd
.req
.arg
[2] = arg2
;
207 cmd
.req
.arg
[3] = arg3
;
209 err
= qlcnic_issue_cmd(adapter
, &cmd
);
211 dev_info(&adapter
->pdev
->dev
,
212 "Failed to set driver version in firmware\n");
215 qlcnic_free_mbx_args(&cmd
);
220 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter
*adapter
, int mtu
)
223 struct qlcnic_cmd_args cmd
;
224 struct qlcnic_recv_context
*recv_ctx
= adapter
->recv_ctx
;
226 if (recv_ctx
->state
!= QLCNIC_HOST_CTX_STATE_ACTIVE
)
228 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_SET_MTU
);
232 cmd
.req
.arg
[1] = recv_ctx
->context_id
;
233 cmd
.req
.arg
[2] = mtu
;
235 err
= qlcnic_issue_cmd(adapter
, &cmd
);
237 dev_err(&adapter
->pdev
->dev
, "Failed to set mtu\n");
240 qlcnic_free_mbx_args(&cmd
);
244 int qlcnic_82xx_fw_cmd_create_rx_ctx(struct qlcnic_adapter
*adapter
)
247 struct qlcnic_hostrq_rx_ctx
*prq
;
248 struct qlcnic_cardrsp_rx_ctx
*prsp
;
249 struct qlcnic_hostrq_rds_ring
*prq_rds
;
250 struct qlcnic_hostrq_sds_ring
*prq_sds
;
251 struct qlcnic_cardrsp_rds_ring
*prsp_rds
;
252 struct qlcnic_cardrsp_sds_ring
*prsp_sds
;
253 struct qlcnic_host_rds_ring
*rds_ring
;
254 struct qlcnic_host_sds_ring
*sds_ring
;
255 struct qlcnic_cmd_args cmd
;
257 dma_addr_t hostrq_phys_addr
, cardrsp_phys_addr
;
260 u8 i
, nrds_rings
, nsds_rings
;
262 size_t rq_size
, rsp_size
;
263 u32 cap
, reg
, val
, reg2
;
266 struct qlcnic_recv_context
*recv_ctx
= adapter
->recv_ctx
;
268 nrds_rings
= adapter
->max_rds_rings
;
269 nsds_rings
= adapter
->max_sds_rings
;
272 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx
, nrds_rings
,
275 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx
, nrds_rings
,
278 addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, rq_size
,
279 &hostrq_phys_addr
, GFP_KERNEL
);
284 addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, rsp_size
,
285 &cardrsp_phys_addr
, GFP_KERNEL
);
292 prq
->host_rsp_dma_addr
= cpu_to_le64(cardrsp_phys_addr
);
294 cap
= (QLCNIC_CAP0_LEGACY_CONTEXT
| QLCNIC_CAP0_LEGACY_MN
295 | QLCNIC_CAP0_VALIDOFF
);
296 cap
|= (QLCNIC_CAP0_JUMBO_CONTIGUOUS
| QLCNIC_CAP0_LRO_CONTIGUOUS
);
298 temp_u16
= offsetof(struct qlcnic_hostrq_rx_ctx
, msix_handler
);
299 prq
->valid_field_offset
= cpu_to_le16(temp_u16
);
300 prq
->txrx_sds_binding
= nsds_rings
- 1;
302 prq
->capabilities
[0] = cpu_to_le32(cap
);
303 prq
->host_int_crb_mode
=
304 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED
);
305 prq
->host_rds_crb_mode
=
306 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE
);
308 prq
->num_rds_rings
= cpu_to_le16(nrds_rings
);
309 prq
->num_sds_rings
= cpu_to_le16(nsds_rings
);
310 prq
->rds_ring_offset
= 0;
312 val
= le32_to_cpu(prq
->rds_ring_offset
) +
313 (sizeof(struct qlcnic_hostrq_rds_ring
) * nrds_rings
);
314 prq
->sds_ring_offset
= cpu_to_le32(val
);
316 prq_rds
= (struct qlcnic_hostrq_rds_ring
*)(prq
->data
+
317 le32_to_cpu(prq
->rds_ring_offset
));
319 for (i
= 0; i
< nrds_rings
; i
++) {
321 rds_ring
= &recv_ctx
->rds_rings
[i
];
322 rds_ring
->producer
= 0;
324 prq_rds
[i
].host_phys_addr
= cpu_to_le64(rds_ring
->phys_addr
);
325 prq_rds
[i
].ring_size
= cpu_to_le32(rds_ring
->num_desc
);
326 prq_rds
[i
].ring_kind
= cpu_to_le32(i
);
327 prq_rds
[i
].buff_size
= cpu_to_le64(rds_ring
->dma_size
);
330 prq_sds
= (struct qlcnic_hostrq_sds_ring
*)(prq
->data
+
331 le32_to_cpu(prq
->sds_ring_offset
));
333 for (i
= 0; i
< nsds_rings
; i
++) {
335 sds_ring
= &recv_ctx
->sds_rings
[i
];
336 sds_ring
->consumer
= 0;
337 memset(sds_ring
->desc_head
, 0, STATUS_DESC_RINGSIZE(sds_ring
));
339 prq_sds
[i
].host_phys_addr
= cpu_to_le64(sds_ring
->phys_addr
);
340 prq_sds
[i
].ring_size
= cpu_to_le32(sds_ring
->num_desc
);
341 prq_sds
[i
].msi_index
= cpu_to_le16(i
);
344 phys_addr
= hostrq_phys_addr
;
345 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_CREATE_RX_CTX
);
349 cmd
.req
.arg
[1] = MSD(phys_addr
);
350 cmd
.req
.arg
[2] = LSD(phys_addr
);
351 cmd
.req
.arg
[3] = rq_size
;
352 err
= qlcnic_issue_cmd(adapter
, &cmd
);
354 dev_err(&adapter
->pdev
->dev
,
355 "Failed to create rx ctx in firmware%d\n", err
);
359 prsp_rds
= ((struct qlcnic_cardrsp_rds_ring
*)
360 &prsp
->data
[le32_to_cpu(prsp
->rds_ring_offset
)]);
362 for (i
= 0; i
< le16_to_cpu(prsp
->num_rds_rings
); i
++) {
363 rds_ring
= &recv_ctx
->rds_rings
[i
];
365 reg
= le32_to_cpu(prsp_rds
[i
].host_producer_crb
);
366 rds_ring
->crb_rcv_producer
= adapter
->ahw
->pci_base0
+ reg
;
369 prsp_sds
= ((struct qlcnic_cardrsp_sds_ring
*)
370 &prsp
->data
[le32_to_cpu(prsp
->sds_ring_offset
)]);
372 for (i
= 0; i
< le16_to_cpu(prsp
->num_sds_rings
); i
++) {
373 sds_ring
= &recv_ctx
->sds_rings
[i
];
375 reg
= le32_to_cpu(prsp_sds
[i
].host_consumer_crb
);
376 reg2
= le32_to_cpu(prsp_sds
[i
].interrupt_crb
);
378 sds_ring
->crb_sts_consumer
= adapter
->ahw
->pci_base0
+ reg
;
379 sds_ring
->crb_intr_mask
= adapter
->ahw
->pci_base0
+ reg2
;
382 recv_ctx
->state
= le32_to_cpu(prsp
->host_ctx_state
);
383 recv_ctx
->context_id
= le16_to_cpu(prsp
->context_id
);
384 recv_ctx
->virt_port
= prsp
->virt_port
;
386 qlcnic_free_mbx_args(&cmd
);
388 dma_free_coherent(&adapter
->pdev
->dev
, rsp_size
, prsp
,
391 dma_free_coherent(&adapter
->pdev
->dev
, rq_size
, prq
, hostrq_phys_addr
);
395 void qlcnic_82xx_fw_cmd_del_rx_ctx(struct qlcnic_adapter
*adapter
)
398 struct qlcnic_cmd_args cmd
;
399 struct qlcnic_recv_context
*recv_ctx
= adapter
->recv_ctx
;
401 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_DESTROY_RX_CTX
);
405 cmd
.req
.arg
[1] = recv_ctx
->context_id
;
406 err
= qlcnic_issue_cmd(adapter
, &cmd
);
408 dev_err(&adapter
->pdev
->dev
,
409 "Failed to destroy rx ctx in firmware\n");
411 recv_ctx
->state
= QLCNIC_HOST_CTX_STATE_FREED
;
412 qlcnic_free_mbx_args(&cmd
);
415 int qlcnic_82xx_fw_cmd_create_tx_ctx(struct qlcnic_adapter
*adapter
,
416 struct qlcnic_host_tx_ring
*tx_ring
,
419 struct qlcnic_hostrq_tx_ctx
*prq
;
420 struct qlcnic_hostrq_cds_ring
*prq_cds
;
421 struct qlcnic_cardrsp_tx_ctx
*prsp
;
422 void *rq_addr
, *rsp_addr
;
423 size_t rq_size
, rsp_size
;
425 struct qlcnic_cmd_args cmd
;
428 dma_addr_t rq_phys_addr
, rsp_phys_addr
;
430 /* reset host resources */
431 tx_ring
->producer
= 0;
432 tx_ring
->sw_consumer
= 0;
433 *(tx_ring
->hw_consumer
) = 0;
435 rq_size
= SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx
);
436 rq_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, rq_size
,
437 &rq_phys_addr
, GFP_KERNEL
| __GFP_ZERO
);
441 rsp_size
= SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx
);
442 rsp_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, rsp_size
,
443 &rsp_phys_addr
, GFP_KERNEL
| __GFP_ZERO
);
453 prq
->host_rsp_dma_addr
= cpu_to_le64(rsp_phys_addr
);
455 temp
= (QLCNIC_CAP0_LEGACY_CONTEXT
| QLCNIC_CAP0_LEGACY_MN
|
457 prq
->capabilities
[0] = cpu_to_le32(temp
);
459 prq
->host_int_crb_mode
=
460 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED
);
463 prq
->interrupt_ctl
= 0;
464 prq
->cmd_cons_dma_addr
= cpu_to_le64(tx_ring
->hw_cons_phys_addr
);
466 prq_cds
= &prq
->cds_ring
;
468 prq_cds
->host_phys_addr
= cpu_to_le64(tx_ring
->phys_addr
);
469 prq_cds
->ring_size
= cpu_to_le32(tx_ring
->num_desc
);
471 phys_addr
= rq_phys_addr
;
473 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_CREATE_TX_CTX
);
477 cmd
.req
.arg
[1] = MSD(phys_addr
);
478 cmd
.req
.arg
[2] = LSD(phys_addr
);
479 cmd
.req
.arg
[3] = rq_size
;
480 err
= qlcnic_issue_cmd(adapter
, &cmd
);
482 if (err
== QLCNIC_RCODE_SUCCESS
) {
483 temp
= le32_to_cpu(prsp
->cds_ring
.host_producer_crb
);
484 tx_ring
->crb_cmd_producer
= adapter
->ahw
->pci_base0
+ temp
;
485 tx_ring
->ctx_id
= le16_to_cpu(prsp
->context_id
);
487 dev_err(&adapter
->pdev
->dev
,
488 "Failed to create tx ctx in firmware%d\n", err
);
492 qlcnic_free_mbx_args(&cmd
);
495 dma_free_coherent(&adapter
->pdev
->dev
, rsp_size
, rsp_addr
,
498 dma_free_coherent(&adapter
->pdev
->dev
, rq_size
, rq_addr
, rq_phys_addr
);
503 void qlcnic_82xx_fw_cmd_del_tx_ctx(struct qlcnic_adapter
*adapter
,
504 struct qlcnic_host_tx_ring
*tx_ring
)
506 struct qlcnic_cmd_args cmd
;
509 ret
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_DESTROY_TX_CTX
);
513 cmd
.req
.arg
[1] = tx_ring
->ctx_id
;
514 if (qlcnic_issue_cmd(adapter
, &cmd
))
515 dev_err(&adapter
->pdev
->dev
,
516 "Failed to destroy tx ctx in firmware\n");
517 qlcnic_free_mbx_args(&cmd
);
521 qlcnic_fw_cmd_set_port(struct qlcnic_adapter
*adapter
, u32 config
)
524 struct qlcnic_cmd_args cmd
;
526 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_CONFIG_PORT
);
530 cmd
.req
.arg
[1] = config
;
531 err
= qlcnic_issue_cmd(adapter
, &cmd
);
532 qlcnic_free_mbx_args(&cmd
);
536 int qlcnic_alloc_hw_resources(struct qlcnic_adapter
*adapter
)
540 struct qlcnic_recv_context
*recv_ctx
;
541 struct qlcnic_host_rds_ring
*rds_ring
;
542 struct qlcnic_host_sds_ring
*sds_ring
;
543 struct qlcnic_host_tx_ring
*tx_ring
;
546 struct pci_dev
*pdev
= adapter
->pdev
;
548 recv_ctx
= adapter
->recv_ctx
;
550 for (ring
= 0; ring
< adapter
->max_drv_tx_rings
; ring
++) {
551 tx_ring
= &adapter
->tx_ring
[ring
];
552 ptr
= (__le32
*)dma_alloc_coherent(&pdev
->dev
, sizeof(u32
),
553 &tx_ring
->hw_cons_phys_addr
,
558 tx_ring
->hw_consumer
= ptr
;
560 addr
= dma_alloc_coherent(&pdev
->dev
, TX_DESC_RINGSIZE(tx_ring
),
568 tx_ring
->desc_head
= addr
;
571 for (ring
= 0; ring
< adapter
->max_rds_rings
; ring
++) {
572 rds_ring
= &recv_ctx
->rds_rings
[ring
];
573 addr
= dma_alloc_coherent(&adapter
->pdev
->dev
,
574 RCV_DESC_RINGSIZE(rds_ring
),
575 &rds_ring
->phys_addr
, GFP_KERNEL
);
580 rds_ring
->desc_head
= addr
;
584 for (ring
= 0; ring
< adapter
->max_sds_rings
; ring
++) {
585 sds_ring
= &recv_ctx
->sds_rings
[ring
];
587 addr
= dma_alloc_coherent(&adapter
->pdev
->dev
,
588 STATUS_DESC_RINGSIZE(sds_ring
),
589 &sds_ring
->phys_addr
, GFP_KERNEL
);
594 sds_ring
->desc_head
= addr
;
600 qlcnic_free_hw_resources(adapter
);
604 int qlcnic_fw_create_ctx(struct qlcnic_adapter
*dev
)
608 if (dev
->flags
& QLCNIC_NEED_FLR
) {
609 pci_reset_function(dev
->pdev
);
610 dev
->flags
&= ~QLCNIC_NEED_FLR
;
613 if (qlcnic_83xx_check(dev
) && (dev
->flags
& QLCNIC_MSIX_ENABLED
)) {
614 if (dev
->ahw
->diag_test
!= QLCNIC_LOOPBACK_TEST
) {
615 err
= qlcnic_83xx_config_intrpt(dev
, 1);
621 err
= qlcnic_fw_cmd_create_rx_ctx(dev
);
625 for (ring
= 0; ring
< dev
->max_drv_tx_rings
; ring
++) {
626 err
= qlcnic_fw_cmd_create_tx_ctx(dev
,
630 qlcnic_fw_cmd_del_rx_ctx(dev
);
634 for (i
= 0; i
< ring
; i
++)
635 qlcnic_fw_cmd_del_tx_ctx(dev
, &dev
->tx_ring
[i
]);
641 set_bit(__QLCNIC_FW_ATTACHED
, &dev
->state
);
645 if (qlcnic_83xx_check(dev
) && (dev
->flags
& QLCNIC_MSIX_ENABLED
)) {
646 if (dev
->ahw
->diag_test
!= QLCNIC_LOOPBACK_TEST
)
647 qlcnic_83xx_config_intrpt(dev
, 0);
652 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter
*adapter
)
656 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED
, &adapter
->state
)) {
657 qlcnic_fw_cmd_del_rx_ctx(adapter
);
658 for (ring
= 0; ring
< adapter
->max_drv_tx_rings
; ring
++)
659 qlcnic_fw_cmd_del_tx_ctx(adapter
,
660 &adapter
->tx_ring
[ring
]);
662 if (qlcnic_83xx_check(adapter
) &&
663 (adapter
->flags
& QLCNIC_MSIX_ENABLED
)) {
664 if (adapter
->ahw
->diag_test
!= QLCNIC_LOOPBACK_TEST
)
665 qlcnic_83xx_config_intrpt(adapter
, 0);
667 /* Allow dma queues to drain after context reset */
672 void qlcnic_free_hw_resources(struct qlcnic_adapter
*adapter
)
674 struct qlcnic_recv_context
*recv_ctx
;
675 struct qlcnic_host_rds_ring
*rds_ring
;
676 struct qlcnic_host_sds_ring
*sds_ring
;
677 struct qlcnic_host_tx_ring
*tx_ring
;
680 recv_ctx
= adapter
->recv_ctx
;
682 for (ring
= 0; ring
< adapter
->max_drv_tx_rings
; ring
++) {
683 tx_ring
= &adapter
->tx_ring
[ring
];
684 if (tx_ring
->hw_consumer
!= NULL
) {
685 dma_free_coherent(&adapter
->pdev
->dev
, sizeof(u32
),
686 tx_ring
->hw_consumer
,
687 tx_ring
->hw_cons_phys_addr
);
689 tx_ring
->hw_consumer
= NULL
;
692 if (tx_ring
->desc_head
!= NULL
) {
693 dma_free_coherent(&adapter
->pdev
->dev
,
694 TX_DESC_RINGSIZE(tx_ring
),
697 tx_ring
->desc_head
= NULL
;
701 for (ring
= 0; ring
< adapter
->max_rds_rings
; ring
++) {
702 rds_ring
= &recv_ctx
->rds_rings
[ring
];
704 if (rds_ring
->desc_head
!= NULL
) {
705 dma_free_coherent(&adapter
->pdev
->dev
,
706 RCV_DESC_RINGSIZE(rds_ring
),
708 rds_ring
->phys_addr
);
709 rds_ring
->desc_head
= NULL
;
713 for (ring
= 0; ring
< adapter
->max_sds_rings
; ring
++) {
714 sds_ring
= &recv_ctx
->sds_rings
[ring
];
716 if (sds_ring
->desc_head
!= NULL
) {
717 dma_free_coherent(&adapter
->pdev
->dev
,
718 STATUS_DESC_RINGSIZE(sds_ring
),
720 sds_ring
->phys_addr
);
721 sds_ring
->desc_head
= NULL
;
727 int qlcnic_82xx_get_mac_address(struct qlcnic_adapter
*adapter
, u8
*mac
)
730 struct qlcnic_cmd_args cmd
;
731 u32 mac_low
, mac_high
;
733 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_MAC_ADDRESS
);
737 cmd
.req
.arg
[1] = adapter
->ahw
->pci_func
| BIT_8
;
738 err
= qlcnic_issue_cmd(adapter
, &cmd
);
740 if (err
== QLCNIC_RCODE_SUCCESS
) {
741 mac_low
= cmd
.rsp
.arg
[1];
742 mac_high
= cmd
.rsp
.arg
[2];
744 for (i
= 0; i
< 2; i
++)
745 mac
[i
] = (u8
) (mac_high
>> ((1 - i
) * 8));
746 for (i
= 2; i
< 6; i
++)
747 mac
[i
] = (u8
) (mac_low
>> ((5 - i
) * 8));
749 dev_err(&adapter
->pdev
->dev
,
750 "Failed to get mac address%d\n", err
);
753 qlcnic_free_mbx_args(&cmd
);
757 /* Get info of a NIC partition */
758 int qlcnic_82xx_get_nic_info(struct qlcnic_adapter
*adapter
,
759 struct qlcnic_info
*npar_info
, u8 func_id
)
762 dma_addr_t nic_dma_t
;
763 const struct qlcnic_info_le
*nic_info
;
765 struct qlcnic_cmd_args cmd
;
766 size_t nic_size
= sizeof(struct qlcnic_info_le
);
768 nic_info_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, nic_size
,
769 &nic_dma_t
, GFP_KERNEL
| __GFP_ZERO
);
773 nic_info
= nic_info_addr
;
775 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_GET_NIC_INFO
);
779 cmd
.req
.arg
[1] = MSD(nic_dma_t
);
780 cmd
.req
.arg
[2] = LSD(nic_dma_t
);
781 cmd
.req
.arg
[3] = (func_id
<< 16 | nic_size
);
782 err
= qlcnic_issue_cmd(adapter
, &cmd
);
783 if (err
!= QLCNIC_RCODE_SUCCESS
) {
784 dev_err(&adapter
->pdev
->dev
,
785 "Failed to get nic info%d\n", err
);
788 npar_info
->pci_func
= le16_to_cpu(nic_info
->pci_func
);
789 npar_info
->op_mode
= le16_to_cpu(nic_info
->op_mode
);
790 npar_info
->min_tx_bw
= le16_to_cpu(nic_info
->min_tx_bw
);
791 npar_info
->max_tx_bw
= le16_to_cpu(nic_info
->max_tx_bw
);
792 npar_info
->phys_port
= le16_to_cpu(nic_info
->phys_port
);
793 npar_info
->switch_mode
= le16_to_cpu(nic_info
->switch_mode
);
794 npar_info
->max_tx_ques
= le16_to_cpu(nic_info
->max_tx_ques
);
795 npar_info
->max_rx_ques
= le16_to_cpu(nic_info
->max_rx_ques
);
796 npar_info
->capabilities
= le32_to_cpu(nic_info
->capabilities
);
797 npar_info
->max_mtu
= le16_to_cpu(nic_info
->max_mtu
);
800 qlcnic_free_mbx_args(&cmd
);
802 dma_free_coherent(&adapter
->pdev
->dev
, nic_size
, nic_info_addr
,
808 /* Configure a NIC partition */
809 int qlcnic_82xx_set_nic_info(struct qlcnic_adapter
*adapter
,
810 struct qlcnic_info
*nic
)
813 dma_addr_t nic_dma_t
;
815 struct qlcnic_cmd_args cmd
;
816 struct qlcnic_info_le
*nic_info
;
817 size_t nic_size
= sizeof(struct qlcnic_info_le
);
819 if (adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
)
822 nic_info_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, nic_size
,
823 &nic_dma_t
, GFP_KERNEL
| __GFP_ZERO
);
827 nic_info
= nic_info_addr
;
829 nic_info
->pci_func
= cpu_to_le16(nic
->pci_func
);
830 nic_info
->op_mode
= cpu_to_le16(nic
->op_mode
);
831 nic_info
->phys_port
= cpu_to_le16(nic
->phys_port
);
832 nic_info
->switch_mode
= cpu_to_le16(nic
->switch_mode
);
833 nic_info
->capabilities
= cpu_to_le32(nic
->capabilities
);
834 nic_info
->max_mac_filters
= nic
->max_mac_filters
;
835 nic_info
->max_tx_ques
= cpu_to_le16(nic
->max_tx_ques
);
836 nic_info
->max_rx_ques
= cpu_to_le16(nic
->max_rx_ques
);
837 nic_info
->min_tx_bw
= cpu_to_le16(nic
->min_tx_bw
);
838 nic_info
->max_tx_bw
= cpu_to_le16(nic
->max_tx_bw
);
840 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_SET_NIC_INFO
);
844 cmd
.req
.arg
[1] = MSD(nic_dma_t
);
845 cmd
.req
.arg
[2] = LSD(nic_dma_t
);
846 cmd
.req
.arg
[3] = ((nic
->pci_func
<< 16) | nic_size
);
847 err
= qlcnic_issue_cmd(adapter
, &cmd
);
849 if (err
!= QLCNIC_RCODE_SUCCESS
) {
850 dev_err(&adapter
->pdev
->dev
,
851 "Failed to set nic info%d\n", err
);
855 qlcnic_free_mbx_args(&cmd
);
857 dma_free_coherent(&adapter
->pdev
->dev
, nic_size
, nic_info_addr
,
863 /* Get PCI Info of a partition */
864 int qlcnic_82xx_get_pci_info(struct qlcnic_adapter
*adapter
,
865 struct qlcnic_pci_info
*pci_info
)
868 struct qlcnic_cmd_args cmd
;
869 dma_addr_t pci_info_dma_t
;
870 struct qlcnic_pci_info_le
*npar
;
872 size_t npar_size
= sizeof(struct qlcnic_pci_info_le
);
873 size_t pci_size
= npar_size
* QLCNIC_MAX_PCI_FUNC
;
875 pci_info_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, pci_size
,
877 GFP_KERNEL
| __GFP_ZERO
);
881 npar
= pci_info_addr
;
882 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_GET_PCI_INFO
);
886 cmd
.req
.arg
[1] = MSD(pci_info_dma_t
);
887 cmd
.req
.arg
[2] = LSD(pci_info_dma_t
);
888 cmd
.req
.arg
[3] = pci_size
;
889 err
= qlcnic_issue_cmd(adapter
, &cmd
);
891 adapter
->ahw
->act_pci_func
= 0;
892 if (err
== QLCNIC_RCODE_SUCCESS
) {
893 for (i
= 0; i
< QLCNIC_MAX_PCI_FUNC
; i
++, npar
++, pci_info
++) {
894 pci_info
->id
= le16_to_cpu(npar
->id
);
895 pci_info
->active
= le16_to_cpu(npar
->active
);
896 pci_info
->type
= le16_to_cpu(npar
->type
);
897 if (pci_info
->type
== QLCNIC_TYPE_NIC
)
898 adapter
->ahw
->act_pci_func
++;
899 pci_info
->default_port
=
900 le16_to_cpu(npar
->default_port
);
901 pci_info
->tx_min_bw
=
902 le16_to_cpu(npar
->tx_min_bw
);
903 pci_info
->tx_max_bw
=
904 le16_to_cpu(npar
->tx_max_bw
);
905 memcpy(pci_info
->mac
, npar
->mac
, ETH_ALEN
);
908 dev_err(&adapter
->pdev
->dev
,
909 "Failed to get PCI Info%d\n", err
);
913 qlcnic_free_mbx_args(&cmd
);
915 dma_free_coherent(&adapter
->pdev
->dev
, pci_size
, pci_info_addr
,
921 /* Configure eSwitch for port mirroring */
922 int qlcnic_config_port_mirroring(struct qlcnic_adapter
*adapter
, u8 id
,
923 u8 enable_mirroring
, u8 pci_func
)
925 struct device
*dev
= &adapter
->pdev
->dev
;
926 struct qlcnic_cmd_args cmd
;
930 if (adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
||
931 !(adapter
->eswitch
[id
].flags
& QLCNIC_SWITCH_ENABLE
))
934 arg1
= id
| (enable_mirroring
? BIT_4
: 0);
935 arg1
|= pci_func
<< 8;
937 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
,
938 QLCNIC_CMD_SET_PORTMIRRORING
);
942 cmd
.req
.arg
[1] = arg1
;
943 err
= qlcnic_issue_cmd(adapter
, &cmd
);
945 if (err
!= QLCNIC_RCODE_SUCCESS
)
946 dev_err(dev
, "Failed to configure port mirroring for vNIC function %d on eSwitch %d\n",
949 dev_info(dev
, "Configured port mirroring for vNIC function %d on eSwitch %d\n",
951 qlcnic_free_mbx_args(&cmd
);
956 int qlcnic_get_port_stats(struct qlcnic_adapter
*adapter
, const u8 func
,
957 const u8 rx_tx
, struct __qlcnic_esw_statistics
*esw_stats
) {
959 size_t stats_size
= sizeof(struct qlcnic_esw_stats_le
);
960 struct qlcnic_esw_stats_le
*stats
;
961 dma_addr_t stats_dma_t
;
964 struct qlcnic_cmd_args cmd
;
967 if (esw_stats
== NULL
)
970 if ((adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
) &&
971 (func
!= adapter
->ahw
->pci_func
)) {
972 dev_err(&adapter
->pdev
->dev
,
973 "Not privilege to query stats for func=%d", func
);
977 stats_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, stats_size
,
978 &stats_dma_t
, GFP_KERNEL
| __GFP_ZERO
);
982 arg1
= func
| QLCNIC_STATS_VERSION
<< 8 | QLCNIC_STATS_PORT
<< 12;
983 arg1
|= rx_tx
<< 15 | stats_size
<< 16;
985 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
,
986 QLCNIC_CMD_GET_ESWITCH_STATS
);
990 cmd
.req
.arg
[1] = arg1
;
991 cmd
.req
.arg
[2] = MSD(stats_dma_t
);
992 cmd
.req
.arg
[3] = LSD(stats_dma_t
);
993 err
= qlcnic_issue_cmd(adapter
, &cmd
);
997 esw_stats
->context_id
= le16_to_cpu(stats
->context_id
);
998 esw_stats
->version
= le16_to_cpu(stats
->version
);
999 esw_stats
->size
= le16_to_cpu(stats
->size
);
1000 esw_stats
->multicast_frames
=
1001 le64_to_cpu(stats
->multicast_frames
);
1002 esw_stats
->broadcast_frames
=
1003 le64_to_cpu(stats
->broadcast_frames
);
1004 esw_stats
->unicast_frames
= le64_to_cpu(stats
->unicast_frames
);
1005 esw_stats
->dropped_frames
= le64_to_cpu(stats
->dropped_frames
);
1006 esw_stats
->local_frames
= le64_to_cpu(stats
->local_frames
);
1007 esw_stats
->errors
= le64_to_cpu(stats
->errors
);
1008 esw_stats
->numbytes
= le64_to_cpu(stats
->numbytes
);
1011 qlcnic_free_mbx_args(&cmd
);
1013 dma_free_coherent(&adapter
->pdev
->dev
, stats_size
, stats_addr
,
1019 /* This routine will retrieve the MAC statistics from firmware */
1020 int qlcnic_get_mac_stats(struct qlcnic_adapter
*adapter
,
1021 struct qlcnic_mac_statistics
*mac_stats
)
1023 struct qlcnic_mac_statistics_le
*stats
;
1024 struct qlcnic_cmd_args cmd
;
1025 size_t stats_size
= sizeof(struct qlcnic_mac_statistics_le
);
1026 dma_addr_t stats_dma_t
;
1030 if (mac_stats
== NULL
)
1033 stats_addr
= dma_alloc_coherent(&adapter
->pdev
->dev
, stats_size
,
1034 &stats_dma_t
, GFP_KERNEL
| __GFP_ZERO
);
1038 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
, QLCNIC_CMD_GET_MAC_STATS
);
1042 cmd
.req
.arg
[1] = stats_size
<< 16;
1043 cmd
.req
.arg
[2] = MSD(stats_dma_t
);
1044 cmd
.req
.arg
[3] = LSD(stats_dma_t
);
1045 err
= qlcnic_issue_cmd(adapter
, &cmd
);
1048 mac_stats
->mac_tx_frames
= le64_to_cpu(stats
->mac_tx_frames
);
1049 mac_stats
->mac_tx_bytes
= le64_to_cpu(stats
->mac_tx_bytes
);
1050 mac_stats
->mac_tx_mcast_pkts
=
1051 le64_to_cpu(stats
->mac_tx_mcast_pkts
);
1052 mac_stats
->mac_tx_bcast_pkts
=
1053 le64_to_cpu(stats
->mac_tx_bcast_pkts
);
1054 mac_stats
->mac_rx_frames
= le64_to_cpu(stats
->mac_rx_frames
);
1055 mac_stats
->mac_rx_bytes
= le64_to_cpu(stats
->mac_rx_bytes
);
1056 mac_stats
->mac_rx_mcast_pkts
=
1057 le64_to_cpu(stats
->mac_rx_mcast_pkts
);
1058 mac_stats
->mac_rx_length_error
=
1059 le64_to_cpu(stats
->mac_rx_length_error
);
1060 mac_stats
->mac_rx_length_small
=
1061 le64_to_cpu(stats
->mac_rx_length_small
);
1062 mac_stats
->mac_rx_length_large
=
1063 le64_to_cpu(stats
->mac_rx_length_large
);
1064 mac_stats
->mac_rx_jabber
= le64_to_cpu(stats
->mac_rx_jabber
);
1065 mac_stats
->mac_rx_dropped
= le64_to_cpu(stats
->mac_rx_dropped
);
1066 mac_stats
->mac_rx_crc_error
= le64_to_cpu(stats
->mac_rx_crc_error
);
1068 dev_err(&adapter
->pdev
->dev
,
1069 "%s: Get mac stats failed, err=%d.\n", __func__
, err
);
1072 qlcnic_free_mbx_args(&cmd
);
1075 dma_free_coherent(&adapter
->pdev
->dev
, stats_size
, stats_addr
,
1081 int qlcnic_get_eswitch_stats(struct qlcnic_adapter
*adapter
, const u8 eswitch
,
1082 const u8 rx_tx
, struct __qlcnic_esw_statistics
*esw_stats
) {
1084 struct __qlcnic_esw_statistics port_stats
;
1088 if (esw_stats
== NULL
)
1090 if (adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
)
1092 if (adapter
->npars
== NULL
)
1095 memset(esw_stats
, 0, sizeof(u64
));
1096 esw_stats
->unicast_frames
= QLCNIC_STATS_NOT_AVAIL
;
1097 esw_stats
->multicast_frames
= QLCNIC_STATS_NOT_AVAIL
;
1098 esw_stats
->broadcast_frames
= QLCNIC_STATS_NOT_AVAIL
;
1099 esw_stats
->dropped_frames
= QLCNIC_STATS_NOT_AVAIL
;
1100 esw_stats
->errors
= QLCNIC_STATS_NOT_AVAIL
;
1101 esw_stats
->local_frames
= QLCNIC_STATS_NOT_AVAIL
;
1102 esw_stats
->numbytes
= QLCNIC_STATS_NOT_AVAIL
;
1103 esw_stats
->context_id
= eswitch
;
1105 for (i
= 0; i
< adapter
->ahw
->act_pci_func
; i
++) {
1106 if (adapter
->npars
[i
].phy_port
!= eswitch
)
1109 memset(&port_stats
, 0, sizeof(struct __qlcnic_esw_statistics
));
1110 if (qlcnic_get_port_stats(adapter
, adapter
->npars
[i
].pci_func
,
1111 rx_tx
, &port_stats
))
1114 esw_stats
->size
= port_stats
.size
;
1115 esw_stats
->version
= port_stats
.version
;
1116 QLCNIC_ADD_ESW_STATS(esw_stats
->unicast_frames
,
1117 port_stats
.unicast_frames
);
1118 QLCNIC_ADD_ESW_STATS(esw_stats
->multicast_frames
,
1119 port_stats
.multicast_frames
);
1120 QLCNIC_ADD_ESW_STATS(esw_stats
->broadcast_frames
,
1121 port_stats
.broadcast_frames
);
1122 QLCNIC_ADD_ESW_STATS(esw_stats
->dropped_frames
,
1123 port_stats
.dropped_frames
);
1124 QLCNIC_ADD_ESW_STATS(esw_stats
->errors
,
1126 QLCNIC_ADD_ESW_STATS(esw_stats
->local_frames
,
1127 port_stats
.local_frames
);
1128 QLCNIC_ADD_ESW_STATS(esw_stats
->numbytes
,
1129 port_stats
.numbytes
);
1135 int qlcnic_clear_esw_stats(struct qlcnic_adapter
*adapter
, const u8 func_esw
,
1136 const u8 port
, const u8 rx_tx
)
1140 struct qlcnic_cmd_args cmd
;
1142 if (adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
)
1145 if (func_esw
== QLCNIC_STATS_PORT
) {
1146 if (port
>= QLCNIC_MAX_PCI_FUNC
)
1148 } else if (func_esw
== QLCNIC_STATS_ESWITCH
) {
1149 if (port
>= QLCNIC_NIU_MAX_XG_PORTS
)
1155 if (rx_tx
> QLCNIC_QUERY_TX_COUNTER
)
1158 arg1
= port
| QLCNIC_STATS_VERSION
<< 8 | func_esw
<< 12;
1159 arg1
|= BIT_14
| rx_tx
<< 15;
1161 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
,
1162 QLCNIC_CMD_GET_ESWITCH_STATS
);
1166 cmd
.req
.arg
[1] = arg1
;
1167 err
= qlcnic_issue_cmd(adapter
, &cmd
);
1168 qlcnic_free_mbx_args(&cmd
);
1172 dev_err(&adapter
->pdev
->dev
,
1173 "Invalid args func_esw %d port %d rx_ctx %d\n",
1174 func_esw
, port
, rx_tx
);
1178 static int __qlcnic_get_eswitch_port_config(struct qlcnic_adapter
*adapter
,
1179 u32
*arg1
, u32
*arg2
)
1181 struct device
*dev
= &adapter
->pdev
->dev
;
1182 struct qlcnic_cmd_args cmd
;
1183 u8 pci_func
= *arg1
>> 8;
1186 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
,
1187 QLCNIC_CMD_GET_ESWITCH_PORT_CONFIG
);
1191 cmd
.req
.arg
[1] = *arg1
;
1192 err
= qlcnic_issue_cmd(adapter
, &cmd
);
1193 *arg1
= cmd
.rsp
.arg
[1];
1194 *arg2
= cmd
.rsp
.arg
[2];
1195 qlcnic_free_mbx_args(&cmd
);
1197 if (err
== QLCNIC_RCODE_SUCCESS
)
1198 dev_info(dev
, "Get eSwitch port config for vNIC function %d\n",
1201 dev_err(dev
, "Failed to get eswitch port config for vNIC function %d\n",
1205 /* Configure eSwitch port
1206 op_mode = 0 for setting default port behavior
1207 op_mode = 1 for setting vlan id
1208 op_mode = 2 for deleting vlan id
1209 op_type = 0 for vlan_id
1210 op_type = 1 for port vlan_id
1212 int qlcnic_config_switch_port(struct qlcnic_adapter
*adapter
,
1213 struct qlcnic_esw_func_cfg
*esw_cfg
)
1215 struct device
*dev
= &adapter
->pdev
->dev
;
1216 struct qlcnic_cmd_args cmd
;
1217 int err
= -EIO
, index
;
1221 if (adapter
->ahw
->op_mode
!= QLCNIC_MGMT_FUNC
)
1223 pci_func
= esw_cfg
->pci_func
;
1224 index
= qlcnic_is_valid_nic_func(adapter
, pci_func
);
1227 arg1
= (adapter
->npars
[index
].phy_port
& BIT_0
);
1228 arg1
|= (pci_func
<< 8);
1230 if (__qlcnic_get_eswitch_port_config(adapter
, &arg1
, &arg2
))
1232 arg1
&= ~(0x0ff << 8);
1233 arg1
|= (pci_func
<< 8);
1234 arg1
&= ~(BIT_2
| BIT_3
);
1235 switch (esw_cfg
->op_mode
) {
1236 case QLCNIC_PORT_DEFAULTS
:
1237 arg1
|= (BIT_4
| BIT_6
| BIT_7
);
1238 arg2
|= (BIT_0
| BIT_1
);
1239 if (adapter
->ahw
->capabilities
& QLCNIC_FW_CAPABILITY_TSO
)
1240 arg2
|= (BIT_2
| BIT_3
);
1241 if (!(esw_cfg
->discard_tagged
))
1243 if (!(esw_cfg
->promisc_mode
))
1245 if (!(esw_cfg
->mac_override
))
1247 if (!(esw_cfg
->mac_anti_spoof
))
1249 if (!(esw_cfg
->offload_flags
& BIT_0
))
1250 arg2
&= ~(BIT_1
| BIT_2
| BIT_3
);
1251 if (!(esw_cfg
->offload_flags
& BIT_1
))
1253 if (!(esw_cfg
->offload_flags
& BIT_2
))
1256 case QLCNIC_ADD_VLAN
:
1257 arg1
|= (BIT_2
| BIT_5
);
1258 arg1
|= (esw_cfg
->vlan_id
<< 16);
1260 case QLCNIC_DEL_VLAN
:
1261 arg1
|= (BIT_3
| BIT_5
);
1262 arg1
&= ~(0x0ffff << 16);
1268 err
= qlcnic_alloc_mbx_args(&cmd
, adapter
,
1269 QLCNIC_CMD_CONFIGURE_ESWITCH
);
1273 cmd
.req
.arg
[1] = arg1
;
1274 cmd
.req
.arg
[2] = arg2
;
1275 err
= qlcnic_issue_cmd(adapter
, &cmd
);
1276 qlcnic_free_mbx_args(&cmd
);
1278 if (err
!= QLCNIC_RCODE_SUCCESS
)
1279 dev_err(dev
, "Failed to configure eswitch for vNIC function %d\n",
1282 dev_info(dev
, "Configured eSwitch for vNIC function %d\n",
1289 qlcnic_get_eswitch_port_config(struct qlcnic_adapter
*adapter
,
1290 struct qlcnic_esw_func_cfg
*esw_cfg
)
1296 if (adapter
->ahw
->op_mode
== QLCNIC_MGMT_FUNC
) {
1297 index
= qlcnic_is_valid_nic_func(adapter
, esw_cfg
->pci_func
);
1300 phy_port
= adapter
->npars
[index
].phy_port
;
1302 phy_port
= adapter
->ahw
->physical_port
;
1305 arg1
|= (esw_cfg
->pci_func
<< 8);
1306 if (__qlcnic_get_eswitch_port_config(adapter
, &arg1
, &arg2
))
1309 esw_cfg
->discard_tagged
= !!(arg1
& BIT_4
);
1310 esw_cfg
->host_vlan_tag
= !!(arg1
& BIT_5
);
1311 esw_cfg
->promisc_mode
= !!(arg1
& BIT_6
);
1312 esw_cfg
->mac_override
= !!(arg1
& BIT_7
);
1313 esw_cfg
->vlan_id
= LSW(arg1
>> 16);
1314 esw_cfg
->mac_anti_spoof
= (arg2
& 0x1);
1315 esw_cfg
->offload_flags
= ((arg2
>> 1) & 0x7);