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Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes
[deliverable/linux.git] / drivers / net / ethernet / sis / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/sched.h>
56 #include <linux/string.h>
57 #include <linux/timer.h>
58 #include <linux/errno.h>
59 #include <linux/ioport.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/pci.h>
63 #include <linux/netdevice.h>
64 #include <linux/init.h>
65 #include <linux/mii.h>
66 #include <linux/etherdevice.h>
67 #include <linux/skbuff.h>
68 #include <linux/delay.h>
69 #include <linux/ethtool.h>
70 #include <linux/crc32.h>
71 #include <linux/bitops.h>
72 #include <linux/dma-mapping.h>
73
74 #include <asm/processor.h> /* Processor type for cache alignment. */
75 #include <asm/io.h>
76 #include <asm/irq.h>
77 #include <asm/uaccess.h> /* User space memory access functions */
78
79 #include "sis900.h"
80
81 #define SIS900_MODULE_NAME "sis900"
82 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
83
84 static const char version[] =
85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
86
87 static int max_interrupt_work = 40;
88 static int multicast_filter_limit = 128;
89
90 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91
92 #define SIS900_DEF_MSG \
93 (NETIF_MSG_DRV | \
94 NETIF_MSG_LINK | \
95 NETIF_MSG_RX_ERR | \
96 NETIF_MSG_TX_ERR)
97
98 /* Time in jiffies before concluding the transmitter is hung. */
99 #define TX_TIMEOUT (4*HZ)
100
101 enum {
102 SIS_900 = 0,
103 SIS_7016
104 };
105 static const char * card_names[] = {
106 "SiS 900 PCI Fast Ethernet",
107 "SiS 7016 PCI Fast Ethernet"
108 };
109 static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = {
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
114 {0,}
115 };
116 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117
118 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119
120 static const struct mii_chip_info {
121 const char * name;
122 u16 phy_id0;
123 u16 phy_id1;
124 u8 phy_types;
125 #define HOME 0x0001
126 #define LAN 0x0002
127 #define MIX 0x0003
128 #define UNKNOWN 0x0
129 } mii_chip_table[] = {
130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
137 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
143 {NULL,},
144 };
145
146 struct mii_phy {
147 struct mii_phy * next;
148 int phy_addr;
149 u16 phy_id0;
150 u16 phy_id1;
151 u16 status;
152 u8 phy_types;
153 };
154
155 typedef struct _BufferDesc {
156 u32 link;
157 u32 cmdsts;
158 u32 bufptr;
159 } BufferDesc;
160
161 struct sis900_private {
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
169 struct mii_if_info mii_info;
170
171 void __iomem *ioaddr;
172
173 struct timer_list timer; /* Link status detection timer. */
174 u8 autong_complete; /* 1: auto-negotiate complete */
175
176 u32 msg_enable;
177
178 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
179 unsigned int cur_tx, dirty_tx;
180
181 /* The saved address of a sent/receive-in-place packet buffer */
182 struct sk_buff *tx_skbuff[NUM_TX_DESC];
183 struct sk_buff *rx_skbuff[NUM_RX_DESC];
184 BufferDesc *tx_ring;
185 BufferDesc *rx_ring;
186
187 dma_addr_t tx_ring_dma;
188 dma_addr_t rx_ring_dma;
189
190 unsigned int tx_full; /* The Tx queue is full. */
191 u8 host_bridge_rev;
192 u8 chipset_rev;
193 };
194
195 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
196 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
197 MODULE_LICENSE("GPL");
198
199 module_param(multicast_filter_limit, int, 0444);
200 module_param(max_interrupt_work, int, 0444);
201 module_param(sis900_debug, int, 0444);
202 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
203 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
204 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
205
206 #define sw32(reg, val) iowrite32(val, ioaddr + (reg))
207 #define sw8(reg, val) iowrite8(val, ioaddr + (reg))
208 #define sr32(reg) ioread32(ioaddr + (reg))
209 #define sr16(reg) ioread16(ioaddr + (reg))
210
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 static void sis900_poll(struct net_device *dev);
213 #endif
214 static int sis900_open(struct net_device *net_dev);
215 static int sis900_mii_probe (struct net_device * net_dev);
216 static void sis900_init_rxfilter (struct net_device * net_dev);
217 static u16 read_eeprom(void __iomem *ioaddr, int location);
218 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
219 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
220 static void sis900_timer(unsigned long data);
221 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
222 static void sis900_tx_timeout(struct net_device *net_dev);
223 static void sis900_init_tx_ring(struct net_device *net_dev);
224 static void sis900_init_rx_ring(struct net_device *net_dev);
225 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
226 struct net_device *net_dev);
227 static int sis900_rx(struct net_device *net_dev);
228 static void sis900_finish_xmit (struct net_device *net_dev);
229 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
230 static int sis900_close(struct net_device *net_dev);
231 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
232 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
233 static void set_rx_mode(struct net_device *net_dev);
234 static void sis900_reset(struct net_device *net_dev);
235 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
236 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
237 static u16 sis900_default_phy(struct net_device * net_dev);
238 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
239 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
240 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
241 static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
242 static const struct ethtool_ops sis900_ethtool_ops;
243
244 /**
245 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
246 * @pci_dev: the sis900 pci device
247 * @net_dev: the net device to get address for
248 *
249 * Older SiS900 and friends, use EEPROM to store MAC address.
250 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
251 */
252
253 static int sis900_get_mac_addr(struct pci_dev *pci_dev,
254 struct net_device *net_dev)
255 {
256 struct sis900_private *sis_priv = netdev_priv(net_dev);
257 void __iomem *ioaddr = sis_priv->ioaddr;
258 u16 signature;
259 int i;
260
261 /* check to see if we have sane EEPROM */
262 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
263 if (signature == 0xffff || signature == 0x0000) {
264 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
265 pci_name(pci_dev), signature);
266 return 0;
267 }
268
269 /* get MAC address from EEPROM */
270 for (i = 0; i < 3; i++)
271 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
272
273 return 1;
274 }
275
276 /**
277 * sis630e_get_mac_addr - Get MAC address for SiS630E model
278 * @pci_dev: the sis900 pci device
279 * @net_dev: the net device to get address for
280 *
281 * SiS630E model, use APC CMOS RAM to store MAC address.
282 * APC CMOS RAM is accessed through ISA bridge.
283 * MAC address is read into @net_dev->dev_addr.
284 */
285
286 static int sis630e_get_mac_addr(struct pci_dev *pci_dev,
287 struct net_device *net_dev)
288 {
289 struct pci_dev *isa_bridge = NULL;
290 u8 reg;
291 int i;
292
293 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
294 if (!isa_bridge)
295 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
296 if (!isa_bridge) {
297 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
298 pci_name(pci_dev));
299 return 0;
300 }
301 pci_read_config_byte(isa_bridge, 0x48, &reg);
302 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
303
304 for (i = 0; i < 6; i++) {
305 outb(0x09 + i, 0x70);
306 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
307 }
308
309 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
310 pci_dev_put(isa_bridge);
311
312 return 1;
313 }
314
315
316 /**
317 * sis635_get_mac_addr - Get MAC address for SIS635 model
318 * @pci_dev: the sis900 pci device
319 * @net_dev: the net device to get address for
320 *
321 * SiS635 model, set MAC Reload Bit to load Mac address from APC
322 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
323 * @net_dev->dev_addr.
324 */
325
326 static int sis635_get_mac_addr(struct pci_dev *pci_dev,
327 struct net_device *net_dev)
328 {
329 struct sis900_private *sis_priv = netdev_priv(net_dev);
330 void __iomem *ioaddr = sis_priv->ioaddr;
331 u32 rfcrSave;
332 u32 i;
333
334 rfcrSave = sr32(rfcr);
335
336 sw32(cr, rfcrSave | RELOAD);
337 sw32(cr, 0);
338
339 /* disable packet filtering before setting filter */
340 sw32(rfcr, rfcrSave & ~RFEN);
341
342 /* load MAC addr to filter data register */
343 for (i = 0 ; i < 3 ; i++) {
344 sw32(rfcr, (i << RFADDR_shift));
345 *( ((u16 *)net_dev->dev_addr) + i) = sr16(rfdr);
346 }
347
348 /* enable packet filtering */
349 sw32(rfcr, rfcrSave | RFEN);
350
351 return 1;
352 }
353
354 /**
355 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
356 * @pci_dev: the sis900 pci device
357 * @net_dev: the net device to get address for
358 *
359 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
360 * is shared by
361 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
362 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
363 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
364 * EEDONE signal to refuse EEPROM access by LAN.
365 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
366 * The signature field in SiS962 or SiS963 spec is meaningless.
367 * MAC address is read into @net_dev->dev_addr.
368 */
369
370 static int sis96x_get_mac_addr(struct pci_dev *pci_dev,
371 struct net_device *net_dev)
372 {
373 struct sis900_private *sis_priv = netdev_priv(net_dev);
374 void __iomem *ioaddr = sis_priv->ioaddr;
375 int wait, rc = 0;
376
377 sw32(mear, EEREQ);
378 for (wait = 0; wait < 2000; wait++) {
379 if (sr32(mear) & EEGNT) {
380 u16 *mac = (u16 *)net_dev->dev_addr;
381 int i;
382
383 /* get MAC address from EEPROM */
384 for (i = 0; i < 3; i++)
385 mac[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
386
387 rc = 1;
388 break;
389 }
390 udelay(1);
391 }
392 sw32(mear, EEDONE);
393 return rc;
394 }
395
396 static const struct net_device_ops sis900_netdev_ops = {
397 .ndo_open = sis900_open,
398 .ndo_stop = sis900_close,
399 .ndo_start_xmit = sis900_start_xmit,
400 .ndo_set_config = sis900_set_config,
401 .ndo_set_rx_mode = set_rx_mode,
402 .ndo_change_mtu = eth_change_mtu,
403 .ndo_validate_addr = eth_validate_addr,
404 .ndo_set_mac_address = eth_mac_addr,
405 .ndo_do_ioctl = mii_ioctl,
406 .ndo_tx_timeout = sis900_tx_timeout,
407 #ifdef CONFIG_NET_POLL_CONTROLLER
408 .ndo_poll_controller = sis900_poll,
409 #endif
410 };
411
412 /**
413 * sis900_probe - Probe for sis900 device
414 * @pci_dev: the sis900 pci device
415 * @pci_id: the pci device ID
416 *
417 * Check and probe sis900 net device for @pci_dev.
418 * Get mac address according to the chip revision,
419 * and assign SiS900-specific entries in the device structure.
420 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
421 */
422
423 static int sis900_probe(struct pci_dev *pci_dev,
424 const struct pci_device_id *pci_id)
425 {
426 struct sis900_private *sis_priv;
427 struct net_device *net_dev;
428 struct pci_dev *dev;
429 dma_addr_t ring_dma;
430 void *ring_space;
431 void __iomem *ioaddr;
432 int i, ret;
433 const char *card_name = card_names[pci_id->driver_data];
434 const char *dev_name = pci_name(pci_dev);
435
436 /* when built into the kernel, we only print version if device is found */
437 #ifndef MODULE
438 static int printed_version;
439 if (!printed_version++)
440 printk(version);
441 #endif
442
443 /* setup various bits in PCI command register */
444 ret = pci_enable_device(pci_dev);
445 if(ret) return ret;
446
447 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
448 if(i){
449 printk(KERN_ERR "sis900.c: architecture does not support "
450 "32bit PCI busmaster DMA\n");
451 return i;
452 }
453
454 pci_set_master(pci_dev);
455
456 net_dev = alloc_etherdev(sizeof(struct sis900_private));
457 if (!net_dev)
458 return -ENOMEM;
459 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
460
461 /* We do a request_region() to register /proc/ioports info. */
462 ret = pci_request_regions(pci_dev, "sis900");
463 if (ret)
464 goto err_out;
465
466 /* IO region. */
467 ioaddr = pci_iomap(pci_dev, 0, 0);
468 if (!ioaddr) {
469 ret = -ENOMEM;
470 goto err_out_cleardev;
471 }
472
473 sis_priv = netdev_priv(net_dev);
474 sis_priv->ioaddr = ioaddr;
475 sis_priv->pci_dev = pci_dev;
476 spin_lock_init(&sis_priv->lock);
477
478 pci_set_drvdata(pci_dev, net_dev);
479
480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
481 if (!ring_space) {
482 ret = -ENOMEM;
483 goto err_out_unmap;
484 }
485 sis_priv->tx_ring = ring_space;
486 sis_priv->tx_ring_dma = ring_dma;
487
488 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
489 if (!ring_space) {
490 ret = -ENOMEM;
491 goto err_unmap_tx;
492 }
493 sis_priv->rx_ring = ring_space;
494 sis_priv->rx_ring_dma = ring_dma;
495
496 /* The SiS900-specific entries in the device structure. */
497 net_dev->netdev_ops = &sis900_netdev_ops;
498 net_dev->watchdog_timeo = TX_TIMEOUT;
499 net_dev->ethtool_ops = &sis900_ethtool_ops;
500
501 if (sis900_debug > 0)
502 sis_priv->msg_enable = sis900_debug;
503 else
504 sis_priv->msg_enable = SIS900_DEF_MSG;
505
506 sis_priv->mii_info.dev = net_dev;
507 sis_priv->mii_info.mdio_read = mdio_read;
508 sis_priv->mii_info.mdio_write = mdio_write;
509 sis_priv->mii_info.phy_id_mask = 0x1f;
510 sis_priv->mii_info.reg_num_mask = 0x1f;
511
512 /* Get Mac address according to the chip revision */
513 sis_priv->chipset_rev = pci_dev->revision;
514 if(netif_msg_probe(sis_priv))
515 printk(KERN_DEBUG "%s: detected revision %2.2x, "
516 "trying to get MAC address...\n",
517 dev_name, sis_priv->chipset_rev);
518
519 ret = 0;
520 if (sis_priv->chipset_rev == SIS630E_900_REV)
521 ret = sis630e_get_mac_addr(pci_dev, net_dev);
522 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
523 ret = sis635_get_mac_addr(pci_dev, net_dev);
524 else if (sis_priv->chipset_rev == SIS96x_900_REV)
525 ret = sis96x_get_mac_addr(pci_dev, net_dev);
526 else
527 ret = sis900_get_mac_addr(pci_dev, net_dev);
528
529 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
530 eth_hw_addr_random(net_dev);
531 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
532 "using random generated one\n", dev_name);
533 }
534
535 /* 630ET : set the mii access mode as software-mode */
536 if (sis_priv->chipset_rev == SIS630ET_900_REV)
537 sw32(cr, ACCESSMODE | sr32(cr));
538
539 /* probe for mii transceiver */
540 if (sis900_mii_probe(net_dev) == 0) {
541 printk(KERN_WARNING "%s: Error probing MII device.\n",
542 dev_name);
543 ret = -ENODEV;
544 goto err_unmap_rx;
545 }
546
547 /* save our host bridge revision */
548 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
549 if (dev) {
550 sis_priv->host_bridge_rev = dev->revision;
551 pci_dev_put(dev);
552 }
553
554 ret = register_netdev(net_dev);
555 if (ret)
556 goto err_unmap_rx;
557
558 /* print some information about our NIC */
559 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
560 net_dev->name, card_name, ioaddr, pci_dev->irq,
561 net_dev->dev_addr);
562
563 /* Detect Wake on Lan support */
564 ret = (sr32(CFGPMC) & PMESP) >> 27;
565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
567
568 return 0;
569
570 err_unmap_rx:
571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
572 sis_priv->rx_ring_dma);
573 err_unmap_tx:
574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
575 sis_priv->tx_ring_dma);
576 err_out_unmap:
577 pci_iounmap(pci_dev, ioaddr);
578 err_out_cleardev:
579 pci_set_drvdata(pci_dev, NULL);
580 pci_release_regions(pci_dev);
581 err_out:
582 free_netdev(net_dev);
583 return ret;
584 }
585
586 /**
587 * sis900_mii_probe - Probe MII PHY for sis900
588 * @net_dev: the net device to probe for
589 *
590 * Search for total of 32 possible mii phy addresses.
591 * Identify and set current phy if found one,
592 * return error if it failed to found.
593 */
594
595 static int sis900_mii_probe(struct net_device *net_dev)
596 {
597 struct sis900_private *sis_priv = netdev_priv(net_dev);
598 const char *dev_name = pci_name(sis_priv->pci_dev);
599 u16 poll_bit = MII_STAT_LINK, status = 0;
600 unsigned long timeout = jiffies + 5 * HZ;
601 int phy_addr;
602
603 sis_priv->mii = NULL;
604
605 /* search for total of 32 possible mii phy addresses */
606 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
607 struct mii_phy * mii_phy = NULL;
608 u16 mii_status;
609 int i;
610
611 mii_phy = NULL;
612 for(i = 0; i < 2; i++)
613 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
614
615 if (mii_status == 0xffff || mii_status == 0x0000) {
616 if (netif_msg_probe(sis_priv))
617 printk(KERN_DEBUG "%s: MII at address %d"
618 " not accessible\n",
619 dev_name, phy_addr);
620 continue;
621 }
622
623 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
624 mii_phy = sis_priv->first_mii;
625 while (mii_phy) {
626 struct mii_phy *phy;
627 phy = mii_phy;
628 mii_phy = mii_phy->next;
629 kfree(phy);
630 }
631 return 0;
632 }
633
634 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
635 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
636 mii_phy->phy_addr = phy_addr;
637 mii_phy->status = mii_status;
638 mii_phy->next = sis_priv->mii;
639 sis_priv->mii = mii_phy;
640 sis_priv->first_mii = mii_phy;
641
642 for (i = 0; mii_chip_table[i].phy_id1; i++)
643 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
644 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
645 mii_phy->phy_types = mii_chip_table[i].phy_types;
646 if (mii_chip_table[i].phy_types == MIX)
647 mii_phy->phy_types =
648 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
649 printk(KERN_INFO "%s: %s transceiver found "
650 "at address %d.\n",
651 dev_name,
652 mii_chip_table[i].name,
653 phy_addr);
654 break;
655 }
656
657 if( !mii_chip_table[i].phy_id1 ) {
658 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
659 dev_name, phy_addr);
660 mii_phy->phy_types = UNKNOWN;
661 }
662 }
663
664 if (sis_priv->mii == NULL) {
665 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
666 return 0;
667 }
668
669 /* select default PHY for mac */
670 sis_priv->mii = NULL;
671 sis900_default_phy( net_dev );
672
673 /* Reset phy if default phy is internal sis900 */
674 if ((sis_priv->mii->phy_id0 == 0x001D) &&
675 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
676 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
677
678 /* workaround for ICS1893 PHY */
679 if ((sis_priv->mii->phy_id0 == 0x0015) &&
680 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
681 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
682
683 if(status & MII_STAT_LINK){
684 while (poll_bit) {
685 yield();
686
687 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
688 if (time_after_eq(jiffies, timeout)) {
689 printk(KERN_WARNING "%s: reset phy and link down now\n",
690 dev_name);
691 return -ETIME;
692 }
693 }
694 }
695
696 if (sis_priv->chipset_rev == SIS630E_900_REV) {
697 /* SiS 630E has some bugs on default value of PHY registers */
698 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
699 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
700 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
701 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
702 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
703 }
704
705 if (sis_priv->mii->status & MII_STAT_LINK)
706 netif_carrier_on(net_dev);
707 else
708 netif_carrier_off(net_dev);
709
710 return 1;
711 }
712
713 /**
714 * sis900_default_phy - Select default PHY for sis900 mac.
715 * @net_dev: the net device to probe for
716 *
717 * Select first detected PHY with link as default.
718 * If no one is link on, select PHY whose types is HOME as default.
719 * If HOME doesn't exist, select LAN.
720 */
721
722 static u16 sis900_default_phy(struct net_device * net_dev)
723 {
724 struct sis900_private *sis_priv = netdev_priv(net_dev);
725 struct mii_phy *phy = NULL, *phy_home = NULL,
726 *default_phy = NULL, *phy_lan = NULL;
727 u16 status;
728
729 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
730 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
731 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
732
733 /* Link ON & Not select default PHY & not ghost PHY */
734 if ((status & MII_STAT_LINK) && !default_phy &&
735 (phy->phy_types != UNKNOWN))
736 default_phy = phy;
737 else {
738 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
739 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
740 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
741 if (phy->phy_types == HOME)
742 phy_home = phy;
743 else if(phy->phy_types == LAN)
744 phy_lan = phy;
745 }
746 }
747
748 if (!default_phy && phy_home)
749 default_phy = phy_home;
750 else if (!default_phy && phy_lan)
751 default_phy = phy_lan;
752 else if (!default_phy)
753 default_phy = sis_priv->first_mii;
754
755 if (sis_priv->mii != default_phy) {
756 sis_priv->mii = default_phy;
757 sis_priv->cur_phy = default_phy->phy_addr;
758 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
759 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
760 }
761
762 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
763
764 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
765 status &= (~MII_CNTL_ISOLATE);
766
767 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
768 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
769 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
770
771 return status;
772 }
773
774
775 /**
776 * sis900_set_capability - set the media capability of network adapter.
777 * @net_dev : the net device to probe for
778 * @phy : default PHY
779 *
780 * Set the media capability of network adapter according to
781 * mii status register. It's necessary before auto-negotiate.
782 */
783
784 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
785 {
786 u16 cap;
787 u16 status;
788
789 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
790 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
791
792 cap = MII_NWAY_CSMA_CD |
793 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
794 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
795 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
796 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
797
798 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
799 }
800
801
802 /* Delay between EEPROM clock transitions. */
803 #define eeprom_delay() sr32(mear)
804
805 /**
806 * read_eeprom - Read Serial EEPROM
807 * @ioaddr: base i/o address
808 * @location: the EEPROM location to read
809 *
810 * Read Serial EEPROM through EEPROM Access Register.
811 * Note that location is in word (16 bits) unit
812 */
813
814 static u16 read_eeprom(void __iomem *ioaddr, int location)
815 {
816 u32 read_cmd = location | EEread;
817 int i;
818 u16 retval = 0;
819
820 sw32(mear, 0);
821 eeprom_delay();
822 sw32(mear, EECS);
823 eeprom_delay();
824
825 /* Shift the read command (9) bits out. */
826 for (i = 8; i >= 0; i--) {
827 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
828
829 sw32(mear, dataval);
830 eeprom_delay();
831 sw32(mear, dataval | EECLK);
832 eeprom_delay();
833 }
834 sw32(mear, EECS);
835 eeprom_delay();
836
837 /* read the 16-bits data in */
838 for (i = 16; i > 0; i--) {
839 sw32(mear, EECS);
840 eeprom_delay();
841 sw32(mear, EECS | EECLK);
842 eeprom_delay();
843 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
844 eeprom_delay();
845 }
846
847 /* Terminate the EEPROM access. */
848 sw32(mear, 0);
849 eeprom_delay();
850
851 return retval;
852 }
853
854 /* Read and write the MII management registers using software-generated
855 serial MDIO protocol. Note that the command bits and data bits are
856 send out separately */
857 #define mdio_delay() sr32(mear)
858
859 static void mdio_idle(struct sis900_private *sp)
860 {
861 void __iomem *ioaddr = sp->ioaddr;
862
863 sw32(mear, MDIO | MDDIR);
864 mdio_delay();
865 sw32(mear, MDIO | MDDIR | MDC);
866 }
867
868 /* Synchronize the MII management interface by shifting 32 one bits out. */
869 static void mdio_reset(struct sis900_private *sp)
870 {
871 void __iomem *ioaddr = sp->ioaddr;
872 int i;
873
874 for (i = 31; i >= 0; i--) {
875 sw32(mear, MDDIR | MDIO);
876 mdio_delay();
877 sw32(mear, MDDIR | MDIO | MDC);
878 mdio_delay();
879 }
880 }
881
882 /**
883 * mdio_read - read MII PHY register
884 * @net_dev: the net device to read
885 * @phy_id: the phy address to read
886 * @location: the phy regiester id to read
887 *
888 * Read MII registers through MDIO and MDC
889 * using MDIO management frame structure and protocol(defined by ISO/IEC).
890 * Please see SiS7014 or ICS spec
891 */
892
893 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
894 {
895 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
896 struct sis900_private *sp = netdev_priv(net_dev);
897 void __iomem *ioaddr = sp->ioaddr;
898 u16 retval = 0;
899 int i;
900
901 mdio_reset(sp);
902 mdio_idle(sp);
903
904 for (i = 15; i >= 0; i--) {
905 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
906
907 sw32(mear, dataval);
908 mdio_delay();
909 sw32(mear, dataval | MDC);
910 mdio_delay();
911 }
912
913 /* Read the 16 data bits. */
914 for (i = 16; i > 0; i--) {
915 sw32(mear, 0);
916 mdio_delay();
917 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
918 sw32(mear, MDC);
919 mdio_delay();
920 }
921 sw32(mear, 0x00);
922
923 return retval;
924 }
925
926 /**
927 * mdio_write - write MII PHY register
928 * @net_dev: the net device to write
929 * @phy_id: the phy address to write
930 * @location: the phy regiester id to write
931 * @value: the register value to write with
932 *
933 * Write MII registers with @value through MDIO and MDC
934 * using MDIO management frame structure and protocol(defined by ISO/IEC)
935 * please see SiS7014 or ICS spec
936 */
937
938 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
939 int value)
940 {
941 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
942 struct sis900_private *sp = netdev_priv(net_dev);
943 void __iomem *ioaddr = sp->ioaddr;
944 int i;
945
946 mdio_reset(sp);
947 mdio_idle(sp);
948
949 /* Shift the command bits out. */
950 for (i = 15; i >= 0; i--) {
951 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
952
953 sw8(mear, dataval);
954 mdio_delay();
955 sw8(mear, dataval | MDC);
956 mdio_delay();
957 }
958 mdio_delay();
959
960 /* Shift the value bits out. */
961 for (i = 15; i >= 0; i--) {
962 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
963
964 sw32(mear, dataval);
965 mdio_delay();
966 sw32(mear, dataval | MDC);
967 mdio_delay();
968 }
969 mdio_delay();
970
971 /* Clear out extra bits. */
972 for (i = 2; i > 0; i--) {
973 sw8(mear, 0);
974 mdio_delay();
975 sw8(mear, MDC);
976 mdio_delay();
977 }
978 sw32(mear, 0x00);
979 }
980
981
982 /**
983 * sis900_reset_phy - reset sis900 mii phy.
984 * @net_dev: the net device to write
985 * @phy_addr: default phy address
986 *
987 * Some specific phy can't work properly without reset.
988 * This function will be called during initialization and
989 * link status change from ON to DOWN.
990 */
991
992 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
993 {
994 int i;
995 u16 status;
996
997 for (i = 0; i < 2; i++)
998 status = mdio_read(net_dev, phy_addr, MII_STATUS);
999
1000 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
1001
1002 return status;
1003 }
1004
1005 #ifdef CONFIG_NET_POLL_CONTROLLER
1006 /*
1007 * Polling 'interrupt' - used by things like netconsole to send skbs
1008 * without having to re-enable interrupts. It's not called while
1009 * the interrupt routine is executing.
1010 */
1011 static void sis900_poll(struct net_device *dev)
1012 {
1013 struct sis900_private *sp = netdev_priv(dev);
1014 const int irq = sp->pci_dev->irq;
1015
1016 disable_irq(irq);
1017 sis900_interrupt(irq, dev);
1018 enable_irq(irq);
1019 }
1020 #endif
1021
1022 /**
1023 * sis900_open - open sis900 device
1024 * @net_dev: the net device to open
1025 *
1026 * Do some initialization and start net interface.
1027 * enable interrupts and set sis900 timer.
1028 */
1029
1030 static int
1031 sis900_open(struct net_device *net_dev)
1032 {
1033 struct sis900_private *sis_priv = netdev_priv(net_dev);
1034 void __iomem *ioaddr = sis_priv->ioaddr;
1035 int ret;
1036
1037 /* Soft reset the chip. */
1038 sis900_reset(net_dev);
1039
1040 /* Equalizer workaround Rule */
1041 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1042
1043 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1044 net_dev->name, net_dev);
1045 if (ret)
1046 return ret;
1047
1048 sis900_init_rxfilter(net_dev);
1049
1050 sis900_init_tx_ring(net_dev);
1051 sis900_init_rx_ring(net_dev);
1052
1053 set_rx_mode(net_dev);
1054
1055 netif_start_queue(net_dev);
1056
1057 /* Workaround for EDB */
1058 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1059
1060 /* Enable all known interrupts by setting the interrupt mask. */
1061 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1062 sw32(cr, RxENA | sr32(cr));
1063 sw32(ier, IE);
1064
1065 sis900_check_mode(net_dev, sis_priv->mii);
1066
1067 /* Set the timer to switch to check for link beat and perhaps switch
1068 to an alternate media type. */
1069 init_timer(&sis_priv->timer);
1070 sis_priv->timer.expires = jiffies + HZ;
1071 sis_priv->timer.data = (unsigned long)net_dev;
1072 sis_priv->timer.function = sis900_timer;
1073 add_timer(&sis_priv->timer);
1074
1075 return 0;
1076 }
1077
1078 /**
1079 * sis900_init_rxfilter - Initialize the Rx filter
1080 * @net_dev: the net device to initialize for
1081 *
1082 * Set receive filter address to our MAC address
1083 * and enable packet filtering.
1084 */
1085
1086 static void
1087 sis900_init_rxfilter (struct net_device * net_dev)
1088 {
1089 struct sis900_private *sis_priv = netdev_priv(net_dev);
1090 void __iomem *ioaddr = sis_priv->ioaddr;
1091 u32 rfcrSave;
1092 u32 i;
1093
1094 rfcrSave = sr32(rfcr);
1095
1096 /* disable packet filtering before setting filter */
1097 sw32(rfcr, rfcrSave & ~RFEN);
1098
1099 /* load MAC addr to filter data register */
1100 for (i = 0 ; i < 3 ; i++) {
1101 u32 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1102
1103 sw32(rfcr, i << RFADDR_shift);
1104 sw32(rfdr, w);
1105
1106 if (netif_msg_hw(sis_priv)) {
1107 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1108 net_dev->name, i, sr32(rfdr));
1109 }
1110 }
1111
1112 /* enable packet filtering */
1113 sw32(rfcr, rfcrSave | RFEN);
1114 }
1115
1116 /**
1117 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1118 * @net_dev: the net device to initialize for
1119 *
1120 * Initialize the Tx descriptor ring,
1121 */
1122
1123 static void
1124 sis900_init_tx_ring(struct net_device *net_dev)
1125 {
1126 struct sis900_private *sis_priv = netdev_priv(net_dev);
1127 void __iomem *ioaddr = sis_priv->ioaddr;
1128 int i;
1129
1130 sis_priv->tx_full = 0;
1131 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1132
1133 for (i = 0; i < NUM_TX_DESC; i++) {
1134 sis_priv->tx_skbuff[i] = NULL;
1135
1136 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1137 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1138 sis_priv->tx_ring[i].cmdsts = 0;
1139 sis_priv->tx_ring[i].bufptr = 0;
1140 }
1141
1142 /* load Transmit Descriptor Register */
1143 sw32(txdp, sis_priv->tx_ring_dma);
1144 if (netif_msg_hw(sis_priv))
1145 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1146 net_dev->name, sr32(txdp));
1147 }
1148
1149 /**
1150 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1151 * @net_dev: the net device to initialize for
1152 *
1153 * Initialize the Rx descriptor ring,
1154 * and pre-allocate recevie buffers (socket buffer)
1155 */
1156
1157 static void
1158 sis900_init_rx_ring(struct net_device *net_dev)
1159 {
1160 struct sis900_private *sis_priv = netdev_priv(net_dev);
1161 void __iomem *ioaddr = sis_priv->ioaddr;
1162 int i;
1163
1164 sis_priv->cur_rx = 0;
1165 sis_priv->dirty_rx = 0;
1166
1167 /* init RX descriptor */
1168 for (i = 0; i < NUM_RX_DESC; i++) {
1169 sis_priv->rx_skbuff[i] = NULL;
1170
1171 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1172 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1173 sis_priv->rx_ring[i].cmdsts = 0;
1174 sis_priv->rx_ring[i].bufptr = 0;
1175 }
1176
1177 /* allocate sock buffers */
1178 for (i = 0; i < NUM_RX_DESC; i++) {
1179 struct sk_buff *skb;
1180
1181 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1182 /* not enough memory for skbuff, this makes a "hole"
1183 on the buffer ring, it is not clear how the
1184 hardware will react to this kind of degenerated
1185 buffer */
1186 break;
1187 }
1188 sis_priv->rx_skbuff[i] = skb;
1189 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1190 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1191 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1192 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1193 sis_priv->rx_ring[i].bufptr))) {
1194 dev_kfree_skb(skb);
1195 sis_priv->rx_skbuff[i] = NULL;
1196 break;
1197 }
1198 }
1199 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1200
1201 /* load Receive Descriptor Register */
1202 sw32(rxdp, sis_priv->rx_ring_dma);
1203 if (netif_msg_hw(sis_priv))
1204 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1205 net_dev->name, sr32(rxdp));
1206 }
1207
1208 /**
1209 * sis630_set_eq - set phy equalizer value for 630 LAN
1210 * @net_dev: the net device to set equalizer value
1211 * @revision: 630 LAN revision number
1212 *
1213 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1214 * PHY register 14h(Test)
1215 * Bit 14: 0 -- Automatically detect (default)
1216 * 1 -- Manually set Equalizer filter
1217 * Bit 13: 0 -- (Default)
1218 * 1 -- Speed up convergence of equalizer setting
1219 * Bit 9 : 0 -- (Default)
1220 * 1 -- Disable Baseline Wander
1221 * Bit 3~7 -- Equalizer filter setting
1222 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1223 * Then calculate equalizer value
1224 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1225 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1226 * Calculate Equalizer value:
1227 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
1228 * When the equalizer is stable, this value is not a fixed value. It will be within
1229 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1230 * 0 <= max <= 4 --> set equalizer to max
1231 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1232 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1233 */
1234
1235 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1236 {
1237 struct sis900_private *sis_priv = netdev_priv(net_dev);
1238 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1239 int i, maxcount=10;
1240
1241 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1242 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1243 return;
1244
1245 if (netif_carrier_ok(net_dev)) {
1246 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1247 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1248 (0x2200 | reg14h) & 0xBFFF);
1249 for (i=0; i < maxcount; i++) {
1250 eq_value = (0x00F8 & mdio_read(net_dev,
1251 sis_priv->cur_phy, MII_RESV)) >> 3;
1252 if (i == 0)
1253 max_value=min_value=eq_value;
1254 max_value = (eq_value > max_value) ?
1255 eq_value : max_value;
1256 min_value = (eq_value < min_value) ?
1257 eq_value : min_value;
1258 }
1259 /* 630E rule to determine the equalizer value */
1260 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1261 revision == SIS630ET_900_REV) {
1262 if (max_value < 5)
1263 eq_value = max_value;
1264 else if (max_value >= 5 && max_value < 15)
1265 eq_value = (max_value == min_value) ?
1266 max_value+2 : max_value+1;
1267 else if (max_value >= 15)
1268 eq_value=(max_value == min_value) ?
1269 max_value+6 : max_value+5;
1270 }
1271 /* 630B0&B1 rule to determine the equalizer value */
1272 if (revision == SIS630A_900_REV &&
1273 (sis_priv->host_bridge_rev == SIS630B0 ||
1274 sis_priv->host_bridge_rev == SIS630B1)) {
1275 if (max_value == 0)
1276 eq_value = 3;
1277 else
1278 eq_value = (max_value + min_value + 1)/2;
1279 }
1280 /* write equalizer value and setting */
1281 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1282 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1283 reg14h = (reg14h | 0x6000) & 0xFDFF;
1284 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1285 } else {
1286 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1287 if (revision == SIS630A_900_REV &&
1288 (sis_priv->host_bridge_rev == SIS630B0 ||
1289 sis_priv->host_bridge_rev == SIS630B1))
1290 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1291 (reg14h | 0x2200) & 0xBFFF);
1292 else
1293 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1294 (reg14h | 0x2000) & 0xBFFF);
1295 }
1296 }
1297
1298 /**
1299 * sis900_timer - sis900 timer routine
1300 * @data: pointer to sis900 net device
1301 *
1302 * On each timer ticks we check two things,
1303 * link status (ON/OFF) and link mode (10/100/Full/Half)
1304 */
1305
1306 static void sis900_timer(unsigned long data)
1307 {
1308 struct net_device *net_dev = (struct net_device *)data;
1309 struct sis900_private *sis_priv = netdev_priv(net_dev);
1310 struct mii_phy *mii_phy = sis_priv->mii;
1311 static const int next_tick = 5*HZ;
1312 u16 status;
1313
1314 if (!sis_priv->autong_complete){
1315 int uninitialized_var(speed), duplex = 0;
1316
1317 sis900_read_mode(net_dev, &speed, &duplex);
1318 if (duplex){
1319 sis900_set_mode(sis_priv, speed, duplex);
1320 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1321 netif_carrier_on(net_dev);
1322 }
1323
1324 sis_priv->timer.expires = jiffies + HZ;
1325 add_timer(&sis_priv->timer);
1326 return;
1327 }
1328
1329 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1330 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1331
1332 /* Link OFF -> ON */
1333 if (!netif_carrier_ok(net_dev)) {
1334 LookForLink:
1335 /* Search for new PHY */
1336 status = sis900_default_phy(net_dev);
1337 mii_phy = sis_priv->mii;
1338
1339 if (status & MII_STAT_LINK)
1340 sis900_check_mode(net_dev, mii_phy);
1341 } else {
1342 /* Link ON -> OFF */
1343 if (!(status & MII_STAT_LINK)){
1344 netif_carrier_off(net_dev);
1345 if(netif_msg_link(sis_priv))
1346 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1347
1348 /* Change mode issue */
1349 if ((mii_phy->phy_id0 == 0x001D) &&
1350 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1351 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1352
1353 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1354
1355 goto LookForLink;
1356 }
1357 }
1358
1359 sis_priv->timer.expires = jiffies + next_tick;
1360 add_timer(&sis_priv->timer);
1361 }
1362
1363 /**
1364 * sis900_check_mode - check the media mode for sis900
1365 * @net_dev: the net device to be checked
1366 * @mii_phy: the mii phy
1367 *
1368 * Older driver gets the media mode from mii status output
1369 * register. Now we set our media capability and auto-negotiate
1370 * to get the upper bound of speed and duplex between two ends.
1371 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1372 * and autong_complete should be set to 1.
1373 */
1374
1375 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1376 {
1377 struct sis900_private *sis_priv = netdev_priv(net_dev);
1378 void __iomem *ioaddr = sis_priv->ioaddr;
1379 int speed, duplex;
1380
1381 if (mii_phy->phy_types == LAN) {
1382 sw32(cfg, ~EXD & sr32(cfg));
1383 sis900_set_capability(net_dev , mii_phy);
1384 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1385 } else {
1386 sw32(cfg, EXD | sr32(cfg));
1387 speed = HW_SPEED_HOME;
1388 duplex = FDX_CAPABLE_HALF_SELECTED;
1389 sis900_set_mode(sis_priv, speed, duplex);
1390 sis_priv->autong_complete = 1;
1391 }
1392 }
1393
1394 /**
1395 * sis900_set_mode - Set the media mode of mac register.
1396 * @sp: the device private data
1397 * @speed : the transmit speed to be determined
1398 * @duplex: the duplex mode to be determined
1399 *
1400 * Set the media mode of mac register txcfg/rxcfg according to
1401 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1402 * bus is used instead of PCI bus. When this bit is set 1, the
1403 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1404 * double words.
1405 */
1406
1407 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1408 {
1409 void __iomem *ioaddr = sp->ioaddr;
1410 u32 tx_flags = 0, rx_flags = 0;
1411
1412 if (sr32( cfg) & EDB_MASTER_EN) {
1413 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1414 (TX_FILL_THRESH << TxFILLT_shift);
1415 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1416 } else {
1417 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1418 (TX_FILL_THRESH << TxFILLT_shift);
1419 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1420 }
1421
1422 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1423 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1424 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1425 } else {
1426 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1427 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1428 }
1429
1430 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1431 tx_flags |= (TxCSI | TxHBI);
1432 rx_flags |= RxATX;
1433 }
1434
1435 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1436 /* Can accept Jumbo packet */
1437 rx_flags |= RxAJAB;
1438 #endif
1439
1440 sw32(txcfg, tx_flags);
1441 sw32(rxcfg, rx_flags);
1442 }
1443
1444 /**
1445 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1446 * @net_dev: the net device to read mode for
1447 * @phy_addr: mii phy address
1448 *
1449 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1450 * autong_complete should be set to 0 when starting auto-negotiation.
1451 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1452 * sis900_timer will wait for link on again if autong_complete = 0.
1453 */
1454
1455 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1456 {
1457 struct sis900_private *sis_priv = netdev_priv(net_dev);
1458 int i = 0;
1459 u32 status;
1460
1461 for (i = 0; i < 2; i++)
1462 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1463
1464 if (!(status & MII_STAT_LINK)){
1465 if(netif_msg_link(sis_priv))
1466 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1467 sis_priv->autong_complete = 1;
1468 netif_carrier_off(net_dev);
1469 return;
1470 }
1471
1472 /* (Re)start AutoNegotiate */
1473 mdio_write(net_dev, phy_addr, MII_CONTROL,
1474 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1475 sis_priv->autong_complete = 0;
1476 }
1477
1478
1479 /**
1480 * sis900_read_mode - read media mode for sis900 internal phy
1481 * @net_dev: the net device to read mode for
1482 * @speed : the transmit speed to be determined
1483 * @duplex : the duplex mode to be determined
1484 *
1485 * The capability of remote end will be put in mii register autorec
1486 * after auto-negotiation. Use AND operation to get the upper bound
1487 * of speed and duplex between two ends.
1488 */
1489
1490 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1491 {
1492 struct sis900_private *sis_priv = netdev_priv(net_dev);
1493 struct mii_phy *phy = sis_priv->mii;
1494 int phy_addr = sis_priv->cur_phy;
1495 u32 status;
1496 u16 autoadv, autorec;
1497 int i;
1498
1499 for (i = 0; i < 2; i++)
1500 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1501
1502 if (!(status & MII_STAT_LINK))
1503 return;
1504
1505 /* AutoNegotiate completed */
1506 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1507 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1508 status = autoadv & autorec;
1509
1510 *speed = HW_SPEED_10_MBPS;
1511 *duplex = FDX_CAPABLE_HALF_SELECTED;
1512
1513 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1514 *speed = HW_SPEED_100_MBPS;
1515 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1516 *duplex = FDX_CAPABLE_FULL_SELECTED;
1517
1518 sis_priv->autong_complete = 1;
1519
1520 /* Workaround for Realtek RTL8201 PHY issue */
1521 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1522 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1523 *duplex = FDX_CAPABLE_FULL_SELECTED;
1524 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1525 *speed = HW_SPEED_100_MBPS;
1526 }
1527
1528 if(netif_msg_link(sis_priv))
1529 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1530 net_dev->name,
1531 *speed == HW_SPEED_100_MBPS ?
1532 "100mbps" : "10mbps",
1533 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1534 "full" : "half");
1535 }
1536
1537 /**
1538 * sis900_tx_timeout - sis900 transmit timeout routine
1539 * @net_dev: the net device to transmit
1540 *
1541 * print transmit timeout status
1542 * disable interrupts and do some tasks
1543 */
1544
1545 static void sis900_tx_timeout(struct net_device *net_dev)
1546 {
1547 struct sis900_private *sis_priv = netdev_priv(net_dev);
1548 void __iomem *ioaddr = sis_priv->ioaddr;
1549 unsigned long flags;
1550 int i;
1551
1552 if (netif_msg_tx_err(sis_priv)) {
1553 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1554 net_dev->name, sr32(cr), sr32(isr));
1555 }
1556
1557 /* Disable interrupts by clearing the interrupt mask. */
1558 sw32(imr, 0x0000);
1559
1560 /* use spinlock to prevent interrupt handler accessing buffer ring */
1561 spin_lock_irqsave(&sis_priv->lock, flags);
1562
1563 /* discard unsent packets */
1564 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1565 for (i = 0; i < NUM_TX_DESC; i++) {
1566 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1567
1568 if (skb) {
1569 pci_unmap_single(sis_priv->pci_dev,
1570 sis_priv->tx_ring[i].bufptr, skb->len,
1571 PCI_DMA_TODEVICE);
1572 dev_kfree_skb_irq(skb);
1573 sis_priv->tx_skbuff[i] = NULL;
1574 sis_priv->tx_ring[i].cmdsts = 0;
1575 sis_priv->tx_ring[i].bufptr = 0;
1576 net_dev->stats.tx_dropped++;
1577 }
1578 }
1579 sis_priv->tx_full = 0;
1580 netif_wake_queue(net_dev);
1581
1582 spin_unlock_irqrestore(&sis_priv->lock, flags);
1583
1584 net_dev->trans_start = jiffies; /* prevent tx timeout */
1585
1586 /* load Transmit Descriptor Register */
1587 sw32(txdp, sis_priv->tx_ring_dma);
1588
1589 /* Enable all known interrupts by setting the interrupt mask. */
1590 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
1591 }
1592
1593 /**
1594 * sis900_start_xmit - sis900 start transmit routine
1595 * @skb: socket buffer pointer to put the data being transmitted
1596 * @net_dev: the net device to transmit with
1597 *
1598 * Set the transmit buffer descriptor,
1599 * and write TxENA to enable transmit state machine.
1600 * tell upper layer if the buffer is full
1601 */
1602
1603 static netdev_tx_t
1604 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1605 {
1606 struct sis900_private *sis_priv = netdev_priv(net_dev);
1607 void __iomem *ioaddr = sis_priv->ioaddr;
1608 unsigned int entry;
1609 unsigned long flags;
1610 unsigned int index_cur_tx, index_dirty_tx;
1611 unsigned int count_dirty_tx;
1612
1613 spin_lock_irqsave(&sis_priv->lock, flags);
1614
1615 /* Calculate the next Tx descriptor entry. */
1616 entry = sis_priv->cur_tx % NUM_TX_DESC;
1617 sis_priv->tx_skbuff[entry] = skb;
1618
1619 /* set the transmit buffer descriptor and enable Transmit State Machine */
1620 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1621 skb->data, skb->len, PCI_DMA_TODEVICE);
1622 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1623 sis_priv->tx_ring[entry].bufptr))) {
1624 dev_kfree_skb(skb);
1625 sis_priv->tx_skbuff[entry] = NULL;
1626 net_dev->stats.tx_dropped++;
1627 spin_unlock_irqrestore(&sis_priv->lock, flags);
1628 return NETDEV_TX_OK;
1629 }
1630 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1631 sw32(cr, TxENA | sr32(cr));
1632
1633 sis_priv->cur_tx ++;
1634 index_cur_tx = sis_priv->cur_tx;
1635 index_dirty_tx = sis_priv->dirty_tx;
1636
1637 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1638 count_dirty_tx ++;
1639
1640 if (index_cur_tx == index_dirty_tx) {
1641 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1642 sis_priv->tx_full = 1;
1643 netif_stop_queue(net_dev);
1644 } else if (count_dirty_tx < NUM_TX_DESC) {
1645 /* Typical path, tell upper layer that more transmission is possible */
1646 netif_start_queue(net_dev);
1647 } else {
1648 /* buffer full, tell upper layer no more transmission */
1649 sis_priv->tx_full = 1;
1650 netif_stop_queue(net_dev);
1651 }
1652
1653 spin_unlock_irqrestore(&sis_priv->lock, flags);
1654
1655 if (netif_msg_tx_queued(sis_priv))
1656 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1657 "to slot %d.\n",
1658 net_dev->name, skb->data, (int)skb->len, entry);
1659
1660 return NETDEV_TX_OK;
1661 }
1662
1663 /**
1664 * sis900_interrupt - sis900 interrupt handler
1665 * @irq: the irq number
1666 * @dev_instance: the client data object
1667 *
1668 * The interrupt handler does all of the Rx thread work,
1669 * and cleans up after the Tx thread
1670 */
1671
1672 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1673 {
1674 struct net_device *net_dev = dev_instance;
1675 struct sis900_private *sis_priv = netdev_priv(net_dev);
1676 int boguscnt = max_interrupt_work;
1677 void __iomem *ioaddr = sis_priv->ioaddr;
1678 u32 status;
1679 unsigned int handled = 0;
1680
1681 spin_lock (&sis_priv->lock);
1682
1683 do {
1684 status = sr32(isr);
1685
1686 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1687 /* nothing intresting happened */
1688 break;
1689 handled = 1;
1690
1691 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1692 if (status & (RxORN | RxERR | RxOK))
1693 /* Rx interrupt */
1694 sis900_rx(net_dev);
1695
1696 if (status & (TxURN | TxERR | TxIDLE))
1697 /* Tx interrupt */
1698 sis900_finish_xmit(net_dev);
1699
1700 /* something strange happened !!! */
1701 if (status & HIBERR) {
1702 if(netif_msg_intr(sis_priv))
1703 printk(KERN_INFO "%s: Abnormal interrupt, "
1704 "status %#8.8x.\n", net_dev->name, status);
1705 break;
1706 }
1707 if (--boguscnt < 0) {
1708 if(netif_msg_intr(sis_priv))
1709 printk(KERN_INFO "%s: Too much work at interrupt, "
1710 "interrupt status = %#8.8x.\n",
1711 net_dev->name, status);
1712 break;
1713 }
1714 } while (1);
1715
1716 if(netif_msg_intr(sis_priv))
1717 printk(KERN_DEBUG "%s: exiting interrupt, "
1718 "interrupt status = 0x%#8.8x.\n",
1719 net_dev->name, sr32(isr));
1720
1721 spin_unlock (&sis_priv->lock);
1722 return IRQ_RETVAL(handled);
1723 }
1724
1725 /**
1726 * sis900_rx - sis900 receive routine
1727 * @net_dev: the net device which receives data
1728 *
1729 * Process receive interrupt events,
1730 * put buffer to higher layer and refill buffer pool
1731 * Note: This function is called by interrupt handler,
1732 * don't do "too much" work here
1733 */
1734
1735 static int sis900_rx(struct net_device *net_dev)
1736 {
1737 struct sis900_private *sis_priv = netdev_priv(net_dev);
1738 void __iomem *ioaddr = sis_priv->ioaddr;
1739 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1740 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1741 int rx_work_limit;
1742
1743 if (netif_msg_rx_status(sis_priv))
1744 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1745 "status:0x%8.8x\n",
1746 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1747 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1748
1749 while (rx_status & OWN) {
1750 unsigned int rx_size;
1751 unsigned int data_size;
1752
1753 if (--rx_work_limit < 0)
1754 break;
1755
1756 data_size = rx_status & DSIZE;
1757 rx_size = data_size - CRC_SIZE;
1758
1759 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1760 /* ``TOOLONG'' flag means jumbo packet received. */
1761 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1762 rx_status &= (~ ((unsigned int)TOOLONG));
1763 #endif
1764
1765 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1766 /* corrupted packet received */
1767 if (netif_msg_rx_err(sis_priv))
1768 printk(KERN_DEBUG "%s: Corrupted packet "
1769 "received, buffer status = 0x%8.8x/%d.\n",
1770 net_dev->name, rx_status, data_size);
1771 net_dev->stats.rx_errors++;
1772 if (rx_status & OVERRUN)
1773 net_dev->stats.rx_over_errors++;
1774 if (rx_status & (TOOLONG|RUNT))
1775 net_dev->stats.rx_length_errors++;
1776 if (rx_status & (RXISERR | FAERR))
1777 net_dev->stats.rx_frame_errors++;
1778 if (rx_status & CRCERR)
1779 net_dev->stats.rx_crc_errors++;
1780 /* reset buffer descriptor state */
1781 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1782 } else {
1783 struct sk_buff * skb;
1784 struct sk_buff * rx_skb;
1785
1786 pci_unmap_single(sis_priv->pci_dev,
1787 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1788 PCI_DMA_FROMDEVICE);
1789
1790 /* refill the Rx buffer, what if there is not enough
1791 * memory for new socket buffer ?? */
1792 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1793 /*
1794 * Not enough memory to refill the buffer
1795 * so we need to recycle the old one so
1796 * as to avoid creating a memory hole
1797 * in the rx ring
1798 */
1799 skb = sis_priv->rx_skbuff[entry];
1800 net_dev->stats.rx_dropped++;
1801 goto refill_rx_ring;
1802 }
1803
1804 /* This situation should never happen, but due to
1805 some unknown bugs, it is possible that
1806 we are working on NULL sk_buff :-( */
1807 if (sis_priv->rx_skbuff[entry] == NULL) {
1808 if (netif_msg_rx_err(sis_priv))
1809 printk(KERN_WARNING "%s: NULL pointer "
1810 "encountered in Rx ring\n"
1811 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1812 net_dev->name, sis_priv->cur_rx,
1813 sis_priv->dirty_rx);
1814 dev_kfree_skb(skb);
1815 break;
1816 }
1817
1818 /* give the socket buffer to upper layers */
1819 rx_skb = sis_priv->rx_skbuff[entry];
1820 skb_put(rx_skb, rx_size);
1821 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1822 netif_rx(rx_skb);
1823
1824 /* some network statistics */
1825 if ((rx_status & BCAST) == MCAST)
1826 net_dev->stats.multicast++;
1827 net_dev->stats.rx_bytes += rx_size;
1828 net_dev->stats.rx_packets++;
1829 sis_priv->dirty_rx++;
1830 refill_rx_ring:
1831 sis_priv->rx_skbuff[entry] = skb;
1832 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1833 sis_priv->rx_ring[entry].bufptr =
1834 pci_map_single(sis_priv->pci_dev, skb->data,
1835 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1836 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1837 sis_priv->rx_ring[entry].bufptr))) {
1838 dev_kfree_skb_irq(skb);
1839 sis_priv->rx_skbuff[entry] = NULL;
1840 break;
1841 }
1842 }
1843 sis_priv->cur_rx++;
1844 entry = sis_priv->cur_rx % NUM_RX_DESC;
1845 rx_status = sis_priv->rx_ring[entry].cmdsts;
1846 } // while
1847
1848 /* refill the Rx buffer, what if the rate of refilling is slower
1849 * than consuming ?? */
1850 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1851 struct sk_buff *skb;
1852
1853 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1854
1855 if (sis_priv->rx_skbuff[entry] == NULL) {
1856 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE);
1857 if (skb == NULL) {
1858 /* not enough memory for skbuff, this makes a
1859 * "hole" on the buffer ring, it is not clear
1860 * how the hardware will react to this kind
1861 * of degenerated buffer */
1862 net_dev->stats.rx_dropped++;
1863 break;
1864 }
1865 sis_priv->rx_skbuff[entry] = skb;
1866 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1867 sis_priv->rx_ring[entry].bufptr =
1868 pci_map_single(sis_priv->pci_dev, skb->data,
1869 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1870 if (unlikely(pci_dma_mapping_error(sis_priv->pci_dev,
1871 sis_priv->rx_ring[entry].bufptr))) {
1872 dev_kfree_skb_irq(skb);
1873 sis_priv->rx_skbuff[entry] = NULL;
1874 break;
1875 }
1876 }
1877 }
1878 /* re-enable the potentially idle receive state matchine */
1879 sw32(cr , RxENA | sr32(cr));
1880
1881 return 0;
1882 }
1883
1884 /**
1885 * sis900_finish_xmit - finish up transmission of packets
1886 * @net_dev: the net device to be transmitted on
1887 *
1888 * Check for error condition and free socket buffer etc
1889 * schedule for more transmission as needed
1890 * Note: This function is called by interrupt handler,
1891 * don't do "too much" work here
1892 */
1893
1894 static void sis900_finish_xmit (struct net_device *net_dev)
1895 {
1896 struct sis900_private *sis_priv = netdev_priv(net_dev);
1897
1898 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1899 struct sk_buff *skb;
1900 unsigned int entry;
1901 u32 tx_status;
1902
1903 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1904 tx_status = sis_priv->tx_ring[entry].cmdsts;
1905
1906 if (tx_status & OWN) {
1907 /* The packet is not transmitted yet (owned by hardware) !
1908 * Note: the interrupt is generated only when Tx Machine
1909 * is idle, so this is an almost impossible case */
1910 break;
1911 }
1912
1913 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1914 /* packet unsuccessfully transmitted */
1915 if (netif_msg_tx_err(sis_priv))
1916 printk(KERN_DEBUG "%s: Transmit "
1917 "error, Tx status %8.8x.\n",
1918 net_dev->name, tx_status);
1919 net_dev->stats.tx_errors++;
1920 if (tx_status & UNDERRUN)
1921 net_dev->stats.tx_fifo_errors++;
1922 if (tx_status & ABORT)
1923 net_dev->stats.tx_aborted_errors++;
1924 if (tx_status & NOCARRIER)
1925 net_dev->stats.tx_carrier_errors++;
1926 if (tx_status & OWCOLL)
1927 net_dev->stats.tx_window_errors++;
1928 } else {
1929 /* packet successfully transmitted */
1930 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1931 net_dev->stats.tx_bytes += tx_status & DSIZE;
1932 net_dev->stats.tx_packets++;
1933 }
1934 /* Free the original skb. */
1935 skb = sis_priv->tx_skbuff[entry];
1936 pci_unmap_single(sis_priv->pci_dev,
1937 sis_priv->tx_ring[entry].bufptr, skb->len,
1938 PCI_DMA_TODEVICE);
1939 dev_kfree_skb_irq(skb);
1940 sis_priv->tx_skbuff[entry] = NULL;
1941 sis_priv->tx_ring[entry].bufptr = 0;
1942 sis_priv->tx_ring[entry].cmdsts = 0;
1943 }
1944
1945 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1946 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1947 /* The ring is no longer full, clear tx_full and schedule
1948 * more transmission by netif_wake_queue(net_dev) */
1949 sis_priv->tx_full = 0;
1950 netif_wake_queue (net_dev);
1951 }
1952 }
1953
1954 /**
1955 * sis900_close - close sis900 device
1956 * @net_dev: the net device to be closed
1957 *
1958 * Disable interrupts, stop the Tx and Rx Status Machine
1959 * free Tx and RX socket buffer
1960 */
1961
1962 static int sis900_close(struct net_device *net_dev)
1963 {
1964 struct sis900_private *sis_priv = netdev_priv(net_dev);
1965 struct pci_dev *pdev = sis_priv->pci_dev;
1966 void __iomem *ioaddr = sis_priv->ioaddr;
1967 struct sk_buff *skb;
1968 int i;
1969
1970 netif_stop_queue(net_dev);
1971
1972 /* Disable interrupts by clearing the interrupt mask. */
1973 sw32(imr, 0x0000);
1974 sw32(ier, 0x0000);
1975
1976 /* Stop the chip's Tx and Rx Status Machine */
1977 sw32(cr, RxDIS | TxDIS | sr32(cr));
1978
1979 del_timer(&sis_priv->timer);
1980
1981 free_irq(pdev->irq, net_dev);
1982
1983 /* Free Tx and RX skbuff */
1984 for (i = 0; i < NUM_RX_DESC; i++) {
1985 skb = sis_priv->rx_skbuff[i];
1986 if (skb) {
1987 pci_unmap_single(pdev, sis_priv->rx_ring[i].bufptr,
1988 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1989 dev_kfree_skb(skb);
1990 sis_priv->rx_skbuff[i] = NULL;
1991 }
1992 }
1993 for (i = 0; i < NUM_TX_DESC; i++) {
1994 skb = sis_priv->tx_skbuff[i];
1995 if (skb) {
1996 pci_unmap_single(pdev, sis_priv->tx_ring[i].bufptr,
1997 skb->len, PCI_DMA_TODEVICE);
1998 dev_kfree_skb(skb);
1999 sis_priv->tx_skbuff[i] = NULL;
2000 }
2001 }
2002
2003 /* Green! Put the chip in low-power mode. */
2004
2005 return 0;
2006 }
2007
2008 /**
2009 * sis900_get_drvinfo - Return information about driver
2010 * @net_dev: the net device to probe
2011 * @info: container for info returned
2012 *
2013 * Process ethtool command such as "ehtool -i" to show information
2014 */
2015
2016 static void sis900_get_drvinfo(struct net_device *net_dev,
2017 struct ethtool_drvinfo *info)
2018 {
2019 struct sis900_private *sis_priv = netdev_priv(net_dev);
2020
2021 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
2022 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
2023 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
2024 sizeof(info->bus_info));
2025 }
2026
2027 static u32 sis900_get_msglevel(struct net_device *net_dev)
2028 {
2029 struct sis900_private *sis_priv = netdev_priv(net_dev);
2030 return sis_priv->msg_enable;
2031 }
2032
2033 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2034 {
2035 struct sis900_private *sis_priv = netdev_priv(net_dev);
2036 sis_priv->msg_enable = value;
2037 }
2038
2039 static u32 sis900_get_link(struct net_device *net_dev)
2040 {
2041 struct sis900_private *sis_priv = netdev_priv(net_dev);
2042 return mii_link_ok(&sis_priv->mii_info);
2043 }
2044
2045 static int sis900_get_settings(struct net_device *net_dev,
2046 struct ethtool_cmd *cmd)
2047 {
2048 struct sis900_private *sis_priv = netdev_priv(net_dev);
2049 spin_lock_irq(&sis_priv->lock);
2050 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2051 spin_unlock_irq(&sis_priv->lock);
2052 return 0;
2053 }
2054
2055 static int sis900_set_settings(struct net_device *net_dev,
2056 struct ethtool_cmd *cmd)
2057 {
2058 struct sis900_private *sis_priv = netdev_priv(net_dev);
2059 int rt;
2060 spin_lock_irq(&sis_priv->lock);
2061 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2062 spin_unlock_irq(&sis_priv->lock);
2063 return rt;
2064 }
2065
2066 static int sis900_nway_reset(struct net_device *net_dev)
2067 {
2068 struct sis900_private *sis_priv = netdev_priv(net_dev);
2069 return mii_nway_restart(&sis_priv->mii_info);
2070 }
2071
2072 /**
2073 * sis900_set_wol - Set up Wake on Lan registers
2074 * @net_dev: the net device to probe
2075 * @wol: container for info passed to the driver
2076 *
2077 * Process ethtool command "wol" to setup wake on lan features.
2078 * SiS900 supports sending WoL events if a correct packet is received,
2079 * but there is no simple way to filter them to only a subset (broadcast,
2080 * multicast, unicast or arp).
2081 */
2082
2083 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2084 {
2085 struct sis900_private *sis_priv = netdev_priv(net_dev);
2086 void __iomem *ioaddr = sis_priv->ioaddr;
2087 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2088
2089 if (wol->wolopts == 0) {
2090 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2091 cfgpmcsr &= ~PME_EN;
2092 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2093 sw32(pmctrl, pmctrl_bits);
2094 if (netif_msg_wol(sis_priv))
2095 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2096 return 0;
2097 }
2098
2099 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2100 | WAKE_BCAST | WAKE_ARP))
2101 return -EINVAL;
2102
2103 if (wol->wolopts & WAKE_MAGIC)
2104 pmctrl_bits |= MAGICPKT;
2105 if (wol->wolopts & WAKE_PHY)
2106 pmctrl_bits |= LINKON;
2107
2108 sw32(pmctrl, pmctrl_bits);
2109
2110 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2111 cfgpmcsr |= PME_EN;
2112 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2113 if (netif_msg_wol(sis_priv))
2114 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2115
2116 return 0;
2117 }
2118
2119 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2120 {
2121 struct sis900_private *sp = netdev_priv(net_dev);
2122 void __iomem *ioaddr = sp->ioaddr;
2123 u32 pmctrl_bits;
2124
2125 pmctrl_bits = sr32(pmctrl);
2126 if (pmctrl_bits & MAGICPKT)
2127 wol->wolopts |= WAKE_MAGIC;
2128 if (pmctrl_bits & LINKON)
2129 wol->wolopts |= WAKE_PHY;
2130
2131 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2132 }
2133
2134 static const struct ethtool_ops sis900_ethtool_ops = {
2135 .get_drvinfo = sis900_get_drvinfo,
2136 .get_msglevel = sis900_get_msglevel,
2137 .set_msglevel = sis900_set_msglevel,
2138 .get_link = sis900_get_link,
2139 .get_settings = sis900_get_settings,
2140 .set_settings = sis900_set_settings,
2141 .nway_reset = sis900_nway_reset,
2142 .get_wol = sis900_get_wol,
2143 .set_wol = sis900_set_wol
2144 };
2145
2146 /**
2147 * mii_ioctl - process MII i/o control command
2148 * @net_dev: the net device to command for
2149 * @rq: parameter for command
2150 * @cmd: the i/o command
2151 *
2152 * Process MII command like read/write MII register
2153 */
2154
2155 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2156 {
2157 struct sis900_private *sis_priv = netdev_priv(net_dev);
2158 struct mii_ioctl_data *data = if_mii(rq);
2159
2160 switch(cmd) {
2161 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2162 data->phy_id = sis_priv->mii->phy_addr;
2163 /* Fall Through */
2164
2165 case SIOCGMIIREG: /* Read MII PHY register. */
2166 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2167 return 0;
2168
2169 case SIOCSMIIREG: /* Write MII PHY register. */
2170 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2171 return 0;
2172 default:
2173 return -EOPNOTSUPP;
2174 }
2175 }
2176
2177 /**
2178 * sis900_set_config - Set media type by net_device.set_config
2179 * @dev: the net device for media type change
2180 * @map: ifmap passed by ifconfig
2181 *
2182 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2183 * we support only port changes. All other runtime configuration
2184 * changes will be ignored
2185 */
2186
2187 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2188 {
2189 struct sis900_private *sis_priv = netdev_priv(dev);
2190 struct mii_phy *mii_phy = sis_priv->mii;
2191
2192 u16 status;
2193
2194 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2195 /* we switch on the ifmap->port field. I couldn't find anything
2196 * like a definition or standard for the values of that field.
2197 * I think the meaning of those values is device specific. But
2198 * since I would like to change the media type via the ifconfig
2199 * command I use the definition from linux/netdevice.h
2200 * (which seems to be different from the ifport(pcmcia) definition) */
2201 switch(map->port){
2202 case IF_PORT_UNKNOWN: /* use auto here */
2203 dev->if_port = map->port;
2204 /* we are going to change the media type, so the Link
2205 * will be temporary down and we need to reflect that
2206 * here. When the Link comes up again, it will be
2207 * sensed by the sis_timer procedure, which also does
2208 * all the rest for us */
2209 netif_carrier_off(dev);
2210
2211 /* read current state */
2212 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2213
2214 /* enable auto negotiation and reset the negotioation
2215 * (I don't really know what the auto negatiotiation
2216 * reset really means, but it sounds for me right to
2217 * do one here) */
2218 mdio_write(dev, mii_phy->phy_addr,
2219 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2220
2221 break;
2222
2223 case IF_PORT_10BASET: /* 10BaseT */
2224 dev->if_port = map->port;
2225
2226 /* we are going to change the media type, so the Link
2227 * will be temporary down and we need to reflect that
2228 * here. When the Link comes up again, it will be
2229 * sensed by the sis_timer procedure, which also does
2230 * all the rest for us */
2231 netif_carrier_off(dev);
2232
2233 /* set Speed to 10Mbps */
2234 /* read current state */
2235 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2236
2237 /* disable auto negotiation and force 10MBit mode*/
2238 mdio_write(dev, mii_phy->phy_addr,
2239 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2240 MII_CNTL_AUTO));
2241 break;
2242
2243 case IF_PORT_100BASET: /* 100BaseT */
2244 case IF_PORT_100BASETX: /* 100BaseTx */
2245 dev->if_port = map->port;
2246
2247 /* we are going to change the media type, so the Link
2248 * will be temporary down and we need to reflect that
2249 * here. When the Link comes up again, it will be
2250 * sensed by the sis_timer procedure, which also does
2251 * all the rest for us */
2252 netif_carrier_off(dev);
2253
2254 /* set Speed to 100Mbps */
2255 /* disable auto negotiation and enable 100MBit Mode */
2256 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2257 mdio_write(dev, mii_phy->phy_addr,
2258 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2259 MII_CNTL_SPEED);
2260
2261 break;
2262
2263 case IF_PORT_10BASE2: /* 10Base2 */
2264 case IF_PORT_AUI: /* AUI */
2265 case IF_PORT_100BASEFX: /* 100BaseFx */
2266 /* These Modes are not supported (are they?)*/
2267 return -EOPNOTSUPP;
2268 break;
2269
2270 default:
2271 return -EINVAL;
2272 }
2273 }
2274 return 0;
2275 }
2276
2277 /**
2278 * sis900_mcast_bitnr - compute hashtable index
2279 * @addr: multicast address
2280 * @revision: revision id of chip
2281 *
2282 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2283 * hash table, which makes this function a little bit different from other drivers
2284 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2285 * multicast hash table.
2286 */
2287
2288 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2289 {
2290
2291 u32 crc = ether_crc(6, addr);
2292
2293 /* leave 8 or 7 most siginifant bits */
2294 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2295 return (int)(crc >> 24);
2296 else
2297 return (int)(crc >> 25);
2298 }
2299
2300 /**
2301 * set_rx_mode - Set SiS900 receive mode
2302 * @net_dev: the net device to be set
2303 *
2304 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2305 * And set the appropriate multicast filter.
2306 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2307 */
2308
2309 static void set_rx_mode(struct net_device *net_dev)
2310 {
2311 struct sis900_private *sis_priv = netdev_priv(net_dev);
2312 void __iomem *ioaddr = sis_priv->ioaddr;
2313 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2314 int i, table_entries;
2315 u32 rx_mode;
2316
2317 /* 635 Hash Table entries = 256(2^16) */
2318 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2319 (sis_priv->chipset_rev == SIS900B_900_REV))
2320 table_entries = 16;
2321 else
2322 table_entries = 8;
2323
2324 if (net_dev->flags & IFF_PROMISC) {
2325 /* Accept any kinds of packets */
2326 rx_mode = RFPromiscuous;
2327 for (i = 0; i < table_entries; i++)
2328 mc_filter[i] = 0xffff;
2329 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
2330 (net_dev->flags & IFF_ALLMULTI)) {
2331 /* too many multicast addresses or accept all multicast packet */
2332 rx_mode = RFAAB | RFAAM;
2333 for (i = 0; i < table_entries; i++)
2334 mc_filter[i] = 0xffff;
2335 } else {
2336 /* Accept Broadcast packet, destination address matchs our
2337 * MAC address, use Receive Filter to reject unwanted MCAST
2338 * packets */
2339 struct netdev_hw_addr *ha;
2340 rx_mode = RFAAB;
2341
2342 netdev_for_each_mc_addr(ha, net_dev) {
2343 unsigned int bit_nr;
2344
2345 bit_nr = sis900_mcast_bitnr(ha->addr,
2346 sis_priv->chipset_rev);
2347 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2348 }
2349 }
2350
2351 /* update Multicast Hash Table in Receive Filter */
2352 for (i = 0; i < table_entries; i++) {
2353 /* why plus 0x04 ??, That makes the correct value for hash table. */
2354 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2355 sw32(rfdr, mc_filter[i]);
2356 }
2357
2358 sw32(rfcr, RFEN | rx_mode);
2359
2360 /* sis900 is capable of looping back packets at MAC level for
2361 * debugging purpose */
2362 if (net_dev->flags & IFF_LOOPBACK) {
2363 u32 cr_saved;
2364 /* We must disable Tx/Rx before setting loopback mode */
2365 cr_saved = sr32(cr);
2366 sw32(cr, cr_saved | TxDIS | RxDIS);
2367 /* enable loopback */
2368 sw32(txcfg, sr32(txcfg) | TxMLB);
2369 sw32(rxcfg, sr32(rxcfg) | RxATX);
2370 /* restore cr */
2371 sw32(cr, cr_saved);
2372 }
2373 }
2374
2375 /**
2376 * sis900_reset - Reset sis900 MAC
2377 * @net_dev: the net device to reset
2378 *
2379 * reset sis900 MAC and wait until finished
2380 * reset through command register
2381 * change backoff algorithm for 900B0 & 635 M/B
2382 */
2383
2384 static void sis900_reset(struct net_device *net_dev)
2385 {
2386 struct sis900_private *sis_priv = netdev_priv(net_dev);
2387 void __iomem *ioaddr = sis_priv->ioaddr;
2388 u32 status = TxRCMP | RxRCMP;
2389 int i;
2390
2391 sw32(ier, 0);
2392 sw32(imr, 0);
2393 sw32(rfcr, 0);
2394
2395 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2396
2397 /* Check that the chip has finished the reset. */
2398 for (i = 0; status && (i < 1000); i++)
2399 status ^= sr32(isr) & status;
2400
2401 if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2402 sis_priv->chipset_rev == SIS900B_900_REV)
2403 sw32(cfg, PESEL | RND_CNT);
2404 else
2405 sw32(cfg, PESEL);
2406 }
2407
2408 /**
2409 * sis900_remove - Remove sis900 device
2410 * @pci_dev: the pci device to be removed
2411 *
2412 * remove and release SiS900 net device
2413 */
2414
2415 static void sis900_remove(struct pci_dev *pci_dev)
2416 {
2417 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2418 struct sis900_private *sis_priv = netdev_priv(net_dev);
2419
2420 unregister_netdev(net_dev);
2421
2422 while (sis_priv->first_mii) {
2423 struct mii_phy *phy = sis_priv->first_mii;
2424
2425 sis_priv->first_mii = phy->next;
2426 kfree(phy);
2427 }
2428
2429 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2430 sis_priv->rx_ring_dma);
2431 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2432 sis_priv->tx_ring_dma);
2433 pci_iounmap(pci_dev, sis_priv->ioaddr);
2434 free_netdev(net_dev);
2435 pci_release_regions(pci_dev);
2436 pci_set_drvdata(pci_dev, NULL);
2437 }
2438
2439 #ifdef CONFIG_PM
2440
2441 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2442 {
2443 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2444 struct sis900_private *sis_priv = netdev_priv(net_dev);
2445 void __iomem *ioaddr = sis_priv->ioaddr;
2446
2447 if(!netif_running(net_dev))
2448 return 0;
2449
2450 netif_stop_queue(net_dev);
2451 netif_device_detach(net_dev);
2452
2453 /* Stop the chip's Tx and Rx Status Machine */
2454 sw32(cr, RxDIS | TxDIS | sr32(cr));
2455
2456 pci_set_power_state(pci_dev, PCI_D3hot);
2457 pci_save_state(pci_dev);
2458
2459 return 0;
2460 }
2461
2462 static int sis900_resume(struct pci_dev *pci_dev)
2463 {
2464 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2465 struct sis900_private *sis_priv = netdev_priv(net_dev);
2466 void __iomem *ioaddr = sis_priv->ioaddr;
2467
2468 if(!netif_running(net_dev))
2469 return 0;
2470 pci_restore_state(pci_dev);
2471 pci_set_power_state(pci_dev, PCI_D0);
2472
2473 sis900_init_rxfilter(net_dev);
2474
2475 sis900_init_tx_ring(net_dev);
2476 sis900_init_rx_ring(net_dev);
2477
2478 set_rx_mode(net_dev);
2479
2480 netif_device_attach(net_dev);
2481 netif_start_queue(net_dev);
2482
2483 /* Workaround for EDB */
2484 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2485
2486 /* Enable all known interrupts by setting the interrupt mask. */
2487 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxIDLE);
2488 sw32(cr, RxENA | sr32(cr));
2489 sw32(ier, IE);
2490
2491 sis900_check_mode(net_dev, sis_priv->mii);
2492
2493 return 0;
2494 }
2495 #endif /* CONFIG_PM */
2496
2497 static struct pci_driver sis900_pci_driver = {
2498 .name = SIS900_MODULE_NAME,
2499 .id_table = sis900_pci_tbl,
2500 .probe = sis900_probe,
2501 .remove = sis900_remove,
2502 #ifdef CONFIG_PM
2503 .suspend = sis900_suspend,
2504 .resume = sis900_resume,
2505 #endif /* CONFIG_PM */
2506 };
2507
2508 static int __init sis900_init_module(void)
2509 {
2510 /* when a module, this is printed whether or not devices are found in probe */
2511 #ifdef MODULE
2512 printk(version);
2513 #endif
2514
2515 return pci_register_driver(&sis900_pci_driver);
2516 }
2517
2518 static void __exit sis900_cleanup_module(void)
2519 {
2520 pci_unregister_driver(&sis900_pci_driver);
2521 }
2522
2523 module_init(sis900_init_module);
2524 module_exit(sis900_cleanup_module);
2525
Linux kernel - Deliverables
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