1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
62 #include <linux/acpi.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/property.h>
68 #define SMSC_CHIPNAME "smsc911x"
69 #define SMSC_MDIONAME "smsc911x-mdio"
70 #define SMSC_DRV_VERSION "2008-10-21"
72 MODULE_LICENSE("GPL");
73 MODULE_VERSION(SMSC_DRV_VERSION
);
74 MODULE_ALIAS("platform:smsc911x");
77 static int debug
= 16;
82 module_param(debug
, int, 0);
83 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
88 u32 (*reg_read
)(struct smsc911x_data
*pdata
, u32 reg
);
89 void (*reg_write
)(struct smsc911x_data
*pdata
, u32 reg
, u32 val
);
90 void (*rx_readfifo
)(struct smsc911x_data
*pdata
,
91 unsigned int *buf
, unsigned int wordcount
);
92 void (*tx_writefifo
)(struct smsc911x_data
*pdata
,
93 unsigned int *buf
, unsigned int wordcount
);
96 #define SMSC911X_NUM_SUPPLIES 2
98 struct smsc911x_data
{
103 /* used to decide which workarounds apply */
104 unsigned int generation
;
106 /* device configuration (copied from platform_data during probe) */
107 struct smsc911x_platform_config config
;
109 /* This needs to be acquired before calling any of below:
110 * smsc911x_mac_read(), smsc911x_mac_write()
114 /* spinlock to ensure register accesses are serialised */
117 struct phy_device
*phy_dev
;
118 struct mii_bus
*mii_bus
;
119 int phy_irq
[PHY_MAX_ADDR
];
120 unsigned int using_extphy
;
125 unsigned int gpio_setting
;
126 unsigned int gpio_orig_setting
;
127 struct net_device
*dev
;
128 struct napi_struct napi
;
130 unsigned int software_irq_signal
;
132 #ifdef USE_PHY_WORK_AROUND
133 #define MIN_PACKET_SIZE (64)
134 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
135 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
136 unsigned int resetcount
;
139 /* Members for Multicast filter workaround */
140 unsigned int multicast_update_pending
;
141 unsigned int set_bits_mask
;
142 unsigned int clear_bits_mask
;
146 /* register access functions */
147 const struct smsc911x_ops
*ops
;
150 struct regulator_bulk_data supplies
[SMSC911X_NUM_SUPPLIES
];
156 /* Easy access to information */
157 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
159 static inline u32
__smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
161 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
162 return readl(pdata
->ioaddr
+ reg
);
164 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
165 return ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
166 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
173 __smsc911x_reg_read_shift(struct smsc911x_data
*pdata
, u32 reg
)
175 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
176 return readl(pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
178 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
179 return (readw(pdata
->ioaddr
+
180 __smsc_shift(pdata
, reg
)) & 0xFFFF) |
181 ((readw(pdata
->ioaddr
+
182 __smsc_shift(pdata
, reg
+ 2)) & 0xFFFF) << 16);
188 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
193 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
194 data
= pdata
->ops
->reg_read(pdata
, reg
);
195 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
200 static inline void __smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
203 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
204 writel(val
, pdata
->ioaddr
+ reg
);
208 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
209 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
210 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
218 __smsc911x_reg_write_shift(struct smsc911x_data
*pdata
, u32 reg
, u32 val
)
220 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
221 writel(val
, pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
225 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
227 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
));
228 writew((val
>> 16) & 0xFFFF,
229 pdata
->ioaddr
+ __smsc_shift(pdata
, reg
+ 2));
236 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
241 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
242 pdata
->ops
->reg_write(pdata
, reg
, val
);
243 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
246 /* Writes a packet to the TX_DATA_FIFO */
248 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
249 unsigned int wordcount
)
253 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
255 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
257 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
,
262 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
263 iowrite32_rep(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
267 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
269 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
275 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
278 /* Writes a packet to the TX_DATA_FIFO - shifted version */
280 smsc911x_tx_writefifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
281 unsigned int wordcount
)
285 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
287 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
289 __smsc911x_reg_write_shift(pdata
, TX_DATA_FIFO
,
294 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
295 iowrite32_rep(pdata
->ioaddr
+ __smsc_shift(pdata
,
296 TX_DATA_FIFO
), buf
, wordcount
);
300 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
302 __smsc911x_reg_write_shift(pdata
,
303 TX_DATA_FIFO
, *buf
++);
309 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
312 /* Reads a packet out of the RX_DATA_FIFO */
314 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
315 unsigned int wordcount
)
319 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
321 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
323 *buf
++ = swab32(__smsc911x_reg_read(pdata
,
328 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
329 ioread32_rep(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
333 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
335 *buf
++ = __smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
341 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
344 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
346 smsc911x_rx_readfifo_shift(struct smsc911x_data
*pdata
, unsigned int *buf
,
347 unsigned int wordcount
)
351 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
353 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
355 *buf
++ = swab32(__smsc911x_reg_read_shift(pdata
,
360 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
361 ioread32_rep(pdata
->ioaddr
+ __smsc_shift(pdata
,
362 RX_DATA_FIFO
), buf
, wordcount
);
366 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
368 *buf
++ = __smsc911x_reg_read_shift(pdata
,
375 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
379 * enable regulator and clock resources.
381 static int smsc911x_enable_resources(struct platform_device
*pdev
)
383 struct net_device
*ndev
= platform_get_drvdata(pdev
);
384 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
387 ret
= regulator_bulk_enable(ARRAY_SIZE(pdata
->supplies
),
390 netdev_err(ndev
, "failed to enable regulators %d\n",
393 if (!IS_ERR(pdata
->clk
)) {
394 ret
= clk_prepare_enable(pdata
->clk
);
396 netdev_err(ndev
, "failed to enable clock %d\n", ret
);
403 * disable resources, currently just regulators.
405 static int smsc911x_disable_resources(struct platform_device
*pdev
)
407 struct net_device
*ndev
= platform_get_drvdata(pdev
);
408 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
411 ret
= regulator_bulk_disable(ARRAY_SIZE(pdata
->supplies
),
414 if (!IS_ERR(pdata
->clk
))
415 clk_disable_unprepare(pdata
->clk
);
421 * Request resources, currently just regulators.
423 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
424 * these are not always-on we need to request regulators to be turned on
425 * before we can try to access the device registers.
427 static int smsc911x_request_resources(struct platform_device
*pdev
)
429 struct net_device
*ndev
= platform_get_drvdata(pdev
);
430 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
433 /* Request regulators */
434 pdata
->supplies
[0].supply
= "vdd33a";
435 pdata
->supplies
[1].supply
= "vddvario";
436 ret
= regulator_bulk_get(&pdev
->dev
,
437 ARRAY_SIZE(pdata
->supplies
),
440 netdev_err(ndev
, "couldn't get regulators %d\n",
444 pdata
->clk
= clk_get(&pdev
->dev
, NULL
);
445 if (IS_ERR(pdata
->clk
))
446 dev_dbg(&pdev
->dev
, "couldn't get clock %li\n",
447 PTR_ERR(pdata
->clk
));
453 * Free resources, currently just regulators.
456 static void smsc911x_free_resources(struct platform_device
*pdev
)
458 struct net_device
*ndev
= platform_get_drvdata(pdev
);
459 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
461 /* Free regulators */
462 regulator_bulk_free(ARRAY_SIZE(pdata
->supplies
),
466 if (!IS_ERR(pdata
->clk
)) {
472 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
473 * and smsc911x_mac_write, so assumes mac_lock is held */
474 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
479 SMSC_ASSERT_MAC_LOCK(pdata
);
481 for (i
= 0; i
< 40; i
++) {
482 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
483 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
486 SMSC_WARN(pdata
, hw
, "Timed out waiting for MAC not BUSY. "
487 "MAC_CSR_CMD: 0x%08X", val
);
491 /* Fetches a MAC register value. Assumes mac_lock is acquired */
492 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
496 SMSC_ASSERT_MAC_LOCK(pdata
);
498 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
499 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
500 SMSC_WARN(pdata
, hw
, "MAC busy at entry");
504 /* Send the MAC cmd */
505 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
506 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
508 /* Workaround for hardware read-after-write restriction */
509 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
511 /* Wait for the read to complete */
512 if (likely(smsc911x_mac_complete(pdata
) == 0))
513 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
515 SMSC_WARN(pdata
, hw
, "MAC busy after read");
519 /* Set a mac register, mac_lock must be acquired before calling */
520 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
521 unsigned int offset
, u32 val
)
525 SMSC_ASSERT_MAC_LOCK(pdata
);
527 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
528 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
530 "smsc911x_mac_write failed, MAC busy at entry");
534 /* Send data to write */
535 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
537 /* Write the actual data */
538 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
539 MAC_CSR_CMD_CSR_BUSY_
));
541 /* Workaround for hardware read-after-write restriction */
542 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
544 /* Wait for the write to complete */
545 if (likely(smsc911x_mac_complete(pdata
) == 0))
548 SMSC_WARN(pdata
, hw
, "smsc911x_mac_write failed, MAC busy after write");
551 /* Get a phy register */
552 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
554 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
559 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
561 /* Confirm MII not busy */
562 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
563 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_read???");
568 /* Set the address, index & direction (read from PHY) */
569 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
570 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
572 /* Wait for read to complete w/ timeout */
573 for (i
= 0; i
< 100; i
++)
574 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
575 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
579 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII read to finish");
583 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
587 /* Set a phy register */
588 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
591 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
596 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
598 /* Confirm MII not busy */
599 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
600 SMSC_WARN(pdata
, hw
, "MII is busy in smsc911x_mii_write???");
605 /* Put the data to write in the MAC */
606 smsc911x_mac_write(pdata
, MII_DATA
, val
);
608 /* Set the address, index & direction (write to PHY) */
609 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
611 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
613 /* Wait for write to complete w/ timeout */
614 for (i
= 0; i
< 100; i
++)
615 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
620 SMSC_WARN(pdata
, hw
, "Timed out waiting for MII write to finish");
624 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
628 /* Switch to external phy. Assumes tx and rx are stopped. */
629 static void smsc911x_phy_enable_external(struct smsc911x_data
*pdata
)
631 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
633 /* Disable phy clocks to the MAC */
634 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
635 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
636 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
637 udelay(10); /* Enough time for clocks to stop */
639 /* Switch to external phy */
640 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
641 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
643 /* Enable phy clocks to the MAC */
644 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
645 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
646 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
647 udelay(10); /* Enough time for clocks to restart */
649 hwcfg
|= HW_CFG_SMI_SEL_
;
650 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
653 /* Autodetects and enables external phy if present on supported chips.
654 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
655 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
656 static void smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
658 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
660 if (pdata
->config
.flags
& SMSC911X_FORCE_INTERNAL_PHY
) {
661 SMSC_TRACE(pdata
, hw
, "Forcing internal PHY");
662 pdata
->using_extphy
= 0;
663 } else if (pdata
->config
.flags
& SMSC911X_FORCE_EXTERNAL_PHY
) {
664 SMSC_TRACE(pdata
, hw
, "Forcing external PHY");
665 smsc911x_phy_enable_external(pdata
);
666 pdata
->using_extphy
= 1;
667 } else if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
668 SMSC_TRACE(pdata
, hw
,
669 "HW_CFG EXT_PHY_DET set, using external PHY");
670 smsc911x_phy_enable_external(pdata
);
671 pdata
->using_extphy
= 1;
673 SMSC_TRACE(pdata
, hw
,
674 "HW_CFG EXT_PHY_DET clear, using internal PHY");
675 pdata
->using_extphy
= 0;
679 /* Fetches a tx status out of the status fifo */
680 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
682 unsigned int result
=
683 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
686 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
691 /* Fetches the next rx status */
692 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
694 unsigned int result
=
695 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
698 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
703 #ifdef USE_PHY_WORK_AROUND
704 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
711 for (tries
= 0; tries
< 10; tries
++) {
712 unsigned int txcmd_a
;
713 unsigned int txcmd_b
;
715 unsigned int pktlength
;
718 /* Zero-out rx packet memory */
719 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
721 /* Write tx packet to 118 */
722 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
723 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
724 txcmd_a
|= MIN_PACKET_SIZE
;
726 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
728 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
729 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
731 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
732 wrsz
= MIN_PACKET_SIZE
+ 3;
733 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
736 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
738 /* Wait till transmit is done */
742 status
= smsc911x_tx_get_txstatus(pdata
);
743 } while ((i
--) && (!status
));
747 "Failed to transmit during loopback test");
750 if (status
& TX_STS_ES_
) {
752 "Transmit encountered errors during loopback test");
756 /* Wait till receive is done */
760 status
= smsc911x_rx_get_rxstatus(pdata
);
761 } while ((i
--) && (!status
));
765 "Failed to receive during loopback test");
768 if (status
& RX_STS_ES_
) {
770 "Receive encountered errors during loopback test");
774 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
775 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
776 rdsz
= pktlength
+ 3;
777 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
780 pdata
->ops
->rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
782 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
783 SMSC_WARN(pdata
, hw
, "Unexpected packet size "
784 "during loop back test, size=%d, will retry",
789 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
790 if (pdata
->loopback_tx_pkt
[j
]
791 != pdata
->loopback_rx_pkt
[j
]) {
797 SMSC_TRACE(pdata
, hw
, "Successfully verified "
801 SMSC_WARN(pdata
, hw
, "Data mismatch "
802 "during loop back test, will retry");
810 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
813 unsigned int i
= 100000;
815 temp
= smsc911x_reg_read(pdata
, PMT_CTRL
);
816 smsc911x_reg_write(pdata
, PMT_CTRL
, temp
| PMT_CTRL_PHY_RST_
);
819 temp
= smsc911x_reg_read(pdata
, PMT_CTRL
);
820 } while ((i
--) && (temp
& PMT_CTRL_PHY_RST_
));
822 if (unlikely(temp
& PMT_CTRL_PHY_RST_
)) {
823 SMSC_WARN(pdata
, hw
, "PHY reset failed to complete");
826 /* Extra delay required because the phy may not be completed with
827 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
828 * enough delay but using 1ms here to be safe */
834 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
836 struct smsc911x_data
*pdata
= netdev_priv(dev
);
837 struct phy_device
*phy_dev
= pdata
->phy_dev
;
842 /* Initialise tx packet using broadcast destination address */
843 eth_broadcast_addr(pdata
->loopback_tx_pkt
);
845 /* Use incrementing source address */
846 for (i
= 6; i
< 12; i
++)
847 pdata
->loopback_tx_pkt
[i
] = (char)i
;
849 /* Set length type field */
850 pdata
->loopback_tx_pkt
[12] = 0x00;
851 pdata
->loopback_tx_pkt
[13] = 0x00;
853 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
854 pdata
->loopback_tx_pkt
[i
] = (char)i
;
856 val
= smsc911x_reg_read(pdata
, HW_CFG
);
857 val
&= HW_CFG_TX_FIF_SZ_
;
859 smsc911x_reg_write(pdata
, HW_CFG
, val
);
861 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
862 smsc911x_reg_write(pdata
, RX_CFG
,
863 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
865 for (i
= 0; i
< 10; i
++) {
866 /* Set PHY to 10/FD, no ANEG, and loopback mode */
867 smsc911x_mii_write(phy_dev
->mdio
.bus
, phy_dev
->mdio
.addr
,
868 MII_BMCR
, BMCR_LOOPBACK
| BMCR_FULLDPLX
);
870 /* Enable MAC tx/rx, FD */
871 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
872 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
873 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
874 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
876 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
883 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
884 smsc911x_mac_write(pdata
, MAC_CR
, 0);
885 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
887 smsc911x_phy_reset(pdata
);
891 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
892 smsc911x_mac_write(pdata
, MAC_CR
, 0);
893 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
895 /* Cancel PHY loopback mode */
896 smsc911x_mii_write(phy_dev
->mdio
.bus
, phy_dev
->mdio
.addr
, MII_BMCR
, 0);
898 smsc911x_reg_write(pdata
, TX_CFG
, 0);
899 smsc911x_reg_write(pdata
, RX_CFG
, 0);
903 #endif /* USE_PHY_WORK_AROUND */
905 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
907 struct phy_device
*phy_dev
= pdata
->phy_dev
;
908 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
912 if (phy_dev
->duplex
== DUPLEX_FULL
) {
913 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
914 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
915 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
917 if (cap
& FLOW_CTRL_RX
)
922 if (cap
& FLOW_CTRL_TX
)
927 SMSC_TRACE(pdata
, hw
, "rx pause %s, tx pause %s",
928 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
929 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
931 SMSC_TRACE(pdata
, hw
, "half duplex");
936 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
937 smsc911x_mac_write(pdata
, FLOW
, flow
);
938 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
940 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
943 /* Update link mode if anything has changed. Called periodically when the
944 * PHY is in polling mode, even if nothing has changed. */
945 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
947 struct smsc911x_data
*pdata
= netdev_priv(dev
);
948 struct phy_device
*phy_dev
= pdata
->phy_dev
;
952 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
954 SMSC_TRACE(pdata
, hw
, "duplex state has changed");
956 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
957 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
958 if (phy_dev
->duplex
) {
959 SMSC_TRACE(pdata
, hw
,
960 "configuring for full duplex mode");
961 mac_cr
|= MAC_CR_FDPX_
;
963 SMSC_TRACE(pdata
, hw
,
964 "configuring for half duplex mode");
965 mac_cr
&= ~MAC_CR_FDPX_
;
967 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
968 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
970 smsc911x_phy_update_flowcontrol(pdata
);
971 pdata
->last_duplex
= phy_dev
->duplex
;
974 carrier
= netif_carrier_ok(dev
);
975 if (carrier
!= pdata
->last_carrier
) {
976 SMSC_TRACE(pdata
, hw
, "carrier state has changed");
978 SMSC_TRACE(pdata
, hw
, "configuring for carrier OK");
979 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
980 (!pdata
->using_extphy
)) {
981 /* Restore original GPIO configuration */
982 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
983 smsc911x_reg_write(pdata
, GPIO_CFG
,
984 pdata
->gpio_setting
);
987 SMSC_TRACE(pdata
, hw
, "configuring for no carrier");
988 /* Check global setting that LED1
989 * usage is 10/100 indicator */
990 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
992 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
) &&
993 (!pdata
->using_extphy
)) {
994 /* Force 10/100 LED off, after saving
995 * original GPIO configuration */
996 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
998 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
999 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
1000 | GPIO_CFG_GPIODIR0_
1001 | GPIO_CFG_GPIOD0_
);
1002 smsc911x_reg_write(pdata
, GPIO_CFG
,
1003 pdata
->gpio_setting
);
1006 pdata
->last_carrier
= carrier
;
1010 static int smsc911x_mii_probe(struct net_device
*dev
)
1012 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1013 struct phy_device
*phydev
= NULL
;
1016 /* find the first phy */
1017 phydev
= phy_find_first(pdata
->mii_bus
);
1019 netdev_err(dev
, "no PHY found\n");
1023 SMSC_TRACE(pdata
, probe
, "PHY: addr %d, phy_id 0x%08X",
1024 phydev
->mdio
.addr
, phydev
->phy_id
);
1026 ret
= phy_connect_direct(dev
, phydev
, &smsc911x_phy_adjust_link
,
1027 pdata
->config
.phy_interface
);
1030 netdev_err(dev
, "Could not attach to PHY\n");
1034 phy_attached_info(phydev
);
1036 /* mask with MAC supported features */
1037 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
1038 SUPPORTED_Asym_Pause
);
1039 phydev
->advertising
= phydev
->supported
;
1041 pdata
->phy_dev
= phydev
;
1042 pdata
->last_duplex
= -1;
1043 pdata
->last_carrier
= -1;
1045 #ifdef USE_PHY_WORK_AROUND
1046 if (smsc911x_phy_loopbacktest(dev
) < 0) {
1047 SMSC_WARN(pdata
, hw
, "Failed Loop Back Test");
1048 phy_disconnect(phydev
);
1051 SMSC_TRACE(pdata
, hw
, "Passed Loop Back Test");
1052 #endif /* USE_PHY_WORK_AROUND */
1054 SMSC_TRACE(pdata
, hw
, "phy initialised successfully");
1058 static int smsc911x_mii_init(struct platform_device
*pdev
,
1059 struct net_device
*dev
)
1061 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1064 pdata
->mii_bus
= mdiobus_alloc();
1065 if (!pdata
->mii_bus
) {
1070 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
1071 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s-%x",
1072 pdev
->name
, pdev
->id
);
1073 pdata
->mii_bus
->priv
= pdata
;
1074 pdata
->mii_bus
->read
= smsc911x_mii_read
;
1075 pdata
->mii_bus
->write
= smsc911x_mii_write
;
1076 memcpy(pdata
->mii_bus
->irq
, pdata
->phy_irq
, sizeof(pdata
->mii_bus
));
1078 pdata
->mii_bus
->parent
= &pdev
->dev
;
1080 switch (pdata
->idrev
& 0xFFFF0000) {
1085 /* External PHY supported, try to autodetect */
1086 smsc911x_phy_initialise_external(pdata
);
1089 SMSC_TRACE(pdata
, hw
, "External PHY is not supported, "
1090 "using internal PHY");
1091 pdata
->using_extphy
= 0;
1095 if (!pdata
->using_extphy
) {
1096 /* Mask all PHYs except ID 1 (internal) */
1097 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
1100 if (mdiobus_register(pdata
->mii_bus
)) {
1101 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1102 goto err_out_free_bus_2
;
1105 if (smsc911x_mii_probe(dev
) < 0) {
1106 SMSC_WARN(pdata
, probe
, "Error registering mii bus");
1107 goto err_out_unregister_bus_3
;
1112 err_out_unregister_bus_3
:
1113 mdiobus_unregister(pdata
->mii_bus
);
1115 mdiobus_free(pdata
->mii_bus
);
1120 /* Gets the number of tx statuses in the fifo */
1121 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
1123 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
1124 & TX_FIFO_INF_TSUSED_
) >> 16;
1127 /* Reads tx statuses and increments counters where necessary */
1128 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
1130 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1131 unsigned int tx_stat
;
1133 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
1134 if (unlikely(tx_stat
& 0x80000000)) {
1135 /* In this driver the packet tag is used as the packet
1136 * length. Since a packet length can never reach the
1137 * size of 0x8000, this bit is reserved. It is worth
1138 * noting that the "reserved bit" in the warning above
1139 * does not reference a hardware defined reserved bit
1140 * but rather a driver defined one.
1142 SMSC_WARN(pdata
, hw
, "Packet tag reserved bit is high");
1144 if (unlikely(tx_stat
& TX_STS_ES_
)) {
1145 dev
->stats
.tx_errors
++;
1147 dev
->stats
.tx_packets
++;
1148 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
1150 if (unlikely(tx_stat
& TX_STS_EXCESS_COL_
)) {
1151 dev
->stats
.collisions
+= 16;
1152 dev
->stats
.tx_aborted_errors
+= 1;
1154 dev
->stats
.collisions
+=
1155 ((tx_stat
>> 3) & 0xF);
1157 if (unlikely(tx_stat
& TX_STS_LOST_CARRIER_
))
1158 dev
->stats
.tx_carrier_errors
+= 1;
1159 if (unlikely(tx_stat
& TX_STS_LATE_COL_
)) {
1160 dev
->stats
.collisions
++;
1161 dev
->stats
.tx_aborted_errors
++;
1167 /* Increments the Rx error counters */
1169 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
1173 if (unlikely(rxstat
& RX_STS_ES_
)) {
1174 dev
->stats
.rx_errors
++;
1175 if (unlikely(rxstat
& RX_STS_CRC_ERR_
)) {
1176 dev
->stats
.rx_crc_errors
++;
1180 if (likely(!crc_err
)) {
1181 if (unlikely((rxstat
& RX_STS_FRAME_TYPE_
) &&
1182 (rxstat
& RX_STS_LENGTH_ERR_
)))
1183 dev
->stats
.rx_length_errors
++;
1184 if (rxstat
& RX_STS_MCAST_
)
1185 dev
->stats
.multicast
++;
1189 /* Quickly dumps bad packets */
1191 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktwords
)
1193 if (likely(pktwords
>= 4)) {
1194 unsigned int timeout
= 500;
1196 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
1199 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
1200 } while ((val
& RX_DP_CTRL_RX_FFWD_
) && --timeout
);
1202 if (unlikely(timeout
== 0))
1203 SMSC_WARN(pdata
, hw
, "Timed out waiting for "
1204 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
1208 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
1212 /* NAPI poll function */
1213 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
1215 struct smsc911x_data
*pdata
=
1216 container_of(napi
, struct smsc911x_data
, napi
);
1217 struct net_device
*dev
= pdata
->dev
;
1220 while (npackets
< budget
) {
1221 unsigned int pktlength
;
1222 unsigned int pktwords
;
1223 struct sk_buff
*skb
;
1224 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
1228 /* We processed all packets available. Tell NAPI it can
1229 * stop polling then re-enable rx interrupts */
1230 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
1231 napi_complete(napi
);
1232 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1233 temp
|= INT_EN_RSFL_EN_
;
1234 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1238 /* Count packet for NAPI scheduling, even if it has an error.
1239 * Error packets still require cycles to discard */
1242 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1243 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1244 smsc911x_rx_counterrors(dev
, rxstat
);
1246 if (unlikely(rxstat
& RX_STS_ES_
)) {
1247 SMSC_WARN(pdata
, rx_err
,
1248 "Discarding packet with error bit set");
1249 /* Packet has an error, discard it and continue with
1251 smsc911x_rx_fastforward(pdata
, pktwords
);
1252 dev
->stats
.rx_dropped
++;
1256 skb
= netdev_alloc_skb(dev
, pktwords
<< 2);
1257 if (unlikely(!skb
)) {
1258 SMSC_WARN(pdata
, rx_err
,
1259 "Unable to allocate skb for rx packet");
1260 /* Drop the packet and stop this polling iteration */
1261 smsc911x_rx_fastforward(pdata
, pktwords
);
1262 dev
->stats
.rx_dropped
++;
1266 pdata
->ops
->rx_readfifo(pdata
,
1267 (unsigned int *)skb
->data
, pktwords
);
1269 /* Align IP on 16B boundary */
1270 skb_reserve(skb
, NET_IP_ALIGN
);
1271 skb_put(skb
, pktlength
- 4);
1272 skb
->protocol
= eth_type_trans(skb
, dev
);
1273 skb_checksum_none_assert(skb
);
1274 netif_receive_skb(skb
);
1276 /* Update counters */
1277 dev
->stats
.rx_packets
++;
1278 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1281 /* Return total received packets */
1285 /* Returns hash bit number for given MAC address
1287 * 01 00 5E 00 00 01 -> returns bit number 31 */
1288 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1290 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1293 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1295 /* Performs the multicast & mac_cr update. This is called when
1296 * safe on the current hardware, and with the mac_lock held */
1297 unsigned int mac_cr
;
1299 SMSC_ASSERT_MAC_LOCK(pdata
);
1301 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1302 mac_cr
|= pdata
->set_bits_mask
;
1303 mac_cr
&= ~(pdata
->clear_bits_mask
);
1304 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1305 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1306 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1307 SMSC_TRACE(pdata
, hw
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1308 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1311 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1313 unsigned int mac_cr
;
1315 /* This function is only called for older LAN911x devices
1316 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1317 * be modified during Rx - newer devices immediately update the
1320 * This is called from interrupt context */
1322 spin_lock(&pdata
->mac_lock
);
1324 /* Check Rx has stopped */
1325 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1326 SMSC_WARN(pdata
, drv
, "Rx not stopped");
1328 /* Perform the update - safe to do now Rx has stopped */
1329 smsc911x_rx_multicast_update(pdata
);
1332 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1333 mac_cr
|= MAC_CR_RXEN_
;
1334 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1336 pdata
->multicast_update_pending
= 0;
1338 spin_unlock(&pdata
->mac_lock
);
1341 static int smsc911x_phy_general_power_up(struct smsc911x_data
*pdata
)
1345 if (!pdata
->phy_dev
)
1348 /* If the internal PHY is in General Power-Down mode, all, except the
1349 * management interface, is powered-down and stays in that condition as
1350 * long as Phy register bit 0.11 is HIGH.
1352 * In that case, clear the bit 0.11, so the PHY powers up and we can
1353 * access to the phy registers.
1355 rc
= phy_read(pdata
->phy_dev
, MII_BMCR
);
1357 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1361 /* If the PHY general power-down bit is not set is not necessary to
1362 * disable the general power down-mode.
1364 if (rc
& BMCR_PDOWN
) {
1365 rc
= phy_write(pdata
->phy_dev
, MII_BMCR
, rc
& ~BMCR_PDOWN
);
1367 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1371 usleep_range(1000, 1500);
1377 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data
*pdata
)
1381 if (!pdata
->phy_dev
)
1384 rc
= phy_read(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1387 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1391 /* Only disable if energy detect mode is already enabled */
1392 if (rc
& MII_LAN83C185_EDPWRDOWN
) {
1393 /* Disable energy detect mode for this SMSC Transceivers */
1394 rc
= phy_write(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1395 rc
& (~MII_LAN83C185_EDPWRDOWN
));
1398 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1401 /* Allow PHY to wakeup */
1408 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data
*pdata
)
1412 if (!pdata
->phy_dev
)
1415 rc
= phy_read(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
);
1418 SMSC_WARN(pdata
, drv
, "Failed reading PHY control reg");
1422 /* Only enable if energy detect mode is already disabled */
1423 if (!(rc
& MII_LAN83C185_EDPWRDOWN
)) {
1424 /* Enable energy detect mode for this SMSC Transceivers */
1425 rc
= phy_write(pdata
->phy_dev
, MII_LAN83C185_CTRL_STATUS
,
1426 rc
| MII_LAN83C185_EDPWRDOWN
);
1429 SMSC_WARN(pdata
, drv
, "Failed writing PHY control reg");
1436 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1438 unsigned int timeout
;
1443 * Make sure to power-up the PHY chip before doing a reset, otherwise
1446 ret
= smsc911x_phy_general_power_up(pdata
);
1448 SMSC_WARN(pdata
, drv
, "Failed to power-up the PHY chip");
1453 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1454 * are initialized in a Energy Detect Power-Down mode that prevents
1455 * the MAC chip to be software reseted. So we have to wakeup the PHY
1458 if (pdata
->generation
== 4) {
1459 ret
= smsc911x_phy_disable_energy_detect(pdata
);
1462 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1467 /* Reset the LAN911x */
1468 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1472 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1473 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1475 if (unlikely(temp
& HW_CFG_SRST_
)) {
1476 SMSC_WARN(pdata
, drv
, "Failed to complete reset");
1480 if (pdata
->generation
== 4) {
1481 ret
= smsc911x_phy_enable_energy_detect(pdata
);
1484 SMSC_WARN(pdata
, drv
, "Failed to wakeup the PHY chip");
1492 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1494 smsc911x_set_hw_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1496 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1497 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1498 (dev_addr
[1] << 8) | dev_addr
[0];
1500 SMSC_ASSERT_MAC_LOCK(pdata
);
1502 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1503 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1506 static void smsc911x_disable_irq_chip(struct net_device
*dev
)
1508 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1510 smsc911x_reg_write(pdata
, INT_EN
, 0);
1511 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1514 static int smsc911x_open(struct net_device
*dev
)
1516 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1517 unsigned int timeout
;
1519 unsigned int intcfg
;
1521 /* if the phy is not yet registered, retry later*/
1522 if (!pdata
->phy_dev
) {
1523 SMSC_WARN(pdata
, hw
, "phy_dev is NULL");
1527 /* Reset the LAN911x */
1528 if (smsc911x_soft_reset(pdata
)) {
1529 SMSC_WARN(pdata
, hw
, "soft reset failed");
1533 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1534 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1536 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1537 spin_lock_irq(&pdata
->mac_lock
);
1538 smsc911x_mac_write(pdata
, VLAN1
, ETH_P_8021Q
);
1539 spin_unlock_irq(&pdata
->mac_lock
);
1541 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1543 while ((smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) &&
1548 if (unlikely(timeout
== 0))
1549 SMSC_WARN(pdata
, ifup
,
1550 "Timed out waiting for EEPROM busy bit to clear");
1552 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1554 /* The soft reset above cleared the device's MAC address,
1555 * restore it from local copy (set in probe) */
1556 spin_lock_irq(&pdata
->mac_lock
);
1557 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1558 spin_unlock_irq(&pdata
->mac_lock
);
1560 /* Initialise irqs, but leave all sources disabled */
1561 smsc911x_disable_irq_chip(dev
);
1563 /* Set interrupt deassertion to 100uS */
1564 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1566 if (pdata
->config
.irq_polarity
) {
1567 SMSC_TRACE(pdata
, ifup
, "irq polarity: active high");
1568 intcfg
|= INT_CFG_IRQ_POL_
;
1570 SMSC_TRACE(pdata
, ifup
, "irq polarity: active low");
1573 if (pdata
->config
.irq_type
) {
1574 SMSC_TRACE(pdata
, ifup
, "irq type: push-pull");
1575 intcfg
|= INT_CFG_IRQ_TYPE_
;
1577 SMSC_TRACE(pdata
, ifup
, "irq type: open drain");
1580 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1582 SMSC_TRACE(pdata
, ifup
, "Testing irq handler using IRQ %d", dev
->irq
);
1583 pdata
->software_irq_signal
= 0;
1586 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1587 temp
|= INT_EN_SW_INT_EN_
;
1588 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1592 if (pdata
->software_irq_signal
)
1597 if (!pdata
->software_irq_signal
) {
1598 netdev_warn(dev
, "ISR failed signaling test (IRQ %d)\n",
1602 SMSC_TRACE(pdata
, ifup
, "IRQ handler passed test using IRQ %d",
1605 netdev_info(dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1606 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1608 /* Reset the last known duplex and carrier */
1609 pdata
->last_duplex
= -1;
1610 pdata
->last_carrier
= -1;
1612 /* Bring the PHY up */
1613 phy_start(pdata
->phy_dev
);
1615 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1616 /* Preserve TX FIFO size and external PHY configuration */
1617 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1619 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1621 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1622 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1623 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1624 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1626 /* set RX Data offset to 2 bytes for alignment */
1627 smsc911x_reg_write(pdata
, RX_CFG
, (NET_IP_ALIGN
<< 8));
1629 /* enable NAPI polling before enabling RX interrupts */
1630 napi_enable(&pdata
->napi
);
1632 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1633 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1634 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1636 spin_lock_irq(&pdata
->mac_lock
);
1637 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1638 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1639 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1640 spin_unlock_irq(&pdata
->mac_lock
);
1642 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1644 netif_start_queue(dev
);
1648 /* Entry point for stopping the interface */
1649 static int smsc911x_stop(struct net_device
*dev
)
1651 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1654 /* Disable all device interrupts */
1655 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1656 temp
&= ~INT_CFG_IRQ_EN_
;
1657 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1659 /* Stop Tx and Rx polling */
1660 netif_stop_queue(dev
);
1661 napi_disable(&pdata
->napi
);
1663 /* At this point all Rx and Tx activity is stopped */
1664 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1665 smsc911x_tx_update_txcounters(dev
);
1667 /* Bring the PHY down */
1669 phy_stop(pdata
->phy_dev
);
1671 SMSC_TRACE(pdata
, ifdown
, "Interface stopped");
1675 /* Entry point for transmitting a packet */
1676 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1678 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1679 unsigned int freespace
;
1680 unsigned int tx_cmd_a
;
1681 unsigned int tx_cmd_b
;
1686 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1688 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1689 SMSC_WARN(pdata
, tx_err
,
1690 "Tx data fifo low, space available: %d", freespace
);
1692 /* Word alignment adjustment */
1693 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1694 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1695 tx_cmd_a
|= (unsigned int)skb
->len
;
1697 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1698 tx_cmd_b
|= (unsigned int)skb
->len
;
1700 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1701 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1703 bufp
= (ulong
)skb
->data
& (~0x3);
1704 wrsz
= (u32
)skb
->len
+ 3;
1705 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1708 pdata
->ops
->tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1709 freespace
-= (skb
->len
+ 32);
1710 skb_tx_timestamp(skb
);
1711 dev_consume_skb_any(skb
);
1713 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1714 smsc911x_tx_update_txcounters(dev
);
1716 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1717 netif_stop_queue(dev
);
1718 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1721 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1724 return NETDEV_TX_OK
;
1727 /* Entry point for getting status counters */
1728 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1730 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1731 smsc911x_tx_update_txcounters(dev
);
1732 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1736 /* Entry point for setting addressing modes */
1737 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1739 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1740 unsigned long flags
;
1742 if (dev
->flags
& IFF_PROMISC
) {
1743 /* Enabling promiscuous mode */
1744 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1745 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1748 } else if (dev
->flags
& IFF_ALLMULTI
) {
1749 /* Enabling all multicast mode */
1750 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1751 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1754 } else if (!netdev_mc_empty(dev
)) {
1755 /* Enabling specific multicast addresses */
1756 unsigned int hash_high
= 0;
1757 unsigned int hash_low
= 0;
1758 struct netdev_hw_addr
*ha
;
1760 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1761 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1763 netdev_for_each_mc_addr(ha
, dev
) {
1764 unsigned int bitnum
= smsc911x_hash(ha
->addr
);
1765 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1773 pdata
->hashhi
= hash_high
;
1774 pdata
->hashlo
= hash_low
;
1776 /* Enabling local MAC address only */
1777 pdata
->set_bits_mask
= 0;
1778 pdata
->clear_bits_mask
=
1779 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1784 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1786 if (pdata
->generation
<= 1) {
1787 /* Older hardware revision - cannot change these flags while
1789 if (!pdata
->multicast_update_pending
) {
1791 SMSC_TRACE(pdata
, hw
, "scheduling mcast update");
1792 pdata
->multicast_update_pending
= 1;
1794 /* Request the hardware to stop, then perform the
1795 * update when we get an RX_STOP interrupt */
1796 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1797 temp
&= ~(MAC_CR_RXEN_
);
1798 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1800 /* There is another update pending, this should now
1801 * use the newer values */
1804 /* Newer hardware revision - can write immediately */
1805 smsc911x_rx_multicast_update(pdata
);
1808 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1811 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1813 struct net_device
*dev
= dev_id
;
1814 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1815 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1816 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1817 int serviced
= IRQ_NONE
;
1820 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1821 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1822 temp
&= (~INT_EN_SW_INT_EN_
);
1823 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1824 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1825 pdata
->software_irq_signal
= 1;
1827 serviced
= IRQ_HANDLED
;
1830 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1831 /* Called when there is a multicast update scheduled and
1832 * it is now safe to complete the update */
1833 SMSC_TRACE(pdata
, intr
, "RX Stop interrupt");
1834 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1835 if (pdata
->multicast_update_pending
)
1836 smsc911x_rx_multicast_update_workaround(pdata
);
1837 serviced
= IRQ_HANDLED
;
1840 if (intsts
& inten
& INT_STS_TDFA_
) {
1841 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1842 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1843 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1844 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1845 netif_wake_queue(dev
);
1846 serviced
= IRQ_HANDLED
;
1849 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1850 SMSC_TRACE(pdata
, intr
, "RX Error interrupt");
1851 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1852 serviced
= IRQ_HANDLED
;
1855 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1856 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1857 /* Disable Rx interrupts */
1858 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1859 temp
&= (~INT_EN_RSFL_EN_
);
1860 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1861 /* Schedule a NAPI poll */
1862 __napi_schedule(&pdata
->napi
);
1864 SMSC_WARN(pdata
, rx_err
, "napi_schedule_prep failed");
1866 serviced
= IRQ_HANDLED
;
1872 #ifdef CONFIG_NET_POLL_CONTROLLER
1873 static void smsc911x_poll_controller(struct net_device
*dev
)
1875 disable_irq(dev
->irq
);
1876 smsc911x_irqhandler(0, dev
);
1877 enable_irq(dev
->irq
);
1879 #endif /* CONFIG_NET_POLL_CONTROLLER */
1881 static int smsc911x_set_mac_address(struct net_device
*dev
, void *p
)
1883 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1884 struct sockaddr
*addr
= p
;
1886 /* On older hardware revisions we cannot change the mac address
1887 * registers while receiving data. Newer devices can safely change
1888 * this at any time. */
1889 if (pdata
->generation
<= 1 && netif_running(dev
))
1892 if (!is_valid_ether_addr(addr
->sa_data
))
1893 return -EADDRNOTAVAIL
;
1895 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
1897 spin_lock_irq(&pdata
->mac_lock
);
1898 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1899 spin_unlock_irq(&pdata
->mac_lock
);
1901 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
1906 /* Standard ioctls for mii-tool */
1907 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1909 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1911 if (!netif_running(dev
) || !pdata
->phy_dev
)
1914 return phy_mii_ioctl(pdata
->phy_dev
, ifr
, cmd
);
1918 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1920 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1924 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1928 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1930 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1932 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1935 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1936 struct ethtool_drvinfo
*info
)
1938 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1939 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1940 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1941 sizeof(info
->bus_info
));
1944 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1946 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1948 return phy_start_aneg(pdata
->phy_dev
);
1951 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1953 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1954 return pdata
->msg_enable
;
1957 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1959 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1960 pdata
->msg_enable
= level
;
1963 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1965 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1970 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1973 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1974 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1975 unsigned long flags
;
1980 regs
->version
= pdata
->idrev
;
1981 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1982 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1984 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1985 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1986 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1987 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1990 for (i
= 0; i
<= 31; i
++)
1991 data
[j
++] = smsc911x_mii_read(phy_dev
->mdio
.bus
,
1992 phy_dev
->mdio
.addr
, i
);
1995 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1997 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1998 temp
&= ~GPIO_CFG_EEPR_EN_
;
1999 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
2003 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
2008 SMSC_TRACE(pdata
, drv
, "op 0x%08x", op
);
2009 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
2010 SMSC_WARN(pdata
, drv
, "Busy at start");
2014 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
2015 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
2019 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
2020 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (--timeout
));
2023 SMSC_TRACE(pdata
, drv
, "TIMED OUT");
2027 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
2028 SMSC_TRACE(pdata
, drv
, "Error occurred during eeprom operation");
2035 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
2036 u8 address
, u8
*data
)
2038 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
2041 SMSC_TRACE(pdata
, drv
, "address 0x%x", address
);
2042 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2045 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
2050 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
2051 u8 address
, u8 data
)
2053 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
2057 SMSC_TRACE(pdata
, drv
, "address 0x%x, data 0x%x", address
, data
);
2058 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2061 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
2062 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
2064 /* Workaround for hardware read-after-write restriction */
2065 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2067 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
2073 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
2075 return SMSC911X_EEPROM_SIZE
;
2078 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
2079 struct ethtool_eeprom
*eeprom
, u8
*data
)
2081 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2082 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
2086 smsc911x_eeprom_enable_access(pdata
);
2088 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
2089 for (i
= 0; i
< len
; i
++) {
2090 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
2097 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
2102 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
2103 struct ethtool_eeprom
*eeprom
, u8
*data
)
2106 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2108 smsc911x_eeprom_enable_access(pdata
);
2109 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
2110 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
2111 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
2113 /* Single byte write, according to man page */
2119 static const struct ethtool_ops smsc911x_ethtool_ops
= {
2120 .get_settings
= smsc911x_ethtool_getsettings
,
2121 .set_settings
= smsc911x_ethtool_setsettings
,
2122 .get_link
= ethtool_op_get_link
,
2123 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
2124 .nway_reset
= smsc911x_ethtool_nwayreset
,
2125 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
2126 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
2127 .get_regs_len
= smsc911x_ethtool_getregslen
,
2128 .get_regs
= smsc911x_ethtool_getregs
,
2129 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
2130 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
2131 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
2132 .get_ts_info
= ethtool_op_get_ts_info
,
2135 static const struct net_device_ops smsc911x_netdev_ops
= {
2136 .ndo_open
= smsc911x_open
,
2137 .ndo_stop
= smsc911x_stop
,
2138 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
2139 .ndo_get_stats
= smsc911x_get_stats
,
2140 .ndo_set_rx_mode
= smsc911x_set_multicast_list
,
2141 .ndo_do_ioctl
= smsc911x_do_ioctl
,
2142 .ndo_change_mtu
= eth_change_mtu
,
2143 .ndo_validate_addr
= eth_validate_addr
,
2144 .ndo_set_mac_address
= smsc911x_set_mac_address
,
2145 #ifdef CONFIG_NET_POLL_CONTROLLER
2146 .ndo_poll_controller
= smsc911x_poll_controller
,
2150 /* copies the current mac address from hardware to dev->dev_addr */
2151 static void smsc911x_read_mac_address(struct net_device
*dev
)
2153 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2154 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2155 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2157 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2158 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2159 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2160 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2161 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2162 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2165 /* Initializing private device structures, only called from probe */
2166 static int smsc911x_init(struct net_device
*dev
)
2168 struct smsc911x_data
*pdata
= netdev_priv(dev
);
2169 unsigned int byte_test
, mask
;
2170 unsigned int to
= 100;
2172 SMSC_TRACE(pdata
, probe
, "Driver Parameters:");
2173 SMSC_TRACE(pdata
, probe
, "LAN base: 0x%08lX",
2174 (unsigned long)pdata
->ioaddr
);
2175 SMSC_TRACE(pdata
, probe
, "IRQ: %d", dev
->irq
);
2176 SMSC_TRACE(pdata
, probe
, "PHY will be autodetected.");
2178 spin_lock_init(&pdata
->dev_lock
);
2179 spin_lock_init(&pdata
->mac_lock
);
2181 if (pdata
->ioaddr
== NULL
) {
2182 SMSC_WARN(pdata
, probe
, "pdata->ioaddr: 0x00000000");
2187 * poll the READY bit in PMT_CTRL. Any other access to the device is
2188 * forbidden while this bit isn't set. Try for 100ms
2190 * Note that this test is done before the WORD_SWAP register is
2191 * programmed. So in some configurations the READY bit is at 16 before
2192 * WORD_SWAP is written to. This issue is worked around by waiting
2193 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2195 * SMSC has confirmed that checking bit 16 (marked as reserved in
2196 * the datasheet) is fine since these bits "will either never be set
2197 * or can only go high after READY does (so also indicate the device
2201 mask
= PMT_CTRL_READY_
| swahw32(PMT_CTRL_READY_
);
2202 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & mask
) && --to
)
2206 netdev_err(dev
, "Device not READY in 100ms aborting\n");
2210 /* Check byte ordering */
2211 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2212 SMSC_TRACE(pdata
, probe
, "BYTE_TEST: 0x%08X", byte_test
);
2213 if (byte_test
== 0x43218765) {
2214 SMSC_TRACE(pdata
, probe
, "BYTE_TEST looks swapped, "
2215 "applying WORD_SWAP");
2216 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
2218 /* 1 dummy read of BYTE_TEST is needed after a write to
2219 * WORD_SWAP before its contents are valid */
2220 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2222 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
2225 if (byte_test
!= 0x87654321) {
2226 SMSC_WARN(pdata
, drv
, "BYTE_TEST: 0x%08X", byte_test
);
2227 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
2228 SMSC_WARN(pdata
, probe
,
2229 "top 16 bits equal to bottom 16 bits");
2230 SMSC_TRACE(pdata
, probe
,
2231 "This may mean the chip is set "
2232 "for 32 bit while the bus is reading 16 bit");
2237 /* Default generation to zero (all workarounds apply) */
2238 pdata
->generation
= 0;
2240 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
2241 switch (pdata
->idrev
& 0xFFFF0000) {
2247 /* LAN911[5678] family */
2248 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
2255 /* LAN921[5678] family */
2256 pdata
->generation
= 3;
2263 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2264 pdata
->generation
= 4;
2268 SMSC_WARN(pdata
, probe
, "LAN911x not identified, idrev: 0x%08X",
2273 SMSC_TRACE(pdata
, probe
,
2274 "LAN911x identified, idrev: 0x%08X, generation: %d",
2275 pdata
->idrev
, pdata
->generation
);
2277 if (pdata
->generation
== 0)
2278 SMSC_WARN(pdata
, probe
,
2279 "This driver is not intended for this chip revision");
2281 /* workaround for platforms without an eeprom, where the mac address
2282 * is stored elsewhere and set by the bootloader. This saves the
2283 * mac address before resetting the device */
2284 if (pdata
->config
.flags
& SMSC911X_SAVE_MAC_ADDRESS
) {
2285 spin_lock_irq(&pdata
->mac_lock
);
2286 smsc911x_read_mac_address(dev
);
2287 spin_unlock_irq(&pdata
->mac_lock
);
2290 /* Reset the LAN911x */
2291 if (smsc911x_phy_reset(pdata
) || smsc911x_soft_reset(pdata
))
2294 dev
->flags
|= IFF_MULTICAST
;
2295 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
2296 dev
->netdev_ops
= &smsc911x_netdev_ops
;
2297 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
2302 static int smsc911x_drv_remove(struct platform_device
*pdev
)
2304 struct net_device
*dev
;
2305 struct smsc911x_data
*pdata
;
2306 struct resource
*res
;
2308 dev
= platform_get_drvdata(pdev
);
2310 pdata
= netdev_priv(dev
);
2312 BUG_ON(!pdata
->ioaddr
);
2313 BUG_ON(!pdata
->phy_dev
);
2315 SMSC_TRACE(pdata
, ifdown
, "Stopping driver");
2317 phy_disconnect(pdata
->phy_dev
);
2318 pdata
->phy_dev
= NULL
;
2319 mdiobus_unregister(pdata
->mii_bus
);
2320 mdiobus_free(pdata
->mii_bus
);
2322 unregister_netdev(dev
);
2323 free_irq(dev
->irq
, dev
);
2324 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2327 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2329 release_mem_region(res
->start
, resource_size(res
));
2331 iounmap(pdata
->ioaddr
);
2333 (void)smsc911x_disable_resources(pdev
);
2334 smsc911x_free_resources(pdev
);
2338 pm_runtime_put(&pdev
->dev
);
2339 pm_runtime_disable(&pdev
->dev
);
2344 /* standard register acces */
2345 static const struct smsc911x_ops standard_smsc911x_ops
= {
2346 .reg_read
= __smsc911x_reg_read
,
2347 .reg_write
= __smsc911x_reg_write
,
2348 .rx_readfifo
= smsc911x_rx_readfifo
,
2349 .tx_writefifo
= smsc911x_tx_writefifo
,
2352 /* shifted register access */
2353 static const struct smsc911x_ops shifted_smsc911x_ops
= {
2354 .reg_read
= __smsc911x_reg_read_shift
,
2355 .reg_write
= __smsc911x_reg_write_shift
,
2356 .rx_readfifo
= smsc911x_rx_readfifo_shift
,
2357 .tx_writefifo
= smsc911x_tx_writefifo_shift
,
2360 static int smsc911x_probe_config(struct smsc911x_platform_config
*config
,
2367 phy_interface
= device_get_phy_mode(dev
);
2368 if (phy_interface
< 0)
2369 phy_interface
= PHY_INTERFACE_MODE_NA
;
2370 config
->phy_interface
= phy_interface
;
2372 device_get_mac_address(dev
, config
->mac
, ETH_ALEN
);
2374 err
= device_property_read_u32(dev
, "reg-io-width", &width
);
2377 if (!err
&& width
== 4)
2378 config
->flags
|= SMSC911X_USE_32BIT
;
2380 config
->flags
|= SMSC911X_USE_16BIT
;
2382 device_property_read_u32(dev
, "reg-shift", &config
->shift
);
2384 if (device_property_present(dev
, "smsc,irq-active-high"))
2385 config
->irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
;
2387 if (device_property_present(dev
, "smsc,irq-push-pull"))
2388 config
->irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
;
2390 if (device_property_present(dev
, "smsc,force-internal-phy"))
2391 config
->flags
|= SMSC911X_FORCE_INTERNAL_PHY
;
2393 if (device_property_present(dev
, "smsc,force-external-phy"))
2394 config
->flags
|= SMSC911X_FORCE_EXTERNAL_PHY
;
2396 if (device_property_present(dev
, "smsc,save-mac-address"))
2397 config
->flags
|= SMSC911X_SAVE_MAC_ADDRESS
;
2402 static int smsc911x_drv_probe(struct platform_device
*pdev
)
2404 struct net_device
*dev
;
2405 struct smsc911x_data
*pdata
;
2406 struct smsc911x_platform_config
*config
= dev_get_platdata(&pdev
->dev
);
2407 struct resource
*res
;
2408 unsigned int intcfg
= 0;
2409 int res_size
, irq
, irq_flags
;
2412 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
2415 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2417 pr_warn("Could not allocate resource\n");
2421 res_size
= resource_size(res
);
2423 irq
= platform_get_irq(pdev
, 0);
2424 if (irq
== -EPROBE_DEFER
) {
2425 retval
= -EPROBE_DEFER
;
2427 } else if (irq
<= 0) {
2428 pr_warn("Could not allocate irq resource\n");
2433 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
2438 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
2441 goto out_release_io_1
;
2444 SET_NETDEV_DEV(dev
, &pdev
->dev
);
2446 pdata
= netdev_priv(dev
);
2448 irq_flags
= irq_get_trigger_type(irq
);
2449 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
2452 pdata
->msg_enable
= ((1 << debug
) - 1);
2454 platform_set_drvdata(pdev
, dev
);
2456 retval
= smsc911x_request_resources(pdev
);
2458 goto out_request_resources_fail
;
2460 retval
= smsc911x_enable_resources(pdev
);
2462 goto out_enable_resources_fail
;
2464 if (pdata
->ioaddr
== NULL
) {
2465 SMSC_WARN(pdata
, probe
, "Error smsc911x base address invalid");
2467 goto out_disable_resources
;
2470 retval
= smsc911x_probe_config(&pdata
->config
, &pdev
->dev
);
2471 if (retval
&& config
) {
2472 /* copy config parameters across to pdata */
2473 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
2478 SMSC_WARN(pdata
, probe
, "Error smsc911x config not found");
2479 goto out_disable_resources
;
2482 /* assume standard, non-shifted, access to HW registers */
2483 pdata
->ops
= &standard_smsc911x_ops
;
2484 /* apply the right access if shifting is needed */
2485 if (pdata
->config
.shift
)
2486 pdata
->ops
= &shifted_smsc911x_ops
;
2488 pm_runtime_enable(&pdev
->dev
);
2489 pm_runtime_get_sync(&pdev
->dev
);
2491 retval
= smsc911x_init(dev
);
2493 goto out_disable_resources
;
2495 /* configure irq polarity and type before connecting isr */
2496 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
2497 intcfg
|= INT_CFG_IRQ_POL_
;
2499 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
2500 intcfg
|= INT_CFG_IRQ_TYPE_
;
2502 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
2504 /* Ensure interrupts are globally disabled before connecting ISR */
2505 smsc911x_disable_irq_chip(dev
);
2507 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
2508 irq_flags
| IRQF_SHARED
, dev
->name
, dev
);
2510 SMSC_WARN(pdata
, probe
,
2511 "Unable to claim requested irq: %d", dev
->irq
);
2512 goto out_disable_resources
;
2515 netif_carrier_off(dev
);
2517 retval
= register_netdev(dev
);
2519 SMSC_WARN(pdata
, probe
, "Error %i registering device", retval
);
2522 SMSC_TRACE(pdata
, probe
,
2523 "Network interface: \"%s\"", dev
->name
);
2526 retval
= smsc911x_mii_init(pdev
, dev
);
2528 SMSC_WARN(pdata
, probe
, "Error %i initialising mii", retval
);
2529 goto out_unregister_netdev_5
;
2532 spin_lock_irq(&pdata
->mac_lock
);
2534 /* Check if mac address has been specified when bringing interface up */
2535 if (is_valid_ether_addr(dev
->dev_addr
)) {
2536 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2537 SMSC_TRACE(pdata
, probe
,
2538 "MAC Address is specified by configuration");
2539 } else if (is_valid_ether_addr(pdata
->config
.mac
)) {
2540 memcpy(dev
->dev_addr
, pdata
->config
.mac
, ETH_ALEN
);
2541 SMSC_TRACE(pdata
, probe
,
2542 "MAC Address specified by platform data");
2544 /* Try reading mac address from device. if EEPROM is present
2545 * it will already have been set */
2548 if (is_valid_ether_addr(dev
->dev_addr
)) {
2549 /* eeprom values are valid so use them */
2550 SMSC_TRACE(pdata
, probe
,
2551 "Mac Address is read from LAN911x EEPROM");
2553 /* eeprom values are invalid, generate random MAC */
2554 eth_hw_addr_random(dev
);
2555 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2556 SMSC_TRACE(pdata
, probe
,
2557 "MAC Address is set to eth_random_addr");
2561 spin_unlock_irq(&pdata
->mac_lock
);
2563 netdev_info(dev
, "MAC Address: %pM\n", dev
->dev_addr
);
2567 out_unregister_netdev_5
:
2568 unregister_netdev(dev
);
2570 free_irq(dev
->irq
, dev
);
2571 out_disable_resources
:
2572 pm_runtime_put(&pdev
->dev
);
2573 pm_runtime_disable(&pdev
->dev
);
2574 (void)smsc911x_disable_resources(pdev
);
2575 out_enable_resources_fail
:
2576 smsc911x_free_resources(pdev
);
2577 out_request_resources_fail
:
2578 iounmap(pdata
->ioaddr
);
2581 release_mem_region(res
->start
, resource_size(res
));
2587 /* This implementation assumes the devices remains powered on its VDDVARIO
2588 * pins during suspend. */
2590 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2592 static int smsc911x_suspend(struct device
*dev
)
2594 struct net_device
*ndev
= dev_get_drvdata(dev
);
2595 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2597 /* enable wake on LAN, energy detection and the external PME
2599 smsc911x_reg_write(pdata
, PMT_CTRL
,
2600 PMT_CTRL_PM_MODE_D1_
| PMT_CTRL_WOL_EN_
|
2601 PMT_CTRL_ED_EN_
| PMT_CTRL_PME_EN_
);
2606 static int smsc911x_resume(struct device
*dev
)
2608 struct net_device
*ndev
= dev_get_drvdata(dev
);
2609 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2610 unsigned int to
= 100;
2612 /* Note 3.11 from the datasheet:
2613 * "When the LAN9220 is in a power saving state, a write of any
2614 * data to the BYTE_TEST register will wake-up the device."
2616 smsc911x_reg_write(pdata
, BYTE_TEST
, 0);
2618 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2619 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2621 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & PMT_CTRL_READY_
) && --to
)
2624 return (to
== 0) ? -EIO
: 0;
2627 static const struct dev_pm_ops smsc911x_pm_ops
= {
2628 .suspend
= smsc911x_suspend
,
2629 .resume
= smsc911x_resume
,
2632 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2635 #define SMSC911X_PM_OPS NULL
2639 static const struct of_device_id smsc911x_dt_ids
[] = {
2640 { .compatible
= "smsc,lan9115", },
2643 MODULE_DEVICE_TABLE(of
, smsc911x_dt_ids
);
2646 static const struct acpi_device_id smsc911x_acpi_match
[] = {
2650 MODULE_DEVICE_TABLE(acpi
, smsc911x_acpi_match
);
2652 static struct platform_driver smsc911x_driver
= {
2653 .probe
= smsc911x_drv_probe
,
2654 .remove
= smsc911x_drv_remove
,
2656 .name
= SMSC_CHIPNAME
,
2657 .pm
= SMSC911X_PM_OPS
,
2658 .of_match_table
= of_match_ptr(smsc911x_dt_ids
),
2659 .acpi_match_table
= ACPI_PTR(smsc911x_acpi_match
),
2663 /* Entry point for loading the module */
2664 static int __init
smsc911x_init_module(void)
2667 return platform_driver_register(&smsc911x_driver
);
2670 /* entry point for unloading the module */
2671 static void __exit
smsc911x_cleanup_module(void)
2673 platform_driver_unregister(&smsc911x_driver
);
2676 module_init(smsc911x_init_module
);
2677 module_exit(smsc911x_cleanup_module
);