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[deliverable/linux.git] / drivers / net / ewrk3.c
1 /* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146 #include <linux/module.h>
147 #include <linux/kernel.h>
148 #include <linux/string.h>
149 #include <linux/errno.h>
150 #include <linux/ioport.h>
151 #include <linux/slab.h>
152 #include <linux/interrupt.h>
153 #include <linux/delay.h>
154 #include <linux/init.h>
155 #include <linux/crc32.h>
156 #include <linux/netdevice.h>
157 #include <linux/etherdevice.h>
158 #include <linux/skbuff.h>
159 #include <linux/ethtool.h>
160 #include <linux/time.h>
161 #include <linux/types.h>
162 #include <linux/unistd.h>
163 #include <linux/ctype.h>
164 #include <linux/bitops.h>
165
166 #include <asm/io.h>
167 #include <asm/dma.h>
168 #include <asm/uaccess.h>
169
170 #include "ewrk3.h"
171
172 #define DRV_NAME "ewrk3"
173 #define DRV_VERSION "0.48"
174
175 static char version[] __initdata =
176 DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178 #ifdef EWRK3_DEBUG
179 static int ewrk3_debug = EWRK3_DEBUG;
180 #else
181 static int ewrk3_debug = 1;
182 #endif
183
184 #define EWRK3_NDA 0xffe0 /* No Device Address */
185
186 #define PROBE_LENGTH 32
187 #define ETH_PROM_SIG 0xAA5500FFUL
188
189 #ifndef EWRK3_SIGNATURE
190 #define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191 #define EWRK3_STRLEN 8
192 #endif
193
194 #ifndef EWRK3_RAM_BASE_ADDRESSES
195 #define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196 #endif
197
198 /*
199 ** Sets up the I/O area for the autoprobe.
200 */
201 #define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202 #define EWRK3_IOP_INC 0x20 /* I/O address increment */
203 #define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205 #ifndef MAX_NUM_EWRK3S
206 #define MAX_NUM_EWRK3S 21
207 #endif
208
209 #ifndef EWRK3_EISA_IO_PORTS
210 #define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211 #endif
212
213 #ifndef MAX_EISA_SLOTS
214 #define MAX_EISA_SLOTS 16
215 #define EISA_SLOT_INC 0x1000
216 #endif
217
218 #define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220 /*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223 #define IO_ONLY 0x00
224 #define SHMEM_2K 0x800
225 #define SHMEM_32K 0x8000
226 #define SHMEM_64K 0x10000
227
228 /*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231 #define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234 }
235
236 #define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240 }
241
242 /*
243 ** EtherWORKS 3 START/STOP
244 */
245 #define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249 }
250
251 #define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254 }
255
256 /*
257 ** The EtherWORKS 3 private structure
258 */
259 #define EWRK3_PKT_STAT_SZ 16
260 #define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263 struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271 };
272
273 struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
278 struct ewrk3_stats pktStats; /* Private stats counters */
279 u_char irq_mask; /* Adapter IRQ mask bits */
280 u_char mPage; /* Maximum 2kB Page number */
281 u_char lemac; /* Chip rev. level */
282 u_char hard_strapped; /* Don't allow a full open */
283 u_char txc; /* Transmit cut through */
284 void __iomem *mctbl; /* Pointer to the multicast table */
285 u_char led_mask; /* Used to reserve LED access for ethtool */
286 spinlock_t hw_lock;
287 };
288
289 /*
290 ** Force the EtherWORKS 3 card to be in 2kB MODE
291 */
292 #define FORCE_2K_MODE { \
293 shmem_length = SHMEM_2K;\
294 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
295 }
296
297 /*
298 ** Public Functions
299 */
300 static int ewrk3_open(struct net_device *dev);
301 static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
302 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
303 static int ewrk3_close(struct net_device *dev);
304 static void set_multicast_list(struct net_device *dev);
305 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
306 static const struct ethtool_ops ethtool_ops_203;
307 static const struct ethtool_ops ethtool_ops;
308
309 /*
310 ** Private functions
311 */
312 static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
313 static void ewrk3_init(struct net_device *dev);
314 static int ewrk3_rx(struct net_device *dev);
315 static int ewrk3_tx(struct net_device *dev);
316 static void ewrk3_timeout(struct net_device *dev);
317
318 static void EthwrkSignature(char *name, char *eeprom_image);
319 static int DevicePresent(u_long iobase);
320 static void SetMulticastFilter(struct net_device *dev);
321 static int EISA_signature(char *name, s32 eisa_id);
322
323 static int Read_EEPROM(u_long iobase, u_char eaddr);
324 static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
325 static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
326
327 static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
328 static int isa_probe(struct net_device *dev, u_long iobase);
329 static int eisa_probe(struct net_device *dev, u_long iobase);
330
331 static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
332
333 static char name[EWRK3_STRLEN + 1];
334 static int num_ewrks3s;
335
336 /*
337 ** Miscellaneous defines...
338 */
339 #define INIT_EWRK3 {\
340 outb(EEPROM_INIT, EWRK3_IOPR);\
341 mdelay(1);\
342 }
343
344 #ifndef MODULE
345 struct net_device * __init ewrk3_probe(int unit)
346 {
347 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
348 int err;
349
350 if (!dev)
351 return ERR_PTR(-ENOMEM);
352
353 if (unit >= 0) {
354 sprintf(dev->name, "eth%d", unit);
355 netdev_boot_setup_check(dev);
356 }
357
358 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
359 if (err)
360 goto out;
361 return dev;
362 out:
363 free_netdev(dev);
364 return ERR_PTR(err);
365
366 }
367 #endif
368
369 static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
370 {
371 int err;
372
373 dev->base_addr = iobase;
374 dev->irq = irq;
375
376 /* Address PROM pattern */
377 err = isa_probe(dev, iobase);
378 if (err != 0)
379 err = eisa_probe(dev, iobase);
380
381 if (err)
382 return err;
383
384 err = register_netdev(dev);
385 if (err)
386 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
387
388 return err;
389 }
390
391 static int __init
392 ewrk3_hw_init(struct net_device *dev, u_long iobase)
393 {
394 struct ewrk3_private *lp;
395 int i, status = 0;
396 u_long mem_start, shmem_length;
397 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
398 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
399
400 /*
401 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
402 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
403 */
404 if (iobase > 0x400)
405 eisa_cr = inb(EISA_CR);
406 INIT_EWRK3;
407
408 nicsr = inb(EWRK3_CSR);
409
410 icr = inb(EWRK3_ICR);
411 icr &= 0x70;
412 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
413
414 if (nicsr != (CSR_TXD | CSR_RXD))
415 return -ENXIO;
416
417 /* Check that the EEPROM is alive and well and not living on Pluto... */
418 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
419 union {
420 short val;
421 char c[2];
422 } tmp;
423
424 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
425 eeprom_image[i] = tmp.c[0];
426 eeprom_image[i + 1] = tmp.c[1];
427 chksum += eeprom_image[i] + eeprom_image[i + 1];
428 }
429
430 if (chksum != 0) { /* Bad EEPROM Data! */
431 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
432 return -ENXIO;
433 }
434
435 EthwrkSignature(name, eeprom_image);
436 if (*name == '\0')
437 return -ENXIO;
438
439 dev->base_addr = iobase;
440
441 if (iobase > 0x400) {
442 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
443 }
444 lemac = eeprom_image[EEPROM_CHIPVER];
445 cmr = inb(EWRK3_CMR);
446
447 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
448 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
449 printk("%s: %s at %#4lx", dev->name, name, iobase);
450 hard_strapped = 1;
451 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
452 /* EISA slot address */
453 printk("%s: %s at %#4lx (EISA slot %ld)",
454 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
455 } else { /* ISA port address */
456 printk("%s: %s at %#4lx", dev->name, name, iobase);
457 }
458
459 printk(", h/w address ");
460 if (lemac != LeMAC2)
461 DevicePresent(iobase); /* need after EWRK3_INIT */
462 status = get_hw_addr(dev, eeprom_image, lemac);
463 printk("%pM\n", dev->dev_addr);
464
465 if (status) {
466 printk(" which has an EEPROM CRC error.\n");
467 return -ENXIO;
468 }
469
470 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
471 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
472 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
473 cmr |= CMR_RA;
474 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
475 cmr |= CMR_WB;
476 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
477 cmr |= CMR_POLARITY;
478 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
479 cmr |= CMR_LINK;
480 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
481 cmr |= CMR_0WS;
482 }
483 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
484 cmr |= CMR_DRAM;
485 outb(cmr, EWRK3_CMR);
486
487 cr = inb(EWRK3_CR); /* Set up the Control Register */
488 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
489 if (cr & SETUP_APD)
490 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
491 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
492 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
493 outb(cr, EWRK3_CR);
494
495 /*
496 ** Determine the base address and window length for the EWRK3
497 ** RAM from the memory base register.
498 */
499 mem_start = inb(EWRK3_MBR);
500 shmem_length = 0;
501 if (mem_start != 0) {
502 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
503 mem_start *= SHMEM_64K;
504 shmem_length = SHMEM_64K;
505 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
506 mem_start *= SHMEM_32K;
507 shmem_length = SHMEM_32K;
508 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
509 mem_start = mem_start * SHMEM_2K + 0x80000;
510 shmem_length = SHMEM_2K;
511 } else {
512 return -ENXIO;
513 }
514 }
515 /*
516 ** See the top of this source code for comments about
517 ** uncommenting this line.
518 */
519 /* FORCE_2K_MODE; */
520
521 if (hard_strapped) {
522 printk(" is hard strapped.\n");
523 } else if (mem_start) {
524 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
525 printk(" at 0x%.5lx", mem_start);
526 } else {
527 printk(" is in I/O only mode");
528 }
529
530 lp = netdev_priv(dev);
531 lp->shmem_base = mem_start;
532 lp->shmem = ioremap(mem_start, shmem_length);
533 if (!lp->shmem)
534 return -ENOMEM;
535 lp->shmem_length = shmem_length;
536 lp->lemac = lemac;
537 lp->hard_strapped = hard_strapped;
538 lp->led_mask = CR_LED;
539 spin_lock_init(&lp->hw_lock);
540
541 lp->mPage = 64;
542 if (cmr & CMR_DRAM)
543 lp->mPage <<= 1; /* 2 DRAMS on module */
544
545 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
546
547 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
548
549 if (!hard_strapped) {
550 /*
551 ** Enable EWRK3 board interrupts for autoprobing
552 */
553 icr |= ICR_IE; /* Enable interrupts */
554 outb(icr, EWRK3_ICR);
555
556 /* The DMA channel may be passed in on this parameter. */
557 dev->dma = 0;
558
559 /* To auto-IRQ we enable the initialization-done and DMA err,
560 interrupts. For now we will always get a DMA error. */
561 if (dev->irq < 2) {
562 #ifndef MODULE
563 u_char irqnum;
564 unsigned long irq_mask;
565
566
567 irq_mask = probe_irq_on();
568
569 /*
570 ** Trigger a TNE interrupt.
571 */
572 icr |= ICR_TNEM;
573 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
574 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
575
576 irqnum = irq[((icr & IRQ_SEL) >> 4)];
577
578 mdelay(20);
579 dev->irq = probe_irq_off(irq_mask);
580 if ((dev->irq) && (irqnum == dev->irq)) {
581 printk(" and uses IRQ%d.\n", dev->irq);
582 } else {
583 if (!dev->irq) {
584 printk(" and failed to detect IRQ line.\n");
585 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
586 printk(" and an illegal IRQ line detected.\n");
587 } else {
588 printk(", but incorrect IRQ line detected.\n");
589 }
590 iounmap(lp->shmem);
591 return -ENXIO;
592 }
593
594 DISABLE_IRQs; /* Mask all interrupts */
595
596 #endif /* MODULE */
597 } else {
598 printk(" and requires IRQ%d.\n", dev->irq);
599 }
600 }
601
602 if (ewrk3_debug > 1) {
603 printk(version);
604 }
605 /* The EWRK3-specific entries in the device structure. */
606 dev->open = ewrk3_open;
607 dev->hard_start_xmit = ewrk3_queue_pkt;
608 dev->stop = ewrk3_close;
609 dev->set_multicast_list = set_multicast_list;
610 dev->do_ioctl = ewrk3_ioctl;
611 if (lp->adapter_name[4] == '3')
612 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
613 else
614 SET_ETHTOOL_OPS(dev, &ethtool_ops);
615 dev->tx_timeout = ewrk3_timeout;
616 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
617
618 dev->mem_start = 0;
619
620 return 0;
621 }
622
623
624 static int ewrk3_open(struct net_device *dev)
625 {
626 struct ewrk3_private *lp = netdev_priv(dev);
627 u_long iobase = dev->base_addr;
628 int status = 0;
629 u_char icr, csr;
630
631 /*
632 ** Stop the TX and RX...
633 */
634 STOP_EWRK3;
635
636 if (!lp->hard_strapped) {
637 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
638 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
639 status = -EAGAIN;
640 } else {
641
642 /*
643 ** Re-initialize the EWRK3...
644 */
645 ewrk3_init(dev);
646
647 if (ewrk3_debug > 1) {
648 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
649 printk(" physical address: %pM\n", dev->dev_addr);
650 if (lp->shmem_length == 0) {
651 printk(" no shared memory, I/O only mode\n");
652 } else {
653 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
654 printk(" window length: 0x%04lx\n", lp->shmem_length);
655 }
656 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
657 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
658 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
659 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
660 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
661 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
662 }
663 netif_start_queue(dev);
664 /*
665 ** Unmask EWRK3 board interrupts
666 */
667 icr = inb(EWRK3_ICR);
668 ENABLE_IRQs;
669
670 }
671 } else {
672 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
673 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
674 return -EINVAL;
675 }
676
677 return status;
678 }
679
680 /*
681 ** Initialize the EtherWORKS 3 operating conditions
682 */
683 static void ewrk3_init(struct net_device *dev)
684 {
685 struct ewrk3_private *lp = netdev_priv(dev);
686 u_char csr, page;
687 u_long iobase = dev->base_addr;
688 int i;
689
690 /*
691 ** Enable any multicasts
692 */
693 set_multicast_list(dev);
694
695 /*
696 ** Set hardware MAC address. Address is initialized from the EEPROM
697 ** during startup but may have since been changed by the user.
698 */
699 for (i=0; i<ETH_ALEN; i++)
700 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
701
702 /*
703 ** Clean out any remaining entries in all the queues here
704 */
705 while (inb(EWRK3_TQ));
706 while (inb(EWRK3_TDQ));
707 while (inb(EWRK3_RQ));
708 while (inb(EWRK3_FMQ));
709
710 /*
711 ** Write a clean free memory queue
712 */
713 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
714 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
715 }
716
717 START_EWRK3; /* Enable the TX and/or RX */
718 }
719
720 /*
721 * Transmit timeout
722 */
723
724 static void ewrk3_timeout(struct net_device *dev)
725 {
726 struct ewrk3_private *lp = netdev_priv(dev);
727 u_char icr, csr;
728 u_long iobase = dev->base_addr;
729
730 if (!lp->hard_strapped)
731 {
732 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
733 dev->name, inb(EWRK3_CSR));
734
735 /*
736 ** Mask all board interrupts
737 */
738 DISABLE_IRQs;
739
740 /*
741 ** Stop the TX and RX...
742 */
743 STOP_EWRK3;
744
745 ewrk3_init(dev);
746
747 /*
748 ** Unmask EWRK3 board interrupts
749 */
750 ENABLE_IRQs;
751
752 dev->trans_start = jiffies;
753 netif_wake_queue(dev);
754 }
755 }
756
757 /*
758 ** Writes a socket buffer to the free page queue
759 */
760 static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
761 {
762 struct ewrk3_private *lp = netdev_priv(dev);
763 u_long iobase = dev->base_addr;
764 void __iomem *buf = NULL;
765 u_char icr;
766 u_char page;
767
768 spin_lock_irq (&lp->hw_lock);
769 DISABLE_IRQs;
770
771 /* if no resources available, exit, request packet be queued */
772 if (inb (EWRK3_FMQC) == 0) {
773 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
774 dev->name);
775 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
776 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
777 inb (EWRK3_FMQC));
778 goto err_out;
779 }
780
781 /*
782 ** Get a free page from the FMQ
783 */
784 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
785 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
786 (u_char) page);
787 goto err_out;
788 }
789
790
791 /*
792 ** Set up shared memory window and pointer into the window
793 */
794 if (lp->shmem_length == IO_ONLY) {
795 outb (page, EWRK3_IOPR);
796 } else if (lp->shmem_length == SHMEM_2K) {
797 buf = lp->shmem;
798 outb (page, EWRK3_MPR);
799 } else if (lp->shmem_length == SHMEM_32K) {
800 buf = (((short) page << 11) & 0x7800) + lp->shmem;
801 outb ((page >> 4), EWRK3_MPR);
802 } else if (lp->shmem_length == SHMEM_64K) {
803 buf = (((short) page << 11) & 0xf800) + lp->shmem;
804 outb ((page >> 5), EWRK3_MPR);
805 } else {
806 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
807 dev->name);
808 BUG ();
809 }
810
811 /*
812 ** Set up the buffer control structures and copy the data from
813 ** the socket buffer to the shared memory .
814 */
815 if (lp->shmem_length == IO_ONLY) {
816 int i;
817 u_char *p = skb->data;
818 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
819 outb ((char) (skb->len & 0xff), EWRK3_DATA);
820 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
821 outb ((char) 0x04, EWRK3_DATA);
822 for (i = 0; i < skb->len; i++) {
823 outb (*p++, EWRK3_DATA);
824 }
825 outb (page, EWRK3_TQ); /* Start sending pkt */
826 } else {
827 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
828 buf += 1;
829 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
830 buf += 1;
831 if (lp->txc) {
832 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
833 buf += 1;
834 writeb (0x04, buf); /* index byte */
835 buf += 1;
836 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
837 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
838 outb (page, EWRK3_TQ); /* Start sending pkt */
839 memcpy_toio (buf + PRELOAD,
840 skb->data + PRELOAD,
841 skb->len - PRELOAD);
842 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
843 } else {
844 writeb ((skb->len >> 8) & 0xff, buf);
845 buf += 1;
846 writeb (0x04, buf); /* index byte */
847 buf += 1;
848 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
849 outb (page, EWRK3_TQ); /* Start sending pkt */
850 }
851 }
852
853 ENABLE_IRQs;
854 spin_unlock_irq (&lp->hw_lock);
855
856 dev->stats.tx_bytes += skb->len;
857 dev->trans_start = jiffies;
858 dev_kfree_skb (skb);
859
860 /* Check for free resources: stop Tx queue if there are none */
861 if (inb (EWRK3_FMQC) == 0)
862 netif_stop_queue (dev);
863
864 return 0;
865
866 err_out:
867 ENABLE_IRQs;
868 spin_unlock_irq (&lp->hw_lock);
869 return 1;
870 }
871
872 /*
873 ** The EWRK3 interrupt handler.
874 */
875 static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
876 {
877 struct net_device *dev = dev_id;
878 struct ewrk3_private *lp;
879 u_long iobase;
880 u_char icr, cr, csr;
881
882 lp = netdev_priv(dev);
883 iobase = dev->base_addr;
884
885 /* get the interrupt information */
886 csr = inb(EWRK3_CSR);
887
888 /*
889 ** Mask the EWRK3 board interrupts and turn on the LED
890 */
891 spin_lock(&lp->hw_lock);
892 DISABLE_IRQs;
893
894 cr = inb(EWRK3_CR);
895 cr |= lp->led_mask;
896 outb(cr, EWRK3_CR);
897
898 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
899 ewrk3_rx(dev);
900
901 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
902 ewrk3_tx(dev);
903
904 /*
905 ** Now deal with the TX/RX disable flags. These are set when there
906 ** are no more resources. If resources free up then enable these
907 ** interrupts, otherwise mask them - failure to do this will result
908 ** in the system hanging in an interrupt loop.
909 */
910 if (inb(EWRK3_FMQC)) { /* any resources available? */
911 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
912 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
913 outb(csr, EWRK3_CSR);
914 netif_wake_queue(dev);
915 } else {
916 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
917 }
918
919 /* Unmask the EWRK3 board interrupts and turn off the LED */
920 cr &= ~(lp->led_mask);
921 outb(cr, EWRK3_CR);
922 ENABLE_IRQs;
923 spin_unlock(&lp->hw_lock);
924 return IRQ_HANDLED;
925 }
926
927 /* Called with lp->hw_lock held */
928 static int ewrk3_rx(struct net_device *dev)
929 {
930 struct ewrk3_private *lp = netdev_priv(dev);
931 u_long iobase = dev->base_addr;
932 int i, status = 0;
933 u_char page;
934 void __iomem *buf = NULL;
935
936 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
937 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
938 /*
939 ** Set up shared memory window and pointer into the window
940 */
941 if (lp->shmem_length == IO_ONLY) {
942 outb(page, EWRK3_IOPR);
943 } else if (lp->shmem_length == SHMEM_2K) {
944 buf = lp->shmem;
945 outb(page, EWRK3_MPR);
946 } else if (lp->shmem_length == SHMEM_32K) {
947 buf = (((short) page << 11) & 0x7800) + lp->shmem;
948 outb((page >> 4), EWRK3_MPR);
949 } else if (lp->shmem_length == SHMEM_64K) {
950 buf = (((short) page << 11) & 0xf800) + lp->shmem;
951 outb((page >> 5), EWRK3_MPR);
952 } else {
953 status = -1;
954 printk("%s: Oops - your private data area is hosed!\n", dev->name);
955 }
956
957 if (!status) {
958 char rx_status;
959 int pkt_len;
960
961 if (lp->shmem_length == IO_ONLY) {
962 rx_status = inb(EWRK3_DATA);
963 pkt_len = inb(EWRK3_DATA);
964 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
965 } else {
966 rx_status = readb(buf);
967 buf += 1;
968 pkt_len = readw(buf);
969 buf += 3;
970 }
971
972 if (!(rx_status & R_ROK)) { /* There was an error. */
973 dev->stats.rx_errors++; /* Update the error stats. */
974 if (rx_status & R_DBE)
975 dev->stats.rx_frame_errors++;
976 if (rx_status & R_CRC)
977 dev->stats.rx_crc_errors++;
978 if (rx_status & R_PLL)
979 dev->stats.rx_fifo_errors++;
980 } else {
981 struct sk_buff *skb;
982
983 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
984 unsigned char *p;
985 skb_reserve(skb, 2); /* Align to 16 bytes */
986 p = skb_put(skb, pkt_len);
987
988 if (lp->shmem_length == IO_ONLY) {
989 *p = inb(EWRK3_DATA); /* dummy read */
990 for (i = 0; i < pkt_len; i++) {
991 *p++ = inb(EWRK3_DATA);
992 }
993 } else {
994 memcpy_fromio(p, buf, pkt_len);
995 }
996
997 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
998 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
999 lp->pktStats.bins[i]++;
1000 i = EWRK3_PKT_STAT_SZ;
1001 }
1002 }
1003 p = skb->data; /* Look at the dest addr */
1004 if (p[0] & 0x01) { /* Multicast/Broadcast */
1005 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1006 lp->pktStats.broadcast++;
1007 } else {
1008 lp->pktStats.multicast++;
1009 }
1010 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1011 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1012 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1013 lp->pktStats.unicast++;
1014 }
1015 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1016 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1017 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1018 }
1019 /*
1020 ** Notify the upper protocol layers that there is another
1021 ** packet to handle
1022 */
1023 skb->protocol = eth_type_trans(skb, dev);
1024 netif_rx(skb);
1025
1026 /*
1027 ** Update stats
1028 */
1029 dev->stats.rx_packets++;
1030 dev->stats.rx_bytes += pkt_len;
1031 } else {
1032 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1033 dev->stats.rx_dropped++; /* Really, deferred. */
1034 break;
1035 }
1036 }
1037 }
1038 /*
1039 ** Return the received buffer to the free memory queue
1040 */
1041 outb(page, EWRK3_FMQ);
1042 } else {
1043 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1044 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1045 }
1046 }
1047 return status;
1048 }
1049
1050 /*
1051 ** Buffer sent - check for TX buffer errors.
1052 ** Called with lp->hw_lock held
1053 */
1054 static int ewrk3_tx(struct net_device *dev)
1055 {
1056 struct ewrk3_private *lp = netdev_priv(dev);
1057 u_long iobase = dev->base_addr;
1058 u_char tx_status;
1059
1060 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1061 if (tx_status & T_VSTS) { /* The status is valid */
1062 if (tx_status & T_TXE) {
1063 dev->stats.tx_errors++;
1064 if (tx_status & T_NCL)
1065 dev->stats.tx_carrier_errors++;
1066 if (tx_status & T_LCL)
1067 dev->stats.tx_window_errors++;
1068 if (tx_status & T_CTU) {
1069 if ((tx_status & T_COLL) ^ T_XUR) {
1070 lp->pktStats.tx_underruns++;
1071 } else {
1072 lp->pktStats.excessive_underruns++;
1073 }
1074 } else if (tx_status & T_COLL) {
1075 if ((tx_status & T_COLL) ^ T_XCOLL) {
1076 dev->stats.collisions++;
1077 } else {
1078 lp->pktStats.excessive_collisions++;
1079 }
1080 }
1081 } else {
1082 dev->stats.tx_packets++;
1083 }
1084 }
1085 }
1086
1087 return 0;
1088 }
1089
1090 static int ewrk3_close(struct net_device *dev)
1091 {
1092 struct ewrk3_private *lp = netdev_priv(dev);
1093 u_long iobase = dev->base_addr;
1094 u_char icr, csr;
1095
1096 netif_stop_queue(dev);
1097
1098 if (ewrk3_debug > 1) {
1099 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1100 dev->name, inb(EWRK3_CSR));
1101 }
1102 /*
1103 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1104 */
1105 DISABLE_IRQs;
1106
1107 STOP_EWRK3;
1108
1109 /*
1110 ** Clean out the TX and RX queues here (note that one entry
1111 ** may get added to either the TXD or RX queues if the TX or RX
1112 ** just starts processing a packet before the STOP_EWRK3 command
1113 ** is received. This will be flushed in the ewrk3_open() call).
1114 */
1115 while (inb(EWRK3_TQ));
1116 while (inb(EWRK3_TDQ));
1117 while (inb(EWRK3_RQ));
1118
1119 if (!lp->hard_strapped) {
1120 free_irq(dev->irq, dev);
1121 }
1122 return 0;
1123 }
1124
1125 /*
1126 ** Set or clear the multicast filter for this adapter.
1127 */
1128 static void set_multicast_list(struct net_device *dev)
1129 {
1130 struct ewrk3_private *lp = netdev_priv(dev);
1131 u_long iobase = dev->base_addr;
1132 u_char csr;
1133
1134 csr = inb(EWRK3_CSR);
1135
1136 if (lp->shmem_length == IO_ONLY) {
1137 lp->mctbl = NULL;
1138 } else {
1139 lp->mctbl = lp->shmem + PAGE0_HTE;
1140 }
1141
1142 csr &= ~(CSR_PME | CSR_MCE);
1143 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1144 csr |= CSR_PME;
1145 outb(csr, EWRK3_CSR);
1146 } else {
1147 SetMulticastFilter(dev);
1148 csr |= CSR_MCE;
1149 outb(csr, EWRK3_CSR);
1150 }
1151 }
1152
1153 /*
1154 ** Calculate the hash code and update the logical address filter
1155 ** from a list of ethernet multicast addresses.
1156 ** Little endian crc one liner from Matt Thomas, DEC.
1157 **
1158 ** Note that when clearing the table, the broadcast bit must remain asserted
1159 ** to receive broadcast messages.
1160 */
1161 static void SetMulticastFilter(struct net_device *dev)
1162 {
1163 struct ewrk3_private *lp = netdev_priv(dev);
1164 struct dev_mc_list *dmi = dev->mc_list;
1165 u_long iobase = dev->base_addr;
1166 int i;
1167 char *addrs, bit, byte;
1168 short __iomem *p = lp->mctbl;
1169 u16 hashcode;
1170 u32 crc;
1171
1172 spin_lock_irq(&lp->hw_lock);
1173
1174 if (lp->shmem_length == IO_ONLY) {
1175 outb(0, EWRK3_IOPR);
1176 outw(PAGE0_HTE, EWRK3_PIR1);
1177 } else {
1178 outb(0, EWRK3_MPR);
1179 }
1180
1181 if (dev->flags & IFF_ALLMULTI) {
1182 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1183 if (lp->shmem_length == IO_ONLY) {
1184 outb(0xff, EWRK3_DATA);
1185 } else { /* memset didn't work here */
1186 writew(0xffff, p);
1187 p++;
1188 i++;
1189 }
1190 }
1191 } else {
1192 /* Clear table except for broadcast bit */
1193 if (lp->shmem_length == IO_ONLY) {
1194 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1195 outb(0x00, EWRK3_DATA);
1196 }
1197 outb(0x80, EWRK3_DATA);
1198 i++; /* insert the broadcast bit */
1199 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1200 outb(0x00, EWRK3_DATA);
1201 }
1202 } else {
1203 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1204 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1205 }
1206
1207 /* Update table */
1208 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1209 addrs = dmi->dmi_addr;
1210 dmi = dmi->next;
1211 if ((*addrs & 0x01) == 1) { /* multicast address? */
1212 crc = ether_crc_le(ETH_ALEN, addrs);
1213 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1214
1215 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1216 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1217
1218 if (lp->shmem_length == IO_ONLY) {
1219 u_char tmp;
1220
1221 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1222 tmp = inb(EWRK3_DATA);
1223 tmp |= bit;
1224 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1225 outb(tmp, EWRK3_DATA);
1226 } else {
1227 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1228 }
1229 }
1230 }
1231 }
1232
1233 spin_unlock_irq(&lp->hw_lock);
1234 }
1235
1236 /*
1237 ** ISA bus I/O device probe
1238 */
1239 static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1240 {
1241 int i = num_ewrks3s, maxSlots;
1242 int ret = -ENODEV;
1243
1244 u_long iobase;
1245
1246 if (ioaddr >= 0x400)
1247 goto out;
1248
1249 if (ioaddr == 0) { /* Autoprobing */
1250 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1251 maxSlots = 24;
1252 } else { /* Probe a specific location */
1253 iobase = ioaddr;
1254 maxSlots = i + 1;
1255 }
1256
1257 for (; (i < maxSlots) && (dev != NULL);
1258 iobase += EWRK3_IOP_INC, i++)
1259 {
1260 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1261 if (DevicePresent(iobase) == 0) {
1262 int irq = dev->irq;
1263 ret = ewrk3_hw_init(dev, iobase);
1264 if (!ret)
1265 break;
1266 dev->irq = irq;
1267 }
1268 release_region(iobase, EWRK3_TOTAL_SIZE);
1269 }
1270 }
1271 out:
1272
1273 return ret;
1274 }
1275
1276 /*
1277 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1278 ** the motherboard.
1279 */
1280 static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1281 {
1282 int i, maxSlots;
1283 u_long iobase;
1284 int ret = -ENODEV;
1285
1286 if (ioaddr < 0x1000)
1287 goto out;
1288
1289 iobase = ioaddr;
1290 i = (ioaddr >> 12);
1291 maxSlots = i + 1;
1292
1293 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1294 if (EISA_signature(name, EISA_ID) == 0) {
1295 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1296 DevicePresent(iobase) == 0) {
1297 int irq = dev->irq;
1298 ret = ewrk3_hw_init(dev, iobase);
1299 if (!ret)
1300 break;
1301 dev->irq = irq;
1302 }
1303 release_region(iobase, EWRK3_TOTAL_SIZE);
1304 }
1305 }
1306
1307 out:
1308 return ret;
1309 }
1310
1311
1312 /*
1313 ** Read the EWRK3 EEPROM using this routine
1314 */
1315 static int Read_EEPROM(u_long iobase, u_char eaddr)
1316 {
1317 int i;
1318
1319 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1320 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1321 for (i = 0; i < 5000; i++)
1322 inb(EWRK3_CSR); /* wait 1msec */
1323
1324 return inw(EWRK3_EPROM1); /* 16 bits data return */
1325 }
1326
1327 /*
1328 ** Write the EWRK3 EEPROM using this routine
1329 */
1330 static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1331 {
1332 int i;
1333
1334 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1335 for (i = 0; i < 5000; i++)
1336 inb(EWRK3_CSR); /* wait 1msec */
1337 outw(data, EWRK3_EPROM1); /* write data to register */
1338 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1339 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1340 for (i = 0; i < 75000; i++)
1341 inb(EWRK3_CSR); /* wait 15msec */
1342 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1343 for (i = 0; i < 5000; i++)
1344 inb(EWRK3_CSR); /* wait 1msec */
1345
1346 return 0;
1347 }
1348
1349 /*
1350 ** Look for a particular board name in the on-board EEPROM.
1351 */
1352 static void __init EthwrkSignature(char *name, char *eeprom_image)
1353 {
1354 int i;
1355 char *signatures[] = EWRK3_SIGNATURE;
1356
1357 for (i=0; *signatures[i] != '\0'; i++)
1358 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1359 break;
1360
1361 if (*signatures[i] != '\0') {
1362 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1363 name[EWRK3_STRLEN] = '\0';
1364 } else
1365 name[0] = '\0';
1366
1367 return;
1368 }
1369
1370 /*
1371 ** Look for a special sequence in the Ethernet station address PROM that
1372 ** is common across all EWRK3 products.
1373 **
1374 ** Search the Ethernet address ROM for the signature. Since the ROM address
1375 ** counter can start at an arbitrary point, the search must include the entire
1376 ** probe sequence length plus the (length_of_the_signature - 1).
1377 ** Stop the search IMMEDIATELY after the signature is found so that the
1378 ** PROM address counter is correctly positioned at the start of the
1379 ** ethernet address for later read out.
1380 */
1381
1382 static int __init DevicePresent(u_long iobase)
1383 {
1384 union {
1385 struct {
1386 u32 a;
1387 u32 b;
1388 } llsig;
1389 char Sig[sizeof(u32) << 1];
1390 }
1391 dev;
1392 short sigLength;
1393 char data;
1394 int i, j, status = 0;
1395
1396 dev.llsig.a = ETH_PROM_SIG;
1397 dev.llsig.b = ETH_PROM_SIG;
1398 sigLength = sizeof(u32) << 1;
1399
1400 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1401 data = inb(EWRK3_APROM);
1402 if (dev.Sig[j] == data) { /* track signature */
1403 j++;
1404 } else { /* lost signature; begin search again */
1405 if (data == dev.Sig[0]) {
1406 j = 1;
1407 } else {
1408 j = 0;
1409 }
1410 }
1411 }
1412
1413 if (j != sigLength) {
1414 status = -ENODEV; /* search failed */
1415 }
1416 return status;
1417 }
1418
1419 static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1420 {
1421 int i, j, k;
1422 u_short chksum;
1423 u_char crc, lfsr, sd, status = 0;
1424 u_long iobase = dev->base_addr;
1425 u16 tmp;
1426
1427 if (chipType == LeMAC2) {
1428 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1429 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1430 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1431 for (k = 0; k < 8; k++, sd >>= 1) {
1432 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1433 crc = (crc >> 1) + lfsr;
1434 }
1435 }
1436 if (crc != eeprom_image[EEPROM_PA_CRC])
1437 status = -1;
1438 } else {
1439 for (i = 0, k = 0; i < ETH_ALEN;) {
1440 k <<= 1;
1441 if (k > 0xffff)
1442 k -= 0xffff;
1443
1444 k += (u_char) (tmp = inb(EWRK3_APROM));
1445 dev->dev_addr[i] = (u_char) tmp;
1446 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1447 i++;
1448 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1449 dev->dev_addr[i] = (u_char) tmp;
1450 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1451 i++;
1452
1453 if (k > 0xffff)
1454 k -= 0xffff;
1455 }
1456 if (k == 0xffff)
1457 k = 0;
1458 chksum = inb(EWRK3_APROM);
1459 chksum |= (inb(EWRK3_APROM) << 8);
1460 if (k != chksum)
1461 status = -1;
1462 }
1463
1464 return status;
1465 }
1466
1467 /*
1468 ** Look for a particular board name in the EISA configuration space
1469 */
1470 static int __init EISA_signature(char *name, s32 eisa_id)
1471 {
1472 u_long i;
1473 char *signatures[] = EWRK3_SIGNATURE;
1474 char ManCode[EWRK3_STRLEN];
1475 union {
1476 s32 ID;
1477 char Id[4];
1478 } Eisa;
1479 int status = 0;
1480
1481 *name = '\0';
1482 for (i = 0; i < 4; i++) {
1483 Eisa.Id[i] = inb(eisa_id + i);
1484 }
1485
1486 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1487 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1488 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1489 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1490 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1491 ManCode[5] = '\0';
1492
1493 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1494 if (strstr(ManCode, signatures[i]) != NULL) {
1495 strcpy(name, ManCode);
1496 status = 1;
1497 }
1498 }
1499
1500 return status; /* return the device name string */
1501 }
1502
1503 static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1504 {
1505 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1506
1507 strcpy(info->driver, DRV_NAME);
1508 strcpy(info->version, DRV_VERSION);
1509 sprintf(info->fw_version, "%d", fwrev);
1510 strcpy(info->bus_info, "N/A");
1511 info->eedump_len = EEPROM_MAX;
1512 }
1513
1514 static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1515 {
1516 struct ewrk3_private *lp = netdev_priv(dev);
1517 unsigned long iobase = dev->base_addr;
1518 u8 cr = inb(EWRK3_CR);
1519
1520 switch (lp->adapter_name[4]) {
1521 case '3': /* DE203 */
1522 ecmd->supported = SUPPORTED_BNC;
1523 ecmd->port = PORT_BNC;
1524 break;
1525
1526 case '4': /* DE204 */
1527 ecmd->supported = SUPPORTED_TP;
1528 ecmd->port = PORT_TP;
1529 break;
1530
1531 case '5': /* DE205 */
1532 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1533 ecmd->autoneg = !(cr & CR_APD);
1534 /*
1535 ** Port is only valid if autoneg is disabled
1536 ** and even then we don't know if AUI is jumpered.
1537 */
1538 if (!ecmd->autoneg)
1539 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1540 break;
1541 }
1542
1543 ecmd->supported |= SUPPORTED_10baseT_Half;
1544 ecmd->speed = SPEED_10;
1545 ecmd->duplex = DUPLEX_HALF;
1546 return 0;
1547 }
1548
1549 static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1550 {
1551 struct ewrk3_private *lp = netdev_priv(dev);
1552 unsigned long iobase = dev->base_addr;
1553 unsigned long flags;
1554 u8 cr;
1555
1556 /* DE205 is the only card with anything to set */
1557 if (lp->adapter_name[4] != '5')
1558 return -EOPNOTSUPP;
1559
1560 /* Sanity-check parameters */
1561 if (ecmd->speed != SPEED_10)
1562 return -EINVAL;
1563 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1564 return -EINVAL; /* AUI is not software-selectable */
1565 if (ecmd->transceiver != XCVR_INTERNAL)
1566 return -EINVAL;
1567 if (ecmd->duplex != DUPLEX_HALF)
1568 return -EINVAL;
1569 if (ecmd->phy_address != 0)
1570 return -EINVAL;
1571
1572 spin_lock_irqsave(&lp->hw_lock, flags);
1573 cr = inb(EWRK3_CR);
1574
1575 /* If Autoneg is set, change to Auto Port mode */
1576 /* Otherwise, disable Auto Port and set port explicitly */
1577 if (ecmd->autoneg) {
1578 cr &= ~CR_APD;
1579 } else {
1580 cr |= CR_APD;
1581 if (ecmd->port == PORT_TP)
1582 cr &= ~CR_PSEL; /* Force TP */
1583 else
1584 cr |= CR_PSEL; /* Force BNC */
1585 }
1586
1587 /* Commit the changes */
1588 outb(cr, EWRK3_CR);
1589 spin_unlock_irqrestore(&lp->hw_lock, flags);
1590 return 0;
1591 }
1592
1593 static u32 ewrk3_get_link(struct net_device *dev)
1594 {
1595 unsigned long iobase = dev->base_addr;
1596 u8 cmr = inb(EWRK3_CMR);
1597 /* DE203 has BNC only and link status does not apply */
1598 /* On DE204 this is always valid since TP is the only port. */
1599 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1600 return !(cmr & CMR_LINK);
1601 }
1602
1603 static int ewrk3_phys_id(struct net_device *dev, u32 data)
1604 {
1605 struct ewrk3_private *lp = netdev_priv(dev);
1606 unsigned long iobase = dev->base_addr;
1607 unsigned long flags;
1608 u8 cr;
1609 int count;
1610
1611 /* Toggle LED 4x per second */
1612 count = data << 2;
1613
1614 spin_lock_irqsave(&lp->hw_lock, flags);
1615
1616 /* Bail if a PHYS_ID is already in progress */
1617 if (lp->led_mask == 0) {
1618 spin_unlock_irqrestore(&lp->hw_lock, flags);
1619 return -EBUSY;
1620 }
1621
1622 /* Prevent ISR from twiddling the LED */
1623 lp->led_mask = 0;
1624
1625 while (count--) {
1626 /* Toggle the LED */
1627 cr = inb(EWRK3_CR);
1628 outb(cr ^ CR_LED, EWRK3_CR);
1629
1630 /* Wait a little while */
1631 spin_unlock_irqrestore(&lp->hw_lock, flags);
1632 msleep(250);
1633 spin_lock_irqsave(&lp->hw_lock, flags);
1634
1635 /* Exit if we got a signal */
1636 if (signal_pending(current))
1637 break;
1638 }
1639
1640 lp->led_mask = CR_LED;
1641 cr = inb(EWRK3_CR);
1642 outb(cr & ~CR_LED, EWRK3_CR);
1643 spin_unlock_irqrestore(&lp->hw_lock, flags);
1644 return signal_pending(current) ? -ERESTARTSYS : 0;
1645 }
1646
1647 static const struct ethtool_ops ethtool_ops_203 = {
1648 .get_drvinfo = ewrk3_get_drvinfo,
1649 .get_settings = ewrk3_get_settings,
1650 .set_settings = ewrk3_set_settings,
1651 .phys_id = ewrk3_phys_id,
1652 };
1653
1654 static const struct ethtool_ops ethtool_ops = {
1655 .get_drvinfo = ewrk3_get_drvinfo,
1656 .get_settings = ewrk3_get_settings,
1657 .set_settings = ewrk3_set_settings,
1658 .get_link = ewrk3_get_link,
1659 .phys_id = ewrk3_phys_id,
1660 };
1661
1662 /*
1663 ** Perform IOCTL call functions here. Some are privileged operations and the
1664 ** effective uid is checked in those cases.
1665 */
1666 static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1667 {
1668 struct ewrk3_private *lp = netdev_priv(dev);
1669 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1670 u_long iobase = dev->base_addr;
1671 int i, j, status = 0;
1672 u_char csr;
1673 unsigned long flags;
1674 union ewrk3_addr {
1675 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1676 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1677 };
1678
1679 union ewrk3_addr *tmp;
1680
1681 /* All we handle are private IOCTLs */
1682 if (cmd != EWRK3IOCTL)
1683 return -EOPNOTSUPP;
1684
1685 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1686 if(tmp==NULL)
1687 return -ENOMEM;
1688
1689 switch (ioc->cmd) {
1690 case EWRK3_GET_HWADDR: /* Get the hardware address */
1691 for (i = 0; i < ETH_ALEN; i++) {
1692 tmp->addr[i] = dev->dev_addr[i];
1693 }
1694 ioc->len = ETH_ALEN;
1695 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1696 status = -EFAULT;
1697 break;
1698
1699 case EWRK3_SET_HWADDR: /* Set the hardware address */
1700 if (capable(CAP_NET_ADMIN)) {
1701 spin_lock_irqsave(&lp->hw_lock, flags);
1702 csr = inb(EWRK3_CSR);
1703 csr |= (CSR_TXD | CSR_RXD);
1704 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1705 spin_unlock_irqrestore(&lp->hw_lock, flags);
1706
1707 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1708 status = -EFAULT;
1709 break;
1710 }
1711 spin_lock_irqsave(&lp->hw_lock, flags);
1712 for (i = 0; i < ETH_ALEN; i++) {
1713 dev->dev_addr[i] = tmp->addr[i];
1714 outb(tmp->addr[i], EWRK3_PAR0 + i);
1715 }
1716
1717 csr = inb(EWRK3_CSR);
1718 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1719 outb(csr, EWRK3_CSR);
1720 spin_unlock_irqrestore(&lp->hw_lock, flags);
1721 } else {
1722 status = -EPERM;
1723 }
1724
1725 break;
1726 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1727 if (capable(CAP_NET_ADMIN)) {
1728 spin_lock_irqsave(&lp->hw_lock, flags);
1729 csr = inb(EWRK3_CSR);
1730 csr |= CSR_PME;
1731 csr &= ~CSR_MCE;
1732 outb(csr, EWRK3_CSR);
1733 spin_unlock_irqrestore(&lp->hw_lock, flags);
1734 } else {
1735 status = -EPERM;
1736 }
1737
1738 break;
1739 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1740 if (capable(CAP_NET_ADMIN)) {
1741 spin_lock_irqsave(&lp->hw_lock, flags);
1742 csr = inb(EWRK3_CSR);
1743 csr &= ~CSR_PME;
1744 outb(csr, EWRK3_CSR);
1745 spin_unlock_irqrestore(&lp->hw_lock, flags);
1746 } else {
1747 status = -EPERM;
1748 }
1749
1750 break;
1751 case EWRK3_GET_MCA: /* Get the multicast address table */
1752 spin_lock_irqsave(&lp->hw_lock, flags);
1753 if (lp->shmem_length == IO_ONLY) {
1754 outb(0, EWRK3_IOPR);
1755 outw(PAGE0_HTE, EWRK3_PIR1);
1756 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1757 tmp->addr[i] = inb(EWRK3_DATA);
1758 }
1759 } else {
1760 outb(0, EWRK3_MPR);
1761 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1762 }
1763 spin_unlock_irqrestore(&lp->hw_lock, flags);
1764
1765 ioc->len = (HASH_TABLE_LEN >> 3);
1766 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1767 status = -EFAULT;
1768
1769 break;
1770 case EWRK3_SET_MCA: /* Set a multicast address */
1771 if (capable(CAP_NET_ADMIN)) {
1772 if (ioc->len > 1024)
1773 {
1774 status = -EINVAL;
1775 break;
1776 }
1777 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1778 status = -EFAULT;
1779 break;
1780 }
1781 set_multicast_list(dev);
1782 } else {
1783 status = -EPERM;
1784 }
1785
1786 break;
1787 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1788 if (capable(CAP_NET_ADMIN)) {
1789 set_multicast_list(dev);
1790 } else {
1791 status = -EPERM;
1792 }
1793
1794 break;
1795 case EWRK3_MCA_EN: /* Enable multicast addressing */
1796 if (capable(CAP_NET_ADMIN)) {
1797 spin_lock_irqsave(&lp->hw_lock, flags);
1798 csr = inb(EWRK3_CSR);
1799 csr |= CSR_MCE;
1800 csr &= ~CSR_PME;
1801 outb(csr, EWRK3_CSR);
1802 spin_unlock_irqrestore(&lp->hw_lock, flags);
1803 } else {
1804 status = -EPERM;
1805 }
1806
1807 break;
1808 case EWRK3_GET_STATS: { /* Get the driver statistics */
1809 struct ewrk3_stats *tmp_stats =
1810 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1811 if (!tmp_stats) {
1812 status = -ENOMEM;
1813 break;
1814 }
1815
1816 spin_lock_irqsave(&lp->hw_lock, flags);
1817 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1818 spin_unlock_irqrestore(&lp->hw_lock, flags);
1819
1820 ioc->len = sizeof(lp->pktStats);
1821 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1822 status = -EFAULT;
1823 kfree(tmp_stats);
1824 break;
1825 }
1826 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1827 if (capable(CAP_NET_ADMIN)) {
1828 spin_lock_irqsave(&lp->hw_lock, flags);
1829 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1830 spin_unlock_irqrestore(&lp->hw_lock,flags);
1831 } else {
1832 status = -EPERM;
1833 }
1834
1835 break;
1836 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1837 tmp->addr[0] = inb(EWRK3_CSR);
1838 ioc->len = 1;
1839 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1840 status = -EFAULT;
1841 break;
1842 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1843 if (capable(CAP_NET_ADMIN)) {
1844 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1845 status = -EFAULT;
1846 break;
1847 }
1848 outb(tmp->addr[0], EWRK3_CSR);
1849 } else {
1850 status = -EPERM;
1851 }
1852
1853 break;
1854 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1855 if (capable(CAP_NET_ADMIN)) {
1856 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1857 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1858 }
1859 i = EEPROM_MAX;
1860 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1861 for (j = 0; j < ETH_ALEN; j++) {
1862 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1863 }
1864 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1865 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1866 status = -EFAULT;
1867 } else {
1868 status = -EPERM;
1869 }
1870
1871 break;
1872 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1873 if (capable(CAP_NET_ADMIN)) {
1874 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1875 status = -EFAULT;
1876 break;
1877 }
1878 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1879 Write_EEPROM(tmp->val[i], iobase, i);
1880 }
1881 } else {
1882 status = -EPERM;
1883 }
1884
1885 break;
1886 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1887 tmp->addr[0] = inb(EWRK3_CMR);
1888 ioc->len = 1;
1889 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1890 status = -EFAULT;
1891 break;
1892 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1893 if (capable(CAP_NET_ADMIN)) {
1894 lp->txc = 1;
1895 } else {
1896 status = -EPERM;
1897 }
1898
1899 break;
1900 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1901 if (capable(CAP_NET_ADMIN)) {
1902 lp->txc = 0;
1903 } else {
1904 status = -EPERM;
1905 }
1906
1907 break;
1908 default:
1909 status = -EOPNOTSUPP;
1910 }
1911 kfree(tmp);
1912 return status;
1913 }
1914
1915 #ifdef MODULE
1916 static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1917 static int ndevs;
1918 static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1919
1920 /* '21' below should really be 'MAX_NUM_EWRK3S' */
1921 module_param_array(io, int, NULL, 0);
1922 module_param_array(irq, int, NULL, 0);
1923 MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1924 MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1925
1926 static __exit void ewrk3_exit_module(void)
1927 {
1928 int i;
1929
1930 for( i=0; i<ndevs; i++ ) {
1931 struct net_device *dev = ewrk3_devs[i];
1932 struct ewrk3_private *lp = netdev_priv(dev);
1933 ewrk3_devs[i] = NULL;
1934 unregister_netdev(dev);
1935 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1936 iounmap(lp->shmem);
1937 free_netdev(dev);
1938 }
1939 }
1940
1941 static __init int ewrk3_init_module(void)
1942 {
1943 int i=0;
1944
1945 while( io[i] && irq[i] ) {
1946 struct net_device *dev
1947 = alloc_etherdev(sizeof(struct ewrk3_private));
1948
1949 if (!dev)
1950 break;
1951
1952 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1953 free_netdev(dev);
1954 break;
1955 }
1956
1957 ewrk3_devs[ndevs++] = dev;
1958 i++;
1959 }
1960
1961 return ndevs ? 0 : -EIO;
1962 }
1963
1964
1965 /* Hack for breakage in new module stuff */
1966 module_exit(ewrk3_exit_module);
1967 module_init(ewrk3_init_module);
1968 #endif /* MODULE */
1969 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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