drivers/net/: use DEFINE_PCI_DEVICE_TABLE()
[deliverable/linux.git] / drivers / net / hamachi.c
1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
24 or
25 http://www.parl.clemson.edu/~keithu/hamachi.html
26
27 */
28
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
32
33
34 /* A few user-configurable values. */
35
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
45 */
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
52
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
56 */
57 static int rx_copybreak;
58
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
62 */
63 static int force32;
64
65
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
75 Default is autodetect
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
84 */
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
91 *
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
98 * interrupts.
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
101 *
102 */
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
105
106 /* Operational parameters that are set at compile time. */
107
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
118 */
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
123
124 /*
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
127 */
128
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
131
132 /*
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
136 * easy mechanism by which to tell the TCP/UDP stack that it need not
137 * generate checksums for this device. But if somebody can find a way
138 * to get that to work, most of the card work is in here already.
139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
140 */
141 #undef TX_CHECKSUM
142 #define RX_CHECKSUM
143
144 /* Operational parameters that usually are not changed. */
145 /* Time in jiffies before concluding the transmitter is hung. */
146 #define TX_TIMEOUT (5*HZ)
147
148 #include <linux/capability.h>
149 #include <linux/module.h>
150 #include <linux/kernel.h>
151 #include <linux/string.h>
152 #include <linux/timer.h>
153 #include <linux/time.h>
154 #include <linux/errno.h>
155 #include <linux/ioport.h>
156 #include <linux/slab.h>
157 #include <linux/interrupt.h>
158 #include <linux/pci.h>
159 #include <linux/init.h>
160 #include <linux/ethtool.h>
161 #include <linux/mii.h>
162 #include <linux/netdevice.h>
163 #include <linux/etherdevice.h>
164 #include <linux/skbuff.h>
165 #include <linux/ip.h>
166 #include <linux/delay.h>
167 #include <linux/bitops.h>
168
169 #include <asm/uaccess.h>
170 #include <asm/processor.h> /* Processor type for cache alignment. */
171 #include <asm/io.h>
172 #include <asm/unaligned.h>
173 #include <asm/cache.h>
174
175 static const char version[] __devinitconst =
176 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
177 " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
178 " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
179
180
181 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
182 we need it for hardware checksumming support. FYI... some of
183 the definitions in <netinet/ip.h> conflict/duplicate those in
184 other linux headers causing many compiler warnings.
185 */
186 #ifndef IP_MF
187 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
188 #endif
189
190 /* Define IP_OFFSET to be IPOPT_OFFSET */
191 #ifndef IP_OFFSET
192 #ifdef IPOPT_OFFSET
193 #define IP_OFFSET IPOPT_OFFSET
194 #else
195 #define IP_OFFSET 2
196 #endif
197 #endif
198
199 #define RUN_AT(x) (jiffies + (x))
200
201 #ifndef ADDRLEN
202 #define ADDRLEN 32
203 #endif
204
205 /* Condensed bus+endian portability operations. */
206 #if ADDRLEN == 64
207 #define cpu_to_leXX(addr) cpu_to_le64(addr)
208 #define leXX_to_cpu(addr) le64_to_cpu(addr)
209 #else
210 #define cpu_to_leXX(addr) cpu_to_le32(addr)
211 #define leXX_to_cpu(addr) le32_to_cpu(addr)
212 #endif
213
214
215 /*
216 Theory of Operation
217
218 I. Board Compatibility
219
220 This device driver is designed for the Packet Engines "Hamachi"
221 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
222 66Mhz PCI card.
223
224 II. Board-specific settings
225
226 No jumpers exist on the board. The chip supports software correction of
227 various motherboard wiring errors, however this driver does not support
228 that feature.
229
230 III. Driver operation
231
232 IIIa. Ring buffers
233
234 The Hamachi uses a typical descriptor based bus-master architecture.
235 The descriptor list is similar to that used by the Digital Tulip.
236 This driver uses two statically allocated fixed-size descriptor lists
237 formed into rings by a branch from the final descriptor to the beginning of
238 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
239
240 This driver uses a zero-copy receive and transmit scheme similar my other
241 network drivers.
242 The driver allocates full frame size skbuffs for the Rx ring buffers at
243 open() time and passes the skb->data field to the Hamachi as receive data
244 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
245 a fresh skbuff is allocated and the frame is copied to the new skbuff.
246 When the incoming frame is larger, the skbuff is passed directly up the
247 protocol stack and replaced by a newly allocated skbuff.
248
249 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
250 using a full-sized skbuff for small frames vs. the copying costs of larger
251 frames. Gigabit cards are typically used on generously configured machines
252 and the underfilled buffers have negligible impact compared to the benefit of
253 a single allocation size, so the default value of zero results in never
254 copying packets.
255
256 IIIb/c. Transmit/Receive Structure
257
258 The Rx and Tx descriptor structure are straight-forward, with no historical
259 baggage that must be explained. Unlike the awkward DBDMA structure, there
260 are no unused fields or option bits that had only one allowable setting.
261
262 Two details should be noted about the descriptors: The chip supports both 32
263 bit and 64 bit address structures, and the length field is overwritten on
264 the receive descriptors. The descriptor length is set in the control word
265 for each channel. The development driver uses 32 bit addresses only, however
266 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
267
268 IIId. Synchronization
269
270 This driver is very similar to my other network drivers.
271 The driver runs as two independent, single-threaded flows of control. One
272 is the send-packet routine, which enforces single-threaded use by the
273 dev->tbusy flag. The other thread is the interrupt handler, which is single
274 threaded by the hardware and other software.
275
276 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
277 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
278 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
279 the 'hmp->tx_full' flag.
280
281 The interrupt handler has exclusive control over the Rx ring and records stats
282 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
283 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
284 clears both the tx_full and tbusy flags.
285
286 IV. Notes
287
288 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
289
290 IVb. References
291
292 Hamachi Engineering Design Specification, 5/15/97
293 (Note: This version was marked "Confidential".)
294
295 IVc. Errata
296
297 None noted.
298
299 V. Recent Changes
300
301 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
302 to help avoid some stall conditions -- this needs further research.
303
304 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
305 the Tx ring and is called from hamachi_start_xmit (this used to be
306 called from hamachi_interrupt but it tends to delay execution of the
307 interrupt handler and thus reduce bandwidth by reducing the latency
308 between hamachi_rx()'s). Notably, some modification has been made so
309 that the cleaning loop checks only to make sure that the DescOwn bit
310 isn't set in the status flag since the card is not required
311 to set the entire flag to zero after processing.
312
313 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
314 checked before attempting to add a buffer to the ring. If the ring is full
315 an attempt is made to free any dirty buffers and thus find space for
316 the new buffer or the function returns non-zero which should case the
317 scheduler to reschedule the buffer later.
318
319 01/15/1999 EPK Some adjustments were made to the chip initialization.
320 End-to-end flow control should now be fully active and the interrupt
321 algorithm vars have been changed. These could probably use further tuning.
322
323 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
324 set the rx and tx latencies for the Hamachi interrupts. If you're having
325 problems with network stalls, try setting these to higher values.
326 Valid values are 0x00 through 0xff.
327
328 01/15/1999 EPK In general, the overall bandwidth has increased and
329 latencies are better (sometimes by a factor of 2). Stalls are rare at
330 this point, however there still appears to be a bug somewhere between the
331 hardware and driver. TCP checksum errors under load also appear to be
332 eliminated at this point.
333
334 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
335 Rx and Tx rings. This appears to have been affecting whether a particular
336 peer-to-peer connection would hang under high load. I believe the Rx
337 rings was typically getting set correctly, but the Tx ring wasn't getting
338 the DescEndRing bit set during initialization. ??? Does this mean the
339 hamachi card is using the DescEndRing in processing even if a particular
340 slot isn't in use -- hypothetically, the card might be searching the
341 entire Tx ring for slots with the DescOwn bit set and then processing
342 them. If the DescEndRing bit isn't set, then it might just wander off
343 through memory until it hits a chunk of data with that bit set
344 and then looping back.
345
346 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
347 problem (TxCmd and RxCmd need only to be set when idle or stopped.
348
349 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
350 (Michel Mueller pointed out the ``permanently busy'' potential
351 problem here).
352
353 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
354
355 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
356 incorrectly defined and corrected (as per Michel Mueller).
357
358 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
359 were available before reseting the tbusy and tx_full flags
360 (as per Michel Mueller).
361
362 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
363
364 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
365 32 bit.
366
367 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
368 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
369 re-structuring I would like to do.
370
371 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
372 parameters on a dual P3-450 setup yielded the new default interrupt
373 mitigation parameters. Tx should interrupt VERY infrequently due to
374 Eric's scheme. Rx should be more often...
375
376 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
377 nicely with non-linux machines.
378
379 03/13/2000 KDU Experimented with some of the configuration values:
380
381 -It seems that enabling PCI performance commands for descriptors
382 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
383 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
384 leave them that way until I hear further feedback.
385
386 -Increasing the PCI_LATENCY_TIMER to 130
387 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
388 degrade performance. Leaving default at 64 pending further information.
389
390 03/14/2000 KDU Further tuning:
391
392 -adjusted boguscnt in hamachi_rx() to depend on interrupt
393 mitigation parameters chosen.
394
395 -Selected a set of interrupt parameters based on some extensive testing.
396 These may change with more testing.
397
398 TO DO:
399
400 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
401 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
402 that case.
403
404 -fix the reset procedure. It doesn't quite work.
405 */
406
407 /* A few values that may be tweaked. */
408 /* Size of each temporary Rx buffer, calculated as:
409 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
410 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum
411 */
412 #define PKT_BUF_SZ 1536
413
414 /* For now, this is going to be set to the maximum size of an ethernet
415 * packet. Eventually, we may want to make it a variable that is
416 * related to the MTU
417 */
418 #define MAX_FRAME_SIZE 1518
419
420 /* The rest of these values should never change. */
421
422 static void hamachi_timer(unsigned long data);
423
424 enum capability_flags {CanHaveMII=1, };
425 static const struct chip_info {
426 u16 vendor_id, device_id, device_id_mask, pad;
427 const char *name;
428 void (*media_timer)(unsigned long data);
429 int flags;
430 } chip_tbl[] = {
431 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
432 {0,},
433 };
434
435 /* Offsets to the Hamachi registers. Various sizes. */
436 enum hamachi_offsets {
437 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
438 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
439 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
440 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
441 TxChecksum=0x074, RxChecksum=0x076,
442 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
443 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
444 EventStatus=0x08C,
445 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
446 /* See enum MII_offsets below. */
447 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
448 AddrMode=0x0D0, StationAddr=0x0D2,
449 /* Gigabit AutoNegotiation. */
450 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
451 ANLinkPartnerAbility=0x0EA,
452 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
453 FIFOcfg=0x0F8,
454 };
455
456 /* Offsets to the MII-mode registers. */
457 enum MII_offsets {
458 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
459 MII_Status=0xAE,
460 };
461
462 /* Bits in the interrupt status/mask registers. */
463 enum intr_status_bits {
464 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
465 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
466 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
467
468 /* The Hamachi Rx and Tx buffer descriptors. */
469 struct hamachi_desc {
470 __le32 status_n_length;
471 #if ADDRLEN == 64
472 u32 pad;
473 __le64 addr;
474 #else
475 __le32 addr;
476 #endif
477 };
478
479 /* Bits in hamachi_desc.status_n_length */
480 enum desc_status_bits {
481 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
482 DescIntr=0x10000000,
483 };
484
485 #define PRIV_ALIGN 15 /* Required alignment mask */
486 #define MII_CNT 4
487 struct hamachi_private {
488 /* Descriptor rings first for alignment. Tx requires a second descriptor
489 for status. */
490 struct hamachi_desc *rx_ring;
491 struct hamachi_desc *tx_ring;
492 struct sk_buff* rx_skbuff[RX_RING_SIZE];
493 struct sk_buff* tx_skbuff[TX_RING_SIZE];
494 dma_addr_t tx_ring_dma;
495 dma_addr_t rx_ring_dma;
496 struct net_device_stats stats;
497 struct timer_list timer; /* Media selection timer. */
498 /* Frequently used and paired value: keep adjacent for cache effect. */
499 spinlock_t lock;
500 int chip_id;
501 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
502 unsigned int cur_tx, dirty_tx;
503 unsigned int rx_buf_sz; /* Based on MTU+slack. */
504 unsigned int tx_full:1; /* The Tx queue is full. */
505 unsigned int duplex_lock:1;
506 unsigned int default_port:4; /* Last dev->if_port value. */
507 /* MII transceiver section. */
508 int mii_cnt; /* MII device addresses. */
509 struct mii_if_info mii_if; /* MII lib hooks/info */
510 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
511 u32 rx_int_var, tx_int_var; /* interrupt control variables */
512 u32 option; /* Hold on to a copy of the options */
513 struct pci_dev *pci_dev;
514 void __iomem *base;
515 };
516
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
520
521 module_param(max_interrupt_work, int, 0);
522 module_param(mtu, int, 0);
523 module_param(debug, int, 0);
524 module_param(min_rx_pkt, int, 0);
525 module_param(max_rx_gap, int, 0);
526 module_param(max_rx_latency, int, 0);
527 module_param(min_tx_pkt, int, 0);
528 module_param(max_tx_gap, int, 0);
529 module_param(max_tx_latency, int, 0);
530 module_param(rx_copybreak, int, 0);
531 module_param_array(rx_params, int, NULL, 0);
532 module_param_array(tx_params, int, NULL, 0);
533 module_param_array(options, int, NULL, 0);
534 module_param_array(full_duplex, int, NULL, 0);
535 module_param(force32, int, 0);
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
551
552 static int read_eeprom(void __iomem *ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
561 struct net_device *dev);
562 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
563 static int hamachi_rx(struct net_device *dev);
564 static inline int hamachi_tx(struct net_device *dev);
565 static void hamachi_error(struct net_device *dev, int intr_status);
566 static int hamachi_close(struct net_device *dev);
567 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
568 static void set_rx_mode(struct net_device *dev);
569 static const struct ethtool_ops ethtool_ops;
570 static const struct ethtool_ops ethtool_ops_no_mii;
571
572 static const struct net_device_ops hamachi_netdev_ops = {
573 .ndo_open = hamachi_open,
574 .ndo_stop = hamachi_close,
575 .ndo_start_xmit = hamachi_start_xmit,
576 .ndo_get_stats = hamachi_get_stats,
577 .ndo_set_multicast_list = set_rx_mode,
578 .ndo_change_mtu = eth_change_mtu,
579 .ndo_validate_addr = eth_validate_addr,
580 .ndo_set_mac_address = eth_mac_addr,
581 .ndo_tx_timeout = hamachi_tx_timeout,
582 .ndo_do_ioctl = netdev_ioctl,
583 };
584
585
586 static int __devinit hamachi_init_one (struct pci_dev *pdev,
587 const struct pci_device_id *ent)
588 {
589 struct hamachi_private *hmp;
590 int option, i, rx_int_var, tx_int_var, boguscnt;
591 int chip_id = ent->driver_data;
592 int irq;
593 void __iomem *ioaddr;
594 unsigned long base;
595 static int card_idx;
596 struct net_device *dev;
597 void *ring_space;
598 dma_addr_t ring_dma;
599 int ret = -ENOMEM;
600
601 /* when built into the kernel, we only print version if device is found */
602 #ifndef MODULE
603 static int printed_version;
604 if (!printed_version++)
605 printk(version);
606 #endif
607
608 if (pci_enable_device(pdev)) {
609 ret = -EIO;
610 goto err_out;
611 }
612
613 base = pci_resource_start(pdev, 0);
614 #ifdef __alpha__ /* Really "64 bit addrs" */
615 base |= (pci_resource_start(pdev, 1) << 32);
616 #endif
617
618 pci_set_master(pdev);
619
620 i = pci_request_regions(pdev, DRV_NAME);
621 if (i)
622 return i;
623
624 irq = pdev->irq;
625 ioaddr = ioremap(base, 0x400);
626 if (!ioaddr)
627 goto err_out_release;
628
629 dev = alloc_etherdev(sizeof(struct hamachi_private));
630 if (!dev)
631 goto err_out_iounmap;
632
633 SET_NETDEV_DEV(dev, &pdev->dev);
634
635 #ifdef TX_CHECKSUM
636 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
637 dev->hard_header_len += 8; /* for cksum tag */
638 #endif
639
640 for (i = 0; i < 6; i++)
641 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
642 : readb(ioaddr + StationAddr + i);
643
644 #if ! defined(final_version)
645 if (hamachi_debug > 4)
646 for (i = 0; i < 0x10; i++)
647 printk("%2.2x%s",
648 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
649 #endif
650
651 hmp = netdev_priv(dev);
652 spin_lock_init(&hmp->lock);
653
654 hmp->mii_if.dev = dev;
655 hmp->mii_if.mdio_read = mdio_read;
656 hmp->mii_if.mdio_write = mdio_write;
657 hmp->mii_if.phy_id_mask = 0x1f;
658 hmp->mii_if.reg_num_mask = 0x1f;
659
660 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
661 if (!ring_space)
662 goto err_out_cleardev;
663 hmp->tx_ring = (struct hamachi_desc *)ring_space;
664 hmp->tx_ring_dma = ring_dma;
665
666 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
667 if (!ring_space)
668 goto err_out_unmap_tx;
669 hmp->rx_ring = (struct hamachi_desc *)ring_space;
670 hmp->rx_ring_dma = ring_dma;
671
672 /* Check for options being passed in */
673 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
674 if (dev->mem_start)
675 option = dev->mem_start;
676
677 /* If the bus size is misidentified, do the following. */
678 force32 = force32 ? force32 :
679 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
680 if (force32)
681 writeb(force32, ioaddr + VirtualJumpers);
682
683 /* Hmmm, do we really need to reset the chip???. */
684 writeb(0x01, ioaddr + ChipReset);
685
686 /* After a reset, the clock speed measurement of the PCI bus will not
687 * be valid for a moment. Wait for a little while until it is. If
688 * it takes more than 10ms, forget it.
689 */
690 udelay(10);
691 i = readb(ioaddr + PCIClkMeas);
692 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
693 udelay(10);
694 i = readb(ioaddr + PCIClkMeas);
695 }
696
697 hmp->base = ioaddr;
698 dev->base_addr = (unsigned long)ioaddr;
699 dev->irq = irq;
700 pci_set_drvdata(pdev, dev);
701
702 hmp->chip_id = chip_id;
703 hmp->pci_dev = pdev;
704
705 /* The lower four bits are the media type. */
706 if (option > 0) {
707 hmp->option = option;
708 if (option & 0x200)
709 hmp->mii_if.full_duplex = 1;
710 else if (option & 0x080)
711 hmp->mii_if.full_duplex = 0;
712 hmp->default_port = option & 15;
713 if (hmp->default_port)
714 hmp->mii_if.force_media = 1;
715 }
716 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
717 hmp->mii_if.full_duplex = 1;
718
719 /* lock the duplex mode if someone specified a value */
720 if (hmp->mii_if.full_duplex || (option & 0x080))
721 hmp->duplex_lock = 1;
722
723 /* Set interrupt tuning parameters */
724 max_rx_latency = max_rx_latency & 0x00ff;
725 max_rx_gap = max_rx_gap & 0x00ff;
726 min_rx_pkt = min_rx_pkt & 0x00ff;
727 max_tx_latency = max_tx_latency & 0x00ff;
728 max_tx_gap = max_tx_gap & 0x00ff;
729 min_tx_pkt = min_tx_pkt & 0x00ff;
730
731 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
732 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
733 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
734 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
735 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
736 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
737
738
739 /* The Hamachi-specific entries in the device structure. */
740 dev->netdev_ops = &hamachi_netdev_ops;
741 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
742 SET_ETHTOOL_OPS(dev, &ethtool_ops);
743 else
744 SET_ETHTOOL_OPS(dev, &ethtool_ops_no_mii);
745 dev->watchdog_timeo = TX_TIMEOUT;
746 if (mtu)
747 dev->mtu = mtu;
748
749 i = register_netdev(dev);
750 if (i) {
751 ret = i;
752 goto err_out_unmap_rx;
753 }
754
755 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
756 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
757 ioaddr, dev->dev_addr, irq);
758 i = readb(ioaddr + PCIClkMeas);
759 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
760 "%2.2x, LPA %4.4x.\n",
761 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
762 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
763 readw(ioaddr + ANLinkPartnerAbility));
764
765 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
766 int phy, phy_idx = 0;
767 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
768 int mii_status = mdio_read(dev, phy, MII_BMSR);
769 if (mii_status != 0xffff &&
770 mii_status != 0x0000) {
771 hmp->phys[phy_idx++] = phy;
772 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
773 printk(KERN_INFO "%s: MII PHY found at address %d, status "
774 "0x%4.4x advertising %4.4x.\n",
775 dev->name, phy, mii_status, hmp->mii_if.advertising);
776 }
777 }
778 hmp->mii_cnt = phy_idx;
779 if (hmp->mii_cnt > 0)
780 hmp->mii_if.phy_id = hmp->phys[0];
781 else
782 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
783 }
784 /* Configure gigabit autonegotiation. */
785 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
786 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
787 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
788
789 card_idx++;
790 return 0;
791
792 err_out_unmap_rx:
793 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
794 hmp->rx_ring_dma);
795 err_out_unmap_tx:
796 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
797 hmp->tx_ring_dma);
798 err_out_cleardev:
799 free_netdev (dev);
800 err_out_iounmap:
801 iounmap(ioaddr);
802 err_out_release:
803 pci_release_regions(pdev);
804 err_out:
805 return ret;
806 }
807
808 static int __devinit read_eeprom(void __iomem *ioaddr, int location)
809 {
810 int bogus_cnt = 1000;
811
812 /* We should check busy first - per docs -KDU */
813 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
814 writew(location, ioaddr + EEAddr);
815 writeb(0x02, ioaddr + EECmdStatus);
816 bogus_cnt = 1000;
817 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
818 if (hamachi_debug > 5)
819 printk(" EEPROM status is %2.2x after %d ticks.\n",
820 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
821 return readb(ioaddr + EEData);
822 }
823
824 /* MII Managemen Data I/O accesses.
825 These routines assume the MDIO controller is idle, and do not exit until
826 the command is finished. */
827
828 static int mdio_read(struct net_device *dev, int phy_id, int location)
829 {
830 struct hamachi_private *hmp = netdev_priv(dev);
831 void __iomem *ioaddr = hmp->base;
832 int i;
833
834 /* We should check busy first - per docs -KDU */
835 for (i = 10000; i >= 0; i--)
836 if ((readw(ioaddr + MII_Status) & 1) == 0)
837 break;
838 writew((phy_id<<8) + location, ioaddr + MII_Addr);
839 writew(0x0001, ioaddr + MII_Cmd);
840 for (i = 10000; i >= 0; i--)
841 if ((readw(ioaddr + MII_Status) & 1) == 0)
842 break;
843 return readw(ioaddr + MII_Rd_Data);
844 }
845
846 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
847 {
848 struct hamachi_private *hmp = netdev_priv(dev);
849 void __iomem *ioaddr = hmp->base;
850 int i;
851
852 /* We should check busy first - per docs -KDU */
853 for (i = 10000; i >= 0; i--)
854 if ((readw(ioaddr + MII_Status) & 1) == 0)
855 break;
856 writew((phy_id<<8) + location, ioaddr + MII_Addr);
857 writew(value, ioaddr + MII_Wr_Data);
858
859 /* Wait for the command to finish. */
860 for (i = 10000; i >= 0; i--)
861 if ((readw(ioaddr + MII_Status) & 1) == 0)
862 break;
863 return;
864 }
865
866
867 static int hamachi_open(struct net_device *dev)
868 {
869 struct hamachi_private *hmp = netdev_priv(dev);
870 void __iomem *ioaddr = hmp->base;
871 int i;
872 u32 rx_int_var, tx_int_var;
873 u16 fifo_info;
874
875 i = request_irq(dev->irq, hamachi_interrupt, IRQF_SHARED, dev->name, dev);
876 if (i)
877 return i;
878
879 if (hamachi_debug > 1)
880 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
881 dev->name, dev->irq);
882
883 hamachi_init_ring(dev);
884
885 #if ADDRLEN == 64
886 /* writellll anyone ? */
887 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
888 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
889 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
890 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
891 #else
892 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
893 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
894 #endif
895
896 /* TODO: It would make sense to organize this as words since the card
897 * documentation does. -KDU
898 */
899 for (i = 0; i < 6; i++)
900 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
901
902 /* Initialize other registers: with so many this eventually this will
903 converted to an offset/value list. */
904
905 /* Configure the FIFO */
906 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
907 switch (fifo_info){
908 case 0 :
909 /* No FIFO */
910 writew(0x0000, ioaddr + FIFOcfg);
911 break;
912 case 1 :
913 /* Configure the FIFO for 512K external, 16K used for Tx. */
914 writew(0x0028, ioaddr + FIFOcfg);
915 break;
916 case 2 :
917 /* Configure the FIFO for 1024 external, 32K used for Tx. */
918 writew(0x004C, ioaddr + FIFOcfg);
919 break;
920 case 3 :
921 /* Configure the FIFO for 2048 external, 32K used for Tx. */
922 writew(0x006C, ioaddr + FIFOcfg);
923 break;
924 default :
925 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
926 dev->name);
927 /* Default to no FIFO */
928 writew(0x0000, ioaddr + FIFOcfg);
929 break;
930 }
931
932 if (dev->if_port == 0)
933 dev->if_port = hmp->default_port;
934
935
936 /* Setting the Rx mode will start the Rx process. */
937 /* If someone didn't choose a duplex, default to full-duplex */
938 if (hmp->duplex_lock != 1)
939 hmp->mii_if.full_duplex = 1;
940
941 /* always 1, takes no more time to do it */
942 writew(0x0001, ioaddr + RxChecksum);
943 #ifdef TX_CHECKSUM
944 writew(0x0001, ioaddr + TxChecksum);
945 #else
946 writew(0x0000, ioaddr + TxChecksum);
947 #endif
948 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
949 writew(0x215F, ioaddr + MACCnfg);
950 writew(0x000C, ioaddr + FrameGap0);
951 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
952 writew(0x1018, ioaddr + FrameGap1);
953 /* Why do we enable receives/transmits here? -KDU */
954 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
955 /* Enable automatic generation of flow control frames, period 0xffff. */
956 writel(0x0030FFFF, ioaddr + FlowCtrl);
957 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
958
959 /* Enable legacy links. */
960 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
961 /* Initial Link LED to blinking red. */
962 writeb(0x03, ioaddr + LEDCtrl);
963
964 /* Configure interrupt mitigation. This has a great effect on
965 performance, so systems tuning should start here!. */
966
967 rx_int_var = hmp->rx_int_var;
968 tx_int_var = hmp->tx_int_var;
969
970 if (hamachi_debug > 1) {
971 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
972 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
973 (tx_int_var & 0x00ff0000) >> 16);
974 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
975 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
976 (rx_int_var & 0x00ff0000) >> 16);
977 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
978 }
979
980 writel(tx_int_var, ioaddr + TxIntrCtrl);
981 writel(rx_int_var, ioaddr + RxIntrCtrl);
982
983 set_rx_mode(dev);
984
985 netif_start_queue(dev);
986
987 /* Enable interrupts by setting the interrupt mask. */
988 writel(0x80878787, ioaddr + InterruptEnable);
989 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
990
991 /* Configure and start the DMA channels. */
992 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
993 #if ADDRLEN == 64
994 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
995 writew(0x005D, ioaddr + TxDMACtrl);
996 #else
997 writew(0x001D, ioaddr + RxDMACtrl);
998 writew(0x001D, ioaddr + TxDMACtrl);
999 #endif
1000 writew(0x0001, ioaddr + RxCmd);
1001
1002 if (hamachi_debug > 2) {
1003 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
1004 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
1005 }
1006 /* Set the timer to check for link beat. */
1007 init_timer(&hmp->timer);
1008 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1009 hmp->timer.data = (unsigned long)dev;
1010 hmp->timer.function = &hamachi_timer; /* timer handler */
1011 add_timer(&hmp->timer);
1012
1013 return 0;
1014 }
1015
1016 static inline int hamachi_tx(struct net_device *dev)
1017 {
1018 struct hamachi_private *hmp = netdev_priv(dev);
1019
1020 /* Update the dirty pointer until we find an entry that is
1021 still owned by the card */
1022 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1023 int entry = hmp->dirty_tx % TX_RING_SIZE;
1024 struct sk_buff *skb;
1025
1026 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1027 break;
1028 /* Free the original skb. */
1029 skb = hmp->tx_skbuff[entry];
1030 if (skb) {
1031 pci_unmap_single(hmp->pci_dev,
1032 leXX_to_cpu(hmp->tx_ring[entry].addr),
1033 skb->len, PCI_DMA_TODEVICE);
1034 dev_kfree_skb(skb);
1035 hmp->tx_skbuff[entry] = NULL;
1036 }
1037 hmp->tx_ring[entry].status_n_length = 0;
1038 if (entry >= TX_RING_SIZE-1)
1039 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1040 cpu_to_le32(DescEndRing);
1041 hmp->stats.tx_packets++;
1042 }
1043
1044 return 0;
1045 }
1046
1047 static void hamachi_timer(unsigned long data)
1048 {
1049 struct net_device *dev = (struct net_device *)data;
1050 struct hamachi_private *hmp = netdev_priv(dev);
1051 void __iomem *ioaddr = hmp->base;
1052 int next_tick = 10*HZ;
1053
1054 if (hamachi_debug > 2) {
1055 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1056 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1057 readw(ioaddr + ANLinkPartnerAbility));
1058 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1059 "%4.4x %4.4x %4.4x.\n", dev->name,
1060 readw(ioaddr + 0x0e0),
1061 readw(ioaddr + 0x0e2),
1062 readw(ioaddr + 0x0e4),
1063 readw(ioaddr + 0x0e6),
1064 readw(ioaddr + 0x0e8),
1065 readw(ioaddr + 0x0eA));
1066 }
1067 /* We could do something here... nah. */
1068 hmp->timer.expires = RUN_AT(next_tick);
1069 add_timer(&hmp->timer);
1070 }
1071
1072 static void hamachi_tx_timeout(struct net_device *dev)
1073 {
1074 int i;
1075 struct hamachi_private *hmp = netdev_priv(dev);
1076 void __iomem *ioaddr = hmp->base;
1077
1078 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1079 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1080
1081 {
1082 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1083 for (i = 0; i < RX_RING_SIZE; i++)
1084 printk(KERN_CONT " %8.8x",
1085 le32_to_cpu(hmp->rx_ring[i].status_n_length));
1086 printk(KERN_CONT "\n");
1087 printk(KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1088 for (i = 0; i < TX_RING_SIZE; i++)
1089 printk(KERN_CONT " %4.4x",
1090 le32_to_cpu(hmp->tx_ring[i].status_n_length));
1091 printk(KERN_CONT "\n");
1092 }
1093
1094 /* Reinit the hardware and make sure the Rx and Tx processes
1095 are up and running.
1096 */
1097 dev->if_port = 0;
1098 /* The right way to do Reset. -KDU
1099 * -Clear OWN bit in all Rx/Tx descriptors
1100 * -Wait 50 uS for channels to go idle
1101 * -Turn off MAC receiver
1102 * -Issue Reset
1103 */
1104
1105 for (i = 0; i < RX_RING_SIZE; i++)
1106 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1107
1108 /* Presume that all packets in the Tx queue are gone if we have to
1109 * re-init the hardware.
1110 */
1111 for (i = 0; i < TX_RING_SIZE; i++){
1112 struct sk_buff *skb;
1113
1114 if (i >= TX_RING_SIZE - 1)
1115 hmp->tx_ring[i].status_n_length =
1116 cpu_to_le32(DescEndRing) |
1117 (hmp->tx_ring[i].status_n_length &
1118 cpu_to_le32(0x0000ffff));
1119 else
1120 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1121 skb = hmp->tx_skbuff[i];
1122 if (skb){
1123 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr),
1124 skb->len, PCI_DMA_TODEVICE);
1125 dev_kfree_skb(skb);
1126 hmp->tx_skbuff[i] = NULL;
1127 }
1128 }
1129
1130 udelay(60); /* Sleep 60 us just for safety sake */
1131 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1132
1133 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1134
1135 hmp->tx_full = 0;
1136 hmp->cur_rx = hmp->cur_tx = 0;
1137 hmp->dirty_rx = hmp->dirty_tx = 0;
1138 /* Rx packets are also presumed lost; however, we need to make sure a
1139 * ring of buffers is in tact. -KDU
1140 */
1141 for (i = 0; i < RX_RING_SIZE; i++){
1142 struct sk_buff *skb = hmp->rx_skbuff[i];
1143
1144 if (skb){
1145 pci_unmap_single(hmp->pci_dev,
1146 leXX_to_cpu(hmp->rx_ring[i].addr),
1147 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1148 dev_kfree_skb(skb);
1149 hmp->rx_skbuff[i] = NULL;
1150 }
1151 }
1152 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1153 for (i = 0; i < RX_RING_SIZE; i++) {
1154 struct sk_buff *skb;
1155
1156 skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1157 hmp->rx_skbuff[i] = skb;
1158 if (skb == NULL)
1159 break;
1160
1161 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1162 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1163 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1164 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1165 }
1166 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1167 /* Mark the last entry as wrapping the ring. */
1168 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1169
1170 /* Trigger an immediate transmit demand. */
1171 dev->trans_start = jiffies; /* prevent tx timeout */
1172 hmp->stats.tx_errors++;
1173
1174 /* Restart the chip's Tx/Rx processes . */
1175 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1176 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1177 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1178
1179 netif_wake_queue(dev);
1180 }
1181
1182
1183 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1184 static void hamachi_init_ring(struct net_device *dev)
1185 {
1186 struct hamachi_private *hmp = netdev_priv(dev);
1187 int i;
1188
1189 hmp->tx_full = 0;
1190 hmp->cur_rx = hmp->cur_tx = 0;
1191 hmp->dirty_rx = hmp->dirty_tx = 0;
1192
1193 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1194 * card needs room to do 8 byte alignment, +2 so we can reserve
1195 * the first 2 bytes, and +16 gets room for the status word from the
1196 * card. -KDU
1197 */
1198 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1199 (((dev->mtu+26+7) & ~7) + 16));
1200
1201 /* Initialize all Rx descriptors. */
1202 for (i = 0; i < RX_RING_SIZE; i++) {
1203 hmp->rx_ring[i].status_n_length = 0;
1204 hmp->rx_skbuff[i] = NULL;
1205 }
1206 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1207 for (i = 0; i < RX_RING_SIZE; i++) {
1208 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1209 hmp->rx_skbuff[i] = skb;
1210 if (skb == NULL)
1211 break;
1212 skb->dev = dev; /* Mark as being used by this device. */
1213 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1214 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1215 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1216 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1217 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1218 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1219 }
1220 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1221 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1222
1223 for (i = 0; i < TX_RING_SIZE; i++) {
1224 hmp->tx_skbuff[i] = NULL;
1225 hmp->tx_ring[i].status_n_length = 0;
1226 }
1227 /* Mark the last entry of the ring */
1228 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1229
1230 return;
1231 }
1232
1233
1234 #ifdef TX_CHECKSUM
1235 #define csum_add(it, val) \
1236 do { \
1237 it += (u16) (val); \
1238 if (it & 0xffff0000) { \
1239 it &= 0xffff; \
1240 ++it; \
1241 } \
1242 } while (0)
1243 /* printk("add %04x --> %04x\n", val, it); \ */
1244
1245 /* uh->len already network format, do not swap */
1246 #define pseudo_csum_udp(sum,ih,uh) do { \
1247 sum = 0; \
1248 csum_add(sum, (ih)->saddr >> 16); \
1249 csum_add(sum, (ih)->saddr & 0xffff); \
1250 csum_add(sum, (ih)->daddr >> 16); \
1251 csum_add(sum, (ih)->daddr & 0xffff); \
1252 csum_add(sum, cpu_to_be16(IPPROTO_UDP)); \
1253 csum_add(sum, (uh)->len); \
1254 } while (0)
1255
1256 /* swap len */
1257 #define pseudo_csum_tcp(sum,ih,len) do { \
1258 sum = 0; \
1259 csum_add(sum, (ih)->saddr >> 16); \
1260 csum_add(sum, (ih)->saddr & 0xffff); \
1261 csum_add(sum, (ih)->daddr >> 16); \
1262 csum_add(sum, (ih)->daddr & 0xffff); \
1263 csum_add(sum, cpu_to_be16(IPPROTO_TCP)); \
1264 csum_add(sum, htons(len)); \
1265 } while (0)
1266 #endif
1267
1268 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1269 struct net_device *dev)
1270 {
1271 struct hamachi_private *hmp = netdev_priv(dev);
1272 unsigned entry;
1273 u16 status;
1274
1275 /* Ok, now make sure that the queue has space before trying to
1276 add another skbuff. if we return non-zero the scheduler
1277 should interpret this as a queue full and requeue the buffer
1278 for later.
1279 */
1280 if (hmp->tx_full) {
1281 /* We should NEVER reach this point -KDU */
1282 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1283
1284 /* Wake the potentially-idle transmit channel. */
1285 /* If we don't need to read status, DON'T -KDU */
1286 status=readw(hmp->base + TxStatus);
1287 if( !(status & 0x0001) || (status & 0x0002))
1288 writew(0x0001, hmp->base + TxCmd);
1289 return NETDEV_TX_BUSY;
1290 }
1291
1292 /* Caution: the write order is important here, set the field
1293 with the "ownership" bits last. */
1294
1295 /* Calculate the next Tx descriptor entry. */
1296 entry = hmp->cur_tx % TX_RING_SIZE;
1297
1298 hmp->tx_skbuff[entry] = skb;
1299
1300 #ifdef TX_CHECKSUM
1301 {
1302 /* tack on checksum tag */
1303 u32 tagval = 0;
1304 struct ethhdr *eh = (struct ethhdr *)skb->data;
1305 if (eh->h_proto == cpu_to_be16(ETH_P_IP)) {
1306 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1307 if (ih->protocol == IPPROTO_UDP) {
1308 struct udphdr *uh
1309 = (struct udphdr *)((char *)ih + ih->ihl*4);
1310 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1311 u32 pseudo;
1312 pseudo_csum_udp(pseudo, ih, uh);
1313 pseudo = htons(pseudo);
1314 printk("udp cksum was %04x, sending pseudo %04x\n",
1315 uh->check, pseudo);
1316 uh->check = 0; /* zero out uh->check before card calc */
1317 /*
1318 * start at 14 (skip ethhdr), store at offset (uh->check),
1319 * use pseudo value given.
1320 */
1321 tagval = (14 << 24) | (offset << 16) | pseudo;
1322 } else if (ih->protocol == IPPROTO_TCP) {
1323 printk("tcp, no auto cksum\n");
1324 }
1325 }
1326 *(u32 *)skb_push(skb, 8) = tagval;
1327 }
1328 #endif
1329
1330 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1331 skb->data, skb->len, PCI_DMA_TODEVICE));
1332
1333 /* Hmmmm, could probably put a DescIntr on these, but the way
1334 the driver is currently coded makes Tx interrupts unnecessary
1335 since the clearing of the Tx ring is handled by the start_xmit
1336 routine. This organization helps mitigate the interrupts a
1337 bit and probably renders the max_tx_latency param useless.
1338
1339 Update: Putting a DescIntr bit on all of the descriptors and
1340 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1341 */
1342 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1343 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1344 DescEndPacket | DescEndRing | DescIntr | skb->len);
1345 else
1346 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1347 DescEndPacket | DescIntr | skb->len);
1348 hmp->cur_tx++;
1349
1350 /* Non-x86 Todo: explicitly flush cache lines here. */
1351
1352 /* Wake the potentially-idle transmit channel. */
1353 /* If we don't need to read status, DON'T -KDU */
1354 status=readw(hmp->base + TxStatus);
1355 if( !(status & 0x0001) || (status & 0x0002))
1356 writew(0x0001, hmp->base + TxCmd);
1357
1358 /* Immediately before returning, let's clear as many entries as we can. */
1359 hamachi_tx(dev);
1360
1361 /* We should kick the bottom half here, since we are not accepting
1362 * interrupts with every packet. i.e. realize that Gigabit ethernet
1363 * can transmit faster than ordinary machines can load packets;
1364 * hence, any packet that got put off because we were in the transmit
1365 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1366 */
1367 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1368 netif_wake_queue(dev); /* Typical path */
1369 else {
1370 hmp->tx_full = 1;
1371 netif_stop_queue(dev);
1372 }
1373
1374 if (hamachi_debug > 4) {
1375 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1376 dev->name, hmp->cur_tx, entry);
1377 }
1378 return NETDEV_TX_OK;
1379 }
1380
1381 /* The interrupt handler does all of the Rx thread work and cleans up
1382 after the Tx thread. */
1383 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1384 {
1385 struct net_device *dev = dev_instance;
1386 struct hamachi_private *hmp = netdev_priv(dev);
1387 void __iomem *ioaddr = hmp->base;
1388 long boguscnt = max_interrupt_work;
1389 int handled = 0;
1390
1391 #ifndef final_version /* Can never occur. */
1392 if (dev == NULL) {
1393 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1394 return IRQ_NONE;
1395 }
1396 #endif
1397
1398 spin_lock(&hmp->lock);
1399
1400 do {
1401 u32 intr_status = readl(ioaddr + InterruptClear);
1402
1403 if (hamachi_debug > 4)
1404 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1405 dev->name, intr_status);
1406
1407 if (intr_status == 0)
1408 break;
1409
1410 handled = 1;
1411
1412 if (intr_status & IntrRxDone)
1413 hamachi_rx(dev);
1414
1415 if (intr_status & IntrTxDone){
1416 /* This code should RARELY need to execute. After all, this is
1417 * a gigabit link, it should consume packets as fast as we put
1418 * them in AND we clear the Tx ring in hamachi_start_xmit().
1419 */
1420 if (hmp->tx_full){
1421 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1422 int entry = hmp->dirty_tx % TX_RING_SIZE;
1423 struct sk_buff *skb;
1424
1425 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1426 break;
1427 skb = hmp->tx_skbuff[entry];
1428 /* Free the original skb. */
1429 if (skb){
1430 pci_unmap_single(hmp->pci_dev,
1431 leXX_to_cpu(hmp->tx_ring[entry].addr),
1432 skb->len,
1433 PCI_DMA_TODEVICE);
1434 dev_kfree_skb_irq(skb);
1435 hmp->tx_skbuff[entry] = NULL;
1436 }
1437 hmp->tx_ring[entry].status_n_length = 0;
1438 if (entry >= TX_RING_SIZE-1)
1439 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1440 cpu_to_le32(DescEndRing);
1441 hmp->stats.tx_packets++;
1442 }
1443 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1444 /* The ring is no longer full */
1445 hmp->tx_full = 0;
1446 netif_wake_queue(dev);
1447 }
1448 } else {
1449 netif_wake_queue(dev);
1450 }
1451 }
1452
1453
1454 /* Abnormal error summary/uncommon events handlers. */
1455 if (intr_status &
1456 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1457 LinkChange | NegotiationChange | StatsMax))
1458 hamachi_error(dev, intr_status);
1459
1460 if (--boguscnt < 0) {
1461 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1462 dev->name, intr_status);
1463 break;
1464 }
1465 } while (1);
1466
1467 if (hamachi_debug > 3)
1468 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1469 dev->name, readl(ioaddr + IntrStatus));
1470
1471 #ifndef final_version
1472 /* Code that should never be run! Perhaps remove after testing.. */
1473 {
1474 static int stopit = 10;
1475 if (dev->start == 0 && --stopit < 0) {
1476 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1477 dev->name);
1478 free_irq(irq, dev);
1479 }
1480 }
1481 #endif
1482
1483 spin_unlock(&hmp->lock);
1484 return IRQ_RETVAL(handled);
1485 }
1486
1487 /* This routine is logically part of the interrupt handler, but separated
1488 for clarity and better register allocation. */
1489 static int hamachi_rx(struct net_device *dev)
1490 {
1491 struct hamachi_private *hmp = netdev_priv(dev);
1492 int entry = hmp->cur_rx % RX_RING_SIZE;
1493 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1494
1495 if (hamachi_debug > 4) {
1496 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1497 entry, hmp->rx_ring[entry].status_n_length);
1498 }
1499
1500 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1501 while (1) {
1502 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1503 u32 desc_status = le32_to_cpu(desc->status_n_length);
1504 u16 data_size = desc_status; /* Implicit truncate */
1505 u8 *buf_addr;
1506 s32 frame_status;
1507
1508 if (desc_status & DescOwn)
1509 break;
1510 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1511 leXX_to_cpu(desc->addr),
1512 hmp->rx_buf_sz,
1513 PCI_DMA_FROMDEVICE);
1514 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1515 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1516 if (hamachi_debug > 4)
1517 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1518 frame_status);
1519 if (--boguscnt < 0)
1520 break;
1521 if ( ! (desc_status & DescEndPacket)) {
1522 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1523 "multiple buffers, entry %#x length %d status %4.4x!\n",
1524 dev->name, hmp->cur_rx, data_size, desc_status);
1525 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1526 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1527 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1528 dev->name,
1529 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1530 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1531 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1532 hmp->stats.rx_length_errors++;
1533 } /* else Omit for prototype errata??? */
1534 if (frame_status & 0x00380000) {
1535 /* There was an error. */
1536 if (hamachi_debug > 2)
1537 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1538 frame_status);
1539 hmp->stats.rx_errors++;
1540 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1541 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1542 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1543 if (frame_status < 0) hmp->stats.rx_dropped++;
1544 } else {
1545 struct sk_buff *skb;
1546 /* Omit CRC */
1547 u16 pkt_len = (frame_status & 0x07ff) - 4;
1548 #ifdef RX_CHECKSUM
1549 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1550 #endif
1551
1552
1553 #ifndef final_version
1554 if (hamachi_debug > 4)
1555 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1556 " of %d, bogus_cnt %d.\n",
1557 pkt_len, data_size, boguscnt);
1558 if (hamachi_debug > 5)
1559 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1560 dev->name,
1561 *(s32*)&(buf_addr[data_size - 20]),
1562 *(s32*)&(buf_addr[data_size - 16]),
1563 *(s32*)&(buf_addr[data_size - 12]),
1564 *(s32*)&(buf_addr[data_size - 8]),
1565 *(s32*)&(buf_addr[data_size - 4]));
1566 #endif
1567 /* Check if the packet is long enough to accept without copying
1568 to a minimally-sized skbuff. */
1569 if (pkt_len < rx_copybreak &&
1570 (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1571 #ifdef RX_CHECKSUM
1572 printk(KERN_ERR "%s: rx_copybreak non-zero "
1573 "not good with RX_CHECKSUM\n", dev->name);
1574 #endif
1575 skb_reserve(skb, 2); /* 16 byte align the IP header */
1576 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1577 leXX_to_cpu(hmp->rx_ring[entry].addr),
1578 hmp->rx_buf_sz,
1579 PCI_DMA_FROMDEVICE);
1580 /* Call copy + cksum if available. */
1581 #if 1 || USE_IP_COPYSUM
1582 skb_copy_to_linear_data(skb,
1583 hmp->rx_skbuff[entry]->data, pkt_len);
1584 skb_put(skb, pkt_len);
1585 #else
1586 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1587 + entry*sizeof(*desc), pkt_len);
1588 #endif
1589 pci_dma_sync_single_for_device(hmp->pci_dev,
1590 leXX_to_cpu(hmp->rx_ring[entry].addr),
1591 hmp->rx_buf_sz,
1592 PCI_DMA_FROMDEVICE);
1593 } else {
1594 pci_unmap_single(hmp->pci_dev,
1595 leXX_to_cpu(hmp->rx_ring[entry].addr),
1596 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1597 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1598 hmp->rx_skbuff[entry] = NULL;
1599 }
1600 skb->protocol = eth_type_trans(skb, dev);
1601
1602
1603 #ifdef RX_CHECKSUM
1604 /* TCP or UDP on ipv4, DIX encoding */
1605 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1606 struct iphdr *ih = (struct iphdr *) skb->data;
1607 /* Check that IP packet is at least 46 bytes, otherwise,
1608 * there may be pad bytes included in the hardware checksum.
1609 * This wouldn't happen if everyone padded with 0.
1610 */
1611 if (ntohs(ih->tot_len) >= 46){
1612 /* don't worry about frags */
1613 if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1614 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1615 u32 *p = (u32 *) &buf_addr[data_size - 20];
1616 register u32 crc, p_r, p_r1;
1617
1618 if (inv & 4) {
1619 inv &= ~4;
1620 --p;
1621 }
1622 p_r = *p;
1623 p_r1 = *(p-1);
1624 switch (inv) {
1625 case 0:
1626 crc = (p_r & 0xffff) + (p_r >> 16);
1627 break;
1628 case 1:
1629 crc = (p_r >> 16) + (p_r & 0xffff)
1630 + (p_r1 >> 16 & 0xff00);
1631 break;
1632 case 2:
1633 crc = p_r + (p_r1 >> 16);
1634 break;
1635 case 3:
1636 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1637 break;
1638 default: /*NOTREACHED*/ crc = 0;
1639 }
1640 if (crc & 0xffff0000) {
1641 crc &= 0xffff;
1642 ++crc;
1643 }
1644 /* tcp/udp will add in pseudo */
1645 skb->csum = ntohs(pfck & 0xffff);
1646 if (skb->csum > crc)
1647 skb->csum -= crc;
1648 else
1649 skb->csum += (~crc & 0xffff);
1650 /*
1651 * could do the pseudo myself and return
1652 * CHECKSUM_UNNECESSARY
1653 */
1654 skb->ip_summed = CHECKSUM_COMPLETE;
1655 }
1656 }
1657 }
1658 #endif /* RX_CHECKSUM */
1659
1660 netif_rx(skb);
1661 hmp->stats.rx_packets++;
1662 }
1663 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1664 }
1665
1666 /* Refill the Rx ring buffers. */
1667 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1668 struct hamachi_desc *desc;
1669
1670 entry = hmp->dirty_rx % RX_RING_SIZE;
1671 desc = &(hmp->rx_ring[entry]);
1672 if (hmp->rx_skbuff[entry] == NULL) {
1673 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1674
1675 hmp->rx_skbuff[entry] = skb;
1676 if (skb == NULL)
1677 break; /* Better luck next round. */
1678 skb->dev = dev; /* Mark as being used by this device. */
1679 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1680 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1681 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1682 }
1683 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1684 if (entry >= RX_RING_SIZE-1)
1685 desc->status_n_length |= cpu_to_le32(DescOwn |
1686 DescEndPacket | DescEndRing | DescIntr);
1687 else
1688 desc->status_n_length |= cpu_to_le32(DescOwn |
1689 DescEndPacket | DescIntr);
1690 }
1691
1692 /* Restart Rx engine if stopped. */
1693 /* If we don't need to check status, don't. -KDU */
1694 if (readw(hmp->base + RxStatus) & 0x0002)
1695 writew(0x0001, hmp->base + RxCmd);
1696
1697 return 0;
1698 }
1699
1700 /* This is more properly named "uncommon interrupt events", as it covers more
1701 than just errors. */
1702 static void hamachi_error(struct net_device *dev, int intr_status)
1703 {
1704 struct hamachi_private *hmp = netdev_priv(dev);
1705 void __iomem *ioaddr = hmp->base;
1706
1707 if (intr_status & (LinkChange|NegotiationChange)) {
1708 if (hamachi_debug > 1)
1709 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1710 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1711 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1712 readw(ioaddr + ANLinkPartnerAbility),
1713 readl(ioaddr + IntrStatus));
1714 if (readw(ioaddr + ANStatus) & 0x20)
1715 writeb(0x01, ioaddr + LEDCtrl);
1716 else
1717 writeb(0x03, ioaddr + LEDCtrl);
1718 }
1719 if (intr_status & StatsMax) {
1720 hamachi_get_stats(dev);
1721 /* Read the overflow bits to clear. */
1722 readl(ioaddr + 0x370);
1723 readl(ioaddr + 0x3F0);
1724 }
1725 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1726 hamachi_debug)
1727 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1728 dev->name, intr_status);
1729 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1730 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1731 hmp->stats.tx_fifo_errors++;
1732 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1733 hmp->stats.rx_fifo_errors++;
1734 }
1735
1736 static int hamachi_close(struct net_device *dev)
1737 {
1738 struct hamachi_private *hmp = netdev_priv(dev);
1739 void __iomem *ioaddr = hmp->base;
1740 struct sk_buff *skb;
1741 int i;
1742
1743 netif_stop_queue(dev);
1744
1745 if (hamachi_debug > 1) {
1746 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1747 dev->name, readw(ioaddr + TxStatus),
1748 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1749 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1750 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1751 }
1752
1753 /* Disable interrupts by clearing the interrupt mask. */
1754 writel(0x0000, ioaddr + InterruptEnable);
1755
1756 /* Stop the chip's Tx and Rx processes. */
1757 writel(2, ioaddr + RxCmd);
1758 writew(2, ioaddr + TxCmd);
1759
1760 #ifdef __i386__
1761 if (hamachi_debug > 2) {
1762 printk(KERN_DEBUG " Tx ring at %8.8x:\n",
1763 (int)hmp->tx_ring_dma);
1764 for (i = 0; i < TX_RING_SIZE; i++)
1765 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1766 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1767 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1768 printk(KERN_DEBUG " Rx ring %8.8x:\n",
1769 (int)hmp->rx_ring_dma);
1770 for (i = 0; i < RX_RING_SIZE; i++) {
1771 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1772 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1773 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1774 if (hamachi_debug > 6) {
1775 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1776 u16 *addr = (u16 *)
1777 hmp->rx_skbuff[i]->data;
1778 int j;
1779 printk(KERN_DEBUG "Addr: ");
1780 for (j = 0; j < 0x50; j++)
1781 printk(" %4.4x", addr[j]);
1782 printk("\n");
1783 }
1784 }
1785 }
1786 }
1787 #endif /* __i386__ debugging only */
1788
1789 free_irq(dev->irq, dev);
1790
1791 del_timer_sync(&hmp->timer);
1792
1793 /* Free all the skbuffs in the Rx queue. */
1794 for (i = 0; i < RX_RING_SIZE; i++) {
1795 skb = hmp->rx_skbuff[i];
1796 hmp->rx_ring[i].status_n_length = 0;
1797 if (skb) {
1798 pci_unmap_single(hmp->pci_dev,
1799 leXX_to_cpu(hmp->rx_ring[i].addr),
1800 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1801 dev_kfree_skb(skb);
1802 hmp->rx_skbuff[i] = NULL;
1803 }
1804 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1805 }
1806 for (i = 0; i < TX_RING_SIZE; i++) {
1807 skb = hmp->tx_skbuff[i];
1808 if (skb) {
1809 pci_unmap_single(hmp->pci_dev,
1810 leXX_to_cpu(hmp->tx_ring[i].addr),
1811 skb->len, PCI_DMA_TODEVICE);
1812 dev_kfree_skb(skb);
1813 hmp->tx_skbuff[i] = NULL;
1814 }
1815 }
1816
1817 writeb(0x00, ioaddr + LEDCtrl);
1818
1819 return 0;
1820 }
1821
1822 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1823 {
1824 struct hamachi_private *hmp = netdev_priv(dev);
1825 void __iomem *ioaddr = hmp->base;
1826
1827 /* We should lock this segment of code for SMP eventually, although
1828 the vulnerability window is very small and statistics are
1829 non-critical. */
1830 /* Ok, what goes here? This appears to be stuck at 21 packets
1831 according to ifconfig. It does get incremented in hamachi_tx(),
1832 so I think I'll comment it out here and see if better things
1833 happen.
1834 */
1835 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1836
1837 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1838 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1839 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1840
1841 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1842 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1843 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1844 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1845 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1846
1847 return &hmp->stats;
1848 }
1849
1850 static void set_rx_mode(struct net_device *dev)
1851 {
1852 struct hamachi_private *hmp = netdev_priv(dev);
1853 void __iomem *ioaddr = hmp->base;
1854
1855 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1856 writew(0x000F, ioaddr + AddrMode);
1857 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1858 /* Too many to match, or accept all multicasts. */
1859 writew(0x000B, ioaddr + AddrMode);
1860 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1861 struct dev_mc_list *mclist;
1862 int i;
1863 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1864 i++, mclist = mclist->next) {
1865 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1866 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1867 ioaddr + 0x104 + i*8);
1868 }
1869 /* Clear remaining entries. */
1870 for (; i < 64; i++)
1871 writel(0, ioaddr + 0x104 + i*8);
1872 writew(0x0003, ioaddr + AddrMode);
1873 } else { /* Normal, unicast/broadcast-only mode. */
1874 writew(0x0001, ioaddr + AddrMode);
1875 }
1876 }
1877
1878 static int check_if_running(struct net_device *dev)
1879 {
1880 if (!netif_running(dev))
1881 return -EINVAL;
1882 return 0;
1883 }
1884
1885 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1886 {
1887 struct hamachi_private *np = netdev_priv(dev);
1888 strcpy(info->driver, DRV_NAME);
1889 strcpy(info->version, DRV_VERSION);
1890 strcpy(info->bus_info, pci_name(np->pci_dev));
1891 }
1892
1893 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1894 {
1895 struct hamachi_private *np = netdev_priv(dev);
1896 spin_lock_irq(&np->lock);
1897 mii_ethtool_gset(&np->mii_if, ecmd);
1898 spin_unlock_irq(&np->lock);
1899 return 0;
1900 }
1901
1902 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1903 {
1904 struct hamachi_private *np = netdev_priv(dev);
1905 int res;
1906 spin_lock_irq(&np->lock);
1907 res = mii_ethtool_sset(&np->mii_if, ecmd);
1908 spin_unlock_irq(&np->lock);
1909 return res;
1910 }
1911
1912 static int hamachi_nway_reset(struct net_device *dev)
1913 {
1914 struct hamachi_private *np = netdev_priv(dev);
1915 return mii_nway_restart(&np->mii_if);
1916 }
1917
1918 static u32 hamachi_get_link(struct net_device *dev)
1919 {
1920 struct hamachi_private *np = netdev_priv(dev);
1921 return mii_link_ok(&np->mii_if);
1922 }
1923
1924 static const struct ethtool_ops ethtool_ops = {
1925 .begin = check_if_running,
1926 .get_drvinfo = hamachi_get_drvinfo,
1927 .get_settings = hamachi_get_settings,
1928 .set_settings = hamachi_set_settings,
1929 .nway_reset = hamachi_nway_reset,
1930 .get_link = hamachi_get_link,
1931 };
1932
1933 static const struct ethtool_ops ethtool_ops_no_mii = {
1934 .begin = check_if_running,
1935 .get_drvinfo = hamachi_get_drvinfo,
1936 };
1937
1938 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1939 {
1940 struct hamachi_private *np = netdev_priv(dev);
1941 struct mii_ioctl_data *data = if_mii(rq);
1942 int rc;
1943
1944 if (!netif_running(dev))
1945 return -EINVAL;
1946
1947 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1948 u32 *d = (u32 *)&rq->ifr_ifru;
1949 /* Should add this check here or an ordinary user can do nasty
1950 * things. -KDU
1951 *
1952 * TODO: Shut down the Rx and Tx engines while doing this.
1953 */
1954 if (!capable(CAP_NET_ADMIN))
1955 return -EPERM;
1956 writel(d[0], np->base + TxIntrCtrl);
1957 writel(d[1], np->base + RxIntrCtrl);
1958 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1959 (u32) readl(np->base + TxIntrCtrl),
1960 (u32) readl(np->base + RxIntrCtrl));
1961 rc = 0;
1962 }
1963
1964 else {
1965 spin_lock_irq(&np->lock);
1966 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1967 spin_unlock_irq(&np->lock);
1968 }
1969
1970 return rc;
1971 }
1972
1973
1974 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1975 {
1976 struct net_device *dev = pci_get_drvdata(pdev);
1977
1978 if (dev) {
1979 struct hamachi_private *hmp = netdev_priv(dev);
1980
1981 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1982 hmp->rx_ring_dma);
1983 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1984 hmp->tx_ring_dma);
1985 unregister_netdev(dev);
1986 iounmap(hmp->base);
1987 free_netdev(dev);
1988 pci_release_regions(pdev);
1989 pci_set_drvdata(pdev, NULL);
1990 }
1991 }
1992
1993 static DEFINE_PCI_DEVICE_TABLE(hamachi_pci_tbl) = {
1994 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1995 { 0, }
1996 };
1997 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1998
1999 static struct pci_driver hamachi_driver = {
2000 .name = DRV_NAME,
2001 .id_table = hamachi_pci_tbl,
2002 .probe = hamachi_init_one,
2003 .remove = __devexit_p(hamachi_remove_one),
2004 };
2005
2006 static int __init hamachi_init (void)
2007 {
2008 /* when a module, this is printed whether or not devices are found in probe */
2009 #ifdef MODULE
2010 printk(version);
2011 #endif
2012 return pci_register_driver(&hamachi_driver);
2013 }
2014
2015 static void __exit hamachi_exit (void)
2016 {
2017 pci_unregister_driver(&hamachi_driver);
2018 }
2019
2020
2021 module_init(hamachi_init);
2022 module_exit(hamachi_exit);
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