1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for ixgbe */
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/ethtool.h>
35 #include <linux/vmalloc.h>
36 #include <linux/uaccess.h>
41 #define IXGBE_ALL_RAR_ENTRIES 16
44 char stat_string
[ETH_GSTRING_LEN
];
49 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
50 offsetof(struct ixgbe_adapter, m)
51 static struct ixgbe_stats ixgbe_gstrings_stats
[] = {
52 {"rx_packets", IXGBE_STAT(net_stats
.rx_packets
)},
53 {"tx_packets", IXGBE_STAT(net_stats
.tx_packets
)},
54 {"rx_bytes", IXGBE_STAT(net_stats
.rx_bytes
)},
55 {"tx_bytes", IXGBE_STAT(net_stats
.tx_bytes
)},
56 {"lsc_int", IXGBE_STAT(lsc_int
)},
57 {"tx_busy", IXGBE_STAT(tx_busy
)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs
)},
59 {"rx_errors", IXGBE_STAT(net_stats
.rx_errors
)},
60 {"tx_errors", IXGBE_STAT(net_stats
.tx_errors
)},
61 {"rx_dropped", IXGBE_STAT(net_stats
.rx_dropped
)},
62 {"tx_dropped", IXGBE_STAT(net_stats
.tx_dropped
)},
63 {"multicast", IXGBE_STAT(net_stats
.multicast
)},
64 {"broadcast", IXGBE_STAT(stats
.bprc
)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats
.rnbc
[0]) },
66 {"collisions", IXGBE_STAT(net_stats
.collisions
)},
67 {"rx_over_errors", IXGBE_STAT(net_stats
.rx_over_errors
)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats
.rx_crc_errors
)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats
.rx_frame_errors
)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats
.rx_fifo_errors
)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats
.rx_missed_errors
)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats
.tx_aborted_errors
)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats
.tx_carrier_errors
)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats
.tx_fifo_errors
)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats
.tx_heartbeat_errors
)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count
)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue
)},
78 {"rx_long_length_errors", IXGBE_STAT(stats
.roc
)},
79 {"rx_short_length_errors", IXGBE_STAT(stats
.ruc
)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt
)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt
)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats
.lxontxc
)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats
.lxonrxc
)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats
.lxofftxc
)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats
.lxoffrxc
)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good
)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error
)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good
)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split
)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed
)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed
)},
92 {"lro_aggregated", IXGBE_STAT(lro_aggregated
)},
93 {"lro_flushed", IXGBE_STAT(lro_flushed
)},
96 #define IXGBE_QUEUE_STATS_LEN \
97 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
98 ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
99 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
100 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
101 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
102 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
104 static int ixgbe_get_settings(struct net_device
*netdev
,
105 struct ethtool_cmd
*ecmd
)
107 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
108 struct ixgbe_hw
*hw
= &adapter
->hw
;
112 ecmd
->supported
= SUPPORTED_10000baseT_Full
;
113 ecmd
->autoneg
= AUTONEG_ENABLE
;
114 ecmd
->transceiver
= XCVR_EXTERNAL
;
115 if (hw
->phy
.media_type
== ixgbe_media_type_copper
) {
116 ecmd
->supported
|= (SUPPORTED_1000baseT_Full
|
117 SUPPORTED_TP
| SUPPORTED_Autoneg
);
119 ecmd
->advertising
= (ADVERTISED_TP
| ADVERTISED_Autoneg
);
120 if (hw
->phy
.autoneg_advertised
& IXGBE_LINK_SPEED_10GB_FULL
)
121 ecmd
->advertising
|= ADVERTISED_10000baseT_Full
;
122 if (hw
->phy
.autoneg_advertised
& IXGBE_LINK_SPEED_1GB_FULL
)
123 ecmd
->advertising
|= ADVERTISED_1000baseT_Full
;
125 ecmd
->port
= PORT_TP
;
127 ecmd
->supported
|= SUPPORTED_FIBRE
;
128 ecmd
->advertising
= (ADVERTISED_10000baseT_Full
|
130 ecmd
->port
= PORT_FIBRE
;
131 ecmd
->autoneg
= AUTONEG_DISABLE
;
134 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
136 ecmd
->speed
= (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
) ?
137 SPEED_10000
: SPEED_1000
;
138 ecmd
->duplex
= DUPLEX_FULL
;
147 static int ixgbe_set_settings(struct net_device
*netdev
,
148 struct ethtool_cmd
*ecmd
)
150 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
151 struct ixgbe_hw
*hw
= &adapter
->hw
;
153 switch (hw
->phy
.media_type
) {
154 case ixgbe_media_type_fiber
:
155 if ((ecmd
->autoneg
== AUTONEG_ENABLE
) ||
156 (ecmd
->speed
+ ecmd
->duplex
!= SPEED_10000
+ DUPLEX_FULL
))
158 /* in this case we currently only support 10Gb/FULL */
167 static void ixgbe_get_pauseparam(struct net_device
*netdev
,
168 struct ethtool_pauseparam
*pause
)
170 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
171 struct ixgbe_hw
*hw
= &adapter
->hw
;
173 pause
->autoneg
= (hw
->fc
.type
== ixgbe_fc_full
? 1 : 0);
175 if (hw
->fc
.type
== ixgbe_fc_rx_pause
) {
177 } else if (hw
->fc
.type
== ixgbe_fc_tx_pause
) {
179 } else if (hw
->fc
.type
== ixgbe_fc_full
) {
185 static int ixgbe_set_pauseparam(struct net_device
*netdev
,
186 struct ethtool_pauseparam
*pause
)
188 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
189 struct ixgbe_hw
*hw
= &adapter
->hw
;
191 if ((pause
->autoneg
== AUTONEG_ENABLE
) ||
192 (pause
->rx_pause
&& pause
->tx_pause
))
193 hw
->fc
.type
= ixgbe_fc_full
;
194 else if (pause
->rx_pause
&& !pause
->tx_pause
)
195 hw
->fc
.type
= ixgbe_fc_rx_pause
;
196 else if (!pause
->rx_pause
&& pause
->tx_pause
)
197 hw
->fc
.type
= ixgbe_fc_tx_pause
;
198 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
199 hw
->fc
.type
= ixgbe_fc_none
;
203 hw
->fc
.original_type
= hw
->fc
.type
;
205 if (netif_running(netdev
))
206 ixgbe_reinit_locked(adapter
);
208 ixgbe_reset(adapter
);
213 static u32
ixgbe_get_rx_csum(struct net_device
*netdev
)
215 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
216 return (adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
);
219 static int ixgbe_set_rx_csum(struct net_device
*netdev
, u32 data
)
221 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
223 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
225 adapter
->flags
&= ~IXGBE_FLAG_RX_CSUM_ENABLED
;
227 if (netif_running(netdev
))
228 ixgbe_reinit_locked(adapter
);
230 ixgbe_reset(adapter
);
235 static u32
ixgbe_get_tx_csum(struct net_device
*netdev
)
237 return (netdev
->features
& NETIF_F_IP_CSUM
) != 0;
240 static int ixgbe_set_tx_csum(struct net_device
*netdev
, u32 data
)
243 netdev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
245 netdev
->features
&= ~(NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
250 static int ixgbe_set_tso(struct net_device
*netdev
, u32 data
)
253 netdev
->features
|= NETIF_F_TSO
;
254 netdev
->features
|= NETIF_F_TSO6
;
256 netif_tx_stop_all_queues(netdev
);
257 netdev
->features
&= ~NETIF_F_TSO
;
258 netdev
->features
&= ~NETIF_F_TSO6
;
259 netif_tx_start_all_queues(netdev
);
264 static u32
ixgbe_get_msglevel(struct net_device
*netdev
)
266 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
267 return adapter
->msg_enable
;
270 static void ixgbe_set_msglevel(struct net_device
*netdev
, u32 data
)
272 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
273 adapter
->msg_enable
= data
;
276 static int ixgbe_get_regs_len(struct net_device
*netdev
)
278 #define IXGBE_REGS_LEN 1128
279 return IXGBE_REGS_LEN
* sizeof(u32
);
282 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
284 static void ixgbe_get_regs(struct net_device
*netdev
,
285 struct ethtool_regs
*regs
, void *p
)
287 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
288 struct ixgbe_hw
*hw
= &adapter
->hw
;
292 memset(p
, 0, IXGBE_REGS_LEN
* sizeof(u32
));
294 regs
->version
= (1 << 24) | hw
->revision_id
<< 16 | hw
->device_id
;
296 /* General Registers */
297 regs_buff
[0] = IXGBE_READ_REG(hw
, IXGBE_CTRL
);
298 regs_buff
[1] = IXGBE_READ_REG(hw
, IXGBE_STATUS
);
299 regs_buff
[2] = IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
300 regs_buff
[3] = IXGBE_READ_REG(hw
, IXGBE_ESDP
);
301 regs_buff
[4] = IXGBE_READ_REG(hw
, IXGBE_EODSDP
);
302 regs_buff
[5] = IXGBE_READ_REG(hw
, IXGBE_LEDCTL
);
303 regs_buff
[6] = IXGBE_READ_REG(hw
, IXGBE_FRTIMER
);
304 regs_buff
[7] = IXGBE_READ_REG(hw
, IXGBE_TCPTIMER
);
307 regs_buff
[8] = IXGBE_READ_REG(hw
, IXGBE_EEC
);
308 regs_buff
[9] = IXGBE_READ_REG(hw
, IXGBE_EERD
);
309 regs_buff
[10] = IXGBE_READ_REG(hw
, IXGBE_FLA
);
310 regs_buff
[11] = IXGBE_READ_REG(hw
, IXGBE_EEMNGCTL
);
311 regs_buff
[12] = IXGBE_READ_REG(hw
, IXGBE_EEMNGDATA
);
312 regs_buff
[13] = IXGBE_READ_REG(hw
, IXGBE_FLMNGCTL
);
313 regs_buff
[14] = IXGBE_READ_REG(hw
, IXGBE_FLMNGDATA
);
314 regs_buff
[15] = IXGBE_READ_REG(hw
, IXGBE_FLMNGCNT
);
315 regs_buff
[16] = IXGBE_READ_REG(hw
, IXGBE_FLOP
);
316 regs_buff
[17] = IXGBE_READ_REG(hw
, IXGBE_GRC
);
319 /* don't read EICR because it can clear interrupt causes, instead
320 * read EICS which is a shadow but doesn't clear EICR */
321 regs_buff
[18] = IXGBE_READ_REG(hw
, IXGBE_EICS
);
322 regs_buff
[19] = IXGBE_READ_REG(hw
, IXGBE_EICS
);
323 regs_buff
[20] = IXGBE_READ_REG(hw
, IXGBE_EIMS
);
324 regs_buff
[21] = IXGBE_READ_REG(hw
, IXGBE_EIMC
);
325 regs_buff
[22] = IXGBE_READ_REG(hw
, IXGBE_EIAC
);
326 regs_buff
[23] = IXGBE_READ_REG(hw
, IXGBE_EIAM
);
327 regs_buff
[24] = IXGBE_READ_REG(hw
, IXGBE_EITR(0));
328 regs_buff
[25] = IXGBE_READ_REG(hw
, IXGBE_IVAR(0));
329 regs_buff
[26] = IXGBE_READ_REG(hw
, IXGBE_MSIXT
);
330 regs_buff
[27] = IXGBE_READ_REG(hw
, IXGBE_MSIXPBA
);
331 regs_buff
[28] = IXGBE_READ_REG(hw
, IXGBE_PBACL(0));
332 regs_buff
[29] = IXGBE_READ_REG(hw
, IXGBE_GPIE
);
335 regs_buff
[30] = IXGBE_READ_REG(hw
, IXGBE_PFCTOP
);
336 regs_buff
[31] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(0));
337 regs_buff
[32] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(1));
338 regs_buff
[33] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(2));
339 regs_buff
[34] = IXGBE_READ_REG(hw
, IXGBE_FCTTV(3));
340 for (i
= 0; i
< 8; i
++)
341 regs_buff
[35 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTL(i
));
342 for (i
= 0; i
< 8; i
++)
343 regs_buff
[43 + i
] = IXGBE_READ_REG(hw
, IXGBE_FCRTH(i
));
344 regs_buff
[51] = IXGBE_READ_REG(hw
, IXGBE_FCRTV
);
345 regs_buff
[52] = IXGBE_READ_REG(hw
, IXGBE_TFCS
);
348 for (i
= 0; i
< 64; i
++)
349 regs_buff
[53 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
350 for (i
= 0; i
< 64; i
++)
351 regs_buff
[117 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
352 for (i
= 0; i
< 64; i
++)
353 regs_buff
[181 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
354 for (i
= 0; i
< 64; i
++)
355 regs_buff
[245 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
356 for (i
= 0; i
< 64; i
++)
357 regs_buff
[309 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
358 for (i
= 0; i
< 64; i
++)
359 regs_buff
[373 + i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
360 for (i
= 0; i
< 16; i
++)
361 regs_buff
[437 + i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
362 for (i
= 0; i
< 16; i
++)
363 regs_buff
[453 + i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
364 regs_buff
[469] = IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
365 for (i
= 0; i
< 8; i
++)
366 regs_buff
[470 + i
] = IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(i
));
367 regs_buff
[478] = IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
368 regs_buff
[479] = IXGBE_READ_REG(hw
, IXGBE_DROPEN
);
371 regs_buff
[480] = IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
372 regs_buff
[481] = IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
373 for (i
= 0; i
< 16; i
++)
374 regs_buff
[482 + i
] = IXGBE_READ_REG(hw
, IXGBE_RAL(i
));
375 for (i
= 0; i
< 16; i
++)
376 regs_buff
[498 + i
] = IXGBE_READ_REG(hw
, IXGBE_RAH(i
));
377 regs_buff
[514] = IXGBE_READ_REG(hw
, IXGBE_PSRTYPE(0));
378 regs_buff
[515] = IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
379 regs_buff
[516] = IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
380 regs_buff
[517] = IXGBE_READ_REG(hw
, IXGBE_MCSTCTRL
);
381 regs_buff
[518] = IXGBE_READ_REG(hw
, IXGBE_MRQC
);
382 regs_buff
[519] = IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
383 for (i
= 0; i
< 8; i
++)
384 regs_buff
[520 + i
] = IXGBE_READ_REG(hw
, IXGBE_IMIR(i
));
385 for (i
= 0; i
< 8; i
++)
386 regs_buff
[528 + i
] = IXGBE_READ_REG(hw
, IXGBE_IMIREXT(i
));
387 regs_buff
[536] = IXGBE_READ_REG(hw
, IXGBE_IMIRVP
);
390 for (i
= 0; i
< 32; i
++)
391 regs_buff
[537 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
392 for (i
= 0; i
< 32; i
++)
393 regs_buff
[569 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
394 for (i
= 0; i
< 32; i
++)
395 regs_buff
[601 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
396 for (i
= 0; i
< 32; i
++)
397 regs_buff
[633 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
398 for (i
= 0; i
< 32; i
++)
399 regs_buff
[665 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
400 for (i
= 0; i
< 32; i
++)
401 regs_buff
[697 + i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
402 for (i
= 0; i
< 32; i
++)
403 regs_buff
[729 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDWBAL(i
));
404 for (i
= 0; i
< 32; i
++)
405 regs_buff
[761 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDWBAH(i
));
406 regs_buff
[793] = IXGBE_READ_REG(hw
, IXGBE_DTXCTL
);
407 for (i
= 0; i
< 16; i
++)
408 regs_buff
[794 + i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(i
));
409 regs_buff
[810] = IXGBE_READ_REG(hw
, IXGBE_TIPG
);
410 for (i
= 0; i
< 8; i
++)
411 regs_buff
[811 + i
] = IXGBE_READ_REG(hw
, IXGBE_TXPBSIZE(i
));
412 regs_buff
[819] = IXGBE_READ_REG(hw
, IXGBE_MNGTXMAP
);
415 regs_buff
[820] = IXGBE_READ_REG(hw
, IXGBE_WUC
);
416 regs_buff
[821] = IXGBE_READ_REG(hw
, IXGBE_WUFC
);
417 regs_buff
[822] = IXGBE_READ_REG(hw
, IXGBE_WUS
);
418 regs_buff
[823] = IXGBE_READ_REG(hw
, IXGBE_IPAV
);
419 regs_buff
[824] = IXGBE_READ_REG(hw
, IXGBE_IP4AT
);
420 regs_buff
[825] = IXGBE_READ_REG(hw
, IXGBE_IP6AT
);
421 regs_buff
[826] = IXGBE_READ_REG(hw
, IXGBE_WUPL
);
422 regs_buff
[827] = IXGBE_READ_REG(hw
, IXGBE_WUPM
);
423 regs_buff
[828] = IXGBE_READ_REG(hw
, IXGBE_FHFT
);
425 regs_buff
[829] = IXGBE_READ_REG(hw
, IXGBE_RMCS
);
426 regs_buff
[830] = IXGBE_READ_REG(hw
, IXGBE_DPMCS
);
427 regs_buff
[831] = IXGBE_READ_REG(hw
, IXGBE_PDPMCS
);
428 regs_buff
[832] = IXGBE_READ_REG(hw
, IXGBE_RUPPBMR
);
429 for (i
= 0; i
< 8; i
++)
430 regs_buff
[833 + i
] = IXGBE_READ_REG(hw
, IXGBE_RT2CR(i
));
431 for (i
= 0; i
< 8; i
++)
432 regs_buff
[841 + i
] = IXGBE_READ_REG(hw
, IXGBE_RT2SR(i
));
433 for (i
= 0; i
< 8; i
++)
434 regs_buff
[849 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDTQ2TCCR(i
));
435 for (i
= 0; i
< 8; i
++)
436 regs_buff
[857 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDTQ2TCSR(i
));
437 for (i
= 0; i
< 8; i
++)
438 regs_buff
[865 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDPT2TCCR(i
));
439 for (i
= 0; i
< 8; i
++)
440 regs_buff
[873 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDPT2TCSR(i
));
443 regs_buff
[881] = IXGBE_GET_STAT(adapter
, crcerrs
);
444 regs_buff
[882] = IXGBE_GET_STAT(adapter
, illerrc
);
445 regs_buff
[883] = IXGBE_GET_STAT(adapter
, errbc
);
446 regs_buff
[884] = IXGBE_GET_STAT(adapter
, mspdc
);
447 for (i
= 0; i
< 8; i
++)
448 regs_buff
[885 + i
] = IXGBE_GET_STAT(adapter
, mpc
[i
]);
449 regs_buff
[893] = IXGBE_GET_STAT(adapter
, mlfc
);
450 regs_buff
[894] = IXGBE_GET_STAT(adapter
, mrfc
);
451 regs_buff
[895] = IXGBE_GET_STAT(adapter
, rlec
);
452 regs_buff
[896] = IXGBE_GET_STAT(adapter
, lxontxc
);
453 regs_buff
[897] = IXGBE_GET_STAT(adapter
, lxonrxc
);
454 regs_buff
[898] = IXGBE_GET_STAT(adapter
, lxofftxc
);
455 regs_buff
[899] = IXGBE_GET_STAT(adapter
, lxoffrxc
);
456 for (i
= 0; i
< 8; i
++)
457 regs_buff
[900 + i
] = IXGBE_GET_STAT(adapter
, pxontxc
[i
]);
458 for (i
= 0; i
< 8; i
++)
459 regs_buff
[908 + i
] = IXGBE_GET_STAT(adapter
, pxonrxc
[i
]);
460 for (i
= 0; i
< 8; i
++)
461 regs_buff
[916 + i
] = IXGBE_GET_STAT(adapter
, pxofftxc
[i
]);
462 for (i
= 0; i
< 8; i
++)
463 regs_buff
[924 + i
] = IXGBE_GET_STAT(adapter
, pxoffrxc
[i
]);
464 regs_buff
[932] = IXGBE_GET_STAT(adapter
, prc64
);
465 regs_buff
[933] = IXGBE_GET_STAT(adapter
, prc127
);
466 regs_buff
[934] = IXGBE_GET_STAT(adapter
, prc255
);
467 regs_buff
[935] = IXGBE_GET_STAT(adapter
, prc511
);
468 regs_buff
[936] = IXGBE_GET_STAT(adapter
, prc1023
);
469 regs_buff
[937] = IXGBE_GET_STAT(adapter
, prc1522
);
470 regs_buff
[938] = IXGBE_GET_STAT(adapter
, gprc
);
471 regs_buff
[939] = IXGBE_GET_STAT(adapter
, bprc
);
472 regs_buff
[940] = IXGBE_GET_STAT(adapter
, mprc
);
473 regs_buff
[941] = IXGBE_GET_STAT(adapter
, gptc
);
474 regs_buff
[942] = IXGBE_GET_STAT(adapter
, gorc
);
475 regs_buff
[944] = IXGBE_GET_STAT(adapter
, gotc
);
476 for (i
= 0; i
< 8; i
++)
477 regs_buff
[946 + i
] = IXGBE_GET_STAT(adapter
, rnbc
[i
]);
478 regs_buff
[954] = IXGBE_GET_STAT(adapter
, ruc
);
479 regs_buff
[955] = IXGBE_GET_STAT(adapter
, rfc
);
480 regs_buff
[956] = IXGBE_GET_STAT(adapter
, roc
);
481 regs_buff
[957] = IXGBE_GET_STAT(adapter
, rjc
);
482 regs_buff
[958] = IXGBE_GET_STAT(adapter
, mngprc
);
483 regs_buff
[959] = IXGBE_GET_STAT(adapter
, mngpdc
);
484 regs_buff
[960] = IXGBE_GET_STAT(adapter
, mngptc
);
485 regs_buff
[961] = IXGBE_GET_STAT(adapter
, tor
);
486 regs_buff
[963] = IXGBE_GET_STAT(adapter
, tpr
);
487 regs_buff
[964] = IXGBE_GET_STAT(adapter
, tpt
);
488 regs_buff
[965] = IXGBE_GET_STAT(adapter
, ptc64
);
489 regs_buff
[966] = IXGBE_GET_STAT(adapter
, ptc127
);
490 regs_buff
[967] = IXGBE_GET_STAT(adapter
, ptc255
);
491 regs_buff
[968] = IXGBE_GET_STAT(adapter
, ptc511
);
492 regs_buff
[969] = IXGBE_GET_STAT(adapter
, ptc1023
);
493 regs_buff
[970] = IXGBE_GET_STAT(adapter
, ptc1522
);
494 regs_buff
[971] = IXGBE_GET_STAT(adapter
, mptc
);
495 regs_buff
[972] = IXGBE_GET_STAT(adapter
, bptc
);
496 regs_buff
[973] = IXGBE_GET_STAT(adapter
, xec
);
497 for (i
= 0; i
< 16; i
++)
498 regs_buff
[974 + i
] = IXGBE_GET_STAT(adapter
, qprc
[i
]);
499 for (i
= 0; i
< 16; i
++)
500 regs_buff
[990 + i
] = IXGBE_GET_STAT(adapter
, qptc
[i
]);
501 for (i
= 0; i
< 16; i
++)
502 regs_buff
[1006 + i
] = IXGBE_GET_STAT(adapter
, qbrc
[i
]);
503 for (i
= 0; i
< 16; i
++)
504 regs_buff
[1022 + i
] = IXGBE_GET_STAT(adapter
, qbtc
[i
]);
507 regs_buff
[1038] = IXGBE_READ_REG(hw
, IXGBE_PCS1GCFIG
);
508 regs_buff
[1039] = IXGBE_READ_REG(hw
, IXGBE_PCS1GLCTL
);
509 regs_buff
[1040] = IXGBE_READ_REG(hw
, IXGBE_PCS1GLSTA
);
510 regs_buff
[1041] = IXGBE_READ_REG(hw
, IXGBE_PCS1GDBG0
);
511 regs_buff
[1042] = IXGBE_READ_REG(hw
, IXGBE_PCS1GDBG1
);
512 regs_buff
[1043] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANA
);
513 regs_buff
[1044] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANLP
);
514 regs_buff
[1045] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANNP
);
515 regs_buff
[1046] = IXGBE_READ_REG(hw
, IXGBE_PCS1GANLPNP
);
516 regs_buff
[1047] = IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
517 regs_buff
[1048] = IXGBE_READ_REG(hw
, IXGBE_HLREG1
);
518 regs_buff
[1049] = IXGBE_READ_REG(hw
, IXGBE_PAP
);
519 regs_buff
[1050] = IXGBE_READ_REG(hw
, IXGBE_MACA
);
520 regs_buff
[1051] = IXGBE_READ_REG(hw
, IXGBE_APAE
);
521 regs_buff
[1052] = IXGBE_READ_REG(hw
, IXGBE_ARD
);
522 regs_buff
[1053] = IXGBE_READ_REG(hw
, IXGBE_AIS
);
523 regs_buff
[1054] = IXGBE_READ_REG(hw
, IXGBE_MSCA
);
524 regs_buff
[1055] = IXGBE_READ_REG(hw
, IXGBE_MSRWD
);
525 regs_buff
[1056] = IXGBE_READ_REG(hw
, IXGBE_MLADD
);
526 regs_buff
[1057] = IXGBE_READ_REG(hw
, IXGBE_MHADD
);
527 regs_buff
[1058] = IXGBE_READ_REG(hw
, IXGBE_TREG
);
528 regs_buff
[1059] = IXGBE_READ_REG(hw
, IXGBE_PCSS1
);
529 regs_buff
[1060] = IXGBE_READ_REG(hw
, IXGBE_PCSS2
);
530 regs_buff
[1061] = IXGBE_READ_REG(hw
, IXGBE_XPCSS
);
531 regs_buff
[1062] = IXGBE_READ_REG(hw
, IXGBE_SERDESC
);
532 regs_buff
[1063] = IXGBE_READ_REG(hw
, IXGBE_MACS
);
533 regs_buff
[1064] = IXGBE_READ_REG(hw
, IXGBE_AUTOC
);
534 regs_buff
[1065] = IXGBE_READ_REG(hw
, IXGBE_LINKS
);
535 regs_buff
[1066] = IXGBE_READ_REG(hw
, IXGBE_AUTOC2
);
536 regs_buff
[1067] = IXGBE_READ_REG(hw
, IXGBE_AUTOC3
);
537 regs_buff
[1068] = IXGBE_READ_REG(hw
, IXGBE_ANLP1
);
538 regs_buff
[1069] = IXGBE_READ_REG(hw
, IXGBE_ANLP2
);
539 regs_buff
[1070] = IXGBE_READ_REG(hw
, IXGBE_ATLASCTL
);
542 regs_buff
[1071] = IXGBE_READ_REG(hw
, IXGBE_RDSTATCTL
);
543 for (i
= 0; i
< 8; i
++)
544 regs_buff
[1072 + i
] = IXGBE_READ_REG(hw
, IXGBE_RDSTAT(i
));
545 regs_buff
[1080] = IXGBE_READ_REG(hw
, IXGBE_RDHMPN
);
546 for (i
= 0; i
< 4; i
++)
547 regs_buff
[1081 + i
] = IXGBE_READ_REG(hw
, IXGBE_RIC_DW(i
));
548 regs_buff
[1085] = IXGBE_READ_REG(hw
, IXGBE_RDPROBE
);
549 regs_buff
[1086] = IXGBE_READ_REG(hw
, IXGBE_TDSTATCTL
);
550 for (i
= 0; i
< 8; i
++)
551 regs_buff
[1087 + i
] = IXGBE_READ_REG(hw
, IXGBE_TDSTAT(i
));
552 regs_buff
[1095] = IXGBE_READ_REG(hw
, IXGBE_TDHMPN
);
553 for (i
= 0; i
< 4; i
++)
554 regs_buff
[1096 + i
] = IXGBE_READ_REG(hw
, IXGBE_TIC_DW(i
));
555 regs_buff
[1100] = IXGBE_READ_REG(hw
, IXGBE_TDPROBE
);
556 regs_buff
[1101] = IXGBE_READ_REG(hw
, IXGBE_TXBUFCTRL
);
557 regs_buff
[1102] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA0
);
558 regs_buff
[1103] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA1
);
559 regs_buff
[1104] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA2
);
560 regs_buff
[1105] = IXGBE_READ_REG(hw
, IXGBE_TXBUFDATA3
);
561 regs_buff
[1106] = IXGBE_READ_REG(hw
, IXGBE_RXBUFCTRL
);
562 regs_buff
[1107] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA0
);
563 regs_buff
[1108] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA1
);
564 regs_buff
[1109] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA2
);
565 regs_buff
[1110] = IXGBE_READ_REG(hw
, IXGBE_RXBUFDATA3
);
566 for (i
= 0; i
< 8; i
++)
567 regs_buff
[1111 + i
] = IXGBE_READ_REG(hw
, IXGBE_PCIE_DIAG(i
));
568 regs_buff
[1119] = IXGBE_READ_REG(hw
, IXGBE_RFVAL
);
569 regs_buff
[1120] = IXGBE_READ_REG(hw
, IXGBE_MDFTC1
);
570 regs_buff
[1121] = IXGBE_READ_REG(hw
, IXGBE_MDFTC2
);
571 regs_buff
[1122] = IXGBE_READ_REG(hw
, IXGBE_MDFTFIFO1
);
572 regs_buff
[1123] = IXGBE_READ_REG(hw
, IXGBE_MDFTFIFO2
);
573 regs_buff
[1124] = IXGBE_READ_REG(hw
, IXGBE_MDFTS
);
574 regs_buff
[1125] = IXGBE_READ_REG(hw
, IXGBE_PCIEECCCTL
);
575 regs_buff
[1126] = IXGBE_READ_REG(hw
, IXGBE_PBTXECC
);
576 regs_buff
[1127] = IXGBE_READ_REG(hw
, IXGBE_PBRXECC
);
579 static int ixgbe_get_eeprom_len(struct net_device
*netdev
)
581 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
582 return adapter
->hw
.eeprom
.word_size
* 2;
585 static int ixgbe_get_eeprom(struct net_device
*netdev
,
586 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
588 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
589 struct ixgbe_hw
*hw
= &adapter
->hw
;
591 int first_word
, last_word
, eeprom_len
;
595 if (eeprom
->len
== 0)
598 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
600 first_word
= eeprom
->offset
>> 1;
601 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
602 eeprom_len
= last_word
- first_word
+ 1;
604 eeprom_buff
= kmalloc(sizeof(u16
) * eeprom_len
, GFP_KERNEL
);
608 for (i
= 0; i
< eeprom_len
; i
++) {
609 if ((ret_val
= hw
->eeprom
.ops
.read(hw
, first_word
+ i
,
614 /* Device's eeprom is always little-endian, word addressable */
615 for (i
= 0; i
< eeprom_len
; i
++)
616 le16_to_cpus(&eeprom_buff
[i
]);
618 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1), eeprom
->len
);
624 static void ixgbe_get_drvinfo(struct net_device
*netdev
,
625 struct ethtool_drvinfo
*drvinfo
)
627 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
629 strncpy(drvinfo
->driver
, ixgbe_driver_name
, 32);
630 strncpy(drvinfo
->version
, ixgbe_driver_version
, 32);
631 strncpy(drvinfo
->fw_version
, "N/A", 32);
632 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
633 drvinfo
->n_stats
= IXGBE_STATS_LEN
;
634 drvinfo
->regdump_len
= ixgbe_get_regs_len(netdev
);
637 static void ixgbe_get_ringparam(struct net_device
*netdev
,
638 struct ethtool_ringparam
*ring
)
640 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
641 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
;
642 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
;
644 ring
->rx_max_pending
= IXGBE_MAX_RXD
;
645 ring
->tx_max_pending
= IXGBE_MAX_TXD
;
646 ring
->rx_mini_max_pending
= 0;
647 ring
->rx_jumbo_max_pending
= 0;
648 ring
->rx_pending
= rx_ring
->count
;
649 ring
->tx_pending
= tx_ring
->count
;
650 ring
->rx_mini_pending
= 0;
651 ring
->rx_jumbo_pending
= 0;
654 static int ixgbe_set_ringparam(struct net_device
*netdev
,
655 struct ethtool_ringparam
*ring
)
657 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
658 struct ixgbe_ring
*temp_ring
;
660 u32 new_rx_count
, new_tx_count
;
662 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
665 new_rx_count
= max(ring
->rx_pending
, (u32
)IXGBE_MIN_RXD
);
666 new_rx_count
= min(new_rx_count
, (u32
)IXGBE_MAX_RXD
);
667 new_rx_count
= ALIGN(new_rx_count
, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE
);
669 new_tx_count
= max(ring
->tx_pending
, (u32
)IXGBE_MIN_TXD
);
670 new_tx_count
= min(new_tx_count
, (u32
)IXGBE_MAX_TXD
);
671 new_tx_count
= ALIGN(new_tx_count
, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE
);
673 if ((new_tx_count
== adapter
->tx_ring
->count
) &&
674 (new_rx_count
== adapter
->rx_ring
->count
)) {
679 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
680 temp_ring
= vmalloc(adapter
->num_tx_queues
*
681 sizeof(struct ixgbe_ring
));
683 temp_ring
= vmalloc(adapter
->num_rx_queues
*
684 sizeof(struct ixgbe_ring
));
688 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
691 if (netif_running(netdev
))
695 * We can't just free everything and then setup again,
696 * because the ISRs in MSI-X mode get passed pointers
697 * to the tx and rx ring structs.
699 if (new_tx_count
!= adapter
->tx_ring
->count
) {
700 memcpy(temp_ring
, adapter
->tx_ring
,
701 adapter
->num_tx_queues
* sizeof(struct ixgbe_ring
));
703 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
704 temp_ring
[i
].count
= new_tx_count
;
705 err
= ixgbe_setup_tx_resources(adapter
, &temp_ring
[i
]);
709 ixgbe_free_tx_resources(adapter
,
716 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
717 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
719 memcpy(adapter
->tx_ring
, temp_ring
,
720 adapter
->num_tx_queues
* sizeof(struct ixgbe_ring
));
722 adapter
->tx_ring_count
= new_tx_count
;
725 if (new_rx_count
!= adapter
->rx_ring
->count
) {
726 memcpy(temp_ring
, adapter
->rx_ring
,
727 adapter
->num_rx_queues
* sizeof(struct ixgbe_ring
));
729 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
730 temp_ring
[i
].count
= new_rx_count
;
731 err
= ixgbe_setup_rx_resources(adapter
, &temp_ring
[i
]);
735 ixgbe_free_rx_resources(adapter
,
742 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
743 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
745 memcpy(adapter
->rx_ring
, temp_ring
,
746 adapter
->num_rx_queues
* sizeof(struct ixgbe_ring
));
748 adapter
->rx_ring_count
= new_rx_count
;
754 if (netif_running(netdev
))
757 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
761 static int ixgbe_get_sset_count(struct net_device
*netdev
, int sset
)
765 return IXGBE_STATS_LEN
;
771 static void ixgbe_get_ethtool_stats(struct net_device
*netdev
,
772 struct ethtool_stats
*stats
, u64
*data
)
774 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
776 int stat_count
= sizeof(struct ixgbe_queue_stats
) / sizeof(u64
);
779 u64 aggregated
= 0, flushed
= 0, no_desc
= 0;
780 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
781 aggregated
+= adapter
->rx_ring
[i
].lro_mgr
.stats
.aggregated
;
782 flushed
+= adapter
->rx_ring
[i
].lro_mgr
.stats
.flushed
;
783 no_desc
+= adapter
->rx_ring
[i
].lro_mgr
.stats
.no_desc
;
785 adapter
->lro_aggregated
= aggregated
;
786 adapter
->lro_flushed
= flushed
;
787 adapter
->lro_no_desc
= no_desc
;
789 ixgbe_update_stats(adapter
);
790 for (i
= 0; i
< IXGBE_GLOBAL_STATS_LEN
; i
++) {
791 char *p
= (char *)adapter
+ ixgbe_gstrings_stats
[i
].stat_offset
;
792 data
[i
] = (ixgbe_gstrings_stats
[i
].sizeof_stat
==
793 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
795 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
796 queue_stat
= (u64
*)&adapter
->tx_ring
[j
].stats
;
797 for (k
= 0; k
< stat_count
; k
++)
798 data
[i
+ k
] = queue_stat
[k
];
801 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
802 queue_stat
= (u64
*)&adapter
->rx_ring
[j
].stats
;
803 for (k
= 0; k
< stat_count
; k
++)
804 data
[i
+ k
] = queue_stat
[k
];
809 static void ixgbe_get_strings(struct net_device
*netdev
, u32 stringset
,
812 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
813 char *p
= (char *)data
;
818 for (i
= 0; i
< IXGBE_GLOBAL_STATS_LEN
; i
++) {
819 memcpy(p
, ixgbe_gstrings_stats
[i
].stat_string
,
821 p
+= ETH_GSTRING_LEN
;
823 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
824 sprintf(p
, "tx_queue_%u_packets", i
);
825 p
+= ETH_GSTRING_LEN
;
826 sprintf(p
, "tx_queue_%u_bytes", i
);
827 p
+= ETH_GSTRING_LEN
;
829 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
830 sprintf(p
, "rx_queue_%u_packets", i
);
831 p
+= ETH_GSTRING_LEN
;
832 sprintf(p
, "rx_queue_%u_bytes", i
);
833 p
+= ETH_GSTRING_LEN
;
835 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
841 static void ixgbe_get_wol(struct net_device
*netdev
,
842 struct ethtool_wolinfo
*wol
)
850 static int ixgbe_nway_reset(struct net_device
*netdev
)
852 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
854 if (netif_running(netdev
))
855 ixgbe_reinit_locked(adapter
);
860 static int ixgbe_phys_id(struct net_device
*netdev
, u32 data
)
862 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
863 struct ixgbe_hw
*hw
= &adapter
->hw
;
864 u32 led_reg
= IXGBE_READ_REG(hw
, IXGBE_LEDCTL
);
867 if (!data
|| data
> 300)
870 for (i
= 0; i
< (data
* 1000); i
+= 400) {
871 hw
->mac
.ops
.led_on(hw
, IXGBE_LED_ON
);
872 msleep_interruptible(200);
873 hw
->mac
.ops
.led_off(hw
, IXGBE_LED_ON
);
874 msleep_interruptible(200);
877 /* Restore LED settings */
878 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_LEDCTL
, led_reg
);
883 static int ixgbe_get_coalesce(struct net_device
*netdev
,
884 struct ethtool_coalesce
*ec
)
886 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
888 ec
->tx_max_coalesced_frames_irq
= adapter
->tx_ring
[0].work_limit
;
890 /* only valid if in constant ITR mode */
891 switch (adapter
->itr_setting
) {
893 /* throttling disabled */
894 ec
->rx_coalesce_usecs
= 0;
897 /* dynamic ITR mode */
898 ec
->rx_coalesce_usecs
= 1;
901 /* fixed interrupt rate mode */
902 ec
->rx_coalesce_usecs
= 1000000/adapter
->eitr_param
;
908 static int ixgbe_set_coalesce(struct net_device
*netdev
,
909 struct ethtool_coalesce
*ec
)
911 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
912 struct ixgbe_hw
*hw
= &adapter
->hw
;
915 if (ec
->tx_max_coalesced_frames_irq
)
916 adapter
->tx_ring
[0].work_limit
= ec
->tx_max_coalesced_frames_irq
;
918 if (ec
->rx_coalesce_usecs
> 1) {
919 /* store the value in ints/second */
920 adapter
->eitr_param
= 1000000/ec
->rx_coalesce_usecs
;
922 /* static value of interrupt rate */
923 adapter
->itr_setting
= adapter
->eitr_param
;
924 /* clear the lower bit */
925 adapter
->itr_setting
&= ~1;
926 } else if (ec
->rx_coalesce_usecs
== 1) {
927 /* 1 means dynamic mode */
928 adapter
->eitr_param
= 20000;
929 adapter
->itr_setting
= 1;
931 /* any other value means disable eitr, which is best
932 * served by setting the interrupt rate very high */
933 adapter
->eitr_param
= 3000000;
934 adapter
->itr_setting
= 0;
937 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
938 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
939 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
940 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
942 /* rx only or mixed */
943 q_vector
->eitr
= adapter
->eitr_param
;
944 IXGBE_WRITE_REG(hw
, IXGBE_EITR(i
),
945 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
952 static const struct ethtool_ops ixgbe_ethtool_ops
= {
953 .get_settings
= ixgbe_get_settings
,
954 .set_settings
= ixgbe_set_settings
,
955 .get_drvinfo
= ixgbe_get_drvinfo
,
956 .get_regs_len
= ixgbe_get_regs_len
,
957 .get_regs
= ixgbe_get_regs
,
958 .get_wol
= ixgbe_get_wol
,
959 .nway_reset
= ixgbe_nway_reset
,
960 .get_link
= ethtool_op_get_link
,
961 .get_eeprom_len
= ixgbe_get_eeprom_len
,
962 .get_eeprom
= ixgbe_get_eeprom
,
963 .get_ringparam
= ixgbe_get_ringparam
,
964 .set_ringparam
= ixgbe_set_ringparam
,
965 .get_pauseparam
= ixgbe_get_pauseparam
,
966 .set_pauseparam
= ixgbe_set_pauseparam
,
967 .get_rx_csum
= ixgbe_get_rx_csum
,
968 .set_rx_csum
= ixgbe_set_rx_csum
,
969 .get_tx_csum
= ixgbe_get_tx_csum
,
970 .set_tx_csum
= ixgbe_set_tx_csum
,
971 .get_sg
= ethtool_op_get_sg
,
972 .set_sg
= ethtool_op_set_sg
,
973 .get_msglevel
= ixgbe_get_msglevel
,
974 .set_msglevel
= ixgbe_set_msglevel
,
975 .get_tso
= ethtool_op_get_tso
,
976 .set_tso
= ixgbe_set_tso
,
977 .get_strings
= ixgbe_get_strings
,
978 .phys_id
= ixgbe_phys_id
,
979 .get_sset_count
= ixgbe_get_sset_count
,
980 .get_ethtool_stats
= ixgbe_get_ethtool_stats
,
981 .get_coalesce
= ixgbe_get_coalesce
,
982 .set_coalesce
= ixgbe_set_coalesce
,
983 .get_flags
= ethtool_op_get_flags
,
984 .set_flags
= ethtool_op_set_flags
,
987 void ixgbe_set_ethtool_ops(struct net_device
*netdev
)
989 SET_ETHTOOL_OPS(netdev
, &ixgbe_ethtool_ops
);