2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <mach/board.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb
*bp
)
61 bottom
= cpu_to_le32(*((u32
*)bp
->dev
->dev_addr
));
62 macb_writel(bp
, SA1B
, bottom
);
63 top
= cpu_to_le16(*((u16
*)(bp
->dev
->dev_addr
+ 4)));
64 macb_writel(bp
, SA1T
, top
);
67 static void __init
macb_get_hwaddr(struct macb
*bp
)
73 bottom
= macb_readl(bp
, SA1B
);
74 top
= macb_readl(bp
, SA1T
);
76 addr
[0] = bottom
& 0xff;
77 addr
[1] = (bottom
>> 8) & 0xff;
78 addr
[2] = (bottom
>> 16) & 0xff;
79 addr
[3] = (bottom
>> 24) & 0xff;
81 addr
[5] = (top
>> 8) & 0xff;
83 if (is_valid_ether_addr(addr
)) {
84 memcpy(bp
->dev
->dev_addr
, addr
, sizeof(addr
));
86 dev_info(&bp
->pdev
->dev
, "invalid hw address, using random\n");
87 random_ether_addr(bp
->dev
->dev_addr
);
91 static int macb_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
93 struct macb
*bp
= bus
->priv
;
96 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
97 | MACB_BF(RW
, MACB_MAN_READ
)
98 | MACB_BF(PHYA
, mii_id
)
99 | MACB_BF(REGA
, regnum
)
100 | MACB_BF(CODE
, MACB_MAN_CODE
)));
102 /* wait for end of transfer */
103 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
106 value
= MACB_BFEXT(DATA
, macb_readl(bp
, MAN
));
111 static int macb_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
114 struct macb
*bp
= bus
->priv
;
116 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
117 | MACB_BF(RW
, MACB_MAN_WRITE
)
118 | MACB_BF(PHYA
, mii_id
)
119 | MACB_BF(REGA
, regnum
)
120 | MACB_BF(CODE
, MACB_MAN_CODE
)
121 | MACB_BF(DATA
, value
)));
123 /* wait for end of transfer */
124 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
130 static int macb_mdio_reset(struct mii_bus
*bus
)
135 static void macb_handle_link_change(struct net_device
*dev
)
137 struct macb
*bp
= netdev_priv(dev
);
138 struct phy_device
*phydev
= bp
->phy_dev
;
141 int status_change
= 0;
143 spin_lock_irqsave(&bp
->lock
, flags
);
146 if ((bp
->speed
!= phydev
->speed
) ||
147 (bp
->duplex
!= phydev
->duplex
)) {
150 reg
= macb_readl(bp
, NCFGR
);
151 reg
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
155 if (phydev
->speed
== SPEED_100
)
156 reg
|= MACB_BIT(SPD
);
158 macb_writel(bp
, NCFGR
, reg
);
160 bp
->speed
= phydev
->speed
;
161 bp
->duplex
= phydev
->duplex
;
166 if (phydev
->link
!= bp
->link
) {
171 bp
->link
= phydev
->link
;
176 spin_unlock_irqrestore(&bp
->lock
, flags
);
180 printk(KERN_INFO
"%s: link up (%d/%s)\n",
181 dev
->name
, phydev
->speed
,
182 DUPLEX_FULL
== phydev
->duplex
? "Full":"Half");
184 printk(KERN_INFO
"%s: link down\n", dev
->name
);
188 /* based on au1000_eth. c*/
189 static int macb_mii_probe(struct net_device
*dev
)
191 struct macb
*bp
= netdev_priv(dev
);
192 struct phy_device
*phydev
= NULL
;
193 struct eth_platform_data
*pdata
;
196 /* find the first phy */
197 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
198 if (bp
->mii_bus
->phy_map
[phy_addr
]) {
199 phydev
= bp
->mii_bus
->phy_map
[phy_addr
];
205 printk (KERN_ERR
"%s: no PHY found\n", dev
->name
);
209 pdata
= bp
->pdev
->dev
.platform_data
;
210 /* TODO : add pin_irq */
212 /* attach the mac to the phy */
213 if (pdata
&& pdata
->is_rmii
) {
214 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
215 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_RMII
);
217 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
218 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_MII
);
221 if (IS_ERR(phydev
)) {
222 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
223 return PTR_ERR(phydev
);
226 /* mask with MAC supported features */
227 phydev
->supported
&= PHY_BASIC_FEATURES
;
229 phydev
->advertising
= phydev
->supported
;
234 bp
->phy_dev
= phydev
;
239 static int macb_mii_init(struct macb
*bp
)
241 struct eth_platform_data
*pdata
;
244 /* Enable managment port */
245 macb_writel(bp
, NCR
, MACB_BIT(MPE
));
247 bp
->mii_bus
= mdiobus_alloc();
248 if (bp
->mii_bus
== NULL
) {
253 bp
->mii_bus
->name
= "MACB_mii_bus";
254 bp
->mii_bus
->read
= &macb_mdio_read
;
255 bp
->mii_bus
->write
= &macb_mdio_write
;
256 bp
->mii_bus
->reset
= &macb_mdio_reset
;
257 snprintf(bp
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", bp
->pdev
->id
);
258 bp
->mii_bus
->priv
= bp
;
259 bp
->mii_bus
->parent
= &bp
->dev
->dev
;
260 pdata
= bp
->pdev
->dev
.platform_data
;
263 bp
->mii_bus
->phy_mask
= pdata
->phy_mask
;
265 bp
->mii_bus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
266 if (!bp
->mii_bus
->irq
) {
268 goto err_out_free_mdiobus
;
271 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
272 bp
->mii_bus
->irq
[i
] = PHY_POLL
;
274 platform_set_drvdata(bp
->dev
, bp
->mii_bus
);
276 if (mdiobus_register(bp
->mii_bus
))
277 goto err_out_free_mdio_irq
;
279 if (macb_mii_probe(bp
->dev
) != 0) {
280 goto err_out_unregister_bus
;
285 err_out_unregister_bus
:
286 mdiobus_unregister(bp
->mii_bus
);
287 err_out_free_mdio_irq
:
288 kfree(bp
->mii_bus
->irq
);
289 err_out_free_mdiobus
:
290 mdiobus_free(bp
->mii_bus
);
295 static void macb_update_stats(struct macb
*bp
)
297 u32 __iomem
*reg
= bp
->regs
+ MACB_PFR
;
298 u32
*p
= &bp
->hw_stats
.rx_pause_frames
;
299 u32
*end
= &bp
->hw_stats
.tx_pause_frames
+ 1;
301 WARN_ON((unsigned long)(end
- p
- 1) != (MACB_TPF
- MACB_PFR
) / 4);
303 for(; p
< end
; p
++, reg
++)
304 *p
+= __raw_readl(reg
);
307 static void macb_tx(struct macb
*bp
)
313 status
= macb_readl(bp
, TSR
);
314 macb_writel(bp
, TSR
, status
);
316 dev_dbg(&bp
->pdev
->dev
, "macb_tx status = %02lx\n",
317 (unsigned long)status
);
319 if (status
& MACB_BIT(UND
)) {
321 printk(KERN_ERR
"%s: TX underrun, resetting buffers\n",
326 /*Mark all the buffer as used to avoid sending a lost buffer*/
327 for (i
= 0; i
< TX_RING_SIZE
; i
++)
328 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
330 /* free transmit buffer in upper layer*/
331 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
332 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
333 struct sk_buff
*skb
= rp
->skb
;
339 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
342 dev_kfree_skb_irq(skb
);
345 bp
->tx_head
= bp
->tx_tail
= 0;
348 if (!(status
& MACB_BIT(COMP
)))
350 * This may happen when a buffer becomes complete
351 * between reading the ISR and scanning the
352 * descriptors. Nothing to worry about.
357 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
358 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
359 struct sk_buff
*skb
= rp
->skb
;
365 bufstat
= bp
->tx_ring
[tail
].ctrl
;
367 if (!(bufstat
& MACB_BIT(TX_USED
)))
370 dev_dbg(&bp
->pdev
->dev
, "skb %u (data %p) TX complete\n",
372 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
374 bp
->stats
.tx_packets
++;
375 bp
->stats
.tx_bytes
+= skb
->len
;
377 dev_kfree_skb_irq(skb
);
381 if (netif_queue_stopped(bp
->dev
) &&
382 TX_BUFFS_AVAIL(bp
) > MACB_TX_WAKEUP_THRESH
)
383 netif_wake_queue(bp
->dev
);
386 static int macb_rx_frame(struct macb
*bp
, unsigned int first_frag
,
387 unsigned int last_frag
)
391 unsigned int offset
= 0;
394 len
= MACB_BFEXT(RX_FRMLEN
, bp
->rx_ring
[last_frag
].ctrl
);
396 dev_dbg(&bp
->pdev
->dev
, "macb_rx_frame frags %u - %u (len %u)\n",
397 first_frag
, last_frag
, len
);
399 skb
= dev_alloc_skb(len
+ RX_OFFSET
);
401 bp
->stats
.rx_dropped
++;
402 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
403 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
404 if (frag
== last_frag
)
411 skb_reserve(skb
, RX_OFFSET
);
412 skb
->ip_summed
= CHECKSUM_NONE
;
415 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
416 unsigned int frag_len
= RX_BUFFER_SIZE
;
418 if (offset
+ frag_len
> len
) {
419 BUG_ON(frag
!= last_frag
);
420 frag_len
= len
- offset
;
422 skb_copy_to_linear_data_offset(skb
, offset
,
424 (RX_BUFFER_SIZE
* frag
)),
426 offset
+= RX_BUFFER_SIZE
;
427 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
430 if (frag
== last_frag
)
434 skb
->protocol
= eth_type_trans(skb
, bp
->dev
);
436 bp
->stats
.rx_packets
++;
437 bp
->stats
.rx_bytes
+= len
;
438 dev_dbg(&bp
->pdev
->dev
, "received skb of length %u, csum: %08x\n",
439 skb
->len
, skb
->csum
);
440 netif_receive_skb(skb
);
445 /* Mark DMA descriptors from begin up to and not including end as unused */
446 static void discard_partial_frame(struct macb
*bp
, unsigned int begin
,
451 for (frag
= begin
; frag
!= end
; frag
= NEXT_RX(frag
))
452 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
456 * When this happens, the hardware stats registers for
457 * whatever caused this is updated, so we don't have to record
462 static int macb_rx(struct macb
*bp
, int budget
)
465 unsigned int tail
= bp
->rx_tail
;
468 for (; budget
> 0; tail
= NEXT_RX(tail
)) {
472 addr
= bp
->rx_ring
[tail
].addr
;
473 ctrl
= bp
->rx_ring
[tail
].ctrl
;
475 if (!(addr
& MACB_BIT(RX_USED
)))
478 if (ctrl
& MACB_BIT(RX_SOF
)) {
479 if (first_frag
!= -1)
480 discard_partial_frame(bp
, first_frag
, tail
);
484 if (ctrl
& MACB_BIT(RX_EOF
)) {
486 BUG_ON(first_frag
== -1);
488 dropped
= macb_rx_frame(bp
, first_frag
, tail
);
497 if (first_frag
!= -1)
498 bp
->rx_tail
= first_frag
;
505 static int macb_poll(struct napi_struct
*napi
, int budget
)
507 struct macb
*bp
= container_of(napi
, struct macb
, napi
);
508 struct net_device
*dev
= bp
->dev
;
512 status
= macb_readl(bp
, RSR
);
513 macb_writel(bp
, RSR
, status
);
518 * This may happen if an interrupt was pending before
519 * this function was called last time, and no packets
520 * have been received since.
522 netif_rx_complete(napi
);
526 dev_dbg(&bp
->pdev
->dev
, "poll: status = %08lx, budget = %d\n",
527 (unsigned long)status
, budget
);
529 if (!(status
& MACB_BIT(REC
))) {
530 dev_warn(&bp
->pdev
->dev
,
531 "No RX buffers complete, status = %02lx\n",
532 (unsigned long)status
);
533 netif_rx_complete(napi
);
537 work_done
= macb_rx(bp
, budget
);
538 if (work_done
< budget
)
539 netif_rx_complete(napi
);
542 * We've done what we can to clean the buffers. Make sure we
543 * get notified when new packets arrive.
546 macb_writel(bp
, IER
, MACB_RX_INT_FLAGS
);
548 /* TODO: Handle errors */
553 static irqreturn_t
macb_interrupt(int irq
, void *dev_id
)
555 struct net_device
*dev
= dev_id
;
556 struct macb
*bp
= netdev_priv(dev
);
559 status
= macb_readl(bp
, ISR
);
561 if (unlikely(!status
))
564 spin_lock(&bp
->lock
);
567 /* close possible race with dev_close */
568 if (unlikely(!netif_running(dev
))) {
569 macb_writel(bp
, IDR
, ~0UL);
573 if (status
& MACB_RX_INT_FLAGS
) {
574 if (netif_rx_schedule_prep(&bp
->napi
)) {
576 * There's no point taking any more interrupts
577 * until we have processed the buffers
579 macb_writel(bp
, IDR
, MACB_RX_INT_FLAGS
);
580 dev_dbg(&bp
->pdev
->dev
,
581 "scheduling RX softirq\n");
582 __netif_rx_schedule(&bp
->napi
);
586 if (status
& (MACB_BIT(TCOMP
) | MACB_BIT(ISR_TUND
)))
590 * Link change detection isn't possible with RMII, so we'll
591 * add that if/when we get our hands on a full-blown MII PHY.
594 if (status
& MACB_BIT(HRESP
)) {
596 * TODO: Reset the hardware, and maybe move the printk
597 * to a lower-priority context as well (work queue?)
599 printk(KERN_ERR
"%s: DMA bus error: HRESP not OK\n",
603 status
= macb_readl(bp
, ISR
);
606 spin_unlock(&bp
->lock
);
611 static int macb_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
613 struct macb
*bp
= netdev_priv(dev
);
615 unsigned int len
, entry
;
620 dev_dbg(&bp
->pdev
->dev
,
621 "start_xmit: len %u head %p data %p tail %p end %p\n",
622 skb
->len
, skb
->head
, skb
->data
,
623 skb_tail_pointer(skb
), skb_end_pointer(skb
));
624 dev_dbg(&bp
->pdev
->dev
,
626 for (i
= 0; i
< 16; i
++)
627 printk(" %02x", (unsigned int)skb
->data
[i
]);
632 spin_lock_irq(&bp
->lock
);
634 /* This is a hard error, log it. */
635 if (TX_BUFFS_AVAIL(bp
) < 1) {
636 netif_stop_queue(dev
);
637 spin_unlock_irq(&bp
->lock
);
638 dev_err(&bp
->pdev
->dev
,
639 "BUG! Tx Ring full when queue awake!\n");
640 dev_dbg(&bp
->pdev
->dev
, "tx_head = %u, tx_tail = %u\n",
641 bp
->tx_head
, bp
->tx_tail
);
646 dev_dbg(&bp
->pdev
->dev
, "Allocated ring entry %u\n", entry
);
647 mapping
= dma_map_single(&bp
->pdev
->dev
, skb
->data
,
649 bp
->tx_skb
[entry
].skb
= skb
;
650 bp
->tx_skb
[entry
].mapping
= mapping
;
651 dev_dbg(&bp
->pdev
->dev
, "Mapped skb data %p to DMA addr %08lx\n",
652 skb
->data
, (unsigned long)mapping
);
654 ctrl
= MACB_BF(TX_FRMLEN
, len
);
655 ctrl
|= MACB_BIT(TX_LAST
);
656 if (entry
== (TX_RING_SIZE
- 1))
657 ctrl
|= MACB_BIT(TX_WRAP
);
659 bp
->tx_ring
[entry
].addr
= mapping
;
660 bp
->tx_ring
[entry
].ctrl
= ctrl
;
663 entry
= NEXT_TX(entry
);
666 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TSTART
));
668 if (TX_BUFFS_AVAIL(bp
) < 1)
669 netif_stop_queue(dev
);
671 spin_unlock_irq(&bp
->lock
);
673 dev
->trans_start
= jiffies
;
678 static void macb_free_consistent(struct macb
*bp
)
685 dma_free_coherent(&bp
->pdev
->dev
, RX_RING_BYTES
,
686 bp
->rx_ring
, bp
->rx_ring_dma
);
690 dma_free_coherent(&bp
->pdev
->dev
, TX_RING_BYTES
,
691 bp
->tx_ring
, bp
->tx_ring_dma
);
694 if (bp
->rx_buffers
) {
695 dma_free_coherent(&bp
->pdev
->dev
,
696 RX_RING_SIZE
* RX_BUFFER_SIZE
,
697 bp
->rx_buffers
, bp
->rx_buffers_dma
);
698 bp
->rx_buffers
= NULL
;
702 static int macb_alloc_consistent(struct macb
*bp
)
706 size
= TX_RING_SIZE
* sizeof(struct ring_info
);
707 bp
->tx_skb
= kmalloc(size
, GFP_KERNEL
);
711 size
= RX_RING_BYTES
;
712 bp
->rx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
713 &bp
->rx_ring_dma
, GFP_KERNEL
);
716 dev_dbg(&bp
->pdev
->dev
,
717 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
718 size
, (unsigned long)bp
->rx_ring_dma
, bp
->rx_ring
);
720 size
= TX_RING_BYTES
;
721 bp
->tx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
722 &bp
->tx_ring_dma
, GFP_KERNEL
);
725 dev_dbg(&bp
->pdev
->dev
,
726 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
727 size
, (unsigned long)bp
->tx_ring_dma
, bp
->tx_ring
);
729 size
= RX_RING_SIZE
* RX_BUFFER_SIZE
;
730 bp
->rx_buffers
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
731 &bp
->rx_buffers_dma
, GFP_KERNEL
);
734 dev_dbg(&bp
->pdev
->dev
,
735 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
736 size
, (unsigned long)bp
->rx_buffers_dma
, bp
->rx_buffers
);
741 macb_free_consistent(bp
);
745 static void macb_init_rings(struct macb
*bp
)
750 addr
= bp
->rx_buffers_dma
;
751 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
752 bp
->rx_ring
[i
].addr
= addr
;
753 bp
->rx_ring
[i
].ctrl
= 0;
754 addr
+= RX_BUFFER_SIZE
;
756 bp
->rx_ring
[RX_RING_SIZE
- 1].addr
|= MACB_BIT(RX_WRAP
);
758 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
759 bp
->tx_ring
[i
].addr
= 0;
760 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
762 bp
->tx_ring
[TX_RING_SIZE
- 1].ctrl
|= MACB_BIT(TX_WRAP
);
764 bp
->rx_tail
= bp
->tx_head
= bp
->tx_tail
= 0;
767 static void macb_reset_hw(struct macb
*bp
)
769 /* Make sure we have the write buffer for ourselves */
773 * Disable RX and TX (XXX: Should we halt the transmission
776 macb_writel(bp
, NCR
, 0);
778 /* Clear the stats registers (XXX: Update stats first?) */
779 macb_writel(bp
, NCR
, MACB_BIT(CLRSTAT
));
781 /* Clear all status flags */
782 macb_writel(bp
, TSR
, ~0UL);
783 macb_writel(bp
, RSR
, ~0UL);
785 /* Disable all interrupts */
786 macb_writel(bp
, IDR
, ~0UL);
790 static void macb_init_hw(struct macb
*bp
)
795 __macb_set_hwaddr(bp
);
797 config
= macb_readl(bp
, NCFGR
) & MACB_BF(CLK
, -1L);
798 config
|= MACB_BIT(PAE
); /* PAuse Enable */
799 config
|= MACB_BIT(DRFCS
); /* Discard Rx FCS */
800 if (bp
->dev
->flags
& IFF_PROMISC
)
801 config
|= MACB_BIT(CAF
); /* Copy All Frames */
802 if (!(bp
->dev
->flags
& IFF_BROADCAST
))
803 config
|= MACB_BIT(NBC
); /* No BroadCast */
804 macb_writel(bp
, NCFGR
, config
);
806 /* Initialize TX and RX buffers */
807 macb_writel(bp
, RBQP
, bp
->rx_ring_dma
);
808 macb_writel(bp
, TBQP
, bp
->tx_ring_dma
);
810 /* Enable TX and RX */
811 macb_writel(bp
, NCR
, MACB_BIT(RE
) | MACB_BIT(TE
) | MACB_BIT(MPE
));
813 /* Enable interrupts */
814 macb_writel(bp
, IER
, (MACB_BIT(RCOMP
)
826 * The hash address register is 64 bits long and takes up two
827 * locations in the memory map. The least significant bits are stored
828 * in EMAC_HSL and the most significant bits in EMAC_HSH.
830 * The unicast hash enable and the multicast hash enable bits in the
831 * network configuration register enable the reception of hash matched
832 * frames. The destination address is reduced to a 6 bit index into
833 * the 64 bit hash register using the following hash function. The
834 * hash function is an exclusive or of every sixth bit of the
835 * destination address.
837 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
838 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
839 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
840 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
841 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
842 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
844 * da[0] represents the least significant bit of the first byte
845 * received, that is, the multicast/unicast indicator, and da[47]
846 * represents the most significant bit of the last byte received. If
847 * the hash index, hi[n], points to a bit that is set in the hash
848 * register then the frame will be matched according to whether the
849 * frame is multicast or unicast. A multicast match will be signalled
850 * if the multicast hash enable bit is set, da[0] is 1 and the hash
851 * index points to a bit set in the hash register. A unicast match
852 * will be signalled if the unicast hash enable bit is set, da[0] is 0
853 * and the hash index points to a bit set in the hash register. To
854 * receive all multicast frames, the hash register should be set with
855 * all ones and the multicast hash enable bit should be set in the
856 * network configuration register.
859 static inline int hash_bit_value(int bitnr
, __u8
*addr
)
861 if (addr
[bitnr
/ 8] & (1 << (bitnr
% 8)))
867 * Return the hash index value for the specified address.
869 static int hash_get_index(__u8
*addr
)
874 for (j
= 0; j
< 6; j
++) {
875 for (i
= 0, bitval
= 0; i
< 8; i
++)
876 bitval
^= hash_bit_value(i
*6 + j
, addr
);
878 hash_index
|= (bitval
<< j
);
885 * Add multicast addresses to the internal multicast-hash table.
887 static void macb_sethashtable(struct net_device
*dev
)
889 struct dev_mc_list
*curr
;
890 unsigned long mc_filter
[2];
891 unsigned int i
, bitnr
;
892 struct macb
*bp
= netdev_priv(dev
);
894 mc_filter
[0] = mc_filter
[1] = 0;
897 for (i
= 0; i
< dev
->mc_count
; i
++, curr
= curr
->next
) {
898 if (!curr
) break; /* unexpected end of list */
900 bitnr
= hash_get_index(curr
->dmi_addr
);
901 mc_filter
[bitnr
>> 5] |= 1 << (bitnr
& 31);
904 macb_writel(bp
, HRB
, mc_filter
[0]);
905 macb_writel(bp
, HRT
, mc_filter
[1]);
909 * Enable/Disable promiscuous and multicast modes.
911 static void macb_set_rx_mode(struct net_device
*dev
)
914 struct macb
*bp
= netdev_priv(dev
);
916 cfg
= macb_readl(bp
, NCFGR
);
918 if (dev
->flags
& IFF_PROMISC
)
919 /* Enable promiscuous mode */
920 cfg
|= MACB_BIT(CAF
);
921 else if (dev
->flags
& (~IFF_PROMISC
))
922 /* Disable promiscuous mode */
923 cfg
&= ~MACB_BIT(CAF
);
925 if (dev
->flags
& IFF_ALLMULTI
) {
926 /* Enable all multicast mode */
927 macb_writel(bp
, HRB
, -1);
928 macb_writel(bp
, HRT
, -1);
929 cfg
|= MACB_BIT(NCFGR_MTI
);
930 } else if (dev
->mc_count
> 0) {
931 /* Enable specific multicasts */
932 macb_sethashtable(dev
);
933 cfg
|= MACB_BIT(NCFGR_MTI
);
934 } else if (dev
->flags
& (~IFF_ALLMULTI
)) {
935 /* Disable all multicast mode */
936 macb_writel(bp
, HRB
, 0);
937 macb_writel(bp
, HRT
, 0);
938 cfg
&= ~MACB_BIT(NCFGR_MTI
);
941 macb_writel(bp
, NCFGR
, cfg
);
944 static int macb_open(struct net_device
*dev
)
946 struct macb
*bp
= netdev_priv(dev
);
949 dev_dbg(&bp
->pdev
->dev
, "open\n");
951 /* if the phy is not yet register, retry later*/
955 if (!is_valid_ether_addr(dev
->dev_addr
))
956 return -EADDRNOTAVAIL
;
958 err
= macb_alloc_consistent(bp
);
961 "%s: Unable to allocate DMA memory (error %d)\n",
966 napi_enable(&bp
->napi
);
971 /* schedule a link state check */
972 phy_start(bp
->phy_dev
);
974 netif_start_queue(dev
);
979 static int macb_close(struct net_device
*dev
)
981 struct macb
*bp
= netdev_priv(dev
);
984 netif_stop_queue(dev
);
985 napi_disable(&bp
->napi
);
988 phy_stop(bp
->phy_dev
);
990 spin_lock_irqsave(&bp
->lock
, flags
);
992 netif_carrier_off(dev
);
993 spin_unlock_irqrestore(&bp
->lock
, flags
);
995 macb_free_consistent(bp
);
1000 static struct net_device_stats
*macb_get_stats(struct net_device
*dev
)
1002 struct macb
*bp
= netdev_priv(dev
);
1003 struct net_device_stats
*nstat
= &bp
->stats
;
1004 struct macb_stats
*hwstat
= &bp
->hw_stats
;
1006 /* read stats from hardware */
1007 macb_update_stats(bp
);
1009 /* Convert HW stats into netdevice stats */
1010 nstat
->rx_errors
= (hwstat
->rx_fcs_errors
+
1011 hwstat
->rx_align_errors
+
1012 hwstat
->rx_resource_errors
+
1013 hwstat
->rx_overruns
+
1014 hwstat
->rx_oversize_pkts
+
1015 hwstat
->rx_jabbers
+
1016 hwstat
->rx_undersize_pkts
+
1017 hwstat
->sqe_test_errors
+
1018 hwstat
->rx_length_mismatch
);
1019 nstat
->tx_errors
= (hwstat
->tx_late_cols
+
1020 hwstat
->tx_excessive_cols
+
1021 hwstat
->tx_underruns
+
1022 hwstat
->tx_carrier_errors
);
1023 nstat
->collisions
= (hwstat
->tx_single_cols
+
1024 hwstat
->tx_multiple_cols
+
1025 hwstat
->tx_excessive_cols
);
1026 nstat
->rx_length_errors
= (hwstat
->rx_oversize_pkts
+
1027 hwstat
->rx_jabbers
+
1028 hwstat
->rx_undersize_pkts
+
1029 hwstat
->rx_length_mismatch
);
1030 nstat
->rx_over_errors
= hwstat
->rx_resource_errors
;
1031 nstat
->rx_crc_errors
= hwstat
->rx_fcs_errors
;
1032 nstat
->rx_frame_errors
= hwstat
->rx_align_errors
;
1033 nstat
->rx_fifo_errors
= hwstat
->rx_overruns
;
1034 /* XXX: What does "missed" mean? */
1035 nstat
->tx_aborted_errors
= hwstat
->tx_excessive_cols
;
1036 nstat
->tx_carrier_errors
= hwstat
->tx_carrier_errors
;
1037 nstat
->tx_fifo_errors
= hwstat
->tx_underruns
;
1038 /* Don't know about heartbeat or window errors... */
1043 static int macb_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1045 struct macb
*bp
= netdev_priv(dev
);
1046 struct phy_device
*phydev
= bp
->phy_dev
;
1051 return phy_ethtool_gset(phydev
, cmd
);
1054 static int macb_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1056 struct macb
*bp
= netdev_priv(dev
);
1057 struct phy_device
*phydev
= bp
->phy_dev
;
1062 return phy_ethtool_sset(phydev
, cmd
);
1065 static void macb_get_drvinfo(struct net_device
*dev
,
1066 struct ethtool_drvinfo
*info
)
1068 struct macb
*bp
= netdev_priv(dev
);
1070 strcpy(info
->driver
, bp
->pdev
->dev
.driver
->name
);
1071 strcpy(info
->version
, "$Revision: 1.14 $");
1072 strcpy(info
->bus_info
, bp
->pdev
->dev
.bus_id
);
1075 static struct ethtool_ops macb_ethtool_ops
= {
1076 .get_settings
= macb_get_settings
,
1077 .set_settings
= macb_set_settings
,
1078 .get_drvinfo
= macb_get_drvinfo
,
1079 .get_link
= ethtool_op_get_link
,
1082 static int macb_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1084 struct macb
*bp
= netdev_priv(dev
);
1085 struct phy_device
*phydev
= bp
->phy_dev
;
1087 if (!netif_running(dev
))
1093 return phy_mii_ioctl(phydev
, if_mii(rq
), cmd
);
1096 static int __init
macb_probe(struct platform_device
*pdev
)
1098 struct eth_platform_data
*pdata
;
1099 struct resource
*regs
;
1100 struct net_device
*dev
;
1102 struct phy_device
*phydev
;
1103 unsigned long pclk_hz
;
1107 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1109 dev_err(&pdev
->dev
, "no mmio resource defined\n");
1114 dev
= alloc_etherdev(sizeof(*bp
));
1116 dev_err(&pdev
->dev
, "etherdev alloc failed, aborting.\n");
1120 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1122 /* TODO: Actually, we have some interesting features... */
1125 bp
= netdev_priv(dev
);
1129 spin_lock_init(&bp
->lock
);
1131 #if defined(CONFIG_ARCH_AT91)
1132 bp
->pclk
= clk_get(&pdev
->dev
, "macb_clk");
1133 if (IS_ERR(bp
->pclk
)) {
1134 dev_err(&pdev
->dev
, "failed to get macb_clk\n");
1135 goto err_out_free_dev
;
1137 clk_enable(bp
->pclk
);
1139 bp
->pclk
= clk_get(&pdev
->dev
, "pclk");
1140 if (IS_ERR(bp
->pclk
)) {
1141 dev_err(&pdev
->dev
, "failed to get pclk\n");
1142 goto err_out_free_dev
;
1144 bp
->hclk
= clk_get(&pdev
->dev
, "hclk");
1145 if (IS_ERR(bp
->hclk
)) {
1146 dev_err(&pdev
->dev
, "failed to get hclk\n");
1147 goto err_out_put_pclk
;
1150 clk_enable(bp
->pclk
);
1151 clk_enable(bp
->hclk
);
1154 bp
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1156 dev_err(&pdev
->dev
, "failed to map registers, aborting.\n");
1158 goto err_out_disable_clocks
;
1161 dev
->irq
= platform_get_irq(pdev
, 0);
1162 err
= request_irq(dev
->irq
, macb_interrupt
, IRQF_SAMPLE_RANDOM
,
1166 "%s: Unable to request IRQ %d (error %d)\n",
1167 dev
->name
, dev
->irq
, err
);
1168 goto err_out_iounmap
;
1171 dev
->open
= macb_open
;
1172 dev
->stop
= macb_close
;
1173 dev
->hard_start_xmit
= macb_start_xmit
;
1174 dev
->get_stats
= macb_get_stats
;
1175 dev
->set_multicast_list
= macb_set_rx_mode
;
1176 dev
->do_ioctl
= macb_ioctl
;
1177 netif_napi_add(dev
, &bp
->napi
, macb_poll
, 64);
1178 dev
->ethtool_ops
= &macb_ethtool_ops
;
1180 dev
->base_addr
= regs
->start
;
1182 /* Set MII management clock divider */
1183 pclk_hz
= clk_get_rate(bp
->pclk
);
1184 if (pclk_hz
<= 20000000)
1185 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
1186 else if (pclk_hz
<= 40000000)
1187 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
1188 else if (pclk_hz
<= 80000000)
1189 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
1191 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
1192 macb_writel(bp
, NCFGR
, config
);
1194 macb_get_hwaddr(bp
);
1195 pdata
= pdev
->dev
.platform_data
;
1197 if (pdata
&& pdata
->is_rmii
)
1198 #if defined(CONFIG_ARCH_AT91)
1199 macb_writel(bp
, USRIO
, (MACB_BIT(RMII
) | MACB_BIT(CLKEN
)) );
1201 macb_writel(bp
, USRIO
, 0);
1204 #if defined(CONFIG_ARCH_AT91)
1205 macb_writel(bp
, USRIO
, MACB_BIT(CLKEN
));
1207 macb_writel(bp
, USRIO
, MACB_BIT(MII
));
1210 bp
->tx_pending
= DEF_TX_RING_PENDING
;
1212 err
= register_netdev(dev
);
1214 dev_err(&pdev
->dev
, "Cannot register net device, aborting.\n");
1215 goto err_out_free_irq
;
1218 if (macb_mii_init(bp
) != 0) {
1219 goto err_out_unregister_netdev
;
1222 platform_set_drvdata(pdev
, dev
);
1224 printk(KERN_INFO
"%s: Atmel MACB at 0x%08lx irq %d (%pM)\n",
1225 dev
->name
, dev
->base_addr
, dev
->irq
, dev
->dev_addr
);
1227 phydev
= bp
->phy_dev
;
1228 printk(KERN_INFO
"%s: attached PHY driver [%s] "
1229 "(mii_bus:phy_addr=%s, irq=%d)\n",
1230 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
1234 err_out_unregister_netdev
:
1235 unregister_netdev(dev
);
1237 free_irq(dev
->irq
, dev
);
1240 err_out_disable_clocks
:
1241 #ifndef CONFIG_ARCH_AT91
1242 clk_disable(bp
->hclk
);
1245 clk_disable(bp
->pclk
);
1246 #ifndef CONFIG_ARCH_AT91
1253 platform_set_drvdata(pdev
, NULL
);
1257 static int __exit
macb_remove(struct platform_device
*pdev
)
1259 struct net_device
*dev
;
1262 dev
= platform_get_drvdata(pdev
);
1265 bp
= netdev_priv(dev
);
1267 phy_disconnect(bp
->phy_dev
);
1268 mdiobus_unregister(bp
->mii_bus
);
1269 kfree(bp
->mii_bus
->irq
);
1270 mdiobus_free(bp
->mii_bus
);
1271 unregister_netdev(dev
);
1272 free_irq(dev
->irq
, dev
);
1274 #ifndef CONFIG_ARCH_AT91
1275 clk_disable(bp
->hclk
);
1278 clk_disable(bp
->pclk
);
1281 platform_set_drvdata(pdev
, NULL
);
1288 static int macb_suspend(struct platform_device
*pdev
, pm_message_t state
)
1290 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1291 struct macb
*bp
= netdev_priv(netdev
);
1293 netif_device_detach(netdev
);
1295 #ifndef CONFIG_ARCH_AT91
1296 clk_disable(bp
->hclk
);
1298 clk_disable(bp
->pclk
);
1303 static int macb_resume(struct platform_device
*pdev
)
1305 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1306 struct macb
*bp
= netdev_priv(netdev
);
1308 clk_enable(bp
->pclk
);
1309 #ifndef CONFIG_ARCH_AT91
1310 clk_enable(bp
->hclk
);
1313 netif_device_attach(netdev
);
1318 #define macb_suspend NULL
1319 #define macb_resume NULL
1322 static struct platform_driver macb_driver
= {
1323 .remove
= __exit_p(macb_remove
),
1324 .suspend
= macb_suspend
,
1325 .resume
= macb_resume
,
1328 .owner
= THIS_MODULE
,
1332 static int __init
macb_init(void)
1334 return platform_driver_probe(&macb_driver
, macb_probe
);
1337 static void __exit
macb_exit(void)
1339 platform_driver_unregister(&macb_driver
);
1342 module_init(macb_init
);
1343 module_exit(macb_exit
);
1345 MODULE_LICENSE("GPL");
1346 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1347 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1348 MODULE_ALIAS("platform:macb");