2 * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2006 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
53 /* Static function declarations */
54 static void eth_port_uc_addr_get(struct net_device
*dev
,
55 unsigned char *MacAddr
);
56 static void eth_port_set_multicast_list(struct net_device
*);
57 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
59 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
61 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
);
62 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
);
63 static int mv643xx_eth_open(struct net_device
*);
64 static int mv643xx_eth_stop(struct net_device
*);
65 static int mv643xx_eth_change_mtu(struct net_device
*, int);
66 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*);
67 static void eth_port_init_mac_tables(unsigned int eth_port_num
);
69 static int mv643xx_poll(struct net_device
*dev
, int *budget
);
71 static int ethernet_phy_get(unsigned int eth_port_num
);
72 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
73 static int ethernet_phy_detect(unsigned int eth_port_num
);
74 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
);
75 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
);
76 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
);
77 static const struct ethtool_ops mv643xx_ethtool_ops
;
79 static char mv643xx_driver_name
[] = "mv643xx_eth";
80 static char mv643xx_driver_version
[] = "1.0";
82 static void __iomem
*mv643xx_eth_shared_base
;
84 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
85 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock
);
87 static inline u32
mv_read(int offset
)
89 void __iomem
*reg_base
;
91 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
93 return readl(reg_base
+ offset
);
96 static inline void mv_write(int offset
, u32 data
)
98 void __iomem
*reg_base
;
100 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
101 writel(data
, reg_base
+ offset
);
105 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
107 * Input : pointer to ethernet interface network device structure
109 * Output : 0 upon success, -EINVAL upon failure
111 static int mv643xx_eth_change_mtu(struct net_device
*dev
, int new_mtu
)
113 if ((new_mtu
> 9500) || (new_mtu
< 64))
118 * Stop then re-open the interface. This will allocate RX skb's with
120 * There is a possible danger that the open will not successed, due
121 * to memory is full, which might fail the open function.
123 if (netif_running(dev
)) {
124 mv643xx_eth_stop(dev
);
125 if (mv643xx_eth_open(dev
))
127 "%s: Fatal error on opening device\n",
135 * mv643xx_eth_rx_refill_descs
137 * Fills / refills RX queue on a certain gigabit ethernet port
139 * Input : pointer to ethernet interface network device structure
142 static void mv643xx_eth_rx_refill_descs(struct net_device
*dev
)
144 struct mv643xx_private
*mp
= netdev_priv(dev
);
145 struct pkt_info pkt_info
;
149 while (mp
->rx_desc_count
< mp
->rx_ring_size
) {
150 skb
= dev_alloc_skb(ETH_RX_SKB_SIZE
+ ETH_DMA_ALIGN
);
154 unaligned
= (u32
)skb
->data
& (ETH_DMA_ALIGN
- 1);
156 skb_reserve(skb
, ETH_DMA_ALIGN
- unaligned
);
157 pkt_info
.cmd_sts
= ETH_RX_ENABLE_INTERRUPT
;
158 pkt_info
.byte_cnt
= ETH_RX_SKB_SIZE
;
159 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
,
160 ETH_RX_SKB_SIZE
, DMA_FROM_DEVICE
);
161 pkt_info
.return_info
= skb
;
162 if (eth_rx_return_buff(mp
, &pkt_info
) != ETH_OK
) {
164 "%s: Error allocating RX Ring\n", dev
->name
);
167 skb_reserve(skb
, ETH_HW_IP_ALIGN
);
170 * If RX ring is empty of SKB, set a timer to try allocating
171 * again at a later time.
173 if (mp
->rx_desc_count
== 0) {
174 printk(KERN_INFO
"%s: Rx ring is empty\n", dev
->name
);
175 mp
->timeout
.expires
= jiffies
+ (HZ
/ 10); /* 100 mSec */
176 add_timer(&mp
->timeout
);
181 * mv643xx_eth_rx_refill_descs_timer_wrapper
183 * Timer routine to wake up RX queue filling task. This function is
184 * used only in case the RX queue is empty, and all alloc_skb has
185 * failed (due to out of memory event).
187 * Input : pointer to ethernet interface network device structure
190 static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data
)
192 mv643xx_eth_rx_refill_descs((struct net_device
*)data
);
196 * mv643xx_eth_update_mac_address
198 * Update the MAC address of the port in the address table
200 * Input : pointer to ethernet interface network device structure
203 static void mv643xx_eth_update_mac_address(struct net_device
*dev
)
205 struct mv643xx_private
*mp
= netdev_priv(dev
);
206 unsigned int port_num
= mp
->port_num
;
208 eth_port_init_mac_tables(port_num
);
209 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
213 * mv643xx_eth_set_rx_mode
215 * Change from promiscuos to regular rx mode
217 * Input : pointer to ethernet interface network device structure
220 static void mv643xx_eth_set_rx_mode(struct net_device
*dev
)
222 struct mv643xx_private
*mp
= netdev_priv(dev
);
225 config_reg
= mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
));
226 if (dev
->flags
& IFF_PROMISC
)
227 config_reg
|= (u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
229 config_reg
&= ~(u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
230 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
), config_reg
);
232 eth_port_set_multicast_list(dev
);
236 * mv643xx_eth_set_mac_address
238 * Change the interface's mac address.
239 * No special hardware thing should be done because interface is always
240 * put in promiscuous mode.
242 * Input : pointer to ethernet interface network device structure and
243 * a pointer to the designated entry to be added to the cache.
244 * Output : zero upon success, negative upon failure
246 static int mv643xx_eth_set_mac_address(struct net_device
*dev
, void *addr
)
250 for (i
= 0; i
< 6; i
++)
251 /* +2 is for the offset of the HW addr type */
252 dev
->dev_addr
[i
] = ((unsigned char *)addr
)[i
+ 2];
253 mv643xx_eth_update_mac_address(dev
);
258 * mv643xx_eth_tx_timeout
260 * Called upon a timeout on transmitting a packet
262 * Input : pointer to ethernet interface network device structure.
265 static void mv643xx_eth_tx_timeout(struct net_device
*dev
)
267 struct mv643xx_private
*mp
= netdev_priv(dev
);
269 printk(KERN_INFO
"%s: TX timeout ", dev
->name
);
271 /* Do the reset outside of interrupt context */
272 schedule_work(&mp
->tx_timeout_task
);
276 * mv643xx_eth_tx_timeout_task
278 * Actual routine to reset the adapter when a timeout on Tx has occurred
280 static void mv643xx_eth_tx_timeout_task(struct net_device
*dev
)
282 struct mv643xx_private
*mp
= netdev_priv(dev
);
284 if (!netif_running(dev
))
287 netif_stop_queue(dev
);
289 eth_port_reset(mp
->port_num
);
292 if (mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
293 netif_wake_queue(dev
);
297 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
299 * If force is non-zero, frees uncompleted descriptors as well
301 int mv643xx_eth_free_tx_descs(struct net_device
*dev
, int force
)
303 struct mv643xx_private
*mp
= netdev_priv(dev
);
304 struct eth_tx_desc
*desc
;
313 while (mp
->tx_desc_count
> 0) {
314 spin_lock_irqsave(&mp
->lock
, flags
);
315 tx_index
= mp
->tx_used_desc_q
;
316 desc
= &mp
->p_tx_desc_area
[tx_index
];
317 cmd_sts
= desc
->cmd_sts
;
319 if (!force
&& (cmd_sts
& ETH_BUFFER_OWNED_BY_DMA
)) {
320 spin_unlock_irqrestore(&mp
->lock
, flags
);
324 mp
->tx_used_desc_q
= (tx_index
+ 1) % mp
->tx_ring_size
;
327 addr
= desc
->buf_ptr
;
328 count
= desc
->byte_cnt
;
329 skb
= mp
->tx_skb
[tx_index
];
331 mp
->tx_skb
[tx_index
] = NULL
;
333 spin_unlock_irqrestore(&mp
->lock
, flags
);
335 if (cmd_sts
& ETH_ERROR_SUMMARY
) {
336 printk("%s: Error in TX\n", dev
->name
);
337 mp
->stats
.tx_errors
++;
340 if (cmd_sts
& ETH_TX_FIRST_DESC
)
341 dma_unmap_single(NULL
, addr
, count
, DMA_TO_DEVICE
);
343 dma_unmap_page(NULL
, addr
, count
, DMA_TO_DEVICE
);
346 dev_kfree_skb_irq(skb
);
354 static void mv643xx_eth_free_completed_tx_descs(struct net_device
*dev
)
356 struct mv643xx_private
*mp
= netdev_priv(dev
);
358 if (mv643xx_eth_free_tx_descs(dev
, 0) &&
359 mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
360 netif_wake_queue(dev
);
363 static void mv643xx_eth_free_all_tx_descs(struct net_device
*dev
)
365 mv643xx_eth_free_tx_descs(dev
, 1);
369 * mv643xx_eth_receive
371 * This function is forward packets that are received from the port's
372 * queues toward kernel core or FastRoute them to another interface.
374 * Input : dev - a pointer to the required interface
375 * max - maximum number to receive (0 means unlimted)
377 * Output : number of served packets
379 static int mv643xx_eth_receive_queue(struct net_device
*dev
, int budget
)
381 struct mv643xx_private
*mp
= netdev_priv(dev
);
382 struct net_device_stats
*stats
= &mp
->stats
;
383 unsigned int received_packets
= 0;
385 struct pkt_info pkt_info
;
387 while (budget
-- > 0 && eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
388 dma_unmap_single(NULL
, pkt_info
.buf_ptr
, ETH_RX_SKB_SIZE
,
395 * Note byte count includes 4 byte CRC count
398 stats
->rx_bytes
+= pkt_info
.byte_cnt
;
399 skb
= pkt_info
.return_info
;
401 * In case received a packet without first / last bits on OR
402 * the error summary bit is on, the packets needs to be dropeed.
404 if (((pkt_info
.cmd_sts
405 & (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) !=
406 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
))
407 || (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)) {
409 if ((pkt_info
.cmd_sts
& (ETH_RX_FIRST_DESC
|
410 ETH_RX_LAST_DESC
)) !=
411 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) {
414 "%s: Received packet spread "
415 "on multiple descriptors\n",
418 if (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)
421 dev_kfree_skb_irq(skb
);
424 * The -4 is for the CRC in the trailer of the
427 skb_put(skb
, pkt_info
.byte_cnt
- 4);
430 if (pkt_info
.cmd_sts
& ETH_LAYER_4_CHECKSUM_OK
) {
431 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
433 (pkt_info
.cmd_sts
& 0x0007fff8) >> 3);
435 skb
->protocol
= eth_type_trans(skb
, dev
);
437 netif_receive_skb(skb
);
442 dev
->last_rx
= jiffies
;
444 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
446 return received_packets
;
449 /* Set the mv643xx port configuration register for the speed/duplex mode. */
450 static void mv643xx_eth_update_pscr(struct net_device
*dev
,
451 struct ethtool_cmd
*ecmd
)
453 struct mv643xx_private
*mp
= netdev_priv(dev
);
454 int port_num
= mp
->port_num
;
458 o_pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
461 /* clear speed, duplex and rx buffer size fields */
462 n_pscr
&= ~(MV643XX_ETH_SET_MII_SPEED_TO_100
|
463 MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
464 MV643XX_ETH_SET_FULL_DUPLEX_MODE
|
465 MV643XX_ETH_MAX_RX_PACKET_MASK
);
467 if (ecmd
->duplex
== DUPLEX_FULL
)
468 n_pscr
|= MV643XX_ETH_SET_FULL_DUPLEX_MODE
;
470 if (ecmd
->speed
== SPEED_1000
)
471 n_pscr
|= MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
472 MV643XX_ETH_MAX_RX_PACKET_9700BYTE
;
474 if (ecmd
->speed
== SPEED_100
)
475 n_pscr
|= MV643XX_ETH_SET_MII_SPEED_TO_100
;
476 n_pscr
|= MV643XX_ETH_MAX_RX_PACKET_1522BYTE
;
479 if (n_pscr
!= o_pscr
) {
480 if ((o_pscr
& MV643XX_ETH_SERIAL_PORT_ENABLE
) == 0)
481 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
484 queues
= mv643xx_eth_port_disable_tx(port_num
);
486 o_pscr
&= ~MV643XX_ETH_SERIAL_PORT_ENABLE
;
487 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
489 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
491 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
494 mv643xx_eth_port_enable_tx(port_num
, queues
);
500 * mv643xx_eth_int_handler
502 * Main interrupt handler for the gigbit ethernet ports
504 * Input : irq - irq number (not used)
505 * dev_id - a pointer to the required interface's data structure
510 static irqreturn_t
mv643xx_eth_int_handler(int irq
, void *dev_id
)
512 struct net_device
*dev
= (struct net_device
*)dev_id
;
513 struct mv643xx_private
*mp
= netdev_priv(dev
);
514 u32 eth_int_cause
, eth_int_cause_ext
= 0;
515 unsigned int port_num
= mp
->port_num
;
517 /* Read interrupt cause registers */
518 eth_int_cause
= mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
)) &
520 if (eth_int_cause
& ETH_INT_CAUSE_EXT
) {
521 eth_int_cause_ext
= mv_read(
522 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
)) &
523 ETH_INT_UNMASK_ALL_EXT
;
524 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
),
528 /* PHY status changed */
529 if (eth_int_cause_ext
& ETH_INT_CAUSE_PHY
) {
530 struct ethtool_cmd cmd
;
532 if (mii_link_ok(&mp
->mii
)) {
533 mii_ethtool_gset(&mp
->mii
, &cmd
);
534 mv643xx_eth_update_pscr(dev
, &cmd
);
535 mv643xx_eth_port_enable_tx(port_num
,
536 ETH_TX_QUEUES_ENABLED
);
537 if (!netif_carrier_ok(dev
)) {
538 netif_carrier_on(dev
);
539 if (mp
->tx_ring_size
- mp
->tx_desc_count
>=
541 netif_wake_queue(dev
);
543 } else if (netif_carrier_ok(dev
)) {
544 netif_stop_queue(dev
);
545 netif_carrier_off(dev
);
550 if (eth_int_cause
& ETH_INT_CAUSE_RX
) {
551 /* schedule the NAPI poll routine to maintain port */
552 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
554 /* wait for previous write to complete */
555 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
557 netif_rx_schedule(dev
);
560 if (eth_int_cause
& ETH_INT_CAUSE_RX
)
561 mv643xx_eth_receive_queue(dev
, INT_MAX
);
563 if (eth_int_cause_ext
& ETH_INT_CAUSE_TX
)
564 mv643xx_eth_free_completed_tx_descs(dev
);
567 * If no real interrupt occured, exit.
568 * This can happen when using gigE interrupt coalescing mechanism.
570 if ((eth_int_cause
== 0x0) && (eth_int_cause_ext
== 0x0))
579 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
582 * This routine sets the RX coalescing interrupt mechanism parameter.
583 * This parameter is a timeout counter, that counts in 64 t_clk
584 * chunks ; that when timeout event occurs a maskable interrupt
586 * The parameter is calculated using the tClk of the MV-643xx chip
587 * , and the required delay of the interrupt in usec.
590 * unsigned int eth_port_num Ethernet port number
591 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
592 * unsigned int delay Delay in usec
595 * Interrupt coalescing mechanism value is set in MV-643xx chip.
598 * The interrupt coalescing value set in the gigE port.
601 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num
,
602 unsigned int t_clk
, unsigned int delay
)
604 unsigned int coal
= ((t_clk
/ 1000000) * delay
) / 64;
606 /* Set RX Coalescing mechanism */
607 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
),
608 ((coal
& 0x3fff) << 8) |
609 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
))
617 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
620 * This routine sets the TX coalescing interrupt mechanism parameter.
621 * This parameter is a timeout counter, that counts in 64 t_clk
622 * chunks ; that when timeout event occurs a maskable interrupt
624 * The parameter is calculated using the t_cLK frequency of the
625 * MV-643xx chip and the required delay in the interrupt in uSec
628 * unsigned int eth_port_num Ethernet port number
629 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
630 * unsigned int delay Delay in uSeconds
633 * Interrupt coalescing mechanism value is set in MV-643xx chip.
636 * The interrupt coalescing value set in the gigE port.
639 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num
,
640 unsigned int t_clk
, unsigned int delay
)
643 coal
= ((t_clk
/ 1000000) * delay
) / 64;
644 /* Set TX Coalescing mechanism */
645 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num
),
651 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
654 * This function prepares a Rx chained list of descriptors and packet
655 * buffers in a form of a ring. The routine must be called after port
656 * initialization routine and before port start routine.
657 * The Ethernet SDMA engine uses CPU bus addresses to access the various
658 * devices in the system (i.e. DRAM). This function uses the ethernet
659 * struct 'virtual to physical' routine (set by the user) to set the ring
660 * with physical addresses.
663 * struct mv643xx_private *mp Ethernet Port Control srtuct.
666 * The routine updates the Ethernet port control struct with information
667 * regarding the Rx descriptors and buffers.
672 static void ether_init_rx_desc_ring(struct mv643xx_private
*mp
)
674 volatile struct eth_rx_desc
*p_rx_desc
;
675 int rx_desc_num
= mp
->rx_ring_size
;
678 /* initialize the next_desc_ptr links in the Rx descriptors ring */
679 p_rx_desc
= (struct eth_rx_desc
*)mp
->p_rx_desc_area
;
680 for (i
= 0; i
< rx_desc_num
; i
++) {
681 p_rx_desc
[i
].next_desc_ptr
= mp
->rx_desc_dma
+
682 ((i
+ 1) % rx_desc_num
) * sizeof(struct eth_rx_desc
);
685 /* Save Rx desc pointer to driver struct. */
686 mp
->rx_curr_desc_q
= 0;
687 mp
->rx_used_desc_q
= 0;
689 mp
->rx_desc_area_size
= rx_desc_num
* sizeof(struct eth_rx_desc
);
693 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
696 * This function prepares a Tx chained list of descriptors and packet
697 * buffers in a form of a ring. The routine must be called after port
698 * initialization routine and before port start routine.
699 * The Ethernet SDMA engine uses CPU bus addresses to access the various
700 * devices in the system (i.e. DRAM). This function uses the ethernet
701 * struct 'virtual to physical' routine (set by the user) to set the ring
702 * with physical addresses.
705 * struct mv643xx_private *mp Ethernet Port Control srtuct.
708 * The routine updates the Ethernet port control struct with information
709 * regarding the Tx descriptors and buffers.
714 static void ether_init_tx_desc_ring(struct mv643xx_private
*mp
)
716 int tx_desc_num
= mp
->tx_ring_size
;
717 struct eth_tx_desc
*p_tx_desc
;
720 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
721 p_tx_desc
= (struct eth_tx_desc
*)mp
->p_tx_desc_area
;
722 for (i
= 0; i
< tx_desc_num
; i
++) {
723 p_tx_desc
[i
].next_desc_ptr
= mp
->tx_desc_dma
+
724 ((i
+ 1) % tx_desc_num
) * sizeof(struct eth_tx_desc
);
727 mp
->tx_curr_desc_q
= 0;
728 mp
->tx_used_desc_q
= 0;
730 mp
->tx_desc_area_size
= tx_desc_num
* sizeof(struct eth_tx_desc
);
733 static int mv643xx_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
735 struct mv643xx_private
*mp
= netdev_priv(dev
);
738 spin_lock_irq(&mp
->lock
);
739 err
= mii_ethtool_sset(&mp
->mii
, cmd
);
740 spin_unlock_irq(&mp
->lock
);
745 static int mv643xx_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
747 struct mv643xx_private
*mp
= netdev_priv(dev
);
750 spin_lock_irq(&mp
->lock
);
751 err
= mii_ethtool_gset(&mp
->mii
, cmd
);
752 spin_unlock_irq(&mp
->lock
);
754 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
755 cmd
->supported
&= ~SUPPORTED_1000baseT_Half
;
756 cmd
->advertising
&= ~ADVERTISED_1000baseT_Half
;
764 * This function is called when openning the network device. The function
765 * should initialize all the hardware, initialize cyclic Rx/Tx
766 * descriptors chain and buffers and allocate an IRQ to the network
769 * Input : a pointer to the network device structure
771 * Output : zero of success , nonzero if fails.
774 static int mv643xx_eth_open(struct net_device
*dev
)
776 struct mv643xx_private
*mp
= netdev_priv(dev
);
777 unsigned int port_num
= mp
->port_num
;
781 err
= request_irq(dev
->irq
, mv643xx_eth_int_handler
,
782 IRQF_SHARED
| IRQF_SAMPLE_RANDOM
, dev
->name
, dev
);
784 printk(KERN_ERR
"Can not assign IRQ number to MV643XX_eth%d\n",
791 memset(&mp
->timeout
, 0, sizeof(struct timer_list
));
792 mp
->timeout
.function
= mv643xx_eth_rx_refill_descs_timer_wrapper
;
793 mp
->timeout
.data
= (unsigned long)dev
;
795 /* Allocate RX and TX skb rings */
796 mp
->rx_skb
= kmalloc(sizeof(*mp
->rx_skb
) * mp
->rx_ring_size
,
799 printk(KERN_ERR
"%s: Cannot allocate Rx skb ring\n", dev
->name
);
803 mp
->tx_skb
= kmalloc(sizeof(*mp
->tx_skb
) * mp
->tx_ring_size
,
806 printk(KERN_ERR
"%s: Cannot allocate Tx skb ring\n", dev
->name
);
808 goto out_free_rx_skb
;
811 /* Allocate TX ring */
812 mp
->tx_desc_count
= 0;
813 size
= mp
->tx_ring_size
* sizeof(struct eth_tx_desc
);
814 mp
->tx_desc_area_size
= size
;
816 if (mp
->tx_sram_size
) {
817 mp
->p_tx_desc_area
= ioremap(mp
->tx_sram_addr
,
819 mp
->tx_desc_dma
= mp
->tx_sram_addr
;
821 mp
->p_tx_desc_area
= dma_alloc_coherent(NULL
, size
,
825 if (!mp
->p_tx_desc_area
) {
826 printk(KERN_ERR
"%s: Cannot allocate Tx Ring (size %d bytes)\n",
829 goto out_free_tx_skb
;
831 BUG_ON((u32
) mp
->p_tx_desc_area
& 0xf); /* check 16-byte alignment */
832 memset((void *)mp
->p_tx_desc_area
, 0, mp
->tx_desc_area_size
);
834 ether_init_tx_desc_ring(mp
);
836 /* Allocate RX ring */
837 mp
->rx_desc_count
= 0;
838 size
= mp
->rx_ring_size
* sizeof(struct eth_rx_desc
);
839 mp
->rx_desc_area_size
= size
;
841 if (mp
->rx_sram_size
) {
842 mp
->p_rx_desc_area
= ioremap(mp
->rx_sram_addr
,
844 mp
->rx_desc_dma
= mp
->rx_sram_addr
;
846 mp
->p_rx_desc_area
= dma_alloc_coherent(NULL
, size
,
850 if (!mp
->p_rx_desc_area
) {
851 printk(KERN_ERR
"%s: Cannot allocate Rx ring (size %d bytes)\n",
853 printk(KERN_ERR
"%s: Freeing previously allocated TX queues...",
855 if (mp
->rx_sram_size
)
856 iounmap(mp
->p_tx_desc_area
);
858 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
859 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
861 goto out_free_tx_skb
;
863 memset((void *)mp
->p_rx_desc_area
, 0, size
);
865 ether_init_rx_desc_ring(mp
);
867 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
869 /* Clear any pending ethernet port interrupts */
870 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
871 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
875 /* Interrupt Coalescing */
879 eth_port_set_rx_coal(port_num
, 133000000, MV643XX_RX_COAL
);
883 eth_port_set_tx_coal(port_num
, 133000000, MV643XX_TX_COAL
);
885 /* Unmask phy and link status changes interrupts */
886 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
887 ETH_INT_UNMASK_ALL_EXT
);
889 /* Unmask RX buffer and TX end interrupt */
890 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
899 free_irq(dev
->irq
, dev
);
904 static void mv643xx_eth_free_tx_rings(struct net_device
*dev
)
906 struct mv643xx_private
*mp
= netdev_priv(dev
);
909 mv643xx_eth_port_disable_tx(mp
->port_num
);
911 /* Free outstanding skb's on TX ring */
912 mv643xx_eth_free_all_tx_descs(dev
);
914 BUG_ON(mp
->tx_used_desc_q
!= mp
->tx_curr_desc_q
);
917 if (mp
->tx_sram_size
)
918 iounmap(mp
->p_tx_desc_area
);
920 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
921 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
924 static void mv643xx_eth_free_rx_rings(struct net_device
*dev
)
926 struct mv643xx_private
*mp
= netdev_priv(dev
);
927 unsigned int port_num
= mp
->port_num
;
931 mv643xx_eth_port_disable_rx(port_num
);
933 /* Free preallocated skb's on RX rings */
934 for (curr
= 0; mp
->rx_desc_count
&& curr
< mp
->rx_ring_size
; curr
++) {
935 if (mp
->rx_skb
[curr
]) {
936 dev_kfree_skb(mp
->rx_skb
[curr
]);
941 if (mp
->rx_desc_count
)
943 "%s: Error in freeing Rx Ring. %d skb's still"
944 " stuck in RX Ring - ignoring them\n", dev
->name
,
947 if (mp
->rx_sram_size
)
948 iounmap(mp
->p_rx_desc_area
);
950 dma_free_coherent(NULL
, mp
->rx_desc_area_size
,
951 mp
->p_rx_desc_area
, mp
->rx_desc_dma
);
957 * This function is used when closing the network device.
958 * It updates the hardware,
959 * release all memory that holds buffers and descriptors and release the IRQ.
960 * Input : a pointer to the device structure
961 * Output : zero if success , nonzero if fails
964 static int mv643xx_eth_stop(struct net_device
*dev
)
966 struct mv643xx_private
*mp
= netdev_priv(dev
);
967 unsigned int port_num
= mp
->port_num
;
969 /* Mask all interrupts on ethernet port */
970 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
971 /* wait for previous write to complete */
972 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
975 netif_poll_disable(dev
);
977 netif_carrier_off(dev
);
978 netif_stop_queue(dev
);
980 eth_port_reset(mp
->port_num
);
982 mv643xx_eth_free_tx_rings(dev
);
983 mv643xx_eth_free_rx_rings(dev
);
986 netif_poll_enable(dev
);
989 free_irq(dev
->irq
, dev
);
998 * This function is used in case of NAPI
1000 static int mv643xx_poll(struct net_device
*dev
, int *budget
)
1002 struct mv643xx_private
*mp
= netdev_priv(dev
);
1003 int done
= 1, orig_budget
, work_done
;
1004 unsigned int port_num
= mp
->port_num
;
1006 #ifdef MV643XX_TX_FAST_REFILL
1007 if (++mp
->tx_clean_threshold
> 5) {
1008 mv643xx_eth_free_completed_tx_descs(dev
);
1009 mp
->tx_clean_threshold
= 0;
1013 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
)))
1014 != (u32
) mp
->rx_used_desc_q
) {
1015 orig_budget
= *budget
;
1016 if (orig_budget
> dev
->quota
)
1017 orig_budget
= dev
->quota
;
1018 work_done
= mv643xx_eth_receive_queue(dev
, orig_budget
);
1019 *budget
-= work_done
;
1020 dev
->quota
-= work_done
;
1021 if (work_done
>= orig_budget
)
1026 netif_rx_complete(dev
);
1027 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
1028 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
1029 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1030 ETH_INT_UNMASK_ALL
);
1033 return done
? 0 : 1;
1038 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
1040 * Hardware can't handle unaligned fragments smaller than 9 bytes.
1041 * This helper function detects that case.
1044 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff
*skb
)
1049 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1050 fragp
= &skb_shinfo(skb
)->frags
[frag
];
1051 if (fragp
->size
<= 8 && fragp
->page_offset
& 0x7)
1058 * eth_alloc_tx_desc_index - return the index of the next available tx desc
1060 static int eth_alloc_tx_desc_index(struct mv643xx_private
*mp
)
1064 BUG_ON(mp
->tx_desc_count
>= mp
->tx_ring_size
);
1066 tx_desc_curr
= mp
->tx_curr_desc_q
;
1067 mp
->tx_curr_desc_q
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
1069 BUG_ON(mp
->tx_curr_desc_q
== mp
->tx_used_desc_q
);
1071 return tx_desc_curr
;
1075 * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
1077 * Ensure the data for each fragment to be transmitted is mapped properly,
1078 * then fill in descriptors in the tx hw queue.
1080 static void eth_tx_fill_frag_descs(struct mv643xx_private
*mp
,
1081 struct sk_buff
*skb
)
1085 struct eth_tx_desc
*desc
;
1087 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1088 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
1090 tx_index
= eth_alloc_tx_desc_index(mp
);
1091 desc
= &mp
->p_tx_desc_area
[tx_index
];
1093 desc
->cmd_sts
= ETH_BUFFER_OWNED_BY_DMA
;
1094 /* Last Frag enables interrupt and frees the skb */
1095 if (frag
== (skb_shinfo(skb
)->nr_frags
- 1)) {
1096 desc
->cmd_sts
|= ETH_ZERO_PADDING
|
1098 ETH_TX_ENABLE_INTERRUPT
;
1099 mp
->tx_skb
[tx_index
] = skb
;
1101 mp
->tx_skb
[tx_index
] = 0;
1103 desc
= &mp
->p_tx_desc_area
[tx_index
];
1105 desc
->byte_cnt
= this_frag
->size
;
1106 desc
->buf_ptr
= dma_map_page(NULL
, this_frag
->page
,
1107 this_frag
->page_offset
,
1114 * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw
1116 * Ensure the data for an skb to be transmitted is mapped properly,
1117 * then fill in descriptors in the tx hw queue and start the hardware.
1119 static void eth_tx_submit_descs_for_skb(struct mv643xx_private
*mp
,
1120 struct sk_buff
*skb
)
1123 struct eth_tx_desc
*desc
;
1126 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
1128 cmd_sts
= ETH_TX_FIRST_DESC
| ETH_GEN_CRC
| ETH_BUFFER_OWNED_BY_DMA
;
1130 tx_index
= eth_alloc_tx_desc_index(mp
);
1131 desc
= &mp
->p_tx_desc_area
[tx_index
];
1134 eth_tx_fill_frag_descs(mp
, skb
);
1136 length
= skb_headlen(skb
);
1137 mp
->tx_skb
[tx_index
] = 0;
1139 cmd_sts
|= ETH_ZERO_PADDING
|
1141 ETH_TX_ENABLE_INTERRUPT
;
1143 mp
->tx_skb
[tx_index
] = skb
;
1146 desc
->byte_cnt
= length
;
1147 desc
->buf_ptr
= dma_map_single(NULL
, skb
->data
, length
, DMA_TO_DEVICE
);
1149 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1150 BUG_ON(skb
->protocol
!= ETH_P_IP
);
1152 cmd_sts
|= ETH_GEN_TCP_UDP_CHECKSUM
|
1153 ETH_GEN_IP_V_4_CHECKSUM
|
1154 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1156 switch (skb
->nh
.iph
->protocol
) {
1158 cmd_sts
|= ETH_UDP_FRAME
;
1159 desc
->l4i_chk
= skb
->h
.uh
->check
;
1162 desc
->l4i_chk
= skb
->h
.th
->check
;
1168 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1169 cmd_sts
|= 5 << ETH_TX_IHL_SHIFT
;
1173 /* ensure all other descriptors are written before first cmd_sts */
1175 desc
->cmd_sts
= cmd_sts
;
1177 /* ensure all descriptors are written before poking hardware */
1179 mv643xx_eth_port_enable_tx(mp
->port_num
, ETH_TX_QUEUES_ENABLED
);
1181 mp
->tx_desc_count
+= nr_frags
+ 1;
1185 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
1188 static int mv643xx_eth_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1190 struct mv643xx_private
*mp
= netdev_priv(dev
);
1191 struct net_device_stats
*stats
= &mp
->stats
;
1192 unsigned long flags
;
1194 BUG_ON(netif_queue_stopped(dev
));
1195 BUG_ON(skb
== NULL
);
1197 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
) {
1198 printk(KERN_ERR
"%s: transmit with queue full\n", dev
->name
);
1199 netif_stop_queue(dev
);
1203 if (has_tiny_unaligned_frags(skb
)) {
1204 if (__skb_linearize(skb
)) {
1205 stats
->tx_dropped
++;
1206 printk(KERN_DEBUG
"%s: failed to linearize tiny "
1207 "unaligned fragment\n", dev
->name
);
1212 spin_lock_irqsave(&mp
->lock
, flags
);
1214 eth_tx_submit_descs_for_skb(mp
, skb
);
1215 stats
->tx_bytes
= skb
->len
;
1216 stats
->tx_packets
++;
1217 dev
->trans_start
= jiffies
;
1219 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
)
1220 netif_stop_queue(dev
);
1222 spin_unlock_irqrestore(&mp
->lock
, flags
);
1224 return 0; /* success */
1228 * mv643xx_eth_get_stats
1230 * Returns a pointer to the interface statistics.
1232 * Input : dev - a pointer to the required interface
1234 * Output : a pointer to the interface's statistics
1237 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*dev
)
1239 struct mv643xx_private
*mp
= netdev_priv(dev
);
1244 #ifdef CONFIG_NET_POLL_CONTROLLER
1245 static void mv643xx_netpoll(struct net_device
*netdev
)
1247 struct mv643xx_private
*mp
= netdev_priv(netdev
);
1248 int port_num
= mp
->port_num
;
1250 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
1251 /* wait for previous write to complete */
1252 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
1254 mv643xx_eth_int_handler(netdev
->irq
, netdev
);
1256 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
1260 static void mv643xx_init_ethtool_cmd(struct net_device
*dev
, int phy_address
,
1261 int speed
, int duplex
,
1262 struct ethtool_cmd
*cmd
)
1264 struct mv643xx_private
*mp
= netdev_priv(dev
);
1266 memset(cmd
, 0, sizeof(*cmd
));
1268 cmd
->port
= PORT_MII
;
1269 cmd
->transceiver
= XCVR_INTERNAL
;
1270 cmd
->phy_address
= phy_address
;
1273 cmd
->autoneg
= AUTONEG_ENABLE
;
1274 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1275 cmd
->speed
= SPEED_100
;
1276 cmd
->advertising
= ADVERTISED_10baseT_Half
|
1277 ADVERTISED_10baseT_Full
|
1278 ADVERTISED_100baseT_Half
|
1279 ADVERTISED_100baseT_Full
;
1280 if (mp
->mii
.supports_gmii
)
1281 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
1283 cmd
->autoneg
= AUTONEG_DISABLE
;
1285 cmd
->duplex
= duplex
;
1292 * First function called after registering the network device.
1293 * It's purpose is to initialize the device as an ethernet device,
1294 * fill the ethernet device structure with pointers * to functions,
1295 * and set the MAC address of the interface
1297 * Input : struct device *
1298 * Output : -ENOMEM if failed , 0 if success
1300 static int mv643xx_eth_probe(struct platform_device
*pdev
)
1302 struct mv643xx_eth_platform_data
*pd
;
1303 int port_num
= pdev
->id
;
1304 struct mv643xx_private
*mp
;
1305 struct net_device
*dev
;
1307 struct resource
*res
;
1309 struct ethtool_cmd cmd
;
1310 int duplex
= DUPLEX_HALF
;
1311 int speed
= 0; /* default to auto-negotiation */
1313 dev
= alloc_etherdev(sizeof(struct mv643xx_private
));
1317 platform_set_drvdata(pdev
, dev
);
1319 mp
= netdev_priv(dev
);
1321 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1323 dev
->irq
= res
->start
;
1325 mp
->port_num
= port_num
;
1327 dev
->open
= mv643xx_eth_open
;
1328 dev
->stop
= mv643xx_eth_stop
;
1329 dev
->hard_start_xmit
= mv643xx_eth_start_xmit
;
1330 dev
->get_stats
= mv643xx_eth_get_stats
;
1331 dev
->set_mac_address
= mv643xx_eth_set_mac_address
;
1332 dev
->set_multicast_list
= mv643xx_eth_set_rx_mode
;
1334 /* No need to Tx Timeout */
1335 dev
->tx_timeout
= mv643xx_eth_tx_timeout
;
1337 dev
->poll
= mv643xx_poll
;
1341 #ifdef CONFIG_NET_POLL_CONTROLLER
1342 dev
->poll_controller
= mv643xx_netpoll
;
1345 dev
->watchdog_timeo
= 2 * HZ
;
1346 dev
->tx_queue_len
= mp
->tx_ring_size
;
1348 dev
->change_mtu
= mv643xx_eth_change_mtu
;
1349 dev
->do_ioctl
= mv643xx_eth_do_ioctl
;
1350 SET_ETHTOOL_OPS(dev
, &mv643xx_ethtool_ops
);
1352 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1353 #ifdef MAX_SKB_FRAGS
1355 * Zero copy can only work if we use Discovery II memory. Else, we will
1356 * have to map the buffers to ISA memory which is only 16 MB
1358 dev
->features
= NETIF_F_SG
| NETIF_F_IP_CSUM
;
1362 /* Configure the timeout task */
1363 INIT_WORK(&mp
->tx_timeout_task
,
1364 (void (*)(void *))mv643xx_eth_tx_timeout_task
, dev
);
1366 spin_lock_init(&mp
->lock
);
1368 /* set default config values */
1369 eth_port_uc_addr_get(dev
, dev
->dev_addr
);
1370 mp
->rx_ring_size
= MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE
;
1371 mp
->tx_ring_size
= MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE
;
1373 pd
= pdev
->dev
.platform_data
;
1376 memcpy(dev
->dev_addr
, pd
->mac_addr
, 6);
1378 if (pd
->phy_addr
|| pd
->force_phy_addr
)
1379 ethernet_phy_set(port_num
, pd
->phy_addr
);
1381 if (pd
->rx_queue_size
)
1382 mp
->rx_ring_size
= pd
->rx_queue_size
;
1384 if (pd
->tx_queue_size
)
1385 mp
->tx_ring_size
= pd
->tx_queue_size
;
1387 if (pd
->tx_sram_size
) {
1388 mp
->tx_sram_size
= pd
->tx_sram_size
;
1389 mp
->tx_sram_addr
= pd
->tx_sram_addr
;
1392 if (pd
->rx_sram_size
) {
1393 mp
->rx_sram_size
= pd
->rx_sram_size
;
1394 mp
->rx_sram_addr
= pd
->rx_sram_addr
;
1397 duplex
= pd
->duplex
;
1401 /* Hook up MII support for ethtool */
1403 mp
->mii
.mdio_read
= mv643xx_mdio_read
;
1404 mp
->mii
.mdio_write
= mv643xx_mdio_write
;
1405 mp
->mii
.phy_id
= ethernet_phy_get(port_num
);
1406 mp
->mii
.phy_id_mask
= 0x3f;
1407 mp
->mii
.reg_num_mask
= 0x1f;
1409 err
= ethernet_phy_detect(port_num
);
1411 pr_debug("MV643xx ethernet port %d: "
1412 "No PHY detected at addr %d\n",
1413 port_num
, ethernet_phy_get(port_num
));
1417 ethernet_phy_reset(port_num
);
1418 mp
->mii
.supports_gmii
= mii_check_gmii_support(&mp
->mii
);
1419 mv643xx_init_ethtool_cmd(dev
, mp
->mii
.phy_id
, speed
, duplex
, &cmd
);
1420 mv643xx_eth_update_pscr(dev
, &cmd
);
1421 mv643xx_set_settings(dev
, &cmd
);
1423 SET_MODULE_OWNER(dev
);
1424 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1425 err
= register_netdev(dev
);
1431 "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
1432 dev
->name
, port_num
, p
[0], p
[1], p
[2], p
[3], p
[4], p
[5]);
1434 if (dev
->features
& NETIF_F_SG
)
1435 printk(KERN_NOTICE
"%s: Scatter Gather Enabled\n", dev
->name
);
1437 if (dev
->features
& NETIF_F_IP_CSUM
)
1438 printk(KERN_NOTICE
"%s: TX TCP/IP Checksumming Supported\n",
1441 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1442 printk(KERN_NOTICE
"%s: RX TCP/UDP Checksum Offload ON \n", dev
->name
);
1446 printk(KERN_NOTICE
"%s: TX and RX Interrupt Coalescing ON \n",
1451 printk(KERN_NOTICE
"%s: RX NAPI Enabled \n", dev
->name
);
1454 if (mp
->tx_sram_size
> 0)
1455 printk(KERN_NOTICE
"%s: Using SRAM\n", dev
->name
);
1465 static int mv643xx_eth_remove(struct platform_device
*pdev
)
1467 struct net_device
*dev
= platform_get_drvdata(pdev
);
1469 unregister_netdev(dev
);
1470 flush_scheduled_work();
1473 platform_set_drvdata(pdev
, NULL
);
1477 static int mv643xx_eth_shared_probe(struct platform_device
*pdev
)
1479 struct resource
*res
;
1481 printk(KERN_NOTICE
"MV-643xx 10/100/1000 Ethernet Driver\n");
1483 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1487 mv643xx_eth_shared_base
= ioremap(res
->start
,
1488 MV643XX_ETH_SHARED_REGS_SIZE
);
1489 if (mv643xx_eth_shared_base
== NULL
)
1496 static int mv643xx_eth_shared_remove(struct platform_device
*pdev
)
1498 iounmap(mv643xx_eth_shared_base
);
1499 mv643xx_eth_shared_base
= NULL
;
1504 static struct platform_driver mv643xx_eth_driver
= {
1505 .probe
= mv643xx_eth_probe
,
1506 .remove
= mv643xx_eth_remove
,
1508 .name
= MV643XX_ETH_NAME
,
1512 static struct platform_driver mv643xx_eth_shared_driver
= {
1513 .probe
= mv643xx_eth_shared_probe
,
1514 .remove
= mv643xx_eth_shared_remove
,
1516 .name
= MV643XX_ETH_SHARED_NAME
,
1521 * mv643xx_init_module
1523 * Registers the network drivers into the Linux kernel
1529 static int __init
mv643xx_init_module(void)
1533 rc
= platform_driver_register(&mv643xx_eth_shared_driver
);
1535 rc
= platform_driver_register(&mv643xx_eth_driver
);
1537 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1543 * mv643xx_cleanup_module
1545 * Registers the network drivers into the Linux kernel
1551 static void __exit
mv643xx_cleanup_module(void)
1553 platform_driver_unregister(&mv643xx_eth_driver
);
1554 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1557 module_init(mv643xx_init_module
);
1558 module_exit(mv643xx_cleanup_module
);
1560 MODULE_LICENSE("GPL");
1561 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1562 " and Dale Farnsworth");
1563 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1566 * The second part is the low level driver of the gigE ethernet ports.
1570 * Marvell's Gigabit Ethernet controller low level driver
1573 * This file introduce low level API to Marvell's Gigabit Ethernet
1574 * controller. This Gigabit Ethernet Controller driver API controls
1575 * 1) Operations (i.e. port init, start, reset etc').
1576 * 2) Data flow (i.e. port send, receive etc').
1577 * Each Gigabit Ethernet port is controlled via
1578 * struct mv643xx_private.
1579 * This struct includes user configuration information as well as
1580 * driver internal data needed for its operations.
1582 * Supported Features:
1583 * - This low level driver is OS independent. Allocating memory for
1584 * the descriptor rings and buffers are not within the scope of
1586 * - The user is free from Rx/Tx queue managing.
1587 * - This low level driver introduce functionality API that enable
1588 * the to operate Marvell's Gigabit Ethernet Controller in a
1590 * - Simple Gigabit Ethernet port operation API.
1591 * - Simple Gigabit Ethernet port data flow API.
1592 * - Data flow and operation API support per queue functionality.
1593 * - Support cached descriptors for better performance.
1594 * - Enable access to all four DRAM banks and internal SRAM memory
1596 * - PHY access and control API.
1597 * - Port control register configuration API.
1598 * - Full control over Unicast and Multicast MAC configurations.
1602 * Initialization phase
1603 * This phase complete the initialization of the the
1604 * mv643xx_private struct.
1605 * User information regarding port configuration has to be set
1606 * prior to calling the port initialization routine.
1608 * In this phase any port Tx/Rx activity is halted, MIB counters
1609 * are cleared, PHY address is set according to user parameter and
1610 * access to DRAM and internal SRAM memory spaces.
1612 * Driver ring initialization
1613 * Allocating memory for the descriptor rings and buffers is not
1614 * within the scope of this driver. Thus, the user is required to
1615 * allocate memory for the descriptors ring and buffers. Those
1616 * memory parameters are used by the Rx and Tx ring initialization
1617 * routines in order to curve the descriptor linked list in a form
1619 * Note: Pay special attention to alignment issues when using
1620 * cached descriptors/buffers. In this phase the driver store
1621 * information in the mv643xx_private struct regarding each queue
1625 * This phase prepares the Ethernet port for Rx and Tx activity.
1626 * It uses the information stored in the mv643xx_private struct to
1627 * initialize the various port registers.
1630 * All packet references to/from the driver are done using
1632 * This struct is a unified struct used with Rx and Tx operations.
1633 * This way the user is not required to be familiar with neither
1634 * Tx nor Rx descriptors structures.
1635 * The driver's descriptors rings are management by indexes.
1636 * Those indexes controls the ring resources and used to indicate
1637 * a SW resource error:
1639 * This index points to the current available resource for use. For
1640 * example in Rx process this index will point to the descriptor
1641 * that will be passed to the user upon calling the receive
1642 * routine. In Tx process, this index will point to the descriptor
1643 * that will be assigned with the user packet info and transmitted.
1645 * This index points to the descriptor that need to restore its
1646 * resources. For example in Rx process, using the Rx buffer return
1647 * API will attach the buffer returned in packet info to the
1648 * descriptor pointed by 'used'. In Tx process, using the Tx
1649 * descriptor return will merely return the user packet info with
1650 * the command status of the transmitted buffer pointed by the
1651 * 'used' index. Nevertheless, it is essential to use this routine
1652 * to update the 'used' index.
1654 * This index supports Tx Scatter-Gather. It points to the first
1655 * descriptor of a packet assembled of multiple buffers. For
1656 * example when in middle of Such packet we have a Tx resource
1657 * error the 'curr' index get the value of 'first' to indicate
1658 * that the ring returned to its state before trying to transmit
1661 * Receive operation:
1662 * The eth_port_receive API set the packet information struct,
1663 * passed by the caller, with received information from the
1664 * 'current' SDMA descriptor.
1665 * It is the user responsibility to return this resource back
1666 * to the Rx descriptor ring to enable the reuse of this source.
1667 * Return Rx resource is done using the eth_rx_return_buff API.
1669 * Prior to calling the initialization routine eth_port_init() the user
1670 * must set the following fields under mv643xx_private struct:
1671 * port_num User Ethernet port number.
1672 * port_config User port configuration value.
1673 * port_config_extend User port config extend value.
1674 * port_sdma_config User port SDMA config value.
1675 * port_serial_control User port serial control value.
1677 * This driver data flow is done using the struct pkt_info which
1678 * is a unified struct for Rx and Tx operations:
1680 * byte_cnt Tx/Rx descriptor buffer byte count.
1681 * l4i_chk CPU provided TCP Checksum. For Tx operation
1683 * cmd_sts Tx/Rx descriptor command status.
1684 * buf_ptr Tx/Rx descriptor buffer pointer.
1685 * return_info Tx/Rx user resource return information.
1689 static int ethernet_phy_get(unsigned int eth_port_num
);
1690 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
1692 /* Ethernet Port routines */
1693 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
);
1696 * eth_port_init - Initialize the Ethernet port driver
1699 * This function prepares the ethernet port to start its activity:
1700 * 1) Completes the ethernet port driver struct initialization toward port
1702 * 2) Resets the device to a quiescent state in case of warm reboot.
1703 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1704 * 4) Clean MAC tables. The reset status of those tables is unknown.
1705 * 5) Set PHY address.
1706 * Note: Call this routine prior to eth_port_start routine and after
1707 * setting user values in the user fields of Ethernet port control
1711 * struct mv643xx_private *mp Ethernet port control struct
1719 static void eth_port_init(struct mv643xx_private
*mp
)
1721 mp
->rx_resource_err
= 0;
1723 eth_port_reset(mp
->port_num
);
1725 eth_port_init_mac_tables(mp
->port_num
);
1729 * eth_port_start - Start the Ethernet port activity.
1732 * This routine prepares the Ethernet port for Rx and Tx activity:
1733 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1734 * has been initialized a descriptor's ring (using
1735 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1736 * 2. Initialize and enable the Ethernet configuration port by writing to
1737 * the port's configuration and command registers.
1738 * 3. Initialize and enable the SDMA by writing to the SDMA's
1739 * configuration and command registers. After completing these steps,
1740 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1742 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1743 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1744 * and ether_init_rx_desc_ring for Rx queues).
1747 * dev - a pointer to the required interface
1750 * Ethernet port is ready to receive and transmit.
1755 static void eth_port_start(struct net_device
*dev
)
1757 struct mv643xx_private
*mp
= netdev_priv(dev
);
1758 unsigned int port_num
= mp
->port_num
;
1759 int tx_curr_desc
, rx_curr_desc
;
1761 struct ethtool_cmd ethtool_cmd
;
1763 /* Assignment of Tx CTRP of given queue */
1764 tx_curr_desc
= mp
->tx_curr_desc_q
;
1765 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1766 (u32
)((struct eth_tx_desc
*)mp
->tx_desc_dma
+ tx_curr_desc
));
1768 /* Assignment of Rx CRDP of given queue */
1769 rx_curr_desc
= mp
->rx_curr_desc_q
;
1770 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1771 (u32
)((struct eth_rx_desc
*)mp
->rx_desc_dma
+ rx_curr_desc
));
1773 /* Add the assigned Ethernet address to the port's address table */
1774 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
1776 /* Assign port configuration and command. */
1777 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num
),
1778 MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE
);
1780 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num
),
1781 MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE
);
1783 pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
1785 pscr
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
| MV643XX_ETH_FORCE_LINK_PASS
);
1786 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1788 pscr
|= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL
|
1789 MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII
|
1790 MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX
|
1791 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
1792 MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED
;
1794 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1796 pscr
|= MV643XX_ETH_SERIAL_PORT_ENABLE
;
1797 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1799 /* Assign port SDMA configuration */
1800 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num
),
1801 MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE
);
1803 /* Enable port Rx. */
1804 mv643xx_eth_port_enable_rx(port_num
, ETH_RX_QUEUES_ENABLED
);
1806 /* Disable port bandwidth limits by clearing MTU register */
1807 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num
), 0);
1809 /* save phy settings across reset */
1810 mv643xx_get_settings(dev
, ðtool_cmd
);
1811 ethernet_phy_reset(mp
->port_num
);
1812 mv643xx_set_settings(dev
, ðtool_cmd
);
1816 * eth_port_uc_addr_set - This function Set the port Unicast address.
1819 * This function Set the port Ethernet MAC address.
1822 * unsigned int eth_port_num Port number.
1823 * char * p_addr Address to be set
1826 * Set MAC address low and high registers. also calls
1827 * eth_port_set_filter_table_entry() to set the unicast
1828 * table with the proper information.
1834 static void eth_port_uc_addr_set(unsigned int eth_port_num
,
1835 unsigned char *p_addr
)
1841 mac_l
= (p_addr
[4] << 8) | (p_addr
[5]);
1842 mac_h
= (p_addr
[0] << 24) | (p_addr
[1] << 16) | (p_addr
[2] << 8) |
1845 mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num
), mac_l
);
1846 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num
), mac_h
);
1848 /* Accept frames of this address */
1849 table
= MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num
);
1850 eth_port_set_filter_table_entry(table
, p_addr
[5] & 0x0f);
1854 * eth_port_uc_addr_get - This function retrieves the port Unicast address
1855 * (MAC address) from the ethernet hw registers.
1858 * This function retrieves the port Ethernet MAC address.
1861 * unsigned int eth_port_num Port number.
1862 * char *MacAddr pointer where the MAC address is stored
1865 * Copy the MAC address to the location pointed to by MacAddr
1871 static void eth_port_uc_addr_get(struct net_device
*dev
, unsigned char *p_addr
)
1873 struct mv643xx_private
*mp
= netdev_priv(dev
);
1877 mac_h
= mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp
->port_num
));
1878 mac_l
= mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp
->port_num
));
1880 p_addr
[0] = (mac_h
>> 24) & 0xff;
1881 p_addr
[1] = (mac_h
>> 16) & 0xff;
1882 p_addr
[2] = (mac_h
>> 8) & 0xff;
1883 p_addr
[3] = mac_h
& 0xff;
1884 p_addr
[4] = (mac_l
>> 8) & 0xff;
1885 p_addr
[5] = mac_l
& 0xff;
1889 * The entries in each table are indexed by a hash of a packet's MAC
1890 * address. One bit in each entry determines whether the packet is
1891 * accepted. There are 4 entries (each 8 bits wide) in each register
1892 * of the table. The bits in each entry are defined as follows:
1893 * 0 Accept=1, Drop=0
1894 * 3-1 Queue (ETH_Q0=0)
1897 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
)
1899 unsigned int table_reg
;
1900 unsigned int tbl_offset
;
1901 unsigned int reg_offset
;
1903 tbl_offset
= (entry
/ 4) * 4; /* Register offset of DA table entry */
1904 reg_offset
= entry
% 4; /* Entry offset within the register */
1906 /* Set "accepts frame bit" at specified table entry */
1907 table_reg
= mv_read(table
+ tbl_offset
);
1908 table_reg
|= 0x01 << (8 * reg_offset
);
1909 mv_write(table
+ tbl_offset
, table_reg
);
1913 * eth_port_mc_addr - Multicast address settings.
1915 * The MV device supports multicast using two tables:
1916 * 1) Special Multicast Table for MAC addresses of the form
1917 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1918 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1919 * Table entries in the DA-Filter table.
1920 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1921 * is used as an index to the Other Multicast Table entries in the
1922 * DA-Filter table. This function calculates the CRC-8bit value.
1923 * In either case, eth_port_set_filter_table_entry() is then called
1924 * to set to set the actual table entry.
1926 static void eth_port_mc_addr(unsigned int eth_port_num
, unsigned char *p_addr
)
1930 unsigned char crc_result
= 0;
1936 if ((p_addr
[0] == 0x01) && (p_addr
[1] == 0x00) &&
1937 (p_addr
[2] == 0x5E) && (p_addr
[3] == 0x00) && (p_addr
[4] == 0x00)) {
1938 table
= MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
1940 eth_port_set_filter_table_entry(table
, p_addr
[5]);
1944 /* Calculate CRC-8 out of the given address */
1945 mac_h
= (p_addr
[0] << 8) | (p_addr
[1]);
1946 mac_l
= (p_addr
[2] << 24) | (p_addr
[3] << 16) |
1947 (p_addr
[4] << 8) | (p_addr
[5] << 0);
1949 for (i
= 0; i
< 32; i
++)
1950 mac_array
[i
] = (mac_l
>> i
) & 0x1;
1951 for (i
= 32; i
< 48; i
++)
1952 mac_array
[i
] = (mac_h
>> (i
- 32)) & 0x1;
1954 crc
[0] = mac_array
[45] ^ mac_array
[43] ^ mac_array
[40] ^ mac_array
[39] ^
1955 mac_array
[35] ^ mac_array
[34] ^ mac_array
[31] ^ mac_array
[30] ^
1956 mac_array
[28] ^ mac_array
[23] ^ mac_array
[21] ^ mac_array
[19] ^
1957 mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^ mac_array
[12] ^
1958 mac_array
[8] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[0];
1960 crc
[1] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
1961 mac_array
[41] ^ mac_array
[39] ^ mac_array
[36] ^ mac_array
[34] ^
1962 mac_array
[32] ^ mac_array
[30] ^ mac_array
[29] ^ mac_array
[28] ^
1963 mac_array
[24] ^ mac_array
[23] ^ mac_array
[22] ^ mac_array
[21] ^
1964 mac_array
[20] ^ mac_array
[18] ^ mac_array
[17] ^ mac_array
[16] ^
1965 mac_array
[15] ^ mac_array
[14] ^ mac_array
[13] ^ mac_array
[12] ^
1966 mac_array
[9] ^ mac_array
[6] ^ mac_array
[1] ^ mac_array
[0];
1968 crc
[2] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[44] ^ mac_array
[43] ^
1969 mac_array
[42] ^ mac_array
[39] ^ mac_array
[37] ^ mac_array
[34] ^
1970 mac_array
[33] ^ mac_array
[29] ^ mac_array
[28] ^ mac_array
[25] ^
1971 mac_array
[24] ^ mac_array
[22] ^ mac_array
[17] ^ mac_array
[15] ^
1972 mac_array
[13] ^ mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^
1973 mac_array
[6] ^ mac_array
[2] ^ mac_array
[1] ^ mac_array
[0];
1975 crc
[3] = mac_array
[47] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
1976 mac_array
[40] ^ mac_array
[38] ^ mac_array
[35] ^ mac_array
[34] ^
1977 mac_array
[30] ^ mac_array
[29] ^ mac_array
[26] ^ mac_array
[25] ^
1978 mac_array
[23] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^
1979 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[7] ^
1980 mac_array
[3] ^ mac_array
[2] ^ mac_array
[1];
1982 crc
[4] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[41] ^
1983 mac_array
[39] ^ mac_array
[36] ^ mac_array
[35] ^ mac_array
[31] ^
1984 mac_array
[30] ^ mac_array
[27] ^ mac_array
[26] ^ mac_array
[24] ^
1985 mac_array
[19] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[14] ^
1986 mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^ mac_array
[4] ^
1987 mac_array
[3] ^ mac_array
[2];
1989 crc
[5] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[45] ^ mac_array
[42] ^
1990 mac_array
[40] ^ mac_array
[37] ^ mac_array
[36] ^ mac_array
[32] ^
1991 mac_array
[31] ^ mac_array
[28] ^ mac_array
[27] ^ mac_array
[25] ^
1992 mac_array
[20] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[15] ^
1993 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[5] ^
1994 mac_array
[4] ^ mac_array
[3];
1996 crc
[6] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[43] ^ mac_array
[41] ^
1997 mac_array
[38] ^ mac_array
[37] ^ mac_array
[33] ^ mac_array
[32] ^
1998 mac_array
[29] ^ mac_array
[28] ^ mac_array
[26] ^ mac_array
[21] ^
1999 mac_array
[19] ^ mac_array
[17] ^ mac_array
[16] ^ mac_array
[14] ^
2000 mac_array
[12] ^ mac_array
[10] ^ mac_array
[6] ^ mac_array
[5] ^
2003 crc
[7] = mac_array
[47] ^ mac_array
[44] ^ mac_array
[42] ^ mac_array
[39] ^
2004 mac_array
[38] ^ mac_array
[34] ^ mac_array
[33] ^ mac_array
[30] ^
2005 mac_array
[29] ^ mac_array
[27] ^ mac_array
[22] ^ mac_array
[20] ^
2006 mac_array
[18] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[13] ^
2007 mac_array
[11] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[5];
2009 for (i
= 0; i
< 8; i
++)
2010 crc_result
= crc_result
| (crc
[i
] << i
);
2012 table
= MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
);
2013 eth_port_set_filter_table_entry(table
, crc_result
);
2017 * Set the entire multicast list based on dev->mc_list.
2019 static void eth_port_set_multicast_list(struct net_device
*dev
)
2022 struct dev_mc_list
*mc_list
;
2025 struct mv643xx_private
*mp
= netdev_priv(dev
);
2026 unsigned int eth_port_num
= mp
->port_num
;
2028 /* If the device is in promiscuous mode or in all multicast mode,
2029 * we will fully populate both multicast tables with accept.
2030 * This is guaranteed to yield a match on all multicast addresses...
2032 if ((dev
->flags
& IFF_PROMISC
) || (dev
->flags
& IFF_ALLMULTI
)) {
2033 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2034 /* Set all entries in DA filter special multicast
2036 * Set for ETH_Q0 for now
2038 * 0 Accept=1, Drop=0
2039 * 3-1 Queue ETH_Q0=0
2042 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2044 /* Set all entries in DA filter other multicast
2046 * Set for ETH_Q0 for now
2048 * 0 Accept=1, Drop=0
2049 * 3-1 Queue ETH_Q0=0
2052 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2057 /* We will clear out multicast tables every time we get the list.
2058 * Then add the entire new list...
2060 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2061 /* Clear DA filter special multicast table (Ex_dFSMT) */
2062 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2063 (eth_port_num
) + table_index
, 0);
2065 /* Clear DA filter other multicast table (Ex_dFOMT) */
2066 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2067 (eth_port_num
) + table_index
, 0);
2070 /* Get pointer to net_device multicast list and add each one... */
2071 for (i
= 0, mc_list
= dev
->mc_list
;
2072 (i
< 256) && (mc_list
!= NULL
) && (i
< dev
->mc_count
);
2073 i
++, mc_list
= mc_list
->next
)
2074 if (mc_list
->dmi_addrlen
== 6)
2075 eth_port_mc_addr(eth_port_num
, mc_list
->dmi_addr
);
2079 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2082 * Go through all the DA filter tables (Unicast, Special Multicast &
2083 * Other Multicast) and set each entry to 0.
2086 * unsigned int eth_port_num Ethernet Port number.
2089 * Multicast and Unicast packets are rejected.
2094 static void eth_port_init_mac_tables(unsigned int eth_port_num
)
2098 /* Clear DA filter unicast table (Ex_dFUT) */
2099 for (table_index
= 0; table_index
<= 0xC; table_index
+= 4)
2100 mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2101 (eth_port_num
) + table_index
, 0);
2103 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2104 /* Clear DA filter special multicast table (Ex_dFSMT) */
2105 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2106 (eth_port_num
) + table_index
, 0);
2107 /* Clear DA filter other multicast table (Ex_dFOMT) */
2108 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2109 (eth_port_num
) + table_index
, 0);
2114 * eth_clear_mib_counters - Clear all MIB counters
2117 * This function clears all MIB counters of a specific ethernet port.
2118 * A read from the MIB counter will reset the counter.
2121 * unsigned int eth_port_num Ethernet Port number.
2124 * After reading all MIB counters, the counters resets.
2127 * MIB counter value.
2130 static void eth_clear_mib_counters(unsigned int eth_port_num
)
2134 /* Perform dummy reads from MIB counters */
2135 for (i
= ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
; i
< ETH_MIB_LATE_COLLISION
;
2137 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num
) + i
);
2140 static inline u32
read_mib(struct mv643xx_private
*mp
, int offset
)
2142 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp
->port_num
) + offset
);
2145 static void eth_update_mib_counters(struct mv643xx_private
*mp
)
2147 struct mv643xx_mib_counters
*p
= &mp
->mib_counters
;
2150 p
->good_octets_received
+=
2151 read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
);
2152 p
->good_octets_received
+=
2153 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
) << 32;
2155 for (offset
= ETH_MIB_BAD_OCTETS_RECEIVED
;
2156 offset
<= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS
;
2158 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2160 p
->good_octets_sent
+= read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_LOW
);
2161 p
->good_octets_sent
+=
2162 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_HIGH
) << 32;
2164 for (offset
= ETH_MIB_GOOD_FRAMES_SENT
;
2165 offset
<= ETH_MIB_LATE_COLLISION
;
2167 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2171 * ethernet_phy_detect - Detect whether a phy is present
2174 * This function tests whether there is a PHY present on
2175 * the specified port.
2178 * unsigned int eth_port_num Ethernet Port number.
2185 * -ENODEV on failure
2188 static int ethernet_phy_detect(unsigned int port_num
)
2190 unsigned int phy_reg_data0
;
2193 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2194 auto_neg
= phy_reg_data0
& 0x1000;
2195 phy_reg_data0
^= 0x1000; /* invert auto_neg */
2196 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2198 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2199 if ((phy_reg_data0
& 0x1000) == auto_neg
)
2200 return -ENODEV
; /* change didn't take */
2202 phy_reg_data0
^= 0x1000;
2203 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2208 * ethernet_phy_get - Get the ethernet port PHY address.
2211 * This routine returns the given ethernet port PHY address.
2214 * unsigned int eth_port_num Ethernet Port number.
2223 static int ethernet_phy_get(unsigned int eth_port_num
)
2225 unsigned int reg_data
;
2227 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2229 return ((reg_data
>> (5 * eth_port_num
)) & 0x1f);
2233 * ethernet_phy_set - Set the ethernet port PHY address.
2236 * This routine sets the given ethernet port PHY address.
2239 * unsigned int eth_port_num Ethernet Port number.
2240 * int phy_addr PHY address.
2249 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
)
2252 int addr_shift
= 5 * eth_port_num
;
2254 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2255 reg_data
&= ~(0x1f << addr_shift
);
2256 reg_data
|= (phy_addr
& 0x1f) << addr_shift
;
2257 mv_write(MV643XX_ETH_PHY_ADDR_REG
, reg_data
);
2261 * ethernet_phy_reset - Reset Ethernet port PHY.
2264 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2267 * unsigned int eth_port_num Ethernet Port number.
2276 static void ethernet_phy_reset(unsigned int eth_port_num
)
2278 unsigned int phy_reg_data
;
2281 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2282 phy_reg_data
|= 0x8000; /* Set bit 15 to reset the PHY */
2283 eth_port_write_smi_reg(eth_port_num
, 0, phy_reg_data
);
2285 /* wait for PHY to come out of reset */
2288 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2289 } while (phy_reg_data
& 0x8000);
2292 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
2293 unsigned int queues
)
2295 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
), queues
);
2298 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
2299 unsigned int queues
)
2301 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
), queues
);
2304 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
)
2308 /* Stop Tx port activity. Check port Tx activity. */
2309 queues
= mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2312 /* Issue stop command for active queues only */
2313 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
),
2316 /* Wait for all Tx activity to terminate. */
2317 /* Check port cause register that all Tx queues are stopped */
2318 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2320 udelay(PHY_WAIT_MICRO_SECONDS
);
2322 /* Wait for Tx FIFO to empty */
2323 while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num
)) &
2324 ETH_PORT_TX_FIFO_EMPTY
)
2325 udelay(PHY_WAIT_MICRO_SECONDS
);
2331 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
)
2335 /* Stop Rx port activity. Check port Rx activity. */
2336 queues
= mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2339 /* Issue stop command for active queues only */
2340 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
),
2343 /* Wait for all Rx activity to terminate. */
2344 /* Check port cause register that all Rx queues are stopped */
2345 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2347 udelay(PHY_WAIT_MICRO_SECONDS
);
2354 * eth_port_reset - Reset Ethernet port
2357 * This routine resets the chip by aborting any SDMA engine activity and
2358 * clearing the MIB counters. The Receiver and the Transmit unit are in
2359 * idle state after this command is performed and the port is disabled.
2362 * unsigned int eth_port_num Ethernet Port number.
2365 * Channel activity is halted.
2371 static void eth_port_reset(unsigned int port_num
)
2373 unsigned int reg_data
;
2375 mv643xx_eth_port_disable_tx(port_num
);
2376 mv643xx_eth_port_disable_rx(port_num
);
2378 /* Clear all MIB counters */
2379 eth_clear_mib_counters(port_num
);
2381 /* Reset the Enable bit in the Configuration Register */
2382 reg_data
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
2383 reg_data
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
|
2384 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
2385 MV643XX_ETH_FORCE_LINK_PASS
);
2386 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), reg_data
);
2391 * eth_port_read_smi_reg - Read PHY registers
2394 * This routine utilize the SMI interface to interact with the PHY in
2395 * order to perform PHY register read.
2398 * unsigned int port_num Ethernet Port number.
2399 * unsigned int phy_reg PHY register address offset.
2400 * unsigned int *value Register value buffer.
2403 * Write the value of a specified PHY register into given buffer.
2406 * false if the PHY is busy or read data is not in valid state.
2410 static void eth_port_read_smi_reg(unsigned int port_num
,
2411 unsigned int phy_reg
, unsigned int *value
)
2413 int phy_addr
= ethernet_phy_get(port_num
);
2414 unsigned long flags
;
2417 /* the SMI register is a shared resource */
2418 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2420 /* wait for the SMI register to become available */
2421 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2422 if (i
== PHY_WAIT_ITERATIONS
) {
2423 printk("mv643xx PHY busy timeout, port %d\n", port_num
);
2426 udelay(PHY_WAIT_MICRO_SECONDS
);
2429 mv_write(MV643XX_ETH_SMI_REG
,
2430 (phy_addr
<< 16) | (phy_reg
<< 21) | ETH_SMI_OPCODE_READ
);
2432 /* now wait for the data to be valid */
2433 for (i
= 0; !(mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_READ_VALID
); i
++) {
2434 if (i
== PHY_WAIT_ITERATIONS
) {
2435 printk("mv643xx PHY read timeout, port %d\n", port_num
);
2438 udelay(PHY_WAIT_MICRO_SECONDS
);
2441 *value
= mv_read(MV643XX_ETH_SMI_REG
) & 0xffff;
2443 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2447 * eth_port_write_smi_reg - Write to PHY registers
2450 * This routine utilize the SMI interface to interact with the PHY in
2451 * order to perform writes to PHY registers.
2454 * unsigned int eth_port_num Ethernet Port number.
2455 * unsigned int phy_reg PHY register address offset.
2456 * unsigned int value Register value.
2459 * Write the given value to the specified PHY register.
2462 * false if the PHY is busy.
2466 static void eth_port_write_smi_reg(unsigned int eth_port_num
,
2467 unsigned int phy_reg
, unsigned int value
)
2471 unsigned long flags
;
2473 phy_addr
= ethernet_phy_get(eth_port_num
);
2475 /* the SMI register is a shared resource */
2476 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2478 /* wait for the SMI register to become available */
2479 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2480 if (i
== PHY_WAIT_ITERATIONS
) {
2481 printk("mv643xx PHY busy timeout, port %d\n",
2485 udelay(PHY_WAIT_MICRO_SECONDS
);
2488 mv_write(MV643XX_ETH_SMI_REG
, (phy_addr
<< 16) | (phy_reg
<< 21) |
2489 ETH_SMI_OPCODE_WRITE
| (value
& 0xffff));
2491 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2495 * Wrappers for MII support library.
2497 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
)
2500 struct mv643xx_private
*mp
= netdev_priv(dev
);
2502 eth_port_read_smi_reg(mp
->port_num
, location
, &val
);
2506 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
)
2508 struct mv643xx_private
*mp
= netdev_priv(dev
);
2509 eth_port_write_smi_reg(mp
->port_num
, location
, val
);
2513 * eth_port_receive - Get received information from Rx ring.
2516 * This routine returns the received data to the caller. There is no
2517 * data copying during routine operation. All information is returned
2518 * using pointer to packet information struct passed from the caller.
2519 * If the routine exhausts Rx ring resources then the resource error flag
2523 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2524 * struct pkt_info *p_pkt_info User packet buffer.
2527 * Rx ring current and used indexes are updated.
2530 * ETH_ERROR in case the routine can not access Rx desc ring.
2531 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2532 * ETH_END_OF_JOB if there is no received data.
2535 static ETH_FUNC_RET_STATUS
eth_port_receive(struct mv643xx_private
*mp
,
2536 struct pkt_info
*p_pkt_info
)
2538 int rx_next_curr_desc
, rx_curr_desc
, rx_used_desc
;
2539 volatile struct eth_rx_desc
*p_rx_desc
;
2540 unsigned int command_status
;
2541 unsigned long flags
;
2543 /* Do not process Rx ring in case of Rx ring resource error */
2544 if (mp
->rx_resource_err
)
2545 return ETH_QUEUE_FULL
;
2547 spin_lock_irqsave(&mp
->lock
, flags
);
2549 /* Get the Rx Desc ring 'curr and 'used' indexes */
2550 rx_curr_desc
= mp
->rx_curr_desc_q
;
2551 rx_used_desc
= mp
->rx_used_desc_q
;
2553 p_rx_desc
= &mp
->p_rx_desc_area
[rx_curr_desc
];
2555 /* The following parameters are used to save readings from memory */
2556 command_status
= p_rx_desc
->cmd_sts
;
2559 /* Nothing to receive... */
2560 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
)) {
2561 spin_unlock_irqrestore(&mp
->lock
, flags
);
2562 return ETH_END_OF_JOB
;
2565 p_pkt_info
->byte_cnt
= (p_rx_desc
->byte_cnt
) - RX_BUF_OFFSET
;
2566 p_pkt_info
->cmd_sts
= command_status
;
2567 p_pkt_info
->buf_ptr
= (p_rx_desc
->buf_ptr
) + RX_BUF_OFFSET
;
2568 p_pkt_info
->return_info
= mp
->rx_skb
[rx_curr_desc
];
2569 p_pkt_info
->l4i_chk
= p_rx_desc
->buf_size
;
2572 * Clean the return info field to indicate that the
2573 * packet has been moved to the upper layers
2575 mp
->rx_skb
[rx_curr_desc
] = NULL
;
2577 /* Update current index in data structure */
2578 rx_next_curr_desc
= (rx_curr_desc
+ 1) % mp
->rx_ring_size
;
2579 mp
->rx_curr_desc_q
= rx_next_curr_desc
;
2581 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2582 if (rx_next_curr_desc
== rx_used_desc
)
2583 mp
->rx_resource_err
= 1;
2585 spin_unlock_irqrestore(&mp
->lock
, flags
);
2591 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2594 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2595 * next 'used' descriptor and attached the returned buffer to it.
2596 * In case the Rx ring was in "resource error" condition, where there are
2597 * no available Rx resources, the function resets the resource error flag.
2600 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2601 * struct pkt_info *p_pkt_info Information on returned buffer.
2604 * New available Rx resource in Rx descriptor ring.
2607 * ETH_ERROR in case the routine can not access Rx desc ring.
2610 static ETH_FUNC_RET_STATUS
eth_rx_return_buff(struct mv643xx_private
*mp
,
2611 struct pkt_info
*p_pkt_info
)
2613 int used_rx_desc
; /* Where to return Rx resource */
2614 volatile struct eth_rx_desc
*p_used_rx_desc
;
2615 unsigned long flags
;
2617 spin_lock_irqsave(&mp
->lock
, flags
);
2619 /* Get 'used' Rx descriptor */
2620 used_rx_desc
= mp
->rx_used_desc_q
;
2621 p_used_rx_desc
= &mp
->p_rx_desc_area
[used_rx_desc
];
2623 p_used_rx_desc
->buf_ptr
= p_pkt_info
->buf_ptr
;
2624 p_used_rx_desc
->buf_size
= p_pkt_info
->byte_cnt
;
2625 mp
->rx_skb
[used_rx_desc
] = p_pkt_info
->return_info
;
2627 /* Flush the write pipe */
2629 /* Return the descriptor to DMA ownership */
2631 p_used_rx_desc
->cmd_sts
=
2632 ETH_BUFFER_OWNED_BY_DMA
| ETH_RX_ENABLE_INTERRUPT
;
2635 /* Move the used descriptor pointer to the next descriptor */
2636 mp
->rx_used_desc_q
= (used_rx_desc
+ 1) % mp
->rx_ring_size
;
2638 /* Any Rx return cancels the Rx resource error status */
2639 mp
->rx_resource_err
= 0;
2641 spin_unlock_irqrestore(&mp
->lock
, flags
);
2646 /************* Begin ethtool support *************************/
2648 struct mv643xx_stats
{
2649 char stat_string
[ETH_GSTRING_LEN
];
2654 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2655 offsetof(struct mv643xx_private, m)
2657 static const struct mv643xx_stats mv643xx_gstrings_stats
[] = {
2658 { "rx_packets", MV643XX_STAT(stats
.rx_packets
) },
2659 { "tx_packets", MV643XX_STAT(stats
.tx_packets
) },
2660 { "rx_bytes", MV643XX_STAT(stats
.rx_bytes
) },
2661 { "tx_bytes", MV643XX_STAT(stats
.tx_bytes
) },
2662 { "rx_errors", MV643XX_STAT(stats
.rx_errors
) },
2663 { "tx_errors", MV643XX_STAT(stats
.tx_errors
) },
2664 { "rx_dropped", MV643XX_STAT(stats
.rx_dropped
) },
2665 { "tx_dropped", MV643XX_STAT(stats
.tx_dropped
) },
2666 { "good_octets_received", MV643XX_STAT(mib_counters
.good_octets_received
) },
2667 { "bad_octets_received", MV643XX_STAT(mib_counters
.bad_octets_received
) },
2668 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters
.internal_mac_transmit_err
) },
2669 { "good_frames_received", MV643XX_STAT(mib_counters
.good_frames_received
) },
2670 { "bad_frames_received", MV643XX_STAT(mib_counters
.bad_frames_received
) },
2671 { "broadcast_frames_received", MV643XX_STAT(mib_counters
.broadcast_frames_received
) },
2672 { "multicast_frames_received", MV643XX_STAT(mib_counters
.multicast_frames_received
) },
2673 { "frames_64_octets", MV643XX_STAT(mib_counters
.frames_64_octets
) },
2674 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters
.frames_65_to_127_octets
) },
2675 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters
.frames_128_to_255_octets
) },
2676 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters
.frames_256_to_511_octets
) },
2677 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters
.frames_512_to_1023_octets
) },
2678 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters
.frames_1024_to_max_octets
) },
2679 { "good_octets_sent", MV643XX_STAT(mib_counters
.good_octets_sent
) },
2680 { "good_frames_sent", MV643XX_STAT(mib_counters
.good_frames_sent
) },
2681 { "excessive_collision", MV643XX_STAT(mib_counters
.excessive_collision
) },
2682 { "multicast_frames_sent", MV643XX_STAT(mib_counters
.multicast_frames_sent
) },
2683 { "broadcast_frames_sent", MV643XX_STAT(mib_counters
.broadcast_frames_sent
) },
2684 { "unrec_mac_control_received", MV643XX_STAT(mib_counters
.unrec_mac_control_received
) },
2685 { "fc_sent", MV643XX_STAT(mib_counters
.fc_sent
) },
2686 { "good_fc_received", MV643XX_STAT(mib_counters
.good_fc_received
) },
2687 { "bad_fc_received", MV643XX_STAT(mib_counters
.bad_fc_received
) },
2688 { "undersize_received", MV643XX_STAT(mib_counters
.undersize_received
) },
2689 { "fragments_received", MV643XX_STAT(mib_counters
.fragments_received
) },
2690 { "oversize_received", MV643XX_STAT(mib_counters
.oversize_received
) },
2691 { "jabber_received", MV643XX_STAT(mib_counters
.jabber_received
) },
2692 { "mac_receive_error", MV643XX_STAT(mib_counters
.mac_receive_error
) },
2693 { "bad_crc_event", MV643XX_STAT(mib_counters
.bad_crc_event
) },
2694 { "collision", MV643XX_STAT(mib_counters
.collision
) },
2695 { "late_collision", MV643XX_STAT(mib_counters
.late_collision
) },
2698 #define MV643XX_STATS_LEN \
2699 sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
2701 static void mv643xx_get_drvinfo(struct net_device
*netdev
,
2702 struct ethtool_drvinfo
*drvinfo
)
2704 strncpy(drvinfo
->driver
, mv643xx_driver_name
, 32);
2705 strncpy(drvinfo
->version
, mv643xx_driver_version
, 32);
2706 strncpy(drvinfo
->fw_version
, "N/A", 32);
2707 strncpy(drvinfo
->bus_info
, "mv643xx", 32);
2708 drvinfo
->n_stats
= MV643XX_STATS_LEN
;
2711 static int mv643xx_get_stats_count(struct net_device
*netdev
)
2713 return MV643XX_STATS_LEN
;
2716 static void mv643xx_get_ethtool_stats(struct net_device
*netdev
,
2717 struct ethtool_stats
*stats
, uint64_t *data
)
2719 struct mv643xx_private
*mp
= netdev
->priv
;
2722 eth_update_mib_counters(mp
);
2724 for (i
= 0; i
< MV643XX_STATS_LEN
; i
++) {
2725 char *p
= (char *)mp
+mv643xx_gstrings_stats
[i
].stat_offset
;
2726 data
[i
] = (mv643xx_gstrings_stats
[i
].sizeof_stat
==
2727 sizeof(uint64_t)) ? *(uint64_t *)p
: *(uint32_t *)p
;
2731 static void mv643xx_get_strings(struct net_device
*netdev
, uint32_t stringset
,
2738 for (i
=0; i
< MV643XX_STATS_LEN
; i
++) {
2739 memcpy(data
+ i
* ETH_GSTRING_LEN
,
2740 mv643xx_gstrings_stats
[i
].stat_string
,
2747 static u32
mv643xx_eth_get_link(struct net_device
*dev
)
2749 struct mv643xx_private
*mp
= netdev_priv(dev
);
2751 return mii_link_ok(&mp
->mii
);
2754 static int mv643xx_eth_nway_restart(struct net_device
*dev
)
2756 struct mv643xx_private
*mp
= netdev_priv(dev
);
2758 return mii_nway_restart(&mp
->mii
);
2761 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
2763 struct mv643xx_private
*mp
= netdev_priv(dev
);
2765 return generic_mii_ioctl(&mp
->mii
, if_mii(ifr
), cmd
, NULL
);
2768 static const struct ethtool_ops mv643xx_ethtool_ops
= {
2769 .get_settings
= mv643xx_get_settings
,
2770 .set_settings
= mv643xx_set_settings
,
2771 .get_drvinfo
= mv643xx_get_drvinfo
,
2772 .get_link
= mv643xx_eth_get_link
,
2773 .get_sg
= ethtool_op_get_sg
,
2774 .set_sg
= ethtool_op_set_sg
,
2775 .get_strings
= mv643xx_get_strings
,
2776 .get_stats_count
= mv643xx_get_stats_count
,
2777 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
2778 .get_strings
= mv643xx_get_strings
,
2779 .get_stats_count
= mv643xx_get_stats_count
,
2780 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
2781 .nway_reset
= mv643xx_eth_nway_restart
,
2784 /************* End ethtool support *************************/