2 * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2005 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
54 * The first part is the high level driver of the gigE ethernet ports.
60 #define DMA_ALIGN 8 /* hw requires 8-byte alignment */
61 #define HW_IP_ALIGN 2 /* hw aligns IP header */
62 #define WRAP HW_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
63 #define RX_SKB_SIZE ((dev->mtu + WRAP + 7) & ~0x7)
65 #define INT_UNMASK_ALL 0x0007ffff
66 #define INT_UNMASK_ALL_EXT 0x0011ffff
67 #define INT_MASK_ALL 0x00000000
68 #define INT_MASK_ALL_EXT 0x00000000
69 #define INT_CAUSE_CHECK_BITS INT_CAUSE_UNMASK_ALL
70 #define INT_CAUSE_CHECK_BITS_EXT INT_CAUSE_UNMASK_ALL_EXT
72 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
73 #define MAX_DESCS_PER_SKB (MAX_SKB_FRAGS + 1)
75 #define MAX_DESCS_PER_SKB 1
78 #define PHY_WAIT_ITERATIONS 1000 /* 1000 iterations * 10uS = 10mS max */
79 #define PHY_WAIT_MICRO_SECONDS 10
81 /* Static function declarations */
82 static void eth_port_uc_addr_get(struct net_device
*dev
,
83 unsigned char *MacAddr
);
84 static void eth_port_set_multicast_list(struct net_device
*);
85 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
86 unsigned int channels
);
87 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
88 unsigned int channels
);
89 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
);
90 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
);
91 static int mv643xx_eth_open(struct net_device
*);
92 static int mv643xx_eth_stop(struct net_device
*);
93 static int mv643xx_eth_change_mtu(struct net_device
*, int);
94 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*);
95 static void eth_port_init_mac_tables(unsigned int eth_port_num
);
97 static int mv643xx_poll(struct net_device
*dev
, int *budget
);
99 static int ethernet_phy_get(unsigned int eth_port_num
);
100 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
101 static int ethernet_phy_detect(unsigned int eth_port_num
);
102 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
);
103 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
);
104 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
);
105 static struct ethtool_ops mv643xx_ethtool_ops
;
107 static char mv643xx_driver_name
[] = "mv643xx_eth";
108 static char mv643xx_driver_version
[] = "1.0";
110 static void __iomem
*mv643xx_eth_shared_base
;
112 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
113 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock
);
115 static inline u32
mv_read(int offset
)
117 void __iomem
*reg_base
;
119 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
121 return readl(reg_base
+ offset
);
124 static inline void mv_write(int offset
, u32 data
)
126 void __iomem
*reg_base
;
128 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
129 writel(data
, reg_base
+ offset
);
133 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
135 * Input : pointer to ethernet interface network device structure
137 * Output : 0 upon success, -EINVAL upon failure
139 static int mv643xx_eth_change_mtu(struct net_device
*dev
, int new_mtu
)
141 if ((new_mtu
> 9500) || (new_mtu
< 64))
146 * Stop then re-open the interface. This will allocate RX skb's with
148 * There is a possible danger that the open will not successed, due
149 * to memory is full, which might fail the open function.
151 if (netif_running(dev
)) {
152 mv643xx_eth_stop(dev
);
153 if (mv643xx_eth_open(dev
))
155 "%s: Fatal error on opening device\n",
163 * mv643xx_eth_rx_task
165 * Fills / refills RX queue on a certain gigabit ethernet port
167 * Input : pointer to ethernet interface network device structure
170 static void mv643xx_eth_rx_task(void *data
)
172 struct net_device
*dev
= (struct net_device
*)data
;
173 struct mv643xx_private
*mp
= netdev_priv(dev
);
174 struct pkt_info pkt_info
;
178 if (test_and_set_bit(0, &mp
->rx_task_busy
))
179 panic("%s: Error in test_set_bit / clear_bit", dev
->name
);
181 while (mp
->rx_desc_count
< (mp
->rx_ring_size
- 5)) {
182 skb
= dev_alloc_skb(RX_SKB_SIZE
+ DMA_ALIGN
);
186 unaligned
= (u32
)skb
->data
& (DMA_ALIGN
- 1);
188 skb_reserve(skb
, DMA_ALIGN
- unaligned
);
189 pkt_info
.cmd_sts
= ETH_RX_ENABLE_INTERRUPT
;
190 pkt_info
.byte_cnt
= RX_SKB_SIZE
;
191 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, RX_SKB_SIZE
,
193 pkt_info
.return_info
= skb
;
194 if (eth_rx_return_buff(mp
, &pkt_info
) != ETH_OK
) {
196 "%s: Error allocating RX Ring\n", dev
->name
);
199 skb_reserve(skb
, HW_IP_ALIGN
);
201 clear_bit(0, &mp
->rx_task_busy
);
203 * If RX ring is empty of SKB, set a timer to try allocating
204 * again in a later time .
206 if ((mp
->rx_desc_count
== 0) && (mp
->rx_timer_flag
== 0)) {
207 printk(KERN_INFO
"%s: Rx ring is empty\n", dev
->name
);
209 mp
->timeout
.expires
= jiffies
+ (HZ
/ 10);
210 add_timer(&mp
->timeout
);
211 mp
->rx_timer_flag
= 1;
213 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
215 /* Return interrupts */
216 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(mp
->port_num
),
223 * mv643xx_eth_rx_task_timer_wrapper
225 * Timer routine to wake up RX queue filling task. This function is
226 * used only in case the RX queue is empty, and all alloc_skb has
227 * failed (due to out of memory event).
229 * Input : pointer to ethernet interface network device structure
232 static void mv643xx_eth_rx_task_timer_wrapper(unsigned long data
)
234 struct net_device
*dev
= (struct net_device
*)data
;
235 struct mv643xx_private
*mp
= netdev_priv(dev
);
237 mp
->rx_timer_flag
= 0;
238 mv643xx_eth_rx_task((void *)data
);
242 * mv643xx_eth_update_mac_address
244 * Update the MAC address of the port in the address table
246 * Input : pointer to ethernet interface network device structure
249 static void mv643xx_eth_update_mac_address(struct net_device
*dev
)
251 struct mv643xx_private
*mp
= netdev_priv(dev
);
252 unsigned int port_num
= mp
->port_num
;
254 eth_port_init_mac_tables(port_num
);
255 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
259 * mv643xx_eth_set_rx_mode
261 * Change from promiscuos to regular rx mode
263 * Input : pointer to ethernet interface network device structure
266 static void mv643xx_eth_set_rx_mode(struct net_device
*dev
)
268 struct mv643xx_private
*mp
= netdev_priv(dev
);
271 config_reg
= mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
));
272 if (dev
->flags
& IFF_PROMISC
)
273 config_reg
|= (u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
275 config_reg
&= ~(u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
276 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
), config_reg
);
278 eth_port_set_multicast_list(dev
);
282 * mv643xx_eth_set_mac_address
284 * Change the interface's mac address.
285 * No special hardware thing should be done because interface is always
286 * put in promiscuous mode.
288 * Input : pointer to ethernet interface network device structure and
289 * a pointer to the designated entry to be added to the cache.
290 * Output : zero upon success, negative upon failure
292 static int mv643xx_eth_set_mac_address(struct net_device
*dev
, void *addr
)
296 for (i
= 0; i
< 6; i
++)
297 /* +2 is for the offset of the HW addr type */
298 dev
->dev_addr
[i
] = ((unsigned char *)addr
)[i
+ 2];
299 mv643xx_eth_update_mac_address(dev
);
304 * mv643xx_eth_tx_timeout
306 * Called upon a timeout on transmitting a packet
308 * Input : pointer to ethernet interface network device structure.
311 static void mv643xx_eth_tx_timeout(struct net_device
*dev
)
313 struct mv643xx_private
*mp
= netdev_priv(dev
);
315 printk(KERN_INFO
"%s: TX timeout ", dev
->name
);
317 /* Do the reset outside of interrupt context */
318 schedule_work(&mp
->tx_timeout_task
);
322 * mv643xx_eth_tx_timeout_task
324 * Actual routine to reset the adapter when a timeout on Tx has occurred
326 static void mv643xx_eth_tx_timeout_task(struct net_device
*dev
)
328 struct mv643xx_private
*mp
= netdev_priv(dev
);
330 netif_device_detach(dev
);
331 eth_port_reset(mp
->port_num
);
333 netif_device_attach(dev
);
337 * mv643xx_eth_free_tx_queue
339 * Input : dev - a pointer to the required interface
341 * Output : 0 if was able to release skb , nonzero otherwise
343 static int mv643xx_eth_free_tx_queue(struct net_device
*dev
,
344 unsigned int eth_int_cause_ext
)
346 struct mv643xx_private
*mp
= netdev_priv(dev
);
347 struct net_device_stats
*stats
= &mp
->stats
;
348 struct pkt_info pkt_info
;
351 if (!(eth_int_cause_ext
& (BIT0
| BIT8
)))
354 /* Check only queue 0 */
355 while (eth_tx_return_desc(mp
, &pkt_info
) == ETH_OK
) {
356 if (pkt_info
.cmd_sts
& BIT0
) {
357 printk("%s: Error in TX\n", dev
->name
);
361 if (pkt_info
.cmd_sts
& ETH_TX_FIRST_DESC
)
362 dma_unmap_single(NULL
, pkt_info
.buf_ptr
,
366 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
370 if (pkt_info
.return_info
) {
371 dev_kfree_skb_irq(pkt_info
.return_info
);
380 * mv643xx_eth_receive
382 * This function is forward packets that are received from the port's
383 * queues toward kernel core or FastRoute them to another interface.
385 * Input : dev - a pointer to the required interface
386 * max - maximum number to receive (0 means unlimted)
388 * Output : number of served packets
391 static int mv643xx_eth_receive_queue(struct net_device
*dev
, int budget
)
393 static int mv643xx_eth_receive_queue(struct net_device
*dev
)
396 struct mv643xx_private
*mp
= netdev_priv(dev
);
397 struct net_device_stats
*stats
= &mp
->stats
;
398 unsigned int received_packets
= 0;
400 struct pkt_info pkt_info
;
403 while (budget
-- > 0 && eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
405 while (eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
410 /* Update statistics. Note byte count includes 4 byte CRC count */
412 stats
->rx_bytes
+= pkt_info
.byte_cnt
;
413 skb
= pkt_info
.return_info
;
415 * In case received a packet without first / last bits on OR
416 * the error summary bit is on, the packets needs to be dropeed.
418 if (((pkt_info
.cmd_sts
419 & (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) !=
420 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
))
421 || (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)) {
423 if ((pkt_info
.cmd_sts
& (ETH_RX_FIRST_DESC
|
424 ETH_RX_LAST_DESC
)) !=
425 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) {
428 "%s: Received packet spread "
429 "on multiple descriptors\n",
432 if (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)
435 dev_kfree_skb_irq(skb
);
438 * The -4 is for the CRC in the trailer of the
441 skb_put(skb
, pkt_info
.byte_cnt
- 4);
444 if (pkt_info
.cmd_sts
& ETH_LAYER_4_CHECKSUM_OK
) {
445 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
447 (pkt_info
.cmd_sts
& 0x0007fff8) >> 3);
449 skb
->protocol
= eth_type_trans(skb
, dev
);
451 netif_receive_skb(skb
);
456 dev
->last_rx
= jiffies
;
459 return received_packets
;
462 /* Set the mv643xx port configuration register for the speed/duplex mode. */
463 static void mv643xx_eth_update_pscr(struct net_device
*dev
,
464 struct ethtool_cmd
*ecmd
)
466 struct mv643xx_private
*mp
= netdev_priv(dev
);
467 int port_num
= mp
->port_num
;
469 unsigned int channels
;
471 o_pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
474 /* clear speed, duplex and rx buffer size fields */
475 n_pscr
&= ~(MV643XX_ETH_SET_MII_SPEED_TO_100
|
476 MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
477 MV643XX_ETH_SET_FULL_DUPLEX_MODE
|
478 MV643XX_ETH_MAX_RX_PACKET_MASK
);
480 if (ecmd
->duplex
== DUPLEX_FULL
)
481 n_pscr
|= MV643XX_ETH_SET_FULL_DUPLEX_MODE
;
483 if (ecmd
->speed
== SPEED_1000
)
484 n_pscr
|= MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
485 MV643XX_ETH_MAX_RX_PACKET_9700BYTE
;
487 if (ecmd
->speed
== SPEED_100
)
488 n_pscr
|= MV643XX_ETH_SET_MII_SPEED_TO_100
;
489 n_pscr
|= MV643XX_ETH_MAX_RX_PACKET_1522BYTE
;
492 if (n_pscr
!= o_pscr
) {
493 if ((o_pscr
& MV643XX_ETH_SERIAL_PORT_ENABLE
) == 0)
494 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
497 channels
= mv643xx_eth_port_disable_tx(port_num
);
499 o_pscr
&= ~MV643XX_ETH_SERIAL_PORT_ENABLE
;
500 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
502 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
504 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
507 mv643xx_eth_port_enable_tx(port_num
, channels
);
513 * mv643xx_eth_int_handler
515 * Main interrupt handler for the gigbit ethernet ports
517 * Input : irq - irq number (not used)
518 * dev_id - a pointer to the required interface's data structure
523 static irqreturn_t
mv643xx_eth_int_handler(int irq
, void *dev_id
,
524 struct pt_regs
*regs
)
526 struct net_device
*dev
= (struct net_device
*)dev_id
;
527 struct mv643xx_private
*mp
= netdev_priv(dev
);
528 u32 eth_int_cause
, eth_int_cause_ext
= 0;
529 unsigned int port_num
= mp
->port_num
;
531 /* Read interrupt cause registers */
532 eth_int_cause
= mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
)) &
535 if (eth_int_cause
& BIT1
)
536 eth_int_cause_ext
= mv_read(
537 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
)) &
541 if (!(eth_int_cause
& 0x0007fffd)) {
542 /* Dont ack the Rx interrupt */
545 * Clear specific ethernet port intrerrupt registers by
546 * acknowleding relevant bits.
548 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
),
550 if (eth_int_cause_ext
!= 0x0)
551 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG
552 (port_num
), ~eth_int_cause_ext
);
554 /* UDP change : We may need this */
555 if ((eth_int_cause_ext
& 0x0000ffff) &&
556 (mv643xx_eth_free_tx_queue(dev
, eth_int_cause_ext
) == 0) &&
557 (mp
->tx_ring_size
> mp
->tx_desc_count
+ MAX_DESCS_PER_SKB
))
558 netif_wake_queue(dev
);
561 if (netif_rx_schedule_prep(dev
)) {
562 /* Mask all the interrupts */
563 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
565 /* wait for previous write to complete */
566 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
567 __netif_rx_schedule(dev
);
570 if (eth_int_cause
& (BIT2
| BIT11
))
571 mv643xx_eth_receive_queue(dev
, 0);
574 * After forwarded received packets to upper layer, add a task
575 * in an interrupts enabled context that refills the RX ring
578 #ifdef MV643XX_RX_QUEUE_FILL_ON_TASK
579 /* Mask all interrupts on ethernet port */
580 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
582 /* wait for previous write to take effect */
583 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
585 queue_task(&mp
->rx_task
, &tq_immediate
);
586 mark_bh(IMMEDIATE_BH
);
588 mp
->rx_task
.func(dev
);
592 /* PHY status changed */
593 if (eth_int_cause_ext
& (BIT16
| BIT20
)) {
594 struct ethtool_cmd cmd
;
596 if (mii_link_ok(&mp
->mii
)) {
597 mii_ethtool_gset(&mp
->mii
, &cmd
);
598 mv643xx_eth_update_pscr(dev
, &cmd
);
599 if (!netif_carrier_ok(dev
)) {
600 netif_carrier_on(dev
);
601 if (mp
->tx_ring_size
> mp
->tx_desc_count
+
603 netif_wake_queue(dev
);
605 mv643xx_eth_port_enable_tx(port_num
, mp
->port_tx_queue_command
);
608 } else if (netif_carrier_ok(dev
)) {
609 netif_stop_queue(dev
);
610 netif_carrier_off(dev
);
615 * If no real interrupt occured, exit.
616 * This can happen when using gigE interrupt coalescing mechanism.
618 if ((eth_int_cause
== 0x0) && (eth_int_cause_ext
== 0x0))
627 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
630 * This routine sets the RX coalescing interrupt mechanism parameter.
631 * This parameter is a timeout counter, that counts in 64 t_clk
632 * chunks ; that when timeout event occurs a maskable interrupt
634 * The parameter is calculated using the tClk of the MV-643xx chip
635 * , and the required delay of the interrupt in usec.
638 * unsigned int eth_port_num Ethernet port number
639 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
640 * unsigned int delay Delay in usec
643 * Interrupt coalescing mechanism value is set in MV-643xx chip.
646 * The interrupt coalescing value set in the gigE port.
649 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num
,
650 unsigned int t_clk
, unsigned int delay
)
652 unsigned int coal
= ((t_clk
/ 1000000) * delay
) / 64;
654 /* Set RX Coalescing mechanism */
655 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
),
656 ((coal
& 0x3fff) << 8) |
657 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
))
665 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
668 * This routine sets the TX coalescing interrupt mechanism parameter.
669 * This parameter is a timeout counter, that counts in 64 t_clk
670 * chunks ; that when timeout event occurs a maskable interrupt
672 * The parameter is calculated using the t_cLK frequency of the
673 * MV-643xx chip and the required delay in the interrupt in uSec
676 * unsigned int eth_port_num Ethernet port number
677 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
678 * unsigned int delay Delay in uSeconds
681 * Interrupt coalescing mechanism value is set in MV-643xx chip.
684 * The interrupt coalescing value set in the gigE port.
687 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num
,
688 unsigned int t_clk
, unsigned int delay
)
691 coal
= ((t_clk
/ 1000000) * delay
) / 64;
692 /* Set TX Coalescing mechanism */
693 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num
),
699 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
702 * This function prepares a Rx chained list of descriptors and packet
703 * buffers in a form of a ring. The routine must be called after port
704 * initialization routine and before port start routine.
705 * The Ethernet SDMA engine uses CPU bus addresses to access the various
706 * devices in the system (i.e. DRAM). This function uses the ethernet
707 * struct 'virtual to physical' routine (set by the user) to set the ring
708 * with physical addresses.
711 * struct mv643xx_private *mp Ethernet Port Control srtuct.
714 * The routine updates the Ethernet port control struct with information
715 * regarding the Rx descriptors and buffers.
720 static void ether_init_rx_desc_ring(struct mv643xx_private
*mp
)
722 volatile struct eth_rx_desc
*p_rx_desc
;
723 int rx_desc_num
= mp
->rx_ring_size
;
726 /* initialize the next_desc_ptr links in the Rx descriptors ring */
727 p_rx_desc
= (struct eth_rx_desc
*)mp
->p_rx_desc_area
;
728 for (i
= 0; i
< rx_desc_num
; i
++) {
729 p_rx_desc
[i
].next_desc_ptr
= mp
->rx_desc_dma
+
730 ((i
+ 1) % rx_desc_num
) * sizeof(struct eth_rx_desc
);
733 /* Save Rx desc pointer to driver struct. */
734 mp
->rx_curr_desc_q
= 0;
735 mp
->rx_used_desc_q
= 0;
737 mp
->rx_desc_area_size
= rx_desc_num
* sizeof(struct eth_rx_desc
);
739 /* Enable queue 0 for this port */
740 mp
->port_rx_queue_command
= 1;
744 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
747 * This function prepares a Tx chained list of descriptors and packet
748 * buffers in a form of a ring. The routine must be called after port
749 * initialization routine and before port start routine.
750 * The Ethernet SDMA engine uses CPU bus addresses to access the various
751 * devices in the system (i.e. DRAM). This function uses the ethernet
752 * struct 'virtual to physical' routine (set by the user) to set the ring
753 * with physical addresses.
756 * struct mv643xx_private *mp Ethernet Port Control srtuct.
759 * The routine updates the Ethernet port control struct with information
760 * regarding the Tx descriptors and buffers.
765 static void ether_init_tx_desc_ring(struct mv643xx_private
*mp
)
767 int tx_desc_num
= mp
->tx_ring_size
;
768 struct eth_tx_desc
*p_tx_desc
;
771 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
772 p_tx_desc
= (struct eth_tx_desc
*)mp
->p_tx_desc_area
;
773 for (i
= 0; i
< tx_desc_num
; i
++) {
774 p_tx_desc
[i
].next_desc_ptr
= mp
->tx_desc_dma
+
775 ((i
+ 1) % tx_desc_num
) * sizeof(struct eth_tx_desc
);
778 mp
->tx_curr_desc_q
= 0;
779 mp
->tx_used_desc_q
= 0;
780 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
781 mp
->tx_first_desc_q
= 0;
784 mp
->tx_desc_area_size
= tx_desc_num
* sizeof(struct eth_tx_desc
);
786 /* Enable queue 0 for this port */
787 mp
->port_tx_queue_command
= 1;
790 static int mv643xx_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
792 struct mv643xx_private
*mp
= netdev_priv(dev
);
795 spin_lock_irq(&mp
->lock
);
796 err
= mii_ethtool_sset(&mp
->mii
, cmd
);
797 spin_unlock_irq(&mp
->lock
);
802 static int mv643xx_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
804 struct mv643xx_private
*mp
= netdev_priv(dev
);
807 spin_lock_irq(&mp
->lock
);
808 err
= mii_ethtool_gset(&mp
->mii
, cmd
);
809 spin_unlock_irq(&mp
->lock
);
811 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
812 cmd
->supported
&= ~SUPPORTED_1000baseT_Half
;
813 cmd
->advertising
&= ~ADVERTISED_1000baseT_Half
;
821 * This function is called when openning the network device. The function
822 * should initialize all the hardware, initialize cyclic Rx/Tx
823 * descriptors chain and buffers and allocate an IRQ to the network
826 * Input : a pointer to the network device structure
828 * Output : zero of success , nonzero if fails.
831 static int mv643xx_eth_open(struct net_device
*dev
)
833 struct mv643xx_private
*mp
= netdev_priv(dev
);
834 unsigned int port_num
= mp
->port_num
;
838 err
= request_irq(dev
->irq
, mv643xx_eth_int_handler
,
839 SA_SHIRQ
| SA_SAMPLE_RANDOM
, dev
->name
, dev
);
841 printk(KERN_ERR
"Can not assign IRQ number to MV643XX_eth%d\n",
848 INIT_WORK(&mp
->rx_task
, (void (*)(void *))mv643xx_eth_rx_task
, dev
);
850 memset(&mp
->timeout
, 0, sizeof(struct timer_list
));
851 mp
->timeout
.function
= mv643xx_eth_rx_task_timer_wrapper
;
852 mp
->timeout
.data
= (unsigned long)dev
;
854 mp
->rx_task_busy
= 0;
855 mp
->rx_timer_flag
= 0;
857 /* Allocate RX and TX skb rings */
858 mp
->rx_skb
= kmalloc(sizeof(*mp
->rx_skb
) * mp
->rx_ring_size
,
861 printk(KERN_ERR
"%s: Cannot allocate Rx skb ring\n", dev
->name
);
865 mp
->tx_skb
= kmalloc(sizeof(*mp
->tx_skb
) * mp
->tx_ring_size
,
868 printk(KERN_ERR
"%s: Cannot allocate Tx skb ring\n", dev
->name
);
870 goto out_free_rx_skb
;
873 /* Allocate TX ring */
874 mp
->tx_desc_count
= 0;
875 size
= mp
->tx_ring_size
* sizeof(struct eth_tx_desc
);
876 mp
->tx_desc_area_size
= size
;
878 if (mp
->tx_sram_size
) {
879 mp
->p_tx_desc_area
= ioremap(mp
->tx_sram_addr
,
881 mp
->tx_desc_dma
= mp
->tx_sram_addr
;
883 mp
->p_tx_desc_area
= dma_alloc_coherent(NULL
, size
,
887 if (!mp
->p_tx_desc_area
) {
888 printk(KERN_ERR
"%s: Cannot allocate Tx Ring (size %d bytes)\n",
891 goto out_free_tx_skb
;
893 BUG_ON((u32
) mp
->p_tx_desc_area
& 0xf); /* check 16-byte alignment */
894 memset((void *)mp
->p_tx_desc_area
, 0, mp
->tx_desc_area_size
);
896 ether_init_tx_desc_ring(mp
);
898 /* Allocate RX ring */
899 mp
->rx_desc_count
= 0;
900 size
= mp
->rx_ring_size
* sizeof(struct eth_rx_desc
);
901 mp
->rx_desc_area_size
= size
;
903 if (mp
->rx_sram_size
) {
904 mp
->p_rx_desc_area
= ioremap(mp
->rx_sram_addr
,
906 mp
->rx_desc_dma
= mp
->rx_sram_addr
;
908 mp
->p_rx_desc_area
= dma_alloc_coherent(NULL
, size
,
912 if (!mp
->p_rx_desc_area
) {
913 printk(KERN_ERR
"%s: Cannot allocate Rx ring (size %d bytes)\n",
915 printk(KERN_ERR
"%s: Freeing previously allocated TX queues...",
917 if (mp
->rx_sram_size
)
918 iounmap(mp
->p_tx_desc_area
);
920 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
921 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
923 goto out_free_tx_skb
;
925 memset((void *)mp
->p_rx_desc_area
, 0, size
);
927 ether_init_rx_desc_ring(mp
);
929 mv643xx_eth_rx_task(dev
); /* Fill RX ring with skb's */
931 /* Clear any pending ethernet port interrupts */
932 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
933 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
937 /* Interrupt Coalescing */
941 eth_port_set_rx_coal(port_num
, 133000000, MV643XX_RX_COAL
);
945 eth_port_set_tx_coal(port_num
, 133000000, MV643XX_TX_COAL
);
947 /* Unmask phy and link status changes interrupts */
948 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
951 /* Unmask RX buffer and TX end interrupt */
952 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), INT_UNMASK_ALL
);
961 free_irq(dev
->irq
, dev
);
966 static void mv643xx_eth_free_tx_rings(struct net_device
*dev
)
968 struct mv643xx_private
*mp
= netdev_priv(dev
);
969 unsigned int port_num
= mp
->port_num
;
974 mv643xx_eth_port_disable_tx(port_num
);
976 /* Free outstanding skb's on TX rings */
977 for (curr
= 0; mp
->tx_desc_count
&& curr
< mp
->tx_ring_size
; curr
++) {
978 skb
= mp
->tx_skb
[curr
];
980 mp
->tx_desc_count
-= skb_shinfo(skb
)->nr_frags
;
985 if (mp
->tx_desc_count
)
986 printk("%s: Error on Tx descriptor free - could not free %d"
987 " descriptors\n", dev
->name
, mp
->tx_desc_count
);
990 if (mp
->tx_sram_size
)
991 iounmap(mp
->p_tx_desc_area
);
993 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
994 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
997 static void mv643xx_eth_free_rx_rings(struct net_device
*dev
)
999 struct mv643xx_private
*mp
= netdev_priv(dev
);
1000 unsigned int port_num
= mp
->port_num
;
1003 /* Stop RX Queues */
1004 mv643xx_eth_port_disable_rx(port_num
);
1006 /* Free preallocated skb's on RX rings */
1007 for (curr
= 0; mp
->rx_desc_count
&& curr
< mp
->rx_ring_size
; curr
++) {
1008 if (mp
->rx_skb
[curr
]) {
1009 dev_kfree_skb(mp
->rx_skb
[curr
]);
1010 mp
->rx_desc_count
--;
1014 if (mp
->rx_desc_count
)
1016 "%s: Error in freeing Rx Ring. %d skb's still"
1017 " stuck in RX Ring - ignoring them\n", dev
->name
,
1020 if (mp
->rx_sram_size
)
1021 iounmap(mp
->p_rx_desc_area
);
1023 dma_free_coherent(NULL
, mp
->rx_desc_area_size
,
1024 mp
->p_rx_desc_area
, mp
->rx_desc_dma
);
1030 * This function is used when closing the network device.
1031 * It updates the hardware,
1032 * release all memory that holds buffers and descriptors and release the IRQ.
1033 * Input : a pointer to the device structure
1034 * Output : zero if success , nonzero if fails
1037 static int mv643xx_eth_stop(struct net_device
*dev
)
1039 struct mv643xx_private
*mp
= netdev_priv(dev
);
1040 unsigned int port_num
= mp
->port_num
;
1042 /* Mask all interrupts on ethernet port */
1043 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), INT_MASK_ALL
);
1044 /* wait for previous write to complete */
1045 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
1048 netif_poll_disable(dev
);
1050 netif_carrier_off(dev
);
1051 netif_stop_queue(dev
);
1053 eth_port_reset(mp
->port_num
);
1055 mv643xx_eth_free_tx_rings(dev
);
1056 mv643xx_eth_free_rx_rings(dev
);
1059 netif_poll_enable(dev
);
1062 free_irq(dev
->irq
, dev
);
1068 static void mv643xx_tx(struct net_device
*dev
)
1070 struct mv643xx_private
*mp
= netdev_priv(dev
);
1071 struct pkt_info pkt_info
;
1073 while (eth_tx_return_desc(mp
, &pkt_info
) == ETH_OK
) {
1074 if (pkt_info
.cmd_sts
& ETH_TX_FIRST_DESC
)
1075 dma_unmap_single(NULL
, pkt_info
.buf_ptr
,
1079 dma_unmap_page(NULL
, pkt_info
.buf_ptr
,
1083 if (pkt_info
.return_info
)
1084 dev_kfree_skb_irq(pkt_info
.return_info
);
1087 if (netif_queue_stopped(dev
) &&
1089 mp
->tx_desc_count
+ MAX_DESCS_PER_SKB
)
1090 netif_wake_queue(dev
);
1096 * This function is used in case of NAPI
1098 static int mv643xx_poll(struct net_device
*dev
, int *budget
)
1100 struct mv643xx_private
*mp
= netdev_priv(dev
);
1101 int done
= 1, orig_budget
, work_done
;
1102 unsigned int port_num
= mp
->port_num
;
1104 #ifdef MV643XX_TX_FAST_REFILL
1105 if (++mp
->tx_clean_threshold
> 5) {
1107 mp
->tx_clean_threshold
= 0;
1111 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
)))
1112 != (u32
) mp
->rx_used_desc_q
) {
1113 orig_budget
= *budget
;
1114 if (orig_budget
> dev
->quota
)
1115 orig_budget
= dev
->quota
;
1116 work_done
= mv643xx_eth_receive_queue(dev
, orig_budget
);
1117 mp
->rx_task
.func(dev
);
1118 *budget
-= work_done
;
1119 dev
->quota
-= work_done
;
1120 if (work_done
>= orig_budget
)
1125 netif_rx_complete(dev
);
1126 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
1127 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
1128 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1132 return done
? 0 : 1;
1136 /* Hardware can't handle unaligned fragments smaller than 9 bytes.
1137 * This helper function detects that case.
1140 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff
*skb
)
1145 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1146 fragp
= &skb_shinfo(skb
)->frags
[frag
];
1147 if (fragp
->size
<= 8 && fragp
->page_offset
& 0x7)
1155 * mv643xx_eth_start_xmit
1157 * This function is queues a packet in the Tx descriptor for
1160 * Input : skb - a pointer to socket buffer
1161 * dev - a pointer to the required port
1163 * Output : zero upon success
1165 static int mv643xx_eth_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1167 struct mv643xx_private
*mp
= netdev_priv(dev
);
1168 struct net_device_stats
*stats
= &mp
->stats
;
1169 ETH_FUNC_RET_STATUS status
;
1170 unsigned long flags
;
1171 struct pkt_info pkt_info
;
1173 if (netif_queue_stopped(dev
)) {
1175 "%s: Tried sending packet when interface is stopped\n",
1180 /* This is a hard error, log it. */
1181 if ((mp
->tx_ring_size
- mp
->tx_desc_count
) <=
1182 (skb_shinfo(skb
)->nr_frags
+ 1)) {
1183 netif_stop_queue(dev
);
1185 "%s: Bug in mv643xx_eth - Trying to transmit when"
1186 " queue full !\n", dev
->name
);
1190 /* Paranoid check - this shouldn't happen */
1192 stats
->tx_dropped
++;
1193 printk(KERN_ERR
"mv64320_eth paranoid check failed\n");
1197 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1198 if (has_tiny_unaligned_frags(skb
)) {
1199 if ((skb_linearize(skb
, GFP_ATOMIC
) != 0)) {
1200 stats
->tx_dropped
++;
1201 printk(KERN_DEBUG
"%s: failed to linearize tiny "
1202 "unaligned fragment\n", dev
->name
);
1207 spin_lock_irqsave(&mp
->lock
, flags
);
1209 if (!skb_shinfo(skb
)->nr_frags
) {
1210 if (skb
->ip_summed
!= CHECKSUM_HW
) {
1211 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1212 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
|
1215 5 << ETH_TX_IHL_SHIFT
;
1216 pkt_info
.l4i_chk
= 0;
1218 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
|
1221 ETH_GEN_TCP_UDP_CHECKSUM
|
1222 ETH_GEN_IP_V_4_CHECKSUM
|
1223 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1224 /* CPU already calculated pseudo header checksum. */
1225 if ((skb
->protocol
== ETH_P_IP
) &&
1226 (skb
->nh
.iph
->protocol
== IPPROTO_UDP
) ) {
1227 pkt_info
.cmd_sts
|= ETH_UDP_FRAME
;
1228 pkt_info
.l4i_chk
= skb
->h
.uh
->check
;
1229 } else if ((skb
->protocol
== ETH_P_IP
) &&
1230 (skb
->nh
.iph
->protocol
== IPPROTO_TCP
))
1231 pkt_info
.l4i_chk
= skb
->h
.th
->check
;
1234 "%s: chksum proto != IPv4 TCP or UDP\n",
1236 spin_unlock_irqrestore(&mp
->lock
, flags
);
1240 pkt_info
.byte_cnt
= skb
->len
;
1241 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, skb
->len
,
1243 pkt_info
.return_info
= skb
;
1244 status
= eth_port_send(mp
, &pkt_info
);
1245 if ((status
== ETH_ERROR
) || (status
== ETH_QUEUE_FULL
))
1246 printk(KERN_ERR
"%s: Error on transmitting packet\n",
1248 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1252 /* first frag which is skb header */
1253 pkt_info
.byte_cnt
= skb_headlen(skb
);
1254 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
,
1257 pkt_info
.l4i_chk
= 0;
1258 pkt_info
.return_info
= 0;
1260 if (skb
->ip_summed
!= CHECKSUM_HW
)
1261 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1262 pkt_info
.cmd_sts
= ETH_TX_FIRST_DESC
|
1263 5 << ETH_TX_IHL_SHIFT
;
1265 pkt_info
.cmd_sts
= ETH_TX_FIRST_DESC
|
1266 ETH_GEN_TCP_UDP_CHECKSUM
|
1267 ETH_GEN_IP_V_4_CHECKSUM
|
1268 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1269 /* CPU already calculated pseudo header checksum. */
1270 if ((skb
->protocol
== ETH_P_IP
) &&
1271 (skb
->nh
.iph
->protocol
== IPPROTO_UDP
)) {
1272 pkt_info
.cmd_sts
|= ETH_UDP_FRAME
;
1273 pkt_info
.l4i_chk
= skb
->h
.uh
->check
;
1274 } else if ((skb
->protocol
== ETH_P_IP
) &&
1275 (skb
->nh
.iph
->protocol
== IPPROTO_TCP
))
1276 pkt_info
.l4i_chk
= skb
->h
.th
->check
;
1279 "%s: chksum proto != IPv4 TCP or UDP\n",
1281 spin_unlock_irqrestore(&mp
->lock
, flags
);
1286 status
= eth_port_send(mp
, &pkt_info
);
1287 if (status
!= ETH_OK
) {
1288 if ((status
== ETH_ERROR
))
1290 "%s: Error on transmitting packet\n",
1292 if (status
== ETH_QUEUE_FULL
)
1293 printk("Error on Queue Full \n");
1294 if (status
== ETH_QUEUE_LAST_RESOURCE
)
1295 printk("Tx resource error \n");
1297 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1299 /* Check for the remaining frags */
1300 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1301 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
1302 pkt_info
.l4i_chk
= 0x0000;
1303 pkt_info
.cmd_sts
= 0x00000000;
1305 /* Last Frag enables interrupt and frees the skb */
1306 if (frag
== (skb_shinfo(skb
)->nr_frags
- 1)) {
1307 pkt_info
.cmd_sts
|= ETH_TX_ENABLE_INTERRUPT
|
1309 pkt_info
.return_info
= skb
;
1311 pkt_info
.return_info
= 0;
1313 pkt_info
.l4i_chk
= 0;
1314 pkt_info
.byte_cnt
= this_frag
->size
;
1316 pkt_info
.buf_ptr
= dma_map_page(NULL
, this_frag
->page
,
1317 this_frag
->page_offset
,
1321 status
= eth_port_send(mp
, &pkt_info
);
1323 if (status
!= ETH_OK
) {
1324 if ((status
== ETH_ERROR
))
1325 printk(KERN_ERR
"%s: Error on "
1326 "transmitting packet\n",
1329 if (status
== ETH_QUEUE_LAST_RESOURCE
)
1330 printk("Tx resource error \n");
1332 if (status
== ETH_QUEUE_FULL
)
1333 printk("Queue is full \n");
1335 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1339 spin_lock_irqsave(&mp
->lock
, flags
);
1341 pkt_info
.cmd_sts
= ETH_TX_ENABLE_INTERRUPT
| ETH_TX_FIRST_DESC
|
1343 pkt_info
.l4i_chk
= 0;
1344 pkt_info
.byte_cnt
= skb
->len
;
1345 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
, skb
->len
,
1347 pkt_info
.return_info
= skb
;
1348 status
= eth_port_send(mp
, &pkt_info
);
1349 if ((status
== ETH_ERROR
) || (status
== ETH_QUEUE_FULL
))
1350 printk(KERN_ERR
"%s: Error on transmitting packet\n",
1352 stats
->tx_bytes
+= pkt_info
.byte_cnt
;
1355 /* Check if TX queue can handle another skb. If not, then
1356 * signal higher layers to stop requesting TX
1358 if (mp
->tx_ring_size
<= (mp
->tx_desc_count
+ MAX_DESCS_PER_SKB
))
1360 * Stop getting skb's from upper layers.
1361 * Getting skb's from upper layers will be enabled again after
1362 * packets are released.
1364 netif_stop_queue(dev
);
1366 /* Update statistics and start of transmittion time */
1367 stats
->tx_packets
++;
1368 dev
->trans_start
= jiffies
;
1370 spin_unlock_irqrestore(&mp
->lock
, flags
);
1372 return 0; /* success */
1376 * mv643xx_eth_get_stats
1378 * Returns a pointer to the interface statistics.
1380 * Input : dev - a pointer to the required interface
1382 * Output : a pointer to the interface's statistics
1385 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*dev
)
1387 struct mv643xx_private
*mp
= netdev_priv(dev
);
1392 #ifdef CONFIG_NET_POLL_CONTROLLER
1393 static void mv643xx_netpoll(struct net_device
*netdev
)
1395 struct mv643xx_private
*mp
= netdev_priv(netdev
);
1396 int port_num
= mp
->port_num
;
1398 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), INT_MASK_ALL
);
1399 /* wait for previous write to complete */
1400 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
1402 mv643xx_eth_int_handler(netdev
->irq
, netdev
, NULL
);
1404 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), INT_UNMASK_ALL
);
1408 static void mv643xx_init_ethtool_cmd(struct net_device
*dev
, int phy_address
,
1409 int speed
, int duplex
,
1410 struct ethtool_cmd
*cmd
)
1412 struct mv643xx_private
*mp
= netdev_priv(dev
);
1414 memset(cmd
, 0, sizeof(*cmd
));
1416 cmd
->port
= PORT_MII
;
1417 cmd
->transceiver
= XCVR_INTERNAL
;
1418 cmd
->phy_address
= phy_address
;
1421 cmd
->autoneg
= AUTONEG_ENABLE
;
1422 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1423 cmd
->speed
= SPEED_100
;
1424 cmd
->advertising
= ADVERTISED_10baseT_Half
|
1425 ADVERTISED_10baseT_Full
|
1426 ADVERTISED_100baseT_Half
|
1427 ADVERTISED_100baseT_Full
;
1428 if (mp
->mii
.supports_gmii
)
1429 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
1431 cmd
->autoneg
= AUTONEG_DISABLE
;
1433 cmd
->duplex
= duplex
;
1440 * First function called after registering the network device.
1441 * It's purpose is to initialize the device as an ethernet device,
1442 * fill the ethernet device structure with pointers * to functions,
1443 * and set the MAC address of the interface
1445 * Input : struct device *
1446 * Output : -ENOMEM if failed , 0 if success
1448 static int mv643xx_eth_probe(struct platform_device
*pdev
)
1450 struct mv643xx_eth_platform_data
*pd
;
1451 int port_num
= pdev
->id
;
1452 struct mv643xx_private
*mp
;
1453 struct net_device
*dev
;
1455 struct resource
*res
;
1457 struct ethtool_cmd cmd
;
1458 int duplex
= DUPLEX_HALF
;
1459 int speed
= 0; /* default to auto-negotiation */
1461 dev
= alloc_etherdev(sizeof(struct mv643xx_private
));
1465 platform_set_drvdata(pdev
, dev
);
1467 mp
= netdev_priv(dev
);
1469 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1471 dev
->irq
= res
->start
;
1473 mp
->port_num
= port_num
;
1475 dev
->open
= mv643xx_eth_open
;
1476 dev
->stop
= mv643xx_eth_stop
;
1477 dev
->hard_start_xmit
= mv643xx_eth_start_xmit
;
1478 dev
->get_stats
= mv643xx_eth_get_stats
;
1479 dev
->set_mac_address
= mv643xx_eth_set_mac_address
;
1480 dev
->set_multicast_list
= mv643xx_eth_set_rx_mode
;
1482 /* No need to Tx Timeout */
1483 dev
->tx_timeout
= mv643xx_eth_tx_timeout
;
1485 dev
->poll
= mv643xx_poll
;
1489 #ifdef CONFIG_NET_POLL_CONTROLLER
1490 dev
->poll_controller
= mv643xx_netpoll
;
1493 dev
->watchdog_timeo
= 2 * HZ
;
1494 dev
->tx_queue_len
= mp
->tx_ring_size
;
1496 dev
->change_mtu
= mv643xx_eth_change_mtu
;
1497 dev
->do_ioctl
= mv643xx_eth_do_ioctl
;
1498 SET_ETHTOOL_OPS(dev
, &mv643xx_ethtool_ops
);
1500 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1501 #ifdef MAX_SKB_FRAGS
1503 * Zero copy can only work if we use Discovery II memory. Else, we will
1504 * have to map the buffers to ISA memory which is only 16 MB
1506 dev
->features
= NETIF_F_SG
| NETIF_F_IP_CSUM
;
1510 /* Configure the timeout task */
1511 INIT_WORK(&mp
->tx_timeout_task
,
1512 (void (*)(void *))mv643xx_eth_tx_timeout_task
, dev
);
1514 spin_lock_init(&mp
->lock
);
1516 /* set default config values */
1517 eth_port_uc_addr_get(dev
, dev
->dev_addr
);
1518 mp
->rx_ring_size
= MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE
;
1519 mp
->tx_ring_size
= MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE
;
1521 pd
= pdev
->dev
.platform_data
;
1524 memcpy(dev
->dev_addr
, pd
->mac_addr
, 6);
1526 if (pd
->phy_addr
|| pd
->force_phy_addr
)
1527 ethernet_phy_set(port_num
, pd
->phy_addr
);
1529 if (pd
->rx_queue_size
)
1530 mp
->rx_ring_size
= pd
->rx_queue_size
;
1532 if (pd
->tx_queue_size
)
1533 mp
->tx_ring_size
= pd
->tx_queue_size
;
1535 if (pd
->tx_sram_size
) {
1536 mp
->tx_sram_size
= pd
->tx_sram_size
;
1537 mp
->tx_sram_addr
= pd
->tx_sram_addr
;
1540 if (pd
->rx_sram_size
) {
1541 mp
->rx_sram_size
= pd
->rx_sram_size
;
1542 mp
->rx_sram_addr
= pd
->rx_sram_addr
;
1545 duplex
= pd
->duplex
;
1549 /* Hook up MII support for ethtool */
1551 mp
->mii
.mdio_read
= mv643xx_mdio_read
;
1552 mp
->mii
.mdio_write
= mv643xx_mdio_write
;
1553 mp
->mii
.phy_id
= ethernet_phy_get(port_num
);
1554 mp
->mii
.phy_id_mask
= 0x3f;
1555 mp
->mii
.reg_num_mask
= 0x1f;
1557 err
= ethernet_phy_detect(port_num
);
1559 pr_debug("MV643xx ethernet port %d: "
1560 "No PHY detected at addr %d\n",
1561 port_num
, ethernet_phy_get(port_num
));
1565 ethernet_phy_reset(port_num
);
1566 mp
->mii
.supports_gmii
= mii_check_gmii_support(&mp
->mii
);
1567 mv643xx_init_ethtool_cmd(dev
, mp
->mii
.phy_id
, speed
, duplex
, &cmd
);
1568 mv643xx_eth_update_pscr(dev
, &cmd
);
1569 mv643xx_set_settings(dev
, &cmd
);
1571 err
= register_netdev(dev
);
1577 "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
1578 dev
->name
, port_num
, p
[0], p
[1], p
[2], p
[3], p
[4], p
[5]);
1580 if (dev
->features
& NETIF_F_SG
)
1581 printk(KERN_NOTICE
"%s: Scatter Gather Enabled\n", dev
->name
);
1583 if (dev
->features
& NETIF_F_IP_CSUM
)
1584 printk(KERN_NOTICE
"%s: TX TCP/IP Checksumming Supported\n",
1587 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1588 printk(KERN_NOTICE
"%s: RX TCP/UDP Checksum Offload ON \n", dev
->name
);
1592 printk(KERN_NOTICE
"%s: TX and RX Interrupt Coalescing ON \n",
1597 printk(KERN_NOTICE
"%s: RX NAPI Enabled \n", dev
->name
);
1600 if (mp
->tx_sram_size
> 0)
1601 printk(KERN_NOTICE
"%s: Using SRAM\n", dev
->name
);
1611 static int mv643xx_eth_remove(struct platform_device
*pdev
)
1613 struct net_device
*dev
= platform_get_drvdata(pdev
);
1615 unregister_netdev(dev
);
1616 flush_scheduled_work();
1619 platform_set_drvdata(pdev
, NULL
);
1623 static int mv643xx_eth_shared_probe(struct platform_device
*pdev
)
1625 struct resource
*res
;
1627 printk(KERN_NOTICE
"MV-643xx 10/100/1000 Ethernet Driver\n");
1629 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1633 mv643xx_eth_shared_base
= ioremap(res
->start
,
1634 MV643XX_ETH_SHARED_REGS_SIZE
);
1635 if (mv643xx_eth_shared_base
== NULL
)
1642 static int mv643xx_eth_shared_remove(struct platform_device
*pdev
)
1644 iounmap(mv643xx_eth_shared_base
);
1645 mv643xx_eth_shared_base
= NULL
;
1650 static struct platform_driver mv643xx_eth_driver
= {
1651 .probe
= mv643xx_eth_probe
,
1652 .remove
= mv643xx_eth_remove
,
1654 .name
= MV643XX_ETH_NAME
,
1658 static struct platform_driver mv643xx_eth_shared_driver
= {
1659 .probe
= mv643xx_eth_shared_probe
,
1660 .remove
= mv643xx_eth_shared_remove
,
1662 .name
= MV643XX_ETH_SHARED_NAME
,
1667 * mv643xx_init_module
1669 * Registers the network drivers into the Linux kernel
1675 static int __init
mv643xx_init_module(void)
1679 rc
= platform_driver_register(&mv643xx_eth_shared_driver
);
1681 rc
= platform_driver_register(&mv643xx_eth_driver
);
1683 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1689 * mv643xx_cleanup_module
1691 * Registers the network drivers into the Linux kernel
1697 static void __exit
mv643xx_cleanup_module(void)
1699 platform_driver_unregister(&mv643xx_eth_driver
);
1700 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1703 module_init(mv643xx_init_module
);
1704 module_exit(mv643xx_cleanup_module
);
1706 MODULE_LICENSE("GPL");
1707 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1708 " and Dale Farnsworth");
1709 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1712 * The second part is the low level driver of the gigE ethernet ports.
1716 * Marvell's Gigabit Ethernet controller low level driver
1719 * This file introduce low level API to Marvell's Gigabit Ethernet
1720 * controller. This Gigabit Ethernet Controller driver API controls
1721 * 1) Operations (i.e. port init, start, reset etc').
1722 * 2) Data flow (i.e. port send, receive etc').
1723 * Each Gigabit Ethernet port is controlled via
1724 * struct mv643xx_private.
1725 * This struct includes user configuration information as well as
1726 * driver internal data needed for its operations.
1728 * Supported Features:
1729 * - This low level driver is OS independent. Allocating memory for
1730 * the descriptor rings and buffers are not within the scope of
1732 * - The user is free from Rx/Tx queue managing.
1733 * - This low level driver introduce functionality API that enable
1734 * the to operate Marvell's Gigabit Ethernet Controller in a
1736 * - Simple Gigabit Ethernet port operation API.
1737 * - Simple Gigabit Ethernet port data flow API.
1738 * - Data flow and operation API support per queue functionality.
1739 * - Support cached descriptors for better performance.
1740 * - Enable access to all four DRAM banks and internal SRAM memory
1742 * - PHY access and control API.
1743 * - Port control register configuration API.
1744 * - Full control over Unicast and Multicast MAC configurations.
1748 * Initialization phase
1749 * This phase complete the initialization of the the
1750 * mv643xx_private struct.
1751 * User information regarding port configuration has to be set
1752 * prior to calling the port initialization routine.
1754 * In this phase any port Tx/Rx activity is halted, MIB counters
1755 * are cleared, PHY address is set according to user parameter and
1756 * access to DRAM and internal SRAM memory spaces.
1758 * Driver ring initialization
1759 * Allocating memory for the descriptor rings and buffers is not
1760 * within the scope of this driver. Thus, the user is required to
1761 * allocate memory for the descriptors ring and buffers. Those
1762 * memory parameters are used by the Rx and Tx ring initialization
1763 * routines in order to curve the descriptor linked list in a form
1765 * Note: Pay special attention to alignment issues when using
1766 * cached descriptors/buffers. In this phase the driver store
1767 * information in the mv643xx_private struct regarding each queue
1771 * This phase prepares the Ethernet port for Rx and Tx activity.
1772 * It uses the information stored in the mv643xx_private struct to
1773 * initialize the various port registers.
1776 * All packet references to/from the driver are done using
1778 * This struct is a unified struct used with Rx and Tx operations.
1779 * This way the user is not required to be familiar with neither
1780 * Tx nor Rx descriptors structures.
1781 * The driver's descriptors rings are management by indexes.
1782 * Those indexes controls the ring resources and used to indicate
1783 * a SW resource error:
1785 * This index points to the current available resource for use. For
1786 * example in Rx process this index will point to the descriptor
1787 * that will be passed to the user upon calling the receive
1788 * routine. In Tx process, this index will point to the descriptor
1789 * that will be assigned with the user packet info and transmitted.
1791 * This index points to the descriptor that need to restore its
1792 * resources. For example in Rx process, using the Rx buffer return
1793 * API will attach the buffer returned in packet info to the
1794 * descriptor pointed by 'used'. In Tx process, using the Tx
1795 * descriptor return will merely return the user packet info with
1796 * the command status of the transmitted buffer pointed by the
1797 * 'used' index. Nevertheless, it is essential to use this routine
1798 * to update the 'used' index.
1800 * This index supports Tx Scatter-Gather. It points to the first
1801 * descriptor of a packet assembled of multiple buffers. For
1802 * example when in middle of Such packet we have a Tx resource
1803 * error the 'curr' index get the value of 'first' to indicate
1804 * that the ring returned to its state before trying to transmit
1807 * Receive operation:
1808 * The eth_port_receive API set the packet information struct,
1809 * passed by the caller, with received information from the
1810 * 'current' SDMA descriptor.
1811 * It is the user responsibility to return this resource back
1812 * to the Rx descriptor ring to enable the reuse of this source.
1813 * Return Rx resource is done using the eth_rx_return_buff API.
1815 * Transmit operation:
1816 * The eth_port_send API supports Scatter-Gather which enables to
1817 * send a packet spanned over multiple buffers. This means that
1818 * for each packet info structure given by the user and put into
1819 * the Tx descriptors ring, will be transmitted only if the 'LAST'
1820 * bit will be set in the packet info command status field. This
1821 * API also consider restriction regarding buffer alignments and
1823 * The user must return a Tx resource after ensuring the buffer
1824 * has been transmitted to enable the Tx ring indexes to update.
1827 * This device is on-board. No jumper diagram is necessary.
1829 * EXTERNAL INTERFACE
1831 * Prior to calling the initialization routine eth_port_init() the user
1832 * must set the following fields under mv643xx_private struct:
1833 * port_num User Ethernet port number.
1834 * port_config User port configuration value.
1835 * port_config_extend User port config extend value.
1836 * port_sdma_config User port SDMA config value.
1837 * port_serial_control User port serial control value.
1839 * This driver data flow is done using the struct pkt_info which
1840 * is a unified struct for Rx and Tx operations:
1842 * byte_cnt Tx/Rx descriptor buffer byte count.
1843 * l4i_chk CPU provided TCP Checksum. For Tx operation
1845 * cmd_sts Tx/Rx descriptor command status.
1846 * buf_ptr Tx/Rx descriptor buffer pointer.
1847 * return_info Tx/Rx user resource return information.
1851 static int ethernet_phy_get(unsigned int eth_port_num
);
1852 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
1854 /* Ethernet Port routines */
1855 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
);
1858 * eth_port_init - Initialize the Ethernet port driver
1861 * This function prepares the ethernet port to start its activity:
1862 * 1) Completes the ethernet port driver struct initialization toward port
1864 * 2) Resets the device to a quiescent state in case of warm reboot.
1865 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1866 * 4) Clean MAC tables. The reset status of those tables is unknown.
1867 * 5) Set PHY address.
1868 * Note: Call this routine prior to eth_port_start routine and after
1869 * setting user values in the user fields of Ethernet port control
1873 * struct mv643xx_private *mp Ethernet port control struct
1881 static void eth_port_init(struct mv643xx_private
*mp
)
1883 mp
->rx_resource_err
= 0;
1884 mp
->tx_resource_err
= 0;
1886 eth_port_reset(mp
->port_num
);
1888 eth_port_init_mac_tables(mp
->port_num
);
1892 * eth_port_start - Start the Ethernet port activity.
1895 * This routine prepares the Ethernet port for Rx and Tx activity:
1896 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1897 * has been initialized a descriptor's ring (using
1898 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1899 * 2. Initialize and enable the Ethernet configuration port by writing to
1900 * the port's configuration and command registers.
1901 * 3. Initialize and enable the SDMA by writing to the SDMA's
1902 * configuration and command registers. After completing these steps,
1903 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1905 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1906 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1907 * and ether_init_rx_desc_ring for Rx queues).
1910 * dev - a pointer to the required interface
1913 * Ethernet port is ready to receive and transmit.
1918 static void eth_port_start(struct net_device
*dev
)
1920 struct mv643xx_private
*mp
= netdev_priv(dev
);
1921 unsigned int port_num
= mp
->port_num
;
1922 int tx_curr_desc
, rx_curr_desc
;
1924 struct ethtool_cmd ethtool_cmd
;
1926 /* Assignment of Tx CTRP of given queue */
1927 tx_curr_desc
= mp
->tx_curr_desc_q
;
1928 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1929 (u32
)((struct eth_tx_desc
*)mp
->tx_desc_dma
+ tx_curr_desc
));
1931 /* Assignment of Rx CRDP of given queue */
1932 rx_curr_desc
= mp
->rx_curr_desc_q
;
1933 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1934 (u32
)((struct eth_rx_desc
*)mp
->rx_desc_dma
+ rx_curr_desc
));
1936 /* Add the assigned Ethernet address to the port's address table */
1937 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
1939 /* Assign port configuration and command. */
1940 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num
),
1941 MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE
);
1943 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num
),
1944 MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE
);
1946 pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
1948 pscr
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
| MV643XX_ETH_FORCE_LINK_PASS
);
1949 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1951 pscr
|= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL
|
1952 MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII
|
1953 MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX
|
1954 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
1955 MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED
;
1957 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1959 pscr
|= MV643XX_ETH_SERIAL_PORT_ENABLE
;
1960 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1962 /* Assign port SDMA configuration */
1963 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num
),
1964 MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE
);
1966 /* Enable port Rx. */
1967 mv643xx_eth_port_enable_rx(port_num
, mp
->port_rx_queue_command
);
1969 /* Disable port bandwidth limits by clearing MTU register */
1970 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num
), 0);
1972 /* save phy settings across reset */
1973 mv643xx_get_settings(dev
, ðtool_cmd
);
1974 ethernet_phy_reset(mp
->port_num
);
1975 mv643xx_set_settings(dev
, ðtool_cmd
);
1979 * eth_port_uc_addr_set - This function Set the port Unicast address.
1982 * This function Set the port Ethernet MAC address.
1985 * unsigned int eth_port_num Port number.
1986 * char * p_addr Address to be set
1989 * Set MAC address low and high registers. also calls
1990 * eth_port_set_filter_table_entry() to set the unicast
1991 * table with the proper information.
1997 static void eth_port_uc_addr_set(unsigned int eth_port_num
,
1998 unsigned char *p_addr
)
2004 mac_l
= (p_addr
[4] << 8) | (p_addr
[5]);
2005 mac_h
= (p_addr
[0] << 24) | (p_addr
[1] << 16) | (p_addr
[2] << 8) |
2008 mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num
), mac_l
);
2009 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num
), mac_h
);
2011 /* Accept frames of this address */
2012 table
= MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num
);
2013 eth_port_set_filter_table_entry(table
, p_addr
[5] & 0x0f);
2017 * eth_port_uc_addr_get - This function retrieves the port Unicast address
2018 * (MAC address) from the ethernet hw registers.
2021 * This function retrieves the port Ethernet MAC address.
2024 * unsigned int eth_port_num Port number.
2025 * char *MacAddr pointer where the MAC address is stored
2028 * Copy the MAC address to the location pointed to by MacAddr
2034 static void eth_port_uc_addr_get(struct net_device
*dev
, unsigned char *p_addr
)
2036 struct mv643xx_private
*mp
= netdev_priv(dev
);
2040 mac_h
= mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp
->port_num
));
2041 mac_l
= mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp
->port_num
));
2043 p_addr
[0] = (mac_h
>> 24) & 0xff;
2044 p_addr
[1] = (mac_h
>> 16) & 0xff;
2045 p_addr
[2] = (mac_h
>> 8) & 0xff;
2046 p_addr
[3] = mac_h
& 0xff;
2047 p_addr
[4] = (mac_l
>> 8) & 0xff;
2048 p_addr
[5] = mac_l
& 0xff;
2052 * The entries in each table are indexed by a hash of a packet's MAC
2053 * address. One bit in each entry determines whether the packet is
2054 * accepted. There are 4 entries (each 8 bits wide) in each register
2055 * of the table. The bits in each entry are defined as follows:
2056 * 0 Accept=1, Drop=0
2057 * 3-1 Queue (ETH_Q0=0)
2060 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
)
2062 unsigned int table_reg
;
2063 unsigned int tbl_offset
;
2064 unsigned int reg_offset
;
2066 tbl_offset
= (entry
/ 4) * 4; /* Register offset of DA table entry */
2067 reg_offset
= entry
% 4; /* Entry offset within the register */
2069 /* Set "accepts frame bit" at specified table entry */
2070 table_reg
= mv_read(table
+ tbl_offset
);
2071 table_reg
|= 0x01 << (8 * reg_offset
);
2072 mv_write(table
+ tbl_offset
, table_reg
);
2076 * eth_port_mc_addr - Multicast address settings.
2078 * The MV device supports multicast using two tables:
2079 * 1) Special Multicast Table for MAC addresses of the form
2080 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
2081 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
2082 * Table entries in the DA-Filter table.
2083 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
2084 * is used as an index to the Other Multicast Table entries in the
2085 * DA-Filter table. This function calculates the CRC-8bit value.
2086 * In either case, eth_port_set_filter_table_entry() is then called
2087 * to set to set the actual table entry.
2089 static void eth_port_mc_addr(unsigned int eth_port_num
, unsigned char *p_addr
)
2093 unsigned char crc_result
= 0;
2099 if ((p_addr
[0] == 0x01) && (p_addr
[1] == 0x00) &&
2100 (p_addr
[2] == 0x5E) && (p_addr
[3] == 0x00) && (p_addr
[4] == 0x00)) {
2101 table
= MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2103 eth_port_set_filter_table_entry(table
, p_addr
[5]);
2107 /* Calculate CRC-8 out of the given address */
2108 mac_h
= (p_addr
[0] << 8) | (p_addr
[1]);
2109 mac_l
= (p_addr
[2] << 24) | (p_addr
[3] << 16) |
2110 (p_addr
[4] << 8) | (p_addr
[5] << 0);
2112 for (i
= 0; i
< 32; i
++)
2113 mac_array
[i
] = (mac_l
>> i
) & 0x1;
2114 for (i
= 32; i
< 48; i
++)
2115 mac_array
[i
] = (mac_h
>> (i
- 32)) & 0x1;
2117 crc
[0] = mac_array
[45] ^ mac_array
[43] ^ mac_array
[40] ^ mac_array
[39] ^
2118 mac_array
[35] ^ mac_array
[34] ^ mac_array
[31] ^ mac_array
[30] ^
2119 mac_array
[28] ^ mac_array
[23] ^ mac_array
[21] ^ mac_array
[19] ^
2120 mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^ mac_array
[12] ^
2121 mac_array
[8] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[0];
2123 crc
[1] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
2124 mac_array
[41] ^ mac_array
[39] ^ mac_array
[36] ^ mac_array
[34] ^
2125 mac_array
[32] ^ mac_array
[30] ^ mac_array
[29] ^ mac_array
[28] ^
2126 mac_array
[24] ^ mac_array
[23] ^ mac_array
[22] ^ mac_array
[21] ^
2127 mac_array
[20] ^ mac_array
[18] ^ mac_array
[17] ^ mac_array
[16] ^
2128 mac_array
[15] ^ mac_array
[14] ^ mac_array
[13] ^ mac_array
[12] ^
2129 mac_array
[9] ^ mac_array
[6] ^ mac_array
[1] ^ mac_array
[0];
2131 crc
[2] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[44] ^ mac_array
[43] ^
2132 mac_array
[42] ^ mac_array
[39] ^ mac_array
[37] ^ mac_array
[34] ^
2133 mac_array
[33] ^ mac_array
[29] ^ mac_array
[28] ^ mac_array
[25] ^
2134 mac_array
[24] ^ mac_array
[22] ^ mac_array
[17] ^ mac_array
[15] ^
2135 mac_array
[13] ^ mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^
2136 mac_array
[6] ^ mac_array
[2] ^ mac_array
[1] ^ mac_array
[0];
2138 crc
[3] = mac_array
[47] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
2139 mac_array
[40] ^ mac_array
[38] ^ mac_array
[35] ^ mac_array
[34] ^
2140 mac_array
[30] ^ mac_array
[29] ^ mac_array
[26] ^ mac_array
[25] ^
2141 mac_array
[23] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^
2142 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[7] ^
2143 mac_array
[3] ^ mac_array
[2] ^ mac_array
[1];
2145 crc
[4] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[41] ^
2146 mac_array
[39] ^ mac_array
[36] ^ mac_array
[35] ^ mac_array
[31] ^
2147 mac_array
[30] ^ mac_array
[27] ^ mac_array
[26] ^ mac_array
[24] ^
2148 mac_array
[19] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[14] ^
2149 mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^ mac_array
[4] ^
2150 mac_array
[3] ^ mac_array
[2];
2152 crc
[5] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[45] ^ mac_array
[42] ^
2153 mac_array
[40] ^ mac_array
[37] ^ mac_array
[36] ^ mac_array
[32] ^
2154 mac_array
[31] ^ mac_array
[28] ^ mac_array
[27] ^ mac_array
[25] ^
2155 mac_array
[20] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[15] ^
2156 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[5] ^
2157 mac_array
[4] ^ mac_array
[3];
2159 crc
[6] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[43] ^ mac_array
[41] ^
2160 mac_array
[38] ^ mac_array
[37] ^ mac_array
[33] ^ mac_array
[32] ^
2161 mac_array
[29] ^ mac_array
[28] ^ mac_array
[26] ^ mac_array
[21] ^
2162 mac_array
[19] ^ mac_array
[17] ^ mac_array
[16] ^ mac_array
[14] ^
2163 mac_array
[12] ^ mac_array
[10] ^ mac_array
[6] ^ mac_array
[5] ^
2166 crc
[7] = mac_array
[47] ^ mac_array
[44] ^ mac_array
[42] ^ mac_array
[39] ^
2167 mac_array
[38] ^ mac_array
[34] ^ mac_array
[33] ^ mac_array
[30] ^
2168 mac_array
[29] ^ mac_array
[27] ^ mac_array
[22] ^ mac_array
[20] ^
2169 mac_array
[18] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[13] ^
2170 mac_array
[11] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[5];
2172 for (i
= 0; i
< 8; i
++)
2173 crc_result
= crc_result
| (crc
[i
] << i
);
2175 table
= MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
);
2176 eth_port_set_filter_table_entry(table
, crc_result
);
2180 * Set the entire multicast list based on dev->mc_list.
2182 static void eth_port_set_multicast_list(struct net_device
*dev
)
2185 struct dev_mc_list
*mc_list
;
2188 struct mv643xx_private
*mp
= netdev_priv(dev
);
2189 unsigned int eth_port_num
= mp
->port_num
;
2191 /* If the device is in promiscuous mode or in all multicast mode,
2192 * we will fully populate both multicast tables with accept.
2193 * This is guaranteed to yield a match on all multicast addresses...
2195 if ((dev
->flags
& IFF_PROMISC
) || (dev
->flags
& IFF_ALLMULTI
)) {
2196 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2197 /* Set all entries in DA filter special multicast
2199 * Set for ETH_Q0 for now
2201 * 0 Accept=1, Drop=0
2202 * 3-1 Queue ETH_Q0=0
2205 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2207 /* Set all entries in DA filter other multicast
2209 * Set for ETH_Q0 for now
2211 * 0 Accept=1, Drop=0
2212 * 3-1 Queue ETH_Q0=0
2215 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2220 /* We will clear out multicast tables every time we get the list.
2221 * Then add the entire new list...
2223 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2224 /* Clear DA filter special multicast table (Ex_dFSMT) */
2225 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2226 (eth_port_num
) + table_index
, 0);
2228 /* Clear DA filter other multicast table (Ex_dFOMT) */
2229 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2230 (eth_port_num
) + table_index
, 0);
2233 /* Get pointer to net_device multicast list and add each one... */
2234 for (i
= 0, mc_list
= dev
->mc_list
;
2235 (i
< 256) && (mc_list
!= NULL
) && (i
< dev
->mc_count
);
2236 i
++, mc_list
= mc_list
->next
)
2237 if (mc_list
->dmi_addrlen
== 6)
2238 eth_port_mc_addr(eth_port_num
, mc_list
->dmi_addr
);
2242 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2245 * Go through all the DA filter tables (Unicast, Special Multicast &
2246 * Other Multicast) and set each entry to 0.
2249 * unsigned int eth_port_num Ethernet Port number.
2252 * Multicast and Unicast packets are rejected.
2257 static void eth_port_init_mac_tables(unsigned int eth_port_num
)
2261 /* Clear DA filter unicast table (Ex_dFUT) */
2262 for (table_index
= 0; table_index
<= 0xC; table_index
+= 4)
2263 mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2264 (eth_port_num
) + table_index
, 0);
2266 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2267 /* Clear DA filter special multicast table (Ex_dFSMT) */
2268 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2269 (eth_port_num
) + table_index
, 0);
2270 /* Clear DA filter other multicast table (Ex_dFOMT) */
2271 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2272 (eth_port_num
) + table_index
, 0);
2277 * eth_clear_mib_counters - Clear all MIB counters
2280 * This function clears all MIB counters of a specific ethernet port.
2281 * A read from the MIB counter will reset the counter.
2284 * unsigned int eth_port_num Ethernet Port number.
2287 * After reading all MIB counters, the counters resets.
2290 * MIB counter value.
2293 static void eth_clear_mib_counters(unsigned int eth_port_num
)
2297 /* Perform dummy reads from MIB counters */
2298 for (i
= ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
; i
< ETH_MIB_LATE_COLLISION
;
2300 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num
) + i
);
2303 static inline u32
read_mib(struct mv643xx_private
*mp
, int offset
)
2305 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp
->port_num
) + offset
);
2308 static void eth_update_mib_counters(struct mv643xx_private
*mp
)
2310 struct mv643xx_mib_counters
*p
= &mp
->mib_counters
;
2313 p
->good_octets_received
+=
2314 read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
);
2315 p
->good_octets_received
+=
2316 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
) << 32;
2318 for (offset
= ETH_MIB_BAD_OCTETS_RECEIVED
;
2319 offset
<= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS
;
2321 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2323 p
->good_octets_sent
+= read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_LOW
);
2324 p
->good_octets_sent
+=
2325 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_HIGH
) << 32;
2327 for (offset
= ETH_MIB_GOOD_FRAMES_SENT
;
2328 offset
<= ETH_MIB_LATE_COLLISION
;
2330 *(u32
*)((char *)p
+ offset
) = read_mib(mp
, offset
);
2334 * ethernet_phy_detect - Detect whether a phy is present
2337 * This function tests whether there is a PHY present on
2338 * the specified port.
2341 * unsigned int eth_port_num Ethernet Port number.
2348 * -ENODEV on failure
2351 static int ethernet_phy_detect(unsigned int port_num
)
2353 unsigned int phy_reg_data0
;
2356 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2357 auto_neg
= phy_reg_data0
& 0x1000;
2358 phy_reg_data0
^= 0x1000; /* invert auto_neg */
2359 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2361 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2362 if ((phy_reg_data0
& 0x1000) == auto_neg
)
2363 return -ENODEV
; /* change didn't take */
2365 phy_reg_data0
^= 0x1000;
2366 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2371 * ethernet_phy_get - Get the ethernet port PHY address.
2374 * This routine returns the given ethernet port PHY address.
2377 * unsigned int eth_port_num Ethernet Port number.
2386 static int ethernet_phy_get(unsigned int eth_port_num
)
2388 unsigned int reg_data
;
2390 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2392 return ((reg_data
>> (5 * eth_port_num
)) & 0x1f);
2396 * ethernet_phy_set - Set the ethernet port PHY address.
2399 * This routine sets the given ethernet port PHY address.
2402 * unsigned int eth_port_num Ethernet Port number.
2403 * int phy_addr PHY address.
2412 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
)
2415 int addr_shift
= 5 * eth_port_num
;
2417 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2418 reg_data
&= ~(0x1f << addr_shift
);
2419 reg_data
|= (phy_addr
& 0x1f) << addr_shift
;
2420 mv_write(MV643XX_ETH_PHY_ADDR_REG
, reg_data
);
2424 * ethernet_phy_reset - Reset Ethernet port PHY.
2427 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2430 * unsigned int eth_port_num Ethernet Port number.
2439 static void ethernet_phy_reset(unsigned int eth_port_num
)
2441 unsigned int phy_reg_data
;
2444 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2445 phy_reg_data
|= 0x8000; /* Set bit 15 to reset the PHY */
2446 eth_port_write_smi_reg(eth_port_num
, 0, phy_reg_data
);
2448 /* wait for PHY to come out of reset */
2451 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2452 } while (phy_reg_data
& 0x8000);
2455 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
2456 unsigned int channels
)
2458 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
), channels
);
2461 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
2462 unsigned int channels
)
2464 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
), channels
);
2467 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
)
2471 /* Stop Tx port activity. Check port Tx activity. */
2472 channels
= mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2475 /* Issue stop command for active channels only */
2476 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
),
2479 /* Wait for all Tx activity to terminate. */
2480 /* Check port cause register that all Tx queues are stopped */
2481 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2483 udelay(PHY_WAIT_MICRO_SECONDS
);
2485 /* Wait for Tx FIFO to empty */
2486 while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num
)) &
2487 ETH_PORT_TX_FIFO_EMPTY
)
2488 udelay(PHY_WAIT_MICRO_SECONDS
);
2494 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
)
2498 /* Stop Rx port activity. Check port Rx activity. */
2499 channels
= mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2502 /* Issue stop command for active channels only */
2503 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
),
2506 /* Wait for all Rx activity to terminate. */
2507 /* Check port cause register that all Rx queues are stopped */
2508 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2510 udelay(PHY_WAIT_MICRO_SECONDS
);
2517 * eth_port_reset - Reset Ethernet port
2520 * This routine resets the chip by aborting any SDMA engine activity and
2521 * clearing the MIB counters. The Receiver and the Transmit unit are in
2522 * idle state after this command is performed and the port is disabled.
2525 * unsigned int eth_port_num Ethernet Port number.
2528 * Channel activity is halted.
2534 static void eth_port_reset(unsigned int port_num
)
2536 unsigned int reg_data
;
2538 mv643xx_eth_port_disable_tx(port_num
);
2539 mv643xx_eth_port_disable_rx(port_num
);
2541 /* Clear all MIB counters */
2542 eth_clear_mib_counters(port_num
);
2544 /* Reset the Enable bit in the Configuration Register */
2545 reg_data
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
2546 reg_data
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
|
2547 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
2548 MV643XX_ETH_FORCE_LINK_PASS
);
2549 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), reg_data
);
2554 * eth_port_read_smi_reg - Read PHY registers
2557 * This routine utilize the SMI interface to interact with the PHY in
2558 * order to perform PHY register read.
2561 * unsigned int port_num Ethernet Port number.
2562 * unsigned int phy_reg PHY register address offset.
2563 * unsigned int *value Register value buffer.
2566 * Write the value of a specified PHY register into given buffer.
2569 * false if the PHY is busy or read data is not in valid state.
2573 static void eth_port_read_smi_reg(unsigned int port_num
,
2574 unsigned int phy_reg
, unsigned int *value
)
2576 int phy_addr
= ethernet_phy_get(port_num
);
2577 unsigned long flags
;
2580 /* the SMI register is a shared resource */
2581 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2583 /* wait for the SMI register to become available */
2584 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2585 if (i
== PHY_WAIT_ITERATIONS
) {
2586 printk("mv643xx PHY busy timeout, port %d\n", port_num
);
2589 udelay(PHY_WAIT_MICRO_SECONDS
);
2592 mv_write(MV643XX_ETH_SMI_REG
,
2593 (phy_addr
<< 16) | (phy_reg
<< 21) | ETH_SMI_OPCODE_READ
);
2595 /* now wait for the data to be valid */
2596 for (i
= 0; !(mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_READ_VALID
); i
++) {
2597 if (i
== PHY_WAIT_ITERATIONS
) {
2598 printk("mv643xx PHY read timeout, port %d\n", port_num
);
2601 udelay(PHY_WAIT_MICRO_SECONDS
);
2604 *value
= mv_read(MV643XX_ETH_SMI_REG
) & 0xffff;
2606 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2610 * eth_port_write_smi_reg - Write to PHY registers
2613 * This routine utilize the SMI interface to interact with the PHY in
2614 * order to perform writes to PHY registers.
2617 * unsigned int eth_port_num Ethernet Port number.
2618 * unsigned int phy_reg PHY register address offset.
2619 * unsigned int value Register value.
2622 * Write the given value to the specified PHY register.
2625 * false if the PHY is busy.
2629 static void eth_port_write_smi_reg(unsigned int eth_port_num
,
2630 unsigned int phy_reg
, unsigned int value
)
2634 unsigned long flags
;
2636 phy_addr
= ethernet_phy_get(eth_port_num
);
2638 /* the SMI register is a shared resource */
2639 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2641 /* wait for the SMI register to become available */
2642 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2643 if (i
== PHY_WAIT_ITERATIONS
) {
2644 printk("mv643xx PHY busy timeout, port %d\n",
2648 udelay(PHY_WAIT_MICRO_SECONDS
);
2651 mv_write(MV643XX_ETH_SMI_REG
, (phy_addr
<< 16) | (phy_reg
<< 21) |
2652 ETH_SMI_OPCODE_WRITE
| (value
& 0xffff));
2654 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2658 * Wrappers for MII support library.
2660 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
)
2663 struct mv643xx_private
*mp
= netdev_priv(dev
);
2665 eth_port_read_smi_reg(mp
->port_num
, location
, &val
);
2669 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
)
2671 struct mv643xx_private
*mp
= netdev_priv(dev
);
2672 eth_port_write_smi_reg(mp
->port_num
, location
, val
);
2676 * eth_port_send - Send an Ethernet packet
2679 * This routine send a given packet described by p_pktinfo parameter. It
2680 * supports transmitting of a packet spaned over multiple buffers. The
2681 * routine updates 'curr' and 'first' indexes according to the packet
2682 * segment passed to the routine. In case the packet segment is first,
2683 * the 'first' index is update. In any case, the 'curr' index is updated.
2684 * If the routine get into Tx resource error it assigns 'curr' index as
2685 * 'first'. This way the function can abort Tx process of multiple
2686 * descriptors per packet.
2689 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2690 * struct pkt_info *p_pkt_info User packet buffer.
2693 * Tx ring 'curr' and 'first' indexes are updated.
2696 * ETH_QUEUE_FULL in case of Tx resource error.
2697 * ETH_ERROR in case the routine can not access Tx desc ring.
2698 * ETH_QUEUE_LAST_RESOURCE if the routine uses the last Tx resource.
2702 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
2704 * Modified to include the first descriptor pointer in case of SG
2706 static ETH_FUNC_RET_STATUS
eth_port_send(struct mv643xx_private
*mp
,
2707 struct pkt_info
*p_pkt_info
)
2709 int tx_desc_curr
, tx_desc_used
, tx_first_desc
, tx_next_desc
;
2710 struct eth_tx_desc
*current_descriptor
;
2711 struct eth_tx_desc
*first_descriptor
;
2714 /* Do not process Tx ring in case of Tx ring resource error */
2715 if (mp
->tx_resource_err
)
2716 return ETH_QUEUE_FULL
;
2719 * The hardware requires that each buffer that is <= 8 bytes
2720 * in length must be aligned on an 8 byte boundary.
2722 if (p_pkt_info
->byte_cnt
<= 8 && p_pkt_info
->buf_ptr
& 0x7) {
2724 "mv643xx_eth port %d: packet size <= 8 problem\n",
2729 mp
->tx_desc_count
++;
2730 BUG_ON(mp
->tx_desc_count
> mp
->tx_ring_size
);
2732 /* Get the Tx Desc ring indexes */
2733 tx_desc_curr
= mp
->tx_curr_desc_q
;
2734 tx_desc_used
= mp
->tx_used_desc_q
;
2736 current_descriptor
= &mp
->p_tx_desc_area
[tx_desc_curr
];
2738 tx_next_desc
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
2740 current_descriptor
->buf_ptr
= p_pkt_info
->buf_ptr
;
2741 current_descriptor
->byte_cnt
= p_pkt_info
->byte_cnt
;
2742 current_descriptor
->l4i_chk
= p_pkt_info
->l4i_chk
;
2743 mp
->tx_skb
[tx_desc_curr
] = p_pkt_info
->return_info
;
2745 command
= p_pkt_info
->cmd_sts
| ETH_ZERO_PADDING
| ETH_GEN_CRC
|
2746 ETH_BUFFER_OWNED_BY_DMA
;
2747 if (command
& ETH_TX_FIRST_DESC
) {
2748 tx_first_desc
= tx_desc_curr
;
2749 mp
->tx_first_desc_q
= tx_first_desc
;
2750 first_descriptor
= current_descriptor
;
2751 mp
->tx_first_command
= command
;
2753 tx_first_desc
= mp
->tx_first_desc_q
;
2754 first_descriptor
= &mp
->p_tx_desc_area
[tx_first_desc
];
2755 BUG_ON(first_descriptor
== NULL
);
2756 current_descriptor
->cmd_sts
= command
;
2759 if (command
& ETH_TX_LAST_DESC
) {
2761 first_descriptor
->cmd_sts
= mp
->tx_first_command
;
2764 mv643xx_eth_port_enable_tx(mp
->port_num
, mp
->port_tx_queue_command
);
2767 * Finish Tx packet. Update first desc in case of Tx resource
2769 tx_first_desc
= tx_next_desc
;
2770 mp
->tx_first_desc_q
= tx_first_desc
;
2773 /* Check for ring index overlap in the Tx desc ring */
2774 if (tx_next_desc
== tx_desc_used
) {
2775 mp
->tx_resource_err
= 1;
2776 mp
->tx_curr_desc_q
= tx_first_desc
;
2778 return ETH_QUEUE_LAST_RESOURCE
;
2781 mp
->tx_curr_desc_q
= tx_next_desc
;
2786 static ETH_FUNC_RET_STATUS
eth_port_send(struct mv643xx_private
*mp
,
2787 struct pkt_info
*p_pkt_info
)
2791 struct eth_tx_desc
*current_descriptor
;
2792 unsigned int command_status
;
2794 /* Do not process Tx ring in case of Tx ring resource error */
2795 if (mp
->tx_resource_err
)
2796 return ETH_QUEUE_FULL
;
2798 mp
->tx_desc_count
++;
2799 BUG_ON(mp
->tx_desc_count
> mp
->tx_ring_size
);
2801 /* Get the Tx Desc ring indexes */
2802 tx_desc_curr
= mp
->tx_curr_desc_q
;
2803 tx_desc_used
= mp
->tx_used_desc_q
;
2804 current_descriptor
= &mp
->p_tx_desc_area
[tx_desc_curr
];
2806 command_status
= p_pkt_info
->cmd_sts
| ETH_ZERO_PADDING
| ETH_GEN_CRC
;
2807 current_descriptor
->buf_ptr
= p_pkt_info
->buf_ptr
;
2808 current_descriptor
->byte_cnt
= p_pkt_info
->byte_cnt
;
2809 mp
->tx_skb
[tx_desc_curr
] = p_pkt_info
->return_info
;
2811 /* Set last desc with DMA ownership and interrupt enable. */
2813 current_descriptor
->cmd_sts
= command_status
|
2814 ETH_BUFFER_OWNED_BY_DMA
| ETH_TX_ENABLE_INTERRUPT
;
2817 mv643xx_eth_port_enable_tx(mp
->port_num
, mp
->port_tx_queue_command
);
2819 /* Finish Tx packet. Update first desc in case of Tx resource error */
2820 tx_desc_curr
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
2822 /* Update the current descriptor */
2823 mp
->tx_curr_desc_q
= tx_desc_curr
;
2825 /* Check for ring index overlap in the Tx desc ring */
2826 if (tx_desc_curr
== tx_desc_used
) {
2827 mp
->tx_resource_err
= 1;
2828 return ETH_QUEUE_LAST_RESOURCE
;
2836 * eth_tx_return_desc - Free all used Tx descriptors
2839 * This routine returns the transmitted packet information to the caller.
2840 * It uses the 'first' index to support Tx desc return in case a transmit
2841 * of a packet spanned over multiple buffer still in process.
2842 * In case the Tx queue was in "resource error" condition, where there are
2843 * no available Tx resources, the function resets the resource error flag.
2846 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2847 * struct pkt_info *p_pkt_info User packet buffer.
2850 * Tx ring 'first' and 'used' indexes are updated.
2854 * ETH_ERROR otherwise.
2857 static ETH_FUNC_RET_STATUS
eth_tx_return_desc(struct mv643xx_private
*mp
,
2858 struct pkt_info
*p_pkt_info
)
2862 struct eth_tx_desc
*p_tx_desc_used
;
2863 unsigned int command_status
;
2864 unsigned long flags
;
2867 spin_lock_irqsave(&mp
->lock
, flags
);
2869 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
2870 tx_busy_desc
= mp
->tx_first_desc_q
;
2872 tx_busy_desc
= mp
->tx_curr_desc_q
;
2875 /* Get the Tx Desc ring indexes */
2876 tx_desc_used
= mp
->tx_used_desc_q
;
2878 p_tx_desc_used
= &mp
->p_tx_desc_area
[tx_desc_used
];
2881 if (p_tx_desc_used
== NULL
) {
2886 /* Stop release. About to overlap the current available Tx descriptor */
2887 if (tx_desc_used
== tx_busy_desc
&& !mp
->tx_resource_err
) {
2892 command_status
= p_tx_desc_used
->cmd_sts
;
2894 /* Still transmitting... */
2895 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
)) {
2900 /* Pass the packet information to the caller */
2901 p_pkt_info
->cmd_sts
= command_status
;
2902 p_pkt_info
->return_info
= mp
->tx_skb
[tx_desc_used
];
2903 p_pkt_info
->buf_ptr
= p_tx_desc_used
->buf_ptr
;
2904 p_pkt_info
->byte_cnt
= p_tx_desc_used
->byte_cnt
;
2905 mp
->tx_skb
[tx_desc_used
] = NULL
;
2907 /* Update the next descriptor to release. */
2908 mp
->tx_used_desc_q
= (tx_desc_used
+ 1) % mp
->tx_ring_size
;
2910 /* Any Tx return cancels the Tx resource error status */
2911 mp
->tx_resource_err
= 0;
2913 BUG_ON(mp
->tx_desc_count
== 0);
2914 mp
->tx_desc_count
--;
2917 spin_unlock_irqrestore(&mp
->lock
, flags
);
2923 * eth_port_receive - Get received information from Rx ring.
2926 * This routine returns the received data to the caller. There is no
2927 * data copying during routine operation. All information is returned
2928 * using pointer to packet information struct passed from the caller.
2929 * If the routine exhausts Rx ring resources then the resource error flag
2933 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2934 * struct pkt_info *p_pkt_info User packet buffer.
2937 * Rx ring current and used indexes are updated.
2940 * ETH_ERROR in case the routine can not access Rx desc ring.
2941 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2942 * ETH_END_OF_JOB if there is no received data.
2945 static ETH_FUNC_RET_STATUS
eth_port_receive(struct mv643xx_private
*mp
,
2946 struct pkt_info
*p_pkt_info
)
2948 int rx_next_curr_desc
, rx_curr_desc
, rx_used_desc
;
2949 volatile struct eth_rx_desc
*p_rx_desc
;
2950 unsigned int command_status
;
2951 unsigned long flags
;
2953 /* Do not process Rx ring in case of Rx ring resource error */
2954 if (mp
->rx_resource_err
)
2955 return ETH_QUEUE_FULL
;
2957 spin_lock_irqsave(&mp
->lock
, flags
);
2959 /* Get the Rx Desc ring 'curr and 'used' indexes */
2960 rx_curr_desc
= mp
->rx_curr_desc_q
;
2961 rx_used_desc
= mp
->rx_used_desc_q
;
2963 p_rx_desc
= &mp
->p_rx_desc_area
[rx_curr_desc
];
2965 /* The following parameters are used to save readings from memory */
2966 command_status
= p_rx_desc
->cmd_sts
;
2969 /* Nothing to receive... */
2970 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
)) {
2971 spin_unlock_irqrestore(&mp
->lock
, flags
);
2972 return ETH_END_OF_JOB
;
2975 p_pkt_info
->byte_cnt
= (p_rx_desc
->byte_cnt
) - RX_BUF_OFFSET
;
2976 p_pkt_info
->cmd_sts
= command_status
;
2977 p_pkt_info
->buf_ptr
= (p_rx_desc
->buf_ptr
) + RX_BUF_OFFSET
;
2978 p_pkt_info
->return_info
= mp
->rx_skb
[rx_curr_desc
];
2979 p_pkt_info
->l4i_chk
= p_rx_desc
->buf_size
;
2982 * Clean the return info field to indicate that the
2983 * packet has been moved to the upper layers
2985 mp
->rx_skb
[rx_curr_desc
] = NULL
;
2987 /* Update current index in data structure */
2988 rx_next_curr_desc
= (rx_curr_desc
+ 1) % mp
->rx_ring_size
;
2989 mp
->rx_curr_desc_q
= rx_next_curr_desc
;
2991 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2992 if (rx_next_curr_desc
== rx_used_desc
)
2993 mp
->rx_resource_err
= 1;
2995 spin_unlock_irqrestore(&mp
->lock
, flags
);
3001 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
3004 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
3005 * next 'used' descriptor and attached the returned buffer to it.
3006 * In case the Rx ring was in "resource error" condition, where there are
3007 * no available Rx resources, the function resets the resource error flag.
3010 * struct mv643xx_private *mp Ethernet Port Control srtuct.
3011 * struct pkt_info *p_pkt_info Information on returned buffer.
3014 * New available Rx resource in Rx descriptor ring.
3017 * ETH_ERROR in case the routine can not access Rx desc ring.
3020 static ETH_FUNC_RET_STATUS
eth_rx_return_buff(struct mv643xx_private
*mp
,
3021 struct pkt_info
*p_pkt_info
)
3023 int used_rx_desc
; /* Where to return Rx resource */
3024 volatile struct eth_rx_desc
*p_used_rx_desc
;
3025 unsigned long flags
;
3027 spin_lock_irqsave(&mp
->lock
, flags
);
3029 /* Get 'used' Rx descriptor */
3030 used_rx_desc
= mp
->rx_used_desc_q
;
3031 p_used_rx_desc
= &mp
->p_rx_desc_area
[used_rx_desc
];
3033 p_used_rx_desc
->buf_ptr
= p_pkt_info
->buf_ptr
;
3034 p_used_rx_desc
->buf_size
= p_pkt_info
->byte_cnt
;
3035 mp
->rx_skb
[used_rx_desc
] = p_pkt_info
->return_info
;
3037 /* Flush the write pipe */
3039 /* Return the descriptor to DMA ownership */
3041 p_used_rx_desc
->cmd_sts
=
3042 ETH_BUFFER_OWNED_BY_DMA
| ETH_RX_ENABLE_INTERRUPT
;
3045 /* Move the used descriptor pointer to the next descriptor */
3046 mp
->rx_used_desc_q
= (used_rx_desc
+ 1) % mp
->rx_ring_size
;
3048 /* Any Rx return cancels the Rx resource error status */
3049 mp
->rx_resource_err
= 0;
3051 spin_unlock_irqrestore(&mp
->lock
, flags
);
3056 /************* Begin ethtool support *************************/
3058 struct mv643xx_stats
{
3059 char stat_string
[ETH_GSTRING_LEN
];
3064 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
3065 offsetof(struct mv643xx_private, m)
3067 static const struct mv643xx_stats mv643xx_gstrings_stats
[] = {
3068 { "rx_packets", MV643XX_STAT(stats
.rx_packets
) },
3069 { "tx_packets", MV643XX_STAT(stats
.tx_packets
) },
3070 { "rx_bytes", MV643XX_STAT(stats
.rx_bytes
) },
3071 { "tx_bytes", MV643XX_STAT(stats
.tx_bytes
) },
3072 { "rx_errors", MV643XX_STAT(stats
.rx_errors
) },
3073 { "tx_errors", MV643XX_STAT(stats
.tx_errors
) },
3074 { "rx_dropped", MV643XX_STAT(stats
.rx_dropped
) },
3075 { "tx_dropped", MV643XX_STAT(stats
.tx_dropped
) },
3076 { "good_octets_received", MV643XX_STAT(mib_counters
.good_octets_received
) },
3077 { "bad_octets_received", MV643XX_STAT(mib_counters
.bad_octets_received
) },
3078 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters
.internal_mac_transmit_err
) },
3079 { "good_frames_received", MV643XX_STAT(mib_counters
.good_frames_received
) },
3080 { "bad_frames_received", MV643XX_STAT(mib_counters
.bad_frames_received
) },
3081 { "broadcast_frames_received", MV643XX_STAT(mib_counters
.broadcast_frames_received
) },
3082 { "multicast_frames_received", MV643XX_STAT(mib_counters
.multicast_frames_received
) },
3083 { "frames_64_octets", MV643XX_STAT(mib_counters
.frames_64_octets
) },
3084 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters
.frames_65_to_127_octets
) },
3085 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters
.frames_128_to_255_octets
) },
3086 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters
.frames_256_to_511_octets
) },
3087 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters
.frames_512_to_1023_octets
) },
3088 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters
.frames_1024_to_max_octets
) },
3089 { "good_octets_sent", MV643XX_STAT(mib_counters
.good_octets_sent
) },
3090 { "good_frames_sent", MV643XX_STAT(mib_counters
.good_frames_sent
) },
3091 { "excessive_collision", MV643XX_STAT(mib_counters
.excessive_collision
) },
3092 { "multicast_frames_sent", MV643XX_STAT(mib_counters
.multicast_frames_sent
) },
3093 { "broadcast_frames_sent", MV643XX_STAT(mib_counters
.broadcast_frames_sent
) },
3094 { "unrec_mac_control_received", MV643XX_STAT(mib_counters
.unrec_mac_control_received
) },
3095 { "fc_sent", MV643XX_STAT(mib_counters
.fc_sent
) },
3096 { "good_fc_received", MV643XX_STAT(mib_counters
.good_fc_received
) },
3097 { "bad_fc_received", MV643XX_STAT(mib_counters
.bad_fc_received
) },
3098 { "undersize_received", MV643XX_STAT(mib_counters
.undersize_received
) },
3099 { "fragments_received", MV643XX_STAT(mib_counters
.fragments_received
) },
3100 { "oversize_received", MV643XX_STAT(mib_counters
.oversize_received
) },
3101 { "jabber_received", MV643XX_STAT(mib_counters
.jabber_received
) },
3102 { "mac_receive_error", MV643XX_STAT(mib_counters
.mac_receive_error
) },
3103 { "bad_crc_event", MV643XX_STAT(mib_counters
.bad_crc_event
) },
3104 { "collision", MV643XX_STAT(mib_counters
.collision
) },
3105 { "late_collision", MV643XX_STAT(mib_counters
.late_collision
) },
3108 #define MV643XX_STATS_LEN \
3109 sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
3111 static void mv643xx_get_drvinfo(struct net_device
*netdev
,
3112 struct ethtool_drvinfo
*drvinfo
)
3114 strncpy(drvinfo
->driver
, mv643xx_driver_name
, 32);
3115 strncpy(drvinfo
->version
, mv643xx_driver_version
, 32);
3116 strncpy(drvinfo
->fw_version
, "N/A", 32);
3117 strncpy(drvinfo
->bus_info
, "mv643xx", 32);
3118 drvinfo
->n_stats
= MV643XX_STATS_LEN
;
3121 static int mv643xx_get_stats_count(struct net_device
*netdev
)
3123 return MV643XX_STATS_LEN
;
3126 static void mv643xx_get_ethtool_stats(struct net_device
*netdev
,
3127 struct ethtool_stats
*stats
, uint64_t *data
)
3129 struct mv643xx_private
*mp
= netdev
->priv
;
3132 eth_update_mib_counters(mp
);
3134 for (i
= 0; i
< MV643XX_STATS_LEN
; i
++) {
3135 char *p
= (char *)mp
+mv643xx_gstrings_stats
[i
].stat_offset
;
3136 data
[i
] = (mv643xx_gstrings_stats
[i
].sizeof_stat
==
3137 sizeof(uint64_t)) ? *(uint64_t *)p
: *(uint32_t *)p
;
3141 static void mv643xx_get_strings(struct net_device
*netdev
, uint32_t stringset
,
3148 for (i
=0; i
< MV643XX_STATS_LEN
; i
++) {
3149 memcpy(data
+ i
* ETH_GSTRING_LEN
,
3150 mv643xx_gstrings_stats
[i
].stat_string
,
3157 static u32
mv643xx_eth_get_link(struct net_device
*dev
)
3159 struct mv643xx_private
*mp
= netdev_priv(dev
);
3161 return mii_link_ok(&mp
->mii
);
3164 static int mv643xx_eth_nway_restart(struct net_device
*dev
)
3166 struct mv643xx_private
*mp
= netdev_priv(dev
);
3168 return mii_nway_restart(&mp
->mii
);
3171 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
3173 struct mv643xx_private
*mp
= netdev_priv(dev
);
3175 return generic_mii_ioctl(&mp
->mii
, if_mii(ifr
), cmd
, NULL
);
3178 static struct ethtool_ops mv643xx_ethtool_ops
= {
3179 .get_settings
= mv643xx_get_settings
,
3180 .set_settings
= mv643xx_set_settings
,
3181 .get_drvinfo
= mv643xx_get_drvinfo
,
3182 .get_link
= mv643xx_eth_get_link
,
3183 .get_sg
= ethtool_op_get_sg
,
3184 .set_sg
= ethtool_op_set_sg
,
3185 .get_strings
= mv643xx_get_strings
,
3186 .get_stats_count
= mv643xx_get_stats_count
,
3187 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
3188 .get_strings
= mv643xx_get_strings
,
3189 .get_stats_count
= mv643xx_get_stats_count
,
3190 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
3191 .nway_reset
= mv643xx_eth_nway_restart
,
3194 /************* End ethtool support *************************/