2 * Driver for Marvell Discovery (MV643XX) and Marvell Orion ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2006 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
53 /* Static function declarations */
54 static void eth_port_uc_addr_get(unsigned int port_num
, unsigned char *p_addr
);
55 static void eth_port_uc_addr_set(unsigned int port_num
, unsigned char *p_addr
);
56 static void eth_port_set_multicast_list(struct net_device
*);
57 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
59 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
61 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
);
62 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
);
63 static int mv643xx_eth_open(struct net_device
*);
64 static int mv643xx_eth_stop(struct net_device
*);
65 static int mv643xx_eth_change_mtu(struct net_device
*, int);
66 static void eth_port_init_mac_tables(unsigned int eth_port_num
);
68 static int mv643xx_poll(struct napi_struct
*napi
, int budget
);
70 static int ethernet_phy_get(unsigned int eth_port_num
);
71 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
72 static int ethernet_phy_detect(unsigned int eth_port_num
);
73 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
);
74 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
);
75 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
);
76 static const struct ethtool_ops mv643xx_ethtool_ops
;
78 static char mv643xx_driver_name
[] = "mv643xx_eth";
79 static char mv643xx_driver_version
[] = "1.0";
81 static void __iomem
*mv643xx_eth_base
;
83 /* used to protect SMI_REG, which is shared across ports */
84 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock
);
86 static inline u32
mv_read(int offset
)
88 return readl(mv643xx_eth_base
+ offset
);
91 static inline void mv_write(int offset
, u32 data
)
93 writel(data
, mv643xx_eth_base
+ offset
);
97 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
99 * Input : pointer to ethernet interface network device structure
101 * Output : 0 upon success, -EINVAL upon failure
103 static int mv643xx_eth_change_mtu(struct net_device
*dev
, int new_mtu
)
105 if ((new_mtu
> 9500) || (new_mtu
< 64))
110 * Stop then re-open the interface. This will allocate RX skb's with
112 * There is a possible danger that the open will not successed, due
113 * to memory is full, which might fail the open function.
115 if (netif_running(dev
)) {
116 mv643xx_eth_stop(dev
);
117 if (mv643xx_eth_open(dev
))
119 "%s: Fatal error on opening device\n",
127 * mv643xx_eth_rx_refill_descs
129 * Fills / refills RX queue on a certain gigabit ethernet port
131 * Input : pointer to ethernet interface network device structure
134 static void mv643xx_eth_rx_refill_descs(struct net_device
*dev
)
136 struct mv643xx_private
*mp
= netdev_priv(dev
);
137 struct pkt_info pkt_info
;
141 while (mp
->rx_desc_count
< mp
->rx_ring_size
) {
142 skb
= dev_alloc_skb(ETH_RX_SKB_SIZE
+ dma_get_cache_alignment());
146 unaligned
= (u32
)skb
->data
& (dma_get_cache_alignment() - 1);
148 skb_reserve(skb
, dma_get_cache_alignment() - unaligned
);
149 pkt_info
.cmd_sts
= ETH_RX_ENABLE_INTERRUPT
;
150 pkt_info
.byte_cnt
= ETH_RX_SKB_SIZE
;
151 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
,
152 ETH_RX_SKB_SIZE
, DMA_FROM_DEVICE
);
153 pkt_info
.return_info
= skb
;
154 if (eth_rx_return_buff(mp
, &pkt_info
) != ETH_OK
) {
156 "%s: Error allocating RX Ring\n", dev
->name
);
159 skb_reserve(skb
, ETH_HW_IP_ALIGN
);
162 * If RX ring is empty of SKB, set a timer to try allocating
163 * again at a later time.
165 if (mp
->rx_desc_count
== 0) {
166 printk(KERN_INFO
"%s: Rx ring is empty\n", dev
->name
);
167 mp
->timeout
.expires
= jiffies
+ (HZ
/ 10); /* 100 mSec */
168 add_timer(&mp
->timeout
);
173 * mv643xx_eth_rx_refill_descs_timer_wrapper
175 * Timer routine to wake up RX queue filling task. This function is
176 * used only in case the RX queue is empty, and all alloc_skb has
177 * failed (due to out of memory event).
179 * Input : pointer to ethernet interface network device structure
182 static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data
)
184 mv643xx_eth_rx_refill_descs((struct net_device
*)data
);
188 * mv643xx_eth_update_mac_address
190 * Update the MAC address of the port in the address table
192 * Input : pointer to ethernet interface network device structure
195 static void mv643xx_eth_update_mac_address(struct net_device
*dev
)
197 struct mv643xx_private
*mp
= netdev_priv(dev
);
198 unsigned int port_num
= mp
->port_num
;
200 eth_port_init_mac_tables(port_num
);
201 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
205 * mv643xx_eth_set_rx_mode
207 * Change from promiscuos to regular rx mode
209 * Input : pointer to ethernet interface network device structure
212 static void mv643xx_eth_set_rx_mode(struct net_device
*dev
)
214 struct mv643xx_private
*mp
= netdev_priv(dev
);
217 config_reg
= mv_read(PORT_CONFIG_REG(mp
->port_num
));
218 if (dev
->flags
& IFF_PROMISC
)
219 config_reg
|= (u32
) UNICAST_PROMISCUOUS_MODE
;
221 config_reg
&= ~(u32
) UNICAST_PROMISCUOUS_MODE
;
222 mv_write(PORT_CONFIG_REG(mp
->port_num
), config_reg
);
224 eth_port_set_multicast_list(dev
);
228 * mv643xx_eth_set_mac_address
230 * Change the interface's mac address.
231 * No special hardware thing should be done because interface is always
232 * put in promiscuous mode.
234 * Input : pointer to ethernet interface network device structure and
235 * a pointer to the designated entry to be added to the cache.
236 * Output : zero upon success, negative upon failure
238 static int mv643xx_eth_set_mac_address(struct net_device
*dev
, void *addr
)
242 for (i
= 0; i
< 6; i
++)
243 /* +2 is for the offset of the HW addr type */
244 dev
->dev_addr
[i
] = ((unsigned char *)addr
)[i
+ 2];
245 mv643xx_eth_update_mac_address(dev
);
250 * mv643xx_eth_tx_timeout
252 * Called upon a timeout on transmitting a packet
254 * Input : pointer to ethernet interface network device structure.
257 static void mv643xx_eth_tx_timeout(struct net_device
*dev
)
259 struct mv643xx_private
*mp
= netdev_priv(dev
);
261 printk(KERN_INFO
"%s: TX timeout ", dev
->name
);
263 /* Do the reset outside of interrupt context */
264 schedule_work(&mp
->tx_timeout_task
);
268 * mv643xx_eth_tx_timeout_task
270 * Actual routine to reset the adapter when a timeout on Tx has occurred
272 static void mv643xx_eth_tx_timeout_task(struct work_struct
*ugly
)
274 struct mv643xx_private
*mp
= container_of(ugly
, struct mv643xx_private
,
276 struct net_device
*dev
= mp
->mii
.dev
; /* yuck */
278 if (!netif_running(dev
))
281 netif_stop_queue(dev
);
283 eth_port_reset(mp
->port_num
);
286 if (mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
287 netif_wake_queue(dev
);
291 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
293 * If force is non-zero, frees uncompleted descriptors as well
295 int mv643xx_eth_free_tx_descs(struct net_device
*dev
, int force
)
297 struct mv643xx_private
*mp
= netdev_priv(dev
);
298 struct eth_tx_desc
*desc
;
307 while (mp
->tx_desc_count
> 0) {
308 spin_lock_irqsave(&mp
->lock
, flags
);
310 /* tx_desc_count might have changed before acquiring the lock */
311 if (mp
->tx_desc_count
<= 0) {
312 spin_unlock_irqrestore(&mp
->lock
, flags
);
316 tx_index
= mp
->tx_used_desc_q
;
317 desc
= &mp
->p_tx_desc_area
[tx_index
];
318 cmd_sts
= desc
->cmd_sts
;
320 if (!force
&& (cmd_sts
& ETH_BUFFER_OWNED_BY_DMA
)) {
321 spin_unlock_irqrestore(&mp
->lock
, flags
);
325 mp
->tx_used_desc_q
= (tx_index
+ 1) % mp
->tx_ring_size
;
328 addr
= desc
->buf_ptr
;
329 count
= desc
->byte_cnt
;
330 skb
= mp
->tx_skb
[tx_index
];
332 mp
->tx_skb
[tx_index
] = NULL
;
334 if (cmd_sts
& ETH_ERROR_SUMMARY
) {
335 printk("%s: Error in TX\n", dev
->name
);
336 dev
->stats
.tx_errors
++;
339 spin_unlock_irqrestore(&mp
->lock
, flags
);
341 if (cmd_sts
& ETH_TX_FIRST_DESC
)
342 dma_unmap_single(NULL
, addr
, count
, DMA_TO_DEVICE
);
344 dma_unmap_page(NULL
, addr
, count
, DMA_TO_DEVICE
);
347 dev_kfree_skb_irq(skb
);
355 static void mv643xx_eth_free_completed_tx_descs(struct net_device
*dev
)
357 struct mv643xx_private
*mp
= netdev_priv(dev
);
359 if (mv643xx_eth_free_tx_descs(dev
, 0) &&
360 mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
361 netif_wake_queue(dev
);
364 static void mv643xx_eth_free_all_tx_descs(struct net_device
*dev
)
366 mv643xx_eth_free_tx_descs(dev
, 1);
370 * mv643xx_eth_receive
372 * This function is forward packets that are received from the port's
373 * queues toward kernel core or FastRoute them to another interface.
375 * Input : dev - a pointer to the required interface
376 * max - maximum number to receive (0 means unlimted)
378 * Output : number of served packets
380 static int mv643xx_eth_receive_queue(struct net_device
*dev
, int budget
)
382 struct mv643xx_private
*mp
= netdev_priv(dev
);
383 struct net_device_stats
*stats
= &dev
->stats
;
384 unsigned int received_packets
= 0;
386 struct pkt_info pkt_info
;
388 while (budget
-- > 0 && eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
389 dma_unmap_single(NULL
, pkt_info
.buf_ptr
, ETH_RX_SKB_SIZE
,
396 * Note byte count includes 4 byte CRC count
399 stats
->rx_bytes
+= pkt_info
.byte_cnt
;
400 skb
= pkt_info
.return_info
;
402 * In case received a packet without first / last bits on OR
403 * the error summary bit is on, the packets needs to be dropeed.
405 if (((pkt_info
.cmd_sts
406 & (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) !=
407 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
))
408 || (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)) {
410 if ((pkt_info
.cmd_sts
& (ETH_RX_FIRST_DESC
|
411 ETH_RX_LAST_DESC
)) !=
412 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) {
415 "%s: Received packet spread "
416 "on multiple descriptors\n",
419 if (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)
422 dev_kfree_skb_irq(skb
);
425 * The -4 is for the CRC in the trailer of the
428 skb_put(skb
, pkt_info
.byte_cnt
- 4);
430 if (pkt_info
.cmd_sts
& ETH_LAYER_4_CHECKSUM_OK
) {
431 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
433 (pkt_info
.cmd_sts
& 0x0007fff8) >> 3);
435 skb
->protocol
= eth_type_trans(skb
, dev
);
437 netif_receive_skb(skb
);
442 dev
->last_rx
= jiffies
;
444 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
446 return received_packets
;
449 /* Set the mv643xx port configuration register for the speed/duplex mode. */
450 static void mv643xx_eth_update_pscr(struct net_device
*dev
,
451 struct ethtool_cmd
*ecmd
)
453 struct mv643xx_private
*mp
= netdev_priv(dev
);
454 int port_num
= mp
->port_num
;
458 o_pscr
= mv_read(PORT_SERIAL_CONTROL_REG(port_num
));
461 /* clear speed, duplex and rx buffer size fields */
462 n_pscr
&= ~(SET_MII_SPEED_TO_100
|
463 SET_GMII_SPEED_TO_1000
|
464 SET_FULL_DUPLEX_MODE
|
467 if (ecmd
->duplex
== DUPLEX_FULL
)
468 n_pscr
|= SET_FULL_DUPLEX_MODE
;
470 if (ecmd
->speed
== SPEED_1000
)
471 n_pscr
|= SET_GMII_SPEED_TO_1000
|
472 MAX_RX_PACKET_9700BYTE
;
474 if (ecmd
->speed
== SPEED_100
)
475 n_pscr
|= SET_MII_SPEED_TO_100
;
476 n_pscr
|= MAX_RX_PACKET_1522BYTE
;
479 if (n_pscr
!= o_pscr
) {
480 if ((o_pscr
& SERIAL_PORT_ENABLE
) == 0)
481 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), n_pscr
);
483 queues
= mv643xx_eth_port_disable_tx(port_num
);
485 o_pscr
&= ~SERIAL_PORT_ENABLE
;
486 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), o_pscr
);
487 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), n_pscr
);
488 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), n_pscr
);
490 mv643xx_eth_port_enable_tx(port_num
, queues
);
496 * mv643xx_eth_int_handler
498 * Main interrupt handler for the gigbit ethernet ports
500 * Input : irq - irq number (not used)
501 * dev_id - a pointer to the required interface's data structure
506 static irqreturn_t
mv643xx_eth_int_handler(int irq
, void *dev_id
)
508 struct net_device
*dev
= (struct net_device
*)dev_id
;
509 struct mv643xx_private
*mp
= netdev_priv(dev
);
510 u32 eth_int_cause
, eth_int_cause_ext
= 0;
511 unsigned int port_num
= mp
->port_num
;
513 /* Read interrupt cause registers */
514 eth_int_cause
= mv_read(INTERRUPT_CAUSE_REG(port_num
)) &
516 if (eth_int_cause
& ETH_INT_CAUSE_EXT
) {
517 eth_int_cause_ext
= mv_read(
518 INTERRUPT_CAUSE_EXTEND_REG(port_num
)) &
519 ETH_INT_UNMASK_ALL_EXT
;
520 mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num
),
524 /* PHY status changed */
525 if (eth_int_cause_ext
& (ETH_INT_CAUSE_PHY
| ETH_INT_CAUSE_STATE
)) {
526 struct ethtool_cmd cmd
;
528 if (mii_link_ok(&mp
->mii
)) {
529 mii_ethtool_gset(&mp
->mii
, &cmd
);
530 mv643xx_eth_update_pscr(dev
, &cmd
);
531 mv643xx_eth_port_enable_tx(port_num
,
532 ETH_TX_QUEUES_ENABLED
);
533 if (!netif_carrier_ok(dev
)) {
534 netif_carrier_on(dev
);
535 if (mp
->tx_ring_size
- mp
->tx_desc_count
>=
537 netif_wake_queue(dev
);
539 } else if (netif_carrier_ok(dev
)) {
540 netif_stop_queue(dev
);
541 netif_carrier_off(dev
);
546 if (eth_int_cause
& ETH_INT_CAUSE_RX
) {
547 /* schedule the NAPI poll routine to maintain port */
548 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
550 /* wait for previous write to complete */
551 mv_read(INTERRUPT_MASK_REG(port_num
));
553 netif_rx_schedule(dev
, &mp
->napi
);
556 if (eth_int_cause
& ETH_INT_CAUSE_RX
)
557 mv643xx_eth_receive_queue(dev
, INT_MAX
);
559 if (eth_int_cause_ext
& ETH_INT_CAUSE_TX
)
560 mv643xx_eth_free_completed_tx_descs(dev
);
563 * If no real interrupt occured, exit.
564 * This can happen when using gigE interrupt coalescing mechanism.
566 if ((eth_int_cause
== 0x0) && (eth_int_cause_ext
== 0x0))
575 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
578 * This routine sets the RX coalescing interrupt mechanism parameter.
579 * This parameter is a timeout counter, that counts in 64 t_clk
580 * chunks ; that when timeout event occurs a maskable interrupt
582 * The parameter is calculated using the tClk of the MV-643xx chip
583 * , and the required delay of the interrupt in usec.
586 * unsigned int eth_port_num Ethernet port number
587 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
588 * unsigned int delay Delay in usec
591 * Interrupt coalescing mechanism value is set in MV-643xx chip.
594 * The interrupt coalescing value set in the gigE port.
597 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num
,
598 unsigned int t_clk
, unsigned int delay
)
600 unsigned int coal
= ((t_clk
/ 1000000) * delay
) / 64;
602 /* Set RX Coalescing mechanism */
603 mv_write(SDMA_CONFIG_REG(eth_port_num
),
604 ((coal
& 0x3fff) << 8) |
605 (mv_read(SDMA_CONFIG_REG(eth_port_num
))
613 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
616 * This routine sets the TX coalescing interrupt mechanism parameter.
617 * This parameter is a timeout counter, that counts in 64 t_clk
618 * chunks ; that when timeout event occurs a maskable interrupt
620 * The parameter is calculated using the t_cLK frequency of the
621 * MV-643xx chip and the required delay in the interrupt in uSec
624 * unsigned int eth_port_num Ethernet port number
625 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
626 * unsigned int delay Delay in uSeconds
629 * Interrupt coalescing mechanism value is set in MV-643xx chip.
632 * The interrupt coalescing value set in the gigE port.
635 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num
,
636 unsigned int t_clk
, unsigned int delay
)
639 coal
= ((t_clk
/ 1000000) * delay
) / 64;
640 /* Set TX Coalescing mechanism */
641 mv_write(TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num
), coal
<< 4);
646 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
649 * This function prepares a Rx chained list of descriptors and packet
650 * buffers in a form of a ring. The routine must be called after port
651 * initialization routine and before port start routine.
652 * The Ethernet SDMA engine uses CPU bus addresses to access the various
653 * devices in the system (i.e. DRAM). This function uses the ethernet
654 * struct 'virtual to physical' routine (set by the user) to set the ring
655 * with physical addresses.
658 * struct mv643xx_private *mp Ethernet Port Control srtuct.
661 * The routine updates the Ethernet port control struct with information
662 * regarding the Rx descriptors and buffers.
667 static void ether_init_rx_desc_ring(struct mv643xx_private
*mp
)
669 volatile struct eth_rx_desc
*p_rx_desc
;
670 int rx_desc_num
= mp
->rx_ring_size
;
673 /* initialize the next_desc_ptr links in the Rx descriptors ring */
674 p_rx_desc
= (struct eth_rx_desc
*)mp
->p_rx_desc_area
;
675 for (i
= 0; i
< rx_desc_num
; i
++) {
676 p_rx_desc
[i
].next_desc_ptr
= mp
->rx_desc_dma
+
677 ((i
+ 1) % rx_desc_num
) * sizeof(struct eth_rx_desc
);
680 /* Save Rx desc pointer to driver struct. */
681 mp
->rx_curr_desc_q
= 0;
682 mp
->rx_used_desc_q
= 0;
684 mp
->rx_desc_area_size
= rx_desc_num
* sizeof(struct eth_rx_desc
);
688 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
691 * This function prepares a Tx chained list of descriptors and packet
692 * buffers in a form of a ring. The routine must be called after port
693 * initialization routine and before port start routine.
694 * The Ethernet SDMA engine uses CPU bus addresses to access the various
695 * devices in the system (i.e. DRAM). This function uses the ethernet
696 * struct 'virtual to physical' routine (set by the user) to set the ring
697 * with physical addresses.
700 * struct mv643xx_private *mp Ethernet Port Control srtuct.
703 * The routine updates the Ethernet port control struct with information
704 * regarding the Tx descriptors and buffers.
709 static void ether_init_tx_desc_ring(struct mv643xx_private
*mp
)
711 int tx_desc_num
= mp
->tx_ring_size
;
712 struct eth_tx_desc
*p_tx_desc
;
715 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
716 p_tx_desc
= (struct eth_tx_desc
*)mp
->p_tx_desc_area
;
717 for (i
= 0; i
< tx_desc_num
; i
++) {
718 p_tx_desc
[i
].next_desc_ptr
= mp
->tx_desc_dma
+
719 ((i
+ 1) % tx_desc_num
) * sizeof(struct eth_tx_desc
);
722 mp
->tx_curr_desc_q
= 0;
723 mp
->tx_used_desc_q
= 0;
725 mp
->tx_desc_area_size
= tx_desc_num
* sizeof(struct eth_tx_desc
);
728 static int mv643xx_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
730 struct mv643xx_private
*mp
= netdev_priv(dev
);
733 spin_lock_irq(&mp
->lock
);
734 err
= mii_ethtool_sset(&mp
->mii
, cmd
);
735 spin_unlock_irq(&mp
->lock
);
740 static int mv643xx_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
742 struct mv643xx_private
*mp
= netdev_priv(dev
);
745 spin_lock_irq(&mp
->lock
);
746 err
= mii_ethtool_gset(&mp
->mii
, cmd
);
747 spin_unlock_irq(&mp
->lock
);
749 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
750 cmd
->supported
&= ~SUPPORTED_1000baseT_Half
;
751 cmd
->advertising
&= ~ADVERTISED_1000baseT_Half
;
759 * This function is called when openning the network device. The function
760 * should initialize all the hardware, initialize cyclic Rx/Tx
761 * descriptors chain and buffers and allocate an IRQ to the network
764 * Input : a pointer to the network device structure
766 * Output : zero of success , nonzero if fails.
769 static int mv643xx_eth_open(struct net_device
*dev
)
771 struct mv643xx_private
*mp
= netdev_priv(dev
);
772 unsigned int port_num
= mp
->port_num
;
776 /* Clear any pending ethernet port interrupts */
777 mv_write(INTERRUPT_CAUSE_REG(port_num
), 0);
778 mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
779 /* wait for previous write to complete */
780 mv_read (INTERRUPT_CAUSE_EXTEND_REG(port_num
));
782 err
= request_irq(dev
->irq
, mv643xx_eth_int_handler
,
783 IRQF_SHARED
| IRQF_SAMPLE_RANDOM
, dev
->name
, dev
);
785 printk(KERN_ERR
"Can not assign IRQ number to MV643XX_eth%d\n",
792 memset(&mp
->timeout
, 0, sizeof(struct timer_list
));
793 mp
->timeout
.function
= mv643xx_eth_rx_refill_descs_timer_wrapper
;
794 mp
->timeout
.data
= (unsigned long)dev
;
796 /* Allocate RX and TX skb rings */
797 mp
->rx_skb
= kmalloc(sizeof(*mp
->rx_skb
) * mp
->rx_ring_size
,
800 printk(KERN_ERR
"%s: Cannot allocate Rx skb ring\n", dev
->name
);
804 mp
->tx_skb
= kmalloc(sizeof(*mp
->tx_skb
) * mp
->tx_ring_size
,
807 printk(KERN_ERR
"%s: Cannot allocate Tx skb ring\n", dev
->name
);
809 goto out_free_rx_skb
;
812 /* Allocate TX ring */
813 mp
->tx_desc_count
= 0;
814 size
= mp
->tx_ring_size
* sizeof(struct eth_tx_desc
);
815 mp
->tx_desc_area_size
= size
;
817 if (mp
->tx_sram_size
) {
818 mp
->p_tx_desc_area
= ioremap(mp
->tx_sram_addr
,
820 mp
->tx_desc_dma
= mp
->tx_sram_addr
;
822 mp
->p_tx_desc_area
= dma_alloc_coherent(NULL
, size
,
826 if (!mp
->p_tx_desc_area
) {
827 printk(KERN_ERR
"%s: Cannot allocate Tx Ring (size %d bytes)\n",
830 goto out_free_tx_skb
;
832 BUG_ON((u32
) mp
->p_tx_desc_area
& 0xf); /* check 16-byte alignment */
833 memset((void *)mp
->p_tx_desc_area
, 0, mp
->tx_desc_area_size
);
835 ether_init_tx_desc_ring(mp
);
837 /* Allocate RX ring */
838 mp
->rx_desc_count
= 0;
839 size
= mp
->rx_ring_size
* sizeof(struct eth_rx_desc
);
840 mp
->rx_desc_area_size
= size
;
842 if (mp
->rx_sram_size
) {
843 mp
->p_rx_desc_area
= ioremap(mp
->rx_sram_addr
,
845 mp
->rx_desc_dma
= mp
->rx_sram_addr
;
847 mp
->p_rx_desc_area
= dma_alloc_coherent(NULL
, size
,
851 if (!mp
->p_rx_desc_area
) {
852 printk(KERN_ERR
"%s: Cannot allocate Rx ring (size %d bytes)\n",
854 printk(KERN_ERR
"%s: Freeing previously allocated TX queues...",
856 if (mp
->rx_sram_size
)
857 iounmap(mp
->p_tx_desc_area
);
859 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
860 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
862 goto out_free_tx_skb
;
864 memset((void *)mp
->p_rx_desc_area
, 0, size
);
866 ether_init_rx_desc_ring(mp
);
868 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
871 napi_enable(&mp
->napi
);
876 /* Interrupt Coalescing */
880 eth_port_set_rx_coal(port_num
, 133000000, MV643XX_RX_COAL
);
884 eth_port_set_tx_coal(port_num
, 133000000, MV643XX_TX_COAL
);
886 /* Unmask phy and link status changes interrupts */
887 mv_write(INTERRUPT_EXTEND_MASK_REG(port_num
), ETH_INT_UNMASK_ALL_EXT
);
889 /* Unmask RX buffer and TX end interrupt */
890 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
899 free_irq(dev
->irq
, dev
);
904 static void mv643xx_eth_free_tx_rings(struct net_device
*dev
)
906 struct mv643xx_private
*mp
= netdev_priv(dev
);
909 mv643xx_eth_port_disable_tx(mp
->port_num
);
911 /* Free outstanding skb's on TX ring */
912 mv643xx_eth_free_all_tx_descs(dev
);
914 BUG_ON(mp
->tx_used_desc_q
!= mp
->tx_curr_desc_q
);
917 if (mp
->tx_sram_size
)
918 iounmap(mp
->p_tx_desc_area
);
920 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
921 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
924 static void mv643xx_eth_free_rx_rings(struct net_device
*dev
)
926 struct mv643xx_private
*mp
= netdev_priv(dev
);
927 unsigned int port_num
= mp
->port_num
;
931 mv643xx_eth_port_disable_rx(port_num
);
933 /* Free preallocated skb's on RX rings */
934 for (curr
= 0; mp
->rx_desc_count
&& curr
< mp
->rx_ring_size
; curr
++) {
935 if (mp
->rx_skb
[curr
]) {
936 dev_kfree_skb(mp
->rx_skb
[curr
]);
941 if (mp
->rx_desc_count
)
943 "%s: Error in freeing Rx Ring. %d skb's still"
944 " stuck in RX Ring - ignoring them\n", dev
->name
,
947 if (mp
->rx_sram_size
)
948 iounmap(mp
->p_rx_desc_area
);
950 dma_free_coherent(NULL
, mp
->rx_desc_area_size
,
951 mp
->p_rx_desc_area
, mp
->rx_desc_dma
);
957 * This function is used when closing the network device.
958 * It updates the hardware,
959 * release all memory that holds buffers and descriptors and release the IRQ.
960 * Input : a pointer to the device structure
961 * Output : zero if success , nonzero if fails
964 static int mv643xx_eth_stop(struct net_device
*dev
)
966 struct mv643xx_private
*mp
= netdev_priv(dev
);
967 unsigned int port_num
= mp
->port_num
;
969 /* Mask all interrupts on ethernet port */
970 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
971 /* wait for previous write to complete */
972 mv_read(INTERRUPT_MASK_REG(port_num
));
975 napi_disable(&mp
->napi
);
977 netif_carrier_off(dev
);
978 netif_stop_queue(dev
);
980 eth_port_reset(mp
->port_num
);
982 mv643xx_eth_free_tx_rings(dev
);
983 mv643xx_eth_free_rx_rings(dev
);
985 free_irq(dev
->irq
, dev
);
994 * This function is used in case of NAPI
996 static int mv643xx_poll(struct napi_struct
*napi
, int budget
)
998 struct mv643xx_private
*mp
= container_of(napi
, struct mv643xx_private
, napi
);
999 struct net_device
*dev
= mp
->dev
;
1000 unsigned int port_num
= mp
->port_num
;
1003 #ifdef MV643XX_TX_FAST_REFILL
1004 if (++mp
->tx_clean_threshold
> 5) {
1005 mv643xx_eth_free_completed_tx_descs(dev
);
1006 mp
->tx_clean_threshold
= 0;
1011 if ((mv_read(RX_CURRENT_QUEUE_DESC_PTR_0(port_num
)))
1012 != (u32
) mp
->rx_used_desc_q
)
1013 work_done
= mv643xx_eth_receive_queue(dev
, budget
);
1015 if (work_done
< budget
) {
1016 netif_rx_complete(dev
, napi
);
1017 mv_write(INTERRUPT_CAUSE_REG(port_num
), 0);
1018 mv_write(INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
1019 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
1027 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
1029 * Hardware can't handle unaligned fragments smaller than 9 bytes.
1030 * This helper function detects that case.
1033 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff
*skb
)
1038 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1039 fragp
= &skb_shinfo(skb
)->frags
[frag
];
1040 if (fragp
->size
<= 8 && fragp
->page_offset
& 0x7)
1047 * eth_alloc_tx_desc_index - return the index of the next available tx desc
1049 static int eth_alloc_tx_desc_index(struct mv643xx_private
*mp
)
1053 BUG_ON(mp
->tx_desc_count
>= mp
->tx_ring_size
);
1055 tx_desc_curr
= mp
->tx_curr_desc_q
;
1056 mp
->tx_curr_desc_q
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
1058 BUG_ON(mp
->tx_curr_desc_q
== mp
->tx_used_desc_q
);
1060 return tx_desc_curr
;
1064 * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
1066 * Ensure the data for each fragment to be transmitted is mapped properly,
1067 * then fill in descriptors in the tx hw queue.
1069 static void eth_tx_fill_frag_descs(struct mv643xx_private
*mp
,
1070 struct sk_buff
*skb
)
1074 struct eth_tx_desc
*desc
;
1076 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1077 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
1079 tx_index
= eth_alloc_tx_desc_index(mp
);
1080 desc
= &mp
->p_tx_desc_area
[tx_index
];
1082 desc
->cmd_sts
= ETH_BUFFER_OWNED_BY_DMA
;
1083 /* Last Frag enables interrupt and frees the skb */
1084 if (frag
== (skb_shinfo(skb
)->nr_frags
- 1)) {
1085 desc
->cmd_sts
|= ETH_ZERO_PADDING
|
1087 ETH_TX_ENABLE_INTERRUPT
;
1088 mp
->tx_skb
[tx_index
] = skb
;
1090 mp
->tx_skb
[tx_index
] = NULL
;
1092 desc
= &mp
->p_tx_desc_area
[tx_index
];
1094 desc
->byte_cnt
= this_frag
->size
;
1095 desc
->buf_ptr
= dma_map_page(NULL
, this_frag
->page
,
1096 this_frag
->page_offset
,
1103 * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw
1105 * Ensure the data for an skb to be transmitted is mapped properly,
1106 * then fill in descriptors in the tx hw queue and start the hardware.
1108 static void eth_tx_submit_descs_for_skb(struct mv643xx_private
*mp
,
1109 struct sk_buff
*skb
)
1112 struct eth_tx_desc
*desc
;
1115 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
1117 cmd_sts
= ETH_TX_FIRST_DESC
| ETH_GEN_CRC
| ETH_BUFFER_OWNED_BY_DMA
;
1119 tx_index
= eth_alloc_tx_desc_index(mp
);
1120 desc
= &mp
->p_tx_desc_area
[tx_index
];
1123 eth_tx_fill_frag_descs(mp
, skb
);
1125 length
= skb_headlen(skb
);
1126 mp
->tx_skb
[tx_index
] = NULL
;
1128 cmd_sts
|= ETH_ZERO_PADDING
|
1130 ETH_TX_ENABLE_INTERRUPT
;
1132 mp
->tx_skb
[tx_index
] = skb
;
1135 desc
->byte_cnt
= length
;
1136 desc
->buf_ptr
= dma_map_single(NULL
, skb
->data
, length
, DMA_TO_DEVICE
);
1138 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1139 BUG_ON(skb
->protocol
!= ETH_P_IP
);
1141 cmd_sts
|= ETH_GEN_TCP_UDP_CHECKSUM
|
1142 ETH_GEN_IP_V_4_CHECKSUM
|
1143 ip_hdr(skb
)->ihl
<< ETH_TX_IHL_SHIFT
;
1145 switch (ip_hdr(skb
)->protocol
) {
1147 cmd_sts
|= ETH_UDP_FRAME
;
1148 desc
->l4i_chk
= udp_hdr(skb
)->check
;
1151 desc
->l4i_chk
= tcp_hdr(skb
)->check
;
1157 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1158 cmd_sts
|= 5 << ETH_TX_IHL_SHIFT
;
1162 /* ensure all other descriptors are written before first cmd_sts */
1164 desc
->cmd_sts
= cmd_sts
;
1166 /* ensure all descriptors are written before poking hardware */
1168 mv643xx_eth_port_enable_tx(mp
->port_num
, ETH_TX_QUEUES_ENABLED
);
1170 mp
->tx_desc_count
+= nr_frags
+ 1;
1174 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
1177 static int mv643xx_eth_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1179 struct mv643xx_private
*mp
= netdev_priv(dev
);
1180 struct net_device_stats
*stats
= &dev
->stats
;
1181 unsigned long flags
;
1183 BUG_ON(netif_queue_stopped(dev
));
1184 BUG_ON(skb
== NULL
);
1186 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
) {
1187 printk(KERN_ERR
"%s: transmit with queue full\n", dev
->name
);
1188 netif_stop_queue(dev
);
1192 if (has_tiny_unaligned_frags(skb
)) {
1193 if (__skb_linearize(skb
)) {
1194 stats
->tx_dropped
++;
1195 printk(KERN_DEBUG
"%s: failed to linearize tiny "
1196 "unaligned fragment\n", dev
->name
);
1201 spin_lock_irqsave(&mp
->lock
, flags
);
1203 eth_tx_submit_descs_for_skb(mp
, skb
);
1204 stats
->tx_bytes
+= skb
->len
;
1205 stats
->tx_packets
++;
1206 dev
->trans_start
= jiffies
;
1208 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
)
1209 netif_stop_queue(dev
);
1211 spin_unlock_irqrestore(&mp
->lock
, flags
);
1213 return 0; /* success */
1216 #ifdef CONFIG_NET_POLL_CONTROLLER
1217 static void mv643xx_netpoll(struct net_device
*netdev
)
1219 struct mv643xx_private
*mp
= netdev_priv(netdev
);
1220 int port_num
= mp
->port_num
;
1222 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
1223 /* wait for previous write to complete */
1224 mv_read(INTERRUPT_MASK_REG(port_num
));
1226 mv643xx_eth_int_handler(netdev
->irq
, netdev
);
1228 mv_write(INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
1232 static void mv643xx_init_ethtool_cmd(struct net_device
*dev
, int phy_address
,
1233 int speed
, int duplex
,
1234 struct ethtool_cmd
*cmd
)
1236 struct mv643xx_private
*mp
= netdev_priv(dev
);
1238 memset(cmd
, 0, sizeof(*cmd
));
1240 cmd
->port
= PORT_MII
;
1241 cmd
->transceiver
= XCVR_INTERNAL
;
1242 cmd
->phy_address
= phy_address
;
1245 cmd
->autoneg
= AUTONEG_ENABLE
;
1246 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1247 cmd
->speed
= SPEED_100
;
1248 cmd
->advertising
= ADVERTISED_10baseT_Half
|
1249 ADVERTISED_10baseT_Full
|
1250 ADVERTISED_100baseT_Half
|
1251 ADVERTISED_100baseT_Full
;
1252 if (mp
->mii
.supports_gmii
)
1253 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
1255 cmd
->autoneg
= AUTONEG_DISABLE
;
1257 cmd
->duplex
= duplex
;
1264 * First function called after registering the network device.
1265 * It's purpose is to initialize the device as an ethernet device,
1266 * fill the ethernet device structure with pointers * to functions,
1267 * and set the MAC address of the interface
1269 * Input : struct device *
1270 * Output : -ENOMEM if failed , 0 if success
1272 static int mv643xx_eth_probe(struct platform_device
*pdev
)
1274 struct mv643xx_eth_platform_data
*pd
;
1276 struct mv643xx_private
*mp
;
1277 struct net_device
*dev
;
1279 struct resource
*res
;
1281 struct ethtool_cmd cmd
;
1282 int duplex
= DUPLEX_HALF
;
1283 int speed
= 0; /* default to auto-negotiation */
1284 DECLARE_MAC_BUF(mac
);
1286 pd
= pdev
->dev
.platform_data
;
1288 printk(KERN_ERR
"No mv643xx_eth_platform_data\n");
1292 dev
= alloc_etherdev(sizeof(struct mv643xx_private
));
1296 platform_set_drvdata(pdev
, dev
);
1298 mp
= netdev_priv(dev
);
1301 netif_napi_add(dev
, &mp
->napi
, mv643xx_poll
, 64);
1304 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1306 dev
->irq
= res
->start
;
1308 dev
->open
= mv643xx_eth_open
;
1309 dev
->stop
= mv643xx_eth_stop
;
1310 dev
->hard_start_xmit
= mv643xx_eth_start_xmit
;
1311 dev
->set_mac_address
= mv643xx_eth_set_mac_address
;
1312 dev
->set_multicast_list
= mv643xx_eth_set_rx_mode
;
1314 /* No need to Tx Timeout */
1315 dev
->tx_timeout
= mv643xx_eth_tx_timeout
;
1317 #ifdef CONFIG_NET_POLL_CONTROLLER
1318 dev
->poll_controller
= mv643xx_netpoll
;
1321 dev
->watchdog_timeo
= 2 * HZ
;
1323 dev
->change_mtu
= mv643xx_eth_change_mtu
;
1324 dev
->do_ioctl
= mv643xx_eth_do_ioctl
;
1325 SET_ETHTOOL_OPS(dev
, &mv643xx_ethtool_ops
);
1327 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1328 #ifdef MAX_SKB_FRAGS
1330 * Zero copy can only work if we use Discovery II memory. Else, we will
1331 * have to map the buffers to ISA memory which is only 16 MB
1333 dev
->features
= NETIF_F_SG
| NETIF_F_IP_CSUM
;
1337 /* Configure the timeout task */
1338 INIT_WORK(&mp
->tx_timeout_task
, mv643xx_eth_tx_timeout_task
);
1340 spin_lock_init(&mp
->lock
);
1342 port_num
= mp
->port_num
= pd
->port_number
;
1344 /* set default config values */
1345 eth_port_uc_addr_get(port_num
, dev
->dev_addr
);
1346 mp
->rx_ring_size
= PORT_DEFAULT_RECEIVE_QUEUE_SIZE
;
1347 mp
->tx_ring_size
= PORT_DEFAULT_TRANSMIT_QUEUE_SIZE
;
1349 if (is_valid_ether_addr(pd
->mac_addr
))
1350 memcpy(dev
->dev_addr
, pd
->mac_addr
, 6);
1352 if (pd
->phy_addr
|| pd
->force_phy_addr
)
1353 ethernet_phy_set(port_num
, pd
->phy_addr
);
1355 if (pd
->rx_queue_size
)
1356 mp
->rx_ring_size
= pd
->rx_queue_size
;
1358 if (pd
->tx_queue_size
)
1359 mp
->tx_ring_size
= pd
->tx_queue_size
;
1361 if (pd
->tx_sram_size
) {
1362 mp
->tx_sram_size
= pd
->tx_sram_size
;
1363 mp
->tx_sram_addr
= pd
->tx_sram_addr
;
1366 if (pd
->rx_sram_size
) {
1367 mp
->rx_sram_size
= pd
->rx_sram_size
;
1368 mp
->rx_sram_addr
= pd
->rx_sram_addr
;
1371 duplex
= pd
->duplex
;
1374 /* Hook up MII support for ethtool */
1376 mp
->mii
.mdio_read
= mv643xx_mdio_read
;
1377 mp
->mii
.mdio_write
= mv643xx_mdio_write
;
1378 mp
->mii
.phy_id
= ethernet_phy_get(port_num
);
1379 mp
->mii
.phy_id_mask
= 0x3f;
1380 mp
->mii
.reg_num_mask
= 0x1f;
1382 err
= ethernet_phy_detect(port_num
);
1384 pr_debug("MV643xx ethernet port %d: "
1385 "No PHY detected at addr %d\n",
1386 port_num
, ethernet_phy_get(port_num
));
1390 ethernet_phy_reset(port_num
);
1391 mp
->mii
.supports_gmii
= mii_check_gmii_support(&mp
->mii
);
1392 mv643xx_init_ethtool_cmd(dev
, mp
->mii
.phy_id
, speed
, duplex
, &cmd
);
1393 mv643xx_eth_update_pscr(dev
, &cmd
);
1394 mv643xx_set_settings(dev
, &cmd
);
1396 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1397 err
= register_netdev(dev
);
1403 "%s: port %d with MAC address %s\n",
1404 dev
->name
, port_num
, print_mac(mac
, p
));
1406 if (dev
->features
& NETIF_F_SG
)
1407 printk(KERN_NOTICE
"%s: Scatter Gather Enabled\n", dev
->name
);
1409 if (dev
->features
& NETIF_F_IP_CSUM
)
1410 printk(KERN_NOTICE
"%s: TX TCP/IP Checksumming Supported\n",
1413 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1414 printk(KERN_NOTICE
"%s: RX TCP/UDP Checksum Offload ON \n", dev
->name
);
1418 printk(KERN_NOTICE
"%s: TX and RX Interrupt Coalescing ON \n",
1423 printk(KERN_NOTICE
"%s: RX NAPI Enabled \n", dev
->name
);
1426 if (mp
->tx_sram_size
> 0)
1427 printk(KERN_NOTICE
"%s: Using SRAM\n", dev
->name
);
1437 static int mv643xx_eth_remove(struct platform_device
*pdev
)
1439 struct net_device
*dev
= platform_get_drvdata(pdev
);
1441 unregister_netdev(dev
);
1442 flush_scheduled_work();
1445 platform_set_drvdata(pdev
, NULL
);
1449 static int mv643xx_eth_shared_probe(struct platform_device
*pdev
)
1451 struct resource
*res
;
1453 printk(KERN_NOTICE
"MV-643xx 10/100/1000 Ethernet Driver\n");
1455 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1459 mv643xx_eth_base
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
1460 if (mv643xx_eth_base
== NULL
)
1467 static int mv643xx_eth_shared_remove(struct platform_device
*pdev
)
1469 iounmap(mv643xx_eth_base
);
1470 mv643xx_eth_base
= NULL
;
1475 static void mv643xx_eth_shutdown(struct platform_device
*pdev
)
1477 struct net_device
*dev
= platform_get_drvdata(pdev
);
1478 struct mv643xx_private
*mp
= netdev_priv(dev
);
1479 unsigned int port_num
= mp
->port_num
;
1481 /* Mask all interrupts on ethernet port */
1482 mv_write(INTERRUPT_MASK_REG(port_num
), 0);
1483 mv_read (INTERRUPT_MASK_REG(port_num
));
1485 eth_port_reset(port_num
);
1488 static struct platform_driver mv643xx_eth_driver
= {
1489 .probe
= mv643xx_eth_probe
,
1490 .remove
= mv643xx_eth_remove
,
1491 .shutdown
= mv643xx_eth_shutdown
,
1493 .name
= MV643XX_ETH_NAME
,
1497 static struct platform_driver mv643xx_eth_shared_driver
= {
1498 .probe
= mv643xx_eth_shared_probe
,
1499 .remove
= mv643xx_eth_shared_remove
,
1501 .name
= MV643XX_ETH_SHARED_NAME
,
1506 * mv643xx_init_module
1508 * Registers the network drivers into the Linux kernel
1514 static int __init
mv643xx_init_module(void)
1518 rc
= platform_driver_register(&mv643xx_eth_shared_driver
);
1520 rc
= platform_driver_register(&mv643xx_eth_driver
);
1522 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1528 * mv643xx_cleanup_module
1530 * Registers the network drivers into the Linux kernel
1536 static void __exit
mv643xx_cleanup_module(void)
1538 platform_driver_unregister(&mv643xx_eth_driver
);
1539 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1542 module_init(mv643xx_init_module
);
1543 module_exit(mv643xx_cleanup_module
);
1545 MODULE_LICENSE("GPL");
1546 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1547 " and Dale Farnsworth");
1548 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1551 * The second part is the low level driver of the gigE ethernet ports.
1555 * Marvell's Gigabit Ethernet controller low level driver
1558 * This file introduce low level API to Marvell's Gigabit Ethernet
1559 * controller. This Gigabit Ethernet Controller driver API controls
1560 * 1) Operations (i.e. port init, start, reset etc').
1561 * 2) Data flow (i.e. port send, receive etc').
1562 * Each Gigabit Ethernet port is controlled via
1563 * struct mv643xx_private.
1564 * This struct includes user configuration information as well as
1565 * driver internal data needed for its operations.
1567 * Supported Features:
1568 * - This low level driver is OS independent. Allocating memory for
1569 * the descriptor rings and buffers are not within the scope of
1571 * - The user is free from Rx/Tx queue managing.
1572 * - This low level driver introduce functionality API that enable
1573 * the to operate Marvell's Gigabit Ethernet Controller in a
1575 * - Simple Gigabit Ethernet port operation API.
1576 * - Simple Gigabit Ethernet port data flow API.
1577 * - Data flow and operation API support per queue functionality.
1578 * - Support cached descriptors for better performance.
1579 * - Enable access to all four DRAM banks and internal SRAM memory
1581 * - PHY access and control API.
1582 * - Port control register configuration API.
1583 * - Full control over Unicast and Multicast MAC configurations.
1587 * Initialization phase
1588 * This phase complete the initialization of the the
1589 * mv643xx_private struct.
1590 * User information regarding port configuration has to be set
1591 * prior to calling the port initialization routine.
1593 * In this phase any port Tx/Rx activity is halted, MIB counters
1594 * are cleared, PHY address is set according to user parameter and
1595 * access to DRAM and internal SRAM memory spaces.
1597 * Driver ring initialization
1598 * Allocating memory for the descriptor rings and buffers is not
1599 * within the scope of this driver. Thus, the user is required to
1600 * allocate memory for the descriptors ring and buffers. Those
1601 * memory parameters are used by the Rx and Tx ring initialization
1602 * routines in order to curve the descriptor linked list in a form
1604 * Note: Pay special attention to alignment issues when using
1605 * cached descriptors/buffers. In this phase the driver store
1606 * information in the mv643xx_private struct regarding each queue
1610 * This phase prepares the Ethernet port for Rx and Tx activity.
1611 * It uses the information stored in the mv643xx_private struct to
1612 * initialize the various port registers.
1615 * All packet references to/from the driver are done using
1617 * This struct is a unified struct used with Rx and Tx operations.
1618 * This way the user is not required to be familiar with neither
1619 * Tx nor Rx descriptors structures.
1620 * The driver's descriptors rings are management by indexes.
1621 * Those indexes controls the ring resources and used to indicate
1622 * a SW resource error:
1624 * This index points to the current available resource for use. For
1625 * example in Rx process this index will point to the descriptor
1626 * that will be passed to the user upon calling the receive
1627 * routine. In Tx process, this index will point to the descriptor
1628 * that will be assigned with the user packet info and transmitted.
1630 * This index points to the descriptor that need to restore its
1631 * resources. For example in Rx process, using the Rx buffer return
1632 * API will attach the buffer returned in packet info to the
1633 * descriptor pointed by 'used'. In Tx process, using the Tx
1634 * descriptor return will merely return the user packet info with
1635 * the command status of the transmitted buffer pointed by the
1636 * 'used' index. Nevertheless, it is essential to use this routine
1637 * to update the 'used' index.
1639 * This index supports Tx Scatter-Gather. It points to the first
1640 * descriptor of a packet assembled of multiple buffers. For
1641 * example when in middle of Such packet we have a Tx resource
1642 * error the 'curr' index get the value of 'first' to indicate
1643 * that the ring returned to its state before trying to transmit
1646 * Receive operation:
1647 * The eth_port_receive API set the packet information struct,
1648 * passed by the caller, with received information from the
1649 * 'current' SDMA descriptor.
1650 * It is the user responsibility to return this resource back
1651 * to the Rx descriptor ring to enable the reuse of this source.
1652 * Return Rx resource is done using the eth_rx_return_buff API.
1654 * Prior to calling the initialization routine eth_port_init() the user
1655 * must set the following fields under mv643xx_private struct:
1656 * port_num User Ethernet port number.
1657 * port_config User port configuration value.
1658 * port_config_extend User port config extend value.
1659 * port_sdma_config User port SDMA config value.
1660 * port_serial_control User port serial control value.
1662 * This driver data flow is done using the struct pkt_info which
1663 * is a unified struct for Rx and Tx operations:
1665 * byte_cnt Tx/Rx descriptor buffer byte count.
1666 * l4i_chk CPU provided TCP Checksum. For Tx operation
1668 * cmd_sts Tx/Rx descriptor command status.
1669 * buf_ptr Tx/Rx descriptor buffer pointer.
1670 * return_info Tx/Rx user resource return information.
1674 static int ethernet_phy_get(unsigned int eth_port_num
);
1675 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
1677 /* Ethernet Port routines */
1678 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
);
1681 * eth_port_init - Initialize the Ethernet port driver
1684 * This function prepares the ethernet port to start its activity:
1685 * 1) Completes the ethernet port driver struct initialization toward port
1687 * 2) Resets the device to a quiescent state in case of warm reboot.
1688 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1689 * 4) Clean MAC tables. The reset status of those tables is unknown.
1690 * 5) Set PHY address.
1691 * Note: Call this routine prior to eth_port_start routine and after
1692 * setting user values in the user fields of Ethernet port control
1696 * struct mv643xx_private *mp Ethernet port control struct
1704 static void eth_port_init(struct mv643xx_private
*mp
)
1706 mp
->rx_resource_err
= 0;
1708 eth_port_reset(mp
->port_num
);
1710 eth_port_init_mac_tables(mp
->port_num
);
1714 * eth_port_start - Start the Ethernet port activity.
1717 * This routine prepares the Ethernet port for Rx and Tx activity:
1718 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1719 * has been initialized a descriptor's ring (using
1720 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1721 * 2. Initialize and enable the Ethernet configuration port by writing to
1722 * the port's configuration and command registers.
1723 * 3. Initialize and enable the SDMA by writing to the SDMA's
1724 * configuration and command registers. After completing these steps,
1725 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1727 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1728 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1729 * and ether_init_rx_desc_ring for Rx queues).
1732 * dev - a pointer to the required interface
1735 * Ethernet port is ready to receive and transmit.
1740 static void eth_port_start(struct net_device
*dev
)
1742 struct mv643xx_private
*mp
= netdev_priv(dev
);
1743 unsigned int port_num
= mp
->port_num
;
1744 int tx_curr_desc
, rx_curr_desc
;
1746 struct ethtool_cmd ethtool_cmd
;
1748 /* Assignment of Tx CTRP of given queue */
1749 tx_curr_desc
= mp
->tx_curr_desc_q
;
1750 mv_write(TX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1751 (u32
)((struct eth_tx_desc
*)mp
->tx_desc_dma
+ tx_curr_desc
));
1753 /* Assignment of Rx CRDP of given queue */
1754 rx_curr_desc
= mp
->rx_curr_desc_q
;
1755 mv_write(RX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1756 (u32
)((struct eth_rx_desc
*)mp
->rx_desc_dma
+ rx_curr_desc
));
1758 /* Add the assigned Ethernet address to the port's address table */
1759 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
1761 /* Assign port configuration and command. */
1762 mv_write(PORT_CONFIG_REG(port_num
),
1763 PORT_CONFIG_DEFAULT_VALUE
);
1765 mv_write(PORT_CONFIG_EXTEND_REG(port_num
),
1766 PORT_CONFIG_EXTEND_DEFAULT_VALUE
);
1768 pscr
= mv_read(PORT_SERIAL_CONTROL_REG(port_num
));
1770 pscr
&= ~(SERIAL_PORT_ENABLE
| FORCE_LINK_PASS
);
1771 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1773 pscr
|= DISABLE_AUTO_NEG_FOR_FLOW_CTRL
|
1774 DISABLE_AUTO_NEG_SPEED_GMII
|
1775 DISABLE_AUTO_NEG_FOR_DUPLX
|
1776 DO_NOT_FORCE_LINK_FAIL
|
1777 SERIAL_PORT_CONTROL_RESERVED
;
1779 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1781 pscr
|= SERIAL_PORT_ENABLE
;
1782 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1784 /* Assign port SDMA configuration */
1785 mv_write(SDMA_CONFIG_REG(port_num
),
1786 PORT_SDMA_CONFIG_DEFAULT_VALUE
);
1788 /* Enable port Rx. */
1789 mv643xx_eth_port_enable_rx(port_num
, ETH_RX_QUEUES_ENABLED
);
1791 /* Disable port bandwidth limits by clearing MTU register */
1792 mv_write(MAXIMUM_TRANSMIT_UNIT(port_num
), 0);
1794 /* save phy settings across reset */
1795 mv643xx_get_settings(dev
, ðtool_cmd
);
1796 ethernet_phy_reset(mp
->port_num
);
1797 mv643xx_set_settings(dev
, ðtool_cmd
);
1801 * eth_port_uc_addr_set - Write a MAC address into the port's hw registers
1803 static void eth_port_uc_addr_set(unsigned int port_num
, unsigned char *p_addr
)
1809 mac_l
= (p_addr
[4] << 8) | (p_addr
[5]);
1810 mac_h
= (p_addr
[0] << 24) | (p_addr
[1] << 16) | (p_addr
[2] << 8) |
1813 mv_write(MAC_ADDR_LOW(port_num
), mac_l
);
1814 mv_write(MAC_ADDR_HIGH(port_num
), mac_h
);
1816 /* Accept frames with this address */
1817 table
= DA_FILTER_UNICAST_TABLE_BASE(port_num
);
1818 eth_port_set_filter_table_entry(table
, p_addr
[5] & 0x0f);
1822 * eth_port_uc_addr_get - Read the MAC address from the port's hw registers
1824 static void eth_port_uc_addr_get(unsigned int port_num
, unsigned char *p_addr
)
1829 mac_h
= mv_read(MAC_ADDR_HIGH(port_num
));
1830 mac_l
= mv_read(MAC_ADDR_LOW(port_num
));
1832 p_addr
[0] = (mac_h
>> 24) & 0xff;
1833 p_addr
[1] = (mac_h
>> 16) & 0xff;
1834 p_addr
[2] = (mac_h
>> 8) & 0xff;
1835 p_addr
[3] = mac_h
& 0xff;
1836 p_addr
[4] = (mac_l
>> 8) & 0xff;
1837 p_addr
[5] = mac_l
& 0xff;
1841 * The entries in each table are indexed by a hash of a packet's MAC
1842 * address. One bit in each entry determines whether the packet is
1843 * accepted. There are 4 entries (each 8 bits wide) in each register
1844 * of the table. The bits in each entry are defined as follows:
1845 * 0 Accept=1, Drop=0
1846 * 3-1 Queue (ETH_Q0=0)
1849 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
)
1851 unsigned int table_reg
;
1852 unsigned int tbl_offset
;
1853 unsigned int reg_offset
;
1855 tbl_offset
= (entry
/ 4) * 4; /* Register offset of DA table entry */
1856 reg_offset
= entry
% 4; /* Entry offset within the register */
1858 /* Set "accepts frame bit" at specified table entry */
1859 table_reg
= mv_read(table
+ tbl_offset
);
1860 table_reg
|= 0x01 << (8 * reg_offset
);
1861 mv_write(table
+ tbl_offset
, table_reg
);
1865 * eth_port_mc_addr - Multicast address settings.
1867 * The MV device supports multicast using two tables:
1868 * 1) Special Multicast Table for MAC addresses of the form
1869 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1870 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1871 * Table entries in the DA-Filter table.
1872 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1873 * is used as an index to the Other Multicast Table entries in the
1874 * DA-Filter table. This function calculates the CRC-8bit value.
1875 * In either case, eth_port_set_filter_table_entry() is then called
1876 * to set to set the actual table entry.
1878 static void eth_port_mc_addr(unsigned int eth_port_num
, unsigned char *p_addr
)
1882 unsigned char crc_result
= 0;
1888 if ((p_addr
[0] == 0x01) && (p_addr
[1] == 0x00) &&
1889 (p_addr
[2] == 0x5E) && (p_addr
[3] == 0x00) && (p_addr
[4] == 0x00)) {
1890 table
= DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
1892 eth_port_set_filter_table_entry(table
, p_addr
[5]);
1896 /* Calculate CRC-8 out of the given address */
1897 mac_h
= (p_addr
[0] << 8) | (p_addr
[1]);
1898 mac_l
= (p_addr
[2] << 24) | (p_addr
[3] << 16) |
1899 (p_addr
[4] << 8) | (p_addr
[5] << 0);
1901 for (i
= 0; i
< 32; i
++)
1902 mac_array
[i
] = (mac_l
>> i
) & 0x1;
1903 for (i
= 32; i
< 48; i
++)
1904 mac_array
[i
] = (mac_h
>> (i
- 32)) & 0x1;
1906 crc
[0] = mac_array
[45] ^ mac_array
[43] ^ mac_array
[40] ^ mac_array
[39] ^
1907 mac_array
[35] ^ mac_array
[34] ^ mac_array
[31] ^ mac_array
[30] ^
1908 mac_array
[28] ^ mac_array
[23] ^ mac_array
[21] ^ mac_array
[19] ^
1909 mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^ mac_array
[12] ^
1910 mac_array
[8] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[0];
1912 crc
[1] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
1913 mac_array
[41] ^ mac_array
[39] ^ mac_array
[36] ^ mac_array
[34] ^
1914 mac_array
[32] ^ mac_array
[30] ^ mac_array
[29] ^ mac_array
[28] ^
1915 mac_array
[24] ^ mac_array
[23] ^ mac_array
[22] ^ mac_array
[21] ^
1916 mac_array
[20] ^ mac_array
[18] ^ mac_array
[17] ^ mac_array
[16] ^
1917 mac_array
[15] ^ mac_array
[14] ^ mac_array
[13] ^ mac_array
[12] ^
1918 mac_array
[9] ^ mac_array
[6] ^ mac_array
[1] ^ mac_array
[0];
1920 crc
[2] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[44] ^ mac_array
[43] ^
1921 mac_array
[42] ^ mac_array
[39] ^ mac_array
[37] ^ mac_array
[34] ^
1922 mac_array
[33] ^ mac_array
[29] ^ mac_array
[28] ^ mac_array
[25] ^
1923 mac_array
[24] ^ mac_array
[22] ^ mac_array
[17] ^ mac_array
[15] ^
1924 mac_array
[13] ^ mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^
1925 mac_array
[6] ^ mac_array
[2] ^ mac_array
[1] ^ mac_array
[0];
1927 crc
[3] = mac_array
[47] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
1928 mac_array
[40] ^ mac_array
[38] ^ mac_array
[35] ^ mac_array
[34] ^
1929 mac_array
[30] ^ mac_array
[29] ^ mac_array
[26] ^ mac_array
[25] ^
1930 mac_array
[23] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^
1931 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[7] ^
1932 mac_array
[3] ^ mac_array
[2] ^ mac_array
[1];
1934 crc
[4] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[41] ^
1935 mac_array
[39] ^ mac_array
[36] ^ mac_array
[35] ^ mac_array
[31] ^
1936 mac_array
[30] ^ mac_array
[27] ^ mac_array
[26] ^ mac_array
[24] ^
1937 mac_array
[19] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[14] ^
1938 mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^ mac_array
[4] ^
1939 mac_array
[3] ^ mac_array
[2];
1941 crc
[5] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[45] ^ mac_array
[42] ^
1942 mac_array
[40] ^ mac_array
[37] ^ mac_array
[36] ^ mac_array
[32] ^
1943 mac_array
[31] ^ mac_array
[28] ^ mac_array
[27] ^ mac_array
[25] ^
1944 mac_array
[20] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[15] ^
1945 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[5] ^
1946 mac_array
[4] ^ mac_array
[3];
1948 crc
[6] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[43] ^ mac_array
[41] ^
1949 mac_array
[38] ^ mac_array
[37] ^ mac_array
[33] ^ mac_array
[32] ^
1950 mac_array
[29] ^ mac_array
[28] ^ mac_array
[26] ^ mac_array
[21] ^
1951 mac_array
[19] ^ mac_array
[17] ^ mac_array
[16] ^ mac_array
[14] ^
1952 mac_array
[12] ^ mac_array
[10] ^ mac_array
[6] ^ mac_array
[5] ^
1955 crc
[7] = mac_array
[47] ^ mac_array
[44] ^ mac_array
[42] ^ mac_array
[39] ^
1956 mac_array
[38] ^ mac_array
[34] ^ mac_array
[33] ^ mac_array
[30] ^
1957 mac_array
[29] ^ mac_array
[27] ^ mac_array
[22] ^ mac_array
[20] ^
1958 mac_array
[18] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[13] ^
1959 mac_array
[11] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[5];
1961 for (i
= 0; i
< 8; i
++)
1962 crc_result
= crc_result
| (crc
[i
] << i
);
1964 table
= DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
);
1965 eth_port_set_filter_table_entry(table
, crc_result
);
1969 * Set the entire multicast list based on dev->mc_list.
1971 static void eth_port_set_multicast_list(struct net_device
*dev
)
1974 struct dev_mc_list
*mc_list
;
1977 struct mv643xx_private
*mp
= netdev_priv(dev
);
1978 unsigned int eth_port_num
= mp
->port_num
;
1980 /* If the device is in promiscuous mode or in all multicast mode,
1981 * we will fully populate both multicast tables with accept.
1982 * This is guaranteed to yield a match on all multicast addresses...
1984 if ((dev
->flags
& IFF_PROMISC
) || (dev
->flags
& IFF_ALLMULTI
)) {
1985 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
1986 /* Set all entries in DA filter special multicast
1988 * Set for ETH_Q0 for now
1990 * 0 Accept=1, Drop=0
1991 * 3-1 Queue ETH_Q0=0
1994 mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
1996 /* Set all entries in DA filter other multicast
1998 * Set for ETH_Q0 for now
2000 * 0 Accept=1, Drop=0
2001 * 3-1 Queue ETH_Q0=0
2004 mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2009 /* We will clear out multicast tables every time we get the list.
2010 * Then add the entire new list...
2012 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2013 /* Clear DA filter special multicast table (Ex_dFSMT) */
2014 mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2015 (eth_port_num
) + table_index
, 0);
2017 /* Clear DA filter other multicast table (Ex_dFOMT) */
2018 mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2019 (eth_port_num
) + table_index
, 0);
2022 /* Get pointer to net_device multicast list and add each one... */
2023 for (i
= 0, mc_list
= dev
->mc_list
;
2024 (i
< 256) && (mc_list
!= NULL
) && (i
< dev
->mc_count
);
2025 i
++, mc_list
= mc_list
->next
)
2026 if (mc_list
->dmi_addrlen
== 6)
2027 eth_port_mc_addr(eth_port_num
, mc_list
->dmi_addr
);
2031 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2034 * Go through all the DA filter tables (Unicast, Special Multicast &
2035 * Other Multicast) and set each entry to 0.
2038 * unsigned int eth_port_num Ethernet Port number.
2041 * Multicast and Unicast packets are rejected.
2046 static void eth_port_init_mac_tables(unsigned int eth_port_num
)
2050 /* Clear DA filter unicast table (Ex_dFUT) */
2051 for (table_index
= 0; table_index
<= 0xC; table_index
+= 4)
2052 mv_write(DA_FILTER_UNICAST_TABLE_BASE
2053 (eth_port_num
) + table_index
, 0);
2055 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2056 /* Clear DA filter special multicast table (Ex_dFSMT) */
2057 mv_write(DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2058 (eth_port_num
) + table_index
, 0);
2059 /* Clear DA filter other multicast table (Ex_dFOMT) */
2060 mv_write(DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2061 (eth_port_num
) + table_index
, 0);
2066 * eth_clear_mib_counters - Clear all MIB counters
2069 * This function clears all MIB counters of a specific ethernet port.
2070 * A read from the MIB counter will reset the counter.
2073 * unsigned int eth_port_num Ethernet Port number.
2076 * After reading all MIB counters, the counters resets.
2079 * MIB counter value.
2082 static void eth_clear_mib_counters(unsigned int eth_port_num
)
2086 /* Perform dummy reads from MIB counters */
2087 for (i
= ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
; i
< ETH_MIB_LATE_COLLISION
;
2089 mv_read(MIB_COUNTERS_BASE(eth_port_num
) + i
);
2092 static inline u32
read_mib(struct mv643xx_private
*mp
, int offset
)
2094 return mv_read(MIB_COUNTERS_BASE(mp
->port_num
) + offset
);
2097 static void eth_update_mib_counters(struct mv643xx_private
*mp
)
2099 struct mv643xx_mib_counters
*p
= &mp
->mib_counters
;
2102 p
->good_octets_received
+=
2103 read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
);
2104 p
->good_octets_received
+=
2105 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
) << 32;
2107 for (offset
= ETH_MIB_BAD_OCTETS_RECEIVED
;
2108 offset
<= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS
;
2110 *(u32
*)((char *)p
+ offset
) += read_mib(mp
, offset
);
2112 p
->good_octets_sent
+= read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_LOW
);
2113 p
->good_octets_sent
+=
2114 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_HIGH
) << 32;
2116 for (offset
= ETH_MIB_GOOD_FRAMES_SENT
;
2117 offset
<= ETH_MIB_LATE_COLLISION
;
2119 *(u32
*)((char *)p
+ offset
) += read_mib(mp
, offset
);
2123 * ethernet_phy_detect - Detect whether a phy is present
2126 * This function tests whether there is a PHY present on
2127 * the specified port.
2130 * unsigned int eth_port_num Ethernet Port number.
2137 * -ENODEV on failure
2140 static int ethernet_phy_detect(unsigned int port_num
)
2142 unsigned int phy_reg_data0
;
2145 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2146 auto_neg
= phy_reg_data0
& 0x1000;
2147 phy_reg_data0
^= 0x1000; /* invert auto_neg */
2148 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2150 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2151 if ((phy_reg_data0
& 0x1000) == auto_neg
)
2152 return -ENODEV
; /* change didn't take */
2154 phy_reg_data0
^= 0x1000;
2155 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2160 * ethernet_phy_get - Get the ethernet port PHY address.
2163 * This routine returns the given ethernet port PHY address.
2166 * unsigned int eth_port_num Ethernet Port number.
2175 static int ethernet_phy_get(unsigned int eth_port_num
)
2177 unsigned int reg_data
;
2179 reg_data
= mv_read(PHY_ADDR_REG
);
2181 return ((reg_data
>> (5 * eth_port_num
)) & 0x1f);
2185 * ethernet_phy_set - Set the ethernet port PHY address.
2188 * This routine sets the given ethernet port PHY address.
2191 * unsigned int eth_port_num Ethernet Port number.
2192 * int phy_addr PHY address.
2201 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
)
2204 int addr_shift
= 5 * eth_port_num
;
2206 reg_data
= mv_read(PHY_ADDR_REG
);
2207 reg_data
&= ~(0x1f << addr_shift
);
2208 reg_data
|= (phy_addr
& 0x1f) << addr_shift
;
2209 mv_write(PHY_ADDR_REG
, reg_data
);
2213 * ethernet_phy_reset - Reset Ethernet port PHY.
2216 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2219 * unsigned int eth_port_num Ethernet Port number.
2228 static void ethernet_phy_reset(unsigned int eth_port_num
)
2230 unsigned int phy_reg_data
;
2233 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2234 phy_reg_data
|= 0x8000; /* Set bit 15 to reset the PHY */
2235 eth_port_write_smi_reg(eth_port_num
, 0, phy_reg_data
);
2237 /* wait for PHY to come out of reset */
2240 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2241 } while (phy_reg_data
& 0x8000);
2244 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
2245 unsigned int queues
)
2247 mv_write(TRANSMIT_QUEUE_COMMAND_REG(port_num
), queues
);
2250 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
2251 unsigned int queues
)
2253 mv_write(RECEIVE_QUEUE_COMMAND_REG(port_num
), queues
);
2256 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
)
2260 /* Stop Tx port activity. Check port Tx activity. */
2261 queues
= mv_read(TRANSMIT_QUEUE_COMMAND_REG(port_num
)) & 0xFF;
2263 /* Issue stop command for active queues only */
2264 mv_write(TRANSMIT_QUEUE_COMMAND_REG(port_num
), (queues
<< 8));
2266 /* Wait for all Tx activity to terminate. */
2267 /* Check port cause register that all Tx queues are stopped */
2268 while (mv_read(TRANSMIT_QUEUE_COMMAND_REG(port_num
)) & 0xFF)
2269 udelay(PHY_WAIT_MICRO_SECONDS
);
2271 /* Wait for Tx FIFO to empty */
2272 while (mv_read(PORT_STATUS_REG(port_num
)) &
2273 ETH_PORT_TX_FIFO_EMPTY
)
2274 udelay(PHY_WAIT_MICRO_SECONDS
);
2280 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
)
2284 /* Stop Rx port activity. Check port Rx activity. */
2285 queues
= mv_read(RECEIVE_QUEUE_COMMAND_REG(port_num
)) & 0xFF;
2287 /* Issue stop command for active queues only */
2288 mv_write(RECEIVE_QUEUE_COMMAND_REG(port_num
), (queues
<< 8));
2290 /* Wait for all Rx activity to terminate. */
2291 /* Check port cause register that all Rx queues are stopped */
2292 while (mv_read(RECEIVE_QUEUE_COMMAND_REG(port_num
)) & 0xFF)
2293 udelay(PHY_WAIT_MICRO_SECONDS
);
2300 * eth_port_reset - Reset Ethernet port
2303 * This routine resets the chip by aborting any SDMA engine activity and
2304 * clearing the MIB counters. The Receiver and the Transmit unit are in
2305 * idle state after this command is performed and the port is disabled.
2308 * unsigned int eth_port_num Ethernet Port number.
2311 * Channel activity is halted.
2317 static void eth_port_reset(unsigned int port_num
)
2319 unsigned int reg_data
;
2321 mv643xx_eth_port_disable_tx(port_num
);
2322 mv643xx_eth_port_disable_rx(port_num
);
2324 /* Clear all MIB counters */
2325 eth_clear_mib_counters(port_num
);
2327 /* Reset the Enable bit in the Configuration Register */
2328 reg_data
= mv_read(PORT_SERIAL_CONTROL_REG(port_num
));
2329 reg_data
&= ~(SERIAL_PORT_ENABLE
|
2330 DO_NOT_FORCE_LINK_FAIL
|
2332 mv_write(PORT_SERIAL_CONTROL_REG(port_num
), reg_data
);
2337 * eth_port_read_smi_reg - Read PHY registers
2340 * This routine utilize the SMI interface to interact with the PHY in
2341 * order to perform PHY register read.
2344 * unsigned int port_num Ethernet Port number.
2345 * unsigned int phy_reg PHY register address offset.
2346 * unsigned int *value Register value buffer.
2349 * Write the value of a specified PHY register into given buffer.
2352 * false if the PHY is busy or read data is not in valid state.
2356 static void eth_port_read_smi_reg(unsigned int port_num
,
2357 unsigned int phy_reg
, unsigned int *value
)
2359 int phy_addr
= ethernet_phy_get(port_num
);
2360 unsigned long flags
;
2363 /* the SMI register is a shared resource */
2364 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2366 /* wait for the SMI register to become available */
2367 for (i
= 0; mv_read(SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2368 if (i
== PHY_WAIT_ITERATIONS
) {
2369 printk("mv643xx PHY busy timeout, port %d\n", port_num
);
2372 udelay(PHY_WAIT_MICRO_SECONDS
);
2376 (phy_addr
<< 16) | (phy_reg
<< 21) | ETH_SMI_OPCODE_READ
);
2378 /* now wait for the data to be valid */
2379 for (i
= 0; !(mv_read(SMI_REG
) & ETH_SMI_READ_VALID
); i
++) {
2380 if (i
== PHY_WAIT_ITERATIONS
) {
2381 printk("mv643xx PHY read timeout, port %d\n", port_num
);
2384 udelay(PHY_WAIT_MICRO_SECONDS
);
2387 *value
= mv_read(SMI_REG
) & 0xffff;
2389 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2393 * eth_port_write_smi_reg - Write to PHY registers
2396 * This routine utilize the SMI interface to interact with the PHY in
2397 * order to perform writes to PHY registers.
2400 * unsigned int eth_port_num Ethernet Port number.
2401 * unsigned int phy_reg PHY register address offset.
2402 * unsigned int value Register value.
2405 * Write the given value to the specified PHY register.
2408 * false if the PHY is busy.
2412 static void eth_port_write_smi_reg(unsigned int eth_port_num
,
2413 unsigned int phy_reg
, unsigned int value
)
2417 unsigned long flags
;
2419 phy_addr
= ethernet_phy_get(eth_port_num
);
2421 /* the SMI register is a shared resource */
2422 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2424 /* wait for the SMI register to become available */
2425 for (i
= 0; mv_read(SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2426 if (i
== PHY_WAIT_ITERATIONS
) {
2427 printk("mv643xx PHY busy timeout, port %d\n",
2431 udelay(PHY_WAIT_MICRO_SECONDS
);
2434 mv_write(SMI_REG
, (phy_addr
<< 16) | (phy_reg
<< 21) |
2435 ETH_SMI_OPCODE_WRITE
| (value
& 0xffff));
2437 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2441 * Wrappers for MII support library.
2443 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
)
2446 struct mv643xx_private
*mp
= netdev_priv(dev
);
2448 eth_port_read_smi_reg(mp
->port_num
, location
, &val
);
2452 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
)
2454 struct mv643xx_private
*mp
= netdev_priv(dev
);
2455 eth_port_write_smi_reg(mp
->port_num
, location
, val
);
2459 * eth_port_receive - Get received information from Rx ring.
2462 * This routine returns the received data to the caller. There is no
2463 * data copying during routine operation. All information is returned
2464 * using pointer to packet information struct passed from the caller.
2465 * If the routine exhausts Rx ring resources then the resource error flag
2469 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2470 * struct pkt_info *p_pkt_info User packet buffer.
2473 * Rx ring current and used indexes are updated.
2476 * ETH_ERROR in case the routine can not access Rx desc ring.
2477 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2478 * ETH_END_OF_JOB if there is no received data.
2481 static ETH_FUNC_RET_STATUS
eth_port_receive(struct mv643xx_private
*mp
,
2482 struct pkt_info
*p_pkt_info
)
2484 int rx_next_curr_desc
, rx_curr_desc
, rx_used_desc
;
2485 volatile struct eth_rx_desc
*p_rx_desc
;
2486 unsigned int command_status
;
2487 unsigned long flags
;
2489 /* Do not process Rx ring in case of Rx ring resource error */
2490 if (mp
->rx_resource_err
)
2491 return ETH_QUEUE_FULL
;
2493 spin_lock_irqsave(&mp
->lock
, flags
);
2495 /* Get the Rx Desc ring 'curr and 'used' indexes */
2496 rx_curr_desc
= mp
->rx_curr_desc_q
;
2497 rx_used_desc
= mp
->rx_used_desc_q
;
2499 p_rx_desc
= &mp
->p_rx_desc_area
[rx_curr_desc
];
2501 /* The following parameters are used to save readings from memory */
2502 command_status
= p_rx_desc
->cmd_sts
;
2505 /* Nothing to receive... */
2506 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
)) {
2507 spin_unlock_irqrestore(&mp
->lock
, flags
);
2508 return ETH_END_OF_JOB
;
2511 p_pkt_info
->byte_cnt
= (p_rx_desc
->byte_cnt
) - RX_BUF_OFFSET
;
2512 p_pkt_info
->cmd_sts
= command_status
;
2513 p_pkt_info
->buf_ptr
= (p_rx_desc
->buf_ptr
) + RX_BUF_OFFSET
;
2514 p_pkt_info
->return_info
= mp
->rx_skb
[rx_curr_desc
];
2515 p_pkt_info
->l4i_chk
= p_rx_desc
->buf_size
;
2518 * Clean the return info field to indicate that the
2519 * packet has been moved to the upper layers
2521 mp
->rx_skb
[rx_curr_desc
] = NULL
;
2523 /* Update current index in data structure */
2524 rx_next_curr_desc
= (rx_curr_desc
+ 1) % mp
->rx_ring_size
;
2525 mp
->rx_curr_desc_q
= rx_next_curr_desc
;
2527 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2528 if (rx_next_curr_desc
== rx_used_desc
)
2529 mp
->rx_resource_err
= 1;
2531 spin_unlock_irqrestore(&mp
->lock
, flags
);
2537 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2540 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2541 * next 'used' descriptor and attached the returned buffer to it.
2542 * In case the Rx ring was in "resource error" condition, where there are
2543 * no available Rx resources, the function resets the resource error flag.
2546 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2547 * struct pkt_info *p_pkt_info Information on returned buffer.
2550 * New available Rx resource in Rx descriptor ring.
2553 * ETH_ERROR in case the routine can not access Rx desc ring.
2556 static ETH_FUNC_RET_STATUS
eth_rx_return_buff(struct mv643xx_private
*mp
,
2557 struct pkt_info
*p_pkt_info
)
2559 int used_rx_desc
; /* Where to return Rx resource */
2560 volatile struct eth_rx_desc
*p_used_rx_desc
;
2561 unsigned long flags
;
2563 spin_lock_irqsave(&mp
->lock
, flags
);
2565 /* Get 'used' Rx descriptor */
2566 used_rx_desc
= mp
->rx_used_desc_q
;
2567 p_used_rx_desc
= &mp
->p_rx_desc_area
[used_rx_desc
];
2569 p_used_rx_desc
->buf_ptr
= p_pkt_info
->buf_ptr
;
2570 p_used_rx_desc
->buf_size
= p_pkt_info
->byte_cnt
;
2571 mp
->rx_skb
[used_rx_desc
] = p_pkt_info
->return_info
;
2573 /* Flush the write pipe */
2575 /* Return the descriptor to DMA ownership */
2577 p_used_rx_desc
->cmd_sts
=
2578 ETH_BUFFER_OWNED_BY_DMA
| ETH_RX_ENABLE_INTERRUPT
;
2581 /* Move the used descriptor pointer to the next descriptor */
2582 mp
->rx_used_desc_q
= (used_rx_desc
+ 1) % mp
->rx_ring_size
;
2584 /* Any Rx return cancels the Rx resource error status */
2585 mp
->rx_resource_err
= 0;
2587 spin_unlock_irqrestore(&mp
->lock
, flags
);
2592 /************* Begin ethtool support *************************/
2594 struct mv643xx_stats
{
2595 char stat_string
[ETH_GSTRING_LEN
];
2600 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2601 offsetof(struct mv643xx_private, m)
2603 static const struct mv643xx_stats mv643xx_gstrings_stats
[] = {
2604 { "rx_packets", MV643XX_STAT(stats
.rx_packets
) },
2605 { "tx_packets", MV643XX_STAT(stats
.tx_packets
) },
2606 { "rx_bytes", MV643XX_STAT(stats
.rx_bytes
) },
2607 { "tx_bytes", MV643XX_STAT(stats
.tx_bytes
) },
2608 { "rx_errors", MV643XX_STAT(stats
.rx_errors
) },
2609 { "tx_errors", MV643XX_STAT(stats
.tx_errors
) },
2610 { "rx_dropped", MV643XX_STAT(stats
.rx_dropped
) },
2611 { "tx_dropped", MV643XX_STAT(stats
.tx_dropped
) },
2612 { "good_octets_received", MV643XX_STAT(mib_counters
.good_octets_received
) },
2613 { "bad_octets_received", MV643XX_STAT(mib_counters
.bad_octets_received
) },
2614 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters
.internal_mac_transmit_err
) },
2615 { "good_frames_received", MV643XX_STAT(mib_counters
.good_frames_received
) },
2616 { "bad_frames_received", MV643XX_STAT(mib_counters
.bad_frames_received
) },
2617 { "broadcast_frames_received", MV643XX_STAT(mib_counters
.broadcast_frames_received
) },
2618 { "multicast_frames_received", MV643XX_STAT(mib_counters
.multicast_frames_received
) },
2619 { "frames_64_octets", MV643XX_STAT(mib_counters
.frames_64_octets
) },
2620 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters
.frames_65_to_127_octets
) },
2621 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters
.frames_128_to_255_octets
) },
2622 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters
.frames_256_to_511_octets
) },
2623 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters
.frames_512_to_1023_octets
) },
2624 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters
.frames_1024_to_max_octets
) },
2625 { "good_octets_sent", MV643XX_STAT(mib_counters
.good_octets_sent
) },
2626 { "good_frames_sent", MV643XX_STAT(mib_counters
.good_frames_sent
) },
2627 { "excessive_collision", MV643XX_STAT(mib_counters
.excessive_collision
) },
2628 { "multicast_frames_sent", MV643XX_STAT(mib_counters
.multicast_frames_sent
) },
2629 { "broadcast_frames_sent", MV643XX_STAT(mib_counters
.broadcast_frames_sent
) },
2630 { "unrec_mac_control_received", MV643XX_STAT(mib_counters
.unrec_mac_control_received
) },
2631 { "fc_sent", MV643XX_STAT(mib_counters
.fc_sent
) },
2632 { "good_fc_received", MV643XX_STAT(mib_counters
.good_fc_received
) },
2633 { "bad_fc_received", MV643XX_STAT(mib_counters
.bad_fc_received
) },
2634 { "undersize_received", MV643XX_STAT(mib_counters
.undersize_received
) },
2635 { "fragments_received", MV643XX_STAT(mib_counters
.fragments_received
) },
2636 { "oversize_received", MV643XX_STAT(mib_counters
.oversize_received
) },
2637 { "jabber_received", MV643XX_STAT(mib_counters
.jabber_received
) },
2638 { "mac_receive_error", MV643XX_STAT(mib_counters
.mac_receive_error
) },
2639 { "bad_crc_event", MV643XX_STAT(mib_counters
.bad_crc_event
) },
2640 { "collision", MV643XX_STAT(mib_counters
.collision
) },
2641 { "late_collision", MV643XX_STAT(mib_counters
.late_collision
) },
2644 #define MV643XX_STATS_LEN ARRAY_SIZE(mv643xx_gstrings_stats)
2646 static void mv643xx_get_drvinfo(struct net_device
*netdev
,
2647 struct ethtool_drvinfo
*drvinfo
)
2649 strncpy(drvinfo
->driver
, mv643xx_driver_name
, 32);
2650 strncpy(drvinfo
->version
, mv643xx_driver_version
, 32);
2651 strncpy(drvinfo
->fw_version
, "N/A", 32);
2652 strncpy(drvinfo
->bus_info
, "mv643xx", 32);
2653 drvinfo
->n_stats
= MV643XX_STATS_LEN
;
2656 static int mv643xx_get_sset_count(struct net_device
*netdev
, int sset
)
2660 return MV643XX_STATS_LEN
;
2666 static void mv643xx_get_ethtool_stats(struct net_device
*netdev
,
2667 struct ethtool_stats
*stats
, uint64_t *data
)
2669 struct mv643xx_private
*mp
= netdev
->priv
;
2672 eth_update_mib_counters(mp
);
2674 for (i
= 0; i
< MV643XX_STATS_LEN
; i
++) {
2675 char *p
= (char *)mp
+mv643xx_gstrings_stats
[i
].stat_offset
;
2676 data
[i
] = (mv643xx_gstrings_stats
[i
].sizeof_stat
==
2677 sizeof(uint64_t)) ? *(uint64_t *)p
: *(uint32_t *)p
;
2681 static void mv643xx_get_strings(struct net_device
*netdev
, uint32_t stringset
,
2688 for (i
=0; i
< MV643XX_STATS_LEN
; i
++) {
2689 memcpy(data
+ i
* ETH_GSTRING_LEN
,
2690 mv643xx_gstrings_stats
[i
].stat_string
,
2697 static u32
mv643xx_eth_get_link(struct net_device
*dev
)
2699 struct mv643xx_private
*mp
= netdev_priv(dev
);
2701 return mii_link_ok(&mp
->mii
);
2704 static int mv643xx_eth_nway_restart(struct net_device
*dev
)
2706 struct mv643xx_private
*mp
= netdev_priv(dev
);
2708 return mii_nway_restart(&mp
->mii
);
2711 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
2713 struct mv643xx_private
*mp
= netdev_priv(dev
);
2715 return generic_mii_ioctl(&mp
->mii
, if_mii(ifr
), cmd
, NULL
);
2718 static const struct ethtool_ops mv643xx_ethtool_ops
= {
2719 .get_settings
= mv643xx_get_settings
,
2720 .set_settings
= mv643xx_set_settings
,
2721 .get_drvinfo
= mv643xx_get_drvinfo
,
2722 .get_link
= mv643xx_eth_get_link
,
2723 .set_sg
= ethtool_op_set_sg
,
2724 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
2725 .get_strings
= mv643xx_get_strings
,
2726 .nway_reset
= mv643xx_eth_nway_restart
,
2729 /************* End ethtool support *************************/