projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
net: convert print_mac to %pM
[deliverable/linux.git] / drivers / net / myri_sbus.c
1 /* myri_sbus.c: MyriCOM MyriNET SBUS card driver.
2 *
3 * Copyright (C) 1996, 1999, 2006, 2008 David S. Miller (davem@davemloft.net)
4 */
5
6 static char version[] =
7 "myri_sbus.c:v2.0 June 23, 2006 David S. Miller (davem@davemloft.net)\n";
8
9 #include <linux/module.h>
10 #include <linux/errno.h>
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/fcntl.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/in.h>
17 #include <linux/slab.h>
18 #include <linux/string.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/netdevice.h>
22 #include <linux/etherdevice.h>
23 #include <linux/skbuff.h>
24 #include <linux/bitops.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/of.h>
27 #include <linux/of_device.h>
28
29 #include <net/dst.h>
30 #include <net/arp.h>
31 #include <net/sock.h>
32 #include <net/ipv6.h>
33
34 #include <asm/system.h>
35 #include <asm/io.h>
36 #include <asm/dma.h>
37 #include <asm/byteorder.h>
38 #include <asm/idprom.h>
39 #include <asm/openprom.h>
40 #include <asm/oplib.h>
41 #include <asm/auxio.h>
42 #include <asm/pgtable.h>
43 #include <asm/irq.h>
44
45 #include "myri_sbus.h"
46 #include "myri_code.h"
47
48 /* #define DEBUG_DETECT */
49 /* #define DEBUG_IRQ */
50 /* #define DEBUG_TRANSMIT */
51 /* #define DEBUG_RECEIVE */
52 /* #define DEBUG_HEADER */
53
54 #ifdef DEBUG_DETECT
55 #define DET(x) printk x
56 #else
57 #define DET(x)
58 #endif
59
60 #ifdef DEBUG_IRQ
61 #define DIRQ(x) printk x
62 #else
63 #define DIRQ(x)
64 #endif
65
66 #ifdef DEBUG_TRANSMIT
67 #define DTX(x) printk x
68 #else
69 #define DTX(x)
70 #endif
71
72 #ifdef DEBUG_RECEIVE
73 #define DRX(x) printk x
74 #else
75 #define DRX(x)
76 #endif
77
78 #ifdef DEBUG_HEADER
79 #define DHDR(x) printk x
80 #else
81 #define DHDR(x)
82 #endif
83
84 static void myri_reset_off(void __iomem *lp, void __iomem *cregs)
85 {
86 /* Clear IRQ mask. */
87 sbus_writel(0, lp + LANAI_EIMASK);
88
89 /* Turn RESET function off. */
90 sbus_writel(CONTROL_ROFF, cregs + MYRICTRL_CTRL);
91 }
92
93 static void myri_reset_on(void __iomem *cregs)
94 {
95 /* Enable RESET function. */
96 sbus_writel(CONTROL_RON, cregs + MYRICTRL_CTRL);
97
98 /* Disable IRQ's. */
99 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
100 }
101
102 static void myri_disable_irq(void __iomem *lp, void __iomem *cregs)
103 {
104 sbus_writel(CONTROL_DIRQ, cregs + MYRICTRL_CTRL);
105 sbus_writel(0, lp + LANAI_EIMASK);
106 sbus_writel(ISTAT_HOST, lp + LANAI_ISTAT);
107 }
108
109 static void myri_enable_irq(void __iomem *lp, void __iomem *cregs)
110 {
111 sbus_writel(CONTROL_EIRQ, cregs + MYRICTRL_CTRL);
112 sbus_writel(ISTAT_HOST, lp + LANAI_EIMASK);
113 }
114
115 static inline void bang_the_chip(struct myri_eth *mp)
116 {
117 struct myri_shmem __iomem *shmem = mp->shmem;
118 void __iomem *cregs = mp->cregs;
119
120 sbus_writel(1, &shmem->send);
121 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
122 }
123
124 static int myri_do_handshake(struct myri_eth *mp)
125 {
126 struct myri_shmem __iomem *shmem = mp->shmem;
127 void __iomem *cregs = mp->cregs;
128 struct myri_channel __iomem *chan = &shmem->channel;
129 int tick = 0;
130
131 DET(("myri_do_handshake: "));
132 if (sbus_readl(&chan->state) == STATE_READY) {
133 DET(("Already STATE_READY, failed.\n"));
134 return -1; /* We're hosed... */
135 }
136
137 myri_disable_irq(mp->lregs, cregs);
138
139 while (tick++ < 25) {
140 u32 softstate;
141
142 /* Wake it up. */
143 DET(("shakedown, CONTROL_WON, "));
144 sbus_writel(1, &shmem->shakedown);
145 sbus_writel(CONTROL_WON, cregs + MYRICTRL_CTRL);
146
147 softstate = sbus_readl(&chan->state);
148 DET(("chanstate[%08x] ", softstate));
149 if (softstate == STATE_READY) {
150 DET(("wakeup successful, "));
151 break;
152 }
153
154 if (softstate != STATE_WFN) {
155 DET(("not WFN setting that, "));
156 sbus_writel(STATE_WFN, &chan->state);
157 }
158
159 udelay(20);
160 }
161
162 myri_enable_irq(mp->lregs, cregs);
163
164 if (tick > 25) {
165 DET(("25 ticks we lose, failure.\n"));
166 return -1;
167 }
168 DET(("success\n"));
169 return 0;
170 }
171
172 static int __devinit myri_load_lanai(struct myri_eth *mp)
173 {
174 struct net_device *dev = mp->dev;
175 struct myri_shmem __iomem *shmem = mp->shmem;
176 void __iomem *rptr;
177 int i;
178
179 myri_disable_irq(mp->lregs, mp->cregs);
180 myri_reset_on(mp->cregs);
181
182 rptr = mp->lanai;
183 for (i = 0; i < mp->eeprom.ramsz; i++)
184 sbus_writeb(0, rptr + i);
185
186 if (mp->eeprom.cpuvers >= CPUVERS_3_0)
187 sbus_writel(mp->eeprom.cval, mp->lregs + LANAI_CVAL);
188
189 /* Load executable code. */
190 for (i = 0; i < sizeof(lanai4_code); i++)
191 sbus_writeb(lanai4_code[i], rptr + (lanai4_code_off * 2) + i);
192
193 /* Load data segment. */
194 for (i = 0; i < sizeof(lanai4_data); i++)
195 sbus_writeb(lanai4_data[i], rptr + (lanai4_data_off * 2) + i);
196
197 /* Set device address. */
198 sbus_writeb(0, &shmem->addr[0]);
199 sbus_writeb(0, &shmem->addr[1]);
200 for (i = 0; i < 6; i++)
201 sbus_writeb(dev->dev_addr[i],
202 &shmem->addr[i + 2]);
203
204 /* Set SBUS bursts and interrupt mask. */
205 sbus_writel(((mp->myri_bursts & 0xf8) >> 3), &shmem->burst);
206 sbus_writel(SHMEM_IMASK_RX, &shmem->imask);
207
208 /* Release the LANAI. */
209 myri_disable_irq(mp->lregs, mp->cregs);
210 myri_reset_off(mp->lregs, mp->cregs);
211 myri_disable_irq(mp->lregs, mp->cregs);
212
213 /* Wait for the reset to complete. */
214 for (i = 0; i < 5000; i++) {
215 if (sbus_readl(&shmem->channel.state) != STATE_READY)
216 break;
217 else
218 udelay(10);
219 }
220
221 if (i == 5000)
222 printk(KERN_ERR "myricom: Chip would not reset after firmware load.\n");
223
224 i = myri_do_handshake(mp);
225 if (i)
226 printk(KERN_ERR "myricom: Handshake with LANAI failed.\n");
227
228 if (mp->eeprom.cpuvers == CPUVERS_4_0)
229 sbus_writel(0, mp->lregs + LANAI_VERS);
230
231 return i;
232 }
233
234 static void myri_clean_rings(struct myri_eth *mp)
235 {
236 struct sendq __iomem *sq = mp->sq;
237 struct recvq __iomem *rq = mp->rq;
238 int i;
239
240 sbus_writel(0, &rq->tail);
241 sbus_writel(0, &rq->head);
242 for (i = 0; i < (RX_RING_SIZE+1); i++) {
243 if (mp->rx_skbs[i] != NULL) {
244 struct myri_rxd __iomem *rxd = &rq->myri_rxd[i];
245 u32 dma_addr;
246
247 dma_addr = sbus_readl(&rxd->myri_scatters[0].addr);
248 dma_unmap_single(&mp->myri_op->dev, dma_addr,
249 RX_ALLOC_SIZE, DMA_FROM_DEVICE);
250 dev_kfree_skb(mp->rx_skbs[i]);
251 mp->rx_skbs[i] = NULL;
252 }
253 }
254
255 mp->tx_old = 0;
256 sbus_writel(0, &sq->tail);
257 sbus_writel(0, &sq->head);
258 for (i = 0; i < TX_RING_SIZE; i++) {
259 if (mp->tx_skbs[i] != NULL) {
260 struct sk_buff *skb = mp->tx_skbs[i];
261 struct myri_txd __iomem *txd = &sq->myri_txd[i];
262 u32 dma_addr;
263
264 dma_addr = sbus_readl(&txd->myri_gathers[0].addr);
265 dma_unmap_single(&mp->myri_op->dev, dma_addr,
266 (skb->len + 3) & ~3,
267 DMA_TO_DEVICE);
268 dev_kfree_skb(mp->tx_skbs[i]);
269 mp->tx_skbs[i] = NULL;
270 }
271 }
272 }
273
274 static void myri_init_rings(struct myri_eth *mp, int from_irq)
275 {
276 struct recvq __iomem *rq = mp->rq;
277 struct myri_rxd __iomem *rxd = &rq->myri_rxd[0];
278 struct net_device *dev = mp->dev;
279 gfp_t gfp_flags = GFP_KERNEL;
280 int i;
281
282 if (from_irq || in_interrupt())
283 gfp_flags = GFP_ATOMIC;
284
285 myri_clean_rings(mp);
286 for (i = 0; i < RX_RING_SIZE; i++) {
287 struct sk_buff *skb = myri_alloc_skb(RX_ALLOC_SIZE, gfp_flags);
288 u32 dma_addr;
289
290 if (!skb)
291 continue;
292 mp->rx_skbs[i] = skb;
293 skb->dev = dev;
294 skb_put(skb, RX_ALLOC_SIZE);
295
296 dma_addr = dma_map_single(&mp->myri_op->dev,
297 skb->data, RX_ALLOC_SIZE,
298 DMA_FROM_DEVICE);
299 sbus_writel(dma_addr, &rxd[i].myri_scatters[0].addr);
300 sbus_writel(RX_ALLOC_SIZE, &rxd[i].myri_scatters[0].len);
301 sbus_writel(i, &rxd[i].ctx);
302 sbus_writel(1, &rxd[i].num_sg);
303 }
304 sbus_writel(0, &rq->head);
305 sbus_writel(RX_RING_SIZE, &rq->tail);
306 }
307
308 static int myri_init(struct myri_eth *mp, int from_irq)
309 {
310 myri_init_rings(mp, from_irq);
311 return 0;
312 }
313
314 static void myri_is_not_so_happy(struct myri_eth *mp)
315 {
316 }
317
318 #ifdef DEBUG_HEADER
319 static void dump_ehdr(struct ethhdr *ehdr)
320 {
321 printk("ehdr[h_dst(%pM)"
322 "h_source(%pM)"
323 "h_proto(%04x)]\n",
324 ehdr->h_dest, ehdr->h_source, ehdr->h_proto);
325 }
326
327 static void dump_ehdr_and_myripad(unsigned char *stuff)
328 {
329 struct ethhdr *ehdr = (struct ethhdr *) (stuff + 2);
330
331 printk("pad[%02x:%02x]", stuff[0], stuff[1]);
332 dump_ehdr(ehdr);
333 }
334 #endif
335
336 static void myri_tx(struct myri_eth *mp, struct net_device *dev)
337 {
338 struct sendq __iomem *sq= mp->sq;
339 int entry = mp->tx_old;
340 int limit = sbus_readl(&sq->head);
341
342 DTX(("entry[%d] limit[%d] ", entry, limit));
343 if (entry == limit)
344 return;
345 while (entry != limit) {
346 struct sk_buff *skb = mp->tx_skbs[entry];
347 u32 dma_addr;
348
349 DTX(("SKB[%d] ", entry));
350 dma_addr = sbus_readl(&sq->myri_txd[entry].myri_gathers[0].addr);
351 dma_unmap_single(&mp->myri_op->dev, dma_addr,
352 skb->len, DMA_TO_DEVICE);
353 dev_kfree_skb(skb);
354 mp->tx_skbs[entry] = NULL;
355 dev->stats.tx_packets++;
356 entry = NEXT_TX(entry);
357 }
358 mp->tx_old = entry;
359 }
360
361 /* Determine the packet's protocol ID. The rule here is that we
362 * assume 802.3 if the type field is short enough to be a length.
363 * This is normal practice and works for any 'now in use' protocol.
364 */
365 static __be16 myri_type_trans(struct sk_buff *skb, struct net_device *dev)
366 {
367 struct ethhdr *eth;
368 unsigned char *rawp;
369
370 skb_set_mac_header(skb, MYRI_PAD_LEN);
371 skb_pull(skb, dev->hard_header_len);
372 eth = eth_hdr(skb);
373
374 #ifdef DEBUG_HEADER
375 DHDR(("myri_type_trans: "));
376 dump_ehdr(eth);
377 #endif
378 if (*eth->h_dest & 1) {
379 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN)==0)
380 skb->pkt_type = PACKET_BROADCAST;
381 else
382 skb->pkt_type = PACKET_MULTICAST;
383 } else if (dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) {
384 if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
385 skb->pkt_type = PACKET_OTHERHOST;
386 }
387
388 if (ntohs(eth->h_proto) >= 1536)
389 return eth->h_proto;
390
391 rawp = skb->data;
392
393 /* This is a magic hack to spot IPX packets. Older Novell breaks
394 * the protocol design and runs IPX over 802.3 without an 802.2 LLC
395 * layer. We look for FFFF which isn't a used 802.2 SSAP/DSAP. This
396 * won't work for fault tolerant netware but does for the rest.
397 */
398 if (*(unsigned short *)rawp == 0xFFFF)
399 return htons(ETH_P_802_3);
400
401 /* Real 802.2 LLC */
402 return htons(ETH_P_802_2);
403 }
404
405 static void myri_rx(struct myri_eth *mp, struct net_device *dev)
406 {
407 struct recvq __iomem *rq = mp->rq;
408 struct recvq __iomem *rqa = mp->rqack;
409 int entry = sbus_readl(&rqa->head);
410 int limit = sbus_readl(&rqa->tail);
411 int drops;
412
413 DRX(("entry[%d] limit[%d] ", entry, limit));
414 if (entry == limit)
415 return;
416 drops = 0;
417 DRX(("\n"));
418 while (entry != limit) {
419 struct myri_rxd __iomem *rxdack = &rqa->myri_rxd[entry];
420 u32 csum = sbus_readl(&rxdack->csum);
421 int len = sbus_readl(&rxdack->myri_scatters[0].len);
422 int index = sbus_readl(&rxdack->ctx);
423 struct myri_rxd __iomem *rxd = &rq->myri_rxd[sbus_readl(&rq->tail)];
424 struct sk_buff *skb = mp->rx_skbs[index];
425
426 /* Ack it. */
427 sbus_writel(NEXT_RX(entry), &rqa->head);
428
429 /* Check for errors. */
430 DRX(("rxd[%d]: %p len[%d] csum[%08x] ", entry, rxd, len, csum));
431 dma_sync_single_for_cpu(&mp->myri_op->dev,
432 sbus_readl(&rxd->myri_scatters[0].addr),
433 RX_ALLOC_SIZE, DMA_FROM_DEVICE);
434 if (len < (ETH_HLEN + MYRI_PAD_LEN) || (skb->data[0] != MYRI_PAD_LEN)) {
435 DRX(("ERROR["));
436 dev->stats.rx_errors++;
437 if (len < (ETH_HLEN + MYRI_PAD_LEN)) {
438 DRX(("BAD_LENGTH] "));
439 dev->stats.rx_length_errors++;
440 } else {
441 DRX(("NO_PADDING] "));
442 dev->stats.rx_frame_errors++;
443 }
444
445 /* Return it to the LANAI. */
446 drop_it:
447 drops++;
448 DRX(("DROP "));
449 dev->stats.rx_dropped++;
450 dma_sync_single_for_device(&mp->myri_op->dev,
451 sbus_readl(&rxd->myri_scatters[0].addr),
452 RX_ALLOC_SIZE,
453 DMA_FROM_DEVICE);
454 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
455 sbus_writel(index, &rxd->ctx);
456 sbus_writel(1, &rxd->num_sg);
457 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
458 goto next;
459 }
460
461 DRX(("len[%d] ", len));
462 if (len > RX_COPY_THRESHOLD) {
463 struct sk_buff *new_skb;
464 u32 dma_addr;
465
466 DRX(("BIGBUFF "));
467 new_skb = myri_alloc_skb(RX_ALLOC_SIZE, GFP_ATOMIC);
468 if (new_skb == NULL) {
469 DRX(("skb_alloc(FAILED) "));
470 goto drop_it;
471 }
472 dma_unmap_single(&mp->myri_op->dev,
473 sbus_readl(&rxd->myri_scatters[0].addr),
474 RX_ALLOC_SIZE,
475 DMA_FROM_DEVICE);
476 mp->rx_skbs[index] = new_skb;
477 new_skb->dev = dev;
478 skb_put(new_skb, RX_ALLOC_SIZE);
479 dma_addr = dma_map_single(&mp->myri_op->dev,
480 new_skb->data,
481 RX_ALLOC_SIZE,
482 DMA_FROM_DEVICE);
483 sbus_writel(dma_addr, &rxd->myri_scatters[0].addr);
484 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
485 sbus_writel(index, &rxd->ctx);
486 sbus_writel(1, &rxd->num_sg);
487 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
488
489 /* Trim the original skb for the netif. */
490 DRX(("trim(%d) ", len));
491 skb_trim(skb, len);
492 } else {
493 struct sk_buff *copy_skb = dev_alloc_skb(len);
494
495 DRX(("SMALLBUFF "));
496 if (copy_skb == NULL) {
497 DRX(("dev_alloc_skb(FAILED) "));
498 goto drop_it;
499 }
500 /* DMA sync already done above. */
501 copy_skb->dev = dev;
502 DRX(("resv_and_put "));
503 skb_put(copy_skb, len);
504 skb_copy_from_linear_data(skb, copy_skb->data, len);
505
506 /* Reuse original ring buffer. */
507 DRX(("reuse "));
508 dma_sync_single_for_device(&mp->myri_op->dev,
509 sbus_readl(&rxd->myri_scatters[0].addr),
510 RX_ALLOC_SIZE,
511 DMA_FROM_DEVICE);
512 sbus_writel(RX_ALLOC_SIZE, &rxd->myri_scatters[0].len);
513 sbus_writel(index, &rxd->ctx);
514 sbus_writel(1, &rxd->num_sg);
515 sbus_writel(NEXT_RX(sbus_readl(&rq->tail)), &rq->tail);
516
517 skb = copy_skb;
518 }
519
520 /* Just like the happy meal we get checksums from this card. */
521 skb->csum = csum;
522 skb->ip_summed = CHECKSUM_UNNECESSARY; /* XXX */
523
524 skb->protocol = myri_type_trans(skb, dev);
525 DRX(("prot[%04x] netif_rx ", skb->protocol));
526 netif_rx(skb);
527
528 dev->last_rx = jiffies;
529 dev->stats.rx_packets++;
530 dev->stats.rx_bytes += len;
531 next:
532 DRX(("NEXT\n"));
533 entry = NEXT_RX(entry);
534 }
535 }
536
537 static irqreturn_t myri_interrupt(int irq, void *dev_id)
538 {
539 struct net_device *dev = (struct net_device *) dev_id;
540 struct myri_eth *mp = (struct myri_eth *) dev->priv;
541 void __iomem *lregs = mp->lregs;
542 struct myri_channel __iomem *chan = &mp->shmem->channel;
543 unsigned long flags;
544 u32 status;
545 int handled = 0;
546
547 spin_lock_irqsave(&mp->irq_lock, flags);
548
549 status = sbus_readl(lregs + LANAI_ISTAT);
550 DIRQ(("myri_interrupt: status[%08x] ", status));
551 if (status & ISTAT_HOST) {
552 u32 softstate;
553
554 handled = 1;
555 DIRQ(("IRQ_DISAB "));
556 myri_disable_irq(lregs, mp->cregs);
557 softstate = sbus_readl(&chan->state);
558 DIRQ(("state[%08x] ", softstate));
559 if (softstate != STATE_READY) {
560 DIRQ(("myri_not_so_happy "));
561 myri_is_not_so_happy(mp);
562 }
563 DIRQ(("\nmyri_rx: "));
564 myri_rx(mp, dev);
565 DIRQ(("\nistat=ISTAT_HOST "));
566 sbus_writel(ISTAT_HOST, lregs + LANAI_ISTAT);
567 DIRQ(("IRQ_ENAB "));
568 myri_enable_irq(lregs, mp->cregs);
569 }
570 DIRQ(("\n"));
571
572 spin_unlock_irqrestore(&mp->irq_lock, flags);
573
574 return IRQ_RETVAL(handled);
575 }
576
577 static int myri_open(struct net_device *dev)
578 {
579 struct myri_eth *mp = (struct myri_eth *) dev->priv;
580
581 return myri_init(mp, in_interrupt());
582 }
583
584 static int myri_close(struct net_device *dev)
585 {
586 struct myri_eth *mp = (struct myri_eth *) dev->priv;
587
588 myri_clean_rings(mp);
589 return 0;
590 }
591
592 static void myri_tx_timeout(struct net_device *dev)
593 {
594 struct myri_eth *mp = (struct myri_eth *) dev->priv;
595
596 printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
597
598 dev->stats.tx_errors++;
599 myri_init(mp, 0);
600 netif_wake_queue(dev);
601 }
602
603 static int myri_start_xmit(struct sk_buff *skb, struct net_device *dev)
604 {
605 struct myri_eth *mp = (struct myri_eth *) dev->priv;
606 struct sendq __iomem *sq = mp->sq;
607 struct myri_txd __iomem *txd;
608 unsigned long flags;
609 unsigned int head, tail;
610 int len, entry;
611 u32 dma_addr;
612
613 DTX(("myri_start_xmit: "));
614
615 myri_tx(mp, dev);
616
617 netif_stop_queue(dev);
618
619 /* This is just to prevent multiple PIO reads for TX_BUFFS_AVAIL. */
620 head = sbus_readl(&sq->head);
621 tail = sbus_readl(&sq->tail);
622
623 if (!TX_BUFFS_AVAIL(head, tail)) {
624 DTX(("no buffs available, returning 1\n"));
625 return 1;
626 }
627
628 spin_lock_irqsave(&mp->irq_lock, flags);
629
630 DHDR(("xmit[skbdata(%p)]\n", skb->data));
631 #ifdef DEBUG_HEADER
632 dump_ehdr_and_myripad(((unsigned char *) skb->data));
633 #endif
634
635 /* XXX Maybe this can go as well. */
636 len = skb->len;
637 if (len & 3) {
638 DTX(("len&3 "));
639 len = (len + 4) & (~3);
640 }
641
642 entry = sbus_readl(&sq->tail);
643
644 txd = &sq->myri_txd[entry];
645 mp->tx_skbs[entry] = skb;
646
647 /* Must do this before we sbus map it. */
648 if (skb->data[MYRI_PAD_LEN] & 0x1) {
649 sbus_writew(0xffff, &txd->addr[0]);
650 sbus_writew(0xffff, &txd->addr[1]);
651 sbus_writew(0xffff, &txd->addr[2]);
652 sbus_writew(0xffff, &txd->addr[3]);
653 } else {
654 sbus_writew(0xffff, &txd->addr[0]);
655 sbus_writew((skb->data[0] << 8) | skb->data[1], &txd->addr[1]);
656 sbus_writew((skb->data[2] << 8) | skb->data[3], &txd->addr[2]);
657 sbus_writew((skb->data[4] << 8) | skb->data[5], &txd->addr[3]);
658 }
659
660 dma_addr = dma_map_single(&mp->myri_op->dev, skb->data,
661 len, DMA_TO_DEVICE);
662 sbus_writel(dma_addr, &txd->myri_gathers[0].addr);
663 sbus_writel(len, &txd->myri_gathers[0].len);
664 sbus_writel(1, &txd->num_sg);
665 sbus_writel(KERNEL_CHANNEL, &txd->chan);
666 sbus_writel(len, &txd->len);
667 sbus_writel((u32)-1, &txd->csum_off);
668 sbus_writel(0, &txd->csum_field);
669
670 sbus_writel(NEXT_TX(entry), &sq->tail);
671 DTX(("BangTheChip "));
672 bang_the_chip(mp);
673
674 DTX(("tbusy=0, returning 0\n"));
675 netif_start_queue(dev);
676 spin_unlock_irqrestore(&mp->irq_lock, flags);
677 return 0;
678 }
679
680 /* Create the MyriNet MAC header for an arbitrary protocol layer
681 *
682 * saddr=NULL means use device source address
683 * daddr=NULL means leave destination address (eg unresolved arp)
684 */
685 static int myri_header(struct sk_buff *skb, struct net_device *dev,
686 unsigned short type, const void *daddr,
687 const void *saddr, unsigned len)
688 {
689 struct ethhdr *eth = (struct ethhdr *) skb_push(skb, ETH_HLEN);
690 unsigned char *pad = (unsigned char *) skb_push(skb, MYRI_PAD_LEN);
691
692 #ifdef DEBUG_HEADER
693 DHDR(("myri_header: pad[%02x,%02x] ", pad[0], pad[1]));
694 dump_ehdr(eth);
695 #endif
696
697 /* Set the MyriNET padding identifier. */
698 pad[0] = MYRI_PAD_LEN;
699 pad[1] = 0xab;
700
701 /* Set the protocol type. For a packet of type ETH_P_802_3 we put the length
702 * in here instead. It is up to the 802.2 layer to carry protocol information.
703 */
704 if (type != ETH_P_802_3)
705 eth->h_proto = htons(type);
706 else
707 eth->h_proto = htons(len);
708
709 /* Set the source hardware address. */
710 if (saddr)
711 memcpy(eth->h_source, saddr, dev->addr_len);
712 else
713 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
714
715 /* Anyway, the loopback-device should never use this function... */
716 if (dev->flags & IFF_LOOPBACK) {
717 int i;
718 for (i = 0; i < dev->addr_len; i++)
719 eth->h_dest[i] = 0;
720 return(dev->hard_header_len);
721 }
722
723 if (daddr) {
724 memcpy(eth->h_dest, daddr, dev->addr_len);
725 return dev->hard_header_len;
726 }
727 return -dev->hard_header_len;
728 }
729
730 /* Rebuild the MyriNet MAC header. This is called after an ARP
731 * (or in future other address resolution) has completed on this
732 * sk_buff. We now let ARP fill in the other fields.
733 */
734 static int myri_rebuild_header(struct sk_buff *skb)
735 {
736 unsigned char *pad = (unsigned char *) skb->data;
737 struct ethhdr *eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
738 struct net_device *dev = skb->dev;
739
740 #ifdef DEBUG_HEADER
741 DHDR(("myri_rebuild_header: pad[%02x,%02x] ", pad[0], pad[1]));
742 dump_ehdr(eth);
743 #endif
744
745 /* Refill MyriNet padding identifiers, this is just being anal. */
746 pad[0] = MYRI_PAD_LEN;
747 pad[1] = 0xab;
748
749 switch (eth->h_proto)
750 {
751 #ifdef CONFIG_INET
752 case __constant_htons(ETH_P_IP):
753 return arp_find(eth->h_dest, skb);
754 #endif
755
756 default:
757 printk(KERN_DEBUG
758 "%s: unable to resolve type %X addresses.\n",
759 dev->name, (int)eth->h_proto);
760
761 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
762 return 0;
763 break;
764 }
765
766 return 0;
767 }
768
769 static int myri_header_cache(const struct neighbour *neigh, struct hh_cache *hh)
770 {
771 unsigned short type = hh->hh_type;
772 unsigned char *pad;
773 struct ethhdr *eth;
774 const struct net_device *dev = neigh->dev;
775
776 pad = ((unsigned char *) hh->hh_data) +
777 HH_DATA_OFF(sizeof(*eth) + MYRI_PAD_LEN);
778 eth = (struct ethhdr *) (pad + MYRI_PAD_LEN);
779
780 if (type == htons(ETH_P_802_3))
781 return -1;
782
783 /* Refill MyriNet padding identifiers, this is just being anal. */
784 pad[0] = MYRI_PAD_LEN;
785 pad[1] = 0xab;
786
787 eth->h_proto = type;
788 memcpy(eth->h_source, dev->dev_addr, dev->addr_len);
789 memcpy(eth->h_dest, neigh->ha, dev->addr_len);
790 hh->hh_len = 16;
791 return 0;
792 }
793
794
795 /* Called by Address Resolution module to notify changes in address. */
796 void myri_header_cache_update(struct hh_cache *hh,
797 const struct net_device *dev,
798 const unsigned char * haddr)
799 {
800 memcpy(((u8*)hh->hh_data) + HH_DATA_OFF(sizeof(struct ethhdr)),
801 haddr, dev->addr_len);
802 }
803
804 static int myri_change_mtu(struct net_device *dev, int new_mtu)
805 {
806 if ((new_mtu < (ETH_HLEN + MYRI_PAD_LEN)) || (new_mtu > MYRINET_MTU))
807 return -EINVAL;
808 dev->mtu = new_mtu;
809 return 0;
810 }
811
812 static void myri_set_multicast(struct net_device *dev)
813 {
814 /* Do nothing, all MyriCOM nodes transmit multicast frames
815 * as broadcast packets...
816 */
817 }
818
819 static inline void set_boardid_from_idprom(struct myri_eth *mp, int num)
820 {
821 mp->eeprom.id[0] = 0;
822 mp->eeprom.id[1] = idprom->id_machtype;
823 mp->eeprom.id[2] = (idprom->id_sernum >> 16) & 0xff;
824 mp->eeprom.id[3] = (idprom->id_sernum >> 8) & 0xff;
825 mp->eeprom.id[4] = (idprom->id_sernum >> 0) & 0xff;
826 mp->eeprom.id[5] = num;
827 }
828
829 static inline void determine_reg_space_size(struct myri_eth *mp)
830 {
831 switch(mp->eeprom.cpuvers) {
832 case CPUVERS_2_3:
833 case CPUVERS_3_0:
834 case CPUVERS_3_1:
835 case CPUVERS_3_2:
836 mp->reg_size = (3 * 128 * 1024) + 4096;
837 break;
838
839 case CPUVERS_4_0:
840 case CPUVERS_4_1:
841 mp->reg_size = ((4096<<1) + mp->eeprom.ramsz);
842 break;
843
844 case CPUVERS_4_2:
845 case CPUVERS_5_0:
846 default:
847 printk("myricom: AIEEE weird cpu version %04x assuming pre4.0\n",
848 mp->eeprom.cpuvers);
849 mp->reg_size = (3 * 128 * 1024) + 4096;
850 };
851 }
852
853 #ifdef DEBUG_DETECT
854 static void dump_eeprom(struct myri_eth *mp)
855 {
856 printk("EEPROM: clockval[%08x] cpuvers[%04x] "
857 "id[%02x,%02x,%02x,%02x,%02x,%02x]\n",
858 mp->eeprom.cval, mp->eeprom.cpuvers,
859 mp->eeprom.id[0], mp->eeprom.id[1], mp->eeprom.id[2],
860 mp->eeprom.id[3], mp->eeprom.id[4], mp->eeprom.id[5]);
861 printk("EEPROM: ramsz[%08x]\n", mp->eeprom.ramsz);
862 printk("EEPROM: fvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
863 mp->eeprom.fvers[0], mp->eeprom.fvers[1], mp->eeprom.fvers[2],
864 mp->eeprom.fvers[3], mp->eeprom.fvers[4], mp->eeprom.fvers[5],
865 mp->eeprom.fvers[6], mp->eeprom.fvers[7]);
866 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
867 mp->eeprom.fvers[8], mp->eeprom.fvers[9], mp->eeprom.fvers[10],
868 mp->eeprom.fvers[11], mp->eeprom.fvers[12], mp->eeprom.fvers[13],
869 mp->eeprom.fvers[14], mp->eeprom.fvers[15]);
870 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
871 mp->eeprom.fvers[16], mp->eeprom.fvers[17], mp->eeprom.fvers[18],
872 mp->eeprom.fvers[19], mp->eeprom.fvers[20], mp->eeprom.fvers[21],
873 mp->eeprom.fvers[22], mp->eeprom.fvers[23]);
874 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
875 mp->eeprom.fvers[24], mp->eeprom.fvers[25], mp->eeprom.fvers[26],
876 mp->eeprom.fvers[27], mp->eeprom.fvers[28], mp->eeprom.fvers[29],
877 mp->eeprom.fvers[30], mp->eeprom.fvers[31]);
878 printk("EEPROM: mvers[%02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x\n",
879 mp->eeprom.mvers[0], mp->eeprom.mvers[1], mp->eeprom.mvers[2],
880 mp->eeprom.mvers[3], mp->eeprom.mvers[4], mp->eeprom.mvers[5],
881 mp->eeprom.mvers[6], mp->eeprom.mvers[7]);
882 printk("EEPROM: %02x,%02x,%02x,%02x,%02x,%02x,%02x,%02x]\n",
883 mp->eeprom.mvers[8], mp->eeprom.mvers[9], mp->eeprom.mvers[10],
884 mp->eeprom.mvers[11], mp->eeprom.mvers[12], mp->eeprom.mvers[13],
885 mp->eeprom.mvers[14], mp->eeprom.mvers[15]);
886 printk("EEPROM: dlval[%04x] brd_type[%04x] bus_type[%04x] prod_code[%04x]\n",
887 mp->eeprom.dlval, mp->eeprom.brd_type, mp->eeprom.bus_type,
888 mp->eeprom.prod_code);
889 printk("EEPROM: serial_num[%08x]\n", mp->eeprom.serial_num);
890 }
891 #endif
892
893 static const struct header_ops myri_header_ops = {
894 .create = myri_header,
895 .rebuild = myri_rebuild_header,
896 .cache = myri_header_cache,
897 .cache_update = myri_header_cache_update,
898 };
899
900 static int __devinit myri_sbus_probe(struct of_device *op, const struct of_device_id *match)
901 {
902 struct device_node *dp = op->node;
903 static unsigned version_printed;
904 struct net_device *dev;
905 struct myri_eth *mp;
906 const void *prop;
907 static int num;
908 int i, len;
909
910 DET(("myri_ether_init(%p,%d):\n", op, num));
911 dev = alloc_etherdev(sizeof(struct myri_eth));
912 if (!dev)
913 return -ENOMEM;
914
915 if (version_printed++ == 0)
916 printk(version);
917
918 SET_NETDEV_DEV(dev, &op->dev);
919
920 mp = netdev_priv(dev);
921 spin_lock_init(&mp->irq_lock);
922 mp->myri_op = op;
923
924 /* Clean out skb arrays. */
925 for (i = 0; i < (RX_RING_SIZE + 1); i++)
926 mp->rx_skbs[i] = NULL;
927
928 for (i = 0; i < TX_RING_SIZE; i++)
929 mp->tx_skbs[i] = NULL;
930
931 /* First check for EEPROM information. */
932 prop = of_get_property(dp, "myrinet-eeprom-info", &len);
933
934 if (prop)
935 memcpy(&mp->eeprom, prop, sizeof(struct myri_eeprom));
936 if (!prop) {
937 /* No eeprom property, must cook up the values ourselves. */
938 DET(("No EEPROM: "));
939 mp->eeprom.bus_type = BUS_TYPE_SBUS;
940 mp->eeprom.cpuvers =
941 of_getintprop_default(dp, "cpu_version", 0);
942 mp->eeprom.cval =
943 of_getintprop_default(dp, "clock_value", 0);
944 mp->eeprom.ramsz = of_getintprop_default(dp, "sram_size", 0);
945 if (!mp->eeprom.cpuvers)
946 mp->eeprom.cpuvers = CPUVERS_2_3;
947 if (mp->eeprom.cpuvers < CPUVERS_3_0)
948 mp->eeprom.cval = 0;
949 if (!mp->eeprom.ramsz)
950 mp->eeprom.ramsz = (128 * 1024);
951
952 prop = of_get_property(dp, "myrinet-board-id", &len);
953 if (prop)
954 memcpy(&mp->eeprom.id[0], prop, 6);
955 else
956 set_boardid_from_idprom(mp, num);
957
958 prop = of_get_property(dp, "fpga_version", &len);
959 if (prop)
960 memcpy(&mp->eeprom.fvers[0], prop, 32);
961 else
962 memset(&mp->eeprom.fvers[0], 0, 32);
963
964 if (mp->eeprom.cpuvers == CPUVERS_4_1) {
965 if (mp->eeprom.ramsz == (128 * 1024))
966 mp->eeprom.ramsz = (256 * 1024);
967 if ((mp->eeprom.cval == 0x40414041) ||
968 (mp->eeprom.cval == 0x90449044))
969 mp->eeprom.cval = 0x50e450e4;
970 }
971 }
972 #ifdef DEBUG_DETECT
973 dump_eeprom(mp);
974 #endif
975
976 for (i = 0; i < 6; i++)
977 dev->dev_addr[i] = mp->eeprom.id[i];
978
979 determine_reg_space_size(mp);
980
981 /* Map in the MyriCOM register/localram set. */
982 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
983 /* XXX Makes no sense, if control reg is non-existant this
984 * XXX driver cannot function at all... maybe pre-4.0 is
985 * XXX only a valid version for PCI cards? Ask feldy...
986 */
987 DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
988 mp->regs = of_ioremap(&op->resource[0], 0,
989 mp->reg_size, "MyriCOM Regs");
990 if (!mp->regs) {
991 printk("MyriCOM: Cannot map MyriCOM registers.\n");
992 goto err;
993 }
994 mp->lanai = mp->regs + (256 * 1024);
995 mp->lregs = mp->lanai + (0x10000 * 2);
996 } else {
997 DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
998 mp->cregs = of_ioremap(&op->resource[0], 0,
999 PAGE_SIZE, "MyriCOM Control Regs");
1000 mp->lregs = of_ioremap(&op->resource[0], (256 * 1024),
1001 PAGE_SIZE, "MyriCOM LANAI Regs");
1002 mp->lanai = of_ioremap(&op->resource[0], (512 * 1024),
1003 mp->eeprom.ramsz, "MyriCOM SRAM");
1004 }
1005 DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
1006 mp->cregs, mp->lregs, mp->lanai));
1007
1008 if (mp->eeprom.cpuvers >= CPUVERS_4_0)
1009 mp->shmem_base = 0xf000;
1010 else
1011 mp->shmem_base = 0x8000;
1012
1013 DET(("Shared memory base is %04x, ", mp->shmem_base));
1014
1015 mp->shmem = (struct myri_shmem __iomem *)
1016 (mp->lanai + (mp->shmem_base * 2));
1017 DET(("shmem mapped at %p\n", mp->shmem));
1018
1019 mp->rqack = &mp->shmem->channel.recvqa;
1020 mp->rq = &mp->shmem->channel.recvq;
1021 mp->sq = &mp->shmem->channel.sendq;
1022
1023 /* Reset the board. */
1024 DET(("Resetting LANAI\n"));
1025 myri_reset_off(mp->lregs, mp->cregs);
1026 myri_reset_on(mp->cregs);
1027
1028 /* Turn IRQ's off. */
1029 myri_disable_irq(mp->lregs, mp->cregs);
1030
1031 /* Reset once more. */
1032 myri_reset_on(mp->cregs);
1033
1034 /* Get the supported DVMA burst sizes from our SBUS. */
1035 mp->myri_bursts = of_getintprop_default(dp->parent,
1036 "burst-sizes", 0x00);
1037 if (!sbus_can_burst64())
1038 mp->myri_bursts &= ~(DMA_BURST64);
1039
1040 DET(("MYRI bursts %02x\n", mp->myri_bursts));
1041
1042 /* Encode SBUS interrupt level in second control register. */
1043 i = of_getintprop_default(dp, "interrupts", 0);
1044 if (i == 0)
1045 i = 4;
1046 DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
1047 i, (1 << i)));
1048
1049 sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);
1050
1051 mp->dev = dev;
1052 dev->open = &myri_open;
1053 dev->stop = &myri_close;
1054 dev->hard_start_xmit = &myri_start_xmit;
1055 dev->tx_timeout = &myri_tx_timeout;
1056 dev->watchdog_timeo = 5*HZ;
1057 dev->set_multicast_list = &myri_set_multicast;
1058 dev->irq = op->irqs[0];
1059
1060 /* Register interrupt handler now. */
1061 DET(("Requesting MYRIcom IRQ line.\n"));
1062 if (request_irq(dev->irq, &myri_interrupt,
1063 IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) {
1064 printk("MyriCOM: Cannot register interrupt handler.\n");
1065 goto err;
1066 }
1067
1068 dev->mtu = MYRINET_MTU;
1069 dev->change_mtu = myri_change_mtu;
1070 dev->header_ops = &myri_header_ops;
1071
1072 dev->hard_header_len = (ETH_HLEN + MYRI_PAD_LEN);
1073
1074 /* Load code onto the LANai. */
1075 DET(("Loading LANAI firmware\n"));
1076 myri_load_lanai(mp);
1077
1078 if (register_netdev(dev)) {
1079 printk("MyriCOM: Cannot register device.\n");
1080 goto err_free_irq;
1081 }
1082
1083 dev_set_drvdata(&op->dev, mp);
1084
1085 num++;
1086
1087 printk("%s: MyriCOM MyriNET Ethernet %pM\n",
1088 dev->name, dev->dev_addr);
1089
1090 return 0;
1091
1092 err_free_irq:
1093 free_irq(dev->irq, dev);
1094 err:
1095 /* This will also free the co-allocated 'dev->priv' */
1096 free_netdev(dev);
1097 return -ENODEV;
1098 }
1099
1100 static int __devexit myri_sbus_remove(struct of_device *op)
1101 {
1102 struct myri_eth *mp = dev_get_drvdata(&op->dev);
1103 struct net_device *net_dev = mp->dev;
1104
1105 unregister_netdev(net_dev);
1106
1107 free_irq(net_dev->irq, net_dev);
1108
1109 if (mp->eeprom.cpuvers < CPUVERS_4_0) {
1110 of_iounmap(&op->resource[0], mp->regs, mp->reg_size);
1111 } else {
1112 of_iounmap(&op->resource[0], mp->cregs, PAGE_SIZE);
1113 of_iounmap(&op->resource[0], mp->lregs, (256 * 1024));
1114 of_iounmap(&op->resource[0], mp->lanai, (512 * 1024));
1115 }
1116
1117 free_netdev(net_dev);
1118
1119 dev_set_drvdata(&op->dev, NULL);
1120
1121 return 0;
1122 }
1123
1124 static const struct of_device_id myri_sbus_match[] = {
1125 {
1126 .name = "MYRICOM,mlanai",
1127 },
1128 {
1129 .name = "myri",
1130 },
1131 {},
1132 };
1133
1134 MODULE_DEVICE_TABLE(of, myri_sbus_match);
1135
1136 static struct of_platform_driver myri_sbus_driver = {
1137 .name = "myri",
1138 .match_table = myri_sbus_match,
1139 .probe = myri_sbus_probe,
1140 .remove = __devexit_p(myri_sbus_remove),
1141 };
1142
1143 static int __init myri_sbus_init(void)
1144 {
1145 return of_register_driver(&myri_sbus_driver, &of_bus_type);
1146 }
1147
1148 static void __exit myri_sbus_exit(void)
1149 {
1150 of_unregister_driver(&myri_sbus_driver);
1151 }
1152
1153 module_init(myri_sbus_init);
1154 module_exit(myri_sbus_exit);
1155
1156 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.061543 seconds and 6 git commands to generate.