projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
netxen: add defs for new chip/boards
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 u32 addr;
42 u32 data;
43 };
44
45 #define NETXEN_MAX_CRB_XFORM 60
46 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
47 #define NETXEN_ADDR_ERROR (0xffffffff)
48
49 #define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
53 #define NETXEN_NIC_XDMA_RESET 0x8000ff
54
55 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
56 uint32_t ctx, uint32_t ringid);
57
58 #if 0
59 static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
60 unsigned long off, int *data)
61 {
62 void __iomem *addr = pci_base_offset(adapter, off);
63 writel(*data, addr);
64 }
65 #endif /* 0 */
66
67 static void crb_addr_transform_setup(void)
68 {
69 crb_addr_transform(XDMA);
70 crb_addr_transform(TIMR);
71 crb_addr_transform(SRE);
72 crb_addr_transform(SQN3);
73 crb_addr_transform(SQN2);
74 crb_addr_transform(SQN1);
75 crb_addr_transform(SQN0);
76 crb_addr_transform(SQS3);
77 crb_addr_transform(SQS2);
78 crb_addr_transform(SQS1);
79 crb_addr_transform(SQS0);
80 crb_addr_transform(RPMX7);
81 crb_addr_transform(RPMX6);
82 crb_addr_transform(RPMX5);
83 crb_addr_transform(RPMX4);
84 crb_addr_transform(RPMX3);
85 crb_addr_transform(RPMX2);
86 crb_addr_transform(RPMX1);
87 crb_addr_transform(RPMX0);
88 crb_addr_transform(ROMUSB);
89 crb_addr_transform(SN);
90 crb_addr_transform(QMN);
91 crb_addr_transform(QMS);
92 crb_addr_transform(PGNI);
93 crb_addr_transform(PGND);
94 crb_addr_transform(PGN3);
95 crb_addr_transform(PGN2);
96 crb_addr_transform(PGN1);
97 crb_addr_transform(PGN0);
98 crb_addr_transform(PGSI);
99 crb_addr_transform(PGSD);
100 crb_addr_transform(PGS3);
101 crb_addr_transform(PGS2);
102 crb_addr_transform(PGS1);
103 crb_addr_transform(PGS0);
104 crb_addr_transform(PS);
105 crb_addr_transform(PH);
106 crb_addr_transform(NIU);
107 crb_addr_transform(I2Q);
108 crb_addr_transform(EG);
109 crb_addr_transform(MN);
110 crb_addr_transform(MS);
111 crb_addr_transform(CAS2);
112 crb_addr_transform(CAS1);
113 crb_addr_transform(CAS0);
114 crb_addr_transform(CAM);
115 crb_addr_transform(C2C1);
116 crb_addr_transform(C2C0);
117 crb_addr_transform(SMB);
118 crb_addr_transform(OCM0);
119 crb_addr_transform(I2C0);
120 }
121
122 int netxen_init_firmware(struct netxen_adapter *adapter)
123 {
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100);
134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
146 writel(INTR_SCHEME_PERPORT,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
148 writel(MSI_MODE_MULTIFUNC,
149 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
150 writel(MPORT_MULTI_FUNCTION_MODE,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
152 writel(PHAN_INITIALIZE_ACK,
153 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
154
155 return err;
156 }
157
158 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
159 {
160 int ctxid, ring;
161 u32 i;
162 u32 num_rx_bufs = 0;
163 struct netxen_rcv_desc_ctx *rcv_desc;
164
165 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
166 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
167 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
168 struct netxen_rx_buffer *rx_buf;
169 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
170 rcv_desc->begin_alloc = 0;
171 rx_buf = rcv_desc->rx_buf_arr;
172 num_rx_bufs = rcv_desc->max_rx_desc_count;
173 /*
174 * Now go through all of them, set reference handles
175 * and put them in the queues.
176 */
177 for (i = 0; i < num_rx_bufs; i++) {
178 rx_buf->ref_handle = i;
179 rx_buf->state = NETXEN_BUFFER_FREE;
180 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
181 "%p\n", ctxid, i, rx_buf);
182 rx_buf++;
183 }
184 }
185 }
186 }
187
188 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
189 {
190 switch (adapter->ahw.board_type) {
191 case NETXEN_NIC_GBE:
192 adapter->enable_phy_interrupts =
193 netxen_niu_gbe_enable_phy_interrupts;
194 adapter->disable_phy_interrupts =
195 netxen_niu_gbe_disable_phy_interrupts;
196 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
197 adapter->macaddr_set = netxen_niu_macaddr_set;
198 adapter->set_mtu = netxen_nic_set_mtu_gb;
199 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
200 adapter->phy_read = netxen_niu_gbe_phy_read;
201 adapter->phy_write = netxen_niu_gbe_phy_write;
202 adapter->init_niu = netxen_nic_init_niu_gb;
203 adapter->stop_port = netxen_niu_disable_gbe_port;
204 break;
205
206 case NETXEN_NIC_XGBE:
207 adapter->enable_phy_interrupts =
208 netxen_niu_xgbe_enable_phy_interrupts;
209 adapter->disable_phy_interrupts =
210 netxen_niu_xgbe_disable_phy_interrupts;
211 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
212 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
213 adapter->set_mtu = netxen_nic_set_mtu_xgb;
214 adapter->init_port = netxen_niu_xg_init_port;
215 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
216 adapter->stop_port = netxen_niu_disable_xg_port;
217 break;
218
219 default:
220 break;
221 }
222 }
223
224 /*
225 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
226 * address to external PCI CRB address.
227 */
228 static u32 netxen_decode_crb_addr(u32 addr)
229 {
230 int i;
231 u32 base_addr, offset, pci_base;
232
233 crb_addr_transform_setup();
234
235 pci_base = NETXEN_ADDR_ERROR;
236 base_addr = addr & 0xfff00000;
237 offset = addr & 0x000fffff;
238
239 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
240 if (crb_addr_xform[i] == base_addr) {
241 pci_base = i << 20;
242 break;
243 }
244 }
245 if (pci_base == NETXEN_ADDR_ERROR)
246 return pci_base;
247 else
248 return (pci_base + offset);
249 }
250
251 static long rom_max_timeout = 100;
252 static long rom_lock_timeout = 10000;
253 #if 0
254 static long rom_write_timeout = 700;
255 #endif
256
257 static int rom_lock(struct netxen_adapter *adapter)
258 {
259 int iter;
260 u32 done = 0;
261 int timeout = 0;
262
263 while (!done) {
264 /* acquire semaphore2 from PCI HW block */
265 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
266 &done);
267 if (done == 1)
268 break;
269 if (timeout >= rom_lock_timeout)
270 return -EIO;
271
272 timeout++;
273 /*
274 * Yield CPU
275 */
276 if (!in_atomic())
277 schedule();
278 else {
279 for (iter = 0; iter < 20; iter++)
280 cpu_relax(); /*This a nop instr on i386 */
281 }
282 }
283 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
284 return 0;
285 }
286
287 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
288 {
289 long timeout = 0;
290 long done = 0;
291
292 while (done == 0) {
293 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
294 done &= 2;
295 timeout++;
296 if (timeout >= rom_max_timeout) {
297 printk("Timeout reached waiting for rom done");
298 return -EIO;
299 }
300 }
301 return 0;
302 }
303
304 #if 0
305 static int netxen_rom_wren(struct netxen_adapter *adapter)
306 {
307 /* Set write enable latch in ROM status register */
308 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
309 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
310 M25P_INSTR_WREN);
311 if (netxen_wait_rom_done(adapter)) {
312 return -1;
313 }
314 return 0;
315 }
316
317 static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
318 unsigned int addr)
319 {
320 unsigned int data = 0xdeaddead;
321 data = netxen_nic_reg_read(adapter, addr);
322 return data;
323 }
324
325 static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
326 {
327 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
328 M25P_INSTR_RDSR);
329 if (netxen_wait_rom_done(adapter)) {
330 return -1;
331 }
332 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
333 }
334 #endif
335
336 static void netxen_rom_unlock(struct netxen_adapter *adapter)
337 {
338 u32 val;
339
340 /* release semaphore2 */
341 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
342
343 }
344
345 #if 0
346 static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
347 {
348 long timeout = 0;
349 long wip = 1;
350 int val;
351 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
352 while (wip != 0) {
353 val = netxen_do_rom_rdsr(adapter);
354 wip = val & 1;
355 timeout++;
356 if (timeout > rom_max_timeout) {
357 return -1;
358 }
359 }
360 return 0;
361 }
362
363 static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
364 int data)
365 {
366 if (netxen_rom_wren(adapter)) {
367 return -1;
368 }
369 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
370 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
371 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
372 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
373 M25P_INSTR_PP);
374 if (netxen_wait_rom_done(adapter)) {
375 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
376 return -1;
377 }
378
379 return netxen_rom_wip_poll(adapter);
380 }
381 #endif
382
383 static int do_rom_fast_read(struct netxen_adapter *adapter,
384 int addr, int *valp)
385 {
386 cond_resched();
387
388 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
389 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
390 udelay(100); /* prevent bursting on CRB */
391 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
393 if (netxen_wait_rom_done(adapter)) {
394 printk("Error waiting for rom done\n");
395 return -EIO;
396 }
397 /* reset abyte_cnt and dummy_byte_cnt */
398 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
399 udelay(100); /* prevent bursting on CRB */
400 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
401
402 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
403 return 0;
404 }
405
406 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
407 u8 *bytes, size_t size)
408 {
409 int addridx;
410 int ret = 0;
411
412 for (addridx = addr; addridx < (addr + size); addridx += 4) {
413 int v;
414 ret = do_rom_fast_read(adapter, addridx, &v);
415 if (ret != 0)
416 break;
417 *(__le32 *)bytes = cpu_to_le32(v);
418 bytes += 4;
419 }
420
421 return ret;
422 }
423
424 int
425 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
426 u8 *bytes, size_t size)
427 {
428 int ret;
429
430 ret = rom_lock(adapter);
431 if (ret < 0)
432 return ret;
433
434 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
435
436 netxen_rom_unlock(adapter);
437 return ret;
438 }
439
440 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
441 {
442 int ret;
443
444 if (rom_lock(adapter) != 0)
445 return -EIO;
446
447 ret = do_rom_fast_read(adapter, addr, valp);
448 netxen_rom_unlock(adapter);
449 return ret;
450 }
451
452 #if 0
453 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
454 {
455 int ret = 0;
456
457 if (rom_lock(adapter) != 0) {
458 return -1;
459 }
460 ret = do_rom_fast_write(adapter, addr, data);
461 netxen_rom_unlock(adapter);
462 return ret;
463 }
464
465 static int do_rom_fast_write_words(struct netxen_adapter *adapter,
466 int addr, u8 *bytes, size_t size)
467 {
468 int addridx = addr;
469 int ret = 0;
470
471 while (addridx < (addr + size)) {
472 int last_attempt = 0;
473 int timeout = 0;
474 int data;
475
476 data = le32_to_cpu((*(__le32*)bytes));
477 ret = do_rom_fast_write(adapter, addridx, data);
478 if (ret < 0)
479 return ret;
480
481 while(1) {
482 int data1;
483
484 ret = do_rom_fast_read(adapter, addridx, &data1);
485 if (ret < 0)
486 return ret;
487
488 if (data1 == data)
489 break;
490
491 if (timeout++ >= rom_write_timeout) {
492 if (last_attempt++ < 4) {
493 ret = do_rom_fast_write(adapter,
494 addridx, data);
495 if (ret < 0)
496 return ret;
497 }
498 else {
499 printk(KERN_INFO "Data write did not "
500 "succeed at address 0x%x\n", addridx);
501 break;
502 }
503 }
504 }
505
506 bytes += 4;
507 addridx += 4;
508 }
509
510 return ret;
511 }
512
513 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
514 u8 *bytes, size_t size)
515 {
516 int ret = 0;
517
518 ret = rom_lock(adapter);
519 if (ret < 0)
520 return ret;
521
522 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
523 netxen_rom_unlock(adapter);
524
525 return ret;
526 }
527
528 static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
529 {
530 int ret;
531
532 ret = netxen_rom_wren(adapter);
533 if (ret < 0)
534 return ret;
535
536 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
537 netxen_crb_writelit_adapter(adapter,
538 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
539
540 ret = netxen_wait_rom_done(adapter);
541 if (ret < 0)
542 return ret;
543
544 return netxen_rom_wip_poll(adapter);
545 }
546
547 static int netxen_rom_rdsr(struct netxen_adapter *adapter)
548 {
549 int ret;
550
551 ret = rom_lock(adapter);
552 if (ret < 0)
553 return ret;
554
555 ret = netxen_do_rom_rdsr(adapter);
556 netxen_rom_unlock(adapter);
557 return ret;
558 }
559
560 int netxen_backup_crbinit(struct netxen_adapter *adapter)
561 {
562 int ret = FLASH_SUCCESS;
563 int val;
564 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
565
566 if (!buffer)
567 return -ENOMEM;
568 /* unlock sector 63 */
569 val = netxen_rom_rdsr(adapter);
570 val = val & 0xe3;
571 ret = netxen_rom_wrsr(adapter, val);
572 if (ret != FLASH_SUCCESS)
573 goto out_kfree;
574
575 ret = netxen_rom_wip_poll(adapter);
576 if (ret != FLASH_SUCCESS)
577 goto out_kfree;
578
579 /* copy sector 0 to sector 63 */
580 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
581 buffer, NETXEN_FLASH_SECTOR_SIZE);
582 if (ret != FLASH_SUCCESS)
583 goto out_kfree;
584
585 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
586 buffer, NETXEN_FLASH_SECTOR_SIZE);
587 if (ret != FLASH_SUCCESS)
588 goto out_kfree;
589
590 /* lock sector 63 */
591 val = netxen_rom_rdsr(adapter);
592 if (!(val & 0x8)) {
593 val |= (0x1 << 2);
594 /* lock sector 63 */
595 if (netxen_rom_wrsr(adapter, val) == 0) {
596 ret = netxen_rom_wip_poll(adapter);
597 if (ret != FLASH_SUCCESS)
598 goto out_kfree;
599
600 /* lock SR writes */
601 ret = netxen_rom_wip_poll(adapter);
602 if (ret != FLASH_SUCCESS)
603 goto out_kfree;
604 }
605 }
606
607 out_kfree:
608 kfree(buffer);
609 return ret;
610 }
611
612 static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
613 {
614 netxen_rom_wren(adapter);
615 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
616 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
617 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
618 M25P_INSTR_SE);
619 if (netxen_wait_rom_done(adapter)) {
620 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
621 return -1;
622 }
623 return netxen_rom_wip_poll(adapter);
624 }
625
626 static void check_erased_flash(struct netxen_adapter *adapter, int addr)
627 {
628 int i;
629 int val;
630 int count = 0, erased_errors = 0;
631 int range;
632
633 range = (addr == NETXEN_USER_START) ?
634 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
635
636 for (i = addr; i < range; i += 4) {
637 netxen_rom_fast_read(adapter, i, &val);
638 if (val != 0xffffffff)
639 erased_errors++;
640 count++;
641 }
642
643 if (erased_errors)
644 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
645 "for sector address: %x\n", erased_errors, count, addr);
646 }
647
648 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
649 {
650 int ret = 0;
651 if (rom_lock(adapter) != 0) {
652 return -1;
653 }
654 ret = netxen_do_rom_se(adapter, addr);
655 netxen_rom_unlock(adapter);
656 msleep(30);
657 check_erased_flash(adapter, addr);
658
659 return ret;
660 }
661
662 static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
663 int start, int end)
664 {
665 int ret = FLASH_SUCCESS;
666 int i;
667
668 for (i = start; i < end; i++) {
669 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
670 if (ret)
671 break;
672 ret = netxen_rom_wip_poll(adapter);
673 if (ret < 0)
674 return ret;
675 }
676
677 return ret;
678 }
679
680 int
681 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
682 {
683 int ret = FLASH_SUCCESS;
684 int start, end;
685
686 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
687 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
688 ret = netxen_flash_erase_sections(adapter, start, end);
689
690 return ret;
691 }
692
693 int
694 netxen_flash_erase_primary(struct netxen_adapter *adapter)
695 {
696 int ret = FLASH_SUCCESS;
697 int start, end;
698
699 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
700 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
701 ret = netxen_flash_erase_sections(adapter, start, end);
702
703 return ret;
704 }
705
706 void netxen_halt_pegs(struct netxen_adapter *adapter)
707 {
708 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
709 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
710 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
711 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
712 }
713
714 int netxen_flash_unlock(struct netxen_adapter *adapter)
715 {
716 int ret = 0;
717
718 ret = netxen_rom_wrsr(adapter, 0);
719 if (ret < 0)
720 return ret;
721
722 ret = netxen_rom_wren(adapter);
723 if (ret < 0)
724 return ret;
725
726 return ret;
727 }
728 #endif /* 0 */
729
730 #define NETXEN_BOARDTYPE 0x4008
731 #define NETXEN_BOARDNUM 0x400c
732 #define NETXEN_CHIPNUM 0x4010
733 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
734
735 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
736 {
737 int addr, val;
738 int n, i;
739 int init_delay = 0;
740 struct crb_addr_pair *buf;
741 u32 off;
742
743 /* resetall */
744 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
745 NETXEN_ROMBUS_RESET);
746
747 if (verbose) {
748 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
749 printk("P2 ROM board type: 0x%08x\n", val);
750 else
751 printk("Could not read board type\n");
752 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
753 printk("P2 ROM board num: 0x%08x\n", val);
754 else
755 printk("Could not read board number\n");
756 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
757 printk("P2 ROM chip num: 0x%08x\n", val);
758 else
759 printk("Could not read chip number\n");
760 }
761
762 if (netxen_rom_fast_read(adapter, 0, &n) == 0 && (n & 0x80000000)) {
763 n &= ~0x80000000;
764 if (n < 0x400) {
765 if (verbose)
766 printk("%s: %d CRB init values found"
767 " in ROM.\n", netxen_nic_driver_name, n);
768 } else {
769 printk("%s:n=0x%x Error! NetXen card flash not"
770 " initialized.\n", __FUNCTION__, n);
771 return -EIO;
772 }
773 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
774 if (buf == NULL) {
775 printk("%s: netxen_pinit_from_rom: Unable to calloc "
776 "memory.\n", netxen_nic_driver_name);
777 return -ENOMEM;
778 }
779 for (i = 0; i < n; i++) {
780 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
781 || netxen_rom_fast_read(adapter, 8 * i + 8,
782 &addr) != 0)
783 return -EIO;
784
785 buf[i].addr = addr;
786 buf[i].data = val;
787
788 if (verbose)
789 printk("%s: PCI: 0x%08x == 0x%08x\n",
790 netxen_nic_driver_name, (unsigned int)
791 netxen_decode_crb_addr(addr), val);
792 }
793 for (i = 0; i < n; i++) {
794
795 off = netxen_decode_crb_addr(buf[i].addr);
796 if (off == NETXEN_ADDR_ERROR) {
797 printk(KERN_ERR"CRB init value out of range %x\n",
798 buf[i].addr);
799 continue;
800 }
801 off += NETXEN_PCI_CRBSPACE;
802 /* skipping cold reboot MAGIC */
803 if (off == NETXEN_CAM_RAM(0x1fc))
804 continue;
805
806 /* After writing this register, HW needs time for CRB */
807 /* to quiet down (else crb_window returns 0xffffffff) */
808 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
809 init_delay = 1;
810 /* hold xdma in reset also */
811 buf[i].data = NETXEN_NIC_XDMA_RESET;
812 }
813
814 netxen_nic_hw_write_wx(adapter, off, &buf[i].data, 4);
815
816 if (init_delay == 1) {
817 msleep(1000);
818 init_delay = 0;
819 }
820 msleep(1);
821 }
822 kfree(buf);
823
824 /* disable_peg_cache_all */
825
826 /* unreset_net_cache */
827 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
828 4);
829 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
830 (val & 0xffffff0f));
831 /* p2dn replyCount */
832 netxen_crb_writelit_adapter(adapter,
833 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
834 /* disable_peg_cache 0 */
835 netxen_crb_writelit_adapter(adapter,
836 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
837 /* disable_peg_cache 1 */
838 netxen_crb_writelit_adapter(adapter,
839 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
840
841 /* peg_clr_all */
842
843 /* peg_clr 0 */
844 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
845 0);
846 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
847 0);
848 /* peg_clr 1 */
849 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
850 0);
851 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
852 0);
853 /* peg_clr 2 */
854 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
855 0);
856 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
857 0);
858 /* peg_clr 3 */
859 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
860 0);
861 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
862 0);
863 }
864 return 0;
865 }
866
867 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
868 {
869 uint64_t addr;
870 uint32_t hi;
871 uint32_t lo;
872
873 adapter->dummy_dma.addr =
874 pci_alloc_consistent(adapter->pdev,
875 NETXEN_HOST_DUMMY_DMA_SIZE,
876 &adapter->dummy_dma.phys_addr);
877 if (adapter->dummy_dma.addr == NULL) {
878 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
879 __FUNCTION__);
880 return -ENOMEM;
881 }
882
883 addr = (uint64_t) adapter->dummy_dma.phys_addr;
884 hi = (addr >> 32) & 0xffffffff;
885 lo = addr & 0xffffffff;
886
887 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
888 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
889
890 return 0;
891 }
892
893 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
894 {
895 int i;
896
897 if (adapter->dummy_dma.addr) {
898 i = 100;
899 do {
900 if (dma_watchdog_shutdown_request(adapter) == 1)
901 break;
902 msleep(50);
903 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
904 break;
905 } while (--i);
906
907 if (i) {
908 pci_free_consistent(adapter->pdev,
909 NETXEN_HOST_DUMMY_DMA_SIZE,
910 adapter->dummy_dma.addr,
911 adapter->dummy_dma.phys_addr);
912 adapter->dummy_dma.addr = NULL;
913 } else {
914 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
915 adapter->netdev->name);
916 }
917 }
918 }
919
920 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
921 {
922 u32 val = 0;
923 int retries = 30;
924
925 if (!pegtune_val) {
926 do {
927 val = readl(NETXEN_CRB_NORMALIZE
928 (adapter, CRB_CMDPEG_STATE));
929 pegtune_val = readl(NETXEN_CRB_NORMALIZE
930 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
931
932 if (val == PHAN_INITIALIZE_COMPLETE ||
933 val == PHAN_INITIALIZE_ACK)
934 return 0;
935
936 msleep(1000);
937 } while (--retries);
938 if (!retries) {
939 printk(KERN_WARNING "netxen_phantom_init: init failed, "
940 "pegtune_val=%x\n", pegtune_val);
941 return -1;
942 }
943 }
944
945 return 0;
946 }
947
948 static int netxen_nic_check_temp(struct netxen_adapter *adapter)
949 {
950 struct net_device *netdev = adapter->netdev;
951 uint32_t temp, temp_state, temp_val;
952 int rv = 0;
953
954 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
955
956 temp_state = nx_get_temp_state(temp);
957 temp_val = nx_get_temp_val(temp);
958
959 if (temp_state == NX_TEMP_PANIC) {
960 printk(KERN_ALERT
961 "%s: Device temperature %d degrees C exceeds"
962 " maximum allowed. Hardware has been shut down.\n",
963 netxen_nic_driver_name, temp_val);
964
965 netif_carrier_off(netdev);
966 netif_stop_queue(netdev);
967 rv = 1;
968 } else if (temp_state == NX_TEMP_WARN) {
969 if (adapter->temp == NX_TEMP_NORMAL) {
970 printk(KERN_ALERT
971 "%s: Device temperature %d degrees C "
972 "exceeds operating range."
973 " Immediate action needed.\n",
974 netxen_nic_driver_name, temp_val);
975 }
976 } else {
977 if (adapter->temp == NX_TEMP_WARN) {
978 printk(KERN_INFO
979 "%s: Device temperature is now %d degrees C"
980 " in normal range.\n", netxen_nic_driver_name,
981 temp_val);
982 }
983 }
984 adapter->temp = temp_state;
985 return rv;
986 }
987
988 void netxen_watchdog_task(struct work_struct *work)
989 {
990 struct netxen_adapter *adapter =
991 container_of(work, struct netxen_adapter, watchdog_task);
992
993 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
994 return;
995
996 if (adapter->handle_phy_intr)
997 adapter->handle_phy_intr(adapter);
998
999 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1000 }
1001
1002 /*
1003 * netxen_process_rcv() send the received packet to the protocol stack.
1004 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1005 * invoke the routine to send more rx buffers to the Phantom...
1006 */
1007 static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1008 struct status_desc *desc)
1009 {
1010 struct pci_dev *pdev = adapter->pdev;
1011 struct net_device *netdev = adapter->netdev;
1012 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1013 int index = netxen_get_sts_refhandle(sts_data);
1014 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1015 struct netxen_rx_buffer *buffer;
1016 struct sk_buff *skb;
1017 u32 length = netxen_get_sts_totallength(sts_data);
1018 u32 desc_ctx;
1019 struct netxen_rcv_desc_ctx *rcv_desc;
1020 int ret;
1021
1022 desc_ctx = netxen_get_sts_type(sts_data);
1023 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1024 printk("%s: %s Bad Rcv descriptor ring\n",
1025 netxen_nic_driver_name, netdev->name);
1026 return;
1027 }
1028
1029 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1030 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1031 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1032 index, rcv_desc->max_rx_desc_count);
1033 return;
1034 }
1035 buffer = &rcv_desc->rx_buf_arr[index];
1036 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1037 buffer->lro_current_frags++;
1038 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1039 buffer->lro_expected_frags =
1040 netxen_get_sts_desc_lro_cnt(desc);
1041 buffer->lro_length = length;
1042 }
1043 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1044 if (buffer->lro_expected_frags != 0) {
1045 printk("LRO: (refhandle:%x) recv frag. "
1046 "wait for last. flags: %x expected:%d "
1047 "have:%d\n", index,
1048 netxen_get_sts_desc_lro_last_frag(desc),
1049 buffer->lro_expected_frags,
1050 buffer->lro_current_frags);
1051 }
1052 return;
1053 }
1054 }
1055
1056 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1057 PCI_DMA_FROMDEVICE);
1058
1059 skb = (struct sk_buff *)buffer->skb;
1060
1061 if (likely(adapter->rx_csum &&
1062 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
1063 adapter->stats.csummed++;
1064 skb->ip_summed = CHECKSUM_UNNECESSARY;
1065 } else
1066 skb->ip_summed = CHECKSUM_NONE;
1067
1068 skb->dev = netdev;
1069 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1070 /* True length was only available on the last pkt */
1071 skb_put(skb, buffer->lro_length);
1072 } else {
1073 skb_put(skb, length);
1074 }
1075
1076 skb->protocol = eth_type_trans(skb, netdev);
1077
1078 ret = netif_receive_skb(skb);
1079 netdev->last_rx = jiffies;
1080
1081 /*
1082 * We just consumed one buffer so post a buffer.
1083 */
1084 buffer->skb = NULL;
1085 buffer->state = NETXEN_BUFFER_FREE;
1086 buffer->lro_current_frags = 0;
1087 buffer->lro_expected_frags = 0;
1088
1089 adapter->stats.no_rcv++;
1090 adapter->stats.rxbytes += length;
1091 }
1092
1093 /* Process Receive status ring */
1094 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1095 {
1096 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1097 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1098 struct status_desc *desc; /* used to read status desc here */
1099 u32 consumer = recv_ctx->status_rx_consumer;
1100 int count = 0, ring;
1101
1102 while (count < max) {
1103 desc = &desc_head[consumer];
1104 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1105 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1106 netxen_get_sts_owner(desc));
1107 break;
1108 }
1109 netxen_process_rcv(adapter, ctxid, desc);
1110 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1111 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1112 count++;
1113 }
1114 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++)
1115 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1116
1117 /* update the consumer index in phantom */
1118 if (count) {
1119 recv_ctx->status_rx_consumer = consumer;
1120
1121 /* Window = 1 */
1122 writel(consumer, NETXEN_CRB_NORMALIZE(adapter,
1123 recv_ctx->crb_sts_consumer));
1124 }
1125
1126 return count;
1127 }
1128
1129 /* Process Command status ring */
1130 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1131 {
1132 u32 last_consumer, consumer;
1133 int count = 0, i;
1134 struct netxen_cmd_buffer *buffer;
1135 struct pci_dev *pdev = adapter->pdev;
1136 struct net_device *netdev = adapter->netdev;
1137 struct netxen_skb_frag *frag;
1138 int done = 0;
1139
1140 last_consumer = adapter->last_cmd_consumer;
1141 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1142
1143 while (last_consumer != consumer) {
1144 buffer = &adapter->cmd_buf_arr[last_consumer];
1145 if (buffer->skb) {
1146 frag = &buffer->frag_array[0];
1147 pci_unmap_single(pdev, frag->dma, frag->length,
1148 PCI_DMA_TODEVICE);
1149 frag->dma = 0ULL;
1150 for (i = 1; i < buffer->frag_count; i++) {
1151 frag++; /* Get the next frag */
1152 pci_unmap_page(pdev, frag->dma, frag->length,
1153 PCI_DMA_TODEVICE);
1154 frag->dma = 0ULL;
1155 }
1156
1157 adapter->stats.xmitfinished++;
1158 dev_kfree_skb_any(buffer->skb);
1159 buffer->skb = NULL;
1160 }
1161
1162 last_consumer = get_next_index(last_consumer,
1163 adapter->max_tx_desc_count);
1164 if (++count >= MAX_STATUS_HANDLE)
1165 break;
1166 }
1167
1168 if (count) {
1169 adapter->last_cmd_consumer = last_consumer;
1170 smp_mb();
1171 if (netif_queue_stopped(netdev) && netif_running(netdev)) {
1172 netif_tx_lock(netdev);
1173 netif_wake_queue(netdev);
1174 smp_mb();
1175 netif_tx_unlock(netdev);
1176 }
1177 }
1178 /*
1179 * If everything is freed up to consumer then check if the ring is full
1180 * If the ring is full then check if more needs to be freed and
1181 * schedule the call back again.
1182 *
1183 * This happens when there are 2 CPUs. One could be freeing and the
1184 * other filling it. If the ring is full when we get out of here and
1185 * the card has already interrupted the host then the host can miss the
1186 * interrupt.
1187 *
1188 * There is still a possible race condition and the host could miss an
1189 * interrupt. The card has to take care of this.
1190 */
1191 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1192 done = (last_consumer == consumer);
1193
1194 return (done);
1195 }
1196
1197 /*
1198 * netxen_post_rx_buffers puts buffer in the Phantom memory
1199 */
1200 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1201 {
1202 struct pci_dev *pdev = adapter->pdev;
1203 struct sk_buff *skb;
1204 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1205 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1206 uint producer;
1207 struct rcv_desc *pdesc;
1208 struct netxen_rx_buffer *buffer;
1209 int count = 0;
1210 int index = 0;
1211 netxen_ctx_msg msg = 0;
1212 dma_addr_t dma;
1213
1214 rcv_desc = &recv_ctx->rcv_desc[ringid];
1215
1216 producer = rcv_desc->producer;
1217 index = rcv_desc->begin_alloc;
1218 buffer = &rcv_desc->rx_buf_arr[index];
1219 /* We can start writing rx descriptors into the phantom memory. */
1220 while (buffer->state == NETXEN_BUFFER_FREE) {
1221 skb = dev_alloc_skb(rcv_desc->skb_size);
1222 if (unlikely(!skb)) {
1223 /*
1224 * TODO
1225 * We need to schedule the posting of buffers to the pegs.
1226 */
1227 rcv_desc->begin_alloc = index;
1228 DPRINTK(ERR, "netxen_post_rx_buffers: "
1229 " allocated only %d buffers\n", count);
1230 break;
1231 }
1232
1233 count++; /* now there should be no failure */
1234 pdesc = &rcv_desc->desc_head[producer];
1235
1236 #if defined(XGB_DEBUG)
1237 *(unsigned long *)(skb->head) = 0xc0debabe;
1238 if (skb_is_nonlinear(skb)) {
1239 printk("Allocated SKB @%p is nonlinear\n");
1240 }
1241 #endif
1242 skb_reserve(skb, 2);
1243 /* This will be setup when we receive the
1244 * buffer after it has been filled FSL TBD TBD
1245 * skb->dev = netdev;
1246 */
1247 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1248 PCI_DMA_FROMDEVICE);
1249 pdesc->addr_buffer = cpu_to_le64(dma);
1250 buffer->skb = skb;
1251 buffer->state = NETXEN_BUFFER_BUSY;
1252 buffer->dma = dma;
1253 /* make a rcv descriptor */
1254 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1255 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1256 DPRINTK(INFO, "done writing descripter\n");
1257 producer =
1258 get_next_index(producer, rcv_desc->max_rx_desc_count);
1259 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1260 buffer = &rcv_desc->rx_buf_arr[index];
1261 }
1262 /* if we did allocate buffers, then write the count to Phantom */
1263 if (count) {
1264 rcv_desc->begin_alloc = index;
1265 rcv_desc->producer = producer;
1266 /* Window = 1 */
1267 writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
1268 NETXEN_CRB_NORMALIZE(adapter,
1269 rcv_desc->crb_rcv_producer));
1270 /*
1271 * Write a doorbell msg to tell phanmon of change in
1272 * receive ring producer
1273 */
1274 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1275 netxen_set_msg_privid(msg);
1276 netxen_set_msg_count(msg,
1277 ((producer -
1278 1) & (rcv_desc->
1279 max_rx_desc_count - 1)));
1280 netxen_set_msg_ctxid(msg, adapter->portnum);
1281 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1282 writel(msg,
1283 DB_NORMALIZE(adapter,
1284 NETXEN_RCV_PRODUCER_OFFSET));
1285 }
1286 }
1287
1288 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1289 uint32_t ctx, uint32_t ringid)
1290 {
1291 struct pci_dev *pdev = adapter->pdev;
1292 struct sk_buff *skb;
1293 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1294 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1295 u32 producer;
1296 struct rcv_desc *pdesc;
1297 struct netxen_rx_buffer *buffer;
1298 int count = 0;
1299 int index = 0;
1300
1301 rcv_desc = &recv_ctx->rcv_desc[ringid];
1302
1303 producer = rcv_desc->producer;
1304 index = rcv_desc->begin_alloc;
1305 buffer = &rcv_desc->rx_buf_arr[index];
1306 /* We can start writing rx descriptors into the phantom memory. */
1307 while (buffer->state == NETXEN_BUFFER_FREE) {
1308 skb = dev_alloc_skb(rcv_desc->skb_size);
1309 if (unlikely(!skb)) {
1310 /*
1311 * We need to schedule the posting of buffers to the pegs.
1312 */
1313 rcv_desc->begin_alloc = index;
1314 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1315 " allocated only %d buffers\n", count);
1316 break;
1317 }
1318 count++; /* now there should be no failure */
1319 pdesc = &rcv_desc->desc_head[producer];
1320 skb_reserve(skb, 2);
1321 /*
1322 * This will be setup when we receive the
1323 * buffer after it has been filled
1324 * skb->dev = netdev;
1325 */
1326 buffer->skb = skb;
1327 buffer->state = NETXEN_BUFFER_BUSY;
1328 buffer->dma = pci_map_single(pdev, skb->data,
1329 rcv_desc->dma_size,
1330 PCI_DMA_FROMDEVICE);
1331
1332 /* make a rcv descriptor */
1333 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1334 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1335 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1336 producer =
1337 get_next_index(producer, rcv_desc->max_rx_desc_count);
1338 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1339 buffer = &rcv_desc->rx_buf_arr[index];
1340 }
1341
1342 /* if we did allocate buffers, then write the count to Phantom */
1343 if (count) {
1344 rcv_desc->begin_alloc = index;
1345 rcv_desc->producer = producer;
1346 /* Window = 1 */
1347 writel((producer - 1) & (rcv_desc->max_rx_desc_count - 1),
1348 NETXEN_CRB_NORMALIZE(adapter,
1349 rcv_desc->crb_rcv_producer));
1350 wmb();
1351 }
1352 }
1353
1354 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1355 {
1356 memset(&adapter->stats, 0, sizeof(adapter->stats));
1357 return;
1358 }
1359
Linux kernel - Deliverables
This page took 0.089937 seconds and 6 git commands to generate.