drivers/net/phy/lxt.c

   1 /*
   2  * drivers/net/phy/lxt.c
   3  *
   4  * Driver for Intel LXT PHYs
   5  *
   6  * Author: Andy Fleming
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/errno.h>
  19 #include <linux/unistd.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/init.h>
  22 #include <linux/delay.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/etherdevice.h>
  25 #include <linux/skbuff.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/mm.h>
  28 #include <linux/module.h>
  29 #include <linux/mii.h>
  30 #include <linux/ethtool.h>
  31 #include <linux/phy.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/irq.h>
  35 #include <asm/uaccess.h>
  36
  37 /* The Level one LXT970 is used by many boards                               */
  38
  39 #define MII_LXT970_IER       17  /* Interrupt Enable Register */
  40
  41 #define MII_LXT970_IER_IEN      0x0002
  42
  43 #define MII_LXT970_ISR       18  /* Interrupt Status Register */
  44
  45 #define MII_LXT970_CONFIG    19  /* Configuration Register    */
  46
  47 /* ------------------------------------------------------------------------- */
  48 /* The Level one LXT971 is used on some of my custom boards                  */
  49
  50 /* register definitions for the 971 */
  51 #define MII_LXT971_IER          18  /* Interrupt Enable Register */
  52 #define MII_LXT971_IER_IEN      0x00f2
  53
  54 #define MII_LXT971_ISR          19  /* Interrupt Status Register */
  55
  56 /* register definitions for the 973 */
  57 #define MII_LXT973_PCR 16 /* Port Configuration Register */
  58 #define PCR_FIBER_SELECT 1
  59
  60 MODULE_DESCRIPTION("Intel LXT PHY driver");
  61 MODULE_AUTHOR("Andy Fleming");
  62 MODULE_LICENSE("GPL");
  63
  64 static int lxt970_ack_interrupt(struct phy_device *phydev)
  65 {
  66         int err;
  67
  68         err = phy_read(phydev, MII_BMSR);
  69
  70         if (err < 0)
  71                 return err;
  72
  73         err = phy_read(phydev, MII_LXT970_ISR);
  74
  75         if (err < 0)
  76                 return err;
  77
  78         return 0;
  79 }
  80
  81 static int lxt970_config_intr(struct phy_device *phydev)
  82 {
  83         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  84                 return phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
  85         else
  86                 return phy_write(phydev, MII_LXT970_IER, 0);
  87 }
  88
  89 static int lxt970_config_init(struct phy_device *phydev)
  90 {
  91         int err;
  92
  93         err = phy_write(phydev, MII_LXT970_CONFIG, 0);
  94
  95         return err;
  96 }
  97
  98
  99 static int lxt971_ack_interrupt(struct phy_device *phydev)
 100 {
 101         int err = phy_read(phydev, MII_LXT971_ISR);
 102
 103         if (err < 0)
 104                 return err;
 105
 106         return 0;
 107 }
 108
 109 static int lxt971_config_intr(struct phy_device *phydev)
 110 {
 111         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 112                 return phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
 113         else
 114                 return phy_write(phydev, MII_LXT971_IER, 0);
 115 }
 116
 117 /*
 118  * A2 version of LXT973 chip has an ERRATA: it randomly return the contents
 119  * of the previous even register when you read a odd register regularly
 120  */
 121
 122 static int lxt973a2_update_link(struct phy_device *phydev)
 123 {
 124         int status;
 125         int control;
 126         int retry = 8; /* we try 8 times */
 127
 128         /* Do a fake read */
 129         status = phy_read(phydev, MII_BMSR);
 130
 131         if (status < 0)
 132                 return status;
 133
 134         control = phy_read(phydev, MII_BMCR);
 135         if (control < 0)
 136                 return control;
 137
 138         do {
 139                 /* Read link and autonegotiation status */
 140                 status = phy_read(phydev, MII_BMSR);
 141         } while (status >= 0 && retry-- && status == control);
 142
 143         if (status < 0)
 144                 return status;
 145
 146         if ((status & BMSR_LSTATUS) == 0)
 147                 phydev->link = 0;
 148         else
 149                 phydev->link = 1;
 150
 151         return 0;
 152 }
 153
 154 static int lxt973a2_read_status(struct phy_device *phydev)
 155 {
 156         int adv;
 157         int err;
 158         int lpa;
 159         int lpagb = 0;
 160
 161         /* Update the link, but return if there was an error */
 162         err = lxt973a2_update_link(phydev);
 163         if (err)
 164                 return err;
 165
 166         if (AUTONEG_ENABLE == phydev->autoneg) {
 167                 int retry = 1;
 168
 169                 adv = phy_read(phydev, MII_ADVERTISE);
 170
 171                 if (adv < 0)
 172                         return adv;
 173
 174                 do {
 175                         lpa = phy_read(phydev, MII_LPA);
 176
 177                         if (lpa < 0)
 178                                 return lpa;
 179
 180                         /* If both registers are equal, it is suspect but not
 181                         * impossible, hence a new try
 182                         */
 183                 } while (lpa == adv && retry--);
 184
 185                 lpa &= adv;
 186
 187                 phydev->speed = SPEED_10;
 188                 phydev->duplex = DUPLEX_HALF;
 189                 phydev->pause = phydev->asym_pause = 0;
 190
 191                 if (lpagb & (LPA_1000FULL | LPA_1000HALF)) {
 192                         phydev->speed = SPEED_1000;
 193
 194                         if (lpagb & LPA_1000FULL)
 195                                 phydev->duplex = DUPLEX_FULL;
 196                 } else if (lpa & (LPA_100FULL | LPA_100HALF)) {
 197                         phydev->speed = SPEED_100;
 198
 199                         if (lpa & LPA_100FULL)
 200                                 phydev->duplex = DUPLEX_FULL;
 201                 } else {
 202                         if (lpa & LPA_10FULL)
 203                                 phydev->duplex = DUPLEX_FULL;
 204                 }
 205
 206                 if (phydev->duplex == DUPLEX_FULL) {
 207                         phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
 208                         phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
 209                 }
 210         } else {
 211                 int bmcr = phy_read(phydev, MII_BMCR);
 212
 213                 if (bmcr < 0)
 214                         return bmcr;
 215
 216                 if (bmcr & BMCR_FULLDPLX)
 217                         phydev->duplex = DUPLEX_FULL;
 218                 else
 219                         phydev->duplex = DUPLEX_HALF;
 220
 221                 if (bmcr & BMCR_SPEED1000)
 222                         phydev->speed = SPEED_1000;
 223                 else if (bmcr & BMCR_SPEED100)
 224                         phydev->speed = SPEED_100;
 225                 else
 226                         phydev->speed = SPEED_10;
 227
 228                 phydev->pause = phydev->asym_pause = 0;
 229         }
 230
 231         return 0;
 232 }
 233
 234 static int lxt973_probe(struct phy_device *phydev)
 235 {
 236         int val = phy_read(phydev, MII_LXT973_PCR);
 237
 238         if (val & PCR_FIBER_SELECT) {
 239                 /*
 240                  * If fiber is selected, then the only correct setting
 241                  * is 100Mbps, full duplex, and auto negotiation off.
 242                  */
 243                 val = phy_read(phydev, MII_BMCR);
 244                 val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
 245                 val &= ~BMCR_ANENABLE;
 246                 phy_write(phydev, MII_BMCR, val);
 247                 /* Remember that the port is in fiber mode. */
 248                 phydev->priv = lxt973_probe;
 249         } else {
 250                 phydev->priv = NULL;
 251         }
 252         return 0;
 253 }
 254
 255 static int lxt973_config_aneg(struct phy_device *phydev)
 256 {
 257         /* Do nothing if port is in fiber mode. */
 258         return phydev->priv ? 0 : genphy_config_aneg(phydev);
 259 }
 260
 261 static struct phy_driver lxt97x_driver[] = {
 262 {
 263         .phy_id         = 0x78100000,
 264         .name           = "LXT970",
 265         .phy_id_mask    = 0xfffffff0,
 266         .features       = PHY_BASIC_FEATURES,
 267         .flags          = PHY_HAS_INTERRUPT,
 268         .config_init    = lxt970_config_init,
 269         .config_aneg    = genphy_config_aneg,
 270         .read_status    = genphy_read_status,
 271         .ack_interrupt  = lxt970_ack_interrupt,
 272         .config_intr    = lxt970_config_intr,
 273 }, {
 274         .phy_id         = 0x001378e0,
 275         .name           = "LXT971",
 276         .phy_id_mask    = 0xfffffff0,
 277         .features       = PHY_BASIC_FEATURES,
 278         .flags          = PHY_HAS_INTERRUPT,
 279         .config_aneg    = genphy_config_aneg,
 280         .read_status    = genphy_read_status,
 281         .ack_interrupt  = lxt971_ack_interrupt,
 282         .config_intr    = lxt971_config_intr,
 283 }, {
 284         .phy_id         = 0x00137a10,
 285         .name           = "LXT973-A2",
 286         .phy_id_mask    = 0xffffffff,
 287         .features       = PHY_BASIC_FEATURES,
 288         .flags          = 0,
 289         .probe          = lxt973_probe,
 290         .config_aneg    = lxt973_config_aneg,
 291         .read_status    = lxt973a2_read_status,
 292 }, {
 293         .phy_id         = 0x00137a10,
 294         .name           = "LXT973",
 295         .phy_id_mask    = 0xfffffff0,
 296         .features       = PHY_BASIC_FEATURES,
 297         .flags          = 0,
 298         .probe          = lxt973_probe,
 299         .config_aneg    = lxt973_config_aneg,
 300         .read_status    = genphy_read_status,
 301 } };
 302
 303 module_phy_driver(lxt97x_driver);
 304
 305 static struct mdio_device_id __maybe_unused lxt_tbl[] = {
 306         { 0x78100000, 0xfffffff0 },
 307         { 0x001378e0, 0xfffffff0 },
 308         { 0x00137a10, 0xfffffff0 },
 309         { }
 310 };
 311
 312 MODULE_DEVICE_TABLE(mdio, lxt_tbl);