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tg3: Check transitions to D0 power state
[deliverable/linux.git] / drivers / net / qlcnic / qlcnic_ctx.c
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9
10 static u32
11 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
12 {
13 u32 rsp;
14 int timeout = 0;
15
16 do {
17 /* give atleast 1ms for firmware to respond */
18 msleep(1);
19
20 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
21 return QLCNIC_CDRP_RSP_TIMEOUT;
22
23 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
24 } while (!QLCNIC_CDRP_IS_RSP(rsp));
25
26 return rsp;
27 }
28
29 u32
30 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
31 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
32 {
33 u32 rsp;
34 u32 signature;
35 u32 rcode = QLCNIC_RCODE_SUCCESS;
36 struct pci_dev *pdev = adapter->pdev;
37
38 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
39
40 /* Acquire semaphore before accessing CRB */
41 if (qlcnic_api_lock(adapter))
42 return QLCNIC_RCODE_TIMEOUT;
43
44 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
45 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
46 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
47 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
48 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
49
50 rsp = qlcnic_poll_rsp(adapter);
51
52 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
53 dev_err(&pdev->dev, "card response timeout.\n");
54 rcode = QLCNIC_RCODE_TIMEOUT;
55 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
56 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
57 dev_err(&pdev->dev, "failed card response code:0x%x\n",
58 rcode);
59 }
60
61 /* Release semaphore */
62 qlcnic_api_unlock(adapter);
63
64 return rcode;
65 }
66
67 static uint32_t qlcnic_temp_checksum(uint32_t *temp_buffer, u16 temp_size)
68 {
69 uint64_t sum = 0;
70 int count = temp_size / sizeof(uint32_t);
71 while (count-- > 0)
72 sum += *temp_buffer++;
73 while (sum >> 32)
74 sum = (sum & 0xFFFFFFFF) + (sum >> 32);
75 return ~sum;
76 }
77
78 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter)
79 {
80 int err, i;
81 u16 temp_size;
82 void *tmp_addr;
83 u32 version, csum, *template, *tmp_buf;
84 struct qlcnic_hardware_context *ahw;
85 struct qlcnic_dump_template_hdr *tmpl_hdr, *tmp_tmpl;
86 dma_addr_t tmp_addr_t = 0;
87
88 ahw = adapter->ahw;
89 err = qlcnic_issue_cmd(adapter,
90 adapter->ahw->pci_func,
91 adapter->fw_hal_version,
92 0,
93 0,
94 0,
95 QLCNIC_CDRP_CMD_TEMP_SIZE);
96 if (err != QLCNIC_RCODE_SUCCESS) {
97 err = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
98 dev_info(&adapter->pdev->dev,
99 "Can't get template size %d\n", err);
100 err = -EIO;
101 return err;
102 }
103 version = QLCRD32(adapter, QLCNIC_ARG3_CRB_OFFSET);
104 temp_size = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
105 if (!temp_size)
106 return -EIO;
107
108 tmp_addr = dma_alloc_coherent(&adapter->pdev->dev, temp_size,
109 &tmp_addr_t, GFP_KERNEL);
110 if (!tmp_addr) {
111 dev_err(&adapter->pdev->dev,
112 "Can't get memory for FW dump template\n");
113 return -ENOMEM;
114 }
115 err = qlcnic_issue_cmd(adapter,
116 adapter->ahw->pci_func,
117 adapter->fw_hal_version,
118 LSD(tmp_addr_t),
119 MSD(tmp_addr_t),
120 temp_size,
121 QLCNIC_CDRP_CMD_GET_TEMP_HDR);
122
123 if (err != QLCNIC_RCODE_SUCCESS) {
124 dev_err(&adapter->pdev->dev,
125 "Failed to get mini dump template header %d\n", err);
126 err = -EIO;
127 goto error;
128 }
129 tmp_tmpl = tmp_addr;
130 csum = qlcnic_temp_checksum((uint32_t *) tmp_addr, temp_size);
131 if (csum) {
132 dev_err(&adapter->pdev->dev,
133 "Template header checksum validation failed\n");
134 err = -EIO;
135 goto error;
136 }
137 ahw->fw_dump.tmpl_hdr = vzalloc(temp_size);
138 if (!ahw->fw_dump.tmpl_hdr) {
139 err = -EIO;
140 goto error;
141 }
142 tmp_buf = tmp_addr;
143 template = (u32 *) ahw->fw_dump.tmpl_hdr;
144 for (i = 0; i < temp_size/sizeof(u32); i++)
145 *template++ = __le32_to_cpu(*tmp_buf++);
146
147 tmpl_hdr = ahw->fw_dump.tmpl_hdr;
148 if (tmpl_hdr->cap_mask > QLCNIC_DUMP_MASK_DEF &&
149 tmpl_hdr->cap_mask <= QLCNIC_DUMP_MASK_MAX)
150 tmpl_hdr->drv_cap_mask = tmpl_hdr->cap_mask;
151 else
152 tmpl_hdr->drv_cap_mask = QLCNIC_DUMP_MASK_DEF;
153 ahw->fw_dump.enable = 1;
154 error:
155 dma_free_coherent(&adapter->pdev->dev, temp_size, tmp_addr, tmp_addr_t);
156 return err;
157 }
158
159 int
160 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
161 {
162 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
163
164 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
165 if (qlcnic_issue_cmd(adapter,
166 adapter->ahw->pci_func,
167 adapter->fw_hal_version,
168 recv_ctx->context_id,
169 mtu,
170 0,
171 QLCNIC_CDRP_CMD_SET_MTU)) {
172
173 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
174 return -EIO;
175 }
176 }
177
178 return 0;
179 }
180
181 static int
182 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
183 {
184 void *addr;
185 struct qlcnic_hostrq_rx_ctx *prq;
186 struct qlcnic_cardrsp_rx_ctx *prsp;
187 struct qlcnic_hostrq_rds_ring *prq_rds;
188 struct qlcnic_hostrq_sds_ring *prq_sds;
189 struct qlcnic_cardrsp_rds_ring *prsp_rds;
190 struct qlcnic_cardrsp_sds_ring *prsp_sds;
191 struct qlcnic_host_rds_ring *rds_ring;
192 struct qlcnic_host_sds_ring *sds_ring;
193
194 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
195 u64 phys_addr;
196
197 u8 i, nrds_rings, nsds_rings;
198 size_t rq_size, rsp_size;
199 u32 cap, reg, val, reg2;
200 int err;
201
202 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
203
204 nrds_rings = adapter->max_rds_rings;
205 nsds_rings = adapter->max_sds_rings;
206
207 rq_size =
208 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
209 nsds_rings);
210 rsp_size =
211 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
212 nsds_rings);
213
214 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
215 &hostrq_phys_addr, GFP_KERNEL);
216 if (addr == NULL)
217 return -ENOMEM;
218 prq = addr;
219
220 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
221 &cardrsp_phys_addr, GFP_KERNEL);
222 if (addr == NULL) {
223 err = -ENOMEM;
224 goto out_free_rq;
225 }
226 prsp = addr;
227
228 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
229
230 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
231 | QLCNIC_CAP0_VALIDOFF);
232 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
233
234 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
235 msix_handler);
236 prq->txrx_sds_binding = nsds_rings - 1;
237
238 prq->capabilities[0] = cpu_to_le32(cap);
239 prq->host_int_crb_mode =
240 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
241 prq->host_rds_crb_mode =
242 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
243
244 prq->num_rds_rings = cpu_to_le16(nrds_rings);
245 prq->num_sds_rings = cpu_to_le16(nsds_rings);
246 prq->rds_ring_offset = 0;
247
248 val = le32_to_cpu(prq->rds_ring_offset) +
249 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
250 prq->sds_ring_offset = cpu_to_le32(val);
251
252 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
253 le32_to_cpu(prq->rds_ring_offset));
254
255 for (i = 0; i < nrds_rings; i++) {
256
257 rds_ring = &recv_ctx->rds_rings[i];
258 rds_ring->producer = 0;
259
260 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
261 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
262 prq_rds[i].ring_kind = cpu_to_le32(i);
263 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
264 }
265
266 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
267 le32_to_cpu(prq->sds_ring_offset));
268
269 for (i = 0; i < nsds_rings; i++) {
270
271 sds_ring = &recv_ctx->sds_rings[i];
272 sds_ring->consumer = 0;
273 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
274
275 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
276 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
277 prq_sds[i].msi_index = cpu_to_le16(i);
278 }
279
280 phys_addr = hostrq_phys_addr;
281 err = qlcnic_issue_cmd(adapter,
282 adapter->ahw->pci_func,
283 adapter->fw_hal_version,
284 (u32)(phys_addr >> 32),
285 (u32)(phys_addr & 0xffffffff),
286 rq_size,
287 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
288 if (err) {
289 dev_err(&adapter->pdev->dev,
290 "Failed to create rx ctx in firmware%d\n", err);
291 goto out_free_rsp;
292 }
293
294
295 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
296 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
297
298 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
299 rds_ring = &recv_ctx->rds_rings[i];
300
301 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
302 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
303 }
304
305 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
306 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
307
308 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
309 sds_ring = &recv_ctx->sds_rings[i];
310
311 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
312 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
313
314 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
315 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
316 }
317
318 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
319 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
320 recv_ctx->virt_port = prsp->virt_port;
321
322 out_free_rsp:
323 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
324 cardrsp_phys_addr);
325 out_free_rq:
326 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
327 return err;
328 }
329
330 static void
331 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
332 {
333 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
334
335 if (qlcnic_issue_cmd(adapter,
336 adapter->ahw->pci_func,
337 adapter->fw_hal_version,
338 recv_ctx->context_id,
339 QLCNIC_DESTROY_CTX_RESET,
340 0,
341 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
342
343 dev_err(&adapter->pdev->dev,
344 "Failed to destroy rx ctx in firmware\n");
345 }
346
347 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
348 }
349
350 static int
351 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
352 {
353 struct qlcnic_hostrq_tx_ctx *prq;
354 struct qlcnic_hostrq_cds_ring *prq_cds;
355 struct qlcnic_cardrsp_tx_ctx *prsp;
356 void *rq_addr, *rsp_addr;
357 size_t rq_size, rsp_size;
358 u32 temp;
359 int err;
360 u64 phys_addr;
361 dma_addr_t rq_phys_addr, rsp_phys_addr;
362 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
363
364 /* reset host resources */
365 tx_ring->producer = 0;
366 tx_ring->sw_consumer = 0;
367 *(tx_ring->hw_consumer) = 0;
368
369 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
370 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
371 &rq_phys_addr, GFP_KERNEL);
372 if (!rq_addr)
373 return -ENOMEM;
374
375 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
376 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
377 &rsp_phys_addr, GFP_KERNEL);
378 if (!rsp_addr) {
379 err = -ENOMEM;
380 goto out_free_rq;
381 }
382
383 memset(rq_addr, 0, rq_size);
384 prq = rq_addr;
385
386 memset(rsp_addr, 0, rsp_size);
387 prsp = rsp_addr;
388
389 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
390
391 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
392 QLCNIC_CAP0_LSO);
393 prq->capabilities[0] = cpu_to_le32(temp);
394
395 prq->host_int_crb_mode =
396 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
397
398 prq->interrupt_ctl = 0;
399 prq->msi_index = 0;
400 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
401
402 prq_cds = &prq->cds_ring;
403
404 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
405 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
406
407 phys_addr = rq_phys_addr;
408 err = qlcnic_issue_cmd(adapter,
409 adapter->ahw->pci_func,
410 adapter->fw_hal_version,
411 (u32)(phys_addr >> 32),
412 ((u32)phys_addr & 0xffffffff),
413 rq_size,
414 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
415
416 if (err == QLCNIC_RCODE_SUCCESS) {
417 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
418 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
419
420 adapter->tx_context_id =
421 le16_to_cpu(prsp->context_id);
422 } else {
423 dev_err(&adapter->pdev->dev,
424 "Failed to create tx ctx in firmware%d\n", err);
425 err = -EIO;
426 }
427
428 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
429 rsp_phys_addr);
430
431 out_free_rq:
432 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
433
434 return err;
435 }
436
437 static void
438 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
439 {
440 if (qlcnic_issue_cmd(adapter,
441 adapter->ahw->pci_func,
442 adapter->fw_hal_version,
443 adapter->tx_context_id,
444 QLCNIC_DESTROY_CTX_RESET,
445 0,
446 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
447
448 dev_err(&adapter->pdev->dev,
449 "Failed to destroy tx ctx in firmware\n");
450 }
451 }
452
453 int
454 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
455 {
456 return qlcnic_issue_cmd(adapter,
457 adapter->ahw->pci_func,
458 adapter->fw_hal_version,
459 config,
460 0,
461 0,
462 QLCNIC_CDRP_CMD_CONFIG_PORT);
463 }
464
465 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
466 {
467 void *addr;
468 int err;
469 int ring;
470 struct qlcnic_recv_context *recv_ctx;
471 struct qlcnic_host_rds_ring *rds_ring;
472 struct qlcnic_host_sds_ring *sds_ring;
473 struct qlcnic_host_tx_ring *tx_ring;
474
475 struct pci_dev *pdev = adapter->pdev;
476
477 recv_ctx = adapter->recv_ctx;
478 tx_ring = adapter->tx_ring;
479
480 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
481 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
482 if (tx_ring->hw_consumer == NULL) {
483 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
484 return -ENOMEM;
485 }
486
487 /* cmd desc ring */
488 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
489 &tx_ring->phys_addr, GFP_KERNEL);
490
491 if (addr == NULL) {
492 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
493 err = -ENOMEM;
494 goto err_out_free;
495 }
496
497 tx_ring->desc_head = addr;
498
499 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
500 rds_ring = &recv_ctx->rds_rings[ring];
501 addr = dma_alloc_coherent(&adapter->pdev->dev,
502 RCV_DESC_RINGSIZE(rds_ring),
503 &rds_ring->phys_addr, GFP_KERNEL);
504 if (addr == NULL) {
505 dev_err(&pdev->dev,
506 "failed to allocate rds ring [%d]\n", ring);
507 err = -ENOMEM;
508 goto err_out_free;
509 }
510 rds_ring->desc_head = addr;
511
512 }
513
514 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
515 sds_ring = &recv_ctx->sds_rings[ring];
516
517 addr = dma_alloc_coherent(&adapter->pdev->dev,
518 STATUS_DESC_RINGSIZE(sds_ring),
519 &sds_ring->phys_addr, GFP_KERNEL);
520 if (addr == NULL) {
521 dev_err(&pdev->dev,
522 "failed to allocate sds ring [%d]\n", ring);
523 err = -ENOMEM;
524 goto err_out_free;
525 }
526 sds_ring->desc_head = addr;
527 }
528
529 return 0;
530
531 err_out_free:
532 qlcnic_free_hw_resources(adapter);
533 return err;
534 }
535
536
537 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
538 {
539 int err;
540
541 if (adapter->flags & QLCNIC_NEED_FLR) {
542 pci_reset_function(adapter->pdev);
543 adapter->flags &= ~QLCNIC_NEED_FLR;
544 }
545
546 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
547 if (err)
548 return err;
549
550 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
551 if (err) {
552 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
553 return err;
554 }
555
556 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
557 return 0;
558 }
559
560 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
561 {
562 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
563 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
564 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
565
566 /* Allow dma queues to drain after context reset */
567 msleep(20);
568 }
569 }
570
571 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
572 {
573 struct qlcnic_recv_context *recv_ctx;
574 struct qlcnic_host_rds_ring *rds_ring;
575 struct qlcnic_host_sds_ring *sds_ring;
576 struct qlcnic_host_tx_ring *tx_ring;
577 int ring;
578
579 recv_ctx = adapter->recv_ctx;
580
581 tx_ring = adapter->tx_ring;
582 if (tx_ring->hw_consumer != NULL) {
583 dma_free_coherent(&adapter->pdev->dev,
584 sizeof(u32),
585 tx_ring->hw_consumer,
586 tx_ring->hw_cons_phys_addr);
587 tx_ring->hw_consumer = NULL;
588 }
589
590 if (tx_ring->desc_head != NULL) {
591 dma_free_coherent(&adapter->pdev->dev,
592 TX_DESC_RINGSIZE(tx_ring),
593 tx_ring->desc_head, tx_ring->phys_addr);
594 tx_ring->desc_head = NULL;
595 }
596
597 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
598 rds_ring = &recv_ctx->rds_rings[ring];
599
600 if (rds_ring->desc_head != NULL) {
601 dma_free_coherent(&adapter->pdev->dev,
602 RCV_DESC_RINGSIZE(rds_ring),
603 rds_ring->desc_head,
604 rds_ring->phys_addr);
605 rds_ring->desc_head = NULL;
606 }
607 }
608
609 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
610 sds_ring = &recv_ctx->sds_rings[ring];
611
612 if (sds_ring->desc_head != NULL) {
613 dma_free_coherent(&adapter->pdev->dev,
614 STATUS_DESC_RINGSIZE(sds_ring),
615 sds_ring->desc_head,
616 sds_ring->phys_addr);
617 sds_ring->desc_head = NULL;
618 }
619 }
620 }
621
622
623 /* Get MAC address of a NIC partition */
624 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
625 {
626 int err;
627 u32 arg1;
628
629 arg1 = adapter->ahw->pci_func | BIT_8;
630 err = qlcnic_issue_cmd(adapter,
631 adapter->ahw->pci_func,
632 adapter->fw_hal_version,
633 arg1,
634 0,
635 0,
636 QLCNIC_CDRP_CMD_MAC_ADDRESS);
637
638 if (err == QLCNIC_RCODE_SUCCESS)
639 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
640 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
641 else {
642 dev_err(&adapter->pdev->dev,
643 "Failed to get mac address%d\n", err);
644 err = -EIO;
645 }
646
647 return err;
648 }
649
650 /* Get info of a NIC partition */
651 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
652 struct qlcnic_info *npar_info, u8 func_id)
653 {
654 int err;
655 dma_addr_t nic_dma_t;
656 struct qlcnic_info *nic_info;
657 void *nic_info_addr;
658 size_t nic_size = sizeof(struct qlcnic_info);
659
660 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
661 &nic_dma_t, GFP_KERNEL);
662 if (!nic_info_addr)
663 return -ENOMEM;
664 memset(nic_info_addr, 0, nic_size);
665
666 nic_info = nic_info_addr;
667 err = qlcnic_issue_cmd(adapter,
668 adapter->ahw->pci_func,
669 adapter->fw_hal_version,
670 MSD(nic_dma_t),
671 LSD(nic_dma_t),
672 (func_id << 16 | nic_size),
673 QLCNIC_CDRP_CMD_GET_NIC_INFO);
674
675 if (err == QLCNIC_RCODE_SUCCESS) {
676 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
677 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
678 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
679 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
680 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
681 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
682 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
683 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
684 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
685 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
686
687 dev_info(&adapter->pdev->dev,
688 "phy port: %d switch_mode: %d,\n"
689 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
690 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
691 npar_info->phys_port, npar_info->switch_mode,
692 npar_info->max_tx_ques, npar_info->max_rx_ques,
693 npar_info->min_tx_bw, npar_info->max_tx_bw,
694 npar_info->max_mtu, npar_info->capabilities);
695 } else {
696 dev_err(&adapter->pdev->dev,
697 "Failed to get nic info%d\n", err);
698 err = -EIO;
699 }
700
701 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
702 nic_dma_t);
703 return err;
704 }
705
706 /* Configure a NIC partition */
707 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
708 {
709 int err = -EIO;
710 dma_addr_t nic_dma_t;
711 void *nic_info_addr;
712 struct qlcnic_info *nic_info;
713 size_t nic_size = sizeof(struct qlcnic_info);
714
715 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
716 return err;
717
718 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
719 &nic_dma_t, GFP_KERNEL);
720 if (!nic_info_addr)
721 return -ENOMEM;
722
723 memset(nic_info_addr, 0, nic_size);
724 nic_info = nic_info_addr;
725
726 nic_info->pci_func = cpu_to_le16(nic->pci_func);
727 nic_info->op_mode = cpu_to_le16(nic->op_mode);
728 nic_info->phys_port = cpu_to_le16(nic->phys_port);
729 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
730 nic_info->capabilities = cpu_to_le32(nic->capabilities);
731 nic_info->max_mac_filters = nic->max_mac_filters;
732 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
733 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
734 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
735 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
736
737 err = qlcnic_issue_cmd(adapter,
738 adapter->ahw->pci_func,
739 adapter->fw_hal_version,
740 MSD(nic_dma_t),
741 LSD(nic_dma_t),
742 ((nic->pci_func << 16) | nic_size),
743 QLCNIC_CDRP_CMD_SET_NIC_INFO);
744
745 if (err != QLCNIC_RCODE_SUCCESS) {
746 dev_err(&adapter->pdev->dev,
747 "Failed to set nic info%d\n", err);
748 err = -EIO;
749 }
750
751 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
752 nic_dma_t);
753 return err;
754 }
755
756 /* Get PCI Info of a partition */
757 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
758 struct qlcnic_pci_info *pci_info)
759 {
760 int err = 0, i;
761 dma_addr_t pci_info_dma_t;
762 struct qlcnic_pci_info *npar;
763 void *pci_info_addr;
764 size_t npar_size = sizeof(struct qlcnic_pci_info);
765 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
766
767 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
768 &pci_info_dma_t, GFP_KERNEL);
769 if (!pci_info_addr)
770 return -ENOMEM;
771 memset(pci_info_addr, 0, pci_size);
772
773 npar = pci_info_addr;
774 err = qlcnic_issue_cmd(adapter,
775 adapter->ahw->pci_func,
776 adapter->fw_hal_version,
777 MSD(pci_info_dma_t),
778 LSD(pci_info_dma_t),
779 pci_size,
780 QLCNIC_CDRP_CMD_GET_PCI_INFO);
781
782 if (err == QLCNIC_RCODE_SUCCESS) {
783 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
784 pci_info->id = le16_to_cpu(npar->id);
785 pci_info->active = le16_to_cpu(npar->active);
786 pci_info->type = le16_to_cpu(npar->type);
787 pci_info->default_port =
788 le16_to_cpu(npar->default_port);
789 pci_info->tx_min_bw =
790 le16_to_cpu(npar->tx_min_bw);
791 pci_info->tx_max_bw =
792 le16_to_cpu(npar->tx_max_bw);
793 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
794 }
795 } else {
796 dev_err(&adapter->pdev->dev,
797 "Failed to get PCI Info%d\n", err);
798 err = -EIO;
799 }
800
801 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
802 pci_info_dma_t);
803 return err;
804 }
805
806 /* Configure eSwitch for port mirroring */
807 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
808 u8 enable_mirroring, u8 pci_func)
809 {
810 int err = -EIO;
811 u32 arg1;
812
813 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
814 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
815 return err;
816
817 arg1 = id | (enable_mirroring ? BIT_4 : 0);
818 arg1 |= pci_func << 8;
819
820 err = qlcnic_issue_cmd(adapter,
821 adapter->ahw->pci_func,
822 adapter->fw_hal_version,
823 arg1,
824 0,
825 0,
826 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
827
828 if (err != QLCNIC_RCODE_SUCCESS) {
829 dev_err(&adapter->pdev->dev,
830 "Failed to configure port mirroring%d on eswitch:%d\n",
831 pci_func, id);
832 } else {
833 dev_info(&adapter->pdev->dev,
834 "Configured eSwitch %d for port mirroring:%d\n",
835 id, pci_func);
836 }
837
838 return err;
839 }
840
841 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
842 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
843
844 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
845 struct __qlcnic_esw_statistics *stats;
846 dma_addr_t stats_dma_t;
847 void *stats_addr;
848 u32 arg1;
849 int err;
850
851 if (esw_stats == NULL)
852 return -ENOMEM;
853
854 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
855 func != adapter->ahw->pci_func) {
856 dev_err(&adapter->pdev->dev,
857 "Not privilege to query stats for func=%d", func);
858 return -EIO;
859 }
860
861 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
862 &stats_dma_t, GFP_KERNEL);
863 if (!stats_addr) {
864 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
865 return -ENOMEM;
866 }
867 memset(stats_addr, 0, stats_size);
868
869 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
870 arg1 |= rx_tx << 15 | stats_size << 16;
871
872 err = qlcnic_issue_cmd(adapter,
873 adapter->ahw->pci_func,
874 adapter->fw_hal_version,
875 arg1,
876 MSD(stats_dma_t),
877 LSD(stats_dma_t),
878 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
879
880 if (!err) {
881 stats = stats_addr;
882 esw_stats->context_id = le16_to_cpu(stats->context_id);
883 esw_stats->version = le16_to_cpu(stats->version);
884 esw_stats->size = le16_to_cpu(stats->size);
885 esw_stats->multicast_frames =
886 le64_to_cpu(stats->multicast_frames);
887 esw_stats->broadcast_frames =
888 le64_to_cpu(stats->broadcast_frames);
889 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
890 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
891 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
892 esw_stats->errors = le64_to_cpu(stats->errors);
893 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
894 }
895
896 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
897 stats_dma_t);
898 return err;
899 }
900
901 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
902 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
903
904 struct __qlcnic_esw_statistics port_stats;
905 u8 i;
906 int ret = -EIO;
907
908 if (esw_stats == NULL)
909 return -ENOMEM;
910 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
911 return -EIO;
912 if (adapter->npars == NULL)
913 return -EIO;
914
915 memset(esw_stats, 0, sizeof(u64));
916 esw_stats->unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
917 esw_stats->multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
918 esw_stats->broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
919 esw_stats->dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
920 esw_stats->errors = QLCNIC_ESW_STATS_NOT_AVAIL;
921 esw_stats->local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
922 esw_stats->numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;
923 esw_stats->context_id = eswitch;
924
925 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
926 if (adapter->npars[i].phy_port != eswitch)
927 continue;
928
929 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
930 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
931 continue;
932
933 esw_stats->size = port_stats.size;
934 esw_stats->version = port_stats.version;
935 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
936 port_stats.unicast_frames);
937 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
938 port_stats.multicast_frames);
939 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
940 port_stats.broadcast_frames);
941 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
942 port_stats.dropped_frames);
943 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
944 port_stats.errors);
945 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
946 port_stats.local_frames);
947 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
948 port_stats.numbytes);
949 ret = 0;
950 }
951 return ret;
952 }
953
954 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
955 const u8 port, const u8 rx_tx)
956 {
957
958 u32 arg1;
959
960 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
961 return -EIO;
962
963 if (func_esw == QLCNIC_STATS_PORT) {
964 if (port >= QLCNIC_MAX_PCI_FUNC)
965 goto err_ret;
966 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
967 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
968 goto err_ret;
969 } else {
970 goto err_ret;
971 }
972
973 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
974 goto err_ret;
975
976 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
977 arg1 |= BIT_14 | rx_tx << 15;
978
979 return qlcnic_issue_cmd(adapter,
980 adapter->ahw->pci_func,
981 adapter->fw_hal_version,
982 arg1,
983 0,
984 0,
985 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
986
987 err_ret:
988 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
989 "rx_ctx=%d\n", func_esw, port, rx_tx);
990 return -EIO;
991 }
992
993 static int
994 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
995 u32 *arg1, u32 *arg2)
996 {
997 int err = -EIO;
998 u8 pci_func;
999 pci_func = (*arg1 >> 8);
1000 err = qlcnic_issue_cmd(adapter,
1001 adapter->ahw->pci_func,
1002 adapter->fw_hal_version,
1003 *arg1,
1004 0,
1005 0,
1006 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
1007
1008 if (err == QLCNIC_RCODE_SUCCESS) {
1009 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
1010 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
1011 dev_info(&adapter->pdev->dev,
1012 "eSwitch port config for pci func %d\n", pci_func);
1013 } else {
1014 dev_err(&adapter->pdev->dev,
1015 "Failed to get eswitch port config for pci func %d\n",
1016 pci_func);
1017 }
1018 return err;
1019 }
1020 /* Configure eSwitch port
1021 op_mode = 0 for setting default port behavior
1022 op_mode = 1 for setting vlan id
1023 op_mode = 2 for deleting vlan id
1024 op_type = 0 for vlan_id
1025 op_type = 1 for port vlan_id
1026 */
1027 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
1028 struct qlcnic_esw_func_cfg *esw_cfg)
1029 {
1030 int err = -EIO;
1031 u32 arg1, arg2 = 0;
1032 u8 pci_func;
1033
1034 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
1035 return err;
1036 pci_func = esw_cfg->pci_func;
1037 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
1038 arg1 |= (pci_func << 8);
1039
1040 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1041 return err;
1042 arg1 &= ~(0x0ff << 8);
1043 arg1 |= (pci_func << 8);
1044 arg1 &= ~(BIT_2 | BIT_3);
1045 switch (esw_cfg->op_mode) {
1046 case QLCNIC_PORT_DEFAULTS:
1047 arg1 |= (BIT_4 | BIT_6 | BIT_7);
1048 arg2 |= (BIT_0 | BIT_1);
1049 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1050 arg2 |= (BIT_2 | BIT_3);
1051 if (!(esw_cfg->discard_tagged))
1052 arg1 &= ~BIT_4;
1053 if (!(esw_cfg->promisc_mode))
1054 arg1 &= ~BIT_6;
1055 if (!(esw_cfg->mac_override))
1056 arg1 &= ~BIT_7;
1057 if (!(esw_cfg->mac_anti_spoof))
1058 arg2 &= ~BIT_0;
1059 if (!(esw_cfg->offload_flags & BIT_0))
1060 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1061 if (!(esw_cfg->offload_flags & BIT_1))
1062 arg2 &= ~BIT_2;
1063 if (!(esw_cfg->offload_flags & BIT_2))
1064 arg2 &= ~BIT_3;
1065 break;
1066 case QLCNIC_ADD_VLAN:
1067 arg1 |= (BIT_2 | BIT_5);
1068 arg1 |= (esw_cfg->vlan_id << 16);
1069 break;
1070 case QLCNIC_DEL_VLAN:
1071 arg1 |= (BIT_3 | BIT_5);
1072 arg1 &= ~(0x0ffff << 16);
1073 break;
1074 default:
1075 return err;
1076 }
1077
1078 err = qlcnic_issue_cmd(adapter,
1079 adapter->ahw->pci_func,
1080 adapter->fw_hal_version,
1081 arg1,
1082 arg2,
1083 0,
1084 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1085
1086 if (err != QLCNIC_RCODE_SUCCESS) {
1087 dev_err(&adapter->pdev->dev,
1088 "Failed to configure eswitch pci func %d\n", pci_func);
1089 } else {
1090 dev_info(&adapter->pdev->dev,
1091 "Configured eSwitch for pci func %d\n", pci_func);
1092 }
1093
1094 return err;
1095 }
1096
1097 int
1098 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1099 struct qlcnic_esw_func_cfg *esw_cfg)
1100 {
1101 u32 arg1, arg2;
1102 u8 phy_port;
1103 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1104 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1105 else
1106 phy_port = adapter->physical_port;
1107 arg1 = phy_port;
1108 arg1 |= (esw_cfg->pci_func << 8);
1109 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1110 return -EIO;
1111
1112 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1113 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1114 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1115 esw_cfg->mac_override = !!(arg1 & BIT_7);
1116 esw_cfg->vlan_id = LSW(arg1 >> 16);
1117 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1118 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1119
1120 return 0;
1121 }
Linux kernel - Deliverables
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