2 =========================================================================
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4 --------------------------------------------------------------------
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>.
8 May 20 2002 - Add link status force-mode and TBI mode support.
9 2004 - Massive updates. See kernel SCM system for details.
10 =========================================================================
11 1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12 Command: 'insmod r8169 media = SET_MEDIA'
13 Ex: 'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
23 =========================================================================
24 VERSION 1.1 <2002/10/4>
26 The bit4:0 of MII register 4 is called "selector field", and have to be
27 00001b to indicate support of IEEE std 802.3 during NWay process of
28 exchanging Link Code Word (FLP).
30 VERSION 1.2 <2002/11/30>
33 - Use ether_crc in stock kernel (linux/crc32.h)
34 - Copy mc_filter setup code from 8139cp
35 (includes an optimization, and avoids set_bit use)
37 VERSION 1.6LK <2004/04/14>
39 - Merge of Realtek's version 1.6
40 - Conversion to DMA API
45 VERSION 2.2LK <2005/01/25>
47 - RX csum, TX csum/SG, TSO
49 - baby (< 7200) Jumbo frames support
50 - Merge of Realtek's version 2.2 (new phy)
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX "-NAPI"
75 #define NAPI_SUFFIX ""
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
83 #define assert(expr) \
85 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86 #expr,__FILE__,__FUNCTION__,__LINE__); \
88 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...) do {} while (0)
92 #endif /* RTL8169_DEBUG */
94 #define R8169_MSG_DEFAULT \
95 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
97 #define TX_BUFFS_AVAIL(tp) \
98 (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
100 #ifdef CONFIG_R8169_NAPI
101 #define rtl8169_rx_skb netif_receive_skb
102 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_receive_skb
103 #define rtl8169_rx_quota(count, quota) min(count, quota)
105 #define rtl8169_rx_skb netif_rx
106 #define rtl8169_rx_hwaccel_skb vlan_hwaccel_rx
107 #define rtl8169_rx_quota(count, quota) count
112 static int media
[MAX_UNITS
] = { -1, -1, -1, -1, -1, -1, -1, -1 };
113 static int num_media
= 0;
115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
116 static const int max_interrupt_work
= 20;
118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
119 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
120 static const int multicast_filter_limit
= 32;
122 /* MAC address length */
123 #define MAC_ADDR_LEN 6
125 #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
126 #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
127 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
128 #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
129 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
130 #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
131 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
133 #define R8169_REGS_SIZE 256
134 #define R8169_NAPI_WEIGHT 64
135 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */
136 #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */
137 #define RX_BUF_SIZE 1536 /* Rx Buffer size */
138 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
139 #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
141 #define RTL8169_TX_TIMEOUT (6*HZ)
142 #define RTL8169_PHY_TIMEOUT (10*HZ)
144 /* write/read MMIO register */
145 #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
146 #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg))
147 #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg))
148 #define RTL_R8(reg) readb (ioaddr + (reg))
149 #define RTL_R16(reg) readw (ioaddr + (reg))
150 #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg)))
153 RTL_GIGA_MAC_VER_01
= 0x00,
154 RTL_GIGA_MAC_VER_02
= 0x01,
155 RTL_GIGA_MAC_VER_03
= 0x02,
156 RTL_GIGA_MAC_VER_04
= 0x03,
157 RTL_GIGA_MAC_VER_05
= 0x04,
158 RTL_GIGA_MAC_VER_11
= 0x0b,
159 RTL_GIGA_MAC_VER_12
= 0x0c,
160 RTL_GIGA_MAC_VER_13
= 0x0d,
161 RTL_GIGA_MAC_VER_14
= 0x0e,
162 RTL_GIGA_MAC_VER_15
= 0x0f
166 RTL_GIGA_PHY_VER_C
= 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
167 RTL_GIGA_PHY_VER_D
= 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
168 RTL_GIGA_PHY_VER_E
= 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
169 RTL_GIGA_PHY_VER_F
= 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
170 RTL_GIGA_PHY_VER_G
= 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
171 RTL_GIGA_PHY_VER_H
= 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
174 #define _R(NAME,MAC,MASK) \
175 { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
177 static const struct {
180 u32 RxConfigMask
; /* Clears the bits supported by this chip */
181 } rtl_chip_info
[] = {
182 _R("RTL8169", RTL_GIGA_MAC_VER_01
, 0xff7e1880),
183 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_02
, 0xff7e1880),
184 _R("RTL8169s/8110s", RTL_GIGA_MAC_VER_03
, 0xff7e1880),
185 _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04
, 0xff7e1880),
186 _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05
, 0xff7e1880),
187 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11
, 0xff7e1880), // PCI-E
188 _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12
, 0xff7e1880), // PCI-E
189 _R("RTL8101e", RTL_GIGA_MAC_VER_13
, 0xff7e1880), // PCI-E 8139
190 _R("RTL8100e", RTL_GIGA_MAC_VER_14
, 0xff7e1880), // PCI-E 8139
191 _R("RTL8100e", RTL_GIGA_MAC_VER_15
, 0xff7e1880) // PCI-E 8139
201 static const struct {
205 [RTL_CFG_0
] = { 1, NET_IP_ALIGN
},
206 [RTL_CFG_1
] = { 2, NET_IP_ALIGN
},
207 [RTL_CFG_2
] = { 2, 8 }
210 static struct pci_device_id rtl8169_pci_tbl
[] = {
211 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8129), 0, 0, RTL_CFG_0
},
212 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8136), 0, 0, RTL_CFG_2
},
213 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8167), 0, 0, RTL_CFG_0
},
214 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8168), 0, 0, RTL_CFG_2
},
215 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK
, 0x8169), 0, 0, RTL_CFG_0
},
216 { PCI_DEVICE(PCI_VENDOR_ID_DLINK
, 0x4300), 0, 0, RTL_CFG_0
},
217 { PCI_DEVICE(0x1259, 0xc107), 0, 0, RTL_CFG_0
},
218 { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0
},
219 { PCI_VENDOR_ID_LINKSYS
, 0x1032,
220 PCI_ANY_ID
, 0x0024, 0, 0, RTL_CFG_0
},
224 MODULE_DEVICE_TABLE(pci
, rtl8169_pci_tbl
);
226 static int rx_copybreak
= 200;
228 static int ignore_parity_err
;
233 enum RTL8169_registers
{
234 MAC0
= 0, /* Ethernet hardware address. */
235 MAR0
= 8, /* Multicast filter. */
236 CounterAddrLow
= 0x10,
237 CounterAddrHigh
= 0x14,
238 TxDescStartAddrLow
= 0x20,
239 TxDescStartAddrHigh
= 0x24,
240 TxHDescStartAddrLow
= 0x28,
241 TxHDescStartAddrHigh
= 0x2c,
267 RxDescAddrLow
= 0xE4,
268 RxDescAddrHigh
= 0xE8,
271 FuncEventMask
= 0xF4,
272 FuncPresetState
= 0xF8,
273 FuncForceEvent
= 0xFC,
276 enum RTL8169_register_content
{
277 /* InterruptStatusBits */
281 TxDescUnavail
= 0x80,
305 Cfg9346_Unlock
= 0xC0,
310 AcceptBroadcast
= 0x08,
311 AcceptMulticast
= 0x04,
313 AcceptAllPhys
= 0x01,
320 TxInterFrameGapShift
= 24,
321 TxDMAShift
= 8, /* DMA burst value (0-7) is shift this many bits */
323 /* Config1 register p.24 */
324 PMEnable
= (1 << 0), /* Power Management Enable */
326 /* Config3 register p.25 */
327 MagicPacket
= (1 << 5), /* Wake up when receives a Magic Packet */
328 LinkUp
= (1 << 4), /* Wake up when the cable connection is re-established */
330 /* Config5 register p.27 */
331 BWF
= (1 << 6), /* Accept Broadcast wakeup frame */
332 MWF
= (1 << 5), /* Accept Multicast wakeup frame */
333 UWF
= (1 << 4), /* Accept Unicast wakeup frame */
334 LanWake
= (1 << 1), /* LanWake enable/disable */
335 PMEStatus
= (1 << 0), /* PME status can be reset by PCI RST# */
338 TBIReset
= 0x80000000,
339 TBILoopback
= 0x40000000,
340 TBINwEnable
= 0x20000000,
341 TBINwRestart
= 0x10000000,
342 TBILinkOk
= 0x02000000,
343 TBINwComplete
= 0x01000000,
351 /* rtl8169_PHYstatus */
369 TBILinkOK
= 0x02000000,
371 /* DumpCounterCommand */
375 enum _DescStatusBit
{
376 DescOwn
= (1 << 31), /* Descriptor is owned by NIC */
377 RingEnd
= (1 << 30), /* End of descriptor ring */
378 FirstFrag
= (1 << 29), /* First segment of a packet */
379 LastFrag
= (1 << 28), /* Final segment of a packet */
382 LargeSend
= (1 << 27), /* TCP Large Send Offload (TSO) */
383 MSSShift
= 16, /* MSS value position */
384 MSSMask
= 0xfff, /* MSS value + LargeSend bit: 12 bits */
385 IPCS
= (1 << 18), /* Calculate IP checksum */
386 UDPCS
= (1 << 17), /* Calculate UDP/IP checksum */
387 TCPCS
= (1 << 16), /* Calculate TCP/IP checksum */
388 TxVlanTag
= (1 << 17), /* Add VLAN tag */
391 PID1
= (1 << 18), /* Protocol ID bit 1/2 */
392 PID0
= (1 << 17), /* Protocol ID bit 2/2 */
394 #define RxProtoUDP (PID1)
395 #define RxProtoTCP (PID0)
396 #define RxProtoIP (PID1 | PID0)
397 #define RxProtoMask RxProtoIP
399 IPFail
= (1 << 16), /* IP checksum failed */
400 UDPFail
= (1 << 15), /* UDP/IP checksum failed */
401 TCPFail
= (1 << 14), /* TCP/IP checksum failed */
402 RxVlanTag
= (1 << 16), /* VLAN tag available */
405 #define RsvdMask 0x3fffc000
422 u8 __pad
[sizeof(void *) - sizeof(u32
)];
425 struct rtl8169_private
{
426 void __iomem
*mmio_addr
; /* memory map physical address */
427 struct pci_dev
*pci_dev
; /* Index of PCI device */
428 struct net_device_stats stats
; /* statistics of net device */
429 spinlock_t lock
; /* spin lock flag */
434 u32 cur_rx
; /* Index into the Rx descriptor buffer of next Rx pkt. */
435 u32 cur_tx
; /* Index into the Tx descriptor buffer of next Rx pkt. */
438 struct TxDesc
*TxDescArray
; /* 256-aligned Tx descriptor ring */
439 struct RxDesc
*RxDescArray
; /* 256-aligned Rx descriptor ring */
440 dma_addr_t TxPhyAddr
;
441 dma_addr_t RxPhyAddr
;
442 struct sk_buff
*Rx_skbuff
[NUM_RX_DESC
]; /* Rx data buffers */
443 struct ring_info tx_skb
[NUM_TX_DESC
]; /* Tx data buffers */
446 struct timer_list timer
;
449 int phy_auto_nego_reg
;
450 int phy_1000_ctrl_reg
;
451 #ifdef CONFIG_R8169_VLAN
452 struct vlan_group
*vlgrp
;
454 int (*set_speed
)(struct net_device
*, u8 autoneg
, u16 speed
, u8 duplex
);
455 void (*get_settings
)(struct net_device
*, struct ethtool_cmd
*);
456 void (*phy_reset_enable
)(void __iomem
*);
457 unsigned int (*phy_reset_pending
)(void __iomem
*);
458 unsigned int (*link_ok
)(void __iomem
*);
459 struct work_struct task
;
460 unsigned wol_enabled
: 1;
463 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
464 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
465 module_param_array(media
, int, &num_media
, 0);
466 MODULE_PARM_DESC(media
, "force phy operation. Deprecated by ethtool (8).");
467 module_param(rx_copybreak
, int, 0);
468 MODULE_PARM_DESC(rx_copybreak
, "Copy breakpoint for copy-only-tiny-frames");
469 module_param(use_dac
, int, 0);
470 MODULE_PARM_DESC(use_dac
, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
471 module_param_named(debug
, debug
.msg_enable
, int, 0);
472 MODULE_PARM_DESC(debug
, "Debug verbosity level (0=none, ..., 16=all)");
473 module_param_named(ignore_parity_err
, ignore_parity_err
, bool, 0);
474 MODULE_PARM_DESC(ignore_parity_err
, "Ignore PCI parity error as target. Default: false");
475 MODULE_LICENSE("GPL");
476 MODULE_VERSION(RTL8169_VERSION
);
478 static int rtl8169_open(struct net_device
*dev
);
479 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
);
480 static irqreturn_t
rtl8169_interrupt(int irq
, void *dev_instance
);
481 static int rtl8169_init_ring(struct net_device
*dev
);
482 static void rtl8169_hw_start(struct net_device
*dev
);
483 static int rtl8169_close(struct net_device
*dev
);
484 static void rtl8169_set_rx_mode(struct net_device
*dev
);
485 static void rtl8169_tx_timeout(struct net_device
*dev
);
486 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
);
487 static int rtl8169_rx_interrupt(struct net_device
*, struct rtl8169_private
*,
489 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
);
490 static void rtl8169_down(struct net_device
*dev
);
492 #ifdef CONFIG_R8169_NAPI
493 static int rtl8169_poll(struct net_device
*dev
, int *budget
);
496 static const u16 rtl8169_intr_mask
=
497 SYSErr
| LinkChg
| RxOverflow
| RxFIFOOver
| TxErr
| TxOK
| RxErr
| RxOK
;
498 static const u16 rtl8169_napi_event
=
499 RxOK
| RxOverflow
| RxFIFOOver
| TxOK
| TxErr
;
500 static const unsigned int rtl8169_rx_config
=
501 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) | (RX_DMA_BURST
<< RxCfgDMAShift
);
503 static void mdio_write(void __iomem
*ioaddr
, int RegAddr
, int value
)
507 RTL_W32(PHYAR
, 0x80000000 | (RegAddr
& 0xFF) << 16 | value
);
509 for (i
= 20; i
> 0; i
--) {
510 /* Check if the RTL8169 has completed writing to the specified MII register */
511 if (!(RTL_R32(PHYAR
) & 0x80000000))
517 static int mdio_read(void __iomem
*ioaddr
, int RegAddr
)
521 RTL_W32(PHYAR
, 0x0 | (RegAddr
& 0xFF) << 16);
523 for (i
= 20; i
> 0; i
--) {
524 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
525 if (RTL_R32(PHYAR
) & 0x80000000) {
526 value
= (int) (RTL_R32(PHYAR
) & 0xFFFF);
534 static void rtl8169_irq_mask_and_ack(void __iomem
*ioaddr
)
536 RTL_W16(IntrMask
, 0x0000);
538 RTL_W16(IntrStatus
, 0xffff);
541 static void rtl8169_asic_down(void __iomem
*ioaddr
)
543 RTL_W8(ChipCmd
, 0x00);
544 rtl8169_irq_mask_and_ack(ioaddr
);
548 static unsigned int rtl8169_tbi_reset_pending(void __iomem
*ioaddr
)
550 return RTL_R32(TBICSR
) & TBIReset
;
553 static unsigned int rtl8169_xmii_reset_pending(void __iomem
*ioaddr
)
555 return mdio_read(ioaddr
, MII_BMCR
) & BMCR_RESET
;
558 static unsigned int rtl8169_tbi_link_ok(void __iomem
*ioaddr
)
560 return RTL_R32(TBICSR
) & TBILinkOk
;
563 static unsigned int rtl8169_xmii_link_ok(void __iomem
*ioaddr
)
565 return RTL_R8(PHYstatus
) & LinkStatus
;
568 static void rtl8169_tbi_reset_enable(void __iomem
*ioaddr
)
570 RTL_W32(TBICSR
, RTL_R32(TBICSR
) | TBIReset
);
573 static void rtl8169_xmii_reset_enable(void __iomem
*ioaddr
)
577 mdio_write(ioaddr
, MII_BMCR
, BMCR_RESET
);
578 val
= mdio_read(ioaddr
, MII_BMCR
);
581 static void rtl8169_check_link_status(struct net_device
*dev
,
582 struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
586 spin_lock_irqsave(&tp
->lock
, flags
);
587 if (tp
->link_ok(ioaddr
)) {
588 netif_carrier_on(dev
);
589 if (netif_msg_ifup(tp
))
590 printk(KERN_INFO PFX
"%s: link up\n", dev
->name
);
592 if (netif_msg_ifdown(tp
))
593 printk(KERN_INFO PFX
"%s: link down\n", dev
->name
);
594 netif_carrier_off(dev
);
596 spin_unlock_irqrestore(&tp
->lock
, flags
);
599 static void rtl8169_link_option(int idx
, u8
*autoneg
, u16
*speed
, u8
*duplex
)
606 } link_settings
[] = {
607 { SPEED_10
, DUPLEX_HALF
, AUTONEG_DISABLE
, _10_Half
},
608 { SPEED_10
, DUPLEX_FULL
, AUTONEG_DISABLE
, _10_Full
},
609 { SPEED_100
, DUPLEX_HALF
, AUTONEG_DISABLE
, _100_Half
},
610 { SPEED_100
, DUPLEX_FULL
, AUTONEG_DISABLE
, _100_Full
},
611 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_DISABLE
, _1000_Full
},
613 { SPEED_1000
, DUPLEX_FULL
, AUTONEG_ENABLE
, 0xff }
615 unsigned char option
;
617 option
= ((idx
< MAX_UNITS
) && (idx
>= 0)) ? media
[idx
] : 0xff;
619 if ((option
!= 0xff) && !idx
&& netif_msg_drv(&debug
))
620 printk(KERN_WARNING PFX
"media option is deprecated.\n");
622 for (p
= link_settings
; p
->media
!= 0xff; p
++) {
623 if (p
->media
== option
)
626 *autoneg
= p
->autoneg
;
631 static void rtl8169_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
633 struct rtl8169_private
*tp
= netdev_priv(dev
);
634 void __iomem
*ioaddr
= tp
->mmio_addr
;
639 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
640 wol
->supported
= WAKE_ANY
;
642 spin_lock_irq(&tp
->lock
);
644 options
= RTL_R8(Config1
);
645 if (!(options
& PMEnable
))
648 options
= RTL_R8(Config3
);
649 if (options
& LinkUp
)
650 wol
->wolopts
|= WAKE_PHY
;
651 if (options
& MagicPacket
)
652 wol
->wolopts
|= WAKE_MAGIC
;
654 options
= RTL_R8(Config5
);
656 wol
->wolopts
|= WAKE_UCAST
;
658 wol
->wolopts
|= WAKE_BCAST
;
660 wol
->wolopts
|= WAKE_MCAST
;
663 spin_unlock_irq(&tp
->lock
);
666 static int rtl8169_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
668 struct rtl8169_private
*tp
= netdev_priv(dev
);
669 void __iomem
*ioaddr
= tp
->mmio_addr
;
676 { WAKE_ANY
, Config1
, PMEnable
},
677 { WAKE_PHY
, Config3
, LinkUp
},
678 { WAKE_MAGIC
, Config3
, MagicPacket
},
679 { WAKE_UCAST
, Config5
, UWF
},
680 { WAKE_BCAST
, Config5
, BWF
},
681 { WAKE_MCAST
, Config5
, MWF
},
682 { WAKE_ANY
, Config5
, LanWake
}
685 spin_lock_irq(&tp
->lock
);
687 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
689 for (i
= 0; i
< ARRAY_SIZE(cfg
); i
++) {
690 u8 options
= RTL_R8(cfg
[i
].reg
) & ~cfg
[i
].mask
;
691 if (wol
->wolopts
& cfg
[i
].opt
)
692 options
|= cfg
[i
].mask
;
693 RTL_W8(cfg
[i
].reg
, options
);
696 RTL_W8(Cfg9346
, Cfg9346_Lock
);
698 tp
->wol_enabled
= (wol
->wolopts
) ? 1 : 0;
700 spin_unlock_irq(&tp
->lock
);
705 static void rtl8169_get_drvinfo(struct net_device
*dev
,
706 struct ethtool_drvinfo
*info
)
708 struct rtl8169_private
*tp
= netdev_priv(dev
);
710 strcpy(info
->driver
, MODULENAME
);
711 strcpy(info
->version
, RTL8169_VERSION
);
712 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
715 static int rtl8169_get_regs_len(struct net_device
*dev
)
717 return R8169_REGS_SIZE
;
720 static int rtl8169_set_speed_tbi(struct net_device
*dev
,
721 u8 autoneg
, u16 speed
, u8 duplex
)
723 struct rtl8169_private
*tp
= netdev_priv(dev
);
724 void __iomem
*ioaddr
= tp
->mmio_addr
;
728 reg
= RTL_R32(TBICSR
);
729 if ((autoneg
== AUTONEG_DISABLE
) && (speed
== SPEED_1000
) &&
730 (duplex
== DUPLEX_FULL
)) {
731 RTL_W32(TBICSR
, reg
& ~(TBINwEnable
| TBINwRestart
));
732 } else if (autoneg
== AUTONEG_ENABLE
)
733 RTL_W32(TBICSR
, reg
| TBINwEnable
| TBINwRestart
);
735 if (netif_msg_link(tp
)) {
736 printk(KERN_WARNING
"%s: "
737 "incorrect speed setting refused in TBI mode\n",
746 static int rtl8169_set_speed_xmii(struct net_device
*dev
,
747 u8 autoneg
, u16 speed
, u8 duplex
)
749 struct rtl8169_private
*tp
= netdev_priv(dev
);
750 void __iomem
*ioaddr
= tp
->mmio_addr
;
751 int auto_nego
, giga_ctrl
;
753 auto_nego
= mdio_read(ioaddr
, MII_ADVERTISE
);
754 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
755 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
756 giga_ctrl
= mdio_read(ioaddr
, MII_CTRL1000
);
757 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
759 if (autoneg
== AUTONEG_ENABLE
) {
760 auto_nego
|= (ADVERTISE_10HALF
| ADVERTISE_10FULL
|
761 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
762 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
764 if (speed
== SPEED_10
)
765 auto_nego
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
766 else if (speed
== SPEED_100
)
767 auto_nego
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
768 else if (speed
== SPEED_1000
)
769 giga_ctrl
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
771 if (duplex
== DUPLEX_HALF
)
772 auto_nego
&= ~(ADVERTISE_10FULL
| ADVERTISE_100FULL
);
774 if (duplex
== DUPLEX_FULL
)
775 auto_nego
&= ~(ADVERTISE_10HALF
| ADVERTISE_100HALF
);
777 /* This tweak comes straight from Realtek's driver. */
778 if ((speed
== SPEED_100
) && (duplex
== DUPLEX_HALF
) &&
779 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
)) {
780 auto_nego
= ADVERTISE_100HALF
| ADVERTISE_CSMA
;
784 /* The 8100e/8101e do Fast Ethernet only. */
785 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
786 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
787 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
788 if ((giga_ctrl
& (ADVERTISE_1000FULL
| ADVERTISE_1000HALF
)) &&
789 netif_msg_link(tp
)) {
790 printk(KERN_INFO
"%s: PHY does not support 1000Mbps.\n",
793 giga_ctrl
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
796 auto_nego
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
798 tp
->phy_auto_nego_reg
= auto_nego
;
799 tp
->phy_1000_ctrl_reg
= giga_ctrl
;
801 mdio_write(ioaddr
, MII_ADVERTISE
, auto_nego
);
802 mdio_write(ioaddr
, MII_CTRL1000
, giga_ctrl
);
803 mdio_write(ioaddr
, MII_BMCR
, BMCR_ANENABLE
| BMCR_ANRESTART
);
807 static int rtl8169_set_speed(struct net_device
*dev
,
808 u8 autoneg
, u16 speed
, u8 duplex
)
810 struct rtl8169_private
*tp
= netdev_priv(dev
);
813 ret
= tp
->set_speed(dev
, autoneg
, speed
, duplex
);
815 if (netif_running(dev
) && (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
816 mod_timer(&tp
->timer
, jiffies
+ RTL8169_PHY_TIMEOUT
);
821 static int rtl8169_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
823 struct rtl8169_private
*tp
= netdev_priv(dev
);
827 spin_lock_irqsave(&tp
->lock
, flags
);
828 ret
= rtl8169_set_speed(dev
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
829 spin_unlock_irqrestore(&tp
->lock
, flags
);
834 static u32
rtl8169_get_rx_csum(struct net_device
*dev
)
836 struct rtl8169_private
*tp
= netdev_priv(dev
);
838 return tp
->cp_cmd
& RxChkSum
;
841 static int rtl8169_set_rx_csum(struct net_device
*dev
, u32 data
)
843 struct rtl8169_private
*tp
= netdev_priv(dev
);
844 void __iomem
*ioaddr
= tp
->mmio_addr
;
847 spin_lock_irqsave(&tp
->lock
, flags
);
850 tp
->cp_cmd
|= RxChkSum
;
852 tp
->cp_cmd
&= ~RxChkSum
;
854 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
857 spin_unlock_irqrestore(&tp
->lock
, flags
);
862 #ifdef CONFIG_R8169_VLAN
864 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
867 return (tp
->vlgrp
&& vlan_tx_tag_present(skb
)) ?
868 TxVlanTag
| swab16(vlan_tx_tag_get(skb
)) : 0x00;
871 static void rtl8169_vlan_rx_register(struct net_device
*dev
,
872 struct vlan_group
*grp
)
874 struct rtl8169_private
*tp
= netdev_priv(dev
);
875 void __iomem
*ioaddr
= tp
->mmio_addr
;
878 spin_lock_irqsave(&tp
->lock
, flags
);
881 tp
->cp_cmd
|= RxVlan
;
883 tp
->cp_cmd
&= ~RxVlan
;
884 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
886 spin_unlock_irqrestore(&tp
->lock
, flags
);
889 static void rtl8169_vlan_rx_kill_vid(struct net_device
*dev
, unsigned short vid
)
891 struct rtl8169_private
*tp
= netdev_priv(dev
);
894 spin_lock_irqsave(&tp
->lock
, flags
);
896 tp
->vlgrp
->vlan_devices
[vid
] = NULL
;
897 spin_unlock_irqrestore(&tp
->lock
, flags
);
900 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
903 u32 opts2
= le32_to_cpu(desc
->opts2
);
906 if (tp
->vlgrp
&& (opts2
& RxVlanTag
)) {
907 rtl8169_rx_hwaccel_skb(skb
, tp
->vlgrp
,
908 swab16(opts2
& 0xffff));
916 #else /* !CONFIG_R8169_VLAN */
918 static inline u32
rtl8169_tx_vlan_tag(struct rtl8169_private
*tp
,
924 static int rtl8169_rx_vlan_skb(struct rtl8169_private
*tp
, struct RxDesc
*desc
,
932 static void rtl8169_gset_tbi(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
934 struct rtl8169_private
*tp
= netdev_priv(dev
);
935 void __iomem
*ioaddr
= tp
->mmio_addr
;
939 SUPPORTED_1000baseT_Full
| SUPPORTED_Autoneg
| SUPPORTED_FIBRE
;
940 cmd
->port
= PORT_FIBRE
;
941 cmd
->transceiver
= XCVR_INTERNAL
;
943 status
= RTL_R32(TBICSR
);
944 cmd
->advertising
= (status
& TBINwEnable
) ? ADVERTISED_Autoneg
: 0;
945 cmd
->autoneg
= !!(status
& TBINwEnable
);
947 cmd
->speed
= SPEED_1000
;
948 cmd
->duplex
= DUPLEX_FULL
; /* Always set */
951 static void rtl8169_gset_xmii(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
953 struct rtl8169_private
*tp
= netdev_priv(dev
);
954 void __iomem
*ioaddr
= tp
->mmio_addr
;
957 cmd
->supported
= SUPPORTED_10baseT_Half
|
958 SUPPORTED_10baseT_Full
|
959 SUPPORTED_100baseT_Half
|
960 SUPPORTED_100baseT_Full
|
961 SUPPORTED_1000baseT_Full
|
966 cmd
->advertising
= ADVERTISED_TP
| ADVERTISED_Autoneg
;
968 if (tp
->phy_auto_nego_reg
& ADVERTISE_10HALF
)
969 cmd
->advertising
|= ADVERTISED_10baseT_Half
;
970 if (tp
->phy_auto_nego_reg
& ADVERTISE_10FULL
)
971 cmd
->advertising
|= ADVERTISED_10baseT_Full
;
972 if (tp
->phy_auto_nego_reg
& ADVERTISE_100HALF
)
973 cmd
->advertising
|= ADVERTISED_100baseT_Half
;
974 if (tp
->phy_auto_nego_reg
& ADVERTISE_100FULL
)
975 cmd
->advertising
|= ADVERTISED_100baseT_Full
;
976 if (tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
)
977 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
979 status
= RTL_R8(PHYstatus
);
981 if (status
& _1000bpsF
)
982 cmd
->speed
= SPEED_1000
;
983 else if (status
& _100bps
)
984 cmd
->speed
= SPEED_100
;
985 else if (status
& _10bps
)
986 cmd
->speed
= SPEED_10
;
988 if (status
& TxFlowCtrl
)
989 cmd
->advertising
|= ADVERTISED_Asym_Pause
;
990 if (status
& RxFlowCtrl
)
991 cmd
->advertising
|= ADVERTISED_Pause
;
993 cmd
->duplex
= ((status
& _1000bpsF
) || (status
& FullDup
)) ?
994 DUPLEX_FULL
: DUPLEX_HALF
;
997 static int rtl8169_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
999 struct rtl8169_private
*tp
= netdev_priv(dev
);
1000 unsigned long flags
;
1002 spin_lock_irqsave(&tp
->lock
, flags
);
1004 tp
->get_settings(dev
, cmd
);
1006 spin_unlock_irqrestore(&tp
->lock
, flags
);
1010 static void rtl8169_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1013 struct rtl8169_private
*tp
= netdev_priv(dev
);
1014 unsigned long flags
;
1016 if (regs
->len
> R8169_REGS_SIZE
)
1017 regs
->len
= R8169_REGS_SIZE
;
1019 spin_lock_irqsave(&tp
->lock
, flags
);
1020 memcpy_fromio(p
, tp
->mmio_addr
, regs
->len
);
1021 spin_unlock_irqrestore(&tp
->lock
, flags
);
1024 static u32
rtl8169_get_msglevel(struct net_device
*dev
)
1026 struct rtl8169_private
*tp
= netdev_priv(dev
);
1028 return tp
->msg_enable
;
1031 static void rtl8169_set_msglevel(struct net_device
*dev
, u32 value
)
1033 struct rtl8169_private
*tp
= netdev_priv(dev
);
1035 tp
->msg_enable
= value
;
1038 static const char rtl8169_gstrings
[][ETH_GSTRING_LEN
] = {
1045 "tx_single_collisions",
1046 "tx_multi_collisions",
1054 struct rtl8169_counters
{
1061 u32 tx_one_collision
;
1062 u32 tx_multi_collision
;
1070 static int rtl8169_get_stats_count(struct net_device
*dev
)
1072 return ARRAY_SIZE(rtl8169_gstrings
);
1075 static void rtl8169_get_ethtool_stats(struct net_device
*dev
,
1076 struct ethtool_stats
*stats
, u64
*data
)
1078 struct rtl8169_private
*tp
= netdev_priv(dev
);
1079 void __iomem
*ioaddr
= tp
->mmio_addr
;
1080 struct rtl8169_counters
*counters
;
1086 counters
= pci_alloc_consistent(tp
->pci_dev
, sizeof(*counters
), &paddr
);
1090 RTL_W32(CounterAddrHigh
, (u64
)paddr
>> 32);
1091 cmd
= (u64
)paddr
& DMA_32BIT_MASK
;
1092 RTL_W32(CounterAddrLow
, cmd
);
1093 RTL_W32(CounterAddrLow
, cmd
| CounterDump
);
1095 while (RTL_R32(CounterAddrLow
) & CounterDump
) {
1096 if (msleep_interruptible(1))
1100 RTL_W32(CounterAddrLow
, 0);
1101 RTL_W32(CounterAddrHigh
, 0);
1103 data
[0] = le64_to_cpu(counters
->tx_packets
);
1104 data
[1] = le64_to_cpu(counters
->rx_packets
);
1105 data
[2] = le64_to_cpu(counters
->tx_errors
);
1106 data
[3] = le32_to_cpu(counters
->rx_errors
);
1107 data
[4] = le16_to_cpu(counters
->rx_missed
);
1108 data
[5] = le16_to_cpu(counters
->align_errors
);
1109 data
[6] = le32_to_cpu(counters
->tx_one_collision
);
1110 data
[7] = le32_to_cpu(counters
->tx_multi_collision
);
1111 data
[8] = le64_to_cpu(counters
->rx_unicast
);
1112 data
[9] = le64_to_cpu(counters
->rx_broadcast
);
1113 data
[10] = le32_to_cpu(counters
->rx_multicast
);
1114 data
[11] = le16_to_cpu(counters
->tx_aborted
);
1115 data
[12] = le16_to_cpu(counters
->tx_underun
);
1117 pci_free_consistent(tp
->pci_dev
, sizeof(*counters
), counters
, paddr
);
1120 static void rtl8169_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
1124 memcpy(data
, *rtl8169_gstrings
, sizeof(rtl8169_gstrings
));
1130 static const struct ethtool_ops rtl8169_ethtool_ops
= {
1131 .get_drvinfo
= rtl8169_get_drvinfo
,
1132 .get_regs_len
= rtl8169_get_regs_len
,
1133 .get_link
= ethtool_op_get_link
,
1134 .get_settings
= rtl8169_get_settings
,
1135 .set_settings
= rtl8169_set_settings
,
1136 .get_msglevel
= rtl8169_get_msglevel
,
1137 .set_msglevel
= rtl8169_set_msglevel
,
1138 .get_rx_csum
= rtl8169_get_rx_csum
,
1139 .set_rx_csum
= rtl8169_set_rx_csum
,
1140 .get_tx_csum
= ethtool_op_get_tx_csum
,
1141 .set_tx_csum
= ethtool_op_set_tx_csum
,
1142 .get_sg
= ethtool_op_get_sg
,
1143 .set_sg
= ethtool_op_set_sg
,
1144 .get_tso
= ethtool_op_get_tso
,
1145 .set_tso
= ethtool_op_set_tso
,
1146 .get_regs
= rtl8169_get_regs
,
1147 .get_wol
= rtl8169_get_wol
,
1148 .set_wol
= rtl8169_set_wol
,
1149 .get_strings
= rtl8169_get_strings
,
1150 .get_stats_count
= rtl8169_get_stats_count
,
1151 .get_ethtool_stats
= rtl8169_get_ethtool_stats
,
1152 .get_perm_addr
= ethtool_op_get_perm_addr
,
1155 static void rtl8169_write_gmii_reg_bit(void __iomem
*ioaddr
, int reg
, int bitnum
,
1160 val
= mdio_read(ioaddr
, reg
);
1161 val
= (bitval
== 1) ?
1162 val
| (bitval
<< bitnum
) : val
& ~(0x0001 << bitnum
);
1163 mdio_write(ioaddr
, reg
, val
& 0xffff);
1166 static void rtl8169_get_mac_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1172 { 0x38800000, RTL_GIGA_MAC_VER_15
},
1173 { 0x38000000, RTL_GIGA_MAC_VER_12
},
1174 { 0x34000000, RTL_GIGA_MAC_VER_13
},
1175 { 0x30800000, RTL_GIGA_MAC_VER_14
},
1176 { 0x30000000, RTL_GIGA_MAC_VER_11
},
1177 { 0x18000000, RTL_GIGA_MAC_VER_05
},
1178 { 0x10000000, RTL_GIGA_MAC_VER_04
},
1179 { 0x04000000, RTL_GIGA_MAC_VER_03
},
1180 { 0x00800000, RTL_GIGA_MAC_VER_02
},
1181 { 0x00000000, RTL_GIGA_MAC_VER_01
} /* Catch-all */
1185 reg
= RTL_R32(TxConfig
) & 0x7c800000;
1186 while ((reg
& p
->mask
) != p
->mask
)
1188 tp
->mac_version
= p
->mac_version
;
1191 static void rtl8169_print_mac_version(struct rtl8169_private
*tp
)
1193 dprintk("mac_version = 0x%02x\n", tp
->mac_version
);
1196 static void rtl8169_get_phy_version(struct rtl8169_private
*tp
, void __iomem
*ioaddr
)
1203 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G
},
1204 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F
},
1205 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E
},
1206 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D
} /* Catch-all */
1210 reg
= mdio_read(ioaddr
, MII_PHYSID2
) & 0xffff;
1211 while ((reg
& p
->mask
) != p
->set
)
1213 tp
->phy_version
= p
->phy_version
;
1216 static void rtl8169_print_phy_version(struct rtl8169_private
*tp
)
1223 { RTL_GIGA_PHY_VER_G
, "RTL_GIGA_PHY_VER_G", 0x0002 },
1224 { RTL_GIGA_PHY_VER_F
, "RTL_GIGA_PHY_VER_F", 0x0001 },
1225 { RTL_GIGA_PHY_VER_E
, "RTL_GIGA_PHY_VER_E", 0x0000 },
1226 { RTL_GIGA_PHY_VER_D
, "RTL_GIGA_PHY_VER_D", 0x0000 },
1230 for (p
= phy_print
; p
->msg
; p
++) {
1231 if (tp
->phy_version
== p
->version
) {
1232 dprintk("phy_version == %s (%04x)\n", p
->msg
, p
->reg
);
1236 dprintk("phy_version == Unknown\n");
1239 static void rtl8169_hw_phy_config(struct net_device
*dev
)
1241 struct rtl8169_private
*tp
= netdev_priv(dev
);
1242 void __iomem
*ioaddr
= tp
->mmio_addr
;
1244 u16 regs
[5]; /* Beware of bit-sign propagation */
1245 } phy_magic
[5] = { {
1246 { 0x0000, //w 4 15 12 0
1247 0x00a1, //w 3 15 0 00a1
1248 0x0008, //w 2 15 0 0008
1249 0x1020, //w 1 15 0 1020
1250 0x1000 } },{ //w 0 15 0 1000
1251 { 0x7000, //w 4 15 12 7
1252 0xff41, //w 3 15 0 ff41
1253 0xde60, //w 2 15 0 de60
1254 0x0140, //w 1 15 0 0140
1255 0x0077 } },{ //w 0 15 0 0077
1256 { 0xa000, //w 4 15 12 a
1257 0xdf01, //w 3 15 0 df01
1258 0xdf20, //w 2 15 0 df20
1259 0xff95, //w 1 15 0 ff95
1260 0xfa00 } },{ //w 0 15 0 fa00
1261 { 0xb000, //w 4 15 12 b
1262 0xff41, //w 3 15 0 ff41
1263 0xde20, //w 2 15 0 de20
1264 0x0140, //w 1 15 0 0140
1265 0x00bb } },{ //w 0 15 0 00bb
1266 { 0xf000, //w 4 15 12 f
1267 0xdf01, //w 3 15 0 df01
1268 0xdf20, //w 2 15 0 df20
1269 0xff95, //w 1 15 0 ff95
1270 0xbf00 } //w 0 15 0 bf00
1275 rtl8169_print_mac_version(tp
);
1276 rtl8169_print_phy_version(tp
);
1278 if (tp
->mac_version
<= RTL_GIGA_MAC_VER_01
)
1280 if (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
)
1283 dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1284 dprintk("Do final_reg2.cfg\n");
1288 if (tp
->mac_version
== RTL_GIGA_MAC_VER_04
) {
1289 mdio_write(ioaddr
, 31, 0x0001);
1290 mdio_write(ioaddr
, 9, 0x273a);
1291 mdio_write(ioaddr
, 14, 0x7bfb);
1292 mdio_write(ioaddr
, 27, 0x841e);
1294 mdio_write(ioaddr
, 31, 0x0002);
1295 mdio_write(ioaddr
, 1, 0x90d0);
1296 mdio_write(ioaddr
, 31, 0x0000);
1300 /* phy config for RTL8169s mac_version C chip */
1301 mdio_write(ioaddr
, 31, 0x0001); //w 31 2 0 1
1302 mdio_write(ioaddr
, 21, 0x1000); //w 21 15 0 1000
1303 mdio_write(ioaddr
, 24, 0x65c7); //w 24 15 0 65c7
1304 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1306 for (i
= 0; i
< ARRAY_SIZE(phy_magic
); i
++, p
++) {
1309 val
= (mdio_read(ioaddr
, pos
) & 0x0fff) | (p
->regs
[0] & 0xffff);
1310 mdio_write(ioaddr
, pos
, val
);
1312 mdio_write(ioaddr
, pos
, p
->regs
[4 - pos
] & 0xffff);
1313 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 1); //w 4 11 11 1
1314 rtl8169_write_gmii_reg_bit(ioaddr
, 4, 11, 0); //w 4 11 11 0
1316 mdio_write(ioaddr
, 31, 0x0000); //w 31 2 0 0
1319 static void rtl8169_phy_timer(unsigned long __opaque
)
1321 struct net_device
*dev
= (struct net_device
*)__opaque
;
1322 struct rtl8169_private
*tp
= netdev_priv(dev
);
1323 struct timer_list
*timer
= &tp
->timer
;
1324 void __iomem
*ioaddr
= tp
->mmio_addr
;
1325 unsigned long timeout
= RTL8169_PHY_TIMEOUT
;
1327 assert(tp
->mac_version
> RTL_GIGA_MAC_VER_01
);
1328 assert(tp
->phy_version
< RTL_GIGA_PHY_VER_H
);
1330 if (!(tp
->phy_1000_ctrl_reg
& ADVERTISE_1000FULL
))
1333 spin_lock_irq(&tp
->lock
);
1335 if (tp
->phy_reset_pending(ioaddr
)) {
1337 * A busy loop could burn quite a few cycles on nowadays CPU.
1338 * Let's delay the execution of the timer for a few ticks.
1344 if (tp
->link_ok(ioaddr
))
1347 if (netif_msg_link(tp
))
1348 printk(KERN_WARNING
"%s: PHY reset until link up\n", dev
->name
);
1350 tp
->phy_reset_enable(ioaddr
);
1353 mod_timer(timer
, jiffies
+ timeout
);
1355 spin_unlock_irq(&tp
->lock
);
1358 static inline void rtl8169_delete_timer(struct net_device
*dev
)
1360 struct rtl8169_private
*tp
= netdev_priv(dev
);
1361 struct timer_list
*timer
= &tp
->timer
;
1363 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1364 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1367 del_timer_sync(timer
);
1370 static inline void rtl8169_request_timer(struct net_device
*dev
)
1372 struct rtl8169_private
*tp
= netdev_priv(dev
);
1373 struct timer_list
*timer
= &tp
->timer
;
1375 if ((tp
->mac_version
<= RTL_GIGA_MAC_VER_01
) ||
1376 (tp
->phy_version
>= RTL_GIGA_PHY_VER_H
))
1380 timer
->expires
= jiffies
+ RTL8169_PHY_TIMEOUT
;
1381 timer
->data
= (unsigned long)(dev
);
1382 timer
->function
= rtl8169_phy_timer
;
1386 #ifdef CONFIG_NET_POLL_CONTROLLER
1388 * Polling 'interrupt' - used by things like netconsole to send skbs
1389 * without having to re-enable interrupts. It's not called while
1390 * the interrupt routine is executing.
1392 static void rtl8169_netpoll(struct net_device
*dev
)
1394 struct rtl8169_private
*tp
= netdev_priv(dev
);
1395 struct pci_dev
*pdev
= tp
->pci_dev
;
1397 disable_irq(pdev
->irq
);
1398 rtl8169_interrupt(pdev
->irq
, dev
);
1399 enable_irq(pdev
->irq
);
1403 static void rtl8169_release_board(struct pci_dev
*pdev
, struct net_device
*dev
,
1404 void __iomem
*ioaddr
)
1407 pci_release_regions(pdev
);
1408 pci_disable_device(pdev
);
1412 static void rtl8169_phy_reset(struct net_device
*dev
,
1413 struct rtl8169_private
*tp
)
1415 void __iomem
*ioaddr
= tp
->mmio_addr
;
1418 tp
->phy_reset_enable(ioaddr
);
1419 for (i
= 0; i
< 100; i
++) {
1420 if (!tp
->phy_reset_pending(ioaddr
))
1424 if (netif_msg_link(tp
))
1425 printk(KERN_ERR
"%s: PHY reset failed.\n", dev
->name
);
1428 static void rtl8169_init_phy(struct net_device
*dev
, struct rtl8169_private
*tp
)
1430 void __iomem
*ioaddr
= tp
->mmio_addr
;
1431 static int board_idx
= -1;
1437 rtl8169_hw_phy_config(dev
);
1439 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1442 if (tp
->mac_version
< RTL_GIGA_MAC_VER_03
) {
1443 dprintk("Set PCI Latency=0x40\n");
1444 pci_write_config_byte(tp
->pci_dev
, PCI_LATENCY_TIMER
, 0x40);
1447 if (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) {
1448 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1450 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1451 mdio_write(ioaddr
, 0x0b, 0x0000); //w 0x0b 15 0 0
1454 rtl8169_link_option(board_idx
, &autoneg
, &speed
, &duplex
);
1456 rtl8169_phy_reset(dev
, tp
);
1458 rtl8169_set_speed(dev
, autoneg
, speed
, duplex
);
1460 if ((RTL_R8(PHYstatus
) & TBI_Enable
) && netif_msg_link(tp
))
1461 printk(KERN_INFO PFX
"%s: TBI auto-negotiating\n", dev
->name
);
1464 static int rtl8169_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1466 struct rtl8169_private
*tp
= netdev_priv(dev
);
1467 struct mii_ioctl_data
*data
= if_mii(ifr
);
1469 if (!netif_running(dev
))
1474 data
->phy_id
= 32; /* Internal PHY */
1478 data
->val_out
= mdio_read(tp
->mmio_addr
, data
->reg_num
& 0x1f);
1482 if (!capable(CAP_NET_ADMIN
))
1484 mdio_write(tp
->mmio_addr
, data
->reg_num
& 0x1f, data
->val_in
);
1490 static int __devinit
1491 rtl8169_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1493 const unsigned int region
= rtl_cfg_info
[ent
->driver_data
].region
;
1494 struct rtl8169_private
*tp
;
1495 struct net_device
*dev
;
1496 void __iomem
*ioaddr
;
1497 unsigned int pm_cap
;
1500 if (netif_msg_drv(&debug
)) {
1501 printk(KERN_INFO
"%s Gigabit Ethernet driver %s loaded\n",
1502 MODULENAME
, RTL8169_VERSION
);
1505 dev
= alloc_etherdev(sizeof (*tp
));
1507 if (netif_msg_drv(&debug
))
1508 dev_err(&pdev
->dev
, "unable to alloc new ethernet\n");
1513 SET_MODULE_OWNER(dev
);
1514 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1515 tp
= netdev_priv(dev
);
1516 tp
->msg_enable
= netif_msg_init(debug
.msg_enable
, R8169_MSG_DEFAULT
);
1518 /* enable device (incl. PCI PM wakeup and hotplug setup) */
1519 rc
= pci_enable_device(pdev
);
1521 if (netif_msg_probe(tp
))
1522 dev_err(&pdev
->dev
, "enable failure\n");
1523 goto err_out_free_dev_1
;
1526 rc
= pci_set_mwi(pdev
);
1528 goto err_out_disable_2
;
1530 /* save power state before pci_enable_device overwrites it */
1531 pm_cap
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
1533 u16 pwr_command
, acpi_idle_state
;
1535 pci_read_config_word(pdev
, pm_cap
+ PCI_PM_CTRL
, &pwr_command
);
1536 acpi_idle_state
= pwr_command
& PCI_PM_CTRL_STATE_MASK
;
1538 if (netif_msg_probe(tp
)) {
1540 "PowerManagement capability not found.\n");
1544 /* make sure PCI base addr 1 is MMIO */
1545 if (!(pci_resource_flags(pdev
, region
) & IORESOURCE_MEM
)) {
1546 if (netif_msg_probe(tp
)) {
1548 "region #%d not an MMIO resource, aborting\n",
1555 /* check for weird/broken PCI region reporting */
1556 if (pci_resource_len(pdev
, region
) < R8169_REGS_SIZE
) {
1557 if (netif_msg_probe(tp
)) {
1559 "Invalid PCI region size(s), aborting\n");
1565 rc
= pci_request_regions(pdev
, MODULENAME
);
1567 if (netif_msg_probe(tp
))
1568 dev_err(&pdev
->dev
, "could not request regions.\n");
1572 tp
->cp_cmd
= PCIMulRW
| RxChkSum
;
1574 if ((sizeof(dma_addr_t
) > 4) &&
1575 !pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) && use_dac
) {
1576 tp
->cp_cmd
|= PCIDAC
;
1577 dev
->features
|= NETIF_F_HIGHDMA
;
1579 rc
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1581 if (netif_msg_probe(tp
)) {
1583 "DMA configuration failed.\n");
1585 goto err_out_free_res_4
;
1589 pci_set_master(pdev
);
1591 /* ioremap MMIO region */
1592 ioaddr
= ioremap(pci_resource_start(pdev
, region
), R8169_REGS_SIZE
);
1594 if (netif_msg_probe(tp
))
1595 dev_err(&pdev
->dev
, "cannot remap MMIO, aborting\n");
1597 goto err_out_free_res_4
;
1600 /* Unneeded ? Don't mess with Mrs. Murphy. */
1601 rtl8169_irq_mask_and_ack(ioaddr
);
1603 /* Soft reset the chip. */
1604 RTL_W8(ChipCmd
, CmdReset
);
1606 /* Check that the chip has finished the reset. */
1607 for (i
= 100; i
> 0; i
--) {
1608 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1610 msleep_interruptible(1);
1613 /* Identify chip attached to board */
1614 rtl8169_get_mac_version(tp
, ioaddr
);
1615 rtl8169_get_phy_version(tp
, ioaddr
);
1617 rtl8169_print_mac_version(tp
);
1618 rtl8169_print_phy_version(tp
);
1620 for (i
= ARRAY_SIZE(rtl_chip_info
) - 1; i
>= 0; i
--) {
1621 if (tp
->mac_version
== rtl_chip_info
[i
].mac_version
)
1625 /* Unknown chip: assume array element #0, original RTL-8169 */
1626 if (netif_msg_probe(tp
)) {
1627 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1628 "unknown chip version, assuming %s\n",
1629 rtl_chip_info
[0].name
);
1635 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1636 RTL_W8(Config1
, RTL_R8(Config1
) | PMEnable
);
1637 RTL_W8(Config5
, RTL_R8(Config5
) & PMEStatus
);
1638 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1640 if (RTL_R8(PHYstatus
) & TBI_Enable
) {
1641 tp
->set_speed
= rtl8169_set_speed_tbi
;
1642 tp
->get_settings
= rtl8169_gset_tbi
;
1643 tp
->phy_reset_enable
= rtl8169_tbi_reset_enable
;
1644 tp
->phy_reset_pending
= rtl8169_tbi_reset_pending
;
1645 tp
->link_ok
= rtl8169_tbi_link_ok
;
1647 tp
->phy_1000_ctrl_reg
= ADVERTISE_1000FULL
; /* Implied by TBI */
1649 tp
->set_speed
= rtl8169_set_speed_xmii
;
1650 tp
->get_settings
= rtl8169_gset_xmii
;
1651 tp
->phy_reset_enable
= rtl8169_xmii_reset_enable
;
1652 tp
->phy_reset_pending
= rtl8169_xmii_reset_pending
;
1653 tp
->link_ok
= rtl8169_xmii_link_ok
;
1655 dev
->do_ioctl
= rtl8169_ioctl
;
1658 /* Get MAC address. FIXME: read EEPROM */
1659 for (i
= 0; i
< MAC_ADDR_LEN
; i
++)
1660 dev
->dev_addr
[i
] = RTL_R8(MAC0
+ i
);
1661 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
1663 dev
->open
= rtl8169_open
;
1664 dev
->hard_start_xmit
= rtl8169_start_xmit
;
1665 dev
->get_stats
= rtl8169_get_stats
;
1666 SET_ETHTOOL_OPS(dev
, &rtl8169_ethtool_ops
);
1667 dev
->stop
= rtl8169_close
;
1668 dev
->tx_timeout
= rtl8169_tx_timeout
;
1669 dev
->set_multicast_list
= rtl8169_set_rx_mode
;
1670 dev
->watchdog_timeo
= RTL8169_TX_TIMEOUT
;
1671 dev
->irq
= pdev
->irq
;
1672 dev
->base_addr
= (unsigned long) ioaddr
;
1673 dev
->change_mtu
= rtl8169_change_mtu
;
1675 #ifdef CONFIG_R8169_NAPI
1676 dev
->poll
= rtl8169_poll
;
1677 dev
->weight
= R8169_NAPI_WEIGHT
;
1680 #ifdef CONFIG_R8169_VLAN
1681 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
1682 dev
->vlan_rx_register
= rtl8169_vlan_rx_register
;
1683 dev
->vlan_rx_kill_vid
= rtl8169_vlan_rx_kill_vid
;
1686 #ifdef CONFIG_NET_POLL_CONTROLLER
1687 dev
->poll_controller
= rtl8169_netpoll
;
1690 tp
->intr_mask
= 0xffff;
1692 tp
->mmio_addr
= ioaddr
;
1693 tp
->align
= rtl_cfg_info
[ent
->driver_data
].align
;
1695 spin_lock_init(&tp
->lock
);
1697 rc
= register_netdev(dev
);
1699 goto err_out_unmap_5
;
1701 pci_set_drvdata(pdev
, dev
);
1703 if (netif_msg_probe(tp
)) {
1704 printk(KERN_INFO
"%s: %s at 0x%lx, "
1705 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1708 rtl_chip_info
[tp
->chipset
].name
,
1710 dev
->dev_addr
[0], dev
->dev_addr
[1],
1711 dev
->dev_addr
[2], dev
->dev_addr
[3],
1712 dev
->dev_addr
[4], dev
->dev_addr
[5], dev
->irq
);
1715 rtl8169_init_phy(dev
, tp
);
1723 pci_release_regions(pdev
);
1725 pci_clear_mwi(pdev
);
1727 pci_disable_device(pdev
);
1733 static void __devexit
1734 rtl8169_remove_one(struct pci_dev
*pdev
)
1736 struct net_device
*dev
= pci_get_drvdata(pdev
);
1737 struct rtl8169_private
*tp
= netdev_priv(dev
);
1739 assert(dev
!= NULL
);
1742 unregister_netdev(dev
);
1743 rtl8169_release_board(pdev
, dev
, tp
->mmio_addr
);
1744 pci_set_drvdata(pdev
, NULL
);
1747 static void rtl8169_set_rxbufsize(struct rtl8169_private
*tp
,
1748 struct net_device
*dev
)
1750 unsigned int mtu
= dev
->mtu
;
1752 tp
->rx_buf_sz
= (mtu
> RX_BUF_SIZE
) ? mtu
+ ETH_HLEN
+ 8 : RX_BUF_SIZE
;
1755 static int rtl8169_open(struct net_device
*dev
)
1757 struct rtl8169_private
*tp
= netdev_priv(dev
);
1758 struct pci_dev
*pdev
= tp
->pci_dev
;
1761 rtl8169_set_rxbufsize(tp
, dev
);
1764 request_irq(dev
->irq
, rtl8169_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
1771 * Rx and Tx desscriptors needs 256 bytes alignment.
1772 * pci_alloc_consistent provides more.
1774 tp
->TxDescArray
= pci_alloc_consistent(pdev
, R8169_TX_RING_BYTES
,
1776 if (!tp
->TxDescArray
)
1779 tp
->RxDescArray
= pci_alloc_consistent(pdev
, R8169_RX_RING_BYTES
,
1781 if (!tp
->RxDescArray
)
1784 retval
= rtl8169_init_ring(dev
);
1788 INIT_WORK(&tp
->task
, NULL
, dev
);
1790 rtl8169_hw_start(dev
);
1792 rtl8169_request_timer(dev
);
1794 rtl8169_check_link_status(dev
, tp
, tp
->mmio_addr
);
1799 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
1802 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
1805 free_irq(dev
->irq
, dev
);
1809 static void rtl8169_hw_reset(void __iomem
*ioaddr
)
1811 /* Disable interrupts */
1812 rtl8169_irq_mask_and_ack(ioaddr
);
1814 /* Reset the chipset */
1815 RTL_W8(ChipCmd
, CmdReset
);
1821 static void rtl8169_set_rx_tx_config_registers(struct rtl8169_private
*tp
)
1823 void __iomem
*ioaddr
= tp
->mmio_addr
;
1824 u32 cfg
= rtl8169_rx_config
;
1826 cfg
|= (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
1827 RTL_W32(RxConfig
, cfg
);
1829 /* Set DMA burst size and Interframe Gap Time */
1830 RTL_W32(TxConfig
, (TX_DMA_BURST
<< TxDMAShift
) |
1831 (InterFrameGap
<< TxInterFrameGapShift
));
1834 static void rtl8169_hw_start(struct net_device
*dev
)
1836 struct rtl8169_private
*tp
= netdev_priv(dev
);
1837 void __iomem
*ioaddr
= tp
->mmio_addr
;
1838 struct pci_dev
*pdev
= tp
->pci_dev
;
1842 /* Soft reset the chip. */
1843 RTL_W8(ChipCmd
, CmdReset
);
1845 /* Check that the chip has finished the reset. */
1846 for (i
= 100; i
> 0; i
--) {
1847 if ((RTL_R8(ChipCmd
) & CmdReset
) == 0)
1849 msleep_interruptible(1);
1852 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1853 RTL_W16(CPlusCmd
, RTL_R16(CPlusCmd
) | PCIMulRW
);
1854 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, 0x08);
1857 if (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) {
1858 pci_write_config_word(pdev
, 0x68, 0x00);
1859 pci_write_config_word(pdev
, 0x69, 0x08);
1862 /* Undocumented stuff. */
1863 if (tp
->mac_version
== RTL_GIGA_MAC_VER_05
) {
1864 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1865 if ((RTL_R8(Config2
) & 0x07) & 0x01)
1866 RTL_W32(0x7c, 0x0007ffff);
1868 RTL_W32(0x7c, 0x0007ff00);
1870 pci_read_config_word(pdev
, PCI_COMMAND
, &cmd
);
1872 pci_write_config_word(pdev
, PCI_COMMAND
, cmd
);
1875 RTL_W8(Cfg9346
, Cfg9346_Unlock
);
1876 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1877 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1878 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1879 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1880 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1882 RTL_W8(EarlyTxThres
, EarlyTxThld
);
1884 /* Low hurts. Let's disable the filtering. */
1885 RTL_W16(RxMaxSize
, 16383);
1887 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_01
) ||
1888 (tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1889 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
) ||
1890 (tp
->mac_version
== RTL_GIGA_MAC_VER_04
))
1891 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1892 rtl8169_set_rx_tx_config_registers(tp
);
1894 cmd
= RTL_R16(CPlusCmd
);
1895 RTL_W16(CPlusCmd
, cmd
);
1897 tp
->cp_cmd
|= cmd
| PCIMulRW
;
1899 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_02
) ||
1900 (tp
->mac_version
== RTL_GIGA_MAC_VER_03
)) {
1901 dprintk(KERN_INFO PFX
"Set MAC Reg C+CR Offset 0xE0. "
1902 "Bit-3 and bit-14 MUST be 1\n");
1903 tp
->cp_cmd
|= (1 << 14);
1906 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
1909 * Undocumented corner. Supposedly:
1910 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1912 RTL_W16(IntrMitigate
, 0x0000);
1915 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1916 * register to be written before TxDescAddrLow to work.
1917 * Switching from MMIO to I/O access fixes the issue as well.
1919 RTL_W32(TxDescStartAddrHigh
, ((u64
) tp
->TxPhyAddr
>> 32));
1920 RTL_W32(TxDescStartAddrLow
, ((u64
) tp
->TxPhyAddr
& DMA_32BIT_MASK
));
1921 RTL_W32(RxDescAddrHigh
, ((u64
) tp
->RxPhyAddr
>> 32));
1922 RTL_W32(RxDescAddrLow
, ((u64
) tp
->RxPhyAddr
& DMA_32BIT_MASK
));
1924 if ((tp
->mac_version
!= RTL_GIGA_MAC_VER_01
) &&
1925 (tp
->mac_version
!= RTL_GIGA_MAC_VER_02
) &&
1926 (tp
->mac_version
!= RTL_GIGA_MAC_VER_03
) &&
1927 (tp
->mac_version
!= RTL_GIGA_MAC_VER_04
)) {
1928 RTL_W8(ChipCmd
, CmdTxEnb
| CmdRxEnb
);
1929 rtl8169_set_rx_tx_config_registers(tp
);
1932 RTL_W8(Cfg9346
, Cfg9346_Lock
);
1934 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1937 RTL_W32(RxMissed
, 0);
1939 rtl8169_set_rx_mode(dev
);
1941 /* no early-rx interrupts */
1942 RTL_W16(MultiIntr
, RTL_R16(MultiIntr
) & 0xF000);
1944 /* Enable all known interrupts by setting the interrupt mask. */
1945 RTL_W16(IntrMask
, rtl8169_intr_mask
);
1947 netif_start_queue(dev
);
1950 static int rtl8169_change_mtu(struct net_device
*dev
, int new_mtu
)
1952 struct rtl8169_private
*tp
= netdev_priv(dev
);
1955 if (new_mtu
< ETH_ZLEN
|| new_mtu
> SafeMtu
)
1960 if (!netif_running(dev
))
1965 rtl8169_set_rxbufsize(tp
, dev
);
1967 ret
= rtl8169_init_ring(dev
);
1971 netif_poll_enable(dev
);
1973 rtl8169_hw_start(dev
);
1975 rtl8169_request_timer(dev
);
1981 static inline void rtl8169_make_unusable_by_asic(struct RxDesc
*desc
)
1983 desc
->addr
= 0x0badbadbadbadbadull
;
1984 desc
->opts1
&= ~cpu_to_le32(DescOwn
| RsvdMask
);
1987 static void rtl8169_free_rx_skb(struct rtl8169_private
*tp
,
1988 struct sk_buff
**sk_buff
, struct RxDesc
*desc
)
1990 struct pci_dev
*pdev
= tp
->pci_dev
;
1992 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
1993 PCI_DMA_FROMDEVICE
);
1994 dev_kfree_skb(*sk_buff
);
1996 rtl8169_make_unusable_by_asic(desc
);
1999 static inline void rtl8169_mark_to_asic(struct RxDesc
*desc
, u32 rx_buf_sz
)
2001 u32 eor
= le32_to_cpu(desc
->opts1
) & RingEnd
;
2003 desc
->opts1
= cpu_to_le32(DescOwn
| eor
| rx_buf_sz
);
2006 static inline void rtl8169_map_to_asic(struct RxDesc
*desc
, dma_addr_t mapping
,
2009 desc
->addr
= cpu_to_le64(mapping
);
2011 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2014 static int rtl8169_alloc_rx_skb(struct pci_dev
*pdev
, struct sk_buff
**sk_buff
,
2015 struct RxDesc
*desc
, int rx_buf_sz
,
2018 struct sk_buff
*skb
;
2022 skb
= dev_alloc_skb(rx_buf_sz
+ align
);
2026 skb_reserve(skb
, align
);
2029 mapping
= pci_map_single(pdev
, skb
->data
, rx_buf_sz
,
2030 PCI_DMA_FROMDEVICE
);
2032 rtl8169_map_to_asic(desc
, mapping
, rx_buf_sz
);
2039 rtl8169_make_unusable_by_asic(desc
);
2043 static void rtl8169_rx_clear(struct rtl8169_private
*tp
)
2047 for (i
= 0; i
< NUM_RX_DESC
; i
++) {
2048 if (tp
->Rx_skbuff
[i
]) {
2049 rtl8169_free_rx_skb(tp
, tp
->Rx_skbuff
+ i
,
2050 tp
->RxDescArray
+ i
);
2055 static u32
rtl8169_rx_fill(struct rtl8169_private
*tp
, struct net_device
*dev
,
2060 for (cur
= start
; end
- cur
> 0; cur
++) {
2061 int ret
, i
= cur
% NUM_RX_DESC
;
2063 if (tp
->Rx_skbuff
[i
])
2066 ret
= rtl8169_alloc_rx_skb(tp
->pci_dev
, tp
->Rx_skbuff
+ i
,
2067 tp
->RxDescArray
+ i
, tp
->rx_buf_sz
, tp
->align
);
2074 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc
*desc
)
2076 desc
->opts1
|= cpu_to_le32(RingEnd
);
2079 static void rtl8169_init_ring_indexes(struct rtl8169_private
*tp
)
2081 tp
->dirty_tx
= tp
->dirty_rx
= tp
->cur_tx
= tp
->cur_rx
= 0;
2084 static int rtl8169_init_ring(struct net_device
*dev
)
2086 struct rtl8169_private
*tp
= netdev_priv(dev
);
2088 rtl8169_init_ring_indexes(tp
);
2090 memset(tp
->tx_skb
, 0x0, NUM_TX_DESC
* sizeof(struct ring_info
));
2091 memset(tp
->Rx_skbuff
, 0x0, NUM_RX_DESC
* sizeof(struct sk_buff
*));
2093 if (rtl8169_rx_fill(tp
, dev
, 0, NUM_RX_DESC
) != NUM_RX_DESC
)
2096 rtl8169_mark_as_last_descriptor(tp
->RxDescArray
+ NUM_RX_DESC
- 1);
2101 rtl8169_rx_clear(tp
);
2105 static void rtl8169_unmap_tx_skb(struct pci_dev
*pdev
, struct ring_info
*tx_skb
,
2106 struct TxDesc
*desc
)
2108 unsigned int len
= tx_skb
->len
;
2110 pci_unmap_single(pdev
, le64_to_cpu(desc
->addr
), len
, PCI_DMA_TODEVICE
);
2117 static void rtl8169_tx_clear(struct rtl8169_private
*tp
)
2121 for (i
= tp
->dirty_tx
; i
< tp
->dirty_tx
+ NUM_TX_DESC
; i
++) {
2122 unsigned int entry
= i
% NUM_TX_DESC
;
2123 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2124 unsigned int len
= tx_skb
->len
;
2127 struct sk_buff
*skb
= tx_skb
->skb
;
2129 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
,
2130 tp
->TxDescArray
+ entry
);
2135 tp
->stats
.tx_dropped
++;
2138 tp
->cur_tx
= tp
->dirty_tx
= 0;
2141 static void rtl8169_schedule_work(struct net_device
*dev
, void (*task
)(void *))
2143 struct rtl8169_private
*tp
= netdev_priv(dev
);
2145 PREPARE_WORK(&tp
->task
, task
, dev
);
2146 schedule_delayed_work(&tp
->task
, 4);
2149 static void rtl8169_wait_for_quiescence(struct net_device
*dev
)
2151 struct rtl8169_private
*tp
= netdev_priv(dev
);
2152 void __iomem
*ioaddr
= tp
->mmio_addr
;
2154 synchronize_irq(dev
->irq
);
2156 /* Wait for any pending NAPI task to complete */
2157 netif_poll_disable(dev
);
2159 rtl8169_irq_mask_and_ack(ioaddr
);
2161 netif_poll_enable(dev
);
2164 static void rtl8169_reinit_task(void *_data
)
2166 struct net_device
*dev
= _data
;
2169 if (netif_running(dev
)) {
2170 rtl8169_wait_for_quiescence(dev
);
2174 ret
= rtl8169_open(dev
);
2175 if (unlikely(ret
< 0)) {
2176 if (net_ratelimit()) {
2177 struct rtl8169_private
*tp
= netdev_priv(dev
);
2179 if (netif_msg_drv(tp
)) {
2181 "%s: reinit failure (status = %d)."
2182 " Rescheduling.\n", dev
->name
, ret
);
2185 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2189 static void rtl8169_reset_task(void *_data
)
2191 struct net_device
*dev
= _data
;
2192 struct rtl8169_private
*tp
= netdev_priv(dev
);
2194 if (!netif_running(dev
))
2197 rtl8169_wait_for_quiescence(dev
);
2199 rtl8169_rx_interrupt(dev
, tp
, tp
->mmio_addr
);
2200 rtl8169_tx_clear(tp
);
2202 if (tp
->dirty_rx
== tp
->cur_rx
) {
2203 rtl8169_init_ring_indexes(tp
);
2204 rtl8169_hw_start(dev
);
2205 netif_wake_queue(dev
);
2207 if (net_ratelimit()) {
2208 struct rtl8169_private
*tp
= netdev_priv(dev
);
2210 if (netif_msg_intr(tp
)) {
2211 printk(PFX KERN_EMERG
2212 "%s: Rx buffers shortage\n", dev
->name
);
2215 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2219 static void rtl8169_tx_timeout(struct net_device
*dev
)
2221 struct rtl8169_private
*tp
= netdev_priv(dev
);
2223 rtl8169_hw_reset(tp
->mmio_addr
);
2225 /* Let's wait a bit while any (async) irq lands on */
2226 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2229 static int rtl8169_xmit_frags(struct rtl8169_private
*tp
, struct sk_buff
*skb
,
2232 struct skb_shared_info
*info
= skb_shinfo(skb
);
2233 unsigned int cur_frag
, entry
;
2237 for (cur_frag
= 0; cur_frag
< info
->nr_frags
; cur_frag
++) {
2238 skb_frag_t
*frag
= info
->frags
+ cur_frag
;
2243 entry
= (entry
+ 1) % NUM_TX_DESC
;
2245 txd
= tp
->TxDescArray
+ entry
;
2247 addr
= ((void *) page_address(frag
->page
)) + frag
->page_offset
;
2248 mapping
= pci_map_single(tp
->pci_dev
, addr
, len
, PCI_DMA_TODEVICE
);
2250 /* anti gcc 2.95.3 bugware (sic) */
2251 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2253 txd
->opts1
= cpu_to_le32(status
);
2254 txd
->addr
= cpu_to_le64(mapping
);
2256 tp
->tx_skb
[entry
].len
= len
;
2260 tp
->tx_skb
[entry
].skb
= skb
;
2261 txd
->opts1
|= cpu_to_le32(LastFrag
);
2267 static inline u32
rtl8169_tso_csum(struct sk_buff
*skb
, struct net_device
*dev
)
2269 if (dev
->features
& NETIF_F_TSO
) {
2270 u32 mss
= skb_shinfo(skb
)->gso_size
;
2273 return LargeSend
| ((mss
& MSSMask
) << MSSShift
);
2275 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
2276 const struct iphdr
*ip
= skb
->nh
.iph
;
2278 if (ip
->protocol
== IPPROTO_TCP
)
2279 return IPCS
| TCPCS
;
2280 else if (ip
->protocol
== IPPROTO_UDP
)
2281 return IPCS
| UDPCS
;
2282 WARN_ON(1); /* we need a WARN() */
2287 static int rtl8169_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
2289 struct rtl8169_private
*tp
= netdev_priv(dev
);
2290 unsigned int frags
, entry
= tp
->cur_tx
% NUM_TX_DESC
;
2291 struct TxDesc
*txd
= tp
->TxDescArray
+ entry
;
2292 void __iomem
*ioaddr
= tp
->mmio_addr
;
2296 int ret
= NETDEV_TX_OK
;
2298 if (unlikely(TX_BUFFS_AVAIL(tp
) < skb_shinfo(skb
)->nr_frags
)) {
2299 if (netif_msg_drv(tp
)) {
2301 "%s: BUG! Tx Ring full when queue awake!\n",
2307 if (unlikely(le32_to_cpu(txd
->opts1
) & DescOwn
))
2310 opts1
= DescOwn
| rtl8169_tso_csum(skb
, dev
);
2312 frags
= rtl8169_xmit_frags(tp
, skb
, opts1
);
2314 len
= skb_headlen(skb
);
2319 if (unlikely(len
< ETH_ZLEN
)) {
2320 if (skb_padto(skb
, ETH_ZLEN
))
2321 goto err_update_stats
;
2325 opts1
|= FirstFrag
| LastFrag
;
2326 tp
->tx_skb
[entry
].skb
= skb
;
2329 mapping
= pci_map_single(tp
->pci_dev
, skb
->data
, len
, PCI_DMA_TODEVICE
);
2331 tp
->tx_skb
[entry
].len
= len
;
2332 txd
->addr
= cpu_to_le64(mapping
);
2333 txd
->opts2
= cpu_to_le32(rtl8169_tx_vlan_tag(tp
, skb
));
2337 /* anti gcc 2.95.3 bugware (sic) */
2338 status
= opts1
| len
| (RingEnd
* !((entry
+ 1) % NUM_TX_DESC
));
2339 txd
->opts1
= cpu_to_le32(status
);
2341 dev
->trans_start
= jiffies
;
2343 tp
->cur_tx
+= frags
+ 1;
2347 RTL_W8(TxPoll
, 0x40); /* set polling bit */
2349 if (TX_BUFFS_AVAIL(tp
) < MAX_SKB_FRAGS
) {
2350 netif_stop_queue(dev
);
2352 if (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)
2353 netif_wake_queue(dev
);
2360 netif_stop_queue(dev
);
2361 ret
= NETDEV_TX_BUSY
;
2363 tp
->stats
.tx_dropped
++;
2367 static void rtl8169_pcierr_interrupt(struct net_device
*dev
)
2369 struct rtl8169_private
*tp
= netdev_priv(dev
);
2370 struct pci_dev
*pdev
= tp
->pci_dev
;
2371 void __iomem
*ioaddr
= tp
->mmio_addr
;
2372 u16 pci_status
, pci_cmd
;
2374 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_cmd
);
2375 pci_read_config_word(pdev
, PCI_STATUS
, &pci_status
);
2377 if (netif_msg_intr(tp
)) {
2379 "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2380 dev
->name
, pci_cmd
, pci_status
);
2384 * The recovery sequence below admits a very elaborated explanation:
2385 * - it seems to work;
2386 * - I did not see what else could be done;
2387 * - it makes iop3xx happy.
2389 * Feel free to adjust to your needs.
2391 if (ignore_parity_err
)
2392 pci_cmd
&= ~PCI_COMMAND_PARITY
;
2394 pci_cmd
|= PCI_COMMAND_SERR
| PCI_COMMAND_PARITY
;
2396 pci_write_config_word(pdev
, PCI_COMMAND
, pci_cmd
);
2398 pci_write_config_word(pdev
, PCI_STATUS
,
2399 pci_status
& (PCI_STATUS_DETECTED_PARITY
|
2400 PCI_STATUS_SIG_SYSTEM_ERROR
| PCI_STATUS_REC_MASTER_ABORT
|
2401 PCI_STATUS_REC_TARGET_ABORT
| PCI_STATUS_SIG_TARGET_ABORT
));
2403 /* The infamous DAC f*ckup only happens at boot time */
2404 if ((tp
->cp_cmd
& PCIDAC
) && !tp
->dirty_rx
&& !tp
->cur_rx
) {
2405 if (netif_msg_intr(tp
))
2406 printk(KERN_INFO
"%s: disabling PCI DAC.\n", dev
->name
);
2407 tp
->cp_cmd
&= ~PCIDAC
;
2408 RTL_W16(CPlusCmd
, tp
->cp_cmd
);
2409 dev
->features
&= ~NETIF_F_HIGHDMA
;
2412 rtl8169_hw_reset(ioaddr
);
2414 rtl8169_schedule_work(dev
, rtl8169_reinit_task
);
2418 rtl8169_tx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2419 void __iomem
*ioaddr
)
2421 unsigned int dirty_tx
, tx_left
;
2423 assert(dev
!= NULL
);
2425 assert(ioaddr
!= NULL
);
2427 dirty_tx
= tp
->dirty_tx
;
2429 tx_left
= tp
->cur_tx
- dirty_tx
;
2431 while (tx_left
> 0) {
2432 unsigned int entry
= dirty_tx
% NUM_TX_DESC
;
2433 struct ring_info
*tx_skb
= tp
->tx_skb
+ entry
;
2434 u32 len
= tx_skb
->len
;
2438 status
= le32_to_cpu(tp
->TxDescArray
[entry
].opts1
);
2439 if (status
& DescOwn
)
2442 tp
->stats
.tx_bytes
+= len
;
2443 tp
->stats
.tx_packets
++;
2445 rtl8169_unmap_tx_skb(tp
->pci_dev
, tx_skb
, tp
->TxDescArray
+ entry
);
2447 if (status
& LastFrag
) {
2448 dev_kfree_skb_irq(tx_skb
->skb
);
2455 if (tp
->dirty_tx
!= dirty_tx
) {
2456 tp
->dirty_tx
= dirty_tx
;
2458 if (netif_queue_stopped(dev
) &&
2459 (TX_BUFFS_AVAIL(tp
) >= MAX_SKB_FRAGS
)) {
2460 netif_wake_queue(dev
);
2465 static inline int rtl8169_fragmented_frame(u32 status
)
2467 return (status
& (FirstFrag
| LastFrag
)) != (FirstFrag
| LastFrag
);
2470 static inline void rtl8169_rx_csum(struct sk_buff
*skb
, struct RxDesc
*desc
)
2472 u32 opts1
= le32_to_cpu(desc
->opts1
);
2473 u32 status
= opts1
& RxProtoMask
;
2475 if (((status
== RxProtoTCP
) && !(opts1
& TCPFail
)) ||
2476 ((status
== RxProtoUDP
) && !(opts1
& UDPFail
)) ||
2477 ((status
== RxProtoIP
) && !(opts1
& IPFail
)))
2478 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2480 skb
->ip_summed
= CHECKSUM_NONE
;
2483 static inline int rtl8169_try_rx_copy(struct sk_buff
**sk_buff
, int pkt_size
,
2484 struct RxDesc
*desc
, int rx_buf_sz
,
2489 if (pkt_size
< rx_copybreak
) {
2490 struct sk_buff
*skb
;
2492 skb
= dev_alloc_skb(pkt_size
+ align
);
2494 skb_reserve(skb
, align
);
2495 eth_copy_and_sum(skb
, sk_buff
[0]->data
, pkt_size
, 0);
2497 rtl8169_mark_to_asic(desc
, rx_buf_sz
);
2505 rtl8169_rx_interrupt(struct net_device
*dev
, struct rtl8169_private
*tp
,
2506 void __iomem
*ioaddr
)
2508 unsigned int cur_rx
, rx_left
;
2509 unsigned int delta
, count
;
2511 assert(dev
!= NULL
);
2513 assert(ioaddr
!= NULL
);
2515 cur_rx
= tp
->cur_rx
;
2516 rx_left
= NUM_RX_DESC
+ tp
->dirty_rx
- cur_rx
;
2517 rx_left
= rtl8169_rx_quota(rx_left
, (u32
) dev
->quota
);
2519 for (; rx_left
> 0; rx_left
--, cur_rx
++) {
2520 unsigned int entry
= cur_rx
% NUM_RX_DESC
;
2521 struct RxDesc
*desc
= tp
->RxDescArray
+ entry
;
2525 status
= le32_to_cpu(desc
->opts1
);
2527 if (status
& DescOwn
)
2529 if (unlikely(status
& RxRES
)) {
2530 if (netif_msg_rx_err(tp
)) {
2532 "%s: Rx ERROR. status = %08x\n",
2535 tp
->stats
.rx_errors
++;
2536 if (status
& (RxRWT
| RxRUNT
))
2537 tp
->stats
.rx_length_errors
++;
2539 tp
->stats
.rx_crc_errors
++;
2540 if (status
& RxFOVF
) {
2541 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2542 tp
->stats
.rx_fifo_errors
++;
2544 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2546 struct sk_buff
*skb
= tp
->Rx_skbuff
[entry
];
2547 int pkt_size
= (status
& 0x00001FFF) - 4;
2548 void (*pci_action
)(struct pci_dev
*, dma_addr_t
,
2549 size_t, int) = pci_dma_sync_single_for_device
;
2552 * The driver does not support incoming fragmented
2553 * frames. They are seen as a symptom of over-mtu
2556 if (unlikely(rtl8169_fragmented_frame(status
))) {
2557 tp
->stats
.rx_dropped
++;
2558 tp
->stats
.rx_length_errors
++;
2559 rtl8169_mark_to_asic(desc
, tp
->rx_buf_sz
);
2563 rtl8169_rx_csum(skb
, desc
);
2565 pci_dma_sync_single_for_cpu(tp
->pci_dev
,
2566 le64_to_cpu(desc
->addr
), tp
->rx_buf_sz
,
2567 PCI_DMA_FROMDEVICE
);
2569 if (rtl8169_try_rx_copy(&skb
, pkt_size
, desc
,
2570 tp
->rx_buf_sz
, tp
->align
)) {
2571 pci_action
= pci_unmap_single
;
2572 tp
->Rx_skbuff
[entry
] = NULL
;
2575 pci_action(tp
->pci_dev
, le64_to_cpu(desc
->addr
),
2576 tp
->rx_buf_sz
, PCI_DMA_FROMDEVICE
);
2579 skb_put(skb
, pkt_size
);
2580 skb
->protocol
= eth_type_trans(skb
, dev
);
2582 if (rtl8169_rx_vlan_skb(tp
, desc
, skb
) < 0)
2583 rtl8169_rx_skb(skb
);
2585 dev
->last_rx
= jiffies
;
2586 tp
->stats
.rx_bytes
+= pkt_size
;
2587 tp
->stats
.rx_packets
++;
2591 count
= cur_rx
- tp
->cur_rx
;
2592 tp
->cur_rx
= cur_rx
;
2594 delta
= rtl8169_rx_fill(tp
, dev
, tp
->dirty_rx
, tp
->cur_rx
);
2595 if (!delta
&& count
&& netif_msg_intr(tp
))
2596 printk(KERN_INFO
"%s: no Rx buffer allocated\n", dev
->name
);
2597 tp
->dirty_rx
+= delta
;
2600 * FIXME: until there is periodic timer to try and refill the ring,
2601 * a temporary shortage may definitely kill the Rx process.
2602 * - disable the asic to try and avoid an overflow and kick it again
2604 * - how do others driver handle this condition (Uh oh...).
2606 if ((tp
->dirty_rx
+ NUM_RX_DESC
== tp
->cur_rx
) && netif_msg_intr(tp
))
2607 printk(KERN_EMERG
"%s: Rx buffers exhausted\n", dev
->name
);
2612 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2614 rtl8169_interrupt(int irq
, void *dev_instance
)
2616 struct net_device
*dev
= (struct net_device
*) dev_instance
;
2617 struct rtl8169_private
*tp
= netdev_priv(dev
);
2618 int boguscnt
= max_interrupt_work
;
2619 void __iomem
*ioaddr
= tp
->mmio_addr
;
2624 status
= RTL_R16(IntrStatus
);
2626 /* hotplug/major error/no more work/shared irq */
2627 if ((status
== 0xFFFF) || !status
)
2632 if (unlikely(!netif_running(dev
))) {
2633 rtl8169_asic_down(ioaddr
);
2637 status
&= tp
->intr_mask
;
2639 (status
& RxFIFOOver
) ? (status
| RxOverflow
) : status
);
2641 if (!(status
& rtl8169_intr_mask
))
2644 if (unlikely(status
& SYSErr
)) {
2645 rtl8169_pcierr_interrupt(dev
);
2649 if (status
& LinkChg
)
2650 rtl8169_check_link_status(dev
, tp
, ioaddr
);
2652 #ifdef CONFIG_R8169_NAPI
2653 RTL_W16(IntrMask
, rtl8169_intr_mask
& ~rtl8169_napi_event
);
2654 tp
->intr_mask
= ~rtl8169_napi_event
;
2656 if (likely(netif_rx_schedule_prep(dev
)))
2657 __netif_rx_schedule(dev
);
2658 else if (netif_msg_intr(tp
)) {
2659 printk(KERN_INFO
"%s: interrupt %04x taken in poll\n",
2665 if (status
& (RxOK
| RxOverflow
| RxFIFOOver
)) {
2666 rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2669 if (status
& (TxOK
| TxErr
))
2670 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2674 } while (boguscnt
> 0);
2676 if (boguscnt
<= 0) {
2677 if (netif_msg_intr(tp
) && net_ratelimit() ) {
2679 "%s: Too much work at interrupt!\n", dev
->name
);
2681 /* Clear all interrupt sources. */
2682 RTL_W16(IntrStatus
, 0xffff);
2685 return IRQ_RETVAL(handled
);
2688 #ifdef CONFIG_R8169_NAPI
2689 static int rtl8169_poll(struct net_device
*dev
, int *budget
)
2691 unsigned int work_done
, work_to_do
= min(*budget
, dev
->quota
);
2692 struct rtl8169_private
*tp
= netdev_priv(dev
);
2693 void __iomem
*ioaddr
= tp
->mmio_addr
;
2695 work_done
= rtl8169_rx_interrupt(dev
, tp
, ioaddr
);
2696 rtl8169_tx_interrupt(dev
, tp
, ioaddr
);
2698 *budget
-= work_done
;
2699 dev
->quota
-= work_done
;
2701 if (work_done
< work_to_do
) {
2702 netif_rx_complete(dev
);
2703 tp
->intr_mask
= 0xffff;
2705 * 20040426: the barrier is not strictly required but the
2706 * behavior of the irq handler could be less predictable
2707 * without it. Btw, the lack of flush for the posted pci
2708 * write is safe - FR
2711 RTL_W16(IntrMask
, rtl8169_intr_mask
);
2714 return (work_done
>= work_to_do
);
2718 static void rtl8169_down(struct net_device
*dev
)
2720 struct rtl8169_private
*tp
= netdev_priv(dev
);
2721 void __iomem
*ioaddr
= tp
->mmio_addr
;
2722 unsigned int poll_locked
= 0;
2723 unsigned int intrmask
;
2725 rtl8169_delete_timer(dev
);
2727 netif_stop_queue(dev
);
2729 flush_scheduled_work();
2732 spin_lock_irq(&tp
->lock
);
2734 rtl8169_asic_down(ioaddr
);
2736 /* Update the error counts. */
2737 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2738 RTL_W32(RxMissed
, 0);
2740 spin_unlock_irq(&tp
->lock
);
2742 synchronize_irq(dev
->irq
);
2745 netif_poll_disable(dev
);
2749 /* Give a racing hard_start_xmit a few cycles to complete. */
2750 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2753 * And now for the 50k$ question: are IRQ disabled or not ?
2755 * Two paths lead here:
2757 * -> netif_running() is available to sync the current code and the
2758 * IRQ handler. See rtl8169_interrupt for details.
2759 * 2) dev->change_mtu
2760 * -> rtl8169_poll can not be issued again and re-enable the
2761 * interruptions. Let's simply issue the IRQ down sequence again.
2763 * No loop if hotpluged or major error (0xffff).
2765 intrmask
= RTL_R16(IntrMask
);
2766 if (intrmask
&& (intrmask
!= 0xffff))
2769 rtl8169_tx_clear(tp
);
2771 rtl8169_rx_clear(tp
);
2774 static int rtl8169_close(struct net_device
*dev
)
2776 struct rtl8169_private
*tp
= netdev_priv(dev
);
2777 struct pci_dev
*pdev
= tp
->pci_dev
;
2781 free_irq(dev
->irq
, dev
);
2783 netif_poll_enable(dev
);
2785 pci_free_consistent(pdev
, R8169_RX_RING_BYTES
, tp
->RxDescArray
,
2787 pci_free_consistent(pdev
, R8169_TX_RING_BYTES
, tp
->TxDescArray
,
2789 tp
->TxDescArray
= NULL
;
2790 tp
->RxDescArray
= NULL
;
2796 rtl8169_set_rx_mode(struct net_device
*dev
)
2798 struct rtl8169_private
*tp
= netdev_priv(dev
);
2799 void __iomem
*ioaddr
= tp
->mmio_addr
;
2800 unsigned long flags
;
2801 u32 mc_filter
[2]; /* Multicast hash filter */
2805 if (dev
->flags
& IFF_PROMISC
) {
2806 /* Unconditionally log net taps. */
2807 if (netif_msg_link(tp
)) {
2808 printk(KERN_NOTICE
"%s: Promiscuous mode enabled.\n",
2812 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2814 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2815 } else if ((dev
->mc_count
> multicast_filter_limit
)
2816 || (dev
->flags
& IFF_ALLMULTI
)) {
2817 /* Too many to filter perfectly -- accept all multicasts. */
2818 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2819 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2821 struct dev_mc_list
*mclist
;
2822 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2823 mc_filter
[1] = mc_filter
[0] = 0;
2824 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
2825 i
++, mclist
= mclist
->next
) {
2826 int bit_nr
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
2827 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2828 rx_mode
|= AcceptMulticast
;
2832 spin_lock_irqsave(&tp
->lock
, flags
);
2834 tmp
= rtl8169_rx_config
| rx_mode
|
2835 (RTL_R32(RxConfig
) & rtl_chip_info
[tp
->chipset
].RxConfigMask
);
2837 if ((tp
->mac_version
== RTL_GIGA_MAC_VER_11
) ||
2838 (tp
->mac_version
== RTL_GIGA_MAC_VER_12
) ||
2839 (tp
->mac_version
== RTL_GIGA_MAC_VER_13
) ||
2840 (tp
->mac_version
== RTL_GIGA_MAC_VER_14
) ||
2841 (tp
->mac_version
== RTL_GIGA_MAC_VER_15
)) {
2842 mc_filter
[0] = 0xffffffff;
2843 mc_filter
[1] = 0xffffffff;
2846 RTL_W32(RxConfig
, tmp
);
2847 RTL_W32(MAR0
+ 0, mc_filter
[0]);
2848 RTL_W32(MAR0
+ 4, mc_filter
[1]);
2850 spin_unlock_irqrestore(&tp
->lock
, flags
);
2854 * rtl8169_get_stats - Get rtl8169 read/write statistics
2855 * @dev: The Ethernet Device to get statistics for
2857 * Get TX/RX statistics for rtl8169
2859 static struct net_device_stats
*rtl8169_get_stats(struct net_device
*dev
)
2861 struct rtl8169_private
*tp
= netdev_priv(dev
);
2862 void __iomem
*ioaddr
= tp
->mmio_addr
;
2863 unsigned long flags
;
2865 if (netif_running(dev
)) {
2866 spin_lock_irqsave(&tp
->lock
, flags
);
2867 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2868 RTL_W32(RxMissed
, 0);
2869 spin_unlock_irqrestore(&tp
->lock
, flags
);
2877 static int rtl8169_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2879 struct net_device
*dev
= pci_get_drvdata(pdev
);
2880 struct rtl8169_private
*tp
= netdev_priv(dev
);
2881 void __iomem
*ioaddr
= tp
->mmio_addr
;
2883 if (!netif_running(dev
))
2886 netif_device_detach(dev
);
2887 netif_stop_queue(dev
);
2889 spin_lock_irq(&tp
->lock
);
2891 rtl8169_asic_down(ioaddr
);
2893 tp
->stats
.rx_missed_errors
+= RTL_R32(RxMissed
);
2894 RTL_W32(RxMissed
, 0);
2896 spin_unlock_irq(&tp
->lock
);
2898 pci_save_state(pdev
);
2899 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), tp
->wol_enabled
);
2900 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2905 static int rtl8169_resume(struct pci_dev
*pdev
)
2907 struct net_device
*dev
= pci_get_drvdata(pdev
);
2909 if (!netif_running(dev
))
2912 netif_device_attach(dev
);
2914 pci_set_power_state(pdev
, PCI_D0
);
2915 pci_restore_state(pdev
);
2916 pci_enable_wake(pdev
, PCI_D0
, 0);
2918 rtl8169_schedule_work(dev
, rtl8169_reset_task
);
2923 #endif /* CONFIG_PM */
2925 static struct pci_driver rtl8169_pci_driver
= {
2927 .id_table
= rtl8169_pci_tbl
,
2928 .probe
= rtl8169_init_one
,
2929 .remove
= __devexit_p(rtl8169_remove_one
),
2931 .suspend
= rtl8169_suspend
,
2932 .resume
= rtl8169_resume
,
2937 rtl8169_init_module(void)
2939 return pci_register_driver(&rtl8169_pci_driver
);
2943 rtl8169_cleanup_module(void)
2945 pci_unregister_driver(&rtl8169_pci_driver
);
2948 module_init(rtl8169_init_module
);
2949 module_exit(rtl8169_cleanup_module
);