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Merge master.kernel.org:/home/rmk/linux-2.6-serial
[deliverable/linux.git] / drivers / net / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/string.h>
56 #include <linux/timer.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/pci.h>
62 #include <linux/netdevice.h>
63 #include <linux/init.h>
64 #include <linux/mii.h>
65 #include <linux/etherdevice.h>
66 #include <linux/skbuff.h>
67 #include <linux/delay.h>
68 #include <linux/ethtool.h>
69 #include <linux/crc32.h>
70 #include <linux/bitops.h>
71 #include <linux/dma-mapping.h>
72
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/io.h>
75 #include <asm/irq.h>
76 #include <asm/uaccess.h> /* User space memory access functions */
77
78 #include "sis900.h"
79
80 #define SIS900_MODULE_NAME "sis900"
81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
82
83 static char version[] __devinitdata =
84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86 static int max_interrupt_work = 40;
87 static int multicast_filter_limit = 128;
88
89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91 #define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97 /* Time in jiffies before concluding the transmitter is hung. */
98 #define TX_TIMEOUT (4*HZ)
99
100 enum {
101 SIS_900 = 0,
102 SIS_7016
103 };
104 static const char * card_names[] = {
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107 };
108 static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114 };
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
119 static const struct mii_chip_info {
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124 #define HOME 0x0001
125 #define LAN 0x0002
126 #define MIX 0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
137 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
138 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
139 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
140 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
141 {NULL,},
142 };
143
144 struct mii_phy {
145 struct mii_phy * next;
146 int phy_addr;
147 u16 phy_id0;
148 u16 phy_id1;
149 u16 status;
150 u8 phy_types;
151 };
152
153 typedef struct _BufferDesc {
154 u32 link;
155 u32 cmdsts;
156 u32 bufptr;
157 } BufferDesc;
158
159 struct sis900_private {
160 struct net_device_stats stats;
161 struct pci_dev * pci_dev;
162
163 spinlock_t lock;
164
165 struct mii_phy * mii;
166 struct mii_phy * first_mii; /* record the first mii structure */
167 unsigned int cur_phy;
168 struct mii_if_info mii_info;
169
170 struct timer_list timer; /* Link status detection timer. */
171 u8 autong_complete; /* 1: auto-negotiate complete */
172
173 u32 msg_enable;
174
175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
176 unsigned int cur_tx, dirty_tx;
177
178 /* The saved address of a sent/receive-in-place packet buffer */
179 struct sk_buff *tx_skbuff[NUM_TX_DESC];
180 struct sk_buff *rx_skbuff[NUM_RX_DESC];
181 BufferDesc *tx_ring;
182 BufferDesc *rx_ring;
183
184 dma_addr_t tx_ring_dma;
185 dma_addr_t rx_ring_dma;
186
187 unsigned int tx_full; /* The Tx queue is full. */
188 u8 host_bridge_rev;
189 u8 chipset_rev;
190 };
191
192 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
193 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
194 MODULE_LICENSE("GPL");
195
196 module_param(multicast_filter_limit, int, 0444);
197 module_param(max_interrupt_work, int, 0444);
198 module_param(sis900_debug, int, 0444);
199 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
200 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
201 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
202
203 #ifdef CONFIG_NET_POLL_CONTROLLER
204 static void sis900_poll(struct net_device *dev);
205 #endif
206 static int sis900_open(struct net_device *net_dev);
207 static int sis900_mii_probe (struct net_device * net_dev);
208 static void sis900_init_rxfilter (struct net_device * net_dev);
209 static u16 read_eeprom(long ioaddr, int location);
210 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
211 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
212 static void sis900_timer(unsigned long data);
213 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
214 static void sis900_tx_timeout(struct net_device *net_dev);
215 static void sis900_init_tx_ring(struct net_device *net_dev);
216 static void sis900_init_rx_ring(struct net_device *net_dev);
217 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
218 static int sis900_rx(struct net_device *net_dev);
219 static void sis900_finish_xmit (struct net_device *net_dev);
220 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
221 static int sis900_close(struct net_device *net_dev);
222 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
223 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
224 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
225 static void set_rx_mode(struct net_device *net_dev);
226 static void sis900_reset(struct net_device *net_dev);
227 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
228 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
229 static u16 sis900_default_phy(struct net_device * net_dev);
230 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
231 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
232 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
233 static void sis900_set_mode (long ioaddr, int speed, int duplex);
234 static struct ethtool_ops sis900_ethtool_ops;
235
236 /**
237 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
238 * @pci_dev: the sis900 pci device
239 * @net_dev: the net device to get address for
240 *
241 * Older SiS900 and friends, use EEPROM to store MAC address.
242 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
243 */
244
245 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
246 {
247 long ioaddr = pci_resource_start(pci_dev, 0);
248 u16 signature;
249 int i;
250
251 /* check to see if we have sane EEPROM */
252 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
253 if (signature == 0xffff || signature == 0x0000) {
254 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
255 pci_name(pci_dev), signature);
256 return 0;
257 }
258
259 /* get MAC address from EEPROM */
260 for (i = 0; i < 3; i++)
261 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
262
263 return 1;
264 }
265
266 /**
267 * sis630e_get_mac_addr - Get MAC address for SiS630E model
268 * @pci_dev: the sis900 pci device
269 * @net_dev: the net device to get address for
270 *
271 * SiS630E model, use APC CMOS RAM to store MAC address.
272 * APC CMOS RAM is accessed through ISA bridge.
273 * MAC address is read into @net_dev->dev_addr.
274 */
275
276 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
277 struct net_device *net_dev)
278 {
279 struct pci_dev *isa_bridge = NULL;
280 u8 reg;
281 int i;
282
283 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
284 if (!isa_bridge)
285 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
286 if (!isa_bridge) {
287 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
288 pci_name(pci_dev));
289 return 0;
290 }
291 pci_read_config_byte(isa_bridge, 0x48, &reg);
292 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
293
294 for (i = 0; i < 6; i++) {
295 outb(0x09 + i, 0x70);
296 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
297 }
298 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
299 pci_dev_put(isa_bridge);
300
301 return 1;
302 }
303
304
305 /**
306 * sis635_get_mac_addr - Get MAC address for SIS635 model
307 * @pci_dev: the sis900 pci device
308 * @net_dev: the net device to get address for
309 *
310 * SiS635 model, set MAC Reload Bit to load Mac address from APC
311 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
312 * @net_dev->dev_addr.
313 */
314
315 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
316 struct net_device *net_dev)
317 {
318 long ioaddr = net_dev->base_addr;
319 u32 rfcrSave;
320 u32 i;
321
322 rfcrSave = inl(rfcr + ioaddr);
323
324 outl(rfcrSave | RELOAD, ioaddr + cr);
325 outl(0, ioaddr + cr);
326
327 /* disable packet filtering before setting filter */
328 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
329
330 /* load MAC addr to filter data register */
331 for (i = 0 ; i < 3 ; i++) {
332 outl((i << RFADDR_shift), ioaddr + rfcr);
333 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
334 }
335
336 /* enable packet filtering */
337 outl(rfcrSave | RFEN, rfcr + ioaddr);
338
339 return 1;
340 }
341
342 /**
343 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
344 * @pci_dev: the sis900 pci device
345 * @net_dev: the net device to get address for
346 *
347 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
348 * is shared by
349 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
350 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
351 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
352 * EEDONE signal to refuse EEPROM access by LAN.
353 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
354 * The signature field in SiS962 or SiS963 spec is meaningless.
355 * MAC address is read into @net_dev->dev_addr.
356 */
357
358 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
359 struct net_device *net_dev)
360 {
361 long ioaddr = net_dev->base_addr;
362 long ee_addr = ioaddr + mear;
363 u32 waittime = 0;
364 int i;
365
366 outl(EEREQ, ee_addr);
367 while(waittime < 2000) {
368 if(inl(ee_addr) & EEGNT) {
369
370 /* get MAC address from EEPROM */
371 for (i = 0; i < 3; i++)
372 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
373
374 outl(EEDONE, ee_addr);
375 return 1;
376 } else {
377 udelay(1);
378 waittime ++;
379 }
380 }
381 outl(EEDONE, ee_addr);
382 return 0;
383 }
384
385 /**
386 * sis900_probe - Probe for sis900 device
387 * @pci_dev: the sis900 pci device
388 * @pci_id: the pci device ID
389 *
390 * Check and probe sis900 net device for @pci_dev.
391 * Get mac address according to the chip revision,
392 * and assign SiS900-specific entries in the device structure.
393 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
394 */
395
396 static int __devinit sis900_probe(struct pci_dev *pci_dev,
397 const struct pci_device_id *pci_id)
398 {
399 struct sis900_private *sis_priv;
400 struct net_device *net_dev;
401 struct pci_dev *dev;
402 dma_addr_t ring_dma;
403 void *ring_space;
404 long ioaddr;
405 int i, ret;
406 const char *card_name = card_names[pci_id->driver_data];
407 const char *dev_name = pci_name(pci_dev);
408
409 /* when built into the kernel, we only print version if device is found */
410 #ifndef MODULE
411 static int printed_version;
412 if (!printed_version++)
413 printk(version);
414 #endif
415
416 /* setup various bits in PCI command register */
417 ret = pci_enable_device(pci_dev);
418 if(ret) return ret;
419
420 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
421 if(i){
422 printk(KERN_ERR "sis900.c: architecture does not support"
423 "32bit PCI busmaster DMA\n");
424 return i;
425 }
426
427 pci_set_master(pci_dev);
428
429 net_dev = alloc_etherdev(sizeof(struct sis900_private));
430 if (!net_dev)
431 return -ENOMEM;
432 SET_MODULE_OWNER(net_dev);
433 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
434
435 /* We do a request_region() to register /proc/ioports info. */
436 ioaddr = pci_resource_start(pci_dev, 0);
437 ret = pci_request_regions(pci_dev, "sis900");
438 if (ret)
439 goto err_out;
440
441 sis_priv = net_dev->priv;
442 net_dev->base_addr = ioaddr;
443 net_dev->irq = pci_dev->irq;
444 sis_priv->pci_dev = pci_dev;
445 spin_lock_init(&sis_priv->lock);
446
447 pci_set_drvdata(pci_dev, net_dev);
448
449 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
450 if (!ring_space) {
451 ret = -ENOMEM;
452 goto err_out_cleardev;
453 }
454 sis_priv->tx_ring = (BufferDesc *)ring_space;
455 sis_priv->tx_ring_dma = ring_dma;
456
457 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
458 if (!ring_space) {
459 ret = -ENOMEM;
460 goto err_unmap_tx;
461 }
462 sis_priv->rx_ring = (BufferDesc *)ring_space;
463 sis_priv->rx_ring_dma = ring_dma;
464
465 /* The SiS900-specific entries in the device structure. */
466 net_dev->open = &sis900_open;
467 net_dev->hard_start_xmit = &sis900_start_xmit;
468 net_dev->stop = &sis900_close;
469 net_dev->get_stats = &sis900_get_stats;
470 net_dev->set_config = &sis900_set_config;
471 net_dev->set_multicast_list = &set_rx_mode;
472 net_dev->do_ioctl = &mii_ioctl;
473 net_dev->tx_timeout = sis900_tx_timeout;
474 net_dev->watchdog_timeo = TX_TIMEOUT;
475 net_dev->ethtool_ops = &sis900_ethtool_ops;
476
477 #ifdef CONFIG_NET_POLL_CONTROLLER
478 net_dev->poll_controller = &sis900_poll;
479 #endif
480
481 if (sis900_debug > 0)
482 sis_priv->msg_enable = sis900_debug;
483 else
484 sis_priv->msg_enable = SIS900_DEF_MSG;
485
486 sis_priv->mii_info.dev = net_dev;
487 sis_priv->mii_info.mdio_read = mdio_read;
488 sis_priv->mii_info.mdio_write = mdio_write;
489 sis_priv->mii_info.phy_id_mask = 0x1f;
490 sis_priv->mii_info.reg_num_mask = 0x1f;
491
492 /* Get Mac address according to the chip revision */
493 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
494 if(netif_msg_probe(sis_priv))
495 printk(KERN_DEBUG "%s: detected revision %2.2x, "
496 "trying to get MAC address...\n",
497 dev_name, sis_priv->chipset_rev);
498
499 ret = 0;
500 if (sis_priv->chipset_rev == SIS630E_900_REV)
501 ret = sis630e_get_mac_addr(pci_dev, net_dev);
502 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
503 ret = sis635_get_mac_addr(pci_dev, net_dev);
504 else if (sis_priv->chipset_rev == SIS96x_900_REV)
505 ret = sis96x_get_mac_addr(pci_dev, net_dev);
506 else
507 ret = sis900_get_mac_addr(pci_dev, net_dev);
508
509 if (ret == 0) {
510 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
511 ret = -ENODEV;
512 goto err_unmap_rx;
513 }
514
515 /* 630ET : set the mii access mode as software-mode */
516 if (sis_priv->chipset_rev == SIS630ET_900_REV)
517 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
518
519 /* probe for mii transceiver */
520 if (sis900_mii_probe(net_dev) == 0) {
521 printk(KERN_WARNING "%s: Error probing MII device.\n",
522 dev_name);
523 ret = -ENODEV;
524 goto err_unmap_rx;
525 }
526
527 /* save our host bridge revision */
528 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
529 if (dev) {
530 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
531 pci_dev_put(dev);
532 }
533
534 ret = register_netdev(net_dev);
535 if (ret)
536 goto err_unmap_rx;
537
538 /* print some information about our NIC */
539 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
540 card_name, ioaddr, net_dev->irq);
541 for (i = 0; i < 5; i++)
542 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
543 printk("%2.2x.\n", net_dev->dev_addr[i]);
544
545 /* Detect Wake on Lan support */
546 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
547 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
548 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
549
550 return 0;
551
552 err_unmap_rx:
553 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
554 sis_priv->rx_ring_dma);
555 err_unmap_tx:
556 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
557 sis_priv->tx_ring_dma);
558 err_out_cleardev:
559 pci_set_drvdata(pci_dev, NULL);
560 pci_release_regions(pci_dev);
561 err_out:
562 free_netdev(net_dev);
563 return ret;
564 }
565
566 /**
567 * sis900_mii_probe - Probe MII PHY for sis900
568 * @net_dev: the net device to probe for
569 *
570 * Search for total of 32 possible mii phy addresses.
571 * Identify and set current phy if found one,
572 * return error if it failed to found.
573 */
574
575 static int __init sis900_mii_probe(struct net_device * net_dev)
576 {
577 struct sis900_private * sis_priv = net_dev->priv;
578 const char *dev_name = pci_name(sis_priv->pci_dev);
579 u16 poll_bit = MII_STAT_LINK, status = 0;
580 unsigned long timeout = jiffies + 5 * HZ;
581 int phy_addr;
582
583 sis_priv->mii = NULL;
584
585 /* search for total of 32 possible mii phy addresses */
586 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
587 struct mii_phy * mii_phy = NULL;
588 u16 mii_status;
589 int i;
590
591 mii_phy = NULL;
592 for(i = 0; i < 2; i++)
593 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
594
595 if (mii_status == 0xffff || mii_status == 0x0000) {
596 if (netif_msg_probe(sis_priv))
597 printk(KERN_DEBUG "%s: MII at address %d"
598 " not accessible\n",
599 dev_name, phy_addr);
600 continue;
601 }
602
603 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
604 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
605 mii_phy = sis_priv->first_mii;
606 while (mii_phy) {
607 struct mii_phy *phy;
608 phy = mii_phy;
609 mii_phy = mii_phy->next;
610 kfree(phy);
611 }
612 return 0;
613 }
614
615 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
616 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
617 mii_phy->phy_addr = phy_addr;
618 mii_phy->status = mii_status;
619 mii_phy->next = sis_priv->mii;
620 sis_priv->mii = mii_phy;
621 sis_priv->first_mii = mii_phy;
622
623 for (i = 0; mii_chip_table[i].phy_id1; i++)
624 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
625 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
626 mii_phy->phy_types = mii_chip_table[i].phy_types;
627 if (mii_chip_table[i].phy_types == MIX)
628 mii_phy->phy_types =
629 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
630 printk(KERN_INFO "%s: %s transceiver found "
631 "at address %d.\n",
632 dev_name,
633 mii_chip_table[i].name,
634 phy_addr);
635 break;
636 }
637
638 if( !mii_chip_table[i].phy_id1 ) {
639 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
640 dev_name, phy_addr);
641 mii_phy->phy_types = UNKNOWN;
642 }
643 }
644
645 if (sis_priv->mii == NULL) {
646 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
647 return 0;
648 }
649
650 /* select default PHY for mac */
651 sis_priv->mii = NULL;
652 sis900_default_phy( net_dev );
653
654 /* Reset phy if default phy is internal sis900 */
655 if ((sis_priv->mii->phy_id0 == 0x001D) &&
656 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
657 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
658
659 /* workaround for ICS1893 PHY */
660 if ((sis_priv->mii->phy_id0 == 0x0015) &&
661 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
662 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
663
664 if(status & MII_STAT_LINK){
665 while (poll_bit) {
666 yield();
667
668 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
669 if (time_after_eq(jiffies, timeout)) {
670 printk(KERN_WARNING "%s: reset phy and link down now\n",
671 dev_name);
672 return -ETIME;
673 }
674 }
675 }
676
677 if (sis_priv->chipset_rev == SIS630E_900_REV) {
678 /* SiS 630E has some bugs on default value of PHY registers */
679 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
680 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
681 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
682 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
683 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
684 }
685
686 if (sis_priv->mii->status & MII_STAT_LINK)
687 netif_carrier_on(net_dev);
688 else
689 netif_carrier_off(net_dev);
690
691 return 1;
692 }
693
694 /**
695 * sis900_default_phy - Select default PHY for sis900 mac.
696 * @net_dev: the net device to probe for
697 *
698 * Select first detected PHY with link as default.
699 * If no one is link on, select PHY whose types is HOME as default.
700 * If HOME doesn't exist, select LAN.
701 */
702
703 static u16 sis900_default_phy(struct net_device * net_dev)
704 {
705 struct sis900_private * sis_priv = net_dev->priv;
706 struct mii_phy *phy = NULL, *phy_home = NULL,
707 *default_phy = NULL, *phy_lan = NULL;
708 u16 status;
709
710 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
711 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
712 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
713
714 /* Link ON & Not select default PHY & not ghost PHY */
715 if ((status & MII_STAT_LINK) && !default_phy &&
716 (phy->phy_types != UNKNOWN))
717 default_phy = phy;
718 else {
719 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
720 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
721 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
722 if (phy->phy_types == HOME)
723 phy_home = phy;
724 else if(phy->phy_types == LAN)
725 phy_lan = phy;
726 }
727 }
728
729 if (!default_phy && phy_home)
730 default_phy = phy_home;
731 else if (!default_phy && phy_lan)
732 default_phy = phy_lan;
733 else if (!default_phy)
734 default_phy = sis_priv->first_mii;
735
736 if (sis_priv->mii != default_phy) {
737 sis_priv->mii = default_phy;
738 sis_priv->cur_phy = default_phy->phy_addr;
739 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
740 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
741 }
742
743 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
744
745 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
746 status &= (~MII_CNTL_ISOLATE);
747
748 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
749 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
750 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
751
752 return status;
753 }
754
755
756 /**
757 * sis900_set_capability - set the media capability of network adapter.
758 * @net_dev : the net device to probe for
759 * @phy : default PHY
760 *
761 * Set the media capability of network adapter according to
762 * mii status register. It's necessary before auto-negotiate.
763 */
764
765 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
766 {
767 u16 cap;
768 u16 status;
769
770 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
771 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
772
773 cap = MII_NWAY_CSMA_CD |
774 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
775 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
776 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
777 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
778
779 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
780 }
781
782
783 /* Delay between EEPROM clock transitions. */
784 #define eeprom_delay() inl(ee_addr)
785
786 /**
787 * read_eeprom - Read Serial EEPROM
788 * @ioaddr: base i/o address
789 * @location: the EEPROM location to read
790 *
791 * Read Serial EEPROM through EEPROM Access Register.
792 * Note that location is in word (16 bits) unit
793 */
794
795 static u16 __devinit read_eeprom(long ioaddr, int location)
796 {
797 int i;
798 u16 retval = 0;
799 long ee_addr = ioaddr + mear;
800 u32 read_cmd = location | EEread;
801
802 outl(0, ee_addr);
803 eeprom_delay();
804 outl(EECS, ee_addr);
805 eeprom_delay();
806
807 /* Shift the read command (9) bits out. */
808 for (i = 8; i >= 0; i--) {
809 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
810 outl(dataval, ee_addr);
811 eeprom_delay();
812 outl(dataval | EECLK, ee_addr);
813 eeprom_delay();
814 }
815 outl(EECS, ee_addr);
816 eeprom_delay();
817
818 /* read the 16-bits data in */
819 for (i = 16; i > 0; i--) {
820 outl(EECS, ee_addr);
821 eeprom_delay();
822 outl(EECS | EECLK, ee_addr);
823 eeprom_delay();
824 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
825 eeprom_delay();
826 }
827
828 /* Terminate the EEPROM access. */
829 outl(0, ee_addr);
830 eeprom_delay();
831
832 return (retval);
833 }
834
835 /* Read and write the MII management registers using software-generated
836 serial MDIO protocol. Note that the command bits and data bits are
837 send out separately */
838 #define mdio_delay() inl(mdio_addr)
839
840 static void mdio_idle(long mdio_addr)
841 {
842 outl(MDIO | MDDIR, mdio_addr);
843 mdio_delay();
844 outl(MDIO | MDDIR | MDC, mdio_addr);
845 }
846
847 /* Syncronize the MII management interface by shifting 32 one bits out. */
848 static void mdio_reset(long mdio_addr)
849 {
850 int i;
851
852 for (i = 31; i >= 0; i--) {
853 outl(MDDIR | MDIO, mdio_addr);
854 mdio_delay();
855 outl(MDDIR | MDIO | MDC, mdio_addr);
856 mdio_delay();
857 }
858 return;
859 }
860
861 /**
862 * mdio_read - read MII PHY register
863 * @net_dev: the net device to read
864 * @phy_id: the phy address to read
865 * @location: the phy regiester id to read
866 *
867 * Read MII registers through MDIO and MDC
868 * using MDIO management frame structure and protocol(defined by ISO/IEC).
869 * Please see SiS7014 or ICS spec
870 */
871
872 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
873 {
874 long mdio_addr = net_dev->base_addr + mear;
875 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
876 u16 retval = 0;
877 int i;
878
879 mdio_reset(mdio_addr);
880 mdio_idle(mdio_addr);
881
882 for (i = 15; i >= 0; i--) {
883 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
884 outl(dataval, mdio_addr);
885 mdio_delay();
886 outl(dataval | MDC, mdio_addr);
887 mdio_delay();
888 }
889
890 /* Read the 16 data bits. */
891 for (i = 16; i > 0; i--) {
892 outl(0, mdio_addr);
893 mdio_delay();
894 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
895 outl(MDC, mdio_addr);
896 mdio_delay();
897 }
898 outl(0x00, mdio_addr);
899
900 return retval;
901 }
902
903 /**
904 * mdio_write - write MII PHY register
905 * @net_dev: the net device to write
906 * @phy_id: the phy address to write
907 * @location: the phy regiester id to write
908 * @value: the register value to write with
909 *
910 * Write MII registers with @value through MDIO and MDC
911 * using MDIO management frame structure and protocol(defined by ISO/IEC)
912 * please see SiS7014 or ICS spec
913 */
914
915 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
916 int value)
917 {
918 long mdio_addr = net_dev->base_addr + mear;
919 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
920 int i;
921
922 mdio_reset(mdio_addr);
923 mdio_idle(mdio_addr);
924
925 /* Shift the command bits out. */
926 for (i = 15; i >= 0; i--) {
927 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
928 outb(dataval, mdio_addr);
929 mdio_delay();
930 outb(dataval | MDC, mdio_addr);
931 mdio_delay();
932 }
933 mdio_delay();
934
935 /* Shift the value bits out. */
936 for (i = 15; i >= 0; i--) {
937 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
938 outl(dataval, mdio_addr);
939 mdio_delay();
940 outl(dataval | MDC, mdio_addr);
941 mdio_delay();
942 }
943 mdio_delay();
944
945 /* Clear out extra bits. */
946 for (i = 2; i > 0; i--) {
947 outb(0, mdio_addr);
948 mdio_delay();
949 outb(MDC, mdio_addr);
950 mdio_delay();
951 }
952 outl(0x00, mdio_addr);
953
954 return;
955 }
956
957
958 /**
959 * sis900_reset_phy - reset sis900 mii phy.
960 * @net_dev: the net device to write
961 * @phy_addr: default phy address
962 *
963 * Some specific phy can't work properly without reset.
964 * This function will be called during initialization and
965 * link status change from ON to DOWN.
966 */
967
968 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
969 {
970 int i = 0;
971 u16 status;
972
973 while (i++ < 2)
974 status = mdio_read(net_dev, phy_addr, MII_STATUS);
975
976 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
977
978 return status;
979 }
980
981 #ifdef CONFIG_NET_POLL_CONTROLLER
982 /*
983 * Polling 'interrupt' - used by things like netconsole to send skbs
984 * without having to re-enable interrupts. It's not called while
985 * the interrupt routine is executing.
986 */
987 static void sis900_poll(struct net_device *dev)
988 {
989 disable_irq(dev->irq);
990 sis900_interrupt(dev->irq, dev, NULL);
991 enable_irq(dev->irq);
992 }
993 #endif
994
995 /**
996 * sis900_open - open sis900 device
997 * @net_dev: the net device to open
998 *
999 * Do some initialization and start net interface.
1000 * enable interrupts and set sis900 timer.
1001 */
1002
1003 static int
1004 sis900_open(struct net_device *net_dev)
1005 {
1006 struct sis900_private *sis_priv = net_dev->priv;
1007 long ioaddr = net_dev->base_addr;
1008 int ret;
1009
1010 /* Soft reset the chip. */
1011 sis900_reset(net_dev);
1012
1013 /* Equalizer workaround Rule */
1014 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1015
1016 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1017 net_dev->name, net_dev);
1018 if (ret)
1019 return ret;
1020
1021 sis900_init_rxfilter(net_dev);
1022
1023 sis900_init_tx_ring(net_dev);
1024 sis900_init_rx_ring(net_dev);
1025
1026 set_rx_mode(net_dev);
1027
1028 netif_start_queue(net_dev);
1029
1030 /* Workaround for EDB */
1031 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1032
1033 /* Enable all known interrupts by setting the interrupt mask. */
1034 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1035 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1036 outl(IE, ioaddr + ier);
1037
1038 sis900_check_mode(net_dev, sis_priv->mii);
1039
1040 /* Set the timer to switch to check for link beat and perhaps switch
1041 to an alternate media type. */
1042 init_timer(&sis_priv->timer);
1043 sis_priv->timer.expires = jiffies + HZ;
1044 sis_priv->timer.data = (unsigned long)net_dev;
1045 sis_priv->timer.function = &sis900_timer;
1046 add_timer(&sis_priv->timer);
1047
1048 return 0;
1049 }
1050
1051 /**
1052 * sis900_init_rxfilter - Initialize the Rx filter
1053 * @net_dev: the net device to initialize for
1054 *
1055 * Set receive filter address to our MAC address
1056 * and enable packet filtering.
1057 */
1058
1059 static void
1060 sis900_init_rxfilter (struct net_device * net_dev)
1061 {
1062 struct sis900_private *sis_priv = net_dev->priv;
1063 long ioaddr = net_dev->base_addr;
1064 u32 rfcrSave;
1065 u32 i;
1066
1067 rfcrSave = inl(rfcr + ioaddr);
1068
1069 /* disable packet filtering before setting filter */
1070 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1071
1072 /* load MAC addr to filter data register */
1073 for (i = 0 ; i < 3 ; i++) {
1074 u32 w;
1075
1076 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1077 outl((i << RFADDR_shift), ioaddr + rfcr);
1078 outl(w, ioaddr + rfdr);
1079
1080 if (netif_msg_hw(sis_priv)) {
1081 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1082 net_dev->name, i, inl(ioaddr + rfdr));
1083 }
1084 }
1085
1086 /* enable packet filtering */
1087 outl(rfcrSave | RFEN, rfcr + ioaddr);
1088 }
1089
1090 /**
1091 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1092 * @net_dev: the net device to initialize for
1093 *
1094 * Initialize the Tx descriptor ring,
1095 */
1096
1097 static void
1098 sis900_init_tx_ring(struct net_device *net_dev)
1099 {
1100 struct sis900_private *sis_priv = net_dev->priv;
1101 long ioaddr = net_dev->base_addr;
1102 int i;
1103
1104 sis_priv->tx_full = 0;
1105 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1106
1107 for (i = 0; i < NUM_TX_DESC; i++) {
1108 sis_priv->tx_skbuff[i] = NULL;
1109
1110 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1111 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1112 sis_priv->tx_ring[i].cmdsts = 0;
1113 sis_priv->tx_ring[i].bufptr = 0;
1114 }
1115
1116 /* load Transmit Descriptor Register */
1117 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1118 if (netif_msg_hw(sis_priv))
1119 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1120 net_dev->name, inl(ioaddr + txdp));
1121 }
1122
1123 /**
1124 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1125 * @net_dev: the net device to initialize for
1126 *
1127 * Initialize the Rx descriptor ring,
1128 * and pre-allocate recevie buffers (socket buffer)
1129 */
1130
1131 static void
1132 sis900_init_rx_ring(struct net_device *net_dev)
1133 {
1134 struct sis900_private *sis_priv = net_dev->priv;
1135 long ioaddr = net_dev->base_addr;
1136 int i;
1137
1138 sis_priv->cur_rx = 0;
1139 sis_priv->dirty_rx = 0;
1140
1141 /* init RX descriptor */
1142 for (i = 0; i < NUM_RX_DESC; i++) {
1143 sis_priv->rx_skbuff[i] = NULL;
1144
1145 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1146 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1147 sis_priv->rx_ring[i].cmdsts = 0;
1148 sis_priv->rx_ring[i].bufptr = 0;
1149 }
1150
1151 /* allocate sock buffers */
1152 for (i = 0; i < NUM_RX_DESC; i++) {
1153 struct sk_buff *skb;
1154
1155 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1156 /* not enough memory for skbuff, this makes a "hole"
1157 on the buffer ring, it is not clear how the
1158 hardware will react to this kind of degenerated
1159 buffer */
1160 break;
1161 }
1162 skb->dev = net_dev;
1163 sis_priv->rx_skbuff[i] = skb;
1164 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1165 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1166 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1167 }
1168 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1169
1170 /* load Receive Descriptor Register */
1171 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1172 if (netif_msg_hw(sis_priv))
1173 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1174 net_dev->name, inl(ioaddr + rxdp));
1175 }
1176
1177 /**
1178 * sis630_set_eq - set phy equalizer value for 630 LAN
1179 * @net_dev: the net device to set equalizer value
1180 * @revision: 630 LAN revision number
1181 *
1182 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1183 * PHY register 14h(Test)
1184 * Bit 14: 0 -- Automatically dectect (default)
1185 * 1 -- Manually set Equalizer filter
1186 * Bit 13: 0 -- (Default)
1187 * 1 -- Speed up convergence of equalizer setting
1188 * Bit 9 : 0 -- (Default)
1189 * 1 -- Disable Baseline Wander
1190 * Bit 3~7 -- Equalizer filter setting
1191 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1192 * Then calculate equalizer value
1193 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1194 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1195 * Calculate Equalizer value:
1196 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1197 * When the equalizer is stable, this value is not a fixed value. It will be within
1198 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1199 * 0 <= max <= 4 --> set equalizer to max
1200 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1201 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1202 */
1203
1204 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1205 {
1206 struct sis900_private *sis_priv = net_dev->priv;
1207 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1208 int i, maxcount=10;
1209
1210 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1211 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1212 return;
1213
1214 if (netif_carrier_ok(net_dev)) {
1215 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1216 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1217 (0x2200 | reg14h) & 0xBFFF);
1218 for (i=0; i < maxcount; i++) {
1219 eq_value = (0x00F8 & mdio_read(net_dev,
1220 sis_priv->cur_phy, MII_RESV)) >> 3;
1221 if (i == 0)
1222 max_value=min_value=eq_value;
1223 max_value = (eq_value > max_value) ?
1224 eq_value : max_value;
1225 min_value = (eq_value < min_value) ?
1226 eq_value : min_value;
1227 }
1228 /* 630E rule to determine the equalizer value */
1229 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1230 revision == SIS630ET_900_REV) {
1231 if (max_value < 5)
1232 eq_value = max_value;
1233 else if (max_value >= 5 && max_value < 15)
1234 eq_value = (max_value == min_value) ?
1235 max_value+2 : max_value+1;
1236 else if (max_value >= 15)
1237 eq_value=(max_value == min_value) ?
1238 max_value+6 : max_value+5;
1239 }
1240 /* 630B0&B1 rule to determine the equalizer value */
1241 if (revision == SIS630A_900_REV &&
1242 (sis_priv->host_bridge_rev == SIS630B0 ||
1243 sis_priv->host_bridge_rev == SIS630B1)) {
1244 if (max_value == 0)
1245 eq_value = 3;
1246 else
1247 eq_value = (max_value + min_value + 1)/2;
1248 }
1249 /* write equalizer value and setting */
1250 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1251 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1252 reg14h = (reg14h | 0x6000) & 0xFDFF;
1253 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1254 } else {
1255 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1256 if (revision == SIS630A_900_REV &&
1257 (sis_priv->host_bridge_rev == SIS630B0 ||
1258 sis_priv->host_bridge_rev == SIS630B1))
1259 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1260 (reg14h | 0x2200) & 0xBFFF);
1261 else
1262 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1263 (reg14h | 0x2000) & 0xBFFF);
1264 }
1265 return;
1266 }
1267
1268 /**
1269 * sis900_timer - sis900 timer routine
1270 * @data: pointer to sis900 net device
1271 *
1272 * On each timer ticks we check two things,
1273 * link status (ON/OFF) and link mode (10/100/Full/Half)
1274 */
1275
1276 static void sis900_timer(unsigned long data)
1277 {
1278 struct net_device *net_dev = (struct net_device *)data;
1279 struct sis900_private *sis_priv = net_dev->priv;
1280 struct mii_phy *mii_phy = sis_priv->mii;
1281 static const int next_tick = 5*HZ;
1282 u16 status;
1283
1284 if (!sis_priv->autong_complete){
1285 int speed, duplex = 0;
1286
1287 sis900_read_mode(net_dev, &speed, &duplex);
1288 if (duplex){
1289 sis900_set_mode(net_dev->base_addr, speed, duplex);
1290 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1291 netif_start_queue(net_dev);
1292 }
1293
1294 sis_priv->timer.expires = jiffies + HZ;
1295 add_timer(&sis_priv->timer);
1296 return;
1297 }
1298
1299 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1300 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1301
1302 /* Link OFF -> ON */
1303 if (!netif_carrier_ok(net_dev)) {
1304 LookForLink:
1305 /* Search for new PHY */
1306 status = sis900_default_phy(net_dev);
1307 mii_phy = sis_priv->mii;
1308
1309 if (status & MII_STAT_LINK){
1310 sis900_check_mode(net_dev, mii_phy);
1311 netif_carrier_on(net_dev);
1312 }
1313 } else {
1314 /* Link ON -> OFF */
1315 if (!(status & MII_STAT_LINK)){
1316 netif_carrier_off(net_dev);
1317 if(netif_msg_link(sis_priv))
1318 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1319
1320 /* Change mode issue */
1321 if ((mii_phy->phy_id0 == 0x001D) &&
1322 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1323 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1324
1325 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1326
1327 goto LookForLink;
1328 }
1329 }
1330
1331 sis_priv->timer.expires = jiffies + next_tick;
1332 add_timer(&sis_priv->timer);
1333 }
1334
1335 /**
1336 * sis900_check_mode - check the media mode for sis900
1337 * @net_dev: the net device to be checked
1338 * @mii_phy: the mii phy
1339 *
1340 * Older driver gets the media mode from mii status output
1341 * register. Now we set our media capability and auto-negotiate
1342 * to get the upper bound of speed and duplex between two ends.
1343 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1344 * and autong_complete should be set to 1.
1345 */
1346
1347 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1348 {
1349 struct sis900_private *sis_priv = net_dev->priv;
1350 long ioaddr = net_dev->base_addr;
1351 int speed, duplex;
1352
1353 if (mii_phy->phy_types == LAN) {
1354 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1355 sis900_set_capability(net_dev , mii_phy);
1356 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1357 } else {
1358 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1359 speed = HW_SPEED_HOME;
1360 duplex = FDX_CAPABLE_HALF_SELECTED;
1361 sis900_set_mode(ioaddr, speed, duplex);
1362 sis_priv->autong_complete = 1;
1363 }
1364 }
1365
1366 /**
1367 * sis900_set_mode - Set the media mode of mac register.
1368 * @ioaddr: the address of the device
1369 * @speed : the transmit speed to be determined
1370 * @duplex: the duplex mode to be determined
1371 *
1372 * Set the media mode of mac register txcfg/rxcfg according to
1373 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1374 * bus is used instead of PCI bus. When this bit is set 1, the
1375 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1376 * double words.
1377 */
1378
1379 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1380 {
1381 u32 tx_flags = 0, rx_flags = 0;
1382
1383 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1384 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1385 (TX_FILL_THRESH << TxFILLT_shift);
1386 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1387 } else {
1388 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1389 (TX_FILL_THRESH << TxFILLT_shift);
1390 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1391 }
1392
1393 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1394 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1395 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1396 } else {
1397 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1398 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1399 }
1400
1401 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1402 tx_flags |= (TxCSI | TxHBI);
1403 rx_flags |= RxATX;
1404 }
1405
1406 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1407 /* Can accept Jumbo packet */
1408 rx_flags |= RxAJAB;
1409 #endif
1410
1411 outl (tx_flags, ioaddr + txcfg);
1412 outl (rx_flags, ioaddr + rxcfg);
1413 }
1414
1415 /**
1416 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1417 * @net_dev: the net device to read mode for
1418 * @phy_addr: mii phy address
1419 *
1420 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1421 * autong_complete should be set to 0 when starting auto-negotiation.
1422 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1423 * sis900_timer will wait for link on again if autong_complete = 0.
1424 */
1425
1426 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1427 {
1428 struct sis900_private *sis_priv = net_dev->priv;
1429 int i = 0;
1430 u32 status;
1431
1432 while (i++ < 2)
1433 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1434
1435 if (!(status & MII_STAT_LINK)){
1436 if(netif_msg_link(sis_priv))
1437 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1438 sis_priv->autong_complete = 1;
1439 netif_carrier_off(net_dev);
1440 return;
1441 }
1442
1443 /* (Re)start AutoNegotiate */
1444 mdio_write(net_dev, phy_addr, MII_CONTROL,
1445 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1446 sis_priv->autong_complete = 0;
1447 }
1448
1449
1450 /**
1451 * sis900_read_mode - read media mode for sis900 internal phy
1452 * @net_dev: the net device to read mode for
1453 * @speed : the transmit speed to be determined
1454 * @duplex : the duplex mode to be determined
1455 *
1456 * The capability of remote end will be put in mii register autorec
1457 * after auto-negotiation. Use AND operation to get the upper bound
1458 * of speed and duplex between two ends.
1459 */
1460
1461 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1462 {
1463 struct sis900_private *sis_priv = net_dev->priv;
1464 struct mii_phy *phy = sis_priv->mii;
1465 int phy_addr = sis_priv->cur_phy;
1466 u32 status;
1467 u16 autoadv, autorec;
1468 int i = 0;
1469
1470 while (i++ < 2)
1471 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1472
1473 if (!(status & MII_STAT_LINK))
1474 return;
1475
1476 /* AutoNegotiate completed */
1477 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1478 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1479 status = autoadv & autorec;
1480
1481 *speed = HW_SPEED_10_MBPS;
1482 *duplex = FDX_CAPABLE_HALF_SELECTED;
1483
1484 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1485 *speed = HW_SPEED_100_MBPS;
1486 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1487 *duplex = FDX_CAPABLE_FULL_SELECTED;
1488
1489 sis_priv->autong_complete = 1;
1490
1491 /* Workaround for Realtek RTL8201 PHY issue */
1492 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1493 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1494 *duplex = FDX_CAPABLE_FULL_SELECTED;
1495 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1496 *speed = HW_SPEED_100_MBPS;
1497 }
1498
1499 if(netif_msg_link(sis_priv))
1500 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1501 net_dev->name,
1502 *speed == HW_SPEED_100_MBPS ?
1503 "100mbps" : "10mbps",
1504 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1505 "full" : "half");
1506 }
1507
1508 /**
1509 * sis900_tx_timeout - sis900 transmit timeout routine
1510 * @net_dev: the net device to transmit
1511 *
1512 * print transmit timeout status
1513 * disable interrupts and do some tasks
1514 */
1515
1516 static void sis900_tx_timeout(struct net_device *net_dev)
1517 {
1518 struct sis900_private *sis_priv = net_dev->priv;
1519 long ioaddr = net_dev->base_addr;
1520 unsigned long flags;
1521 int i;
1522
1523 if(netif_msg_tx_err(sis_priv))
1524 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1525 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1526
1527 /* Disable interrupts by clearing the interrupt mask. */
1528 outl(0x0000, ioaddr + imr);
1529
1530 /* use spinlock to prevent interrupt handler accessing buffer ring */
1531 spin_lock_irqsave(&sis_priv->lock, flags);
1532
1533 /* discard unsent packets */
1534 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1535 for (i = 0; i < NUM_TX_DESC; i++) {
1536 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1537
1538 if (skb) {
1539 pci_unmap_single(sis_priv->pci_dev,
1540 sis_priv->tx_ring[i].bufptr, skb->len,
1541 PCI_DMA_TODEVICE);
1542 dev_kfree_skb_irq(skb);
1543 sis_priv->tx_skbuff[i] = NULL;
1544 sis_priv->tx_ring[i].cmdsts = 0;
1545 sis_priv->tx_ring[i].bufptr = 0;
1546 sis_priv->stats.tx_dropped++;
1547 }
1548 }
1549 sis_priv->tx_full = 0;
1550 netif_wake_queue(net_dev);
1551
1552 spin_unlock_irqrestore(&sis_priv->lock, flags);
1553
1554 net_dev->trans_start = jiffies;
1555
1556 /* load Transmit Descriptor Register */
1557 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1558
1559 /* Enable all known interrupts by setting the interrupt mask. */
1560 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1561 return;
1562 }
1563
1564 /**
1565 * sis900_start_xmit - sis900 start transmit routine
1566 * @skb: socket buffer pointer to put the data being transmitted
1567 * @net_dev: the net device to transmit with
1568 *
1569 * Set the transmit buffer descriptor,
1570 * and write TxENA to enable transmit state machine.
1571 * tell upper layer if the buffer is full
1572 */
1573
1574 static int
1575 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1576 {
1577 struct sis900_private *sis_priv = net_dev->priv;
1578 long ioaddr = net_dev->base_addr;
1579 unsigned int entry;
1580 unsigned long flags;
1581 unsigned int index_cur_tx, index_dirty_tx;
1582 unsigned int count_dirty_tx;
1583
1584 /* Don't transmit data before the complete of auto-negotiation */
1585 if(!sis_priv->autong_complete){
1586 netif_stop_queue(net_dev);
1587 return 1;
1588 }
1589
1590 spin_lock_irqsave(&sis_priv->lock, flags);
1591
1592 /* Calculate the next Tx descriptor entry. */
1593 entry = sis_priv->cur_tx % NUM_TX_DESC;
1594 sis_priv->tx_skbuff[entry] = skb;
1595
1596 /* set the transmit buffer descriptor and enable Transmit State Machine */
1597 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1598 skb->data, skb->len, PCI_DMA_TODEVICE);
1599 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1600 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1601
1602 sis_priv->cur_tx ++;
1603 index_cur_tx = sis_priv->cur_tx;
1604 index_dirty_tx = sis_priv->dirty_tx;
1605
1606 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1607 count_dirty_tx ++;
1608
1609 if (index_cur_tx == index_dirty_tx) {
1610 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1611 sis_priv->tx_full = 1;
1612 netif_stop_queue(net_dev);
1613 } else if (count_dirty_tx < NUM_TX_DESC) {
1614 /* Typical path, tell upper layer that more transmission is possible */
1615 netif_start_queue(net_dev);
1616 } else {
1617 /* buffer full, tell upper layer no more transmission */
1618 sis_priv->tx_full = 1;
1619 netif_stop_queue(net_dev);
1620 }
1621
1622 spin_unlock_irqrestore(&sis_priv->lock, flags);
1623
1624 net_dev->trans_start = jiffies;
1625
1626 if (netif_msg_tx_queued(sis_priv))
1627 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1628 "to slot %d.\n",
1629 net_dev->name, skb->data, (int)skb->len, entry);
1630
1631 return 0;
1632 }
1633
1634 /**
1635 * sis900_interrupt - sis900 interrupt handler
1636 * @irq: the irq number
1637 * @dev_instance: the client data object
1638 * @regs: snapshot of processor context
1639 *
1640 * The interrupt handler does all of the Rx thread work,
1641 * and cleans up after the Tx thread
1642 */
1643
1644 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1645 {
1646 struct net_device *net_dev = dev_instance;
1647 struct sis900_private *sis_priv = net_dev->priv;
1648 int boguscnt = max_interrupt_work;
1649 long ioaddr = net_dev->base_addr;
1650 u32 status;
1651 unsigned int handled = 0;
1652
1653 spin_lock (&sis_priv->lock);
1654
1655 do {
1656 status = inl(ioaddr + isr);
1657
1658 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1659 /* nothing intresting happened */
1660 break;
1661 handled = 1;
1662
1663 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1664 if (status & (RxORN | RxERR | RxOK))
1665 /* Rx interrupt */
1666 sis900_rx(net_dev);
1667
1668 if (status & (TxURN | TxERR | TxIDLE))
1669 /* Tx interrupt */
1670 sis900_finish_xmit(net_dev);
1671
1672 /* something strange happened !!! */
1673 if (status & HIBERR) {
1674 if(netif_msg_intr(sis_priv))
1675 printk(KERN_INFO "%s: Abnormal interrupt,"
1676 "status %#8.8x.\n", net_dev->name, status);
1677 break;
1678 }
1679 if (--boguscnt < 0) {
1680 if(netif_msg_intr(sis_priv))
1681 printk(KERN_INFO "%s: Too much work at interrupt, "
1682 "interrupt status = %#8.8x.\n",
1683 net_dev->name, status);
1684 break;
1685 }
1686 } while (1);
1687
1688 if(netif_msg_intr(sis_priv))
1689 printk(KERN_DEBUG "%s: exiting interrupt, "
1690 "interrupt status = 0x%#8.8x.\n",
1691 net_dev->name, inl(ioaddr + isr));
1692
1693 spin_unlock (&sis_priv->lock);
1694 return IRQ_RETVAL(handled);
1695 }
1696
1697 /**
1698 * sis900_rx - sis900 receive routine
1699 * @net_dev: the net device which receives data
1700 *
1701 * Process receive interrupt events,
1702 * put buffer to higher layer and refill buffer pool
1703 * Note: This function is called by interrupt handler,
1704 * don't do "too much" work here
1705 */
1706
1707 static int sis900_rx(struct net_device *net_dev)
1708 {
1709 struct sis900_private *sis_priv = net_dev->priv;
1710 long ioaddr = net_dev->base_addr;
1711 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1712 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1713 int rx_work_limit;
1714
1715 if (netif_msg_rx_status(sis_priv))
1716 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1717 "status:0x%8.8x\n",
1718 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1719 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1720
1721 while (rx_status & OWN) {
1722 unsigned int rx_size;
1723 unsigned int data_size;
1724
1725 if (--rx_work_limit < 0)
1726 break;
1727
1728 data_size = rx_status & DSIZE;
1729 rx_size = data_size - CRC_SIZE;
1730
1731 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1732 /* ``TOOLONG'' flag means jumbo packet recived. */
1733 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1734 rx_status &= (~ ((unsigned int)TOOLONG));
1735 #endif
1736
1737 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1738 /* corrupted packet received */
1739 if (netif_msg_rx_err(sis_priv))
1740 printk(KERN_DEBUG "%s: Corrupted packet "
1741 "received, buffer status = 0x%8.8x/%d.\n",
1742 net_dev->name, rx_status, data_size);
1743 sis_priv->stats.rx_errors++;
1744 if (rx_status & OVERRUN)
1745 sis_priv->stats.rx_over_errors++;
1746 if (rx_status & (TOOLONG|RUNT))
1747 sis_priv->stats.rx_length_errors++;
1748 if (rx_status & (RXISERR | FAERR))
1749 sis_priv->stats.rx_frame_errors++;
1750 if (rx_status & CRCERR)
1751 sis_priv->stats.rx_crc_errors++;
1752 /* reset buffer descriptor state */
1753 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1754 } else {
1755 struct sk_buff * skb;
1756
1757 /* This situation should never happen, but due to
1758 some unknow bugs, it is possible that
1759 we are working on NULL sk_buff :-( */
1760 if (sis_priv->rx_skbuff[entry] == NULL) {
1761 if (netif_msg_rx_err(sis_priv))
1762 printk(KERN_WARNING "%s: NULL pointer "
1763 "encountered in Rx ring\n"
1764 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1765 net_dev->name, sis_priv->cur_rx,
1766 sis_priv->dirty_rx);
1767 break;
1768 }
1769
1770 pci_unmap_single(sis_priv->pci_dev,
1771 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1772 PCI_DMA_FROMDEVICE);
1773 /* give the socket buffer to upper layers */
1774 skb = sis_priv->rx_skbuff[entry];
1775 skb_put(skb, rx_size);
1776 skb->protocol = eth_type_trans(skb, net_dev);
1777 netif_rx(skb);
1778
1779 /* some network statistics */
1780 if ((rx_status & BCAST) == MCAST)
1781 sis_priv->stats.multicast++;
1782 net_dev->last_rx = jiffies;
1783 sis_priv->stats.rx_bytes += rx_size;
1784 sis_priv->stats.rx_packets++;
1785
1786 /* refill the Rx buffer, what if there is not enought
1787 * memory for new socket buffer ?? */
1788 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1789 /* not enough memory for skbuff, this makes a
1790 * "hole" on the buffer ring, it is not clear
1791 * how the hardware will react to this kind
1792 * of degenerated buffer */
1793 if (netif_msg_rx_status(sis_priv))
1794 printk(KERN_INFO "%s: Memory squeeze,"
1795 "deferring packet.\n",
1796 net_dev->name);
1797 sis_priv->rx_skbuff[entry] = NULL;
1798 /* reset buffer descriptor state */
1799 sis_priv->rx_ring[entry].cmdsts = 0;
1800 sis_priv->rx_ring[entry].bufptr = 0;
1801 sis_priv->stats.rx_dropped++;
1802 sis_priv->cur_rx++;
1803 break;
1804 }
1805 skb->dev = net_dev;
1806 sis_priv->rx_skbuff[entry] = skb;
1807 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1808 sis_priv->rx_ring[entry].bufptr =
1809 pci_map_single(sis_priv->pci_dev, skb->data,
1810 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1811 sis_priv->dirty_rx++;
1812 }
1813 sis_priv->cur_rx++;
1814 entry = sis_priv->cur_rx % NUM_RX_DESC;
1815 rx_status = sis_priv->rx_ring[entry].cmdsts;
1816 } // while
1817
1818 /* refill the Rx buffer, what if the rate of refilling is slower
1819 * than consuming ?? */
1820 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1821 struct sk_buff *skb;
1822
1823 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1824
1825 if (sis_priv->rx_skbuff[entry] == NULL) {
1826 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1827 /* not enough memory for skbuff, this makes a
1828 * "hole" on the buffer ring, it is not clear
1829 * how the hardware will react to this kind
1830 * of degenerated buffer */
1831 if (netif_msg_rx_err(sis_priv))
1832 printk(KERN_INFO "%s: Memory squeeze,"
1833 "deferring packet.\n",
1834 net_dev->name);
1835 sis_priv->stats.rx_dropped++;
1836 break;
1837 }
1838 skb->dev = net_dev;
1839 sis_priv->rx_skbuff[entry] = skb;
1840 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1841 sis_priv->rx_ring[entry].bufptr =
1842 pci_map_single(sis_priv->pci_dev, skb->data,
1843 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1844 }
1845 }
1846 /* re-enable the potentially idle receive state matchine */
1847 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1848
1849 return 0;
1850 }
1851
1852 /**
1853 * sis900_finish_xmit - finish up transmission of packets
1854 * @net_dev: the net device to be transmitted on
1855 *
1856 * Check for error condition and free socket buffer etc
1857 * schedule for more transmission as needed
1858 * Note: This function is called by interrupt handler,
1859 * don't do "too much" work here
1860 */
1861
1862 static void sis900_finish_xmit (struct net_device *net_dev)
1863 {
1864 struct sis900_private *sis_priv = net_dev->priv;
1865
1866 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1867 struct sk_buff *skb;
1868 unsigned int entry;
1869 u32 tx_status;
1870
1871 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1872 tx_status = sis_priv->tx_ring[entry].cmdsts;
1873
1874 if (tx_status & OWN) {
1875 /* The packet is not transmitted yet (owned by hardware) !
1876 * Note: the interrupt is generated only when Tx Machine
1877 * is idle, so this is an almost impossible case */
1878 break;
1879 }
1880
1881 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1882 /* packet unsuccessfully transmitted */
1883 if (netif_msg_tx_err(sis_priv))
1884 printk(KERN_DEBUG "%s: Transmit "
1885 "error, Tx status %8.8x.\n",
1886 net_dev->name, tx_status);
1887 sis_priv->stats.tx_errors++;
1888 if (tx_status & UNDERRUN)
1889 sis_priv->stats.tx_fifo_errors++;
1890 if (tx_status & ABORT)
1891 sis_priv->stats.tx_aborted_errors++;
1892 if (tx_status & NOCARRIER)
1893 sis_priv->stats.tx_carrier_errors++;
1894 if (tx_status & OWCOLL)
1895 sis_priv->stats.tx_window_errors++;
1896 } else {
1897 /* packet successfully transmitted */
1898 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1899 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1900 sis_priv->stats.tx_packets++;
1901 }
1902 /* Free the original skb. */
1903 skb = sis_priv->tx_skbuff[entry];
1904 pci_unmap_single(sis_priv->pci_dev,
1905 sis_priv->tx_ring[entry].bufptr, skb->len,
1906 PCI_DMA_TODEVICE);
1907 dev_kfree_skb_irq(skb);
1908 sis_priv->tx_skbuff[entry] = NULL;
1909 sis_priv->tx_ring[entry].bufptr = 0;
1910 sis_priv->tx_ring[entry].cmdsts = 0;
1911 }
1912
1913 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1914 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1915 /* The ring is no longer full, clear tx_full and schedule
1916 * more transmission by netif_wake_queue(net_dev) */
1917 sis_priv->tx_full = 0;
1918 netif_wake_queue (net_dev);
1919 }
1920 }
1921
1922 /**
1923 * sis900_close - close sis900 device
1924 * @net_dev: the net device to be closed
1925 *
1926 * Disable interrupts, stop the Tx and Rx Status Machine
1927 * free Tx and RX socket buffer
1928 */
1929
1930 static int sis900_close(struct net_device *net_dev)
1931 {
1932 long ioaddr = net_dev->base_addr;
1933 struct sis900_private *sis_priv = net_dev->priv;
1934 struct sk_buff *skb;
1935 int i;
1936
1937 netif_stop_queue(net_dev);
1938
1939 /* Disable interrupts by clearing the interrupt mask. */
1940 outl(0x0000, ioaddr + imr);
1941 outl(0x0000, ioaddr + ier);
1942
1943 /* Stop the chip's Tx and Rx Status Machine */
1944 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1945
1946 del_timer(&sis_priv->timer);
1947
1948 free_irq(net_dev->irq, net_dev);
1949
1950 /* Free Tx and RX skbuff */
1951 for (i = 0; i < NUM_RX_DESC; i++) {
1952 skb = sis_priv->rx_skbuff[i];
1953 if (skb) {
1954 pci_unmap_single(sis_priv->pci_dev,
1955 sis_priv->rx_ring[i].bufptr,
1956 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1957 dev_kfree_skb(skb);
1958 sis_priv->rx_skbuff[i] = NULL;
1959 }
1960 }
1961 for (i = 0; i < NUM_TX_DESC; i++) {
1962 skb = sis_priv->tx_skbuff[i];
1963 if (skb) {
1964 pci_unmap_single(sis_priv->pci_dev,
1965 sis_priv->tx_ring[i].bufptr, skb->len,
1966 PCI_DMA_TODEVICE);
1967 dev_kfree_skb(skb);
1968 sis_priv->tx_skbuff[i] = NULL;
1969 }
1970 }
1971
1972 /* Green! Put the chip in low-power mode. */
1973
1974 return 0;
1975 }
1976
1977 /**
1978 * sis900_get_drvinfo - Return information about driver
1979 * @net_dev: the net device to probe
1980 * @info: container for info returned
1981 *
1982 * Process ethtool command such as "ehtool -i" to show information
1983 */
1984
1985 static void sis900_get_drvinfo(struct net_device *net_dev,
1986 struct ethtool_drvinfo *info)
1987 {
1988 struct sis900_private *sis_priv = net_dev->priv;
1989
1990 strcpy (info->driver, SIS900_MODULE_NAME);
1991 strcpy (info->version, SIS900_DRV_VERSION);
1992 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1993 }
1994
1995 static u32 sis900_get_msglevel(struct net_device *net_dev)
1996 {
1997 struct sis900_private *sis_priv = net_dev->priv;
1998 return sis_priv->msg_enable;
1999 }
2000
2001 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2002 {
2003 struct sis900_private *sis_priv = net_dev->priv;
2004 sis_priv->msg_enable = value;
2005 }
2006
2007 static u32 sis900_get_link(struct net_device *net_dev)
2008 {
2009 struct sis900_private *sis_priv = net_dev->priv;
2010 return mii_link_ok(&sis_priv->mii_info);
2011 }
2012
2013 static int sis900_get_settings(struct net_device *net_dev,
2014 struct ethtool_cmd *cmd)
2015 {
2016 struct sis900_private *sis_priv = net_dev->priv;
2017 spin_lock_irq(&sis_priv->lock);
2018 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2019 spin_unlock_irq(&sis_priv->lock);
2020 return 0;
2021 }
2022
2023 static int sis900_set_settings(struct net_device *net_dev,
2024 struct ethtool_cmd *cmd)
2025 {
2026 struct sis900_private *sis_priv = net_dev->priv;
2027 int rt;
2028 spin_lock_irq(&sis_priv->lock);
2029 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2030 spin_unlock_irq(&sis_priv->lock);
2031 return rt;
2032 }
2033
2034 static int sis900_nway_reset(struct net_device *net_dev)
2035 {
2036 struct sis900_private *sis_priv = net_dev->priv;
2037 return mii_nway_restart(&sis_priv->mii_info);
2038 }
2039
2040 /**
2041 * sis900_set_wol - Set up Wake on Lan registers
2042 * @net_dev: the net device to probe
2043 * @wol: container for info passed to the driver
2044 *
2045 * Process ethtool command "wol" to setup wake on lan features.
2046 * SiS900 supports sending WoL events if a correct packet is received,
2047 * but there is no simple way to filter them to only a subset (broadcast,
2048 * multicast, unicast or arp).
2049 */
2050
2051 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2052 {
2053 struct sis900_private *sis_priv = net_dev->priv;
2054 long pmctrl_addr = net_dev->base_addr + pmctrl;
2055 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2056
2057 if (wol->wolopts == 0) {
2058 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2059 cfgpmcsr &= ~PME_EN;
2060 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2061 outl(pmctrl_bits, pmctrl_addr);
2062 if (netif_msg_wol(sis_priv))
2063 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2064 return 0;
2065 }
2066
2067 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2068 | WAKE_BCAST | WAKE_ARP))
2069 return -EINVAL;
2070
2071 if (wol->wolopts & WAKE_MAGIC)
2072 pmctrl_bits |= MAGICPKT;
2073 if (wol->wolopts & WAKE_PHY)
2074 pmctrl_bits |= LINKON;
2075
2076 outl(pmctrl_bits, pmctrl_addr);
2077
2078 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2079 cfgpmcsr |= PME_EN;
2080 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2081 if (netif_msg_wol(sis_priv))
2082 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2083
2084 return 0;
2085 }
2086
2087 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2088 {
2089 long pmctrl_addr = net_dev->base_addr + pmctrl;
2090 u32 pmctrl_bits;
2091
2092 pmctrl_bits = inl(pmctrl_addr);
2093 if (pmctrl_bits & MAGICPKT)
2094 wol->wolopts |= WAKE_MAGIC;
2095 if (pmctrl_bits & LINKON)
2096 wol->wolopts |= WAKE_PHY;
2097
2098 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2099 }
2100
2101 static struct ethtool_ops sis900_ethtool_ops = {
2102 .get_drvinfo = sis900_get_drvinfo,
2103 .get_msglevel = sis900_get_msglevel,
2104 .set_msglevel = sis900_set_msglevel,
2105 .get_link = sis900_get_link,
2106 .get_settings = sis900_get_settings,
2107 .set_settings = sis900_set_settings,
2108 .nway_reset = sis900_nway_reset,
2109 .get_wol = sis900_get_wol,
2110 .set_wol = sis900_set_wol
2111 };
2112
2113 /**
2114 * mii_ioctl - process MII i/o control command
2115 * @net_dev: the net device to command for
2116 * @rq: parameter for command
2117 * @cmd: the i/o command
2118 *
2119 * Process MII command like read/write MII register
2120 */
2121
2122 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2123 {
2124 struct sis900_private *sis_priv = net_dev->priv;
2125 struct mii_ioctl_data *data = if_mii(rq);
2126
2127 switch(cmd) {
2128 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2129 data->phy_id = sis_priv->mii->phy_addr;
2130 /* Fall Through */
2131
2132 case SIOCGMIIREG: /* Read MII PHY register. */
2133 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2134 return 0;
2135
2136 case SIOCSMIIREG: /* Write MII PHY register. */
2137 if (!capable(CAP_NET_ADMIN))
2138 return -EPERM;
2139 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2140 return 0;
2141 default:
2142 return -EOPNOTSUPP;
2143 }
2144 }
2145
2146 /**
2147 * sis900_get_stats - Get sis900 read/write statistics
2148 * @net_dev: the net device to get statistics for
2149 *
2150 * get tx/rx statistics for sis900
2151 */
2152
2153 static struct net_device_stats *
2154 sis900_get_stats(struct net_device *net_dev)
2155 {
2156 struct sis900_private *sis_priv = net_dev->priv;
2157
2158 return &sis_priv->stats;
2159 }
2160
2161 /**
2162 * sis900_set_config - Set media type by net_device.set_config
2163 * @dev: the net device for media type change
2164 * @map: ifmap passed by ifconfig
2165 *
2166 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2167 * we support only port changes. All other runtime configuration
2168 * changes will be ignored
2169 */
2170
2171 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2172 {
2173 struct sis900_private *sis_priv = dev->priv;
2174 struct mii_phy *mii_phy = sis_priv->mii;
2175
2176 u16 status;
2177
2178 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2179 /* we switch on the ifmap->port field. I couldn't find anything
2180 * like a definition or standard for the values of that field.
2181 * I think the meaning of those values is device specific. But
2182 * since I would like to change the media type via the ifconfig
2183 * command I use the definition from linux/netdevice.h
2184 * (which seems to be different from the ifport(pcmcia) definition) */
2185 switch(map->port){
2186 case IF_PORT_UNKNOWN: /* use auto here */
2187 dev->if_port = map->port;
2188 /* we are going to change the media type, so the Link
2189 * will be temporary down and we need to reflect that
2190 * here. When the Link comes up again, it will be
2191 * sensed by the sis_timer procedure, which also does
2192 * all the rest for us */
2193 netif_carrier_off(dev);
2194
2195 /* read current state */
2196 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2197
2198 /* enable auto negotiation and reset the negotioation
2199 * (I don't really know what the auto negatiotiation
2200 * reset really means, but it sounds for me right to
2201 * do one here) */
2202 mdio_write(dev, mii_phy->phy_addr,
2203 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2204
2205 break;
2206
2207 case IF_PORT_10BASET: /* 10BaseT */
2208 dev->if_port = map->port;
2209
2210 /* we are going to change the media type, so the Link
2211 * will be temporary down and we need to reflect that
2212 * here. When the Link comes up again, it will be
2213 * sensed by the sis_timer procedure, which also does
2214 * all the rest for us */
2215 netif_carrier_off(dev);
2216
2217 /* set Speed to 10Mbps */
2218 /* read current state */
2219 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2220
2221 /* disable auto negotiation and force 10MBit mode*/
2222 mdio_write(dev, mii_phy->phy_addr,
2223 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2224 MII_CNTL_AUTO));
2225 break;
2226
2227 case IF_PORT_100BASET: /* 100BaseT */
2228 case IF_PORT_100BASETX: /* 100BaseTx */
2229 dev->if_port = map->port;
2230
2231 /* we are going to change the media type, so the Link
2232 * will be temporary down and we need to reflect that
2233 * here. When the Link comes up again, it will be
2234 * sensed by the sis_timer procedure, which also does
2235 * all the rest for us */
2236 netif_carrier_off(dev);
2237
2238 /* set Speed to 100Mbps */
2239 /* disable auto negotiation and enable 100MBit Mode */
2240 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2241 mdio_write(dev, mii_phy->phy_addr,
2242 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2243 MII_CNTL_SPEED);
2244
2245 break;
2246
2247 case IF_PORT_10BASE2: /* 10Base2 */
2248 case IF_PORT_AUI: /* AUI */
2249 case IF_PORT_100BASEFX: /* 100BaseFx */
2250 /* These Modes are not supported (are they?)*/
2251 return -EOPNOTSUPP;
2252 break;
2253
2254 default:
2255 return -EINVAL;
2256 }
2257 }
2258 return 0;
2259 }
2260
2261 /**
2262 * sis900_mcast_bitnr - compute hashtable index
2263 * @addr: multicast address
2264 * @revision: revision id of chip
2265 *
2266 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2267 * hash table, which makes this function a little bit different from other drivers
2268 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2269 * multicast hash table.
2270 */
2271
2272 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2273 {
2274
2275 u32 crc = ether_crc(6, addr);
2276
2277 /* leave 8 or 7 most siginifant bits */
2278 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2279 return ((int)(crc >> 24));
2280 else
2281 return ((int)(crc >> 25));
2282 }
2283
2284 /**
2285 * set_rx_mode - Set SiS900 receive mode
2286 * @net_dev: the net device to be set
2287 *
2288 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2289 * And set the appropriate multicast filter.
2290 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2291 */
2292
2293 static void set_rx_mode(struct net_device *net_dev)
2294 {
2295 long ioaddr = net_dev->base_addr;
2296 struct sis900_private * sis_priv = net_dev->priv;
2297 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2298 int i, table_entries;
2299 u32 rx_mode;
2300
2301 /* 635 Hash Table entries = 256(2^16) */
2302 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2303 (sis_priv->chipset_rev == SIS900B_900_REV))
2304 table_entries = 16;
2305 else
2306 table_entries = 8;
2307
2308 if (net_dev->flags & IFF_PROMISC) {
2309 /* Accept any kinds of packets */
2310 rx_mode = RFPromiscuous;
2311 for (i = 0; i < table_entries; i++)
2312 mc_filter[i] = 0xffff;
2313 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2314 (net_dev->flags & IFF_ALLMULTI)) {
2315 /* too many multicast addresses or accept all multicast packet */
2316 rx_mode = RFAAB | RFAAM;
2317 for (i = 0; i < table_entries; i++)
2318 mc_filter[i] = 0xffff;
2319 } else {
2320 /* Accept Broadcast packet, destination address matchs our
2321 * MAC address, use Receive Filter to reject unwanted MCAST
2322 * packets */
2323 struct dev_mc_list *mclist;
2324 rx_mode = RFAAB;
2325 for (i = 0, mclist = net_dev->mc_list;
2326 mclist && i < net_dev->mc_count;
2327 i++, mclist = mclist->next) {
2328 unsigned int bit_nr =
2329 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2330 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2331 }
2332 }
2333
2334 /* update Multicast Hash Table in Receive Filter */
2335 for (i = 0; i < table_entries; i++) {
2336 /* why plus 0x04 ??, That makes the correct value for hash table. */
2337 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2338 outl(mc_filter[i], ioaddr + rfdr);
2339 }
2340
2341 outl(RFEN | rx_mode, ioaddr + rfcr);
2342
2343 /* sis900 is capable of looping back packets at MAC level for
2344 * debugging purpose */
2345 if (net_dev->flags & IFF_LOOPBACK) {
2346 u32 cr_saved;
2347 /* We must disable Tx/Rx before setting loopback mode */
2348 cr_saved = inl(ioaddr + cr);
2349 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2350 /* enable loopback */
2351 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2352 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2353 /* restore cr */
2354 outl(cr_saved, ioaddr + cr);
2355 }
2356
2357 return;
2358 }
2359
2360 /**
2361 * sis900_reset - Reset sis900 MAC
2362 * @net_dev: the net device to reset
2363 *
2364 * reset sis900 MAC and wait until finished
2365 * reset through command register
2366 * change backoff algorithm for 900B0 & 635 M/B
2367 */
2368
2369 static void sis900_reset(struct net_device *net_dev)
2370 {
2371 struct sis900_private * sis_priv = net_dev->priv;
2372 long ioaddr = net_dev->base_addr;
2373 int i = 0;
2374 u32 status = TxRCMP | RxRCMP;
2375
2376 outl(0, ioaddr + ier);
2377 outl(0, ioaddr + imr);
2378 outl(0, ioaddr + rfcr);
2379
2380 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2381
2382 /* Check that the chip has finished the reset. */
2383 while (status && (i++ < 1000)) {
2384 status ^= (inl(isr + ioaddr) & status);
2385 }
2386
2387 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2388 (sis_priv->chipset_rev == SIS900B_900_REV) )
2389 outl(PESEL | RND_CNT, ioaddr + cfg);
2390 else
2391 outl(PESEL, ioaddr + cfg);
2392 }
2393
2394 /**
2395 * sis900_remove - Remove sis900 device
2396 * @pci_dev: the pci device to be removed
2397 *
2398 * remove and release SiS900 net device
2399 */
2400
2401 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2402 {
2403 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2404 struct sis900_private * sis_priv = net_dev->priv;
2405 struct mii_phy *phy = NULL;
2406
2407 while (sis_priv->first_mii) {
2408 phy = sis_priv->first_mii;
2409 sis_priv->first_mii = phy->next;
2410 kfree(phy);
2411 }
2412
2413 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2414 sis_priv->rx_ring_dma);
2415 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2416 sis_priv->tx_ring_dma);
2417 unregister_netdev(net_dev);
2418 free_netdev(net_dev);
2419 pci_release_regions(pci_dev);
2420 pci_set_drvdata(pci_dev, NULL);
2421 }
2422
2423 #ifdef CONFIG_PM
2424
2425 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2426 {
2427 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2428 long ioaddr = net_dev->base_addr;
2429
2430 if(!netif_running(net_dev))
2431 return 0;
2432
2433 netif_stop_queue(net_dev);
2434 netif_device_detach(net_dev);
2435
2436 /* Stop the chip's Tx and Rx Status Machine */
2437 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2438
2439 pci_set_power_state(pci_dev, PCI_D3hot);
2440 pci_save_state(pci_dev);
2441
2442 return 0;
2443 }
2444
2445 static int sis900_resume(struct pci_dev *pci_dev)
2446 {
2447 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2448 struct sis900_private *sis_priv = net_dev->priv;
2449 long ioaddr = net_dev->base_addr;
2450
2451 if(!netif_running(net_dev))
2452 return 0;
2453 pci_restore_state(pci_dev);
2454 pci_set_power_state(pci_dev, PCI_D0);
2455
2456 sis900_init_rxfilter(net_dev);
2457
2458 sis900_init_tx_ring(net_dev);
2459 sis900_init_rx_ring(net_dev);
2460
2461 set_rx_mode(net_dev);
2462
2463 netif_device_attach(net_dev);
2464 netif_start_queue(net_dev);
2465
2466 /* Workaround for EDB */
2467 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2468
2469 /* Enable all known interrupts by setting the interrupt mask. */
2470 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2471 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2472 outl(IE, ioaddr + ier);
2473
2474 sis900_check_mode(net_dev, sis_priv->mii);
2475
2476 return 0;
2477 }
2478 #endif /* CONFIG_PM */
2479
2480 static struct pci_driver sis900_pci_driver = {
2481 .name = SIS900_MODULE_NAME,
2482 .id_table = sis900_pci_tbl,
2483 .probe = sis900_probe,
2484 .remove = __devexit_p(sis900_remove),
2485 #ifdef CONFIG_PM
2486 .suspend = sis900_suspend,
2487 .resume = sis900_resume,
2488 #endif /* CONFIG_PM */
2489 };
2490
2491 static int __init sis900_init_module(void)
2492 {
2493 /* when a module, this is printed whether or not devices are found in probe */
2494 #ifdef MODULE
2495 printk(version);
2496 #endif
2497
2498 return pci_module_init(&sis900_pci_driver);
2499 }
2500
2501 static void __exit sis900_cleanup_module(void)
2502 {
2503 pci_unregister_driver(&sis900_pci_driver);
2504 }
2505
2506 module_init(sis900_init_module);
2507 module_exit(sis900_cleanup_module);
2508
Linux kernel - Deliverables
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