1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION
);
63 static int debug
= 16;
68 module_param(debug
, int, 0);
69 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data
{
76 /* used to decide which workarounds apply */
77 unsigned int generation
;
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config
;
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
91 struct phy_device
*phy_dev
;
92 struct mii_bus
*mii_bus
;
93 int phy_irq
[PHY_MAX_ADDR
];
94 unsigned int using_extphy
;
99 unsigned int gpio_setting
;
100 unsigned int gpio_orig_setting
;
101 struct net_device
*dev
;
102 struct napi_struct napi
;
104 unsigned int software_irq_signal
;
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
109 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
110 unsigned int resetcount
;
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending
;
115 unsigned int set_bits_mask
;
116 unsigned int clear_bits_mask
;
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
126 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
128 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
129 return readl(pdata
->ioaddr
+ reg
);
131 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
139 data
= ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
140 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
149 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
152 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
153 writel(val
, pdata
->ioaddr
+ reg
);
157 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
160 /* these two 16-bit writes must be performed consecutively, so
161 * must not be interrupted by our own ISR (which would start
162 * another read operation) */
163 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
164 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
165 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
166 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
173 /* Writes a packet to the TX_DATA_FIFO */
175 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
176 unsigned int wordcount
)
178 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
179 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
183 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
185 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
192 /* Reads a packet out of the RX_DATA_FIFO */
194 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
195 unsigned int wordcount
)
197 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
198 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
202 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
204 *buf
++ = smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
211 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
212 * and smsc911x_mac_write, so assumes mac_lock is held */
213 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
218 SMSC_ASSERT_MAC_LOCK(pdata
);
220 for (i
= 0; i
< 40; i
++) {
221 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
222 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
225 SMSC_WARNING(HW
, "Timed out waiting for MAC not BUSY. "
226 "MAC_CSR_CMD: 0x%08X", val
);
230 /* Fetches a MAC register value. Assumes mac_lock is acquired */
231 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
235 SMSC_ASSERT_MAC_LOCK(pdata
);
237 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
238 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
239 SMSC_WARNING(HW
, "MAC busy at entry");
243 /* Send the MAC cmd */
244 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
245 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
247 /* Workaround for hardware read-after-write restriction */
248 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
250 /* Wait for the read to complete */
251 if (likely(smsc911x_mac_complete(pdata
) == 0))
252 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
254 SMSC_WARNING(HW
, "MAC busy after read");
258 /* Set a mac register, mac_lock must be acquired before calling */
259 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
260 unsigned int offset
, u32 val
)
264 SMSC_ASSERT_MAC_LOCK(pdata
);
266 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
267 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
269 "smsc911x_mac_write failed, MAC busy at entry");
273 /* Send data to write */
274 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
276 /* Write the actual data */
277 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
278 MAC_CSR_CMD_CSR_BUSY_
));
280 /* Workaround for hardware read-after-write restriction */
281 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
283 /* Wait for the write to complete */
284 if (likely(smsc911x_mac_complete(pdata
) == 0))
288 "smsc911x_mac_write failed, MAC busy after write");
291 /* Get a phy register */
292 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
294 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
299 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
301 /* Confirm MII not busy */
302 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
304 "MII is busy in smsc911x_mii_read???");
309 /* Set the address, index & direction (read from PHY) */
310 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
311 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
313 /* Wait for read to complete w/ timeout */
314 for (i
= 0; i
< 100; i
++)
315 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
316 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
320 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
324 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
328 /* Set a phy register */
329 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
332 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
337 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
339 /* Confirm MII not busy */
340 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
342 "MII is busy in smsc911x_mii_write???");
347 /* Put the data to write in the MAC */
348 smsc911x_mac_write(pdata
, MII_DATA
, val
);
350 /* Set the address, index & direction (write to PHY) */
351 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
353 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
355 /* Wait for write to complete w/ timeout */
356 for (i
= 0; i
< 100; i
++)
357 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
362 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
366 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
370 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
371 * If something goes wrong, returns -ENODEV to revert back to internal phy.
372 * Performed at initialisation only, so interrupts are enabled */
373 static int smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
375 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
377 /* External phy is requested, supported, and detected */
378 if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
380 /* Switch to external phy. Assuming tx and rx are stopped
381 * because smsc911x_phy_initialise is called before
382 * smsc911x_rx_initialise and tx_initialise. */
384 /* Disable phy clocks to the MAC */
385 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
386 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
387 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
388 udelay(10); /* Enough time for clocks to stop */
390 /* Switch to external phy */
391 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
392 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
394 /* Enable phy clocks to the MAC */
395 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
396 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
397 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
398 udelay(10); /* Enough time for clocks to restart */
400 hwcfg
|= HW_CFG_SMI_SEL_
;
401 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
403 SMSC_TRACE(HW
, "Successfully switched to external PHY");
404 pdata
->using_extphy
= 1;
406 SMSC_WARNING(HW
, "No external PHY detected, "
407 "Using internal PHY instead.");
408 /* Use internal phy */
414 /* Fetches a tx status out of the status fifo */
415 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
417 unsigned int result
=
418 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
421 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
426 /* Fetches the next rx status */
427 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
429 unsigned int result
=
430 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
433 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
438 #ifdef USE_PHY_WORK_AROUND
439 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
446 for (tries
= 0; tries
< 10; tries
++) {
447 unsigned int txcmd_a
;
448 unsigned int txcmd_b
;
450 unsigned int pktlength
;
453 /* Zero-out rx packet memory */
454 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
456 /* Write tx packet to 118 */
457 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
458 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
459 txcmd_a
|= MIN_PACKET_SIZE
;
461 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
463 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
464 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
466 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
467 wrsz
= MIN_PACKET_SIZE
+ 3;
468 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
471 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
473 /* Wait till transmit is done */
477 status
= smsc911x_tx_get_txstatus(pdata
);
478 } while ((i
--) && (!status
));
481 SMSC_WARNING(HW
, "Failed to transmit "
482 "during loopback test");
485 if (status
& TX_STS_ES_
) {
486 SMSC_WARNING(HW
, "Transmit encountered "
487 "errors during loopback test");
491 /* Wait till receive is done */
495 status
= smsc911x_rx_get_rxstatus(pdata
);
496 } while ((i
--) && (!status
));
500 "Failed to receive during loopback test");
503 if (status
& RX_STS_ES_
) {
504 SMSC_WARNING(HW
, "Receive encountered "
505 "errors during loopback test");
509 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
510 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
511 rdsz
= pktlength
+ 3;
512 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
515 smsc911x_rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
517 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
518 SMSC_WARNING(HW
, "Unexpected packet size "
519 "during loop back test, size=%d, will retry",
524 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
525 if (pdata
->loopback_tx_pkt
[j
]
526 != pdata
->loopback_rx_pkt
[j
]) {
532 SMSC_TRACE(HW
, "Successfully verified "
536 SMSC_WARNING(HW
, "Data mismatch "
537 "during loop back test, will retry");
545 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
547 struct phy_device
*phy_dev
= pdata
->phy_dev
;
549 unsigned int i
= 100000;
552 BUG_ON(!phy_dev
->bus
);
554 SMSC_TRACE(HW
, "Performing PHY BCR Reset");
555 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
558 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
560 } while ((i
--) && (temp
& BMCR_RESET
));
562 if (temp
& BMCR_RESET
) {
563 SMSC_WARNING(HW
, "PHY reset failed to complete.");
566 /* Extra delay required because the phy may not be completed with
567 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
568 * enough delay but using 1ms here to be safe */
574 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
576 struct smsc911x_data
*pdata
= netdev_priv(dev
);
577 struct phy_device
*phy_dev
= pdata
->phy_dev
;
582 /* Initialise tx packet using broadcast destination address */
583 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
585 /* Use incrementing source address */
586 for (i
= 6; i
< 12; i
++)
587 pdata
->loopback_tx_pkt
[i
] = (char)i
;
589 /* Set length type field */
590 pdata
->loopback_tx_pkt
[12] = 0x00;
591 pdata
->loopback_tx_pkt
[13] = 0x00;
593 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
594 pdata
->loopback_tx_pkt
[i
] = (char)i
;
596 val
= smsc911x_reg_read(pdata
, HW_CFG
);
597 val
&= HW_CFG_TX_FIF_SZ_
;
599 smsc911x_reg_write(pdata
, HW_CFG
, val
);
601 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
602 smsc911x_reg_write(pdata
, RX_CFG
,
603 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
605 for (i
= 0; i
< 10; i
++) {
606 /* Set PHY to 10/FD, no ANEG, and loopback mode */
607 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
608 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
610 /* Enable MAC tx/rx, FD */
611 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
612 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
613 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
614 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
616 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
623 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
624 smsc911x_mac_write(pdata
, MAC_CR
, 0);
625 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
627 smsc911x_phy_reset(pdata
);
631 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
632 smsc911x_mac_write(pdata
, MAC_CR
, 0);
633 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
635 /* Cancel PHY loopback mode */
636 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
638 smsc911x_reg_write(pdata
, TX_CFG
, 0);
639 smsc911x_reg_write(pdata
, RX_CFG
, 0);
643 #endif /* USE_PHY_WORK_AROUND */
645 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
647 struct phy_device
*phy_dev
= pdata
->phy_dev
;
648 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
652 if (phy_dev
->duplex
== DUPLEX_FULL
) {
653 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
654 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
655 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
657 if (cap
& FLOW_CTRL_RX
)
662 if (cap
& FLOW_CTRL_TX
)
667 SMSC_TRACE(HW
, "rx pause %s, tx pause %s",
668 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
669 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
671 SMSC_TRACE(HW
, "half duplex");
676 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
677 smsc911x_mac_write(pdata
, FLOW
, flow
);
678 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
680 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
683 /* Update link mode if anything has changed. Called periodically when the
684 * PHY is in polling mode, even if nothing has changed. */
685 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
687 struct smsc911x_data
*pdata
= netdev_priv(dev
);
688 struct phy_device
*phy_dev
= pdata
->phy_dev
;
692 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
694 SMSC_TRACE(HW
, "duplex state has changed");
696 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
697 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
698 if (phy_dev
->duplex
) {
700 "configuring for full duplex mode");
701 mac_cr
|= MAC_CR_FDPX_
;
704 "configuring for half duplex mode");
705 mac_cr
&= ~MAC_CR_FDPX_
;
707 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
708 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
710 smsc911x_phy_update_flowcontrol(pdata
);
711 pdata
->last_duplex
= phy_dev
->duplex
;
714 carrier
= netif_carrier_ok(dev
);
715 if (carrier
!= pdata
->last_carrier
) {
716 SMSC_TRACE(HW
, "carrier state has changed");
718 SMSC_TRACE(HW
, "configuring for carrier OK");
719 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
720 (!pdata
->using_extphy
)) {
721 /* Restore orginal GPIO configuration */
722 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
723 smsc911x_reg_write(pdata
, GPIO_CFG
,
724 pdata
->gpio_setting
);
727 SMSC_TRACE(HW
, "configuring for no carrier");
728 /* Check global setting that LED1
729 * usage is 10/100 indicator */
730 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
732 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
)
733 && (!pdata
->using_extphy
)) {
734 /* Force 10/100 LED off, after saving
735 * orginal GPIO configuration */
736 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
738 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
739 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
742 smsc911x_reg_write(pdata
, GPIO_CFG
,
743 pdata
->gpio_setting
);
746 pdata
->last_carrier
= carrier
;
750 static int smsc911x_mii_probe(struct net_device
*dev
)
752 struct smsc911x_data
*pdata
= netdev_priv(dev
);
753 struct phy_device
*phydev
= NULL
;
756 /* find the first phy */
757 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
758 if (pdata
->mii_bus
->phy_map
[phy_addr
]) {
759 phydev
= pdata
->mii_bus
->phy_map
[phy_addr
];
760 SMSC_TRACE(PROBE
, "PHY %d: addr %d, phy_id 0x%08X",
761 phy_addr
, phydev
->addr
, phydev
->phy_id
);
767 pr_err("%s: no PHY found\n", dev
->name
);
771 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
772 &smsc911x_phy_adjust_link
, 0, pdata
->config
.phy_interface
);
774 if (IS_ERR(phydev
)) {
775 pr_err("%s: Could not attach to PHY\n", dev
->name
);
776 return PTR_ERR(phydev
);
779 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
780 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
782 /* mask with MAC supported features */
783 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
784 SUPPORTED_Asym_Pause
);
785 phydev
->advertising
= phydev
->supported
;
787 pdata
->phy_dev
= phydev
;
788 pdata
->last_duplex
= -1;
789 pdata
->last_carrier
= -1;
791 #ifdef USE_PHY_WORK_AROUND
792 if (smsc911x_phy_loopbacktest(dev
) < 0) {
793 SMSC_WARNING(HW
, "Failed Loop Back Test");
796 SMSC_TRACE(HW
, "Passed Loop Back Test");
797 #endif /* USE_PHY_WORK_AROUND */
799 SMSC_TRACE(HW
, "phy initialised succesfully");
803 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
804 struct net_device
*dev
)
806 struct smsc911x_data
*pdata
= netdev_priv(dev
);
809 pdata
->mii_bus
= mdiobus_alloc();
810 if (!pdata
->mii_bus
) {
815 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
816 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", pdev
->id
);
817 pdata
->mii_bus
->priv
= pdata
;
818 pdata
->mii_bus
->read
= smsc911x_mii_read
;
819 pdata
->mii_bus
->write
= smsc911x_mii_write
;
820 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
821 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
822 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
824 pdata
->mii_bus
->parent
= &pdev
->dev
;
825 dev_set_drvdata(&pdev
->dev
, &pdata
->mii_bus
);
827 pdata
->using_extphy
= 0;
829 switch (pdata
->idrev
& 0xFFFF0000) {
834 /* External PHY supported, try to autodetect */
835 if (smsc911x_phy_initialise_external(pdata
) < 0) {
836 SMSC_TRACE(HW
, "No external PHY detected, "
837 "using internal PHY");
841 SMSC_TRACE(HW
, "External PHY is not supported, "
842 "using internal PHY");
846 if (!pdata
->using_extphy
) {
847 /* Mask all PHYs except ID 1 (internal) */
848 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
851 if (mdiobus_register(pdata
->mii_bus
)) {
852 SMSC_WARNING(PROBE
, "Error registering mii bus");
853 goto err_out_free_bus_2
;
856 if (smsc911x_mii_probe(dev
) < 0) {
857 SMSC_WARNING(PROBE
, "Error registering mii bus");
858 goto err_out_unregister_bus_3
;
863 err_out_unregister_bus_3
:
864 mdiobus_unregister(pdata
->mii_bus
);
866 mdiobus_free(pdata
->mii_bus
);
871 /* Gets the number of tx statuses in the fifo */
872 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
874 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
875 & TX_FIFO_INF_TSUSED_
) >> 16;
878 /* Reads tx statuses and increments counters where necessary */
879 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
881 struct smsc911x_data
*pdata
= netdev_priv(dev
);
882 unsigned int tx_stat
;
884 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
885 if (unlikely(tx_stat
& 0x80000000)) {
886 /* In this driver the packet tag is used as the packet
887 * length. Since a packet length can never reach the
888 * size of 0x8000, this bit is reserved. It is worth
889 * noting that the "reserved bit" in the warning above
890 * does not reference a hardware defined reserved bit
891 * but rather a driver defined one.
894 "Packet tag reserved bit is high");
896 if (unlikely(tx_stat
& 0x00008000)) {
897 dev
->stats
.tx_errors
++;
899 dev
->stats
.tx_packets
++;
900 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
902 if (unlikely(tx_stat
& 0x00000100)) {
903 dev
->stats
.collisions
+= 16;
904 dev
->stats
.tx_aborted_errors
+= 1;
906 dev
->stats
.collisions
+=
907 ((tx_stat
>> 3) & 0xF);
909 if (unlikely(tx_stat
& 0x00000800))
910 dev
->stats
.tx_carrier_errors
+= 1;
911 if (unlikely(tx_stat
& 0x00000200)) {
912 dev
->stats
.collisions
++;
913 dev
->stats
.tx_aborted_errors
++;
919 /* Increments the Rx error counters */
921 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
925 if (unlikely(rxstat
& 0x00008000)) {
926 dev
->stats
.rx_errors
++;
927 if (unlikely(rxstat
& 0x00000002)) {
928 dev
->stats
.rx_crc_errors
++;
932 if (likely(!crc_err
)) {
933 if (unlikely((rxstat
& 0x00001020) == 0x00001020)) {
934 /* Frame type indicates length,
935 * and length error is set */
936 dev
->stats
.rx_length_errors
++;
938 if (rxstat
& RX_STS_MCAST_
)
939 dev
->stats
.multicast
++;
943 /* Quickly dumps bad packets */
945 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
947 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
949 if (likely(pktwords
>= 4)) {
950 unsigned int timeout
= 500;
952 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
955 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
956 } while (timeout
-- && (val
& RX_DP_CTRL_RX_FFWD_
));
958 if (unlikely(timeout
== 0))
959 SMSC_WARNING(HW
, "Timed out waiting for "
960 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
964 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
968 /* NAPI poll function */
969 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
971 struct smsc911x_data
*pdata
=
972 container_of(napi
, struct smsc911x_data
, napi
);
973 struct net_device
*dev
= pdata
->dev
;
976 while (likely(netif_running(dev
)) && (npackets
< budget
)) {
977 unsigned int pktlength
;
978 unsigned int pktwords
;
980 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
984 /* We processed all packets available. Tell NAPI it can
985 * stop polling then re-enable rx interrupts */
986 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
987 netif_rx_complete(dev
, napi
);
988 temp
= smsc911x_reg_read(pdata
, INT_EN
);
989 temp
|= INT_EN_RSFL_EN_
;
990 smsc911x_reg_write(pdata
, INT_EN
, temp
);
994 /* Count packet for NAPI scheduling, even if it has an error.
995 * Error packets still require cycles to discard */
998 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
999 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1000 smsc911x_rx_counterrors(dev
, rxstat
);
1002 if (unlikely(rxstat
& RX_STS_ES_
)) {
1003 SMSC_WARNING(RX_ERR
,
1004 "Discarding packet with error bit set");
1005 /* Packet has an error, discard it and continue with
1007 smsc911x_rx_fastforward(pdata
, pktwords
);
1008 dev
->stats
.rx_dropped
++;
1012 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1013 if (unlikely(!skb
)) {
1014 SMSC_WARNING(RX_ERR
,
1015 "Unable to allocate skb for rx packet");
1016 /* Drop the packet and stop this polling iteration */
1017 smsc911x_rx_fastforward(pdata
, pktwords
);
1018 dev
->stats
.rx_dropped
++;
1022 skb
->data
= skb
->head
;
1023 skb_reset_tail_pointer(skb
);
1025 /* Align IP on 16B boundary */
1026 skb_reserve(skb
, NET_IP_ALIGN
);
1027 skb_put(skb
, pktlength
- 4);
1028 smsc911x_rx_readfifo(pdata
, (unsigned int *)skb
->head
,
1030 skb
->protocol
= eth_type_trans(skb
, dev
);
1031 skb
->ip_summed
= CHECKSUM_NONE
;
1032 netif_receive_skb(skb
);
1034 /* Update counters */
1035 dev
->stats
.rx_packets
++;
1036 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1037 dev
->last_rx
= jiffies
;
1040 /* Return total received packets */
1044 /* Returns hash bit number for given MAC address
1046 * 01 00 5E 00 00 01 -> returns bit number 31 */
1047 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1049 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1052 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1054 /* Performs the multicast & mac_cr update. This is called when
1055 * safe on the current hardware, and with the mac_lock held */
1056 unsigned int mac_cr
;
1058 SMSC_ASSERT_MAC_LOCK(pdata
);
1060 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1061 mac_cr
|= pdata
->set_bits_mask
;
1062 mac_cr
&= ~(pdata
->clear_bits_mask
);
1063 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1064 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1065 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1066 SMSC_TRACE(HW
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1067 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1070 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1072 unsigned int mac_cr
;
1074 /* This function is only called for older LAN911x devices
1075 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1076 * be modified during Rx - newer devices immediately update the
1079 * This is called from interrupt context */
1081 spin_lock(&pdata
->mac_lock
);
1083 /* Check Rx has stopped */
1084 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1085 SMSC_WARNING(DRV
, "Rx not stopped");
1087 /* Perform the update - safe to do now Rx has stopped */
1088 smsc911x_rx_multicast_update(pdata
);
1091 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1092 mac_cr
|= MAC_CR_RXEN_
;
1093 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1095 pdata
->multicast_update_pending
= 0;
1097 spin_unlock(&pdata
->mac_lock
);
1100 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1102 unsigned int timeout
;
1105 /* Reset the LAN911x */
1106 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1110 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1111 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1113 if (unlikely(temp
& HW_CFG_SRST_
)) {
1114 SMSC_WARNING(DRV
, "Failed to complete reset");
1120 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1122 smsc911x_set_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1124 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1125 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1126 (dev_addr
[1] << 8) | dev_addr
[0];
1128 SMSC_ASSERT_MAC_LOCK(pdata
);
1130 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1131 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1134 static int smsc911x_open(struct net_device
*dev
)
1136 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1137 unsigned int timeout
;
1139 unsigned int intcfg
;
1141 /* if the phy is not yet registered, retry later*/
1142 if (!pdata
->phy_dev
) {
1143 SMSC_WARNING(HW
, "phy_dev is NULL");
1147 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1148 SMSC_WARNING(HW
, "dev_addr is not a valid MAC address");
1149 return -EADDRNOTAVAIL
;
1152 /* Reset the LAN911x */
1153 if (smsc911x_soft_reset(pdata
)) {
1154 SMSC_WARNING(HW
, "soft reset failed");
1158 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1159 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1161 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1163 while ((timeout
--) &&
1164 (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
)) {
1168 if (unlikely(timeout
== 0))
1170 "Timed out waiting for EEPROM busy bit to clear");
1172 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1174 /* The soft reset above cleared the device's MAC address,
1175 * restore it from local copy (set in probe) */
1176 spin_lock_irq(&pdata
->mac_lock
);
1177 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
1178 spin_unlock_irq(&pdata
->mac_lock
);
1180 /* Initialise irqs, but leave all sources disabled */
1181 smsc911x_reg_write(pdata
, INT_EN
, 0);
1182 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1184 /* Set interrupt deassertion to 100uS */
1185 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1187 if (pdata
->config
.irq_polarity
) {
1188 SMSC_TRACE(IFUP
, "irq polarity: active high");
1189 intcfg
|= INT_CFG_IRQ_POL_
;
1191 SMSC_TRACE(IFUP
, "irq polarity: active low");
1194 if (pdata
->config
.irq_type
) {
1195 SMSC_TRACE(IFUP
, "irq type: push-pull");
1196 intcfg
|= INT_CFG_IRQ_TYPE_
;
1198 SMSC_TRACE(IFUP
, "irq type: open drain");
1201 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1203 SMSC_TRACE(IFUP
, "Testing irq handler using IRQ %d", dev
->irq
);
1204 pdata
->software_irq_signal
= 0;
1207 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1208 temp
|= INT_EN_SW_INT_EN_
;
1209 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1213 if (pdata
->software_irq_signal
)
1218 if (!pdata
->software_irq_signal
) {
1219 dev_warn(&dev
->dev
, "ISR failed signaling test (IRQ %d)\n",
1223 SMSC_TRACE(IFUP
, "IRQ handler passed test using IRQ %d", dev
->irq
);
1225 dev_info(&dev
->dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1226 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1228 /* Bring the PHY up */
1229 phy_start(pdata
->phy_dev
);
1231 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1232 /* Preserve TX FIFO size and external PHY configuration */
1233 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1235 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1237 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1238 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1239 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1240 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1242 /* set RX Data offset to 2 bytes for alignment */
1243 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1245 /* enable NAPI polling before enabling RX interrupts */
1246 napi_enable(&pdata
->napi
);
1248 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1249 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
);
1250 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1252 spin_lock_irq(&pdata
->mac_lock
);
1253 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1254 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1255 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1256 spin_unlock_irq(&pdata
->mac_lock
);
1258 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1260 netif_start_queue(dev
);
1264 /* Entry point for stopping the interface */
1265 static int smsc911x_stop(struct net_device
*dev
)
1267 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1270 BUG_ON(!pdata
->phy_dev
);
1272 /* Disable all device interrupts */
1273 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1274 temp
&= ~INT_CFG_IRQ_EN_
;
1275 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1277 /* Stop Tx and Rx polling */
1278 netif_stop_queue(dev
);
1279 napi_disable(&pdata
->napi
);
1281 /* At this point all Rx and Tx activity is stopped */
1282 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1283 smsc911x_tx_update_txcounters(dev
);
1285 /* Bring the PHY down */
1286 phy_stop(pdata
->phy_dev
);
1288 SMSC_TRACE(IFDOWN
, "Interface stopped");
1292 /* Entry point for transmitting a packet */
1293 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1295 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1296 unsigned int freespace
;
1297 unsigned int tx_cmd_a
;
1298 unsigned int tx_cmd_b
;
1303 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1305 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1306 SMSC_WARNING(TX_ERR
,
1307 "Tx data fifo low, space available: %d", freespace
);
1309 /* Word alignment adjustment */
1310 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1311 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1312 tx_cmd_a
|= (unsigned int)skb
->len
;
1314 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1315 tx_cmd_b
|= (unsigned int)skb
->len
;
1317 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1318 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1320 bufp
= (ulong
)skb
->data
& (~0x3);
1321 wrsz
= (u32
)skb
->len
+ 3;
1322 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1325 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1326 freespace
-= (skb
->len
+ 32);
1328 dev
->trans_start
= jiffies
;
1330 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1331 smsc911x_tx_update_txcounters(dev
);
1333 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1334 netif_stop_queue(dev
);
1335 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1338 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1341 return NETDEV_TX_OK
;
1344 /* Entry point for getting status counters */
1345 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1347 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1348 smsc911x_tx_update_txcounters(dev
);
1349 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1353 /* Entry point for setting addressing modes */
1354 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1356 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1357 unsigned long flags
;
1359 if (dev
->flags
& IFF_PROMISC
) {
1360 /* Enabling promiscuous mode */
1361 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1362 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1365 } else if (dev
->flags
& IFF_ALLMULTI
) {
1366 /* Enabling all multicast mode */
1367 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1368 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1371 } else if (dev
->mc_count
> 0) {
1372 /* Enabling specific multicast addresses */
1373 unsigned int hash_high
= 0;
1374 unsigned int hash_low
= 0;
1375 unsigned int count
= 0;
1376 struct dev_mc_list
*mc_list
= dev
->mc_list
;
1378 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1379 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1383 if ((mc_list
->dmi_addrlen
) == ETH_ALEN
) {
1384 unsigned int bitnum
=
1385 smsc911x_hash(mc_list
->dmi_addr
);
1386 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1392 SMSC_WARNING(DRV
, "dmi_addrlen != 6");
1394 mc_list
= mc_list
->next
;
1396 if (count
!= (unsigned int)dev
->mc_count
)
1397 SMSC_WARNING(DRV
, "mc_count != dev->mc_count");
1399 pdata
->hashhi
= hash_high
;
1400 pdata
->hashlo
= hash_low
;
1402 /* Enabling local MAC address only */
1403 pdata
->set_bits_mask
= 0;
1404 pdata
->clear_bits_mask
=
1405 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1410 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1412 if (pdata
->generation
<= 1) {
1413 /* Older hardware revision - cannot change these flags while
1415 if (!pdata
->multicast_update_pending
) {
1417 SMSC_TRACE(HW
, "scheduling mcast update");
1418 pdata
->multicast_update_pending
= 1;
1420 /* Request the hardware to stop, then perform the
1421 * update when we get an RX_STOP interrupt */
1422 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1423 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1424 temp
|= INT_EN_RXSTOP_INT_EN_
;
1425 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1427 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1428 temp
&= ~(MAC_CR_RXEN_
);
1429 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1431 /* There is another update pending, this should now
1432 * use the newer values */
1435 /* Newer hardware revision - can write immediately */
1436 smsc911x_rx_multicast_update(pdata
);
1439 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1442 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1444 struct net_device
*dev
= dev_id
;
1445 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1446 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1447 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1448 int serviced
= IRQ_NONE
;
1451 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1452 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1453 temp
&= (~INT_EN_SW_INT_EN_
);
1454 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1455 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1456 pdata
->software_irq_signal
= 1;
1458 serviced
= IRQ_HANDLED
;
1461 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1462 /* Called when there is a multicast update scheduled and
1463 * it is now safe to complete the update */
1464 SMSC_TRACE(INTR
, "RX Stop interrupt");
1465 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1466 temp
&= (~INT_EN_RXSTOP_INT_EN_
);
1467 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1468 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1469 smsc911x_rx_multicast_update_workaround(pdata
);
1470 serviced
= IRQ_HANDLED
;
1473 if (intsts
& inten
& INT_STS_TDFA_
) {
1474 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1475 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1476 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1477 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1478 netif_wake_queue(dev
);
1479 serviced
= IRQ_HANDLED
;
1482 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1483 SMSC_TRACE(INTR
, "RX Error interrupt");
1484 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1485 serviced
= IRQ_HANDLED
;
1488 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1489 if (likely(netif_rx_schedule_prep(dev
, &pdata
->napi
))) {
1490 /* Disable Rx interrupts */
1491 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1492 temp
&= (~INT_EN_RSFL_EN_
);
1493 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1494 /* Schedule a NAPI poll */
1495 __netif_rx_schedule(dev
, &pdata
->napi
);
1497 SMSC_WARNING(RX_ERR
,
1498 "netif_rx_schedule_prep failed");
1500 serviced
= IRQ_HANDLED
;
1506 #ifdef CONFIG_NET_POLL_CONTROLLER
1507 static void smsc911x_poll_controller(struct net_device
*dev
)
1509 disable_irq(dev
->irq
);
1510 smsc911x_irqhandler(0, dev
);
1511 enable_irq(dev
->irq
);
1513 #endif /* CONFIG_NET_POLL_CONTROLLER */
1515 /* Standard ioctls for mii-tool */
1516 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1518 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1520 if (!netif_running(dev
) || !pdata
->phy_dev
)
1523 return phy_mii_ioctl(pdata
->phy_dev
, if_mii(ifr
), cmd
);
1527 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1529 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1533 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1537 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1539 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1541 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1544 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1545 struct ethtool_drvinfo
*info
)
1547 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1548 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1549 strlcpy(info
->bus_info
, dev
->dev
.parent
->bus_id
,
1550 sizeof(info
->bus_info
));
1553 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1555 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1557 return phy_start_aneg(pdata
->phy_dev
);
1560 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1562 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1563 return pdata
->msg_enable
;
1566 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1568 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1569 pdata
->msg_enable
= level
;
1572 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1574 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1579 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1582 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1583 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1584 unsigned long flags
;
1589 regs
->version
= pdata
->idrev
;
1590 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1591 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1593 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1594 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1595 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1596 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1599 for (i
= 0; i
<= 31; i
++)
1600 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1603 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1605 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1606 temp
&= ~GPIO_CFG_EEPR_EN_
;
1607 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1611 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1616 SMSC_TRACE(DRV
, "op 0x%08x", op
);
1617 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1618 SMSC_WARNING(DRV
, "Busy at start");
1622 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1623 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1627 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1628 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (timeout
--));
1631 SMSC_TRACE(DRV
, "TIMED OUT");
1635 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1636 SMSC_TRACE(DRV
, "Error occured during eeprom operation");
1643 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1644 u8 address
, u8
*data
)
1646 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1649 SMSC_TRACE(DRV
, "address 0x%x", address
);
1650 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1653 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1658 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1659 u8 address
, u8 data
)
1661 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1664 SMSC_TRACE(DRV
, "address 0x%x, data 0x%x", address
, data
);
1665 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1668 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
1669 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
1670 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1676 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
1678 return SMSC911X_EEPROM_SIZE
;
1681 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
1682 struct ethtool_eeprom
*eeprom
, u8
*data
)
1684 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1685 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
1689 smsc911x_eeprom_enable_access(pdata
);
1691 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
1692 for (i
= 0; i
< len
; i
++) {
1693 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
1700 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
1705 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
1706 struct ethtool_eeprom
*eeprom
, u8
*data
)
1709 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1711 smsc911x_eeprom_enable_access(pdata
);
1712 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
1713 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
1714 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
1716 /* Single byte write, according to man page */
1722 static struct ethtool_ops smsc911x_ethtool_ops
= {
1723 .get_settings
= smsc911x_ethtool_getsettings
,
1724 .set_settings
= smsc911x_ethtool_setsettings
,
1725 .get_link
= ethtool_op_get_link
,
1726 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
1727 .nway_reset
= smsc911x_ethtool_nwayreset
,
1728 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
1729 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
1730 .get_regs_len
= smsc911x_ethtool_getregslen
,
1731 .get_regs
= smsc911x_ethtool_getregs
,
1732 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
1733 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
1734 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
1737 /* Initializing private device structures, only called from probe */
1738 static int __devinit
smsc911x_init(struct net_device
*dev
)
1740 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1741 unsigned int byte_test
;
1743 SMSC_TRACE(PROBE
, "Driver Parameters:");
1744 SMSC_TRACE(PROBE
, "LAN base: 0x%08lX",
1745 (unsigned long)pdata
->ioaddr
);
1746 SMSC_TRACE(PROBE
, "IRQ: %d", dev
->irq
);
1747 SMSC_TRACE(PROBE
, "PHY will be autodetected.");
1749 spin_lock_init(&pdata
->dev_lock
);
1751 if (pdata
->ioaddr
== 0) {
1752 SMSC_WARNING(PROBE
, "pdata->ioaddr: 0x00000000");
1756 /* Check byte ordering */
1757 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1758 SMSC_TRACE(PROBE
, "BYTE_TEST: 0x%08X", byte_test
);
1759 if (byte_test
== 0x43218765) {
1760 SMSC_TRACE(PROBE
, "BYTE_TEST looks swapped, "
1761 "applying WORD_SWAP");
1762 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
1764 /* 1 dummy read of BYTE_TEST is needed after a write to
1765 * WORD_SWAP before its contents are valid */
1766 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1768 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1771 if (byte_test
!= 0x87654321) {
1772 SMSC_WARNING(DRV
, "BYTE_TEST: 0x%08X", byte_test
);
1773 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
1775 "top 16 bits equal to bottom 16 bits");
1776 SMSC_TRACE(PROBE
, "This may mean the chip is set "
1777 "for 32 bit while the bus is reading 16 bit");
1782 /* Default generation to zero (all workarounds apply) */
1783 pdata
->generation
= 0;
1785 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
1786 switch (pdata
->idrev
& 0xFFFF0000) {
1791 /* LAN911[5678] family */
1792 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
1799 /* LAN921[5678] family */
1800 pdata
->generation
= 3;
1807 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1808 pdata
->generation
= 4;
1812 SMSC_WARNING(PROBE
, "LAN911x not identified, idrev: 0x%08X",
1817 SMSC_TRACE(PROBE
, "LAN911x identified, idrev: 0x%08X, generation: %d",
1818 pdata
->idrev
, pdata
->generation
);
1820 if (pdata
->generation
== 0)
1822 "This driver is not intended for this chip revision");
1824 /* Reset the LAN911x */
1825 if (smsc911x_soft_reset(pdata
))
1828 /* Disable all interrupt sources until we bring the device up */
1829 smsc911x_reg_write(pdata
, INT_EN
, 0);
1832 dev
->open
= smsc911x_open
;
1833 dev
->stop
= smsc911x_stop
;
1834 dev
->hard_start_xmit
= smsc911x_hard_start_xmit
;
1835 dev
->get_stats
= smsc911x_get_stats
;
1836 dev
->set_multicast_list
= smsc911x_set_multicast_list
;
1837 dev
->flags
|= IFF_MULTICAST
;
1838 dev
->do_ioctl
= smsc911x_do_ioctl
;
1839 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
1840 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
1842 #ifdef CONFIG_NET_POLL_CONTROLLER
1843 dev
->poll_controller
= smsc911x_poll_controller
;
1844 #endif /* CONFIG_NET_POLL_CONTROLLER */
1849 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
1851 struct net_device
*dev
;
1852 struct smsc911x_data
*pdata
;
1853 struct resource
*res
;
1855 dev
= platform_get_drvdata(pdev
);
1857 pdata
= netdev_priv(dev
);
1859 BUG_ON(!pdata
->ioaddr
);
1860 BUG_ON(!pdata
->phy_dev
);
1862 SMSC_TRACE(IFDOWN
, "Stopping driver.");
1864 phy_disconnect(pdata
->phy_dev
);
1865 pdata
->phy_dev
= NULL
;
1866 mdiobus_unregister(pdata
->mii_bus
);
1867 mdiobus_free(pdata
->mii_bus
);
1869 platform_set_drvdata(pdev
, NULL
);
1870 unregister_netdev(dev
);
1871 free_irq(dev
->irq
, dev
);
1872 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1875 platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1877 release_mem_region(res
->start
, res
->end
- res
->start
);
1879 iounmap(pdata
->ioaddr
);
1886 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
1888 struct net_device
*dev
;
1889 struct smsc911x_data
*pdata
;
1890 struct smsc911x_platform_config
*config
= pdev
->dev
.platform_data
;
1891 struct resource
*res
;
1892 unsigned int intcfg
= 0;
1895 DECLARE_MAC_BUF(mac
);
1897 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME
, SMSC_DRV_VERSION
);
1899 /* platform data specifies irq & dynamic bus configuration */
1900 if (!pdev
->dev
.platform_data
) {
1901 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME
);
1906 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1909 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1911 pr_warning("%s: Could not allocate resource.\n",
1916 res_size
= res
->end
- res
->start
;
1918 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
1923 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
1925 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME
);
1927 goto out_release_io_1
;
1930 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1932 pdata
= netdev_priv(dev
);
1934 dev
->irq
= platform_get_irq(pdev
, 0);
1935 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
1937 /* copy config parameters across to pdata */
1938 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
1941 pdata
->msg_enable
= ((1 << debug
) - 1);
1943 if (pdata
->ioaddr
== NULL
) {
1945 "Error smsc911x base address invalid");
1947 goto out_free_netdev_2
;
1950 retval
= smsc911x_init(dev
);
1952 goto out_unmap_io_3
;
1954 /* configure irq polarity and type before connecting isr */
1955 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
1956 intcfg
|= INT_CFG_IRQ_POL_
;
1958 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
1959 intcfg
|= INT_CFG_IRQ_TYPE_
;
1961 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1963 /* Ensure interrupts are globally disabled before connecting ISR */
1964 smsc911x_reg_write(pdata
, INT_EN
, 0);
1965 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1967 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
, IRQF_DISABLED
,
1968 SMSC_CHIPNAME
, dev
);
1971 "Unable to claim requested irq: %d", dev
->irq
);
1972 goto out_unmap_io_3
;
1975 platform_set_drvdata(pdev
, dev
);
1977 retval
= register_netdev(dev
);
1980 "Error %i registering device", retval
);
1981 goto out_unset_drvdata_4
;
1983 SMSC_TRACE(PROBE
, "Network interface: \"%s\"", dev
->name
);
1986 spin_lock_init(&pdata
->mac_lock
);
1988 retval
= smsc911x_mii_init(pdev
, dev
);
1991 "Error %i initialising mii", retval
);
1992 goto out_unregister_netdev_5
;
1995 spin_lock_irq(&pdata
->mac_lock
);
1997 /* Check if mac address has been specified when bringing interface up */
1998 if (is_valid_ether_addr(dev
->dev_addr
)) {
1999 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2000 SMSC_TRACE(PROBE
, "MAC Address is specified by configuration");
2002 /* Try reading mac address from device. if EEPROM is present
2003 * it will already have been set */
2004 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2005 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2006 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2007 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2008 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2009 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2010 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2011 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2013 if (is_valid_ether_addr(dev
->dev_addr
)) {
2014 /* eeprom values are valid so use them */
2016 "Mac Address is read from LAN911x EEPROM");
2018 /* eeprom values are invalid, generate random MAC */
2019 random_ether_addr(dev
->dev_addr
);
2020 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2022 "MAC Address is set to random_ether_addr");
2026 spin_unlock_irq(&pdata
->mac_lock
);
2028 dev_info(&dev
->dev
, "MAC Address: %s\n",
2029 print_mac(mac
, dev
->dev_addr
));
2033 out_unregister_netdev_5
:
2034 unregister_netdev(dev
);
2035 out_unset_drvdata_4
:
2036 platform_set_drvdata(pdev
, NULL
);
2037 free_irq(dev
->irq
, dev
);
2039 iounmap(pdata
->ioaddr
);
2043 release_mem_region(res
->start
, res
->end
- res
->start
);
2048 static struct platform_driver smsc911x_driver
= {
2049 .probe
= smsc911x_drv_probe
,
2050 .remove
= smsc911x_drv_remove
,
2052 .name
= SMSC_CHIPNAME
,
2056 /* Entry point for loading the module */
2057 static int __init
smsc911x_init_module(void)
2059 return platform_driver_register(&smsc911x_driver
);
2062 /* entry point for unloading the module */
2063 static void __exit
smsc911x_cleanup_module(void)
2065 platform_driver_unregister(&smsc911x_driver
);
2068 module_init(smsc911x_init_module
);
2069 module_exit(smsc911x_cleanup_module
);