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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[deliverable/linux.git] / drivers / net / stmmac / stmmac_main.c
1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
10
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
22
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25 Documentation available at:
26 http://www.stlinux.com
27 Support available at:
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
30
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
37 #include <linux/ip.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include "stmmac.h"
49
50 #define STMMAC_RESOURCE_NAME "stmmaceth"
51 #define PHY_RESOURCE_NAME "stmmacphy"
52
53 #undef STMMAC_DEBUG
54 /*#define STMMAC_DEBUG*/
55 #ifdef STMMAC_DEBUG
56 #define DBG(nlevel, klevel, fmt, args...) \
57 ((void)(netif_msg_##nlevel(priv) && \
58 printk(KERN_##klevel fmt, ## args)))
59 #else
60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
61 #endif
62
63 #undef STMMAC_RX_DEBUG
64 /*#define STMMAC_RX_DEBUG*/
65 #ifdef STMMAC_RX_DEBUG
66 #define RX_DBG(fmt, args...) printk(fmt, ## args)
67 #else
68 #define RX_DBG(fmt, args...) do { } while (0)
69 #endif
70
71 #undef STMMAC_XMIT_DEBUG
72 /*#define STMMAC_XMIT_DEBUG*/
73 #ifdef STMMAC_TX_DEBUG
74 #define TX_DBG(fmt, args...) printk(fmt, ## args)
75 #else
76 #define TX_DBG(fmt, args...) do { } while (0)
77 #endif
78
79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
80 #define JUMBO_LEN 9000
81
82 /* Module parameters */
83 #define TX_TIMEO 5000 /* default 5 seconds */
84 static int watchdog = TX_TIMEO;
85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
87
88 static int debug = -1; /* -1: default, 0: no output, 16: all */
89 module_param(debug, int, S_IRUGO | S_IWUSR);
90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
91
92 static int phyaddr = -1;
93 module_param(phyaddr, int, S_IRUGO);
94 MODULE_PARM_DESC(phyaddr, "Physical device address");
95
96 #define DMA_TX_SIZE 256
97 static int dma_txsize = DMA_TX_SIZE;
98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
100
101 #define DMA_RX_SIZE 256
102 static int dma_rxsize = DMA_RX_SIZE;
103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
105
106 static int flow_ctrl = FLOW_OFF;
107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
109
110 static int pause = PAUSE_TIME;
111 module_param(pause, int, S_IRUGO | S_IWUSR);
112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
113
114 #define TC_DEFAULT 64
115 static int tc = TC_DEFAULT;
116 module_param(tc, int, S_IRUGO | S_IWUSR);
117 MODULE_PARM_DESC(tc, "DMA threshold control value");
118
119 #define RX_NO_COALESCE 1 /* Always interrupt on completion */
120 #define TX_NO_COALESCE -1 /* No moderation by default */
121
122 /* Pay attention to tune this parameter; take care of both
123 * hardware capability and network stabitily/performance impact.
124 * Many tests showed that ~4ms latency seems to be good enough. */
125 #ifdef CONFIG_STMMAC_TIMER
126 #define DEFAULT_PERIODIC_RATE 256
127 static int tmrate = DEFAULT_PERIODIC_RATE;
128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
130 #endif
131
132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
133 static int buf_sz = DMA_BUFFER_SIZE;
134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
136
137 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
138 NETIF_MSG_LINK | NETIF_MSG_IFUP |
139 NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
140
141 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
142 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
143
144 /**
145 * stmmac_verify_args - verify the driver parameters.
146 * Description: it verifies if some wrong parameter is passed to the driver.
147 * Note that wrong parameters are replaced with the default values.
148 */
149 static void stmmac_verify_args(void)
150 {
151 if (unlikely(watchdog < 0))
152 watchdog = TX_TIMEO;
153 if (unlikely(dma_rxsize < 0))
154 dma_rxsize = DMA_RX_SIZE;
155 if (unlikely(dma_txsize < 0))
156 dma_txsize = DMA_TX_SIZE;
157 if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
158 buf_sz = DMA_BUFFER_SIZE;
159 if (unlikely(flow_ctrl > 1))
160 flow_ctrl = FLOW_AUTO;
161 else if (likely(flow_ctrl < 0))
162 flow_ctrl = FLOW_OFF;
163 if (unlikely((pause < 0) || (pause > 0xffff)))
164 pause = PAUSE_TIME;
165 }
166
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
168 static void print_pkt(unsigned char *buf, int len)
169 {
170 int j;
171 pr_info("len = %d byte, buf addr: 0x%p", len, buf);
172 for (j = 0; j < len; j++) {
173 if ((j % 16) == 0)
174 pr_info("\n %03x:", j);
175 pr_info(" %02x", buf[j]);
176 }
177 pr_info("\n");
178 }
179 #endif
180
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
183
184 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
185 {
186 return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
187 }
188
189 /**
190 * stmmac_adjust_link
191 * @dev: net device structure
192 * Description: it adjusts the link parameters.
193 */
194 static void stmmac_adjust_link(struct net_device *dev)
195 {
196 struct stmmac_priv *priv = netdev_priv(dev);
197 struct phy_device *phydev = priv->phydev;
198 unsigned long flags;
199 int new_state = 0;
200 unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
201
202 if (phydev == NULL)
203 return;
204
205 DBG(probe, DEBUG, "stmmac_adjust_link: called. address %d link %d\n",
206 phydev->addr, phydev->link);
207
208 spin_lock_irqsave(&priv->lock, flags);
209 if (phydev->link) {
210 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
211
212 /* Now we make sure that we can be in full duplex mode.
213 * If not, we operate in half-duplex mode. */
214 if (phydev->duplex != priv->oldduplex) {
215 new_state = 1;
216 if (!(phydev->duplex))
217 ctrl &= ~priv->hw->link.duplex;
218 else
219 ctrl |= priv->hw->link.duplex;
220 priv->oldduplex = phydev->duplex;
221 }
222 /* Flow Control operation */
223 if (phydev->pause)
224 priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
225 fc, pause_time);
226
227 if (phydev->speed != priv->speed) {
228 new_state = 1;
229 switch (phydev->speed) {
230 case 1000:
231 if (likely(priv->is_gmac))
232 ctrl &= ~priv->hw->link.port;
233 if (likely(priv->fix_mac_speed))
234 priv->fix_mac_speed(priv->bsp_priv,
235 phydev->speed);
236 break;
237 case 100:
238 case 10:
239 if (priv->is_gmac) {
240 ctrl |= priv->hw->link.port;
241 if (phydev->speed == SPEED_100) {
242 ctrl |= priv->hw->link.speed;
243 } else {
244 ctrl &= ~(priv->hw->link.speed);
245 }
246 } else {
247 ctrl &= ~priv->hw->link.port;
248 }
249 if (likely(priv->fix_mac_speed))
250 priv->fix_mac_speed(priv->bsp_priv,
251 phydev->speed);
252 break;
253 default:
254 if (netif_msg_link(priv))
255 pr_warning("%s: Speed (%d) is not 10"
256 " or 100!\n", dev->name, phydev->speed);
257 break;
258 }
259
260 priv->speed = phydev->speed;
261 }
262
263 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
264
265 if (!priv->oldlink) {
266 new_state = 1;
267 priv->oldlink = 1;
268 }
269 } else if (priv->oldlink) {
270 new_state = 1;
271 priv->oldlink = 0;
272 priv->speed = 0;
273 priv->oldduplex = -1;
274 }
275
276 if (new_state && netif_msg_link(priv))
277 phy_print_status(phydev);
278
279 spin_unlock_irqrestore(&priv->lock, flags);
280
281 DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
282 }
283
284 /**
285 * stmmac_init_phy - PHY initialization
286 * @dev: net device structure
287 * Description: it initializes the driver's PHY state, and attaches the PHY
288 * to the mac driver.
289 * Return value:
290 * 0 on success
291 */
292 static int stmmac_init_phy(struct net_device *dev)
293 {
294 struct stmmac_priv *priv = netdev_priv(dev);
295 struct phy_device *phydev;
296 char phy_id[MII_BUS_ID_SIZE + 3];
297 char bus_id[MII_BUS_ID_SIZE];
298
299 priv->oldlink = 0;
300 priv->speed = 0;
301 priv->oldduplex = -1;
302
303 if (priv->phy_addr == -1) {
304 /* We don't have a PHY, so do nothing */
305 return 0;
306 }
307
308 snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
309 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
310 priv->phy_addr);
311 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
312
313 phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
314 priv->phy_interface);
315
316 if (IS_ERR(phydev)) {
317 pr_err("%s: Could not attach to PHY\n", dev->name);
318 return PTR_ERR(phydev);
319 }
320
321 /*
322 * Broken HW is sometimes missing the pull-up resistor on the
323 * MDIO line, which results in reads to non-existent devices returning
324 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
325 * device as well.
326 * Note: phydev->phy_id is the result of reading the UID PHY registers.
327 */
328 if (phydev->phy_id == 0) {
329 phy_disconnect(phydev);
330 return -ENODEV;
331 }
332 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
333 " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
334
335 priv->phydev = phydev;
336
337 return 0;
338 }
339
340 static inline void stmmac_mac_enable_rx(void __iomem *ioaddr)
341 {
342 u32 value = readl(ioaddr + MAC_CTRL_REG);
343 value |= MAC_RNABLE_RX;
344 /* Set the RE (receive enable bit into the MAC CTRL register). */
345 writel(value, ioaddr + MAC_CTRL_REG);
346 }
347
348 static inline void stmmac_mac_enable_tx(void __iomem *ioaddr)
349 {
350 u32 value = readl(ioaddr + MAC_CTRL_REG);
351 value |= MAC_ENABLE_TX;
352 /* Set the TE (transmit enable bit into the MAC CTRL register). */
353 writel(value, ioaddr + MAC_CTRL_REG);
354 }
355
356 static inline void stmmac_mac_disable_rx(void __iomem *ioaddr)
357 {
358 u32 value = readl(ioaddr + MAC_CTRL_REG);
359 value &= ~MAC_RNABLE_RX;
360 writel(value, ioaddr + MAC_CTRL_REG);
361 }
362
363 static inline void stmmac_mac_disable_tx(void __iomem *ioaddr)
364 {
365 u32 value = readl(ioaddr + MAC_CTRL_REG);
366 value &= ~MAC_ENABLE_TX;
367 writel(value, ioaddr + MAC_CTRL_REG);
368 }
369
370 /**
371 * display_ring
372 * @p: pointer to the ring.
373 * @size: size of the ring.
374 * Description: display all the descriptors within the ring.
375 */
376 static void display_ring(struct dma_desc *p, int size)
377 {
378 struct tmp_s {
379 u64 a;
380 unsigned int b;
381 unsigned int c;
382 };
383 int i;
384 for (i = 0; i < size; i++) {
385 struct tmp_s *x = (struct tmp_s *)(p + i);
386 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
387 i, (unsigned int)virt_to_phys(&p[i]),
388 (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
389 x->b, x->c);
390 pr_info("\n");
391 }
392 }
393
394 /**
395 * init_dma_desc_rings - init the RX/TX descriptor rings
396 * @dev: net device structure
397 * Description: this function initializes the DMA RX/TX descriptors
398 * and allocates the socket buffers.
399 */
400 static void init_dma_desc_rings(struct net_device *dev)
401 {
402 int i;
403 struct stmmac_priv *priv = netdev_priv(dev);
404 struct sk_buff *skb;
405 unsigned int txsize = priv->dma_tx_size;
406 unsigned int rxsize = priv->dma_rx_size;
407 unsigned int bfsize = priv->dma_buf_sz;
408 int buff2_needed = 0, dis_ic = 0;
409
410 /* Set the Buffer size according to the MTU;
411 * indeed, in case of jumbo we need to bump-up the buffer sizes.
412 */
413 if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
414 bfsize = BUF_SIZE_16KiB;
415 else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
416 bfsize = BUF_SIZE_8KiB;
417 else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
418 bfsize = BUF_SIZE_4KiB;
419 else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
420 bfsize = BUF_SIZE_2KiB;
421 else
422 bfsize = DMA_BUFFER_SIZE;
423
424 #ifdef CONFIG_STMMAC_TIMER
425 /* Disable interrupts on completion for the reception if timer is on */
426 if (likely(priv->tm->enable))
427 dis_ic = 1;
428 #endif
429 /* If the MTU exceeds 8k so use the second buffer in the chain */
430 if (bfsize >= BUF_SIZE_8KiB)
431 buff2_needed = 1;
432
433 DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
434 txsize, rxsize, bfsize);
435
436 priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
437 priv->rx_skbuff =
438 kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
439 priv->dma_rx =
440 (struct dma_desc *)dma_alloc_coherent(priv->device,
441 rxsize *
442 sizeof(struct dma_desc),
443 &priv->dma_rx_phy,
444 GFP_KERNEL);
445 priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
446 GFP_KERNEL);
447 priv->dma_tx =
448 (struct dma_desc *)dma_alloc_coherent(priv->device,
449 txsize *
450 sizeof(struct dma_desc),
451 &priv->dma_tx_phy,
452 GFP_KERNEL);
453
454 if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
455 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
456 return;
457 }
458
459 DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
460 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
461 dev->name, priv->dma_rx, priv->dma_tx,
462 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
463
464 /* RX INITIALIZATION */
465 DBG(probe, INFO, "stmmac: SKB addresses:\n"
466 "skb\t\tskb data\tdma data\n");
467
468 for (i = 0; i < rxsize; i++) {
469 struct dma_desc *p = priv->dma_rx + i;
470
471 skb = netdev_alloc_skb_ip_align(dev, bfsize);
472 if (unlikely(skb == NULL)) {
473 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
474 break;
475 }
476 priv->rx_skbuff[i] = skb;
477 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
478 bfsize, DMA_FROM_DEVICE);
479
480 p->des2 = priv->rx_skbuff_dma[i];
481 if (unlikely(buff2_needed))
482 p->des3 = p->des2 + BUF_SIZE_8KiB;
483 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
484 priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
485 }
486 priv->cur_rx = 0;
487 priv->dirty_rx = (unsigned int)(i - rxsize);
488 priv->dma_buf_sz = bfsize;
489 buf_sz = bfsize;
490
491 /* TX INITIALIZATION */
492 for (i = 0; i < txsize; i++) {
493 priv->tx_skbuff[i] = NULL;
494 priv->dma_tx[i].des2 = 0;
495 }
496 priv->dirty_tx = 0;
497 priv->cur_tx = 0;
498
499 /* Clear the Rx/Tx descriptors */
500 priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
501 priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
502
503 if (netif_msg_hw(priv)) {
504 pr_info("RX descriptor ring:\n");
505 display_ring(priv->dma_rx, rxsize);
506 pr_info("TX descriptor ring:\n");
507 display_ring(priv->dma_tx, txsize);
508 }
509 }
510
511 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
512 {
513 int i;
514
515 for (i = 0; i < priv->dma_rx_size; i++) {
516 if (priv->rx_skbuff[i]) {
517 dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
518 priv->dma_buf_sz, DMA_FROM_DEVICE);
519 dev_kfree_skb_any(priv->rx_skbuff[i]);
520 }
521 priv->rx_skbuff[i] = NULL;
522 }
523 }
524
525 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
526 {
527 int i;
528
529 for (i = 0; i < priv->dma_tx_size; i++) {
530 if (priv->tx_skbuff[i] != NULL) {
531 struct dma_desc *p = priv->dma_tx + i;
532 if (p->des2)
533 dma_unmap_single(priv->device, p->des2,
534 priv->hw->desc->get_tx_len(p),
535 DMA_TO_DEVICE);
536 dev_kfree_skb_any(priv->tx_skbuff[i]);
537 priv->tx_skbuff[i] = NULL;
538 }
539 }
540 }
541
542 static void free_dma_desc_resources(struct stmmac_priv *priv)
543 {
544 /* Release the DMA TX/RX socket buffers */
545 dma_free_rx_skbufs(priv);
546 dma_free_tx_skbufs(priv);
547
548 /* Free the region of consistent memory previously allocated for
549 * the DMA */
550 dma_free_coherent(priv->device,
551 priv->dma_tx_size * sizeof(struct dma_desc),
552 priv->dma_tx, priv->dma_tx_phy);
553 dma_free_coherent(priv->device,
554 priv->dma_rx_size * sizeof(struct dma_desc),
555 priv->dma_rx, priv->dma_rx_phy);
556 kfree(priv->rx_skbuff_dma);
557 kfree(priv->rx_skbuff);
558 kfree(priv->tx_skbuff);
559 }
560
561 /**
562 * stmmac_dma_operation_mode - HW DMA operation mode
563 * @priv : pointer to the private device structure.
564 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
565 * or Store-And-Forward capability.
566 */
567 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
568 {
569 if (likely((priv->tx_coe) && (!priv->no_csum_insertion))) {
570 /* In case of GMAC, SF mode has to be enabled
571 * to perform the TX COE. This depends on:
572 * 1) TX COE if actually supported
573 * 2) There is no bugged Jumbo frame support
574 * that needs to not insert csum in the TDES.
575 */
576 priv->hw->dma->dma_mode(priv->ioaddr,
577 SF_DMA_MODE, SF_DMA_MODE);
578 tc = SF_DMA_MODE;
579 } else
580 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
581 }
582
583 /**
584 * stmmac_tx:
585 * @priv: private driver structure
586 * Description: it reclaims resources after transmission completes.
587 */
588 static void stmmac_tx(struct stmmac_priv *priv)
589 {
590 unsigned int txsize = priv->dma_tx_size;
591
592 while (priv->dirty_tx != priv->cur_tx) {
593 int last;
594 unsigned int entry = priv->dirty_tx % txsize;
595 struct sk_buff *skb = priv->tx_skbuff[entry];
596 struct dma_desc *p = priv->dma_tx + entry;
597
598 /* Check if the descriptor is owned by the DMA. */
599 if (priv->hw->desc->get_tx_owner(p))
600 break;
601
602 /* Verify tx error by looking at the last segment */
603 last = priv->hw->desc->get_tx_ls(p);
604 if (likely(last)) {
605 int tx_error =
606 priv->hw->desc->tx_status(&priv->dev->stats,
607 &priv->xstats, p,
608 priv->ioaddr);
609 if (likely(tx_error == 0)) {
610 priv->dev->stats.tx_packets++;
611 priv->xstats.tx_pkt_n++;
612 } else
613 priv->dev->stats.tx_errors++;
614 }
615 TX_DBG("%s: curr %d, dirty %d\n", __func__,
616 priv->cur_tx, priv->dirty_tx);
617
618 if (likely(p->des2))
619 dma_unmap_single(priv->device, p->des2,
620 priv->hw->desc->get_tx_len(p),
621 DMA_TO_DEVICE);
622 if (unlikely(p->des3))
623 p->des3 = 0;
624
625 if (likely(skb != NULL)) {
626 /*
627 * If there's room in the queue (limit it to size)
628 * we add this skb back into the pool,
629 * if it's the right size.
630 */
631 if ((skb_queue_len(&priv->rx_recycle) <
632 priv->dma_rx_size) &&
633 skb_recycle_check(skb, priv->dma_buf_sz))
634 __skb_queue_head(&priv->rx_recycle, skb);
635 else
636 dev_kfree_skb(skb);
637
638 priv->tx_skbuff[entry] = NULL;
639 }
640
641 priv->hw->desc->release_tx_desc(p);
642
643 entry = (++priv->dirty_tx) % txsize;
644 }
645 if (unlikely(netif_queue_stopped(priv->dev) &&
646 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
647 netif_tx_lock(priv->dev);
648 if (netif_queue_stopped(priv->dev) &&
649 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
650 TX_DBG("%s: restart transmit\n", __func__);
651 netif_wake_queue(priv->dev);
652 }
653 netif_tx_unlock(priv->dev);
654 }
655 }
656
657 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
658 {
659 #ifdef CONFIG_STMMAC_TIMER
660 if (likely(priv->tm->enable))
661 priv->tm->timer_start(tmrate);
662 else
663 #endif
664 priv->hw->dma->enable_dma_irq(priv->ioaddr);
665 }
666
667 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
668 {
669 #ifdef CONFIG_STMMAC_TIMER
670 if (likely(priv->tm->enable))
671 priv->tm->timer_stop();
672 else
673 #endif
674 priv->hw->dma->disable_dma_irq(priv->ioaddr);
675 }
676
677 static int stmmac_has_work(struct stmmac_priv *priv)
678 {
679 unsigned int has_work = 0;
680 int rxret, tx_work = 0;
681
682 rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
683 (priv->cur_rx % priv->dma_rx_size));
684
685 if (priv->dirty_tx != priv->cur_tx)
686 tx_work = 1;
687
688 if (likely(!rxret || tx_work))
689 has_work = 1;
690
691 return has_work;
692 }
693
694 static inline void _stmmac_schedule(struct stmmac_priv *priv)
695 {
696 if (likely(stmmac_has_work(priv))) {
697 stmmac_disable_irq(priv);
698 napi_schedule(&priv->napi);
699 }
700 }
701
702 #ifdef CONFIG_STMMAC_TIMER
703 void stmmac_schedule(struct net_device *dev)
704 {
705 struct stmmac_priv *priv = netdev_priv(dev);
706
707 priv->xstats.sched_timer_n++;
708
709 _stmmac_schedule(priv);
710 }
711
712 static void stmmac_no_timer_started(unsigned int x)
713 {;
714 };
715
716 static void stmmac_no_timer_stopped(void)
717 {;
718 };
719 #endif
720
721 /**
722 * stmmac_tx_err:
723 * @priv: pointer to the private device structure
724 * Description: it cleans the descriptors and restarts the transmission
725 * in case of errors.
726 */
727 static void stmmac_tx_err(struct stmmac_priv *priv)
728 {
729
730 netif_stop_queue(priv->dev);
731
732 priv->hw->dma->stop_tx(priv->ioaddr);
733 dma_free_tx_skbufs(priv);
734 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
735 priv->dirty_tx = 0;
736 priv->cur_tx = 0;
737 priv->hw->dma->start_tx(priv->ioaddr);
738
739 priv->dev->stats.tx_errors++;
740 netif_wake_queue(priv->dev);
741 }
742
743
744 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
745 {
746 int status;
747
748 status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
749 if (likely(status == handle_tx_rx))
750 _stmmac_schedule(priv);
751
752 else if (unlikely(status == tx_hard_error_bump_tc)) {
753 /* Try to bump up the dma threshold on this failure */
754 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
755 tc += 64;
756 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
757 priv->xstats.threshold = tc;
758 }
759 stmmac_tx_err(priv);
760 } else if (unlikely(status == tx_hard_error))
761 stmmac_tx_err(priv);
762 }
763
764 /**
765 * stmmac_open - open entry point of the driver
766 * @dev : pointer to the device structure.
767 * Description:
768 * This function is the open entry point of the driver.
769 * Return value:
770 * 0 on success and an appropriate (-)ve integer as defined in errno.h
771 * file on failure.
772 */
773 static int stmmac_open(struct net_device *dev)
774 {
775 struct stmmac_priv *priv = netdev_priv(dev);
776 int ret;
777
778 /* Check that the MAC address is valid. If its not, refuse
779 * to bring the device up. The user must specify an
780 * address using the following linux command:
781 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
782 if (!is_valid_ether_addr(dev->dev_addr)) {
783 random_ether_addr(dev->dev_addr);
784 pr_warning("%s: generated random MAC address %pM\n", dev->name,
785 dev->dev_addr);
786 }
787
788 stmmac_verify_args();
789
790 ret = stmmac_init_phy(dev);
791 if (unlikely(ret)) {
792 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
793 return ret;
794 }
795
796 /* Request the IRQ lines */
797 ret = request_irq(dev->irq, stmmac_interrupt,
798 IRQF_SHARED, dev->name, dev);
799 if (unlikely(ret < 0)) {
800 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
801 __func__, dev->irq, ret);
802 return ret;
803 }
804
805 #ifdef CONFIG_STMMAC_TIMER
806 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
807 if (unlikely(priv->tm == NULL)) {
808 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
809 return -ENOMEM;
810 }
811 priv->tm->freq = tmrate;
812
813 /* Test if the external timer can be actually used.
814 * In case of failure continue without timer. */
815 if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
816 pr_warning("stmmaceth: cannot attach the external timer.\n");
817 priv->tm->freq = 0;
818 priv->tm->timer_start = stmmac_no_timer_started;
819 priv->tm->timer_stop = stmmac_no_timer_stopped;
820 } else
821 priv->tm->enable = 1;
822 #endif
823
824 /* Create and initialize the TX/RX descriptors chains. */
825 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
826 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
827 priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
828 init_dma_desc_rings(dev);
829
830 /* DMA initialization and SW reset */
831 if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->pbl,
832 priv->dma_tx_phy,
833 priv->dma_rx_phy) < 0)) {
834
835 pr_err("%s: DMA initialization failed\n", __func__);
836 return -1;
837 }
838
839 /* Copy the MAC addr into the HW */
840 priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
841 /* If required, perform hw setup of the bus. */
842 if (priv->bus_setup)
843 priv->bus_setup(priv->ioaddr);
844 /* Initialize the MAC Core */
845 priv->hw->mac->core_init(priv->ioaddr);
846
847 priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
848 if (priv->rx_coe)
849 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
850 if (priv->tx_coe)
851 pr_info("\tTX Checksum insertion supported\n");
852
853 priv->shutdown = 0;
854
855 /* Initialise the MMC (if present) to disable all interrupts. */
856 writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
857 writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
858
859 /* Enable the MAC Rx/Tx */
860 stmmac_mac_enable_rx(priv->ioaddr);
861 stmmac_mac_enable_tx(priv->ioaddr);
862
863 /* Set the HW DMA mode and the COE */
864 stmmac_dma_operation_mode(priv);
865
866 /* Extra statistics */
867 memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
868 priv->xstats.threshold = tc;
869
870 /* Start the ball rolling... */
871 DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
872 priv->hw->dma->start_tx(priv->ioaddr);
873 priv->hw->dma->start_rx(priv->ioaddr);
874
875 #ifdef CONFIG_STMMAC_TIMER
876 priv->tm->timer_start(tmrate);
877 #endif
878 /* Dump DMA/MAC registers */
879 if (netif_msg_hw(priv)) {
880 priv->hw->mac->dump_regs(priv->ioaddr);
881 priv->hw->dma->dump_regs(priv->ioaddr);
882 }
883
884 if (priv->phydev)
885 phy_start(priv->phydev);
886
887 napi_enable(&priv->napi);
888 skb_queue_head_init(&priv->rx_recycle);
889 netif_start_queue(dev);
890 return 0;
891 }
892
893 /**
894 * stmmac_release - close entry point of the driver
895 * @dev : device pointer.
896 * Description:
897 * This is the stop entry point of the driver.
898 */
899 static int stmmac_release(struct net_device *dev)
900 {
901 struct stmmac_priv *priv = netdev_priv(dev);
902
903 /* Stop and disconnect the PHY */
904 if (priv->phydev) {
905 phy_stop(priv->phydev);
906 phy_disconnect(priv->phydev);
907 priv->phydev = NULL;
908 }
909
910 netif_stop_queue(dev);
911
912 #ifdef CONFIG_STMMAC_TIMER
913 /* Stop and release the timer */
914 stmmac_close_ext_timer();
915 if (priv->tm != NULL)
916 kfree(priv->tm);
917 #endif
918 napi_disable(&priv->napi);
919 skb_queue_purge(&priv->rx_recycle);
920
921 /* Free the IRQ lines */
922 free_irq(dev->irq, dev);
923
924 /* Stop TX/RX DMA and clear the descriptors */
925 priv->hw->dma->stop_tx(priv->ioaddr);
926 priv->hw->dma->stop_rx(priv->ioaddr);
927
928 /* Release and free the Rx/Tx resources */
929 free_dma_desc_resources(priv);
930
931 /* Disable the MAC core */
932 stmmac_mac_disable_tx(priv->ioaddr);
933 stmmac_mac_disable_rx(priv->ioaddr);
934
935 netif_carrier_off(dev);
936
937 return 0;
938 }
939
940 /*
941 * To perform emulated hardware segmentation on skb.
942 */
943 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
944 {
945 struct sk_buff *segs, *curr_skb;
946 int gso_segs = skb_shinfo(skb)->gso_segs;
947
948 /* Estimate the number of fragments in the worst case */
949 if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
950 netif_stop_queue(priv->dev);
951 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
952 __func__);
953 if (stmmac_tx_avail(priv) < gso_segs)
954 return NETDEV_TX_BUSY;
955
956 netif_wake_queue(priv->dev);
957 }
958 TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
959 skb, skb->len);
960
961 segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
962 if (unlikely(IS_ERR(segs)))
963 goto sw_tso_end;
964
965 do {
966 curr_skb = segs;
967 segs = segs->next;
968 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
969 "*next %p\n", curr_skb->len, curr_skb, segs);
970 curr_skb->next = NULL;
971 stmmac_xmit(curr_skb, priv->dev);
972 } while (segs);
973
974 sw_tso_end:
975 dev_kfree_skb(skb);
976
977 return NETDEV_TX_OK;
978 }
979
980 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
981 struct net_device *dev,
982 int csum_insertion)
983 {
984 struct stmmac_priv *priv = netdev_priv(dev);
985 unsigned int nopaged_len = skb_headlen(skb);
986 unsigned int txsize = priv->dma_tx_size;
987 unsigned int entry = priv->cur_tx % txsize;
988 struct dma_desc *desc = priv->dma_tx + entry;
989
990 if (nopaged_len > BUF_SIZE_8KiB) {
991
992 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
993
994 desc->des2 = dma_map_single(priv->device, skb->data,
995 BUF_SIZE_8KiB, DMA_TO_DEVICE);
996 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
997 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
998 csum_insertion);
999
1000 entry = (++priv->cur_tx) % txsize;
1001 desc = priv->dma_tx + entry;
1002
1003 desc->des2 = dma_map_single(priv->device,
1004 skb->data + BUF_SIZE_8KiB,
1005 buf2_size, DMA_TO_DEVICE);
1006 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1007 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1008 csum_insertion);
1009 priv->hw->desc->set_tx_owner(desc);
1010 priv->tx_skbuff[entry] = NULL;
1011 } else {
1012 desc->des2 = dma_map_single(priv->device, skb->data,
1013 nopaged_len, DMA_TO_DEVICE);
1014 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1015 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1016 csum_insertion);
1017 }
1018 return entry;
1019 }
1020
1021 /**
1022 * stmmac_xmit:
1023 * @skb : the socket buffer
1024 * @dev : device pointer
1025 * Description : Tx entry point of the driver.
1026 */
1027 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1028 {
1029 struct stmmac_priv *priv = netdev_priv(dev);
1030 unsigned int txsize = priv->dma_tx_size;
1031 unsigned int entry;
1032 int i, csum_insertion = 0;
1033 int nfrags = skb_shinfo(skb)->nr_frags;
1034 struct dma_desc *desc, *first;
1035
1036 if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1037 if (!netif_queue_stopped(dev)) {
1038 netif_stop_queue(dev);
1039 /* This is a hard error, log it. */
1040 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1041 __func__);
1042 }
1043 return NETDEV_TX_BUSY;
1044 }
1045
1046 entry = priv->cur_tx % txsize;
1047
1048 #ifdef STMMAC_XMIT_DEBUG
1049 if ((skb->len > ETH_FRAME_LEN) || nfrags)
1050 pr_info("stmmac xmit:\n"
1051 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1052 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1053 skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1054 !skb_is_gso(skb) ? "isn't" : "is");
1055 #endif
1056
1057 if (unlikely(skb_is_gso(skb)))
1058 return stmmac_sw_tso(priv, skb);
1059
1060 if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1061 if (unlikely((!priv->tx_coe) || (priv->no_csum_insertion)))
1062 skb_checksum_help(skb);
1063 else
1064 csum_insertion = 1;
1065 }
1066
1067 desc = priv->dma_tx + entry;
1068 first = desc;
1069
1070 #ifdef STMMAC_XMIT_DEBUG
1071 if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1072 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1073 "\t\tn_frags: %d, ip_summed: %d\n",
1074 skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1075 #endif
1076 priv->tx_skbuff[entry] = skb;
1077 if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1078 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1079 desc = priv->dma_tx + entry;
1080 } else {
1081 unsigned int nopaged_len = skb_headlen(skb);
1082 desc->des2 = dma_map_single(priv->device, skb->data,
1083 nopaged_len, DMA_TO_DEVICE);
1084 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1085 csum_insertion);
1086 }
1087
1088 for (i = 0; i < nfrags; i++) {
1089 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1090 int len = frag->size;
1091
1092 entry = (++priv->cur_tx) % txsize;
1093 desc = priv->dma_tx + entry;
1094
1095 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1096 desc->des2 = dma_map_page(priv->device, frag->page,
1097 frag->page_offset,
1098 len, DMA_TO_DEVICE);
1099 priv->tx_skbuff[entry] = NULL;
1100 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1101 priv->hw->desc->set_tx_owner(desc);
1102 }
1103
1104 /* Interrupt on completition only for the latest segment */
1105 priv->hw->desc->close_tx_desc(desc);
1106
1107 #ifdef CONFIG_STMMAC_TIMER
1108 /* Clean IC while using timer */
1109 if (likely(priv->tm->enable))
1110 priv->hw->desc->clear_tx_ic(desc);
1111 #endif
1112 /* To avoid raise condition */
1113 priv->hw->desc->set_tx_owner(first);
1114
1115 priv->cur_tx++;
1116
1117 #ifdef STMMAC_XMIT_DEBUG
1118 if (netif_msg_pktdata(priv)) {
1119 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1120 "first=%p, nfrags=%d\n",
1121 (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1122 entry, first, nfrags);
1123 display_ring(priv->dma_tx, txsize);
1124 pr_info(">>> frame to be transmitted: ");
1125 print_pkt(skb->data, skb->len);
1126 }
1127 #endif
1128 if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1129 TX_DBG("%s: stop transmitted packets\n", __func__);
1130 netif_stop_queue(dev);
1131 }
1132
1133 dev->stats.tx_bytes += skb->len;
1134
1135 priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1136
1137 return NETDEV_TX_OK;
1138 }
1139
1140 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1141 {
1142 unsigned int rxsize = priv->dma_rx_size;
1143 int bfsize = priv->dma_buf_sz;
1144 struct dma_desc *p = priv->dma_rx;
1145
1146 for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1147 unsigned int entry = priv->dirty_rx % rxsize;
1148 if (likely(priv->rx_skbuff[entry] == NULL)) {
1149 struct sk_buff *skb;
1150
1151 skb = __skb_dequeue(&priv->rx_recycle);
1152 if (skb == NULL)
1153 skb = netdev_alloc_skb_ip_align(priv->dev,
1154 bfsize);
1155
1156 if (unlikely(skb == NULL))
1157 break;
1158
1159 priv->rx_skbuff[entry] = skb;
1160 priv->rx_skbuff_dma[entry] =
1161 dma_map_single(priv->device, skb->data, bfsize,
1162 DMA_FROM_DEVICE);
1163
1164 (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1165 if (unlikely(priv->is_gmac)) {
1166 if (bfsize >= BUF_SIZE_8KiB)
1167 (p + entry)->des3 =
1168 (p + entry)->des2 + BUF_SIZE_8KiB;
1169 }
1170 RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1171 }
1172 priv->hw->desc->set_rx_owner(p + entry);
1173 }
1174 }
1175
1176 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1177 {
1178 unsigned int rxsize = priv->dma_rx_size;
1179 unsigned int entry = priv->cur_rx % rxsize;
1180 unsigned int next_entry;
1181 unsigned int count = 0;
1182 struct dma_desc *p = priv->dma_rx + entry;
1183 struct dma_desc *p_next;
1184
1185 #ifdef STMMAC_RX_DEBUG
1186 if (netif_msg_hw(priv)) {
1187 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1188 display_ring(priv->dma_rx, rxsize);
1189 }
1190 #endif
1191 count = 0;
1192 while (!priv->hw->desc->get_rx_owner(p)) {
1193 int status;
1194
1195 if (count >= limit)
1196 break;
1197
1198 count++;
1199
1200 next_entry = (++priv->cur_rx) % rxsize;
1201 p_next = priv->dma_rx + next_entry;
1202 prefetch(p_next);
1203
1204 /* read the status of the incoming frame */
1205 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1206 &priv->xstats, p));
1207 if (unlikely(status == discard_frame))
1208 priv->dev->stats.rx_errors++;
1209 else {
1210 struct sk_buff *skb;
1211 int frame_len;
1212
1213 frame_len = priv->hw->desc->get_rx_frame_len(p);
1214 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1215 * Type frames (LLC/LLC-SNAP) */
1216 if (unlikely(status != llc_snap))
1217 frame_len -= ETH_FCS_LEN;
1218 #ifdef STMMAC_RX_DEBUG
1219 if (frame_len > ETH_FRAME_LEN)
1220 pr_debug("\tRX frame size %d, COE status: %d\n",
1221 frame_len, status);
1222
1223 if (netif_msg_hw(priv))
1224 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1225 p, entry, p->des2);
1226 #endif
1227 skb = priv->rx_skbuff[entry];
1228 if (unlikely(!skb)) {
1229 pr_err("%s: Inconsistent Rx descriptor chain\n",
1230 priv->dev->name);
1231 priv->dev->stats.rx_dropped++;
1232 break;
1233 }
1234 prefetch(skb->data - NET_IP_ALIGN);
1235 priv->rx_skbuff[entry] = NULL;
1236
1237 skb_put(skb, frame_len);
1238 dma_unmap_single(priv->device,
1239 priv->rx_skbuff_dma[entry],
1240 priv->dma_buf_sz, DMA_FROM_DEVICE);
1241 #ifdef STMMAC_RX_DEBUG
1242 if (netif_msg_pktdata(priv)) {
1243 pr_info(" frame received (%dbytes)", frame_len);
1244 print_pkt(skb->data, frame_len);
1245 }
1246 #endif
1247 skb->protocol = eth_type_trans(skb, priv->dev);
1248
1249 if (unlikely(status == csum_none)) {
1250 /* always for the old mac 10/100 */
1251 skb_checksum_none_assert(skb);
1252 netif_receive_skb(skb);
1253 } else {
1254 skb->ip_summed = CHECKSUM_UNNECESSARY;
1255 napi_gro_receive(&priv->napi, skb);
1256 }
1257
1258 priv->dev->stats.rx_packets++;
1259 priv->dev->stats.rx_bytes += frame_len;
1260 }
1261 entry = next_entry;
1262 p = p_next; /* use prefetched values */
1263 }
1264
1265 stmmac_rx_refill(priv);
1266
1267 priv->xstats.rx_pkt_n += count;
1268
1269 return count;
1270 }
1271
1272 /**
1273 * stmmac_poll - stmmac poll method (NAPI)
1274 * @napi : pointer to the napi structure.
1275 * @budget : maximum number of packets that the current CPU can receive from
1276 * all interfaces.
1277 * Description :
1278 * This function implements the the reception process.
1279 * Also it runs the TX completion thread
1280 */
1281 static int stmmac_poll(struct napi_struct *napi, int budget)
1282 {
1283 struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1284 int work_done = 0;
1285
1286 priv->xstats.poll_n++;
1287 stmmac_tx(priv);
1288 work_done = stmmac_rx(priv, budget);
1289
1290 if (work_done < budget) {
1291 napi_complete(napi);
1292 stmmac_enable_irq(priv);
1293 }
1294 return work_done;
1295 }
1296
1297 /**
1298 * stmmac_tx_timeout
1299 * @dev : Pointer to net device structure
1300 * Description: this function is called when a packet transmission fails to
1301 * complete within a reasonable tmrate. The driver will mark the error in the
1302 * netdev structure and arrange for the device to be reset to a sane state
1303 * in order to transmit a new packet.
1304 */
1305 static void stmmac_tx_timeout(struct net_device *dev)
1306 {
1307 struct stmmac_priv *priv = netdev_priv(dev);
1308
1309 /* Clear Tx resources and restart transmitting again */
1310 stmmac_tx_err(priv);
1311 }
1312
1313 /* Configuration changes (passed on by ifconfig) */
1314 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1315 {
1316 if (dev->flags & IFF_UP) /* can't act on a running interface */
1317 return -EBUSY;
1318
1319 /* Don't allow changing the I/O address */
1320 if (map->base_addr != dev->base_addr) {
1321 pr_warning("%s: can't change I/O address\n", dev->name);
1322 return -EOPNOTSUPP;
1323 }
1324
1325 /* Don't allow changing the IRQ */
1326 if (map->irq != dev->irq) {
1327 pr_warning("%s: can't change IRQ number %d\n",
1328 dev->name, dev->irq);
1329 return -EOPNOTSUPP;
1330 }
1331
1332 /* ignore other fields */
1333 return 0;
1334 }
1335
1336 /**
1337 * stmmac_multicast_list - entry point for multicast addressing
1338 * @dev : pointer to the device structure
1339 * Description:
1340 * This function is a driver entry point which gets called by the kernel
1341 * whenever multicast addresses must be enabled/disabled.
1342 * Return value:
1343 * void.
1344 */
1345 static void stmmac_multicast_list(struct net_device *dev)
1346 {
1347 struct stmmac_priv *priv = netdev_priv(dev);
1348
1349 spin_lock(&priv->lock);
1350 priv->hw->mac->set_filter(dev);
1351 spin_unlock(&priv->lock);
1352 }
1353
1354 /**
1355 * stmmac_change_mtu - entry point to change MTU size for the device.
1356 * @dev : device pointer.
1357 * @new_mtu : the new MTU size for the device.
1358 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1359 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1360 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1361 * Return value:
1362 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1363 * file on failure.
1364 */
1365 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1366 {
1367 struct stmmac_priv *priv = netdev_priv(dev);
1368 int max_mtu;
1369
1370 if (netif_running(dev)) {
1371 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1372 return -EBUSY;
1373 }
1374
1375 if (priv->is_gmac)
1376 max_mtu = JUMBO_LEN;
1377 else
1378 max_mtu = ETH_DATA_LEN;
1379
1380 if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1381 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1382 return -EINVAL;
1383 }
1384
1385 /* Some GMAC devices have a bugged Jumbo frame support that
1386 * needs to have the Tx COE disabled for oversized frames
1387 * (due to limited buffer sizes). In this case we disable
1388 * the TX csum insertionin the TDES and not use SF. */
1389 if ((priv->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
1390 priv->no_csum_insertion = 1;
1391 else
1392 priv->no_csum_insertion = 0;
1393
1394 dev->mtu = new_mtu;
1395
1396 return 0;
1397 }
1398
1399 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1400 {
1401 struct net_device *dev = (struct net_device *)dev_id;
1402 struct stmmac_priv *priv = netdev_priv(dev);
1403
1404 if (unlikely(!dev)) {
1405 pr_err("%s: invalid dev pointer\n", __func__);
1406 return IRQ_NONE;
1407 }
1408
1409 if (priv->is_gmac)
1410 /* To handle GMAC own interrupts */
1411 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1412
1413 stmmac_dma_interrupt(priv);
1414
1415 return IRQ_HANDLED;
1416 }
1417
1418 #ifdef CONFIG_NET_POLL_CONTROLLER
1419 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1420 * to allow network I/O with interrupts disabled. */
1421 static void stmmac_poll_controller(struct net_device *dev)
1422 {
1423 disable_irq(dev->irq);
1424 stmmac_interrupt(dev->irq, dev);
1425 enable_irq(dev->irq);
1426 }
1427 #endif
1428
1429 /**
1430 * stmmac_ioctl - Entry point for the Ioctl
1431 * @dev: Device pointer.
1432 * @rq: An IOCTL specefic structure, that can contain a pointer to
1433 * a proprietary structure used to pass information to the driver.
1434 * @cmd: IOCTL command
1435 * Description:
1436 * Currently there are no special functionality supported in IOCTL, just the
1437 * phy_mii_ioctl(...) can be invoked.
1438 */
1439 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1440 {
1441 struct stmmac_priv *priv = netdev_priv(dev);
1442 int ret;
1443
1444 if (!netif_running(dev))
1445 return -EINVAL;
1446
1447 if (!priv->phydev)
1448 return -EINVAL;
1449
1450 spin_lock(&priv->lock);
1451 ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1452 spin_unlock(&priv->lock);
1453
1454 return ret;
1455 }
1456
1457 #ifdef STMMAC_VLAN_TAG_USED
1458 static void stmmac_vlan_rx_register(struct net_device *dev,
1459 struct vlan_group *grp)
1460 {
1461 struct stmmac_priv *priv = netdev_priv(dev);
1462
1463 DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1464
1465 spin_lock(&priv->lock);
1466 priv->vlgrp = grp;
1467 spin_unlock(&priv->lock);
1468 }
1469 #endif
1470
1471 static const struct net_device_ops stmmac_netdev_ops = {
1472 .ndo_open = stmmac_open,
1473 .ndo_start_xmit = stmmac_xmit,
1474 .ndo_stop = stmmac_release,
1475 .ndo_change_mtu = stmmac_change_mtu,
1476 .ndo_set_multicast_list = stmmac_multicast_list,
1477 .ndo_tx_timeout = stmmac_tx_timeout,
1478 .ndo_do_ioctl = stmmac_ioctl,
1479 .ndo_set_config = stmmac_config,
1480 #ifdef STMMAC_VLAN_TAG_USED
1481 .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1482 #endif
1483 #ifdef CONFIG_NET_POLL_CONTROLLER
1484 .ndo_poll_controller = stmmac_poll_controller,
1485 #endif
1486 .ndo_set_mac_address = eth_mac_addr,
1487 };
1488
1489 /**
1490 * stmmac_probe - Initialization of the adapter .
1491 * @dev : device pointer
1492 * Description: The function initializes the network device structure for
1493 * the STMMAC driver. It also calls the low level routines
1494 * in order to init the HW (i.e. the DMA engine)
1495 */
1496 static int stmmac_probe(struct net_device *dev)
1497 {
1498 int ret = 0;
1499 struct stmmac_priv *priv = netdev_priv(dev);
1500
1501 ether_setup(dev);
1502
1503 dev->netdev_ops = &stmmac_netdev_ops;
1504 stmmac_set_ethtool_ops(dev);
1505
1506 dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1507 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1508 #ifdef STMMAC_VLAN_TAG_USED
1509 /* Both mac100 and gmac support receive VLAN tag detection */
1510 dev->features |= NETIF_F_HW_VLAN_RX;
1511 #endif
1512 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1513
1514 if (flow_ctrl)
1515 priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
1516
1517 priv->pause = pause;
1518 netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1519
1520 /* Get the MAC address */
1521 priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1522 dev->dev_addr, 0);
1523
1524 if (!is_valid_ether_addr(dev->dev_addr))
1525 pr_warning("\tno valid MAC address;"
1526 "please, use ifconfig or nwhwconfig!\n");
1527
1528 ret = register_netdev(dev);
1529 if (ret) {
1530 pr_err("%s: ERROR %i registering the device\n",
1531 __func__, ret);
1532 return -ENODEV;
1533 }
1534
1535 DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1536 dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1537 (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1538
1539 spin_lock_init(&priv->lock);
1540
1541 return ret;
1542 }
1543
1544 /**
1545 * stmmac_mac_device_setup
1546 * @dev : device pointer
1547 * Description: select and initialise the mac device (mac100 or Gmac).
1548 */
1549 static int stmmac_mac_device_setup(struct net_device *dev)
1550 {
1551 struct stmmac_priv *priv = netdev_priv(dev);
1552
1553 struct mac_device_info *device;
1554
1555 if (priv->is_gmac)
1556 device = dwmac1000_setup(priv->ioaddr);
1557 else
1558 device = dwmac100_setup(priv->ioaddr);
1559
1560 if (!device)
1561 return -ENOMEM;
1562
1563 if (priv->enh_desc) {
1564 device->desc = &enh_desc_ops;
1565 pr_info("\tEnhanced descriptor structure\n");
1566 } else
1567 device->desc = &ndesc_ops;
1568
1569 priv->hw = device;
1570
1571 if (device_can_wakeup(priv->device))
1572 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1573
1574 return 0;
1575 }
1576
1577 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1578 {
1579 struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1580
1581 pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1582 plat_dat->bus_id);
1583
1584 return 0;
1585 }
1586
1587 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1588 {
1589 return 0;
1590 }
1591
1592 static struct platform_driver stmmacphy_driver = {
1593 .driver = {
1594 .name = PHY_RESOURCE_NAME,
1595 },
1596 .probe = stmmacphy_dvr_probe,
1597 .remove = stmmacphy_dvr_remove,
1598 };
1599
1600 /**
1601 * stmmac_associate_phy
1602 * @dev: pointer to device structure
1603 * @data: points to the private structure.
1604 * Description: Scans through all the PHYs we have registered and checks if
1605 * any are associated with our MAC. If so, then just fill in
1606 * the blanks in our local context structure
1607 */
1608 static int stmmac_associate_phy(struct device *dev, void *data)
1609 {
1610 struct stmmac_priv *priv = (struct stmmac_priv *)data;
1611 struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1612
1613 DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1614 plat_dat->bus_id);
1615
1616 /* Check that this phy is for the MAC being initialised */
1617 if (priv->bus_id != plat_dat->bus_id)
1618 return 0;
1619
1620 /* OK, this PHY is connected to the MAC.
1621 Go ahead and get the parameters */
1622 DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1623 priv->phy_irq =
1624 platform_get_irq_byname(to_platform_device(dev), "phyirq");
1625 DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1626 plat_dat->bus_id, priv->phy_irq);
1627
1628 /* Override with kernel parameters if supplied XXX CRS XXX
1629 * this needs to have multiple instances */
1630 if ((phyaddr >= 0) && (phyaddr <= 31))
1631 plat_dat->phy_addr = phyaddr;
1632
1633 priv->phy_addr = plat_dat->phy_addr;
1634 priv->phy_mask = plat_dat->phy_mask;
1635 priv->phy_interface = plat_dat->interface;
1636 priv->phy_reset = plat_dat->phy_reset;
1637
1638 DBG(probe, DEBUG, "%s: exiting\n", __func__);
1639 return 1; /* forces exit of driver_for_each_device() */
1640 }
1641
1642 /**
1643 * stmmac_dvr_probe
1644 * @pdev: platform device pointer
1645 * Description: the driver is initialized through platform_device.
1646 */
1647 static int stmmac_dvr_probe(struct platform_device *pdev)
1648 {
1649 int ret = 0;
1650 struct resource *res;
1651 void __iomem *addr = NULL;
1652 struct net_device *ndev = NULL;
1653 struct stmmac_priv *priv;
1654 struct plat_stmmacenet_data *plat_dat;
1655
1656 pr_info("STMMAC driver:\n\tplatform registration... ");
1657 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1658 if (!res) {
1659 ret = -ENODEV;
1660 goto out;
1661 }
1662 pr_info("\tdone!\n");
1663
1664 if (!request_mem_region(res->start, resource_size(res),
1665 pdev->name)) {
1666 pr_err("%s: ERROR: memory allocation failed"
1667 "cannot get the I/O addr 0x%x\n",
1668 __func__, (unsigned int)res->start);
1669 ret = -EBUSY;
1670 goto out;
1671 }
1672
1673 addr = ioremap(res->start, resource_size(res));
1674 if (!addr) {
1675 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1676 ret = -ENOMEM;
1677 goto out;
1678 }
1679
1680 ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1681 if (!ndev) {
1682 pr_err("%s: ERROR: allocating the device\n", __func__);
1683 ret = -ENOMEM;
1684 goto out;
1685 }
1686
1687 SET_NETDEV_DEV(ndev, &pdev->dev);
1688
1689 /* Get the MAC information */
1690 ndev->irq = platform_get_irq_byname(pdev, "macirq");
1691 if (ndev->irq == -ENXIO) {
1692 pr_err("%s: ERROR: MAC IRQ configuration "
1693 "information not found\n", __func__);
1694 ret = -ENODEV;
1695 goto out;
1696 }
1697
1698 priv = netdev_priv(ndev);
1699 priv->device = &(pdev->dev);
1700 priv->dev = ndev;
1701 plat_dat = pdev->dev.platform_data;
1702 priv->bus_id = plat_dat->bus_id;
1703 priv->pbl = plat_dat->pbl; /* TLI */
1704 priv->mii_clk_csr = plat_dat->clk_csr;
1705 priv->tx_coe = plat_dat->tx_coe;
1706 priv->bugged_jumbo = plat_dat->bugged_jumbo;
1707 priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */
1708 priv->enh_desc = plat_dat->enh_desc;
1709 priv->ioaddr = addr;
1710
1711 /* PMT module is not integrated in all the MAC devices. */
1712 if (plat_dat->pmt) {
1713 pr_info("\tPMT module supported\n");
1714 device_set_wakeup_capable(&pdev->dev, 1);
1715 }
1716
1717 platform_set_drvdata(pdev, ndev);
1718
1719 /* Set the I/O base addr */
1720 ndev->base_addr = (unsigned long)addr;
1721
1722 /* Verify embedded resource for the platform */
1723 ret = stmmac_claim_resource(pdev);
1724 if (ret < 0)
1725 goto out;
1726
1727 /* MAC HW revice detection */
1728 ret = stmmac_mac_device_setup(ndev);
1729 if (ret < 0)
1730 goto out;
1731
1732 /* Network Device Registration */
1733 ret = stmmac_probe(ndev);
1734 if (ret < 0)
1735 goto out;
1736
1737 /* associate a PHY - it is provided by another platform bus */
1738 if (!driver_for_each_device
1739 (&(stmmacphy_driver.driver), NULL, (void *)priv,
1740 stmmac_associate_phy)) {
1741 pr_err("No PHY device is associated with this MAC!\n");
1742 ret = -ENODEV;
1743 goto out;
1744 }
1745
1746 priv->fix_mac_speed = plat_dat->fix_mac_speed;
1747 priv->bus_setup = plat_dat->bus_setup;
1748 priv->bsp_priv = plat_dat->bsp_priv;
1749
1750 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1751 "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1752 pdev->id, ndev->irq, addr);
1753
1754 /* MDIO bus Registration */
1755 pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
1756 ret = stmmac_mdio_register(ndev);
1757 if (ret < 0)
1758 goto out;
1759 pr_debug("registered!\n");
1760
1761 out:
1762 if (ret < 0) {
1763 platform_set_drvdata(pdev, NULL);
1764 release_mem_region(res->start, resource_size(res));
1765 if (addr != NULL)
1766 iounmap(addr);
1767 }
1768
1769 return ret;
1770 }
1771
1772 /**
1773 * stmmac_dvr_remove
1774 * @pdev: platform device pointer
1775 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1776 * changes the link status, releases the DMA descriptor rings,
1777 * unregisters the MDIO bus and unmaps the allocated memory.
1778 */
1779 static int stmmac_dvr_remove(struct platform_device *pdev)
1780 {
1781 struct net_device *ndev = platform_get_drvdata(pdev);
1782 struct stmmac_priv *priv = netdev_priv(ndev);
1783 struct resource *res;
1784
1785 pr_info("%s:\n\tremoving driver", __func__);
1786
1787 priv->hw->dma->stop_rx(priv->ioaddr);
1788 priv->hw->dma->stop_tx(priv->ioaddr);
1789
1790 stmmac_mac_disable_rx(priv->ioaddr);
1791 stmmac_mac_disable_tx(priv->ioaddr);
1792
1793 netif_carrier_off(ndev);
1794
1795 stmmac_mdio_unregister(ndev);
1796
1797 platform_set_drvdata(pdev, NULL);
1798 unregister_netdev(ndev);
1799
1800 iounmap((void *)priv->ioaddr);
1801 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1802 release_mem_region(res->start, resource_size(res));
1803
1804 free_netdev(ndev);
1805
1806 return 0;
1807 }
1808
1809 #ifdef CONFIG_PM
1810 static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1811 {
1812 struct net_device *dev = platform_get_drvdata(pdev);
1813 struct stmmac_priv *priv = netdev_priv(dev);
1814 int dis_ic = 0;
1815
1816 if (!dev || !netif_running(dev))
1817 return 0;
1818
1819 spin_lock(&priv->lock);
1820
1821 if (state.event == PM_EVENT_SUSPEND) {
1822 netif_device_detach(dev);
1823 netif_stop_queue(dev);
1824 if (priv->phydev)
1825 phy_stop(priv->phydev);
1826
1827 #ifdef CONFIG_STMMAC_TIMER
1828 priv->tm->timer_stop();
1829 if (likely(priv->tm->enable))
1830 dis_ic = 1;
1831 #endif
1832 napi_disable(&priv->napi);
1833
1834 /* Stop TX/RX DMA */
1835 priv->hw->dma->stop_tx(priv->ioaddr);
1836 priv->hw->dma->stop_rx(priv->ioaddr);
1837 /* Clear the Rx/Tx descriptors */
1838 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1839 dis_ic);
1840 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1841
1842 stmmac_mac_disable_tx(priv->ioaddr);
1843
1844 /* Enable Power down mode by programming the PMT regs */
1845 if (device_can_wakeup(priv->device))
1846 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1847 else
1848 stmmac_mac_disable_rx(priv->ioaddr);
1849 } else {
1850 priv->shutdown = 1;
1851 /* Although this can appear slightly redundant it actually
1852 * makes fast the standby operation and guarantees the driver
1853 * working if hibernation is on media. */
1854 stmmac_release(dev);
1855 }
1856
1857 spin_unlock(&priv->lock);
1858 return 0;
1859 }
1860
1861 static int stmmac_resume(struct platform_device *pdev)
1862 {
1863 struct net_device *dev = platform_get_drvdata(pdev);
1864 struct stmmac_priv *priv = netdev_priv(dev);
1865
1866 if (!netif_running(dev))
1867 return 0;
1868
1869 if (priv->shutdown) {
1870 /* Re-open the interface and re-init the MAC/DMA
1871 and the rings (i.e. on hibernation stage) */
1872 stmmac_open(dev);
1873 return 0;
1874 }
1875
1876 spin_lock(&priv->lock);
1877
1878 /* Power Down bit, into the PM register, is cleared
1879 * automatically as soon as a magic packet or a Wake-up frame
1880 * is received. Anyway, it's better to manually clear
1881 * this bit because it can generate problems while resuming
1882 * from another devices (e.g. serial console). */
1883 if (device_can_wakeup(priv->device))
1884 priv->hw->mac->pmt(priv->ioaddr, 0);
1885
1886 netif_device_attach(dev);
1887
1888 /* Enable the MAC and DMA */
1889 stmmac_mac_enable_rx(priv->ioaddr);
1890 stmmac_mac_enable_tx(priv->ioaddr);
1891 priv->hw->dma->start_tx(priv->ioaddr);
1892 priv->hw->dma->start_rx(priv->ioaddr);
1893
1894 #ifdef CONFIG_STMMAC_TIMER
1895 priv->tm->timer_start(tmrate);
1896 #endif
1897 napi_enable(&priv->napi);
1898
1899 if (priv->phydev)
1900 phy_start(priv->phydev);
1901
1902 netif_start_queue(dev);
1903
1904 spin_unlock(&priv->lock);
1905 return 0;
1906 }
1907 #endif
1908
1909 static struct platform_driver stmmac_driver = {
1910 .driver = {
1911 .name = STMMAC_RESOURCE_NAME,
1912 },
1913 .probe = stmmac_dvr_probe,
1914 .remove = stmmac_dvr_remove,
1915 #ifdef CONFIG_PM
1916 .suspend = stmmac_suspend,
1917 .resume = stmmac_resume,
1918 #endif
1919
1920 };
1921
1922 /**
1923 * stmmac_init_module - Entry point for the driver
1924 * Description: This function is the entry point for the driver.
1925 */
1926 static int __init stmmac_init_module(void)
1927 {
1928 int ret;
1929
1930 if (platform_driver_register(&stmmacphy_driver)) {
1931 pr_err("No PHY devices registered!\n");
1932 return -ENODEV;
1933 }
1934
1935 ret = platform_driver_register(&stmmac_driver);
1936 return ret;
1937 }
1938
1939 /**
1940 * stmmac_cleanup_module - Cleanup routine for the driver
1941 * Description: This function is the cleanup routine for the driver.
1942 */
1943 static void __exit stmmac_cleanup_module(void)
1944 {
1945 platform_driver_unregister(&stmmacphy_driver);
1946 platform_driver_unregister(&stmmac_driver);
1947 }
1948
1949 #ifndef MODULE
1950 static int __init stmmac_cmdline_opt(char *str)
1951 {
1952 char *opt;
1953
1954 if (!str || !*str)
1955 return -EINVAL;
1956 while ((opt = strsep(&str, ",")) != NULL) {
1957 if (!strncmp(opt, "debug:", 6))
1958 strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1959 else if (!strncmp(opt, "phyaddr:", 8))
1960 strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1961 else if (!strncmp(opt, "dma_txsize:", 11))
1962 strict_strtoul(opt + 11, 0,
1963 (unsigned long *)&dma_txsize);
1964 else if (!strncmp(opt, "dma_rxsize:", 11))
1965 strict_strtoul(opt + 11, 0,
1966 (unsigned long *)&dma_rxsize);
1967 else if (!strncmp(opt, "buf_sz:", 7))
1968 strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1969 else if (!strncmp(opt, "tc:", 3))
1970 strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1971 else if (!strncmp(opt, "watchdog:", 9))
1972 strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1973 else if (!strncmp(opt, "flow_ctrl:", 10))
1974 strict_strtoul(opt + 10, 0,
1975 (unsigned long *)&flow_ctrl);
1976 else if (!strncmp(opt, "pause:", 6))
1977 strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1978 #ifdef CONFIG_STMMAC_TIMER
1979 else if (!strncmp(opt, "tmrate:", 7))
1980 strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1981 #endif
1982 }
1983 return 0;
1984 }
1985
1986 __setup("stmmaceth=", stmmac_cmdline_opt);
1987 #endif
1988
1989 module_init(stmmac_init_module);
1990 module_exit(stmmac_cleanup_module);
1991
1992 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1993 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1994 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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