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[deliverable/linux.git] / drivers / net / usb / asix.c
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38
39 #define DRIVER_VERSION "14-Jun-2006"
40 static const char driver_name [] = "asix";
41
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_NODE_ID 0x14
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
72
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
77
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
84
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
87
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
96
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
100
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
114
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
118 AX_MEDIUM_RE )
119
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
124
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
137
138 #define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
154
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
159
160 #define MARVELL_LED_MANUAL 0x0019
161
162 #define MARVELL_STATUS_HWCFG 0x0004
163
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
166
167 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
168 struct asix_data {
169 u8 multi_filter[AX_MCAST_FILTER_SIZE];
170 u8 mac_addr[ETH_ALEN];
171 u8 phymode;
172 u8 ledmode;
173 u8 eeprom_len;
174 };
175
176 struct ax88172_int_data {
177 __le16 res1;
178 u8 link;
179 __le16 res2;
180 u8 status;
181 __le16 res3;
182 } __packed;
183
184 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
185 u16 size, void *data)
186 {
187 void *buf;
188 int err = -ENOMEM;
189
190 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
191 cmd, value, index, size);
192
193 buf = kmalloc(size, GFP_KERNEL);
194 if (!buf)
195 goto out;
196
197 err = usb_control_msg(
198 dev->udev,
199 usb_rcvctrlpipe(dev->udev, 0),
200 cmd,
201 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
202 value,
203 index,
204 buf,
205 size,
206 USB_CTRL_GET_TIMEOUT);
207 if (err == size)
208 memcpy(data, buf, size);
209 else if (err >= 0)
210 err = -EINVAL;
211 kfree(buf);
212
213 out:
214 return err;
215 }
216
217 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
218 u16 size, void *data)
219 {
220 void *buf = NULL;
221 int err = -ENOMEM;
222
223 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
224 cmd, value, index, size);
225
226 if (data) {
227 buf = kmemdup(data, size, GFP_KERNEL);
228 if (!buf)
229 goto out;
230 }
231
232 err = usb_control_msg(
233 dev->udev,
234 usb_sndctrlpipe(dev->udev, 0),
235 cmd,
236 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
237 value,
238 index,
239 buf,
240 size,
241 USB_CTRL_SET_TIMEOUT);
242 kfree(buf);
243
244 out:
245 return err;
246 }
247
248 static void asix_async_cmd_callback(struct urb *urb)
249 {
250 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
251 int status = urb->status;
252
253 if (status < 0)
254 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
255 status);
256
257 kfree(req);
258 usb_free_urb(urb);
259 }
260
261 static void
262 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
263 u16 size, void *data)
264 {
265 struct usb_ctrlrequest *req;
266 int status;
267 struct urb *urb;
268
269 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
270 cmd, value, index, size);
271 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
272 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
273 return;
274 }
275
276 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
277 netdev_err(dev->net, "Failed to allocate memory for control request\n");
278 usb_free_urb(urb);
279 return;
280 }
281
282 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
283 req->bRequest = cmd;
284 req->wValue = cpu_to_le16(value);
285 req->wIndex = cpu_to_le16(index);
286 req->wLength = cpu_to_le16(size);
287
288 usb_fill_control_urb(urb, dev->udev,
289 usb_sndctrlpipe(dev->udev, 0),
290 (void *)req, data, size,
291 asix_async_cmd_callback, req);
292
293 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
294 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
295 status);
296 kfree(req);
297 usb_free_urb(urb);
298 }
299 }
300
301 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
302 {
303 u8 *head;
304 u32 header;
305 char *packet;
306 struct sk_buff *ax_skb;
307 u16 size;
308
309 head = (u8 *) skb->data;
310 memcpy(&header, head, sizeof(header));
311 le32_to_cpus(&header);
312 packet = head + sizeof(header);
313
314 skb_pull(skb, 4);
315
316 while (skb->len > 0) {
317 if ((header & 0xffff) != ((~header >> 16) & 0xffff))
318 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
319
320 /* get the packet length */
321 size = (u16) (header & 0x0000ffff);
322
323 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
324 u8 alignment = (unsigned long)skb->data & 0x3;
325 if (alignment != 0x2) {
326 /*
327 * not 16bit aligned so use the room provided by
328 * the 32 bit header to align the data
329 *
330 * note we want 16bit alignment as MAC header is
331 * 14bytes thus ip header will be aligned on
332 * 32bit boundary so accessing ipheader elements
333 * using a cast to struct ip header wont cause
334 * an unaligned accesses.
335 */
336 u8 realignment = (alignment + 2) & 0x3;
337 memmove(skb->data - realignment,
338 skb->data,
339 size);
340 skb->data -= realignment;
341 skb_set_tail_pointer(skb, size);
342 }
343 return 2;
344 }
345
346 if (size > dev->net->mtu + ETH_HLEN) {
347 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
348 size);
349 return 0;
350 }
351 ax_skb = skb_clone(skb, GFP_ATOMIC);
352 if (ax_skb) {
353 u8 alignment = (unsigned long)packet & 0x3;
354 ax_skb->len = size;
355
356 if (alignment != 0x2) {
357 /*
358 * not 16bit aligned use the room provided by
359 * the 32 bit header to align the data
360 */
361 u8 realignment = (alignment + 2) & 0x3;
362 memmove(packet - realignment, packet, size);
363 packet -= realignment;
364 }
365 ax_skb->data = packet;
366 skb_set_tail_pointer(ax_skb, size);
367 usbnet_skb_return(dev, ax_skb);
368 } else {
369 return 0;
370 }
371
372 skb_pull(skb, (size + 1) & 0xfffe);
373
374 if (skb->len == 0)
375 break;
376
377 head = (u8 *) skb->data;
378 memcpy(&header, head, sizeof(header));
379 le32_to_cpus(&header);
380 packet = head + sizeof(header);
381 skb_pull(skb, 4);
382 }
383
384 if (skb->len < 0) {
385 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
386 skb->len);
387 return 0;
388 }
389 return 1;
390 }
391
392 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
393 gfp_t flags)
394 {
395 int padlen;
396 int headroom = skb_headroom(skb);
397 int tailroom = skb_tailroom(skb);
398 u32 packet_len;
399 u32 padbytes = 0xffff0000;
400
401 padlen = ((skb->len + 4) % 512) ? 0 : 4;
402
403 if ((!skb_cloned(skb)) &&
404 ((headroom + tailroom) >= (4 + padlen))) {
405 if ((headroom < 4) || (tailroom < padlen)) {
406 skb->data = memmove(skb->head + 4, skb->data, skb->len);
407 skb_set_tail_pointer(skb, skb->len);
408 }
409 } else {
410 struct sk_buff *skb2;
411 skb2 = skb_copy_expand(skb, 4, padlen, flags);
412 dev_kfree_skb_any(skb);
413 skb = skb2;
414 if (!skb)
415 return NULL;
416 }
417
418 skb_push(skb, 4);
419 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
420 cpu_to_le32s(&packet_len);
421 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
422
423 if ((skb->len % 512) == 0) {
424 cpu_to_le32s(&padbytes);
425 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
426 skb_put(skb, sizeof(padbytes));
427 }
428 return skb;
429 }
430
431 static void asix_status(struct usbnet *dev, struct urb *urb)
432 {
433 struct ax88172_int_data *event;
434 int link;
435
436 if (urb->actual_length < 8)
437 return;
438
439 event = urb->transfer_buffer;
440 link = event->link & 0x01;
441 if (netif_carrier_ok(dev->net) != link) {
442 if (link) {
443 netif_carrier_on(dev->net);
444 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
445 } else
446 netif_carrier_off(dev->net);
447 netdev_dbg(dev->net, "Link Status is: %d\n", link);
448 }
449 }
450
451 static inline int asix_set_sw_mii(struct usbnet *dev)
452 {
453 int ret;
454 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
455 if (ret < 0)
456 netdev_err(dev->net, "Failed to enable software MII access\n");
457 return ret;
458 }
459
460 static inline int asix_set_hw_mii(struct usbnet *dev)
461 {
462 int ret;
463 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
464 if (ret < 0)
465 netdev_err(dev->net, "Failed to enable hardware MII access\n");
466 return ret;
467 }
468
469 static inline int asix_get_phy_addr(struct usbnet *dev)
470 {
471 u8 buf[2];
472 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
473
474 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
475
476 if (ret < 0) {
477 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
478 goto out;
479 }
480 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
481 *((__le16 *)buf));
482 ret = buf[1];
483
484 out:
485 return ret;
486 }
487
488 static int asix_sw_reset(struct usbnet *dev, u8 flags)
489 {
490 int ret;
491
492 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
493 if (ret < 0)
494 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
495
496 return ret;
497 }
498
499 static u16 asix_read_rx_ctl(struct usbnet *dev)
500 {
501 __le16 v;
502 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
503
504 if (ret < 0) {
505 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
506 goto out;
507 }
508 ret = le16_to_cpu(v);
509 out:
510 return ret;
511 }
512
513 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
514 {
515 int ret;
516
517 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
518 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
519 if (ret < 0)
520 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
521 mode, ret);
522
523 return ret;
524 }
525
526 static u16 asix_read_medium_status(struct usbnet *dev)
527 {
528 __le16 v;
529 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
530
531 if (ret < 0) {
532 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
533 ret);
534 goto out;
535 }
536 ret = le16_to_cpu(v);
537 out:
538 return ret;
539 }
540
541 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
542 {
543 int ret;
544
545 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
546 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
547 if (ret < 0)
548 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
549 mode, ret);
550
551 return ret;
552 }
553
554 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
555 {
556 int ret;
557
558 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
559 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
560 if (ret < 0)
561 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
562 value, ret);
563
564 if (sleep)
565 msleep(sleep);
566
567 return ret;
568 }
569
570 /*
571 * AX88772 & AX88178 have a 16-bit RX_CTL value
572 */
573 static void asix_set_multicast(struct net_device *net)
574 {
575 struct usbnet *dev = netdev_priv(net);
576 struct asix_data *data = (struct asix_data *)&dev->data;
577 u16 rx_ctl = AX_DEFAULT_RX_CTL;
578
579 if (net->flags & IFF_PROMISC) {
580 rx_ctl |= AX_RX_CTL_PRO;
581 } else if (net->flags & IFF_ALLMULTI ||
582 netdev_mc_count(net) > AX_MAX_MCAST) {
583 rx_ctl |= AX_RX_CTL_AMALL;
584 } else if (netdev_mc_empty(net)) {
585 /* just broadcast and directed */
586 } else {
587 /* We use the 20 byte dev->data
588 * for our 8 byte filter buffer
589 * to avoid allocating memory that
590 * is tricky to free later */
591 struct netdev_hw_addr *ha;
592 u32 crc_bits;
593
594 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
595
596 /* Build the multicast hash filter. */
597 netdev_for_each_mc_addr(ha, net) {
598 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
599 data->multi_filter[crc_bits >> 3] |=
600 1 << (crc_bits & 7);
601 }
602
603 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
604 AX_MCAST_FILTER_SIZE, data->multi_filter);
605
606 rx_ctl |= AX_RX_CTL_AM;
607 }
608
609 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
610 }
611
612 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
613 {
614 struct usbnet *dev = netdev_priv(netdev);
615 __le16 res;
616
617 mutex_lock(&dev->phy_mutex);
618 asix_set_sw_mii(dev);
619 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
620 (__u16)loc, 2, &res);
621 asix_set_hw_mii(dev);
622 mutex_unlock(&dev->phy_mutex);
623
624 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
625 phy_id, loc, le16_to_cpu(res));
626
627 return le16_to_cpu(res);
628 }
629
630 static void
631 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
632 {
633 struct usbnet *dev = netdev_priv(netdev);
634 __le16 res = cpu_to_le16(val);
635
636 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
637 phy_id, loc, val);
638 mutex_lock(&dev->phy_mutex);
639 asix_set_sw_mii(dev);
640 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
641 asix_set_hw_mii(dev);
642 mutex_unlock(&dev->phy_mutex);
643 }
644
645 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
646 static u32 asix_get_phyid(struct usbnet *dev)
647 {
648 int phy_reg;
649 u32 phy_id;
650
651 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
652 if (phy_reg < 0)
653 return 0;
654
655 phy_id = (phy_reg & 0xffff) << 16;
656
657 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
658 if (phy_reg < 0)
659 return 0;
660
661 phy_id |= (phy_reg & 0xffff);
662
663 return phy_id;
664 }
665
666 static void
667 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
668 {
669 struct usbnet *dev = netdev_priv(net);
670 u8 opt;
671
672 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
673 wolinfo->supported = 0;
674 wolinfo->wolopts = 0;
675 return;
676 }
677 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
678 wolinfo->wolopts = 0;
679 if (opt & AX_MONITOR_MODE) {
680 if (opt & AX_MONITOR_LINK)
681 wolinfo->wolopts |= WAKE_PHY;
682 if (opt & AX_MONITOR_MAGIC)
683 wolinfo->wolopts |= WAKE_MAGIC;
684 }
685 }
686
687 static int
688 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
689 {
690 struct usbnet *dev = netdev_priv(net);
691 u8 opt = 0;
692
693 if (wolinfo->wolopts & WAKE_PHY)
694 opt |= AX_MONITOR_LINK;
695 if (wolinfo->wolopts & WAKE_MAGIC)
696 opt |= AX_MONITOR_MAGIC;
697 if (opt != 0)
698 opt |= AX_MONITOR_MODE;
699
700 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
701 opt, 0, 0, NULL) < 0)
702 return -EINVAL;
703
704 return 0;
705 }
706
707 static int asix_get_eeprom_len(struct net_device *net)
708 {
709 struct usbnet *dev = netdev_priv(net);
710 struct asix_data *data = (struct asix_data *)&dev->data;
711
712 return data->eeprom_len;
713 }
714
715 static int asix_get_eeprom(struct net_device *net,
716 struct ethtool_eeprom *eeprom, u8 *data)
717 {
718 struct usbnet *dev = netdev_priv(net);
719 __le16 *ebuf = (__le16 *)data;
720 int i;
721
722 /* Crude hack to ensure that we don't overwrite memory
723 * if an odd length is supplied
724 */
725 if (eeprom->len % 2)
726 return -EINVAL;
727
728 eeprom->magic = AX_EEPROM_MAGIC;
729
730 /* ax8817x returns 2 bytes from eeprom on read */
731 for (i=0; i < eeprom->len / 2; i++) {
732 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
733 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
734 return -EINVAL;
735 }
736 return 0;
737 }
738
739 static void asix_get_drvinfo (struct net_device *net,
740 struct ethtool_drvinfo *info)
741 {
742 struct usbnet *dev = netdev_priv(net);
743 struct asix_data *data = (struct asix_data *)&dev->data;
744
745 /* Inherit standard device info */
746 usbnet_get_drvinfo(net, info);
747 strncpy (info->driver, driver_name, sizeof info->driver);
748 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
749 info->eedump_len = data->eeprom_len;
750 }
751
752 static u32 asix_get_link(struct net_device *net)
753 {
754 struct usbnet *dev = netdev_priv(net);
755
756 return mii_link_ok(&dev->mii);
757 }
758
759 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
760 {
761 struct usbnet *dev = netdev_priv(net);
762
763 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
764 }
765
766 static int asix_set_mac_address(struct net_device *net, void *p)
767 {
768 struct usbnet *dev = netdev_priv(net);
769 struct asix_data *data = (struct asix_data *)&dev->data;
770 struct sockaddr *addr = p;
771
772 if (netif_running(net))
773 return -EBUSY;
774 if (!is_valid_ether_addr(addr->sa_data))
775 return -EADDRNOTAVAIL;
776
777 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
778
779 /* We use the 20 byte dev->data
780 * for our 6 byte mac buffer
781 * to avoid allocating memory that
782 * is tricky to free later */
783 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
784 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
785 data->mac_addr);
786
787 return 0;
788 }
789
790 /* We need to override some ethtool_ops so we require our
791 own structure so we don't interfere with other usbnet
792 devices that may be connected at the same time. */
793 static const struct ethtool_ops ax88172_ethtool_ops = {
794 .get_drvinfo = asix_get_drvinfo,
795 .get_link = asix_get_link,
796 .get_msglevel = usbnet_get_msglevel,
797 .set_msglevel = usbnet_set_msglevel,
798 .get_wol = asix_get_wol,
799 .set_wol = asix_set_wol,
800 .get_eeprom_len = asix_get_eeprom_len,
801 .get_eeprom = asix_get_eeprom,
802 .get_settings = usbnet_get_settings,
803 .set_settings = usbnet_set_settings,
804 .nway_reset = usbnet_nway_reset,
805 };
806
807 static void ax88172_set_multicast(struct net_device *net)
808 {
809 struct usbnet *dev = netdev_priv(net);
810 struct asix_data *data = (struct asix_data *)&dev->data;
811 u8 rx_ctl = 0x8c;
812
813 if (net->flags & IFF_PROMISC) {
814 rx_ctl |= 0x01;
815 } else if (net->flags & IFF_ALLMULTI ||
816 netdev_mc_count(net) > AX_MAX_MCAST) {
817 rx_ctl |= 0x02;
818 } else if (netdev_mc_empty(net)) {
819 /* just broadcast and directed */
820 } else {
821 /* We use the 20 byte dev->data
822 * for our 8 byte filter buffer
823 * to avoid allocating memory that
824 * is tricky to free later */
825 struct netdev_hw_addr *ha;
826 u32 crc_bits;
827
828 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
829
830 /* Build the multicast hash filter. */
831 netdev_for_each_mc_addr(ha, net) {
832 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
833 data->multi_filter[crc_bits >> 3] |=
834 1 << (crc_bits & 7);
835 }
836
837 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
838 AX_MCAST_FILTER_SIZE, data->multi_filter);
839
840 rx_ctl |= 0x10;
841 }
842
843 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
844 }
845
846 static int ax88172_link_reset(struct usbnet *dev)
847 {
848 u8 mode;
849 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
850
851 mii_check_media(&dev->mii, 1, 1);
852 mii_ethtool_gset(&dev->mii, &ecmd);
853 mode = AX88172_MEDIUM_DEFAULT;
854
855 if (ecmd.duplex != DUPLEX_FULL)
856 mode |= ~AX88172_MEDIUM_FD;
857
858 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
859 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
860
861 asix_write_medium_mode(dev, mode);
862
863 return 0;
864 }
865
866 static const struct net_device_ops ax88172_netdev_ops = {
867 .ndo_open = usbnet_open,
868 .ndo_stop = usbnet_stop,
869 .ndo_start_xmit = usbnet_start_xmit,
870 .ndo_tx_timeout = usbnet_tx_timeout,
871 .ndo_change_mtu = usbnet_change_mtu,
872 .ndo_set_mac_address = eth_mac_addr,
873 .ndo_validate_addr = eth_validate_addr,
874 .ndo_do_ioctl = asix_ioctl,
875 .ndo_set_multicast_list = ax88172_set_multicast,
876 };
877
878 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
879 {
880 int ret = 0;
881 u8 buf[ETH_ALEN];
882 int i;
883 unsigned long gpio_bits = dev->driver_info->data;
884 struct asix_data *data = (struct asix_data *)&dev->data;
885
886 data->eeprom_len = AX88172_EEPROM_LEN;
887
888 usbnet_get_endpoints(dev,intf);
889
890 /* Toggle the GPIOs in a manufacturer/model specific way */
891 for (i = 2; i >= 0; i--) {
892 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
893 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
894 NULL)) < 0)
895 goto out;
896 msleep(5);
897 }
898
899 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
900 goto out;
901
902 /* Get the MAC address */
903 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
904 0, 0, ETH_ALEN, buf)) < 0) {
905 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
906 goto out;
907 }
908 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
909
910 /* Initialize MII structure */
911 dev->mii.dev = dev->net;
912 dev->mii.mdio_read = asix_mdio_read;
913 dev->mii.mdio_write = asix_mdio_write;
914 dev->mii.phy_id_mask = 0x3f;
915 dev->mii.reg_num_mask = 0x1f;
916 dev->mii.phy_id = asix_get_phy_addr(dev);
917
918 dev->net->netdev_ops = &ax88172_netdev_ops;
919 dev->net->ethtool_ops = &ax88172_ethtool_ops;
920
921 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
922 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
923 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
924 mii_nway_restart(&dev->mii);
925
926 return 0;
927
928 out:
929 return ret;
930 }
931
932 static const struct ethtool_ops ax88772_ethtool_ops = {
933 .get_drvinfo = asix_get_drvinfo,
934 .get_link = asix_get_link,
935 .get_msglevel = usbnet_get_msglevel,
936 .set_msglevel = usbnet_set_msglevel,
937 .get_wol = asix_get_wol,
938 .set_wol = asix_set_wol,
939 .get_eeprom_len = asix_get_eeprom_len,
940 .get_eeprom = asix_get_eeprom,
941 .get_settings = usbnet_get_settings,
942 .set_settings = usbnet_set_settings,
943 .nway_reset = usbnet_nway_reset,
944 };
945
946 static int ax88772_link_reset(struct usbnet *dev)
947 {
948 u16 mode;
949 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
950
951 mii_check_media(&dev->mii, 1, 1);
952 mii_ethtool_gset(&dev->mii, &ecmd);
953 mode = AX88772_MEDIUM_DEFAULT;
954
955 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
956 mode &= ~AX_MEDIUM_PS;
957
958 if (ecmd.duplex != DUPLEX_FULL)
959 mode &= ~AX_MEDIUM_FD;
960
961 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
962 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
963
964 asix_write_medium_mode(dev, mode);
965
966 return 0;
967 }
968
969 static const struct net_device_ops ax88772_netdev_ops = {
970 .ndo_open = usbnet_open,
971 .ndo_stop = usbnet_stop,
972 .ndo_start_xmit = usbnet_start_xmit,
973 .ndo_tx_timeout = usbnet_tx_timeout,
974 .ndo_change_mtu = usbnet_change_mtu,
975 .ndo_set_mac_address = asix_set_mac_address,
976 .ndo_validate_addr = eth_validate_addr,
977 .ndo_do_ioctl = asix_ioctl,
978 .ndo_set_multicast_list = asix_set_multicast,
979 };
980
981 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
982 {
983 int ret, embd_phy;
984 u16 rx_ctl;
985 struct asix_data *data = (struct asix_data *)&dev->data;
986 u8 buf[ETH_ALEN];
987 u32 phyid;
988
989 data->eeprom_len = AX88772_EEPROM_LEN;
990
991 usbnet_get_endpoints(dev,intf);
992
993 if ((ret = asix_write_gpio(dev,
994 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
995 goto out;
996
997 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
998 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
999 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
1000 embd_phy, 0, 0, NULL)) < 0) {
1001 dbg("Select PHY #1 failed: %d", ret);
1002 goto out;
1003 }
1004
1005 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
1006 goto out;
1007
1008 msleep(150);
1009 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
1010 goto out;
1011
1012 msleep(150);
1013 if (embd_phy) {
1014 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
1015 goto out;
1016 }
1017 else {
1018 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
1019 goto out;
1020 }
1021
1022 msleep(150);
1023 rx_ctl = asix_read_rx_ctl(dev);
1024 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1025 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
1026 goto out;
1027
1028 rx_ctl = asix_read_rx_ctl(dev);
1029 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1030
1031 /* Get the MAC address */
1032 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1033 0, 0, ETH_ALEN, buf)) < 0) {
1034 dbg("Failed to read MAC address: %d", ret);
1035 goto out;
1036 }
1037 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1038
1039 /* Initialize MII structure */
1040 dev->mii.dev = dev->net;
1041 dev->mii.mdio_read = asix_mdio_read;
1042 dev->mii.mdio_write = asix_mdio_write;
1043 dev->mii.phy_id_mask = 0x1f;
1044 dev->mii.reg_num_mask = 0x1f;
1045 dev->mii.phy_id = asix_get_phy_addr(dev);
1046
1047 phyid = asix_get_phyid(dev);
1048 dbg("PHYID=0x%08x", phyid);
1049
1050 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
1051 goto out;
1052
1053 msleep(150);
1054
1055 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1056 goto out;
1057
1058 msleep(150);
1059
1060 dev->net->netdev_ops = &ax88772_netdev_ops;
1061 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1062
1063 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1064 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1065 ADVERTISE_ALL | ADVERTISE_CSMA);
1066 mii_nway_restart(&dev->mii);
1067
1068 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1069 goto out;
1070
1071 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1072 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1073 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1074 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1075 goto out;
1076 }
1077
1078 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1079 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1080 goto out;
1081
1082 rx_ctl = asix_read_rx_ctl(dev);
1083 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1084
1085 rx_ctl = asix_read_medium_status(dev);
1086 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1087
1088 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1089 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1090 /* hard_mtu is still the default - the device does not support
1091 jumbo eth frames */
1092 dev->rx_urb_size = 2048;
1093 }
1094 return 0;
1095
1096 out:
1097 return ret;
1098 }
1099
1100 static struct ethtool_ops ax88178_ethtool_ops = {
1101 .get_drvinfo = asix_get_drvinfo,
1102 .get_link = asix_get_link,
1103 .get_msglevel = usbnet_get_msglevel,
1104 .set_msglevel = usbnet_set_msglevel,
1105 .get_wol = asix_get_wol,
1106 .set_wol = asix_set_wol,
1107 .get_eeprom_len = asix_get_eeprom_len,
1108 .get_eeprom = asix_get_eeprom,
1109 .get_settings = usbnet_get_settings,
1110 .set_settings = usbnet_set_settings,
1111 .nway_reset = usbnet_nway_reset,
1112 };
1113
1114 static int marvell_phy_init(struct usbnet *dev)
1115 {
1116 struct asix_data *data = (struct asix_data *)&dev->data;
1117 u16 reg;
1118
1119 netdev_dbg(dev->net, "marvell_phy_init()\n");
1120
1121 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1122 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1123
1124 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1125 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1126
1127 if (data->ledmode) {
1128 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1129 MII_MARVELL_LED_CTRL);
1130 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1131
1132 reg &= 0xf8ff;
1133 reg |= (1 + 0x0100);
1134 asix_mdio_write(dev->net, dev->mii.phy_id,
1135 MII_MARVELL_LED_CTRL, reg);
1136
1137 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1138 MII_MARVELL_LED_CTRL);
1139 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1140 reg &= 0xfc0f;
1141 }
1142
1143 return 0;
1144 }
1145
1146 static int marvell_led_status(struct usbnet *dev, u16 speed)
1147 {
1148 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1149
1150 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1151
1152 /* Clear out the center LED bits - 0x03F0 */
1153 reg &= 0xfc0f;
1154
1155 switch (speed) {
1156 case SPEED_1000:
1157 reg |= 0x03e0;
1158 break;
1159 case SPEED_100:
1160 reg |= 0x03b0;
1161 break;
1162 default:
1163 reg |= 0x02f0;
1164 }
1165
1166 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1167 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1168
1169 return 0;
1170 }
1171
1172 static int ax88178_link_reset(struct usbnet *dev)
1173 {
1174 u16 mode;
1175 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1176 struct asix_data *data = (struct asix_data *)&dev->data;
1177 u32 speed;
1178
1179 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1180
1181 mii_check_media(&dev->mii, 1, 1);
1182 mii_ethtool_gset(&dev->mii, &ecmd);
1183 mode = AX88178_MEDIUM_DEFAULT;
1184 speed = ethtool_cmd_speed(&ecmd);
1185
1186 if (speed == SPEED_1000)
1187 mode |= AX_MEDIUM_GM;
1188 else if (speed == SPEED_100)
1189 mode |= AX_MEDIUM_PS;
1190 else
1191 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1192
1193 mode |= AX_MEDIUM_ENCK;
1194
1195 if (ecmd.duplex == DUPLEX_FULL)
1196 mode |= AX_MEDIUM_FD;
1197 else
1198 mode &= ~AX_MEDIUM_FD;
1199
1200 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1201 speed, ecmd.duplex, mode);
1202
1203 asix_write_medium_mode(dev, mode);
1204
1205 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1206 marvell_led_status(dev, speed);
1207
1208 return 0;
1209 }
1210
1211 static void ax88178_set_mfb(struct usbnet *dev)
1212 {
1213 u16 mfb = AX_RX_CTL_MFB_16384;
1214 u16 rxctl;
1215 u16 medium;
1216 int old_rx_urb_size = dev->rx_urb_size;
1217
1218 if (dev->hard_mtu < 2048) {
1219 dev->rx_urb_size = 2048;
1220 mfb = AX_RX_CTL_MFB_2048;
1221 } else if (dev->hard_mtu < 4096) {
1222 dev->rx_urb_size = 4096;
1223 mfb = AX_RX_CTL_MFB_4096;
1224 } else if (dev->hard_mtu < 8192) {
1225 dev->rx_urb_size = 8192;
1226 mfb = AX_RX_CTL_MFB_8192;
1227 } else if (dev->hard_mtu < 16384) {
1228 dev->rx_urb_size = 16384;
1229 mfb = AX_RX_CTL_MFB_16384;
1230 }
1231
1232 rxctl = asix_read_rx_ctl(dev);
1233 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1234
1235 medium = asix_read_medium_status(dev);
1236 if (dev->net->mtu > 1500)
1237 medium |= AX_MEDIUM_JFE;
1238 else
1239 medium &= ~AX_MEDIUM_JFE;
1240 asix_write_medium_mode(dev, medium);
1241
1242 if (dev->rx_urb_size > old_rx_urb_size)
1243 usbnet_unlink_rx_urbs(dev);
1244 }
1245
1246 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1247 {
1248 struct usbnet *dev = netdev_priv(net);
1249 int ll_mtu = new_mtu + net->hard_header_len + 4;
1250
1251 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1252
1253 if (new_mtu <= 0 || ll_mtu > 16384)
1254 return -EINVAL;
1255
1256 if ((ll_mtu % dev->maxpacket) == 0)
1257 return -EDOM;
1258
1259 net->mtu = new_mtu;
1260 dev->hard_mtu = net->mtu + net->hard_header_len;
1261 ax88178_set_mfb(dev);
1262
1263 return 0;
1264 }
1265
1266 static const struct net_device_ops ax88178_netdev_ops = {
1267 .ndo_open = usbnet_open,
1268 .ndo_stop = usbnet_stop,
1269 .ndo_start_xmit = usbnet_start_xmit,
1270 .ndo_tx_timeout = usbnet_tx_timeout,
1271 .ndo_set_mac_address = asix_set_mac_address,
1272 .ndo_validate_addr = eth_validate_addr,
1273 .ndo_set_multicast_list = asix_set_multicast,
1274 .ndo_do_ioctl = asix_ioctl,
1275 .ndo_change_mtu = ax88178_change_mtu,
1276 };
1277
1278 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1279 {
1280 struct asix_data *data = (struct asix_data *)&dev->data;
1281 int ret;
1282 u8 buf[ETH_ALEN];
1283 __le16 eeprom;
1284 u8 status;
1285 int gpio0 = 0;
1286 u32 phyid;
1287
1288 usbnet_get_endpoints(dev,intf);
1289
1290 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1291 dbg("GPIO Status: 0x%04x", status);
1292
1293 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1294 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1295 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1296
1297 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1298
1299 if (eeprom == cpu_to_le16(0xffff)) {
1300 data->phymode = PHY_MODE_MARVELL;
1301 data->ledmode = 0;
1302 gpio0 = 1;
1303 } else {
1304 data->phymode = le16_to_cpu(eeprom) & 7;
1305 data->ledmode = le16_to_cpu(eeprom) >> 8;
1306 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1307 }
1308 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1309
1310 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1311 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1312 asix_write_gpio(dev, 0x003c, 30);
1313 asix_write_gpio(dev, 0x001c, 300);
1314 asix_write_gpio(dev, 0x003c, 30);
1315 } else {
1316 dbg("gpio phymode == 1 path");
1317 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1318 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1319 }
1320
1321 asix_sw_reset(dev, 0);
1322 msleep(150);
1323
1324 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1325 msleep(150);
1326
1327 asix_write_rx_ctl(dev, 0);
1328
1329 /* Get the MAC address */
1330 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1331 0, 0, ETH_ALEN, buf)) < 0) {
1332 dbg("Failed to read MAC address: %d", ret);
1333 goto out;
1334 }
1335 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1336
1337 /* Initialize MII structure */
1338 dev->mii.dev = dev->net;
1339 dev->mii.mdio_read = asix_mdio_read;
1340 dev->mii.mdio_write = asix_mdio_write;
1341 dev->mii.phy_id_mask = 0x1f;
1342 dev->mii.reg_num_mask = 0xff;
1343 dev->mii.supports_gmii = 1;
1344 dev->mii.phy_id = asix_get_phy_addr(dev);
1345
1346 dev->net->netdev_ops = &ax88178_netdev_ops;
1347 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1348
1349 phyid = asix_get_phyid(dev);
1350 dbg("PHYID=0x%08x", phyid);
1351
1352 if (data->phymode == PHY_MODE_MARVELL) {
1353 marvell_phy_init(dev);
1354 msleep(60);
1355 }
1356
1357 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1358 BMCR_RESET | BMCR_ANENABLE);
1359 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1360 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1361 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1362 ADVERTISE_1000FULL);
1363
1364 mii_nway_restart(&dev->mii);
1365
1366 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1367 goto out;
1368
1369 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1370 goto out;
1371
1372 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1373 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1374 /* hard_mtu is still the default - the device does not support
1375 jumbo eth frames */
1376 dev->rx_urb_size = 2048;
1377 }
1378 return 0;
1379
1380 out:
1381 return ret;
1382 }
1383
1384 static const struct driver_info ax8817x_info = {
1385 .description = "ASIX AX8817x USB 2.0 Ethernet",
1386 .bind = ax88172_bind,
1387 .status = asix_status,
1388 .link_reset = ax88172_link_reset,
1389 .reset = ax88172_link_reset,
1390 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1391 .data = 0x00130103,
1392 };
1393
1394 static const struct driver_info dlink_dub_e100_info = {
1395 .description = "DLink DUB-E100 USB Ethernet",
1396 .bind = ax88172_bind,
1397 .status = asix_status,
1398 .link_reset = ax88172_link_reset,
1399 .reset = ax88172_link_reset,
1400 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1401 .data = 0x009f9d9f,
1402 };
1403
1404 static const struct driver_info netgear_fa120_info = {
1405 .description = "Netgear FA-120 USB Ethernet",
1406 .bind = ax88172_bind,
1407 .status = asix_status,
1408 .link_reset = ax88172_link_reset,
1409 .reset = ax88172_link_reset,
1410 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1411 .data = 0x00130103,
1412 };
1413
1414 static const struct driver_info hawking_uf200_info = {
1415 .description = "Hawking UF200 USB Ethernet",
1416 .bind = ax88172_bind,
1417 .status = asix_status,
1418 .link_reset = ax88172_link_reset,
1419 .reset = ax88172_link_reset,
1420 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1421 .data = 0x001f1d1f,
1422 };
1423
1424 static const struct driver_info ax88772_info = {
1425 .description = "ASIX AX88772 USB 2.0 Ethernet",
1426 .bind = ax88772_bind,
1427 .status = asix_status,
1428 .link_reset = ax88772_link_reset,
1429 .reset = ax88772_link_reset,
1430 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1431 .rx_fixup = asix_rx_fixup,
1432 .tx_fixup = asix_tx_fixup,
1433 };
1434
1435 static const struct driver_info ax88178_info = {
1436 .description = "ASIX AX88178 USB 2.0 Ethernet",
1437 .bind = ax88178_bind,
1438 .status = asix_status,
1439 .link_reset = ax88178_link_reset,
1440 .reset = ax88178_link_reset,
1441 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1442 .rx_fixup = asix_rx_fixup,
1443 .tx_fixup = asix_tx_fixup,
1444 };
1445
1446 static const struct usb_device_id products [] = {
1447 {
1448 // Linksys USB200M
1449 USB_DEVICE (0x077b, 0x2226),
1450 .driver_info = (unsigned long) &ax8817x_info,
1451 }, {
1452 // Netgear FA120
1453 USB_DEVICE (0x0846, 0x1040),
1454 .driver_info = (unsigned long) &netgear_fa120_info,
1455 }, {
1456 // DLink DUB-E100
1457 USB_DEVICE (0x2001, 0x1a00),
1458 .driver_info = (unsigned long) &dlink_dub_e100_info,
1459 }, {
1460 // Intellinet, ST Lab USB Ethernet
1461 USB_DEVICE (0x0b95, 0x1720),
1462 .driver_info = (unsigned long) &ax8817x_info,
1463 }, {
1464 // Hawking UF200, TrendNet TU2-ET100
1465 USB_DEVICE (0x07b8, 0x420a),
1466 .driver_info = (unsigned long) &hawking_uf200_info,
1467 }, {
1468 // Billionton Systems, USB2AR
1469 USB_DEVICE (0x08dd, 0x90ff),
1470 .driver_info = (unsigned long) &ax8817x_info,
1471 }, {
1472 // ATEN UC210T
1473 USB_DEVICE (0x0557, 0x2009),
1474 .driver_info = (unsigned long) &ax8817x_info,
1475 }, {
1476 // Buffalo LUA-U2-KTX
1477 USB_DEVICE (0x0411, 0x003d),
1478 .driver_info = (unsigned long) &ax8817x_info,
1479 }, {
1480 // Buffalo LUA-U2-GT 10/100/1000
1481 USB_DEVICE (0x0411, 0x006e),
1482 .driver_info = (unsigned long) &ax88178_info,
1483 }, {
1484 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1485 USB_DEVICE (0x6189, 0x182d),
1486 .driver_info = (unsigned long) &ax8817x_info,
1487 }, {
1488 // corega FEther USB2-TX
1489 USB_DEVICE (0x07aa, 0x0017),
1490 .driver_info = (unsigned long) &ax8817x_info,
1491 }, {
1492 // Surecom EP-1427X-2
1493 USB_DEVICE (0x1189, 0x0893),
1494 .driver_info = (unsigned long) &ax8817x_info,
1495 }, {
1496 // goodway corp usb gwusb2e
1497 USB_DEVICE (0x1631, 0x6200),
1498 .driver_info = (unsigned long) &ax8817x_info,
1499 }, {
1500 // JVC MP-PRX1 Port Replicator
1501 USB_DEVICE (0x04f1, 0x3008),
1502 .driver_info = (unsigned long) &ax8817x_info,
1503 }, {
1504 // ASIX AX88772B 10/100
1505 USB_DEVICE (0x0b95, 0x772b),
1506 .driver_info = (unsigned long) &ax88772_info,
1507 }, {
1508 // ASIX AX88772 10/100
1509 USB_DEVICE (0x0b95, 0x7720),
1510 .driver_info = (unsigned long) &ax88772_info,
1511 }, {
1512 // ASIX AX88178 10/100/1000
1513 USB_DEVICE (0x0b95, 0x1780),
1514 .driver_info = (unsigned long) &ax88178_info,
1515 }, {
1516 // Logitec LAN-GTJ/U2A
1517 USB_DEVICE (0x0789, 0x0160),
1518 .driver_info = (unsigned long) &ax88178_info,
1519 }, {
1520 // Linksys USB200M Rev 2
1521 USB_DEVICE (0x13b1, 0x0018),
1522 .driver_info = (unsigned long) &ax88772_info,
1523 }, {
1524 // 0Q0 cable ethernet
1525 USB_DEVICE (0x1557, 0x7720),
1526 .driver_info = (unsigned long) &ax88772_info,
1527 }, {
1528 // DLink DUB-E100 H/W Ver B1
1529 USB_DEVICE (0x07d1, 0x3c05),
1530 .driver_info = (unsigned long) &ax88772_info,
1531 }, {
1532 // DLink DUB-E100 H/W Ver B1 Alternate
1533 USB_DEVICE (0x2001, 0x3c05),
1534 .driver_info = (unsigned long) &ax88772_info,
1535 }, {
1536 // Linksys USB1000
1537 USB_DEVICE (0x1737, 0x0039),
1538 .driver_info = (unsigned long) &ax88178_info,
1539 }, {
1540 // IO-DATA ETG-US2
1541 USB_DEVICE (0x04bb, 0x0930),
1542 .driver_info = (unsigned long) &ax88178_info,
1543 }, {
1544 // Belkin F5D5055
1545 USB_DEVICE(0x050d, 0x5055),
1546 .driver_info = (unsigned long) &ax88178_info,
1547 }, {
1548 // Apple USB Ethernet Adapter
1549 USB_DEVICE(0x05ac, 0x1402),
1550 .driver_info = (unsigned long) &ax88772_info,
1551 }, {
1552 // Cables-to-Go USB Ethernet Adapter
1553 USB_DEVICE(0x0b95, 0x772a),
1554 .driver_info = (unsigned long) &ax88772_info,
1555 }, {
1556 // ABOCOM for pci
1557 USB_DEVICE(0x14ea, 0xab11),
1558 .driver_info = (unsigned long) &ax88178_info,
1559 }, {
1560 // ASIX 88772a
1561 USB_DEVICE(0x0db0, 0xa877),
1562 .driver_info = (unsigned long) &ax88772_info,
1563 },
1564 { }, // END
1565 };
1566 MODULE_DEVICE_TABLE(usb, products);
1567
1568 static struct usb_driver asix_driver = {
1569 .name = "asix",
1570 .id_table = products,
1571 .probe = usbnet_probe,
1572 .suspend = usbnet_suspend,
1573 .resume = usbnet_resume,
1574 .disconnect = usbnet_disconnect,
1575 .supports_autosuspend = 1,
1576 };
1577
1578 static int __init asix_init(void)
1579 {
1580 return usb_register(&asix_driver);
1581 }
1582 module_init(asix_init);
1583
1584 static void __exit asix_exit(void)
1585 {
1586 usb_deregister(&asix_driver);
1587 }
1588 module_exit(asix_exit);
1589
1590 MODULE_AUTHOR("David Hollis");
1591 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1592 MODULE_LICENSE("GPL");
1593
Linux kernel - Deliverables
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