2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_DMY_REG0 0xc0b0
44 #define PLA_FMC 0xc0b4
45 #define PLA_CFG_WOL 0xc0b6
46 #define PLA_TEREDO_CFG 0xc0bc
47 #define PLA_MAR 0xcd00
48 #define PLA_BACKUP 0xd000
49 #define PAL_BDC_CR 0xd1a0
50 #define PLA_TEREDO_TIMER 0xd2cc
51 #define PLA_REALWOW_TIMER 0xd2e8
52 #define PLA_LEDSEL 0xdd90
53 #define PLA_LED_FEATURE 0xdd92
54 #define PLA_PHYAR 0xde00
55 #define PLA_BOOT_CTRL 0xe004
56 #define PLA_GPHY_INTR_IMR 0xe022
57 #define PLA_EEE_CR 0xe040
58 #define PLA_EEEP_CR 0xe080
59 #define PLA_MAC_PWR_CTRL 0xe0c0
60 #define PLA_MAC_PWR_CTRL2 0xe0ca
61 #define PLA_MAC_PWR_CTRL3 0xe0cc
62 #define PLA_MAC_PWR_CTRL4 0xe0ce
63 #define PLA_WDT6_CTRL 0xe428
64 #define PLA_TCR0 0xe610
65 #define PLA_TCR1 0xe612
66 #define PLA_MTPS 0xe615
67 #define PLA_TXFIFO_CTRL 0xe618
68 #define PLA_RSTTALLY 0xe800
70 #define PLA_CRWECR 0xe81c
71 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
72 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
73 #define PLA_CONFIG5 0xe822
74 #define PLA_PHY_PWR 0xe84c
75 #define PLA_OOB_CTRL 0xe84f
76 #define PLA_CPCR 0xe854
77 #define PLA_MISC_0 0xe858
78 #define PLA_MISC_1 0xe85a
79 #define PLA_OCP_GPHY_BASE 0xe86c
80 #define PLA_TALLYCNT 0xe890
81 #define PLA_SFF_STS_7 0xe8de
82 #define PLA_PHYSTATUS 0xe908
83 #define PLA_BP_BA 0xfc26
84 #define PLA_BP_0 0xfc28
85 #define PLA_BP_1 0xfc2a
86 #define PLA_BP_2 0xfc2c
87 #define PLA_BP_3 0xfc2e
88 #define PLA_BP_4 0xfc30
89 #define PLA_BP_5 0xfc32
90 #define PLA_BP_6 0xfc34
91 #define PLA_BP_7 0xfc36
92 #define PLA_BP_EN 0xfc38
94 #define USB_USB2PHY 0xb41e
95 #define USB_SSPHYLINK2 0xb428
96 #define USB_U2P3_CTRL 0xb460
97 #define USB_CSR_DUMMY1 0xb464
98 #define USB_CSR_DUMMY2 0xb466
99 #define USB_DEV_STAT 0xb808
100 #define USB_CONNECT_TIMER 0xcbf8
101 #define USB_BURST_SIZE 0xcfc0
102 #define USB_USB_CTRL 0xd406
103 #define USB_PHY_CTRL 0xd408
104 #define USB_TX_AGG 0xd40a
105 #define USB_RX_BUF_TH 0xd40c
106 #define USB_USB_TIMER 0xd428
107 #define USB_RX_EARLY_TIMEOUT 0xd42c
108 #define USB_RX_EARLY_SIZE 0xd42e
109 #define USB_PM_CTRL_STATUS 0xd432
110 #define USB_TX_DMA 0xd434
111 #define USB_TOLERANCE 0xd490
112 #define USB_LPM_CTRL 0xd41a
113 #define USB_UPS_CTRL 0xd800
114 #define USB_MISC_0 0xd81a
115 #define USB_POWER_CUT 0xd80a
116 #define USB_AFE_CTRL2 0xd824
117 #define USB_WDT11_CTRL 0xe43c
118 #define USB_BP_BA 0xfc26
119 #define USB_BP_0 0xfc28
120 #define USB_BP_1 0xfc2a
121 #define USB_BP_2 0xfc2c
122 #define USB_BP_3 0xfc2e
123 #define USB_BP_4 0xfc30
124 #define USB_BP_5 0xfc32
125 #define USB_BP_6 0xfc34
126 #define USB_BP_7 0xfc36
127 #define USB_BP_EN 0xfc38
130 #define OCP_ALDPS_CONFIG 0x2010
131 #define OCP_EEE_CONFIG1 0x2080
132 #define OCP_EEE_CONFIG2 0x2092
133 #define OCP_EEE_CONFIG3 0x2094
134 #define OCP_BASE_MII 0xa400
135 #define OCP_EEE_AR 0xa41a
136 #define OCP_EEE_DATA 0xa41c
137 #define OCP_PHY_STATUS 0xa420
138 #define OCP_POWER_CFG 0xa430
139 #define OCP_EEE_CFG 0xa432
140 #define OCP_SRAM_ADDR 0xa436
141 #define OCP_SRAM_DATA 0xa438
142 #define OCP_DOWN_SPEED 0xa442
143 #define OCP_EEE_ABLE 0xa5c4
144 #define OCP_EEE_ADV 0xa5d0
145 #define OCP_EEE_LPABLE 0xa5d2
146 #define OCP_ADC_CFG 0xbc06
149 #define SRAM_LPF_CFG 0x8012
150 #define SRAM_10M_AMP1 0x8080
151 #define SRAM_10M_AMP2 0x8082
152 #define SRAM_IMPEDANCE 0x8084
155 #define RCR_AAP 0x00000001
156 #define RCR_APM 0x00000002
157 #define RCR_AM 0x00000004
158 #define RCR_AB 0x00000008
159 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
161 /* PLA_RXFIFO_CTRL0 */
162 #define RXFIFO_THR1_NORMAL 0x00080002
163 #define RXFIFO_THR1_OOB 0x01800003
165 /* PLA_RXFIFO_CTRL1 */
166 #define RXFIFO_THR2_FULL 0x00000060
167 #define RXFIFO_THR2_HIGH 0x00000038
168 #define RXFIFO_THR2_OOB 0x0000004a
169 #define RXFIFO_THR2_NORMAL 0x00a0
171 /* PLA_RXFIFO_CTRL2 */
172 #define RXFIFO_THR3_FULL 0x00000078
173 #define RXFIFO_THR3_HIGH 0x00000048
174 #define RXFIFO_THR3_OOB 0x0000005a
175 #define RXFIFO_THR3_NORMAL 0x0110
177 /* PLA_TXFIFO_CTRL */
178 #define TXFIFO_THR_NORMAL 0x00400008
179 #define TXFIFO_THR_NORMAL2 0x01000008
182 #define ECM_ALDPS 0x0002
185 #define FMC_FCR_MCU_EN 0x0001
188 #define EEEP_CR_EEEP_TX 0x0002
191 #define WDT6_SET_MODE 0x0010
194 #define TCR0_TX_EMPTY 0x0800
195 #define TCR0_AUTO_FIFO 0x0080
198 #define VERSION_MASK 0x7cf0
201 #define MTPS_JUMBO (12 * 1024 / 64)
202 #define MTPS_DEFAULT (6 * 1024 / 64)
205 #define TALLY_RESET 0x0001
213 #define CRWECR_NORAML 0x00
214 #define CRWECR_CONFIG 0xc0
217 #define NOW_IS_OOB 0x80
218 #define TXFIFO_EMPTY 0x20
219 #define RXFIFO_EMPTY 0x10
220 #define LINK_LIST_READY 0x02
221 #define DIS_MCU_CLROOB 0x01
222 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
225 #define RXDY_GATED_EN 0x0008
228 #define RE_INIT_LL 0x8000
229 #define MCU_BORW_EN 0x4000
232 #define CPCR_RX_VLAN 0x0040
235 #define MAGIC_EN 0x0001
238 #define TEREDO_SEL 0x8000
239 #define TEREDO_WAKE_MASK 0x7f00
240 #define TEREDO_RS_EVENT_MASK 0x00fe
241 #define OOB_TEREDO_EN 0x0001
244 #define ALDPS_PROXY_MODE 0x0001
247 #define LINK_ON_WAKE_EN 0x0010
248 #define LINK_OFF_WAKE_EN 0x0008
251 #define BWF_EN 0x0040
252 #define MWF_EN 0x0020
253 #define UWF_EN 0x0010
254 #define LAN_WAKE_EN 0x0002
256 /* PLA_LED_FEATURE */
257 #define LED_MODE_MASK 0x0700
260 #define TX_10M_IDLE_EN 0x0080
261 #define PFM_PWM_SWITCH 0x0040
263 /* PLA_MAC_PWR_CTRL */
264 #define D3_CLK_GATED_EN 0x00004000
265 #define MCU_CLK_RATIO 0x07010f07
266 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
267 #define ALDPS_SPDWN_RATIO 0x0f87
269 /* PLA_MAC_PWR_CTRL2 */
270 #define EEE_SPDWN_RATIO 0x8007
272 /* PLA_MAC_PWR_CTRL3 */
273 #define PKT_AVAIL_SPDWN_EN 0x0100
274 #define SUSPEND_SPDWN_EN 0x0004
275 #define U1U2_SPDWN_EN 0x0002
276 #define L1_SPDWN_EN 0x0001
278 /* PLA_MAC_PWR_CTRL4 */
279 #define PWRSAVE_SPDWN_EN 0x1000
280 #define RXDV_SPDWN_EN 0x0800
281 #define TX10MIDLE_EN 0x0100
282 #define TP100_SPDWN_EN 0x0020
283 #define TP500_SPDWN_EN 0x0010
284 #define TP1000_SPDWN_EN 0x0008
285 #define EEE_SPDWN_EN 0x0001
287 /* PLA_GPHY_INTR_IMR */
288 #define GPHY_STS_MSK 0x0001
289 #define SPEED_DOWN_MSK 0x0002
290 #define SPDWN_RXDV_MSK 0x0004
291 #define SPDWN_LINKCHG_MSK 0x0008
294 #define PHYAR_FLAG 0x80000000
297 #define EEE_RX_EN 0x0001
298 #define EEE_TX_EN 0x0002
301 #define AUTOLOAD_DONE 0x0002
304 #define USB2PHY_SUSPEND 0x0001
305 #define USB2PHY_L1 0x0002
308 #define pwd_dn_scale_mask 0x3ffe
309 #define pwd_dn_scale(x) ((x) << 1)
312 #define DYNAMIC_BURST 0x0001
315 #define EP4_FULL_FC 0x0001
318 #define STAT_SPEED_MASK 0x0006
319 #define STAT_SPEED_HIGH 0x0000
320 #define STAT_SPEED_FULL 0x0002
323 #define TX_AGG_MAX_THRESHOLD 0x03
326 #define RX_THR_SUPPER 0x0c350180
327 #define RX_THR_HIGH 0x7a120180
328 #define RX_THR_SLOW 0xffff0180
331 #define TEST_MODE_DISABLE 0x00000001
332 #define TX_SIZE_ADJUST1 0x00000100
335 #define POWER_CUT 0x0100
337 /* USB_PM_CTRL_STATUS */
338 #define RESUME_INDICATE 0x0001
341 #define RX_AGG_DISABLE 0x0010
344 #define U2P3_ENABLE 0x0001
347 #define PWR_EN 0x0001
348 #define PHASE2_EN 0x0008
351 #define PCUT_STATUS 0x0001
353 /* USB_RX_EARLY_TIMEOUT */
354 #define COALESCE_SUPER 85000U
355 #define COALESCE_HIGH 250000U
356 #define COALESCE_SLOW 524280U
359 #define TIMER11_EN 0x0001
362 /* bit 4 ~ 5: fifo empty boundary */
363 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
364 /* bit 2 ~ 3: LMP timer */
365 #define LPM_TIMER_MASK 0x0c
366 #define LPM_TIMER_500MS 0x04 /* 500 ms */
367 #define LPM_TIMER_500US 0x0c /* 500 us */
368 #define ROK_EXIT_LPM 0x02
371 #define SEN_VAL_MASK 0xf800
372 #define SEN_VAL_NORMAL 0xa000
373 #define SEL_RXIDLE 0x0100
375 /* OCP_ALDPS_CONFIG */
376 #define ENPWRSAVE 0x8000
377 #define ENPDNPS 0x0200
378 #define LINKENA 0x0100
379 #define DIS_SDSAVE 0x0010
382 #define PHY_STAT_MASK 0x0007
383 #define PHY_STAT_LAN_ON 3
384 #define PHY_STAT_PWRDN 5
387 #define EEE_CLKDIV_EN 0x8000
388 #define EN_ALDPS 0x0004
389 #define EN_10M_PLLOFF 0x0001
391 /* OCP_EEE_CONFIG1 */
392 #define RG_TXLPI_MSK_HFDUP 0x8000
393 #define RG_MATCLR_EN 0x4000
394 #define EEE_10_CAP 0x2000
395 #define EEE_NWAY_EN 0x1000
396 #define TX_QUIET_EN 0x0200
397 #define RX_QUIET_EN 0x0100
398 #define sd_rise_time_mask 0x0070
399 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
400 #define RG_RXLPI_MSK_HFDUP 0x0008
401 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
403 /* OCP_EEE_CONFIG2 */
404 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
405 #define RG_DACQUIET_EN 0x0400
406 #define RG_LDVQUIET_EN 0x0200
407 #define RG_CKRSEL 0x0020
408 #define RG_EEEPRG_EN 0x0010
410 /* OCP_EEE_CONFIG3 */
411 #define fast_snr_mask 0xff80
412 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
413 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
414 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
417 /* bit[15:14] function */
418 #define FUN_ADDR 0x0000
419 #define FUN_DATA 0x4000
420 /* bit[4:0] device addr */
423 #define CTAP_SHORT_EN 0x0040
424 #define EEE10_EN 0x0010
427 #define EN_10M_BGOFF 0x0080
430 #define CKADSEL_L 0x0100
431 #define ADC_EN 0x0080
432 #define EN_EMI_L 0x0040
435 #define LPF_AUTO_TUNE 0x8000
438 #define GDAC_IB_UPALL 0x0008
441 #define AMP_DN 0x0200
444 #define RX_DRIVING_MASK 0x6000
446 enum rtl_register_content
{
454 #define RTL8152_MAX_TX 4
455 #define RTL8152_MAX_RX 10
461 #define INTR_LINK 0x0004
463 #define RTL8152_REQT_READ 0xc0
464 #define RTL8152_REQT_WRITE 0x40
465 #define RTL8152_REQ_GET_REGS 0x05
466 #define RTL8152_REQ_SET_REGS 0x05
468 #define BYTE_EN_DWORD 0xff
469 #define BYTE_EN_WORD 0x33
470 #define BYTE_EN_BYTE 0x11
471 #define BYTE_EN_SIX_BYTES 0x3f
472 #define BYTE_EN_START_MASK 0x0f
473 #define BYTE_EN_END_MASK 0xf0
475 #define RTL8153_MAX_PACKET 9216 /* 9K */
476 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
477 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
478 #define RTL8153_RMS RTL8153_MAX_PACKET
479 #define RTL8152_TX_TIMEOUT (5 * HZ)
480 #define RTL8152_NAPI_WEIGHT 64
493 /* Define these values to match your device */
494 #define VENDOR_ID_REALTEK 0x0bda
495 #define VENDOR_ID_SAMSUNG 0x04e8
496 #define VENDOR_ID_LENOVO 0x17ef
498 #define MCU_TYPE_PLA 0x0100
499 #define MCU_TYPE_USB 0x0000
501 struct tally_counter
{
508 __le32 tx_one_collision
;
509 __le32 tx_multi_collision
;
519 #define RX_LEN_MASK 0x7fff
522 #define RD_UDP_CS BIT(23)
523 #define RD_TCP_CS BIT(22)
524 #define RD_IPV6_CS BIT(20)
525 #define RD_IPV4_CS BIT(19)
528 #define IPF BIT(23) /* IP checksum fail */
529 #define UDPF BIT(22) /* UDP checksum fail */
530 #define TCPF BIT(21) /* TCP checksum fail */
531 #define RX_VLAN_TAG BIT(16)
540 #define TX_FS BIT(31) /* First segment of a packet */
541 #define TX_LS BIT(30) /* Final segment of a packet */
542 #define GTSENDV4 BIT(28)
543 #define GTSENDV6 BIT(27)
544 #define GTTCPHO_SHIFT 18
545 #define GTTCPHO_MAX 0x7fU
546 #define TX_LEN_MAX 0x3ffffU
549 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
550 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
551 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
552 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
554 #define MSS_MAX 0x7ffU
555 #define TCPHO_SHIFT 17
556 #define TCPHO_MAX 0x7ffU
557 #define TX_VLAN_TAG BIT(16)
563 struct list_head list
;
565 struct r8152
*context
;
571 struct list_head list
;
573 struct r8152
*context
;
582 struct usb_device
*udev
;
583 struct napi_struct napi
;
584 struct usb_interface
*intf
;
585 struct net_device
*netdev
;
586 struct urb
*intr_urb
;
587 struct tx_agg tx_info
[RTL8152_MAX_TX
];
588 struct rx_agg rx_info
[RTL8152_MAX_RX
];
589 struct list_head rx_done
, tx_free
;
590 struct sk_buff_head tx_queue
, rx_queue
;
591 spinlock_t rx_lock
, tx_lock
;
592 struct delayed_work schedule
;
593 struct mii_if_info mii
;
594 struct mutex control
; /* use for hw setting */
597 void (*init
)(struct r8152
*);
598 int (*enable
)(struct r8152
*);
599 void (*disable
)(struct r8152
*);
600 void (*up
)(struct r8152
*);
601 void (*down
)(struct r8152
*);
602 void (*unload
)(struct r8152
*);
603 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
604 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
633 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
634 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
636 static const int multicast_filter_limit
= 32;
637 static unsigned int agg_buf_sz
= 16384;
639 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
640 VLAN_ETH_HLEN - VLAN_HLEN)
643 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
648 tmp
= kmalloc(size
, GFP_KERNEL
);
652 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
653 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
654 value
, index
, tmp
, size
, 500);
656 memcpy(data
, tmp
, size
);
663 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
668 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
672 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
673 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
674 value
, index
, tmp
, size
, 500);
681 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
682 void *data
, u16 type
)
687 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
690 /* both size and indix must be 4 bytes align */
691 if ((size
& 3) || !size
|| (index
& 3) || !data
)
694 if ((u32
)index
+ (u32
)size
> 0xffff)
699 ret
= get_registers(tp
, index
, type
, limit
, data
);
707 ret
= get_registers(tp
, index
, type
, size
, data
);
719 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
724 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
725 u16 size
, void *data
, u16 type
)
728 u16 byteen_start
, byteen_end
, byen
;
731 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
734 /* both size and indix must be 4 bytes align */
735 if ((size
& 3) || !size
|| (index
& 3) || !data
)
738 if ((u32
)index
+ (u32
)size
> 0xffff)
741 byteen_start
= byteen
& BYTE_EN_START_MASK
;
742 byteen_end
= byteen
& BYTE_EN_END_MASK
;
744 byen
= byteen_start
| (byteen_start
<< 4);
745 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
758 ret
= set_registers(tp
, index
,
759 type
| BYTE_EN_DWORD
,
768 ret
= set_registers(tp
, index
,
769 type
| BYTE_EN_DWORD
,
781 byen
= byteen_end
| (byteen_end
>> 4);
782 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
789 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
795 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
797 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
801 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
803 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
807 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
809 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
813 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
815 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
818 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
822 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
824 return __le32_to_cpu(data
);
827 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
829 __le32 tmp
= __cpu_to_le32(data
);
831 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
834 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
838 u8 shift
= index
& 2;
842 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
844 data
= __le32_to_cpu(tmp
);
845 data
>>= (shift
* 8);
851 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
855 u16 byen
= BYTE_EN_WORD
;
856 u8 shift
= index
& 2;
862 mask
<<= (shift
* 8);
863 data
<<= (shift
* 8);
867 tmp
= __cpu_to_le32(data
);
869 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
872 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
876 u8 shift
= index
& 3;
880 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
882 data
= __le32_to_cpu(tmp
);
883 data
>>= (shift
* 8);
889 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
893 u16 byen
= BYTE_EN_BYTE
;
894 u8 shift
= index
& 3;
900 mask
<<= (shift
* 8);
901 data
<<= (shift
* 8);
905 tmp
= __cpu_to_le32(data
);
907 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
910 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
912 u16 ocp_base
, ocp_index
;
914 ocp_base
= addr
& 0xf000;
915 if (ocp_base
!= tp
->ocp_base
) {
916 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
917 tp
->ocp_base
= ocp_base
;
920 ocp_index
= (addr
& 0x0fff) | 0xb000;
921 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
924 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
926 u16 ocp_base
, ocp_index
;
928 ocp_base
= addr
& 0xf000;
929 if (ocp_base
!= tp
->ocp_base
) {
930 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
931 tp
->ocp_base
= ocp_base
;
934 ocp_index
= (addr
& 0x0fff) | 0xb000;
935 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
938 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
940 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
943 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
945 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
948 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
950 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
951 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
954 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
956 struct r8152
*tp
= netdev_priv(netdev
);
959 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
962 if (phy_id
!= R8152_PHY_ID
)
965 ret
= r8152_mdio_read(tp
, reg
);
971 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
973 struct r8152
*tp
= netdev_priv(netdev
);
975 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
978 if (phy_id
!= R8152_PHY_ID
)
981 r8152_mdio_write(tp
, reg
, val
);
985 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
987 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
989 struct r8152
*tp
= netdev_priv(netdev
);
990 struct sockaddr
*addr
= p
;
991 int ret
= -EADDRNOTAVAIL
;
993 if (!is_valid_ether_addr(addr
->sa_data
))
996 ret
= usb_autopm_get_interface(tp
->intf
);
1000 mutex_lock(&tp
->control
);
1002 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1004 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1005 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1006 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1008 mutex_unlock(&tp
->control
);
1010 usb_autopm_put_interface(tp
->intf
);
1015 static int set_ethernet_addr(struct r8152
*tp
)
1017 struct net_device
*dev
= tp
->netdev
;
1021 if (tp
->version
== RTL_VER_01
)
1022 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1024 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1027 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1028 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1029 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1031 eth_hw_addr_random(dev
);
1032 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1033 ret
= rtl8152_set_mac_address(dev
, &sa
);
1034 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1037 if (tp
->version
== RTL_VER_01
)
1038 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1040 ret
= rtl8152_set_mac_address(dev
, &sa
);
1046 static void read_bulk_callback(struct urb
*urb
)
1048 struct net_device
*netdev
;
1049 int status
= urb
->status
;
1061 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1064 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1067 netdev
= tp
->netdev
;
1069 /* When link down, the driver would cancel all bulks. */
1070 /* This avoid the re-submitting bulk */
1071 if (!netif_carrier_ok(netdev
))
1074 usb_mark_last_busy(tp
->udev
);
1078 if (urb
->actual_length
< ETH_ZLEN
)
1081 spin_lock(&tp
->rx_lock
);
1082 list_add_tail(&agg
->list
, &tp
->rx_done
);
1083 spin_unlock(&tp
->rx_lock
);
1084 napi_schedule(&tp
->napi
);
1087 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1088 netif_device_detach(tp
->netdev
);
1091 return; /* the urb is in unlink state */
1093 if (net_ratelimit())
1094 netdev_warn(netdev
, "maybe reset is needed?\n");
1097 if (net_ratelimit())
1098 netdev_warn(netdev
, "Rx status %d\n", status
);
1102 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1105 static void write_bulk_callback(struct urb
*urb
)
1107 struct net_device_stats
*stats
;
1108 struct net_device
*netdev
;
1111 int status
= urb
->status
;
1121 netdev
= tp
->netdev
;
1122 stats
= &netdev
->stats
;
1124 if (net_ratelimit())
1125 netdev_warn(netdev
, "Tx status %d\n", status
);
1126 stats
->tx_errors
+= agg
->skb_num
;
1128 stats
->tx_packets
+= agg
->skb_num
;
1129 stats
->tx_bytes
+= agg
->skb_len
;
1132 spin_lock(&tp
->tx_lock
);
1133 list_add_tail(&agg
->list
, &tp
->tx_free
);
1134 spin_unlock(&tp
->tx_lock
);
1136 usb_autopm_put_interface_async(tp
->intf
);
1138 if (!netif_carrier_ok(netdev
))
1141 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1144 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1147 if (!skb_queue_empty(&tp
->tx_queue
))
1148 napi_schedule(&tp
->napi
);
1151 static void intr_callback(struct urb
*urb
)
1155 int status
= urb
->status
;
1162 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1165 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1169 case 0: /* success */
1171 case -ECONNRESET
: /* unlink */
1173 netif_device_detach(tp
->netdev
);
1176 netif_info(tp
, intr
, tp
->netdev
,
1177 "Stop submitting intr, status %d\n", status
);
1180 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1182 /* -EPIPE: should clear the halt */
1184 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1188 d
= urb
->transfer_buffer
;
1189 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1190 if (!netif_carrier_ok(tp
->netdev
)) {
1191 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1192 schedule_delayed_work(&tp
->schedule
, 0);
1195 if (netif_carrier_ok(tp
->netdev
)) {
1196 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1197 schedule_delayed_work(&tp
->schedule
, 0);
1202 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1203 if (res
== -ENODEV
) {
1204 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1205 netif_device_detach(tp
->netdev
);
1207 netif_err(tp
, intr
, tp
->netdev
,
1208 "can't resubmit intr, status %d\n", res
);
1212 static inline void *rx_agg_align(void *data
)
1214 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1217 static inline void *tx_agg_align(void *data
)
1219 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1222 static void free_all_mem(struct r8152
*tp
)
1226 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1227 usb_free_urb(tp
->rx_info
[i
].urb
);
1228 tp
->rx_info
[i
].urb
= NULL
;
1230 kfree(tp
->rx_info
[i
].buffer
);
1231 tp
->rx_info
[i
].buffer
= NULL
;
1232 tp
->rx_info
[i
].head
= NULL
;
1235 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1236 usb_free_urb(tp
->tx_info
[i
].urb
);
1237 tp
->tx_info
[i
].urb
= NULL
;
1239 kfree(tp
->tx_info
[i
].buffer
);
1240 tp
->tx_info
[i
].buffer
= NULL
;
1241 tp
->tx_info
[i
].head
= NULL
;
1244 usb_free_urb(tp
->intr_urb
);
1245 tp
->intr_urb
= NULL
;
1247 kfree(tp
->intr_buff
);
1248 tp
->intr_buff
= NULL
;
1251 static int alloc_all_mem(struct r8152
*tp
)
1253 struct net_device
*netdev
= tp
->netdev
;
1254 struct usb_interface
*intf
= tp
->intf
;
1255 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1256 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1261 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1263 spin_lock_init(&tp
->rx_lock
);
1264 spin_lock_init(&tp
->tx_lock
);
1265 INIT_LIST_HEAD(&tp
->tx_free
);
1266 skb_queue_head_init(&tp
->tx_queue
);
1267 skb_queue_head_init(&tp
->rx_queue
);
1269 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1270 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1274 if (buf
!= rx_agg_align(buf
)) {
1276 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1282 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1288 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1289 tp
->rx_info
[i
].context
= tp
;
1290 tp
->rx_info
[i
].urb
= urb
;
1291 tp
->rx_info
[i
].buffer
= buf
;
1292 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1295 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1296 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1300 if (buf
!= tx_agg_align(buf
)) {
1302 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1308 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1314 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1315 tp
->tx_info
[i
].context
= tp
;
1316 tp
->tx_info
[i
].urb
= urb
;
1317 tp
->tx_info
[i
].buffer
= buf
;
1318 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1320 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1323 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1327 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1331 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1332 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1333 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1334 tp
, tp
->intr_interval
);
1343 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1345 struct tx_agg
*agg
= NULL
;
1346 unsigned long flags
;
1348 if (list_empty(&tp
->tx_free
))
1351 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1352 if (!list_empty(&tp
->tx_free
)) {
1353 struct list_head
*cursor
;
1355 cursor
= tp
->tx_free
.next
;
1356 list_del_init(cursor
);
1357 agg
= list_entry(cursor
, struct tx_agg
, list
);
1359 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1364 /* r8152_csum_workaround()
1365 * The hw limites the value the transport offset. When the offset is out of the
1366 * range, calculate the checksum by sw.
1368 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1369 struct sk_buff_head
*list
)
1371 if (skb_shinfo(skb
)->gso_size
) {
1372 netdev_features_t features
= tp
->netdev
->features
;
1373 struct sk_buff_head seg_list
;
1374 struct sk_buff
*segs
, *nskb
;
1376 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1377 segs
= skb_gso_segment(skb
, features
);
1378 if (IS_ERR(segs
) || !segs
)
1381 __skb_queue_head_init(&seg_list
);
1387 __skb_queue_tail(&seg_list
, nskb
);
1390 skb_queue_splice(&seg_list
, list
);
1392 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1393 if (skb_checksum_help(skb
) < 0)
1396 __skb_queue_head(list
, skb
);
1398 struct net_device_stats
*stats
;
1401 stats
= &tp
->netdev
->stats
;
1402 stats
->tx_dropped
++;
1407 /* msdn_giant_send_check()
1408 * According to the document of microsoft, the TCP Pseudo Header excludes the
1409 * packet length for IPv6 TCP large packets.
1411 static int msdn_giant_send_check(struct sk_buff
*skb
)
1413 const struct ipv6hdr
*ipv6h
;
1417 ret
= skb_cow_head(skb
, 0);
1421 ipv6h
= ipv6_hdr(skb
);
1425 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1430 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1432 if (skb_vlan_tag_present(skb
)) {
1435 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1436 desc
->opts2
|= cpu_to_le32(opts2
);
1440 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1442 u32 opts2
= le32_to_cpu(desc
->opts2
);
1444 if (opts2
& RX_VLAN_TAG
)
1445 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1446 swab16(opts2
& 0xffff));
1449 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1450 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1452 u32 mss
= skb_shinfo(skb
)->gso_size
;
1453 u32 opts1
, opts2
= 0;
1454 int ret
= TX_CSUM_SUCCESS
;
1456 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1458 opts1
= len
| TX_FS
| TX_LS
;
1461 if (transport_offset
> GTTCPHO_MAX
) {
1462 netif_warn(tp
, tx_err
, tp
->netdev
,
1463 "Invalid transport offset 0x%x for TSO\n",
1469 switch (vlan_get_protocol(skb
)) {
1470 case htons(ETH_P_IP
):
1474 case htons(ETH_P_IPV6
):
1475 if (msdn_giant_send_check(skb
)) {
1487 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1488 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1489 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1492 if (transport_offset
> TCPHO_MAX
) {
1493 netif_warn(tp
, tx_err
, tp
->netdev
,
1494 "Invalid transport offset 0x%x\n",
1500 switch (vlan_get_protocol(skb
)) {
1501 case htons(ETH_P_IP
):
1503 ip_protocol
= ip_hdr(skb
)->protocol
;
1506 case htons(ETH_P_IPV6
):
1508 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1512 ip_protocol
= IPPROTO_RAW
;
1516 if (ip_protocol
== IPPROTO_TCP
)
1518 else if (ip_protocol
== IPPROTO_UDP
)
1523 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1526 desc
->opts2
= cpu_to_le32(opts2
);
1527 desc
->opts1
= cpu_to_le32(opts1
);
1533 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1535 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1539 __skb_queue_head_init(&skb_head
);
1540 spin_lock(&tx_queue
->lock
);
1541 skb_queue_splice_init(tx_queue
, &skb_head
);
1542 spin_unlock(&tx_queue
->lock
);
1544 tx_data
= agg
->head
;
1547 remain
= agg_buf_sz
;
1549 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1550 struct tx_desc
*tx_desc
;
1551 struct sk_buff
*skb
;
1555 skb
= __skb_dequeue(&skb_head
);
1559 len
= skb
->len
+ sizeof(*tx_desc
);
1562 __skb_queue_head(&skb_head
, skb
);
1566 tx_data
= tx_agg_align(tx_data
);
1567 tx_desc
= (struct tx_desc
*)tx_data
;
1569 offset
= (u32
)skb_transport_offset(skb
);
1571 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1572 r8152_csum_workaround(tp
, skb
, &skb_head
);
1576 rtl_tx_vlan_tag(tx_desc
, skb
);
1578 tx_data
+= sizeof(*tx_desc
);
1581 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1582 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1584 stats
->tx_dropped
++;
1585 dev_kfree_skb_any(skb
);
1586 tx_data
-= sizeof(*tx_desc
);
1591 agg
->skb_len
+= len
;
1594 dev_kfree_skb_any(skb
);
1596 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1599 if (!skb_queue_empty(&skb_head
)) {
1600 spin_lock(&tx_queue
->lock
);
1601 skb_queue_splice(&skb_head
, tx_queue
);
1602 spin_unlock(&tx_queue
->lock
);
1605 netif_tx_lock(tp
->netdev
);
1607 if (netif_queue_stopped(tp
->netdev
) &&
1608 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1609 netif_wake_queue(tp
->netdev
);
1611 netif_tx_unlock(tp
->netdev
);
1613 ret
= usb_autopm_get_interface_async(tp
->intf
);
1617 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1618 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1619 (usb_complete_t
)write_bulk_callback
, agg
);
1621 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1623 usb_autopm_put_interface_async(tp
->intf
);
1629 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1631 u8 checksum
= CHECKSUM_NONE
;
1634 if (tp
->version
== RTL_VER_01
)
1637 opts2
= le32_to_cpu(rx_desc
->opts2
);
1638 opts3
= le32_to_cpu(rx_desc
->opts3
);
1640 if (opts2
& RD_IPV4_CS
) {
1642 checksum
= CHECKSUM_NONE
;
1643 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1644 checksum
= CHECKSUM_NONE
;
1645 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1646 checksum
= CHECKSUM_NONE
;
1648 checksum
= CHECKSUM_UNNECESSARY
;
1649 } else if (RD_IPV6_CS
) {
1650 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1651 checksum
= CHECKSUM_UNNECESSARY
;
1652 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1653 checksum
= CHECKSUM_UNNECESSARY
;
1660 static int rx_bottom(struct r8152
*tp
, int budget
)
1662 unsigned long flags
;
1663 struct list_head
*cursor
, *next
, rx_queue
;
1664 int ret
= 0, work_done
= 0;
1666 if (!skb_queue_empty(&tp
->rx_queue
)) {
1667 while (work_done
< budget
) {
1668 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1669 struct net_device
*netdev
= tp
->netdev
;
1670 struct net_device_stats
*stats
= &netdev
->stats
;
1671 unsigned int pkt_len
;
1677 napi_gro_receive(&tp
->napi
, skb
);
1679 stats
->rx_packets
++;
1680 stats
->rx_bytes
+= pkt_len
;
1684 if (list_empty(&tp
->rx_done
))
1687 INIT_LIST_HEAD(&rx_queue
);
1688 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1689 list_splice_init(&tp
->rx_done
, &rx_queue
);
1690 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1692 list_for_each_safe(cursor
, next
, &rx_queue
) {
1693 struct rx_desc
*rx_desc
;
1699 list_del_init(cursor
);
1701 agg
= list_entry(cursor
, struct rx_agg
, list
);
1703 if (urb
->actual_length
< ETH_ZLEN
)
1706 rx_desc
= agg
->head
;
1707 rx_data
= agg
->head
;
1708 len_used
+= sizeof(struct rx_desc
);
1710 while (urb
->actual_length
> len_used
) {
1711 struct net_device
*netdev
= tp
->netdev
;
1712 struct net_device_stats
*stats
= &netdev
->stats
;
1713 unsigned int pkt_len
;
1714 struct sk_buff
*skb
;
1716 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1717 if (pkt_len
< ETH_ZLEN
)
1720 len_used
+= pkt_len
;
1721 if (urb
->actual_length
< len_used
)
1724 pkt_len
-= CRC_SIZE
;
1725 rx_data
+= sizeof(struct rx_desc
);
1727 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1729 stats
->rx_dropped
++;
1733 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1734 memcpy(skb
->data
, rx_data
, pkt_len
);
1735 skb_put(skb
, pkt_len
);
1736 skb
->protocol
= eth_type_trans(skb
, netdev
);
1737 rtl_rx_vlan_tag(rx_desc
, skb
);
1738 if (work_done
< budget
) {
1739 napi_gro_receive(&tp
->napi
, skb
);
1741 stats
->rx_packets
++;
1742 stats
->rx_bytes
+= pkt_len
;
1744 __skb_queue_tail(&tp
->rx_queue
, skb
);
1748 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1749 rx_desc
= (struct rx_desc
*)rx_data
;
1750 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1751 len_used
+= sizeof(struct rx_desc
);
1756 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1758 urb
->actual_length
= 0;
1759 list_add_tail(&agg
->list
, next
);
1763 if (!list_empty(&rx_queue
)) {
1764 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1765 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1766 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1773 static void tx_bottom(struct r8152
*tp
)
1780 if (skb_queue_empty(&tp
->tx_queue
))
1783 agg
= r8152_get_tx_agg(tp
);
1787 res
= r8152_tx_agg_fill(tp
, agg
);
1789 struct net_device
*netdev
= tp
->netdev
;
1791 if (res
== -ENODEV
) {
1792 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1793 netif_device_detach(netdev
);
1795 struct net_device_stats
*stats
= &netdev
->stats
;
1796 unsigned long flags
;
1798 netif_warn(tp
, tx_err
, netdev
,
1799 "failed tx_urb %d\n", res
);
1800 stats
->tx_dropped
+= agg
->skb_num
;
1802 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1803 list_add_tail(&agg
->list
, &tp
->tx_free
);
1804 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1810 static void bottom_half(struct r8152
*tp
)
1812 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1815 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1818 /* When link down, the driver would cancel all bulks. */
1819 /* This avoid the re-submitting bulk */
1820 if (!netif_carrier_ok(tp
->netdev
))
1823 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1828 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1830 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1833 work_done
= rx_bottom(tp
, budget
);
1836 if (work_done
< budget
) {
1837 napi_complete(napi
);
1838 if (!list_empty(&tp
->rx_done
))
1839 napi_schedule(napi
);
1846 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1850 /* The rx would be stopped, so skip submitting */
1851 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1852 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1855 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1856 agg
->head
, agg_buf_sz
,
1857 (usb_complete_t
)read_bulk_callback
, agg
);
1859 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1860 if (ret
== -ENODEV
) {
1861 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1862 netif_device_detach(tp
->netdev
);
1864 struct urb
*urb
= agg
->urb
;
1865 unsigned long flags
;
1867 urb
->actual_length
= 0;
1868 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1869 list_add_tail(&agg
->list
, &tp
->rx_done
);
1870 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1872 netif_err(tp
, rx_err
, tp
->netdev
,
1873 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1875 napi_schedule(&tp
->napi
);
1881 static void rtl_drop_queued_tx(struct r8152
*tp
)
1883 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1884 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1885 struct sk_buff
*skb
;
1887 if (skb_queue_empty(tx_queue
))
1890 __skb_queue_head_init(&skb_head
);
1891 spin_lock_bh(&tx_queue
->lock
);
1892 skb_queue_splice_init(tx_queue
, &skb_head
);
1893 spin_unlock_bh(&tx_queue
->lock
);
1895 while ((skb
= __skb_dequeue(&skb_head
))) {
1897 stats
->tx_dropped
++;
1901 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1903 struct r8152
*tp
= netdev_priv(netdev
);
1906 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1907 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1908 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1911 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1913 struct r8152
*tp
= netdev_priv(netdev
);
1915 if (netif_carrier_ok(netdev
)) {
1916 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1917 schedule_delayed_work(&tp
->schedule
, 0);
1921 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1923 struct r8152
*tp
= netdev_priv(netdev
);
1924 u32 mc_filter
[2]; /* Multicast hash filter */
1928 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1929 netif_stop_queue(netdev
);
1930 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1931 ocp_data
&= ~RCR_ACPT_ALL
;
1932 ocp_data
|= RCR_AB
| RCR_APM
;
1934 if (netdev
->flags
& IFF_PROMISC
) {
1935 /* Unconditionally log net taps. */
1936 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1937 ocp_data
|= RCR_AM
| RCR_AAP
;
1938 mc_filter
[1] = 0xffffffff;
1939 mc_filter
[0] = 0xffffffff;
1940 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1941 (netdev
->flags
& IFF_ALLMULTI
)) {
1942 /* Too many to filter perfectly -- accept all multicasts. */
1944 mc_filter
[1] = 0xffffffff;
1945 mc_filter
[0] = 0xffffffff;
1947 struct netdev_hw_addr
*ha
;
1951 netdev_for_each_mc_addr(ha
, netdev
) {
1952 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1954 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1959 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1960 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1962 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1963 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1964 netif_wake_queue(netdev
);
1967 static netdev_features_t
1968 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
1969 netdev_features_t features
)
1971 u32 mss
= skb_shinfo(skb
)->gso_size
;
1972 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
1973 int offset
= skb_transport_offset(skb
);
1975 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
1976 features
&= ~(NETIF_F_ALL_CSUM
| NETIF_F_GSO_MASK
);
1977 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
1978 features
&= ~NETIF_F_GSO_MASK
;
1983 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1984 struct net_device
*netdev
)
1986 struct r8152
*tp
= netdev_priv(netdev
);
1988 skb_tx_timestamp(skb
);
1990 skb_queue_tail(&tp
->tx_queue
, skb
);
1992 if (!list_empty(&tp
->tx_free
)) {
1993 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
1994 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
1995 schedule_delayed_work(&tp
->schedule
, 0);
1997 usb_mark_last_busy(tp
->udev
);
1998 napi_schedule(&tp
->napi
);
2000 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2001 netif_stop_queue(netdev
);
2004 return NETDEV_TX_OK
;
2007 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2011 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2012 ocp_data
&= ~FMC_FCR_MCU_EN
;
2013 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2014 ocp_data
|= FMC_FCR_MCU_EN
;
2015 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2018 static void rtl8152_nic_reset(struct r8152
*tp
)
2022 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2024 for (i
= 0; i
< 1000; i
++) {
2025 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2027 usleep_range(100, 400);
2031 static void set_tx_qlen(struct r8152
*tp
)
2033 struct net_device
*netdev
= tp
->netdev
;
2035 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2036 sizeof(struct tx_desc
));
2039 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2041 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2044 static void rtl_set_eee_plus(struct r8152
*tp
)
2049 speed
= rtl8152_get_speed(tp
);
2050 if (speed
& _10bps
) {
2051 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2052 ocp_data
|= EEEP_CR_EEEP_TX
;
2053 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2055 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2056 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2057 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2061 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2065 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2067 ocp_data
|= RXDY_GATED_EN
;
2069 ocp_data
&= ~RXDY_GATED_EN
;
2070 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2073 static int rtl_start_rx(struct r8152
*tp
)
2077 napi_disable(&tp
->napi
);
2078 INIT_LIST_HEAD(&tp
->rx_done
);
2079 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2080 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2081 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2085 napi_enable(&tp
->napi
);
2087 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2088 struct list_head rx_queue
;
2089 unsigned long flags
;
2091 INIT_LIST_HEAD(&rx_queue
);
2094 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2095 struct urb
*urb
= agg
->urb
;
2097 urb
->actual_length
= 0;
2098 list_add_tail(&agg
->list
, &rx_queue
);
2099 } while (i
< RTL8152_MAX_RX
);
2101 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2102 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2103 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2109 static int rtl_stop_rx(struct r8152
*tp
)
2113 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2114 usb_kill_urb(tp
->rx_info
[i
].urb
);
2116 while (!skb_queue_empty(&tp
->rx_queue
))
2117 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2122 static int rtl_enable(struct r8152
*tp
)
2126 r8152b_reset_packet_filter(tp
);
2128 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2129 ocp_data
|= CR_RE
| CR_TE
;
2130 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2132 rxdy_gated_en(tp
, false);
2137 static int rtl8152_enable(struct r8152
*tp
)
2139 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2143 rtl_set_eee_plus(tp
);
2145 return rtl_enable(tp
);
2148 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2150 u32 ocp_data
= tp
->coalesce
/ 8;
2152 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2155 static void r8153_set_rx_early_size(struct r8152
*tp
)
2157 u32 mtu
= tp
->netdev
->mtu
;
2158 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 4;
2160 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2163 static int rtl8153_enable(struct r8152
*tp
)
2165 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2169 rtl_set_eee_plus(tp
);
2170 r8153_set_rx_early_timeout(tp
);
2171 r8153_set_rx_early_size(tp
);
2173 return rtl_enable(tp
);
2176 static void rtl_disable(struct r8152
*tp
)
2181 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2182 rtl_drop_queued_tx(tp
);
2186 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2187 ocp_data
&= ~RCR_ACPT_ALL
;
2188 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2190 rtl_drop_queued_tx(tp
);
2192 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2193 usb_kill_urb(tp
->tx_info
[i
].urb
);
2195 rxdy_gated_en(tp
, true);
2197 for (i
= 0; i
< 1000; i
++) {
2198 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2199 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2201 usleep_range(1000, 2000);
2204 for (i
= 0; i
< 1000; i
++) {
2205 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2207 usleep_range(1000, 2000);
2212 rtl8152_nic_reset(tp
);
2215 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2219 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2221 ocp_data
|= POWER_CUT
;
2223 ocp_data
&= ~POWER_CUT
;
2224 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2226 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2227 ocp_data
&= ~RESUME_INDICATE
;
2228 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2231 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2235 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2237 ocp_data
|= CPCR_RX_VLAN
;
2239 ocp_data
&= ~CPCR_RX_VLAN
;
2240 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2243 static int rtl8152_set_features(struct net_device
*dev
,
2244 netdev_features_t features
)
2246 netdev_features_t changed
= features
^ dev
->features
;
2247 struct r8152
*tp
= netdev_priv(dev
);
2250 ret
= usb_autopm_get_interface(tp
->intf
);
2254 mutex_lock(&tp
->control
);
2256 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2257 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2258 rtl_rx_vlan_en(tp
, true);
2260 rtl_rx_vlan_en(tp
, false);
2263 mutex_unlock(&tp
->control
);
2265 usb_autopm_put_interface(tp
->intf
);
2271 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2273 static u32
__rtl_get_wol(struct r8152
*tp
)
2278 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2279 if (!(ocp_data
& LAN_WAKE_EN
))
2282 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2283 if (ocp_data
& LINK_ON_WAKE_EN
)
2284 wolopts
|= WAKE_PHY
;
2286 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2287 if (ocp_data
& UWF_EN
)
2288 wolopts
|= WAKE_UCAST
;
2289 if (ocp_data
& BWF_EN
)
2290 wolopts
|= WAKE_BCAST
;
2291 if (ocp_data
& MWF_EN
)
2292 wolopts
|= WAKE_MCAST
;
2294 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2295 if (ocp_data
& MAGIC_EN
)
2296 wolopts
|= WAKE_MAGIC
;
2301 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2305 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2307 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2308 ocp_data
&= ~LINK_ON_WAKE_EN
;
2309 if (wolopts
& WAKE_PHY
)
2310 ocp_data
|= LINK_ON_WAKE_EN
;
2311 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2313 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2314 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2315 if (wolopts
& WAKE_UCAST
)
2317 if (wolopts
& WAKE_BCAST
)
2319 if (wolopts
& WAKE_MCAST
)
2321 if (wolopts
& WAKE_ANY
)
2322 ocp_data
|= LAN_WAKE_EN
;
2323 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2325 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2327 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2328 ocp_data
&= ~MAGIC_EN
;
2329 if (wolopts
& WAKE_MAGIC
)
2330 ocp_data
|= MAGIC_EN
;
2331 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2333 if (wolopts
& WAKE_ANY
)
2334 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2336 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2339 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2344 __rtl_set_wol(tp
, WAKE_ANY
);
2346 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2348 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2349 ocp_data
|= LINK_OFF_WAKE_EN
;
2350 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2352 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2354 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2358 static void rtl_phy_reset(struct r8152
*tp
)
2363 clear_bit(PHY_RESET
, &tp
->flags
);
2365 data
= r8152_mdio_read(tp
, MII_BMCR
);
2367 /* don't reset again before the previous one complete */
2368 if (data
& BMCR_RESET
)
2372 r8152_mdio_write(tp
, MII_BMCR
, data
);
2374 for (i
= 0; i
< 50; i
++) {
2376 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2381 static void r8153_teredo_off(struct r8152
*tp
)
2385 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2386 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2387 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2389 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2390 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2391 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2394 static void r8152b_disable_aldps(struct r8152
*tp
)
2396 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2400 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2402 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2403 LINKENA
| DIS_SDSAVE
);
2406 static void rtl8152_disable(struct r8152
*tp
)
2408 r8152b_disable_aldps(tp
);
2410 r8152b_enable_aldps(tp
);
2413 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2417 data
= r8152_mdio_read(tp
, MII_BMCR
);
2418 if (data
& BMCR_PDOWN
) {
2419 data
&= ~BMCR_PDOWN
;
2420 r8152_mdio_write(tp
, MII_BMCR
, data
);
2423 set_bit(PHY_RESET
, &tp
->flags
);
2426 static void r8152b_exit_oob(struct r8152
*tp
)
2431 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2432 ocp_data
&= ~RCR_ACPT_ALL
;
2433 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2435 rxdy_gated_en(tp
, true);
2436 r8153_teredo_off(tp
);
2437 r8152b_hw_phy_cfg(tp
);
2439 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2440 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2442 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2443 ocp_data
&= ~NOW_IS_OOB
;
2444 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2446 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2447 ocp_data
&= ~MCU_BORW_EN
;
2448 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2450 for (i
= 0; i
< 1000; i
++) {
2451 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2452 if (ocp_data
& LINK_LIST_READY
)
2454 usleep_range(1000, 2000);
2457 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2458 ocp_data
|= RE_INIT_LL
;
2459 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2461 for (i
= 0; i
< 1000; i
++) {
2462 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2463 if (ocp_data
& LINK_LIST_READY
)
2465 usleep_range(1000, 2000);
2468 rtl8152_nic_reset(tp
);
2470 /* rx share fifo credit full threshold */
2471 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2473 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2474 tp
->udev
->speed
== USB_SPEED_LOW
) {
2475 /* rx share fifo credit near full threshold */
2476 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2478 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2481 /* rx share fifo credit near full threshold */
2482 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2484 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2488 /* TX share fifo free credit full threshold */
2489 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2491 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2492 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2493 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2494 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2496 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2498 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2500 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2501 ocp_data
|= TCR0_AUTO_FIFO
;
2502 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2505 static void r8152b_enter_oob(struct r8152
*tp
)
2510 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2511 ocp_data
&= ~NOW_IS_OOB
;
2512 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2514 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2515 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2516 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2520 for (i
= 0; i
< 1000; i
++) {
2521 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2522 if (ocp_data
& LINK_LIST_READY
)
2524 usleep_range(1000, 2000);
2527 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2528 ocp_data
|= RE_INIT_LL
;
2529 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2531 for (i
= 0; i
< 1000; i
++) {
2532 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2533 if (ocp_data
& LINK_LIST_READY
)
2535 usleep_range(1000, 2000);
2538 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2540 rtl_rx_vlan_en(tp
, true);
2542 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2543 ocp_data
|= ALDPS_PROXY_MODE
;
2544 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2546 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2547 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2548 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2550 rxdy_gated_en(tp
, false);
2552 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2553 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2554 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2557 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2562 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2563 data
= r8152_mdio_read(tp
, MII_BMCR
);
2564 if (data
& BMCR_PDOWN
) {
2565 data
&= ~BMCR_PDOWN
;
2566 r8152_mdio_write(tp
, MII_BMCR
, data
);
2569 if (tp
->version
== RTL_VER_03
) {
2570 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2571 data
&= ~CTAP_SHORT_EN
;
2572 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2575 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2576 data
|= EEE_CLKDIV_EN
;
2577 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2579 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2580 data
|= EN_10M_BGOFF
;
2581 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2582 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2583 data
|= EN_10M_PLLOFF
;
2584 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2585 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2587 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2588 ocp_data
|= PFM_PWM_SWITCH
;
2589 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2591 /* Enable LPF corner auto tune */
2592 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2594 /* Adjust 10M Amplitude */
2595 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2596 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2598 set_bit(PHY_RESET
, &tp
->flags
);
2601 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2606 memset(u1u2
, 0xff, sizeof(u1u2
));
2608 memset(u1u2
, 0x00, sizeof(u1u2
));
2610 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2613 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2617 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2619 ocp_data
|= U2P3_ENABLE
;
2621 ocp_data
&= ~U2P3_ENABLE
;
2622 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2625 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2629 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2631 ocp_data
|= PWR_EN
| PHASE2_EN
;
2633 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2634 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2636 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2637 ocp_data
&= ~PCUT_STATUS
;
2638 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2641 static void r8153_first_init(struct r8152
*tp
)
2646 rxdy_gated_en(tp
, true);
2647 r8153_teredo_off(tp
);
2649 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2650 ocp_data
&= ~RCR_ACPT_ALL
;
2651 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2653 r8153_hw_phy_cfg(tp
);
2655 rtl8152_nic_reset(tp
);
2657 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2658 ocp_data
&= ~NOW_IS_OOB
;
2659 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2661 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2662 ocp_data
&= ~MCU_BORW_EN
;
2663 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2665 for (i
= 0; i
< 1000; i
++) {
2666 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2667 if (ocp_data
& LINK_LIST_READY
)
2669 usleep_range(1000, 2000);
2672 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2673 ocp_data
|= RE_INIT_LL
;
2674 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2676 for (i
= 0; i
< 1000; i
++) {
2677 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2678 if (ocp_data
& LINK_LIST_READY
)
2680 usleep_range(1000, 2000);
2683 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2685 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2686 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2688 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2689 ocp_data
|= TCR0_AUTO_FIFO
;
2690 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2692 rtl8152_nic_reset(tp
);
2694 /* rx share fifo credit full threshold */
2695 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2696 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2697 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2698 /* TX share fifo free credit full threshold */
2699 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2701 /* rx aggregation */
2702 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2703 ocp_data
&= ~RX_AGG_DISABLE
;
2704 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2707 static void r8153_enter_oob(struct r8152
*tp
)
2712 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2713 ocp_data
&= ~NOW_IS_OOB
;
2714 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2718 for (i
= 0; i
< 1000; i
++) {
2719 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2720 if (ocp_data
& LINK_LIST_READY
)
2722 usleep_range(1000, 2000);
2725 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2726 ocp_data
|= RE_INIT_LL
;
2727 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2729 for (i
= 0; i
< 1000; i
++) {
2730 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2731 if (ocp_data
& LINK_LIST_READY
)
2733 usleep_range(1000, 2000);
2736 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2738 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2739 ocp_data
&= ~TEREDO_WAKE_MASK
;
2740 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2742 rtl_rx_vlan_en(tp
, true);
2744 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2745 ocp_data
|= ALDPS_PROXY_MODE
;
2746 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2748 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2749 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2750 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2752 rxdy_gated_en(tp
, false);
2754 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2755 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2756 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2759 static void r8153_disable_aldps(struct r8152
*tp
)
2763 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2765 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2769 static void r8153_enable_aldps(struct r8152
*tp
)
2773 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2775 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2778 static void rtl8153_disable(struct r8152
*tp
)
2780 r8153_disable_aldps(tp
);
2782 r8153_enable_aldps(tp
);
2785 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2787 u16 bmcr
, anar
, gbcr
;
2790 cancel_delayed_work_sync(&tp
->schedule
);
2791 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2792 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2793 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2794 if (tp
->mii
.supports_gmii
) {
2795 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2796 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2801 if (autoneg
== AUTONEG_DISABLE
) {
2802 if (speed
== SPEED_10
) {
2804 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2805 } else if (speed
== SPEED_100
) {
2806 bmcr
= BMCR_SPEED100
;
2807 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2808 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2809 bmcr
= BMCR_SPEED1000
;
2810 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2816 if (duplex
== DUPLEX_FULL
)
2817 bmcr
|= BMCR_FULLDPLX
;
2819 if (speed
== SPEED_10
) {
2820 if (duplex
== DUPLEX_FULL
)
2821 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2823 anar
|= ADVERTISE_10HALF
;
2824 } else if (speed
== SPEED_100
) {
2825 if (duplex
== DUPLEX_FULL
) {
2826 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2827 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2829 anar
|= ADVERTISE_10HALF
;
2830 anar
|= ADVERTISE_100HALF
;
2832 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2833 if (duplex
== DUPLEX_FULL
) {
2834 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2835 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2836 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2838 anar
|= ADVERTISE_10HALF
;
2839 anar
|= ADVERTISE_100HALF
;
2840 gbcr
|= ADVERTISE_1000HALF
;
2847 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2850 if (test_bit(PHY_RESET
, &tp
->flags
))
2853 if (tp
->mii
.supports_gmii
)
2854 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2856 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2857 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2859 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2862 clear_bit(PHY_RESET
, &tp
->flags
);
2863 for (i
= 0; i
< 50; i
++) {
2865 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2875 static void rtl8152_up(struct r8152
*tp
)
2877 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2880 r8152b_disable_aldps(tp
);
2881 r8152b_exit_oob(tp
);
2882 r8152b_enable_aldps(tp
);
2885 static void rtl8152_down(struct r8152
*tp
)
2887 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2888 rtl_drop_queued_tx(tp
);
2892 r8152_power_cut_en(tp
, false);
2893 r8152b_disable_aldps(tp
);
2894 r8152b_enter_oob(tp
);
2895 r8152b_enable_aldps(tp
);
2898 static void rtl8153_up(struct r8152
*tp
)
2900 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2903 r8153_disable_aldps(tp
);
2904 r8153_first_init(tp
);
2905 r8153_enable_aldps(tp
);
2908 static void rtl8153_down(struct r8152
*tp
)
2910 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2911 rtl_drop_queued_tx(tp
);
2915 r8153_u1u2en(tp
, false);
2916 r8153_power_cut_en(tp
, false);
2917 r8153_disable_aldps(tp
);
2918 r8153_enter_oob(tp
);
2919 r8153_enable_aldps(tp
);
2922 static void set_carrier(struct r8152
*tp
)
2924 struct net_device
*netdev
= tp
->netdev
;
2927 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2928 speed
= rtl8152_get_speed(tp
);
2930 if (speed
& LINK_STATUS
) {
2931 if (!netif_carrier_ok(netdev
)) {
2932 tp
->rtl_ops
.enable(tp
);
2933 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2934 netif_carrier_on(netdev
);
2938 if (netif_carrier_ok(netdev
)) {
2939 netif_carrier_off(netdev
);
2940 napi_disable(&tp
->napi
);
2941 tp
->rtl_ops
.disable(tp
);
2942 napi_enable(&tp
->napi
);
2947 static void rtl_work_func_t(struct work_struct
*work
)
2949 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2951 /* If the device is unplugged or !netif_running(), the workqueue
2952 * doesn't need to wake the device, and could return directly.
2954 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
2957 if (usb_autopm_get_interface(tp
->intf
) < 0)
2960 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2963 if (!mutex_trylock(&tp
->control
)) {
2964 schedule_delayed_work(&tp
->schedule
, 0);
2968 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2971 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2972 _rtl8152_set_rx_mode(tp
->netdev
);
2974 /* don't schedule napi before linking */
2975 if (test_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
2976 netif_carrier_ok(tp
->netdev
)) {
2977 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
2978 napi_schedule(&tp
->napi
);
2981 if (test_bit(PHY_RESET
, &tp
->flags
))
2984 mutex_unlock(&tp
->control
);
2987 usb_autopm_put_interface(tp
->intf
);
2990 static int rtl8152_open(struct net_device
*netdev
)
2992 struct r8152
*tp
= netdev_priv(netdev
);
2995 res
= alloc_all_mem(tp
);
2999 netif_carrier_off(netdev
);
3001 res
= usb_autopm_get_interface(tp
->intf
);
3007 mutex_lock(&tp
->control
);
3009 /* The WORK_ENABLE may be set when autoresume occurs */
3010 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
3011 clear_bit(WORK_ENABLE
, &tp
->flags
);
3012 usb_kill_urb(tp
->intr_urb
);
3013 cancel_delayed_work_sync(&tp
->schedule
);
3015 /* disable the tx/rx, if the workqueue has enabled them. */
3016 if (netif_carrier_ok(netdev
))
3017 tp
->rtl_ops
.disable(tp
);
3022 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3023 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
3025 netif_carrier_off(netdev
);
3026 netif_start_queue(netdev
);
3027 set_bit(WORK_ENABLE
, &tp
->flags
);
3029 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3032 netif_device_detach(tp
->netdev
);
3033 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3037 napi_enable(&tp
->napi
);
3040 mutex_unlock(&tp
->control
);
3042 usb_autopm_put_interface(tp
->intf
);
3048 static int rtl8152_close(struct net_device
*netdev
)
3050 struct r8152
*tp
= netdev_priv(netdev
);
3053 napi_disable(&tp
->napi
);
3054 clear_bit(WORK_ENABLE
, &tp
->flags
);
3055 usb_kill_urb(tp
->intr_urb
);
3056 cancel_delayed_work_sync(&tp
->schedule
);
3057 netif_stop_queue(netdev
);
3059 res
= usb_autopm_get_interface(tp
->intf
);
3060 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3061 rtl_drop_queued_tx(tp
);
3064 mutex_lock(&tp
->control
);
3066 /* The autosuspend may have been enabled and wouldn't
3067 * be disable when autoresume occurs, because the
3068 * netif_running() would be false.
3070 rtl_runtime_suspend_enable(tp
, false);
3072 tp
->rtl_ops
.down(tp
);
3074 mutex_unlock(&tp
->control
);
3076 usb_autopm_put_interface(tp
->intf
);
3084 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3086 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3087 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3088 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3091 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3095 r8152_mmd_indirect(tp
, dev
, reg
);
3096 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3097 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3102 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3104 r8152_mmd_indirect(tp
, dev
, reg
);
3105 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3106 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3109 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3111 u16 config1
, config2
, config3
;
3114 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3115 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3116 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3117 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3120 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3121 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3122 config1
|= sd_rise_time(1);
3123 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3124 config3
|= fast_snr(42);
3126 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3127 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3129 config1
|= sd_rise_time(7);
3130 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3131 config3
|= fast_snr(511);
3134 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3135 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3136 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3137 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3140 static void r8152b_enable_eee(struct r8152
*tp
)
3142 r8152_eee_en(tp
, true);
3143 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3146 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3151 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3152 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3155 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3158 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3159 config
&= ~EEE10_EN
;
3162 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3163 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3166 static void r8153_enable_eee(struct r8152
*tp
)
3168 r8153_eee_en(tp
, true);
3169 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3172 static void r8152b_enable_fc(struct r8152
*tp
)
3176 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3177 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3178 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3181 static void rtl_tally_reset(struct r8152
*tp
)
3185 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3186 ocp_data
|= TALLY_RESET
;
3187 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3190 static void r8152b_init(struct r8152
*tp
)
3194 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3197 r8152b_disable_aldps(tp
);
3199 if (tp
->version
== RTL_VER_01
) {
3200 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3201 ocp_data
&= ~LED_MODE_MASK
;
3202 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3205 r8152_power_cut_en(tp
, false);
3207 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3208 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3209 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3210 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3211 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3212 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3213 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3214 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3215 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3216 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3218 r8152b_enable_eee(tp
);
3219 r8152b_enable_aldps(tp
);
3220 r8152b_enable_fc(tp
);
3221 rtl_tally_reset(tp
);
3223 /* enable rx aggregation */
3224 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3225 ocp_data
&= ~RX_AGG_DISABLE
;
3226 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3229 static void r8153_init(struct r8152
*tp
)
3234 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3237 r8153_disable_aldps(tp
);
3238 r8153_u1u2en(tp
, false);
3240 for (i
= 0; i
< 500; i
++) {
3241 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3247 for (i
= 0; i
< 500; i
++) {
3248 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3249 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3254 r8153_u2p3en(tp
, false);
3256 if (tp
->version
== RTL_VER_04
) {
3257 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3258 ocp_data
&= ~pwd_dn_scale_mask
;
3259 ocp_data
|= pwd_dn_scale(96);
3260 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3262 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3263 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3264 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3265 } else if (tp
->version
== RTL_VER_05
) {
3266 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3267 ocp_data
&= ~ECM_ALDPS
;
3268 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3270 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3271 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3272 ocp_data
&= ~DYNAMIC_BURST
;
3274 ocp_data
|= DYNAMIC_BURST
;
3275 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3278 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3279 ocp_data
|= EP4_FULL_FC
;
3280 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3282 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3283 ocp_data
&= ~TIMER11_EN
;
3284 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3286 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3287 ocp_data
&= ~LED_MODE_MASK
;
3288 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3290 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3291 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
!= USB_SPEED_SUPER
)
3292 ocp_data
|= LPM_TIMER_500MS
;
3294 ocp_data
|= LPM_TIMER_500US
;
3295 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3297 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3298 ocp_data
&= ~SEN_VAL_MASK
;
3299 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3300 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3302 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3304 r8153_power_cut_en(tp
, false);
3305 r8153_u1u2en(tp
, true);
3307 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3308 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3309 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3310 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3311 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3312 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3313 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3314 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3317 r8153_enable_eee(tp
);
3318 r8153_enable_aldps(tp
);
3319 r8152b_enable_fc(tp
);
3320 rtl_tally_reset(tp
);
3323 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3325 struct r8152
*tp
= usb_get_intfdata(intf
);
3326 struct net_device
*netdev
= tp
->netdev
;
3329 mutex_lock(&tp
->control
);
3331 if (PMSG_IS_AUTO(message
)) {
3332 if (netif_running(netdev
) && work_busy(&tp
->schedule
.work
)) {
3337 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3339 netif_device_detach(netdev
);
3342 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3343 clear_bit(WORK_ENABLE
, &tp
->flags
);
3344 usb_kill_urb(tp
->intr_urb
);
3345 napi_disable(&tp
->napi
);
3346 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3348 rtl_runtime_suspend_enable(tp
, true);
3350 cancel_delayed_work_sync(&tp
->schedule
);
3351 tp
->rtl_ops
.down(tp
);
3353 napi_enable(&tp
->napi
);
3356 mutex_unlock(&tp
->control
);
3361 static int rtl8152_resume(struct usb_interface
*intf
)
3363 struct r8152
*tp
= usb_get_intfdata(intf
);
3365 mutex_lock(&tp
->control
);
3367 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3368 tp
->rtl_ops
.init(tp
);
3369 netif_device_attach(tp
->netdev
);
3372 if (netif_running(tp
->netdev
)) {
3373 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3374 rtl_runtime_suspend_enable(tp
, false);
3375 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3376 set_bit(WORK_ENABLE
, &tp
->flags
);
3377 if (netif_carrier_ok(tp
->netdev
))
3381 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3382 tp
->mii
.supports_gmii
?
3383 SPEED_1000
: SPEED_100
,
3385 netif_carrier_off(tp
->netdev
);
3386 set_bit(WORK_ENABLE
, &tp
->flags
);
3388 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3389 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3390 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3393 mutex_unlock(&tp
->control
);
3398 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3400 struct r8152
*tp
= netdev_priv(dev
);
3402 if (usb_autopm_get_interface(tp
->intf
) < 0)
3405 mutex_lock(&tp
->control
);
3407 wol
->supported
= WAKE_ANY
;
3408 wol
->wolopts
= __rtl_get_wol(tp
);
3410 mutex_unlock(&tp
->control
);
3412 usb_autopm_put_interface(tp
->intf
);
3415 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3417 struct r8152
*tp
= netdev_priv(dev
);
3420 ret
= usb_autopm_get_interface(tp
->intf
);
3424 mutex_lock(&tp
->control
);
3426 __rtl_set_wol(tp
, wol
->wolopts
);
3427 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3429 mutex_unlock(&tp
->control
);
3431 usb_autopm_put_interface(tp
->intf
);
3437 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3439 struct r8152
*tp
= netdev_priv(dev
);
3441 return tp
->msg_enable
;
3444 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3446 struct r8152
*tp
= netdev_priv(dev
);
3448 tp
->msg_enable
= value
;
3451 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3452 struct ethtool_drvinfo
*info
)
3454 struct r8152
*tp
= netdev_priv(netdev
);
3456 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3457 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3458 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3462 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3464 struct r8152
*tp
= netdev_priv(netdev
);
3467 if (!tp
->mii
.mdio_read
)
3470 ret
= usb_autopm_get_interface(tp
->intf
);
3474 mutex_lock(&tp
->control
);
3476 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3478 mutex_unlock(&tp
->control
);
3480 usb_autopm_put_interface(tp
->intf
);
3486 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3488 struct r8152
*tp
= netdev_priv(dev
);
3491 ret
= usb_autopm_get_interface(tp
->intf
);
3495 mutex_lock(&tp
->control
);
3497 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3499 mutex_unlock(&tp
->control
);
3501 usb_autopm_put_interface(tp
->intf
);
3507 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3514 "tx_single_collisions",
3515 "tx_multi_collisions",
3523 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3527 return ARRAY_SIZE(rtl8152_gstrings
);
3533 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3534 struct ethtool_stats
*stats
, u64
*data
)
3536 struct r8152
*tp
= netdev_priv(dev
);
3537 struct tally_counter tally
;
3539 if (usb_autopm_get_interface(tp
->intf
) < 0)
3542 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3544 usb_autopm_put_interface(tp
->intf
);
3546 data
[0] = le64_to_cpu(tally
.tx_packets
);
3547 data
[1] = le64_to_cpu(tally
.rx_packets
);
3548 data
[2] = le64_to_cpu(tally
.tx_errors
);
3549 data
[3] = le32_to_cpu(tally
.rx_errors
);
3550 data
[4] = le16_to_cpu(tally
.rx_missed
);
3551 data
[5] = le16_to_cpu(tally
.align_errors
);
3552 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3553 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3554 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3555 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3556 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3557 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3558 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3561 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3563 switch (stringset
) {
3565 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3570 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3572 u32 ocp_data
, lp
, adv
, supported
= 0;
3575 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3576 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3578 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3579 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3581 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3582 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3584 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3585 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3587 eee
->eee_enabled
= !!ocp_data
;
3588 eee
->eee_active
= !!(supported
& adv
& lp
);
3589 eee
->supported
= supported
;
3590 eee
->advertised
= adv
;
3591 eee
->lp_advertised
= lp
;
3596 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3598 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3600 r8152_eee_en(tp
, eee
->eee_enabled
);
3602 if (!eee
->eee_enabled
)
3605 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3610 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3612 u32 ocp_data
, lp
, adv
, supported
= 0;
3615 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3616 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3618 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3619 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3621 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3622 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3624 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3625 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3627 eee
->eee_enabled
= !!ocp_data
;
3628 eee
->eee_active
= !!(supported
& adv
& lp
);
3629 eee
->supported
= supported
;
3630 eee
->advertised
= adv
;
3631 eee
->lp_advertised
= lp
;
3636 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3638 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3640 r8153_eee_en(tp
, eee
->eee_enabled
);
3642 if (!eee
->eee_enabled
)
3645 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3651 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3653 struct r8152
*tp
= netdev_priv(net
);
3656 ret
= usb_autopm_get_interface(tp
->intf
);
3660 mutex_lock(&tp
->control
);
3662 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3664 mutex_unlock(&tp
->control
);
3666 usb_autopm_put_interface(tp
->intf
);
3673 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3675 struct r8152
*tp
= netdev_priv(net
);
3678 ret
= usb_autopm_get_interface(tp
->intf
);
3682 mutex_lock(&tp
->control
);
3684 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3686 ret
= mii_nway_restart(&tp
->mii
);
3688 mutex_unlock(&tp
->control
);
3690 usb_autopm_put_interface(tp
->intf
);
3696 static int rtl8152_nway_reset(struct net_device
*dev
)
3698 struct r8152
*tp
= netdev_priv(dev
);
3701 ret
= usb_autopm_get_interface(tp
->intf
);
3705 mutex_lock(&tp
->control
);
3707 ret
= mii_nway_restart(&tp
->mii
);
3709 mutex_unlock(&tp
->control
);
3711 usb_autopm_put_interface(tp
->intf
);
3717 static int rtl8152_get_coalesce(struct net_device
*netdev
,
3718 struct ethtool_coalesce
*coalesce
)
3720 struct r8152
*tp
= netdev_priv(netdev
);
3722 switch (tp
->version
) {
3730 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
3735 static int rtl8152_set_coalesce(struct net_device
*netdev
,
3736 struct ethtool_coalesce
*coalesce
)
3738 struct r8152
*tp
= netdev_priv(netdev
);
3741 switch (tp
->version
) {
3749 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
3752 ret
= usb_autopm_get_interface(tp
->intf
);
3756 mutex_lock(&tp
->control
);
3758 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
3759 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
3761 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
3762 r8153_set_rx_early_timeout(tp
);
3765 mutex_unlock(&tp
->control
);
3767 usb_autopm_put_interface(tp
->intf
);
3772 static struct ethtool_ops ops
= {
3773 .get_drvinfo
= rtl8152_get_drvinfo
,
3774 .get_settings
= rtl8152_get_settings
,
3775 .set_settings
= rtl8152_set_settings
,
3776 .get_link
= ethtool_op_get_link
,
3777 .nway_reset
= rtl8152_nway_reset
,
3778 .get_msglevel
= rtl8152_get_msglevel
,
3779 .set_msglevel
= rtl8152_set_msglevel
,
3780 .get_wol
= rtl8152_get_wol
,
3781 .set_wol
= rtl8152_set_wol
,
3782 .get_strings
= rtl8152_get_strings
,
3783 .get_sset_count
= rtl8152_get_sset_count
,
3784 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3785 .get_coalesce
= rtl8152_get_coalesce
,
3786 .set_coalesce
= rtl8152_set_coalesce
,
3787 .get_eee
= rtl_ethtool_get_eee
,
3788 .set_eee
= rtl_ethtool_set_eee
,
3791 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3793 struct r8152
*tp
= netdev_priv(netdev
);
3794 struct mii_ioctl_data
*data
= if_mii(rq
);
3797 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3800 res
= usb_autopm_get_interface(tp
->intf
);
3806 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
3810 mutex_lock(&tp
->control
);
3811 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
3812 mutex_unlock(&tp
->control
);
3816 if (!capable(CAP_NET_ADMIN
)) {
3820 mutex_lock(&tp
->control
);
3821 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
3822 mutex_unlock(&tp
->control
);
3829 usb_autopm_put_interface(tp
->intf
);
3835 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
3837 struct r8152
*tp
= netdev_priv(dev
);
3840 switch (tp
->version
) {
3843 return eth_change_mtu(dev
, new_mtu
);
3848 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
3851 ret
= usb_autopm_get_interface(tp
->intf
);
3855 mutex_lock(&tp
->control
);
3859 if (netif_running(dev
) && netif_carrier_ok(dev
))
3860 r8153_set_rx_early_size(tp
);
3862 mutex_unlock(&tp
->control
);
3864 usb_autopm_put_interface(tp
->intf
);
3869 static const struct net_device_ops rtl8152_netdev_ops
= {
3870 .ndo_open
= rtl8152_open
,
3871 .ndo_stop
= rtl8152_close
,
3872 .ndo_do_ioctl
= rtl8152_ioctl
,
3873 .ndo_start_xmit
= rtl8152_start_xmit
,
3874 .ndo_tx_timeout
= rtl8152_tx_timeout
,
3875 .ndo_set_features
= rtl8152_set_features
,
3876 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
3877 .ndo_set_mac_address
= rtl8152_set_mac_address
,
3878 .ndo_change_mtu
= rtl8152_change_mtu
,
3879 .ndo_validate_addr
= eth_validate_addr
,
3880 .ndo_features_check
= rtl8152_features_check
,
3883 static void r8152b_get_version(struct r8152
*tp
)
3888 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
3889 version
= (u16
)(ocp_data
& VERSION_MASK
);
3893 tp
->version
= RTL_VER_01
;
3896 tp
->version
= RTL_VER_02
;
3899 tp
->version
= RTL_VER_03
;
3900 tp
->mii
.supports_gmii
= 1;
3903 tp
->version
= RTL_VER_04
;
3904 tp
->mii
.supports_gmii
= 1;
3907 tp
->version
= RTL_VER_05
;
3908 tp
->mii
.supports_gmii
= 1;
3911 netif_info(tp
, probe
, tp
->netdev
,
3912 "Unknown version 0x%04x\n", version
);
3917 static void rtl8152_unload(struct r8152
*tp
)
3919 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3922 if (tp
->version
!= RTL_VER_01
)
3923 r8152_power_cut_en(tp
, true);
3926 static void rtl8153_unload(struct r8152
*tp
)
3928 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3931 r8153_power_cut_en(tp
, false);
3934 static int rtl_ops_init(struct r8152
*tp
)
3936 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3939 switch (tp
->version
) {
3942 ops
->init
= r8152b_init
;
3943 ops
->enable
= rtl8152_enable
;
3944 ops
->disable
= rtl8152_disable
;
3945 ops
->up
= rtl8152_up
;
3946 ops
->down
= rtl8152_down
;
3947 ops
->unload
= rtl8152_unload
;
3948 ops
->eee_get
= r8152_get_eee
;
3949 ops
->eee_set
= r8152_set_eee
;
3955 ops
->init
= r8153_init
;
3956 ops
->enable
= rtl8153_enable
;
3957 ops
->disable
= rtl8153_disable
;
3958 ops
->up
= rtl8153_up
;
3959 ops
->down
= rtl8153_down
;
3960 ops
->unload
= rtl8153_unload
;
3961 ops
->eee_get
= r8153_get_eee
;
3962 ops
->eee_set
= r8153_set_eee
;
3967 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3974 static int rtl8152_probe(struct usb_interface
*intf
,
3975 const struct usb_device_id
*id
)
3977 struct usb_device
*udev
= interface_to_usbdev(intf
);
3979 struct net_device
*netdev
;
3982 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
3983 usb_driver_set_configuration(udev
, 1);
3987 usb_reset_device(udev
);
3988 netdev
= alloc_etherdev(sizeof(struct r8152
));
3990 dev_err(&intf
->dev
, "Out of memory\n");
3994 SET_NETDEV_DEV(netdev
, &intf
->dev
);
3995 tp
= netdev_priv(netdev
);
3996 tp
->msg_enable
= 0x7FFF;
3999 tp
->netdev
= netdev
;
4002 r8152b_get_version(tp
);
4003 ret
= rtl_ops_init(tp
);
4007 mutex_init(&tp
->control
);
4008 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4010 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4011 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4013 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4014 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4015 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4016 NETIF_F_HW_VLAN_CTAG_TX
;
4017 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4018 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4019 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4020 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4021 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4022 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4023 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4025 netdev
->ethtool_ops
= &ops
;
4026 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4028 tp
->mii
.dev
= netdev
;
4029 tp
->mii
.mdio_read
= read_mii_word
;
4030 tp
->mii
.mdio_write
= write_mii_word
;
4031 tp
->mii
.phy_id_mask
= 0x3f;
4032 tp
->mii
.reg_num_mask
= 0x1f;
4033 tp
->mii
.phy_id
= R8152_PHY_ID
;
4035 switch (udev
->speed
) {
4036 case USB_SPEED_SUPER
:
4037 tp
->coalesce
= COALESCE_SUPER
;
4039 case USB_SPEED_HIGH
:
4040 tp
->coalesce
= COALESCE_HIGH
;
4043 tp
->coalesce
= COALESCE_SLOW
;
4047 intf
->needs_remote_wakeup
= 1;
4049 tp
->rtl_ops
.init(tp
);
4050 set_ethernet_addr(tp
);
4052 usb_set_intfdata(intf
, tp
);
4053 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4055 ret
= register_netdev(netdev
);
4057 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4061 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4062 if (tp
->saved_wolopts
)
4063 device_set_wakeup_enable(&udev
->dev
, true);
4065 device_set_wakeup_enable(&udev
->dev
, false);
4067 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4072 netif_napi_del(&tp
->napi
);
4073 usb_set_intfdata(intf
, NULL
);
4075 free_netdev(netdev
);
4079 static void rtl8152_disconnect(struct usb_interface
*intf
)
4081 struct r8152
*tp
= usb_get_intfdata(intf
);
4083 usb_set_intfdata(intf
, NULL
);
4085 struct usb_device
*udev
= tp
->udev
;
4087 if (udev
->state
== USB_STATE_NOTATTACHED
)
4088 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4090 netif_napi_del(&tp
->napi
);
4091 unregister_netdev(tp
->netdev
);
4092 tp
->rtl_ops
.unload(tp
);
4093 free_netdev(tp
->netdev
);
4097 #define REALTEK_USB_DEVICE(vend, prod) \
4098 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4099 USB_DEVICE_ID_MATCH_INT_CLASS, \
4100 .idVendor = (vend), \
4101 .idProduct = (prod), \
4102 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4105 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4106 USB_DEVICE_ID_MATCH_DEVICE, \
4107 .idVendor = (vend), \
4108 .idProduct = (prod), \
4109 .bInterfaceClass = USB_CLASS_COMM, \
4110 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4111 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4113 /* table of devices that work with this driver */
4114 static struct usb_device_id rtl8152_table
[] = {
4115 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4116 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4117 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4118 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4119 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4123 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4125 static struct usb_driver rtl8152_driver
= {
4127 .id_table
= rtl8152_table
,
4128 .probe
= rtl8152_probe
,
4129 .disconnect
= rtl8152_disconnect
,
4130 .suspend
= rtl8152_suspend
,
4131 .resume
= rtl8152_resume
,
4132 .reset_resume
= rtl8152_resume
,
4133 .supports_autosuspend
= 1,
4134 .disable_hub_initiated_lpm
= 1,
4137 module_usb_driver(rtl8152_driver
);
4139 MODULE_AUTHOR(DRIVER_AUTHOR
);
4140 MODULE_DESCRIPTION(DRIVER_DESC
);
4141 MODULE_LICENSE("GPL");