2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "5"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_BMU_RESET 0xd4b0
120 #define USB_UPS_CTRL 0xd800
121 #define USB_MISC_0 0xd81a
122 #define USB_POWER_CUT 0xd80a
123 #define USB_AFE_CTRL2 0xd824
124 #define USB_WDT11_CTRL 0xe43c
125 #define USB_BP_BA 0xfc26
126 #define USB_BP_0 0xfc28
127 #define USB_BP_1 0xfc2a
128 #define USB_BP_2 0xfc2c
129 #define USB_BP_3 0xfc2e
130 #define USB_BP_4 0xfc30
131 #define USB_BP_5 0xfc32
132 #define USB_BP_6 0xfc34
133 #define USB_BP_7 0xfc36
134 #define USB_BP_EN 0xfc38
137 #define OCP_ALDPS_CONFIG 0x2010
138 #define OCP_EEE_CONFIG1 0x2080
139 #define OCP_EEE_CONFIG2 0x2092
140 #define OCP_EEE_CONFIG3 0x2094
141 #define OCP_BASE_MII 0xa400
142 #define OCP_EEE_AR 0xa41a
143 #define OCP_EEE_DATA 0xa41c
144 #define OCP_PHY_STATUS 0xa420
145 #define OCP_POWER_CFG 0xa430
146 #define OCP_EEE_CFG 0xa432
147 #define OCP_SRAM_ADDR 0xa436
148 #define OCP_SRAM_DATA 0xa438
149 #define OCP_DOWN_SPEED 0xa442
150 #define OCP_EEE_ABLE 0xa5c4
151 #define OCP_EEE_ADV 0xa5d0
152 #define OCP_EEE_LPABLE 0xa5d2
153 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
154 #define OCP_ADC_CFG 0xbc06
157 #define SRAM_LPF_CFG 0x8012
158 #define SRAM_10M_AMP1 0x8080
159 #define SRAM_10M_AMP2 0x8082
160 #define SRAM_IMPEDANCE 0x8084
163 #define RCR_AAP 0x00000001
164 #define RCR_APM 0x00000002
165 #define RCR_AM 0x00000004
166 #define RCR_AB 0x00000008
167 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169 /* PLA_RXFIFO_CTRL0 */
170 #define RXFIFO_THR1_NORMAL 0x00080002
171 #define RXFIFO_THR1_OOB 0x01800003
173 /* PLA_RXFIFO_CTRL1 */
174 #define RXFIFO_THR2_FULL 0x00000060
175 #define RXFIFO_THR2_HIGH 0x00000038
176 #define RXFIFO_THR2_OOB 0x0000004a
177 #define RXFIFO_THR2_NORMAL 0x00a0
179 /* PLA_RXFIFO_CTRL2 */
180 #define RXFIFO_THR3_FULL 0x00000078
181 #define RXFIFO_THR3_HIGH 0x00000048
182 #define RXFIFO_THR3_OOB 0x0000005a
183 #define RXFIFO_THR3_NORMAL 0x0110
185 /* PLA_TXFIFO_CTRL */
186 #define TXFIFO_THR_NORMAL 0x00400008
187 #define TXFIFO_THR_NORMAL2 0x01000008
190 #define ECM_ALDPS 0x0002
193 #define FMC_FCR_MCU_EN 0x0001
196 #define EEEP_CR_EEEP_TX 0x0002
199 #define WDT6_SET_MODE 0x0010
202 #define TCR0_TX_EMPTY 0x0800
203 #define TCR0_AUTO_FIFO 0x0080
206 #define VERSION_MASK 0x7cf0
209 #define MTPS_JUMBO (12 * 1024 / 64)
210 #define MTPS_DEFAULT (6 * 1024 / 64)
213 #define TALLY_RESET 0x0001
221 #define CRWECR_NORAML 0x00
222 #define CRWECR_CONFIG 0xc0
225 #define NOW_IS_OOB 0x80
226 #define TXFIFO_EMPTY 0x20
227 #define RXFIFO_EMPTY 0x10
228 #define LINK_LIST_READY 0x02
229 #define DIS_MCU_CLROOB 0x01
230 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
233 #define RXDY_GATED_EN 0x0008
236 #define RE_INIT_LL 0x8000
237 #define MCU_BORW_EN 0x4000
240 #define CPCR_RX_VLAN 0x0040
243 #define MAGIC_EN 0x0001
246 #define TEREDO_SEL 0x8000
247 #define TEREDO_WAKE_MASK 0x7f00
248 #define TEREDO_RS_EVENT_MASK 0x00fe
249 #define OOB_TEREDO_EN 0x0001
252 #define ALDPS_PROXY_MODE 0x0001
255 #define LINK_ON_WAKE_EN 0x0010
256 #define LINK_OFF_WAKE_EN 0x0008
259 #define BWF_EN 0x0040
260 #define MWF_EN 0x0020
261 #define UWF_EN 0x0010
262 #define LAN_WAKE_EN 0x0002
264 /* PLA_LED_FEATURE */
265 #define LED_MODE_MASK 0x0700
268 #define TX_10M_IDLE_EN 0x0080
269 #define PFM_PWM_SWITCH 0x0040
271 /* PLA_MAC_PWR_CTRL */
272 #define D3_CLK_GATED_EN 0x00004000
273 #define MCU_CLK_RATIO 0x07010f07
274 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
275 #define ALDPS_SPDWN_RATIO 0x0f87
277 /* PLA_MAC_PWR_CTRL2 */
278 #define EEE_SPDWN_RATIO 0x8007
280 /* PLA_MAC_PWR_CTRL3 */
281 #define PKT_AVAIL_SPDWN_EN 0x0100
282 #define SUSPEND_SPDWN_EN 0x0004
283 #define U1U2_SPDWN_EN 0x0002
284 #define L1_SPDWN_EN 0x0001
286 /* PLA_MAC_PWR_CTRL4 */
287 #define PWRSAVE_SPDWN_EN 0x1000
288 #define RXDV_SPDWN_EN 0x0800
289 #define TX10MIDLE_EN 0x0100
290 #define TP100_SPDWN_EN 0x0020
291 #define TP500_SPDWN_EN 0x0010
292 #define TP1000_SPDWN_EN 0x0008
293 #define EEE_SPDWN_EN 0x0001
295 /* PLA_GPHY_INTR_IMR */
296 #define GPHY_STS_MSK 0x0001
297 #define SPEED_DOWN_MSK 0x0002
298 #define SPDWN_RXDV_MSK 0x0004
299 #define SPDWN_LINKCHG_MSK 0x0008
302 #define PHYAR_FLAG 0x80000000
305 #define EEE_RX_EN 0x0001
306 #define EEE_TX_EN 0x0002
309 #define AUTOLOAD_DONE 0x0002
312 #define USB2PHY_SUSPEND 0x0001
313 #define USB2PHY_L1 0x0002
316 #define pwd_dn_scale_mask 0x3ffe
317 #define pwd_dn_scale(x) ((x) << 1)
320 #define DYNAMIC_BURST 0x0001
323 #define EP4_FULL_FC 0x0001
326 #define STAT_SPEED_MASK 0x0006
327 #define STAT_SPEED_HIGH 0x0000
328 #define STAT_SPEED_FULL 0x0002
331 #define TX_AGG_MAX_THRESHOLD 0x03
334 #define RX_THR_SUPPER 0x0c350180
335 #define RX_THR_HIGH 0x7a120180
336 #define RX_THR_SLOW 0xffff0180
339 #define TEST_MODE_DISABLE 0x00000001
340 #define TX_SIZE_ADJUST1 0x00000100
343 #define BMU_RESET_EP_IN 0x01
344 #define BMU_RESET_EP_OUT 0x02
347 #define POWER_CUT 0x0100
349 /* USB_PM_CTRL_STATUS */
350 #define RESUME_INDICATE 0x0001
353 #define RX_AGG_DISABLE 0x0010
354 #define RX_ZERO_EN 0x0080
357 #define U2P3_ENABLE 0x0001
360 #define PWR_EN 0x0001
361 #define PHASE2_EN 0x0008
364 #define PCUT_STATUS 0x0001
366 /* USB_RX_EARLY_TIMEOUT */
367 #define COALESCE_SUPER 85000U
368 #define COALESCE_HIGH 250000U
369 #define COALESCE_SLOW 524280U
372 #define TIMER11_EN 0x0001
375 /* bit 4 ~ 5: fifo empty boundary */
376 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
377 /* bit 2 ~ 3: LMP timer */
378 #define LPM_TIMER_MASK 0x0c
379 #define LPM_TIMER_500MS 0x04 /* 500 ms */
380 #define LPM_TIMER_500US 0x0c /* 500 us */
381 #define ROK_EXIT_LPM 0x02
384 #define SEN_VAL_MASK 0xf800
385 #define SEN_VAL_NORMAL 0xa000
386 #define SEL_RXIDLE 0x0100
388 /* OCP_ALDPS_CONFIG */
389 #define ENPWRSAVE 0x8000
390 #define ENPDNPS 0x0200
391 #define LINKENA 0x0100
392 #define DIS_SDSAVE 0x0010
395 #define PHY_STAT_MASK 0x0007
396 #define PHY_STAT_LAN_ON 3
397 #define PHY_STAT_PWRDN 5
400 #define EEE_CLKDIV_EN 0x8000
401 #define EN_ALDPS 0x0004
402 #define EN_10M_PLLOFF 0x0001
404 /* OCP_EEE_CONFIG1 */
405 #define RG_TXLPI_MSK_HFDUP 0x8000
406 #define RG_MATCLR_EN 0x4000
407 #define EEE_10_CAP 0x2000
408 #define EEE_NWAY_EN 0x1000
409 #define TX_QUIET_EN 0x0200
410 #define RX_QUIET_EN 0x0100
411 #define sd_rise_time_mask 0x0070
412 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
413 #define RG_RXLPI_MSK_HFDUP 0x0008
414 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
416 /* OCP_EEE_CONFIG2 */
417 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
418 #define RG_DACQUIET_EN 0x0400
419 #define RG_LDVQUIET_EN 0x0200
420 #define RG_CKRSEL 0x0020
421 #define RG_EEEPRG_EN 0x0010
423 /* OCP_EEE_CONFIG3 */
424 #define fast_snr_mask 0xff80
425 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
426 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
427 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
430 /* bit[15:14] function */
431 #define FUN_ADDR 0x0000
432 #define FUN_DATA 0x4000
433 /* bit[4:0] device addr */
436 #define CTAP_SHORT_EN 0x0040
437 #define EEE10_EN 0x0010
440 #define EN_10M_BGOFF 0x0080
443 #define TXDIS_STATE 0x01
444 #define ABD_STATE 0x02
447 #define CKADSEL_L 0x0100
448 #define ADC_EN 0x0080
449 #define EN_EMI_L 0x0040
452 #define LPF_AUTO_TUNE 0x8000
455 #define GDAC_IB_UPALL 0x0008
458 #define AMP_DN 0x0200
461 #define RX_DRIVING_MASK 0x6000
463 enum rtl_register_content
{
471 #define RTL8152_MAX_TX 4
472 #define RTL8152_MAX_RX 10
478 #define INTR_LINK 0x0004
480 #define RTL8152_REQT_READ 0xc0
481 #define RTL8152_REQT_WRITE 0x40
482 #define RTL8152_REQ_GET_REGS 0x05
483 #define RTL8152_REQ_SET_REGS 0x05
485 #define BYTE_EN_DWORD 0xff
486 #define BYTE_EN_WORD 0x33
487 #define BYTE_EN_BYTE 0x11
488 #define BYTE_EN_SIX_BYTES 0x3f
489 #define BYTE_EN_START_MASK 0x0f
490 #define BYTE_EN_END_MASK 0xf0
492 #define RTL8153_MAX_PACKET 9216 /* 9K */
493 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
494 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
495 #define RTL8153_RMS RTL8153_MAX_PACKET
496 #define RTL8152_TX_TIMEOUT (5 * HZ)
497 #define RTL8152_NAPI_WEIGHT 64
510 /* Define these values to match your device */
511 #define VENDOR_ID_REALTEK 0x0bda
512 #define VENDOR_ID_SAMSUNG 0x04e8
513 #define VENDOR_ID_LENOVO 0x17ef
514 #define VENDOR_ID_NVIDIA 0x0955
516 #define MCU_TYPE_PLA 0x0100
517 #define MCU_TYPE_USB 0x0000
519 struct tally_counter
{
526 __le32 tx_one_collision
;
527 __le32 tx_multi_collision
;
537 #define RX_LEN_MASK 0x7fff
540 #define RD_UDP_CS BIT(23)
541 #define RD_TCP_CS BIT(22)
542 #define RD_IPV6_CS BIT(20)
543 #define RD_IPV4_CS BIT(19)
546 #define IPF BIT(23) /* IP checksum fail */
547 #define UDPF BIT(22) /* UDP checksum fail */
548 #define TCPF BIT(21) /* TCP checksum fail */
549 #define RX_VLAN_TAG BIT(16)
558 #define TX_FS BIT(31) /* First segment of a packet */
559 #define TX_LS BIT(30) /* Final segment of a packet */
560 #define GTSENDV4 BIT(28)
561 #define GTSENDV6 BIT(27)
562 #define GTTCPHO_SHIFT 18
563 #define GTTCPHO_MAX 0x7fU
564 #define TX_LEN_MAX 0x3ffffU
567 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
568 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
569 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
570 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
572 #define MSS_MAX 0x7ffU
573 #define TCPHO_SHIFT 17
574 #define TCPHO_MAX 0x7ffU
575 #define TX_VLAN_TAG BIT(16)
581 struct list_head list
;
583 struct r8152
*context
;
589 struct list_head list
;
591 struct r8152
*context
;
600 struct usb_device
*udev
;
601 struct napi_struct napi
;
602 struct usb_interface
*intf
;
603 struct net_device
*netdev
;
604 struct urb
*intr_urb
;
605 struct tx_agg tx_info
[RTL8152_MAX_TX
];
606 struct rx_agg rx_info
[RTL8152_MAX_RX
];
607 struct list_head rx_done
, tx_free
;
608 struct sk_buff_head tx_queue
, rx_queue
;
609 spinlock_t rx_lock
, tx_lock
;
610 struct delayed_work schedule
, hw_phy_work
;
611 struct mii_if_info mii
;
612 struct mutex control
; /* use for hw setting */
613 #ifdef CONFIG_PM_SLEEP
614 struct notifier_block pm_notifier
;
618 void (*init
)(struct r8152
*);
619 int (*enable
)(struct r8152
*);
620 void (*disable
)(struct r8152
*);
621 void (*up
)(struct r8152
*);
622 void (*down
)(struct r8152
*);
623 void (*unload
)(struct r8152
*);
624 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
625 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
626 bool (*in_nway
)(struct r8152
*);
627 void (*hw_phy_cfg
)(struct r8152
*);
628 void (*autosuspend_en
)(struct r8152
*tp
, bool enable
);
661 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
662 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
664 static const int multicast_filter_limit
= 32;
665 static unsigned int agg_buf_sz
= 16384;
667 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
668 VLAN_ETH_HLEN - VLAN_HLEN)
671 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
676 tmp
= kmalloc(size
, GFP_KERNEL
);
680 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
681 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
682 value
, index
, tmp
, size
, 500);
684 memcpy(data
, tmp
, size
);
691 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
696 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
700 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
701 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
702 value
, index
, tmp
, size
, 500);
709 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
710 void *data
, u16 type
)
715 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
718 /* both size and indix must be 4 bytes align */
719 if ((size
& 3) || !size
|| (index
& 3) || !data
)
722 if ((u32
)index
+ (u32
)size
> 0xffff)
727 ret
= get_registers(tp
, index
, type
, limit
, data
);
735 ret
= get_registers(tp
, index
, type
, size
, data
);
747 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
752 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
753 u16 size
, void *data
, u16 type
)
756 u16 byteen_start
, byteen_end
, byen
;
759 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
762 /* both size and indix must be 4 bytes align */
763 if ((size
& 3) || !size
|| (index
& 3) || !data
)
766 if ((u32
)index
+ (u32
)size
> 0xffff)
769 byteen_start
= byteen
& BYTE_EN_START_MASK
;
770 byteen_end
= byteen
& BYTE_EN_END_MASK
;
772 byen
= byteen_start
| (byteen_start
<< 4);
773 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
786 ret
= set_registers(tp
, index
,
787 type
| BYTE_EN_DWORD
,
796 ret
= set_registers(tp
, index
,
797 type
| BYTE_EN_DWORD
,
809 byen
= byteen_end
| (byteen_end
>> 4);
810 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
817 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
823 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
825 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
829 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
831 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
835 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
837 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
841 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
843 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
846 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
850 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
852 return __le32_to_cpu(data
);
855 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
857 __le32 tmp
= __cpu_to_le32(data
);
859 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
862 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
866 u8 shift
= index
& 2;
870 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
872 data
= __le32_to_cpu(tmp
);
873 data
>>= (shift
* 8);
879 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
883 u16 byen
= BYTE_EN_WORD
;
884 u8 shift
= index
& 2;
890 mask
<<= (shift
* 8);
891 data
<<= (shift
* 8);
895 tmp
= __cpu_to_le32(data
);
897 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
900 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
904 u8 shift
= index
& 3;
908 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
910 data
= __le32_to_cpu(tmp
);
911 data
>>= (shift
* 8);
917 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
921 u16 byen
= BYTE_EN_BYTE
;
922 u8 shift
= index
& 3;
928 mask
<<= (shift
* 8);
929 data
<<= (shift
* 8);
933 tmp
= __cpu_to_le32(data
);
935 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
938 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
940 u16 ocp_base
, ocp_index
;
942 ocp_base
= addr
& 0xf000;
943 if (ocp_base
!= tp
->ocp_base
) {
944 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
945 tp
->ocp_base
= ocp_base
;
948 ocp_index
= (addr
& 0x0fff) | 0xb000;
949 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
952 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
954 u16 ocp_base
, ocp_index
;
956 ocp_base
= addr
& 0xf000;
957 if (ocp_base
!= tp
->ocp_base
) {
958 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
959 tp
->ocp_base
= ocp_base
;
962 ocp_index
= (addr
& 0x0fff) | 0xb000;
963 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
966 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
968 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
971 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
973 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
976 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
978 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
979 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
982 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
984 struct r8152
*tp
= netdev_priv(netdev
);
987 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
990 if (phy_id
!= R8152_PHY_ID
)
993 ret
= r8152_mdio_read(tp
, reg
);
999 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
1001 struct r8152
*tp
= netdev_priv(netdev
);
1003 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1006 if (phy_id
!= R8152_PHY_ID
)
1009 r8152_mdio_write(tp
, reg
, val
);
1013 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1015 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1017 struct r8152
*tp
= netdev_priv(netdev
);
1018 struct sockaddr
*addr
= p
;
1019 int ret
= -EADDRNOTAVAIL
;
1021 if (!is_valid_ether_addr(addr
->sa_data
))
1024 ret
= usb_autopm_get_interface(tp
->intf
);
1028 mutex_lock(&tp
->control
);
1030 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1032 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1033 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1034 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1036 mutex_unlock(&tp
->control
);
1038 usb_autopm_put_interface(tp
->intf
);
1043 static int set_ethernet_addr(struct r8152
*tp
)
1045 struct net_device
*dev
= tp
->netdev
;
1049 if (tp
->version
== RTL_VER_01
)
1050 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1052 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1055 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1056 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1057 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1059 eth_hw_addr_random(dev
);
1060 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1061 ret
= rtl8152_set_mac_address(dev
, &sa
);
1062 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1065 if (tp
->version
== RTL_VER_01
)
1066 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1068 ret
= rtl8152_set_mac_address(dev
, &sa
);
1074 static void read_bulk_callback(struct urb
*urb
)
1076 struct net_device
*netdev
;
1077 int status
= urb
->status
;
1089 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1092 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1095 netdev
= tp
->netdev
;
1097 /* When link down, the driver would cancel all bulks. */
1098 /* This avoid the re-submitting bulk */
1099 if (!netif_carrier_ok(netdev
))
1102 usb_mark_last_busy(tp
->udev
);
1106 if (urb
->actual_length
< ETH_ZLEN
)
1109 spin_lock(&tp
->rx_lock
);
1110 list_add_tail(&agg
->list
, &tp
->rx_done
);
1111 spin_unlock(&tp
->rx_lock
);
1112 napi_schedule(&tp
->napi
);
1115 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1116 netif_device_detach(tp
->netdev
);
1119 return; /* the urb is in unlink state */
1121 if (net_ratelimit())
1122 netdev_warn(netdev
, "maybe reset is needed?\n");
1125 if (net_ratelimit())
1126 netdev_warn(netdev
, "Rx status %d\n", status
);
1130 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1133 static void write_bulk_callback(struct urb
*urb
)
1135 struct net_device_stats
*stats
;
1136 struct net_device
*netdev
;
1139 int status
= urb
->status
;
1149 netdev
= tp
->netdev
;
1150 stats
= &netdev
->stats
;
1152 if (net_ratelimit())
1153 netdev_warn(netdev
, "Tx status %d\n", status
);
1154 stats
->tx_errors
+= agg
->skb_num
;
1156 stats
->tx_packets
+= agg
->skb_num
;
1157 stats
->tx_bytes
+= agg
->skb_len
;
1160 spin_lock(&tp
->tx_lock
);
1161 list_add_tail(&agg
->list
, &tp
->tx_free
);
1162 spin_unlock(&tp
->tx_lock
);
1164 usb_autopm_put_interface_async(tp
->intf
);
1166 if (!netif_carrier_ok(netdev
))
1169 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1172 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1175 if (!skb_queue_empty(&tp
->tx_queue
))
1176 napi_schedule(&tp
->napi
);
1179 static void intr_callback(struct urb
*urb
)
1183 int status
= urb
->status
;
1190 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1193 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1197 case 0: /* success */
1199 case -ECONNRESET
: /* unlink */
1201 netif_device_detach(tp
->netdev
);
1204 netif_info(tp
, intr
, tp
->netdev
,
1205 "Stop submitting intr, status %d\n", status
);
1208 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1210 /* -EPIPE: should clear the halt */
1212 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1216 d
= urb
->transfer_buffer
;
1217 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1218 if (!netif_carrier_ok(tp
->netdev
)) {
1219 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1220 schedule_delayed_work(&tp
->schedule
, 0);
1223 if (netif_carrier_ok(tp
->netdev
)) {
1224 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1225 schedule_delayed_work(&tp
->schedule
, 0);
1230 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1231 if (res
== -ENODEV
) {
1232 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1233 netif_device_detach(tp
->netdev
);
1235 netif_err(tp
, intr
, tp
->netdev
,
1236 "can't resubmit intr, status %d\n", res
);
1240 static inline void *rx_agg_align(void *data
)
1242 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1245 static inline void *tx_agg_align(void *data
)
1247 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1250 static void free_all_mem(struct r8152
*tp
)
1254 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1255 usb_free_urb(tp
->rx_info
[i
].urb
);
1256 tp
->rx_info
[i
].urb
= NULL
;
1258 kfree(tp
->rx_info
[i
].buffer
);
1259 tp
->rx_info
[i
].buffer
= NULL
;
1260 tp
->rx_info
[i
].head
= NULL
;
1263 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1264 usb_free_urb(tp
->tx_info
[i
].urb
);
1265 tp
->tx_info
[i
].urb
= NULL
;
1267 kfree(tp
->tx_info
[i
].buffer
);
1268 tp
->tx_info
[i
].buffer
= NULL
;
1269 tp
->tx_info
[i
].head
= NULL
;
1272 usb_free_urb(tp
->intr_urb
);
1273 tp
->intr_urb
= NULL
;
1275 kfree(tp
->intr_buff
);
1276 tp
->intr_buff
= NULL
;
1279 static int alloc_all_mem(struct r8152
*tp
)
1281 struct net_device
*netdev
= tp
->netdev
;
1282 struct usb_interface
*intf
= tp
->intf
;
1283 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1284 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1289 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1291 spin_lock_init(&tp
->rx_lock
);
1292 spin_lock_init(&tp
->tx_lock
);
1293 INIT_LIST_HEAD(&tp
->tx_free
);
1294 skb_queue_head_init(&tp
->tx_queue
);
1295 skb_queue_head_init(&tp
->rx_queue
);
1297 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1298 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1302 if (buf
!= rx_agg_align(buf
)) {
1304 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1310 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1316 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1317 tp
->rx_info
[i
].context
= tp
;
1318 tp
->rx_info
[i
].urb
= urb
;
1319 tp
->rx_info
[i
].buffer
= buf
;
1320 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1323 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1324 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1328 if (buf
!= tx_agg_align(buf
)) {
1330 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1336 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1342 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1343 tp
->tx_info
[i
].context
= tp
;
1344 tp
->tx_info
[i
].urb
= urb
;
1345 tp
->tx_info
[i
].buffer
= buf
;
1346 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1348 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1351 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1355 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1359 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1360 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1361 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1362 tp
, tp
->intr_interval
);
1371 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1373 struct tx_agg
*agg
= NULL
;
1374 unsigned long flags
;
1376 if (list_empty(&tp
->tx_free
))
1379 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1380 if (!list_empty(&tp
->tx_free
)) {
1381 struct list_head
*cursor
;
1383 cursor
= tp
->tx_free
.next
;
1384 list_del_init(cursor
);
1385 agg
= list_entry(cursor
, struct tx_agg
, list
);
1387 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1392 /* r8152_csum_workaround()
1393 * The hw limites the value the transport offset. When the offset is out of the
1394 * range, calculate the checksum by sw.
1396 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1397 struct sk_buff_head
*list
)
1399 if (skb_shinfo(skb
)->gso_size
) {
1400 netdev_features_t features
= tp
->netdev
->features
;
1401 struct sk_buff_head seg_list
;
1402 struct sk_buff
*segs
, *nskb
;
1404 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1405 segs
= skb_gso_segment(skb
, features
);
1406 if (IS_ERR(segs
) || !segs
)
1409 __skb_queue_head_init(&seg_list
);
1415 __skb_queue_tail(&seg_list
, nskb
);
1418 skb_queue_splice(&seg_list
, list
);
1420 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1421 if (skb_checksum_help(skb
) < 0)
1424 __skb_queue_head(list
, skb
);
1426 struct net_device_stats
*stats
;
1429 stats
= &tp
->netdev
->stats
;
1430 stats
->tx_dropped
++;
1435 /* msdn_giant_send_check()
1436 * According to the document of microsoft, the TCP Pseudo Header excludes the
1437 * packet length for IPv6 TCP large packets.
1439 static int msdn_giant_send_check(struct sk_buff
*skb
)
1441 const struct ipv6hdr
*ipv6h
;
1445 ret
= skb_cow_head(skb
, 0);
1449 ipv6h
= ipv6_hdr(skb
);
1453 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1458 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1460 if (skb_vlan_tag_present(skb
)) {
1463 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1464 desc
->opts2
|= cpu_to_le32(opts2
);
1468 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1470 u32 opts2
= le32_to_cpu(desc
->opts2
);
1472 if (opts2
& RX_VLAN_TAG
)
1473 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1474 swab16(opts2
& 0xffff));
1477 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1478 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1480 u32 mss
= skb_shinfo(skb
)->gso_size
;
1481 u32 opts1
, opts2
= 0;
1482 int ret
= TX_CSUM_SUCCESS
;
1484 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1486 opts1
= len
| TX_FS
| TX_LS
;
1489 if (transport_offset
> GTTCPHO_MAX
) {
1490 netif_warn(tp
, tx_err
, tp
->netdev
,
1491 "Invalid transport offset 0x%x for TSO\n",
1497 switch (vlan_get_protocol(skb
)) {
1498 case htons(ETH_P_IP
):
1502 case htons(ETH_P_IPV6
):
1503 if (msdn_giant_send_check(skb
)) {
1515 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1516 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1517 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1520 if (transport_offset
> TCPHO_MAX
) {
1521 netif_warn(tp
, tx_err
, tp
->netdev
,
1522 "Invalid transport offset 0x%x\n",
1528 switch (vlan_get_protocol(skb
)) {
1529 case htons(ETH_P_IP
):
1531 ip_protocol
= ip_hdr(skb
)->protocol
;
1534 case htons(ETH_P_IPV6
):
1536 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1540 ip_protocol
= IPPROTO_RAW
;
1544 if (ip_protocol
== IPPROTO_TCP
)
1546 else if (ip_protocol
== IPPROTO_UDP
)
1551 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1554 desc
->opts2
= cpu_to_le32(opts2
);
1555 desc
->opts1
= cpu_to_le32(opts1
);
1561 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1563 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1567 __skb_queue_head_init(&skb_head
);
1568 spin_lock(&tx_queue
->lock
);
1569 skb_queue_splice_init(tx_queue
, &skb_head
);
1570 spin_unlock(&tx_queue
->lock
);
1572 tx_data
= agg
->head
;
1575 remain
= agg_buf_sz
;
1577 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1578 struct tx_desc
*tx_desc
;
1579 struct sk_buff
*skb
;
1583 skb
= __skb_dequeue(&skb_head
);
1587 len
= skb
->len
+ sizeof(*tx_desc
);
1590 __skb_queue_head(&skb_head
, skb
);
1594 tx_data
= tx_agg_align(tx_data
);
1595 tx_desc
= (struct tx_desc
*)tx_data
;
1597 offset
= (u32
)skb_transport_offset(skb
);
1599 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1600 r8152_csum_workaround(tp
, skb
, &skb_head
);
1604 rtl_tx_vlan_tag(tx_desc
, skb
);
1606 tx_data
+= sizeof(*tx_desc
);
1609 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1610 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1612 stats
->tx_dropped
++;
1613 dev_kfree_skb_any(skb
);
1614 tx_data
-= sizeof(*tx_desc
);
1619 agg
->skb_len
+= len
;
1622 dev_kfree_skb_any(skb
);
1624 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1627 if (!skb_queue_empty(&skb_head
)) {
1628 spin_lock(&tx_queue
->lock
);
1629 skb_queue_splice(&skb_head
, tx_queue
);
1630 spin_unlock(&tx_queue
->lock
);
1633 netif_tx_lock(tp
->netdev
);
1635 if (netif_queue_stopped(tp
->netdev
) &&
1636 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1637 netif_wake_queue(tp
->netdev
);
1639 netif_tx_unlock(tp
->netdev
);
1641 ret
= usb_autopm_get_interface_async(tp
->intf
);
1645 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1646 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1647 (usb_complete_t
)write_bulk_callback
, agg
);
1649 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1651 usb_autopm_put_interface_async(tp
->intf
);
1657 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1659 u8 checksum
= CHECKSUM_NONE
;
1662 if (tp
->version
== RTL_VER_01
)
1665 opts2
= le32_to_cpu(rx_desc
->opts2
);
1666 opts3
= le32_to_cpu(rx_desc
->opts3
);
1668 if (opts2
& RD_IPV4_CS
) {
1670 checksum
= CHECKSUM_NONE
;
1671 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1672 checksum
= CHECKSUM_NONE
;
1673 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1674 checksum
= CHECKSUM_NONE
;
1676 checksum
= CHECKSUM_UNNECESSARY
;
1677 } else if (RD_IPV6_CS
) {
1678 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1679 checksum
= CHECKSUM_UNNECESSARY
;
1680 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1681 checksum
= CHECKSUM_UNNECESSARY
;
1688 static int rx_bottom(struct r8152
*tp
, int budget
)
1690 unsigned long flags
;
1691 struct list_head
*cursor
, *next
, rx_queue
;
1692 int ret
= 0, work_done
= 0;
1694 if (!skb_queue_empty(&tp
->rx_queue
)) {
1695 while (work_done
< budget
) {
1696 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1697 struct net_device
*netdev
= tp
->netdev
;
1698 struct net_device_stats
*stats
= &netdev
->stats
;
1699 unsigned int pkt_len
;
1705 napi_gro_receive(&tp
->napi
, skb
);
1707 stats
->rx_packets
++;
1708 stats
->rx_bytes
+= pkt_len
;
1712 if (list_empty(&tp
->rx_done
))
1715 INIT_LIST_HEAD(&rx_queue
);
1716 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1717 list_splice_init(&tp
->rx_done
, &rx_queue
);
1718 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1720 list_for_each_safe(cursor
, next
, &rx_queue
) {
1721 struct rx_desc
*rx_desc
;
1727 list_del_init(cursor
);
1729 agg
= list_entry(cursor
, struct rx_agg
, list
);
1731 if (urb
->actual_length
< ETH_ZLEN
)
1734 rx_desc
= agg
->head
;
1735 rx_data
= agg
->head
;
1736 len_used
+= sizeof(struct rx_desc
);
1738 while (urb
->actual_length
> len_used
) {
1739 struct net_device
*netdev
= tp
->netdev
;
1740 struct net_device_stats
*stats
= &netdev
->stats
;
1741 unsigned int pkt_len
;
1742 struct sk_buff
*skb
;
1744 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1745 if (pkt_len
< ETH_ZLEN
)
1748 len_used
+= pkt_len
;
1749 if (urb
->actual_length
< len_used
)
1752 pkt_len
-= CRC_SIZE
;
1753 rx_data
+= sizeof(struct rx_desc
);
1755 skb
= napi_alloc_skb(&tp
->napi
, pkt_len
);
1757 stats
->rx_dropped
++;
1761 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1762 memcpy(skb
->data
, rx_data
, pkt_len
);
1763 skb_put(skb
, pkt_len
);
1764 skb
->protocol
= eth_type_trans(skb
, netdev
);
1765 rtl_rx_vlan_tag(rx_desc
, skb
);
1766 if (work_done
< budget
) {
1767 napi_gro_receive(&tp
->napi
, skb
);
1769 stats
->rx_packets
++;
1770 stats
->rx_bytes
+= pkt_len
;
1772 __skb_queue_tail(&tp
->rx_queue
, skb
);
1776 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1777 rx_desc
= (struct rx_desc
*)rx_data
;
1778 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1779 len_used
+= sizeof(struct rx_desc
);
1784 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1786 urb
->actual_length
= 0;
1787 list_add_tail(&agg
->list
, next
);
1791 if (!list_empty(&rx_queue
)) {
1792 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1793 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1794 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1801 static void tx_bottom(struct r8152
*tp
)
1808 if (skb_queue_empty(&tp
->tx_queue
))
1811 agg
= r8152_get_tx_agg(tp
);
1815 res
= r8152_tx_agg_fill(tp
, agg
);
1817 struct net_device
*netdev
= tp
->netdev
;
1819 if (res
== -ENODEV
) {
1820 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1821 netif_device_detach(netdev
);
1823 struct net_device_stats
*stats
= &netdev
->stats
;
1824 unsigned long flags
;
1826 netif_warn(tp
, tx_err
, netdev
,
1827 "failed tx_urb %d\n", res
);
1828 stats
->tx_dropped
+= agg
->skb_num
;
1830 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1831 list_add_tail(&agg
->list
, &tp
->tx_free
);
1832 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1838 static void bottom_half(struct r8152
*tp
)
1840 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1843 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1846 /* When link down, the driver would cancel all bulks. */
1847 /* This avoid the re-submitting bulk */
1848 if (!netif_carrier_ok(tp
->netdev
))
1851 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1856 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1858 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1861 work_done
= rx_bottom(tp
, budget
);
1864 if (work_done
< budget
) {
1865 napi_complete(napi
);
1866 if (!list_empty(&tp
->rx_done
))
1867 napi_schedule(napi
);
1874 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1878 /* The rx would be stopped, so skip submitting */
1879 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1880 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1883 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1884 agg
->head
, agg_buf_sz
,
1885 (usb_complete_t
)read_bulk_callback
, agg
);
1887 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1888 if (ret
== -ENODEV
) {
1889 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1890 netif_device_detach(tp
->netdev
);
1892 struct urb
*urb
= agg
->urb
;
1893 unsigned long flags
;
1895 urb
->actual_length
= 0;
1896 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1897 list_add_tail(&agg
->list
, &tp
->rx_done
);
1898 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1900 netif_err(tp
, rx_err
, tp
->netdev
,
1901 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1903 napi_schedule(&tp
->napi
);
1909 static void rtl_drop_queued_tx(struct r8152
*tp
)
1911 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1912 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1913 struct sk_buff
*skb
;
1915 if (skb_queue_empty(tx_queue
))
1918 __skb_queue_head_init(&skb_head
);
1919 spin_lock_bh(&tx_queue
->lock
);
1920 skb_queue_splice_init(tx_queue
, &skb_head
);
1921 spin_unlock_bh(&tx_queue
->lock
);
1923 while ((skb
= __skb_dequeue(&skb_head
))) {
1925 stats
->tx_dropped
++;
1929 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1931 struct r8152
*tp
= netdev_priv(netdev
);
1933 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1935 usb_queue_reset_device(tp
->intf
);
1938 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1940 struct r8152
*tp
= netdev_priv(netdev
);
1942 if (netif_carrier_ok(netdev
)) {
1943 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1944 schedule_delayed_work(&tp
->schedule
, 0);
1948 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1950 struct r8152
*tp
= netdev_priv(netdev
);
1951 u32 mc_filter
[2]; /* Multicast hash filter */
1955 netif_stop_queue(netdev
);
1956 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1957 ocp_data
&= ~RCR_ACPT_ALL
;
1958 ocp_data
|= RCR_AB
| RCR_APM
;
1960 if (netdev
->flags
& IFF_PROMISC
) {
1961 /* Unconditionally log net taps. */
1962 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1963 ocp_data
|= RCR_AM
| RCR_AAP
;
1964 mc_filter
[1] = 0xffffffff;
1965 mc_filter
[0] = 0xffffffff;
1966 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1967 (netdev
->flags
& IFF_ALLMULTI
)) {
1968 /* Too many to filter perfectly -- accept all multicasts. */
1970 mc_filter
[1] = 0xffffffff;
1971 mc_filter
[0] = 0xffffffff;
1973 struct netdev_hw_addr
*ha
;
1977 netdev_for_each_mc_addr(ha
, netdev
) {
1978 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1980 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1985 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1986 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1988 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1989 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1990 netif_wake_queue(netdev
);
1993 static netdev_features_t
1994 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
1995 netdev_features_t features
)
1997 u32 mss
= skb_shinfo(skb
)->gso_size
;
1998 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
1999 int offset
= skb_transport_offset(skb
);
2001 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
2002 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
2003 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
2004 features
&= ~NETIF_F_GSO_MASK
;
2009 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2010 struct net_device
*netdev
)
2012 struct r8152
*tp
= netdev_priv(netdev
);
2014 skb_tx_timestamp(skb
);
2016 skb_queue_tail(&tp
->tx_queue
, skb
);
2018 if (!list_empty(&tp
->tx_free
)) {
2019 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2020 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2021 schedule_delayed_work(&tp
->schedule
, 0);
2023 usb_mark_last_busy(tp
->udev
);
2024 napi_schedule(&tp
->napi
);
2026 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2027 netif_stop_queue(netdev
);
2030 return NETDEV_TX_OK
;
2033 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2037 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2038 ocp_data
&= ~FMC_FCR_MCU_EN
;
2039 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2040 ocp_data
|= FMC_FCR_MCU_EN
;
2041 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2044 static void rtl8152_nic_reset(struct r8152
*tp
)
2048 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2050 for (i
= 0; i
< 1000; i
++) {
2051 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2053 usleep_range(100, 400);
2057 static void set_tx_qlen(struct r8152
*tp
)
2059 struct net_device
*netdev
= tp
->netdev
;
2061 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2062 sizeof(struct tx_desc
));
2065 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2067 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2070 static void rtl_set_eee_plus(struct r8152
*tp
)
2075 speed
= rtl8152_get_speed(tp
);
2076 if (speed
& _10bps
) {
2077 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2078 ocp_data
|= EEEP_CR_EEEP_TX
;
2079 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2081 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2082 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2083 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2087 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2091 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2093 ocp_data
|= RXDY_GATED_EN
;
2095 ocp_data
&= ~RXDY_GATED_EN
;
2096 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2099 static int rtl_start_rx(struct r8152
*tp
)
2103 INIT_LIST_HEAD(&tp
->rx_done
);
2104 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2105 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2106 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2111 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2112 struct list_head rx_queue
;
2113 unsigned long flags
;
2115 INIT_LIST_HEAD(&rx_queue
);
2118 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2119 struct urb
*urb
= agg
->urb
;
2121 urb
->actual_length
= 0;
2122 list_add_tail(&agg
->list
, &rx_queue
);
2123 } while (i
< RTL8152_MAX_RX
);
2125 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2126 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2127 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2133 static int rtl_stop_rx(struct r8152
*tp
)
2137 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2138 usb_kill_urb(tp
->rx_info
[i
].urb
);
2140 while (!skb_queue_empty(&tp
->rx_queue
))
2141 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2146 static int rtl_enable(struct r8152
*tp
)
2150 r8152b_reset_packet_filter(tp
);
2152 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2153 ocp_data
|= CR_RE
| CR_TE
;
2154 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2156 rxdy_gated_en(tp
, false);
2161 static int rtl8152_enable(struct r8152
*tp
)
2163 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2167 rtl_set_eee_plus(tp
);
2169 return rtl_enable(tp
);
2172 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2174 u32 ocp_data
= tp
->coalesce
/ 8;
2176 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2179 static void r8153_set_rx_early_size(struct r8152
*tp
)
2181 u32 mtu
= tp
->netdev
->mtu
;
2182 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 8;
2184 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2187 static int rtl8153_enable(struct r8152
*tp
)
2189 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2192 usb_disable_lpm(tp
->udev
);
2194 rtl_set_eee_plus(tp
);
2195 r8153_set_rx_early_timeout(tp
);
2196 r8153_set_rx_early_size(tp
);
2198 return rtl_enable(tp
);
2201 static void rtl_disable(struct r8152
*tp
)
2206 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2207 rtl_drop_queued_tx(tp
);
2211 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2212 ocp_data
&= ~RCR_ACPT_ALL
;
2213 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2215 rtl_drop_queued_tx(tp
);
2217 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2218 usb_kill_urb(tp
->tx_info
[i
].urb
);
2220 rxdy_gated_en(tp
, true);
2222 for (i
= 0; i
< 1000; i
++) {
2223 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2224 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2226 usleep_range(1000, 2000);
2229 for (i
= 0; i
< 1000; i
++) {
2230 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2232 usleep_range(1000, 2000);
2237 rtl8152_nic_reset(tp
);
2240 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2244 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2246 ocp_data
|= POWER_CUT
;
2248 ocp_data
&= ~POWER_CUT
;
2249 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2251 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2252 ocp_data
&= ~RESUME_INDICATE
;
2253 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2256 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2260 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2262 ocp_data
|= CPCR_RX_VLAN
;
2264 ocp_data
&= ~CPCR_RX_VLAN
;
2265 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2268 static int rtl8152_set_features(struct net_device
*dev
,
2269 netdev_features_t features
)
2271 netdev_features_t changed
= features
^ dev
->features
;
2272 struct r8152
*tp
= netdev_priv(dev
);
2275 ret
= usb_autopm_get_interface(tp
->intf
);
2279 mutex_lock(&tp
->control
);
2281 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2282 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2283 rtl_rx_vlan_en(tp
, true);
2285 rtl_rx_vlan_en(tp
, false);
2288 mutex_unlock(&tp
->control
);
2290 usb_autopm_put_interface(tp
->intf
);
2296 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2298 static u32
__rtl_get_wol(struct r8152
*tp
)
2303 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2304 if (!(ocp_data
& LAN_WAKE_EN
))
2307 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2308 if (ocp_data
& LINK_ON_WAKE_EN
)
2309 wolopts
|= WAKE_PHY
;
2311 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2312 if (ocp_data
& UWF_EN
)
2313 wolopts
|= WAKE_UCAST
;
2314 if (ocp_data
& BWF_EN
)
2315 wolopts
|= WAKE_BCAST
;
2316 if (ocp_data
& MWF_EN
)
2317 wolopts
|= WAKE_MCAST
;
2319 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2320 if (ocp_data
& MAGIC_EN
)
2321 wolopts
|= WAKE_MAGIC
;
2326 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2330 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2332 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2333 ocp_data
&= ~LINK_ON_WAKE_EN
;
2334 if (wolopts
& WAKE_PHY
)
2335 ocp_data
|= LINK_ON_WAKE_EN
;
2336 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2338 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2339 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2340 if (wolopts
& WAKE_UCAST
)
2342 if (wolopts
& WAKE_BCAST
)
2344 if (wolopts
& WAKE_MCAST
)
2346 if (wolopts
& WAKE_ANY
)
2347 ocp_data
|= LAN_WAKE_EN
;
2348 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2350 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2352 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2353 ocp_data
&= ~MAGIC_EN
;
2354 if (wolopts
& WAKE_MAGIC
)
2355 ocp_data
|= MAGIC_EN
;
2356 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2358 if (wolopts
& WAKE_ANY
)
2359 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2361 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2364 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2369 memset(u1u2
, 0xff, sizeof(u1u2
));
2371 memset(u1u2
, 0x00, sizeof(u1u2
));
2373 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2376 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2380 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2381 if (enable
&& tp
->version
!= RTL_VER_03
&& tp
->version
!= RTL_VER_04
)
2382 ocp_data
|= U2P3_ENABLE
;
2384 ocp_data
&= ~U2P3_ENABLE
;
2385 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2388 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2392 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2394 ocp_data
|= PWR_EN
| PHASE2_EN
;
2396 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2397 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2399 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2400 ocp_data
&= ~PCUT_STATUS
;
2401 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2404 static bool rtl_can_wakeup(struct r8152
*tp
)
2406 struct usb_device
*udev
= tp
->udev
;
2408 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2411 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2416 __rtl_set_wol(tp
, WAKE_ANY
);
2418 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2420 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2421 ocp_data
|= LINK_OFF_WAKE_EN
;
2422 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2424 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2428 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2430 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2432 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2433 ocp_data
&= ~LINK_OFF_WAKE_EN
;
2434 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2436 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2440 static void rtl8153_runtime_enable(struct r8152
*tp
, bool enable
)
2442 rtl_runtime_suspend_enable(tp
, enable
);
2445 r8153_u1u2en(tp
, false);
2446 r8153_u2p3en(tp
, false);
2448 r8153_u2p3en(tp
, true);
2449 r8153_u1u2en(tp
, true);
2453 static void r8153_teredo_off(struct r8152
*tp
)
2457 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2458 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2459 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2461 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2462 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2463 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2466 static void rtl_reset_bmu(struct r8152
*tp
)
2470 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
);
2471 ocp_data
&= ~(BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
);
2472 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2473 ocp_data
|= BMU_RESET_EP_IN
| BMU_RESET_EP_OUT
;
2474 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_BMU_RESET
, ocp_data
);
2477 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
2480 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2481 LINKENA
| DIS_SDSAVE
);
2483 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
2489 static void rtl8152_disable(struct r8152
*tp
)
2491 r8152_aldps_en(tp
, false);
2493 r8152_aldps_en(tp
, true);
2496 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2500 data
= r8152_mdio_read(tp
, MII_BMCR
);
2501 if (data
& BMCR_PDOWN
) {
2502 data
&= ~BMCR_PDOWN
;
2503 r8152_mdio_write(tp
, MII_BMCR
, data
);
2506 set_bit(PHY_RESET
, &tp
->flags
);
2509 static void r8152b_exit_oob(struct r8152
*tp
)
2514 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2515 ocp_data
&= ~RCR_ACPT_ALL
;
2516 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2518 rxdy_gated_en(tp
, true);
2519 r8153_teredo_off(tp
);
2520 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2521 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2523 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2524 ocp_data
&= ~NOW_IS_OOB
;
2525 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2527 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2528 ocp_data
&= ~MCU_BORW_EN
;
2529 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2531 for (i
= 0; i
< 1000; i
++) {
2532 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2533 if (ocp_data
& LINK_LIST_READY
)
2535 usleep_range(1000, 2000);
2538 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2539 ocp_data
|= RE_INIT_LL
;
2540 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2542 for (i
= 0; i
< 1000; i
++) {
2543 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2544 if (ocp_data
& LINK_LIST_READY
)
2546 usleep_range(1000, 2000);
2549 rtl8152_nic_reset(tp
);
2551 /* rx share fifo credit full threshold */
2552 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2554 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2555 tp
->udev
->speed
== USB_SPEED_LOW
) {
2556 /* rx share fifo credit near full threshold */
2557 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2559 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2562 /* rx share fifo credit near full threshold */
2563 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2565 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2569 /* TX share fifo free credit full threshold */
2570 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2572 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2573 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2574 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2575 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2577 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2579 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2581 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2582 ocp_data
|= TCR0_AUTO_FIFO
;
2583 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2586 static void r8152b_enter_oob(struct r8152
*tp
)
2591 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2592 ocp_data
&= ~NOW_IS_OOB
;
2593 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2595 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2596 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2597 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2601 for (i
= 0; i
< 1000; i
++) {
2602 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2603 if (ocp_data
& LINK_LIST_READY
)
2605 usleep_range(1000, 2000);
2608 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2609 ocp_data
|= RE_INIT_LL
;
2610 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2612 for (i
= 0; i
< 1000; i
++) {
2613 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2614 if (ocp_data
& LINK_LIST_READY
)
2616 usleep_range(1000, 2000);
2619 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2621 rtl_rx_vlan_en(tp
, true);
2623 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2624 ocp_data
|= ALDPS_PROXY_MODE
;
2625 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2627 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2628 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2629 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2631 rxdy_gated_en(tp
, false);
2633 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2634 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2635 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2638 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2643 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
2644 tp
->version
== RTL_VER_05
)
2645 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2647 data
= r8152_mdio_read(tp
, MII_BMCR
);
2648 if (data
& BMCR_PDOWN
) {
2649 data
&= ~BMCR_PDOWN
;
2650 r8152_mdio_write(tp
, MII_BMCR
, data
);
2653 if (tp
->version
== RTL_VER_03
) {
2654 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2655 data
&= ~CTAP_SHORT_EN
;
2656 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2659 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2660 data
|= EEE_CLKDIV_EN
;
2661 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2663 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2664 data
|= EN_10M_BGOFF
;
2665 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2666 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2667 data
|= EN_10M_PLLOFF
;
2668 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2669 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2671 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2672 ocp_data
|= PFM_PWM_SWITCH
;
2673 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2675 /* Enable LPF corner auto tune */
2676 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2678 /* Adjust 10M Amplitude */
2679 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2680 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2682 set_bit(PHY_RESET
, &tp
->flags
);
2685 static void r8153_first_init(struct r8152
*tp
)
2690 rxdy_gated_en(tp
, true);
2691 r8153_teredo_off(tp
);
2693 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2694 ocp_data
&= ~RCR_ACPT_ALL
;
2695 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2697 rtl8152_nic_reset(tp
);
2700 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2701 ocp_data
&= ~NOW_IS_OOB
;
2702 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2704 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2705 ocp_data
&= ~MCU_BORW_EN
;
2706 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2708 for (i
= 0; i
< 1000; i
++) {
2709 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2710 if (ocp_data
& LINK_LIST_READY
)
2712 usleep_range(1000, 2000);
2715 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2716 ocp_data
|= RE_INIT_LL
;
2717 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2719 for (i
= 0; i
< 1000; i
++) {
2720 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2721 if (ocp_data
& LINK_LIST_READY
)
2723 usleep_range(1000, 2000);
2726 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2728 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2729 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2731 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2732 ocp_data
|= TCR0_AUTO_FIFO
;
2733 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2735 rtl8152_nic_reset(tp
);
2737 /* rx share fifo credit full threshold */
2738 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2739 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2740 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2741 /* TX share fifo free credit full threshold */
2742 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2744 /* rx aggregation */
2745 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2746 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
2747 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2750 static void r8153_enter_oob(struct r8152
*tp
)
2755 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2756 ocp_data
&= ~NOW_IS_OOB
;
2757 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2762 for (i
= 0; i
< 1000; i
++) {
2763 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2764 if (ocp_data
& LINK_LIST_READY
)
2766 usleep_range(1000, 2000);
2769 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2770 ocp_data
|= RE_INIT_LL
;
2771 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2773 for (i
= 0; i
< 1000; i
++) {
2774 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2775 if (ocp_data
& LINK_LIST_READY
)
2777 usleep_range(1000, 2000);
2780 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2782 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2783 ocp_data
&= ~TEREDO_WAKE_MASK
;
2784 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2786 rtl_rx_vlan_en(tp
, true);
2788 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2789 ocp_data
|= ALDPS_PROXY_MODE
;
2790 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2792 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2793 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2794 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2796 rxdy_gated_en(tp
, false);
2798 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2799 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2800 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2803 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
2807 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2810 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2813 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2818 static void rtl8153_disable(struct r8152
*tp
)
2820 r8153_aldps_en(tp
, false);
2823 r8153_aldps_en(tp
, true);
2824 usb_enable_lpm(tp
->udev
);
2827 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2829 u16 bmcr
, anar
, gbcr
;
2832 cancel_delayed_work_sync(&tp
->schedule
);
2833 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2834 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2835 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2836 if (tp
->mii
.supports_gmii
) {
2837 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2838 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2843 if (autoneg
== AUTONEG_DISABLE
) {
2844 if (speed
== SPEED_10
) {
2846 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2847 } else if (speed
== SPEED_100
) {
2848 bmcr
= BMCR_SPEED100
;
2849 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2850 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2851 bmcr
= BMCR_SPEED1000
;
2852 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2858 if (duplex
== DUPLEX_FULL
)
2859 bmcr
|= BMCR_FULLDPLX
;
2861 if (speed
== SPEED_10
) {
2862 if (duplex
== DUPLEX_FULL
)
2863 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2865 anar
|= ADVERTISE_10HALF
;
2866 } else if (speed
== SPEED_100
) {
2867 if (duplex
== DUPLEX_FULL
) {
2868 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2869 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2871 anar
|= ADVERTISE_10HALF
;
2872 anar
|= ADVERTISE_100HALF
;
2874 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2875 if (duplex
== DUPLEX_FULL
) {
2876 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2877 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2878 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2880 anar
|= ADVERTISE_10HALF
;
2881 anar
|= ADVERTISE_100HALF
;
2882 gbcr
|= ADVERTISE_1000HALF
;
2889 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2892 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
2895 if (tp
->mii
.supports_gmii
)
2896 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2898 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2899 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2901 if (bmcr
& BMCR_RESET
) {
2904 for (i
= 0; i
< 50; i
++) {
2906 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2915 static void rtl8152_up(struct r8152
*tp
)
2917 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2920 r8152_aldps_en(tp
, false);
2921 r8152b_exit_oob(tp
);
2922 r8152_aldps_en(tp
, true);
2925 static void rtl8152_down(struct r8152
*tp
)
2927 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2928 rtl_drop_queued_tx(tp
);
2932 r8152_power_cut_en(tp
, false);
2933 r8152_aldps_en(tp
, false);
2934 r8152b_enter_oob(tp
);
2935 r8152_aldps_en(tp
, true);
2938 static void rtl8153_up(struct r8152
*tp
)
2940 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2943 r8153_u1u2en(tp
, false);
2944 r8153_aldps_en(tp
, false);
2945 r8153_first_init(tp
);
2946 r8153_aldps_en(tp
, true);
2947 r8153_u2p3en(tp
, true);
2948 r8153_u1u2en(tp
, true);
2949 usb_enable_lpm(tp
->udev
);
2952 static void rtl8153_down(struct r8152
*tp
)
2954 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2955 rtl_drop_queued_tx(tp
);
2959 r8153_u1u2en(tp
, false);
2960 r8153_u2p3en(tp
, false);
2961 r8153_power_cut_en(tp
, false);
2962 r8153_aldps_en(tp
, false);
2963 r8153_enter_oob(tp
);
2964 r8153_aldps_en(tp
, true);
2967 static bool rtl8152_in_nway(struct r8152
*tp
)
2971 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
2972 tp
->ocp_base
= 0x2000;
2973 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
2974 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
2976 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2977 if (nway_state
& 0xc000)
2983 static bool rtl8153_in_nway(struct r8152
*tp
)
2985 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
2987 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
2993 static void set_carrier(struct r8152
*tp
)
2995 struct net_device
*netdev
= tp
->netdev
;
2998 speed
= rtl8152_get_speed(tp
);
3000 if (speed
& LINK_STATUS
) {
3001 if (!netif_carrier_ok(netdev
)) {
3002 tp
->rtl_ops
.enable(tp
);
3003 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
3004 napi_disable(&tp
->napi
);
3005 netif_carrier_on(netdev
);
3007 napi_enable(&tp
->napi
);
3010 if (netif_carrier_ok(netdev
)) {
3011 netif_carrier_off(netdev
);
3012 napi_disable(&tp
->napi
);
3013 tp
->rtl_ops
.disable(tp
);
3014 napi_enable(&tp
->napi
);
3019 static void rtl_work_func_t(struct work_struct
*work
)
3021 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3023 /* If the device is unplugged or !netif_running(), the workqueue
3024 * doesn't need to wake the device, and could return directly.
3026 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3029 if (usb_autopm_get_interface(tp
->intf
) < 0)
3032 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3035 if (!mutex_trylock(&tp
->control
)) {
3036 schedule_delayed_work(&tp
->schedule
, 0);
3040 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3043 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3044 _rtl8152_set_rx_mode(tp
->netdev
);
3046 /* don't schedule napi before linking */
3047 if (test_and_clear_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3048 netif_carrier_ok(tp
->netdev
))
3049 napi_schedule(&tp
->napi
);
3051 mutex_unlock(&tp
->control
);
3054 usb_autopm_put_interface(tp
->intf
);
3057 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
3059 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
3061 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3064 if (usb_autopm_get_interface(tp
->intf
) < 0)
3067 mutex_lock(&tp
->control
);
3069 tp
->rtl_ops
.hw_phy_cfg(tp
);
3071 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
);
3073 mutex_unlock(&tp
->control
);
3075 usb_autopm_put_interface(tp
->intf
);
3078 #ifdef CONFIG_PM_SLEEP
3079 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
3082 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
3085 case PM_HIBERNATION_PREPARE
:
3086 case PM_SUSPEND_PREPARE
:
3087 usb_autopm_get_interface(tp
->intf
);
3090 case PM_POST_HIBERNATION
:
3091 case PM_POST_SUSPEND
:
3092 usb_autopm_put_interface(tp
->intf
);
3095 case PM_POST_RESTORE
:
3096 case PM_RESTORE_PREPARE
:
3105 static int rtl8152_open(struct net_device
*netdev
)
3107 struct r8152
*tp
= netdev_priv(netdev
);
3110 res
= alloc_all_mem(tp
);
3114 res
= usb_autopm_get_interface(tp
->intf
);
3120 mutex_lock(&tp
->control
);
3124 netif_carrier_off(netdev
);
3125 netif_start_queue(netdev
);
3126 set_bit(WORK_ENABLE
, &tp
->flags
);
3128 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3131 netif_device_detach(tp
->netdev
);
3132 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3136 napi_enable(&tp
->napi
);
3139 mutex_unlock(&tp
->control
);
3141 usb_autopm_put_interface(tp
->intf
);
3142 #ifdef CONFIG_PM_SLEEP
3143 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
3144 register_pm_notifier(&tp
->pm_notifier
);
3151 static int rtl8152_close(struct net_device
*netdev
)
3153 struct r8152
*tp
= netdev_priv(netdev
);
3156 #ifdef CONFIG_PM_SLEEP
3157 unregister_pm_notifier(&tp
->pm_notifier
);
3159 napi_disable(&tp
->napi
);
3160 clear_bit(WORK_ENABLE
, &tp
->flags
);
3161 usb_kill_urb(tp
->intr_urb
);
3162 cancel_delayed_work_sync(&tp
->schedule
);
3163 netif_stop_queue(netdev
);
3165 res
= usb_autopm_get_interface(tp
->intf
);
3166 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3167 rtl_drop_queued_tx(tp
);
3170 mutex_lock(&tp
->control
);
3172 tp
->rtl_ops
.down(tp
);
3174 mutex_unlock(&tp
->control
);
3176 usb_autopm_put_interface(tp
->intf
);
3184 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3186 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3187 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3188 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3191 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3195 r8152_mmd_indirect(tp
, dev
, reg
);
3196 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3197 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3202 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3204 r8152_mmd_indirect(tp
, dev
, reg
);
3205 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3206 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3209 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3211 u16 config1
, config2
, config3
;
3214 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3215 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3216 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3217 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3220 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3221 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3222 config1
|= sd_rise_time(1);
3223 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3224 config3
|= fast_snr(42);
3226 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3227 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3229 config1
|= sd_rise_time(7);
3230 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3231 config3
|= fast_snr(511);
3234 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3235 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3236 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3237 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3240 static void r8152b_enable_eee(struct r8152
*tp
)
3242 r8152_eee_en(tp
, true);
3243 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3246 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3251 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3252 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3255 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3258 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3259 config
&= ~EEE10_EN
;
3262 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3263 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3266 static void r8153_enable_eee(struct r8152
*tp
)
3268 r8153_eee_en(tp
, true);
3269 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3272 static void r8152b_enable_fc(struct r8152
*tp
)
3276 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3277 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3278 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3281 static void rtl_tally_reset(struct r8152
*tp
)
3285 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3286 ocp_data
|= TALLY_RESET
;
3287 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3290 static void r8152b_init(struct r8152
*tp
)
3294 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3297 r8152_aldps_en(tp
, false);
3299 if (tp
->version
== RTL_VER_01
) {
3300 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3301 ocp_data
&= ~LED_MODE_MASK
;
3302 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3305 r8152_power_cut_en(tp
, false);
3307 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3308 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3309 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3310 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3311 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3312 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3313 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3314 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3315 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3316 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3318 r8152b_enable_eee(tp
);
3319 r8152_aldps_en(tp
, true);
3320 r8152b_enable_fc(tp
);
3321 rtl_tally_reset(tp
);
3323 /* enable rx aggregation */
3324 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3325 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
3326 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3329 static void r8153_init(struct r8152
*tp
)
3334 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3337 r8153_aldps_en(tp
, false);
3338 r8153_u1u2en(tp
, false);
3340 for (i
= 0; i
< 500; i
++) {
3341 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3347 for (i
= 0; i
< 500; i
++) {
3348 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3349 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3354 usb_disable_lpm(tp
->udev
);
3355 r8153_u2p3en(tp
, false);
3357 if (tp
->version
== RTL_VER_04
) {
3358 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3359 ocp_data
&= ~pwd_dn_scale_mask
;
3360 ocp_data
|= pwd_dn_scale(96);
3361 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3363 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3364 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3365 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3366 } else if (tp
->version
== RTL_VER_05
) {
3367 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3368 ocp_data
&= ~ECM_ALDPS
;
3369 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3371 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3372 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3373 ocp_data
&= ~DYNAMIC_BURST
;
3375 ocp_data
|= DYNAMIC_BURST
;
3376 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3377 } else if (tp
->version
== RTL_VER_06
) {
3378 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3379 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3380 ocp_data
&= ~DYNAMIC_BURST
;
3382 ocp_data
|= DYNAMIC_BURST
;
3383 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3386 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3387 ocp_data
|= EP4_FULL_FC
;
3388 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3390 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3391 ocp_data
&= ~TIMER11_EN
;
3392 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3394 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3395 ocp_data
&= ~LED_MODE_MASK
;
3396 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3398 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3399 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
3400 ocp_data
|= LPM_TIMER_500MS
;
3402 ocp_data
|= LPM_TIMER_500US
;
3403 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3405 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3406 ocp_data
&= ~SEN_VAL_MASK
;
3407 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3408 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3410 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3412 r8153_power_cut_en(tp
, false);
3413 r8153_u1u2en(tp
, true);
3415 /* MAC clock speed down */
3416 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, 0);
3417 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, 0);
3418 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
, 0);
3419 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
, 0);
3421 r8153_enable_eee(tp
);
3422 r8153_aldps_en(tp
, true);
3423 r8152b_enable_fc(tp
);
3424 rtl_tally_reset(tp
);
3425 r8153_u2p3en(tp
, true);
3428 static int rtl8152_pre_reset(struct usb_interface
*intf
)
3430 struct r8152
*tp
= usb_get_intfdata(intf
);
3431 struct net_device
*netdev
;
3436 netdev
= tp
->netdev
;
3437 if (!netif_running(netdev
))
3440 napi_disable(&tp
->napi
);
3441 clear_bit(WORK_ENABLE
, &tp
->flags
);
3442 usb_kill_urb(tp
->intr_urb
);
3443 cancel_delayed_work_sync(&tp
->schedule
);
3444 if (netif_carrier_ok(netdev
)) {
3445 netif_stop_queue(netdev
);
3446 mutex_lock(&tp
->control
);
3447 tp
->rtl_ops
.disable(tp
);
3448 mutex_unlock(&tp
->control
);
3454 static int rtl8152_post_reset(struct usb_interface
*intf
)
3456 struct r8152
*tp
= usb_get_intfdata(intf
);
3457 struct net_device
*netdev
;
3462 netdev
= tp
->netdev
;
3463 if (!netif_running(netdev
))
3466 set_bit(WORK_ENABLE
, &tp
->flags
);
3467 if (netif_carrier_ok(netdev
)) {
3468 mutex_lock(&tp
->control
);
3469 tp
->rtl_ops
.enable(tp
);
3470 rtl8152_set_rx_mode(netdev
);
3471 mutex_unlock(&tp
->control
);
3472 netif_wake_queue(netdev
);
3475 napi_enable(&tp
->napi
);
3480 static bool delay_autosuspend(struct r8152
*tp
)
3482 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
3483 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
3485 /* This means a linking change occurs and the driver doesn't detect it,
3486 * yet. If the driver has disabled tx/rx and hw is linking on, the
3487 * device wouldn't wake up by receiving any packet.
3489 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
3492 /* If the linking down is occurred by nway, the device may miss the
3493 * linking change event. And it wouldn't wake when linking on.
3495 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
3501 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3503 struct r8152
*tp
= usb_get_intfdata(intf
);
3504 struct net_device
*netdev
= tp
->netdev
;
3507 mutex_lock(&tp
->control
);
3509 if (PMSG_IS_AUTO(message
)) {
3510 if (netif_running(netdev
) && delay_autosuspend(tp
)) {
3515 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3517 netif_device_detach(netdev
);
3520 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3521 clear_bit(WORK_ENABLE
, &tp
->flags
);
3522 usb_kill_urb(tp
->intr_urb
);
3523 napi_disable(&tp
->napi
);
3524 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3526 tp
->rtl_ops
.autosuspend_en(tp
, true);
3528 cancel_delayed_work_sync(&tp
->schedule
);
3529 tp
->rtl_ops
.down(tp
);
3531 napi_enable(&tp
->napi
);
3534 mutex_unlock(&tp
->control
);
3539 static int rtl8152_resume(struct usb_interface
*intf
)
3541 struct r8152
*tp
= usb_get_intfdata(intf
);
3543 mutex_lock(&tp
->control
);
3545 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3546 tp
->rtl_ops
.init(tp
);
3547 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
3548 netif_device_attach(tp
->netdev
);
3551 if (netif_running(tp
->netdev
) && tp
->netdev
->flags
& IFF_UP
) {
3552 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3553 tp
->rtl_ops
.autosuspend_en(tp
, false);
3554 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3555 napi_disable(&tp
->napi
);
3556 set_bit(WORK_ENABLE
, &tp
->flags
);
3557 if (netif_carrier_ok(tp
->netdev
))
3559 napi_enable(&tp
->napi
);
3562 netif_carrier_off(tp
->netdev
);
3563 set_bit(WORK_ENABLE
, &tp
->flags
);
3565 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3566 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3567 if (tp
->netdev
->flags
& IFF_UP
)
3568 tp
->rtl_ops
.autosuspend_en(tp
, false);
3569 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3572 mutex_unlock(&tp
->control
);
3577 static int rtl8152_reset_resume(struct usb_interface
*intf
)
3579 struct r8152
*tp
= usb_get_intfdata(intf
);
3581 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3582 return rtl8152_resume(intf
);
3585 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3587 struct r8152
*tp
= netdev_priv(dev
);
3589 if (usb_autopm_get_interface(tp
->intf
) < 0)
3592 if (!rtl_can_wakeup(tp
)) {
3596 mutex_lock(&tp
->control
);
3597 wol
->supported
= WAKE_ANY
;
3598 wol
->wolopts
= __rtl_get_wol(tp
);
3599 mutex_unlock(&tp
->control
);
3602 usb_autopm_put_interface(tp
->intf
);
3605 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3607 struct r8152
*tp
= netdev_priv(dev
);
3610 if (!rtl_can_wakeup(tp
))
3613 ret
= usb_autopm_get_interface(tp
->intf
);
3617 mutex_lock(&tp
->control
);
3619 __rtl_set_wol(tp
, wol
->wolopts
);
3620 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3622 mutex_unlock(&tp
->control
);
3624 usb_autopm_put_interface(tp
->intf
);
3630 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3632 struct r8152
*tp
= netdev_priv(dev
);
3634 return tp
->msg_enable
;
3637 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3639 struct r8152
*tp
= netdev_priv(dev
);
3641 tp
->msg_enable
= value
;
3644 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3645 struct ethtool_drvinfo
*info
)
3647 struct r8152
*tp
= netdev_priv(netdev
);
3649 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3650 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3651 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3655 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3657 struct r8152
*tp
= netdev_priv(netdev
);
3660 if (!tp
->mii
.mdio_read
)
3663 ret
= usb_autopm_get_interface(tp
->intf
);
3667 mutex_lock(&tp
->control
);
3669 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3671 mutex_unlock(&tp
->control
);
3673 usb_autopm_put_interface(tp
->intf
);
3679 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3681 struct r8152
*tp
= netdev_priv(dev
);
3684 ret
= usb_autopm_get_interface(tp
->intf
);
3688 mutex_lock(&tp
->control
);
3690 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3692 tp
->autoneg
= cmd
->autoneg
;
3693 tp
->speed
= cmd
->speed
;
3694 tp
->duplex
= cmd
->duplex
;
3697 mutex_unlock(&tp
->control
);
3699 usb_autopm_put_interface(tp
->intf
);
3705 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3712 "tx_single_collisions",
3713 "tx_multi_collisions",
3721 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3725 return ARRAY_SIZE(rtl8152_gstrings
);
3731 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3732 struct ethtool_stats
*stats
, u64
*data
)
3734 struct r8152
*tp
= netdev_priv(dev
);
3735 struct tally_counter tally
;
3737 if (usb_autopm_get_interface(tp
->intf
) < 0)
3740 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3742 usb_autopm_put_interface(tp
->intf
);
3744 data
[0] = le64_to_cpu(tally
.tx_packets
);
3745 data
[1] = le64_to_cpu(tally
.rx_packets
);
3746 data
[2] = le64_to_cpu(tally
.tx_errors
);
3747 data
[3] = le32_to_cpu(tally
.rx_errors
);
3748 data
[4] = le16_to_cpu(tally
.rx_missed
);
3749 data
[5] = le16_to_cpu(tally
.align_errors
);
3750 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3751 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3752 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3753 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3754 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3755 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3756 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3759 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3761 switch (stringset
) {
3763 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3768 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3770 u32 ocp_data
, lp
, adv
, supported
= 0;
3773 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3774 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3776 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3777 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3779 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3780 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3782 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3783 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3785 eee
->eee_enabled
= !!ocp_data
;
3786 eee
->eee_active
= !!(supported
& adv
& lp
);
3787 eee
->supported
= supported
;
3788 eee
->advertised
= adv
;
3789 eee
->lp_advertised
= lp
;
3794 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3796 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3798 r8152_eee_en(tp
, eee
->eee_enabled
);
3800 if (!eee
->eee_enabled
)
3803 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3808 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3810 u32 ocp_data
, lp
, adv
, supported
= 0;
3813 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3814 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3816 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3817 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3819 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3820 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3822 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3823 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3825 eee
->eee_enabled
= !!ocp_data
;
3826 eee
->eee_active
= !!(supported
& adv
& lp
);
3827 eee
->supported
= supported
;
3828 eee
->advertised
= adv
;
3829 eee
->lp_advertised
= lp
;
3834 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3836 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3838 r8153_eee_en(tp
, eee
->eee_enabled
);
3840 if (!eee
->eee_enabled
)
3843 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3849 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3851 struct r8152
*tp
= netdev_priv(net
);
3854 ret
= usb_autopm_get_interface(tp
->intf
);
3858 mutex_lock(&tp
->control
);
3860 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3862 mutex_unlock(&tp
->control
);
3864 usb_autopm_put_interface(tp
->intf
);
3871 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3873 struct r8152
*tp
= netdev_priv(net
);
3876 ret
= usb_autopm_get_interface(tp
->intf
);
3880 mutex_lock(&tp
->control
);
3882 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3884 ret
= mii_nway_restart(&tp
->mii
);
3886 mutex_unlock(&tp
->control
);
3888 usb_autopm_put_interface(tp
->intf
);
3894 static int rtl8152_nway_reset(struct net_device
*dev
)
3896 struct r8152
*tp
= netdev_priv(dev
);
3899 ret
= usb_autopm_get_interface(tp
->intf
);
3903 mutex_lock(&tp
->control
);
3905 ret
= mii_nway_restart(&tp
->mii
);
3907 mutex_unlock(&tp
->control
);
3909 usb_autopm_put_interface(tp
->intf
);
3915 static int rtl8152_get_coalesce(struct net_device
*netdev
,
3916 struct ethtool_coalesce
*coalesce
)
3918 struct r8152
*tp
= netdev_priv(netdev
);
3920 switch (tp
->version
) {
3928 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
3933 static int rtl8152_set_coalesce(struct net_device
*netdev
,
3934 struct ethtool_coalesce
*coalesce
)
3936 struct r8152
*tp
= netdev_priv(netdev
);
3939 switch (tp
->version
) {
3947 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
3950 ret
= usb_autopm_get_interface(tp
->intf
);
3954 mutex_lock(&tp
->control
);
3956 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
3957 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
3959 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
3960 r8153_set_rx_early_timeout(tp
);
3963 mutex_unlock(&tp
->control
);
3965 usb_autopm_put_interface(tp
->intf
);
3970 static struct ethtool_ops ops
= {
3971 .get_drvinfo
= rtl8152_get_drvinfo
,
3972 .get_settings
= rtl8152_get_settings
,
3973 .set_settings
= rtl8152_set_settings
,
3974 .get_link
= ethtool_op_get_link
,
3975 .nway_reset
= rtl8152_nway_reset
,
3976 .get_msglevel
= rtl8152_get_msglevel
,
3977 .set_msglevel
= rtl8152_set_msglevel
,
3978 .get_wol
= rtl8152_get_wol
,
3979 .set_wol
= rtl8152_set_wol
,
3980 .get_strings
= rtl8152_get_strings
,
3981 .get_sset_count
= rtl8152_get_sset_count
,
3982 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3983 .get_coalesce
= rtl8152_get_coalesce
,
3984 .set_coalesce
= rtl8152_set_coalesce
,
3985 .get_eee
= rtl_ethtool_get_eee
,
3986 .set_eee
= rtl_ethtool_set_eee
,
3989 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3991 struct r8152
*tp
= netdev_priv(netdev
);
3992 struct mii_ioctl_data
*data
= if_mii(rq
);
3995 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3998 res
= usb_autopm_get_interface(tp
->intf
);
4004 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4008 mutex_lock(&tp
->control
);
4009 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4010 mutex_unlock(&tp
->control
);
4014 if (!capable(CAP_NET_ADMIN
)) {
4018 mutex_lock(&tp
->control
);
4019 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4020 mutex_unlock(&tp
->control
);
4027 usb_autopm_put_interface(tp
->intf
);
4033 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4035 struct r8152
*tp
= netdev_priv(dev
);
4038 switch (tp
->version
) {
4041 return eth_change_mtu(dev
, new_mtu
);
4046 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
4049 ret
= usb_autopm_get_interface(tp
->intf
);
4053 mutex_lock(&tp
->control
);
4057 if (netif_running(dev
) && netif_carrier_ok(dev
))
4058 r8153_set_rx_early_size(tp
);
4060 mutex_unlock(&tp
->control
);
4062 usb_autopm_put_interface(tp
->intf
);
4067 static const struct net_device_ops rtl8152_netdev_ops
= {
4068 .ndo_open
= rtl8152_open
,
4069 .ndo_stop
= rtl8152_close
,
4070 .ndo_do_ioctl
= rtl8152_ioctl
,
4071 .ndo_start_xmit
= rtl8152_start_xmit
,
4072 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4073 .ndo_set_features
= rtl8152_set_features
,
4074 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4075 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4076 .ndo_change_mtu
= rtl8152_change_mtu
,
4077 .ndo_validate_addr
= eth_validate_addr
,
4078 .ndo_features_check
= rtl8152_features_check
,
4081 static void r8152b_get_version(struct r8152
*tp
)
4086 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
4087 version
= (u16
)(ocp_data
& VERSION_MASK
);
4091 tp
->version
= RTL_VER_01
;
4094 tp
->version
= RTL_VER_02
;
4097 tp
->version
= RTL_VER_03
;
4098 tp
->mii
.supports_gmii
= 1;
4101 tp
->version
= RTL_VER_04
;
4102 tp
->mii
.supports_gmii
= 1;
4105 tp
->version
= RTL_VER_05
;
4106 tp
->mii
.supports_gmii
= 1;
4109 tp
->version
= RTL_VER_06
;
4110 tp
->mii
.supports_gmii
= 1;
4113 netif_info(tp
, probe
, tp
->netdev
,
4114 "Unknown version 0x%04x\n", version
);
4119 static void rtl8152_unload(struct r8152
*tp
)
4121 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4124 if (tp
->version
!= RTL_VER_01
)
4125 r8152_power_cut_en(tp
, true);
4128 static void rtl8153_unload(struct r8152
*tp
)
4130 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4133 r8153_power_cut_en(tp
, false);
4136 static int rtl_ops_init(struct r8152
*tp
)
4138 struct rtl_ops
*ops
= &tp
->rtl_ops
;
4141 switch (tp
->version
) {
4144 ops
->init
= r8152b_init
;
4145 ops
->enable
= rtl8152_enable
;
4146 ops
->disable
= rtl8152_disable
;
4147 ops
->up
= rtl8152_up
;
4148 ops
->down
= rtl8152_down
;
4149 ops
->unload
= rtl8152_unload
;
4150 ops
->eee_get
= r8152_get_eee
;
4151 ops
->eee_set
= r8152_set_eee
;
4152 ops
->in_nway
= rtl8152_in_nway
;
4153 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
4154 ops
->autosuspend_en
= rtl_runtime_suspend_enable
;
4161 ops
->init
= r8153_init
;
4162 ops
->enable
= rtl8153_enable
;
4163 ops
->disable
= rtl8153_disable
;
4164 ops
->up
= rtl8153_up
;
4165 ops
->down
= rtl8153_down
;
4166 ops
->unload
= rtl8153_unload
;
4167 ops
->eee_get
= r8153_get_eee
;
4168 ops
->eee_set
= r8153_set_eee
;
4169 ops
->in_nway
= rtl8153_in_nway
;
4170 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
4171 ops
->autosuspend_en
= rtl8153_runtime_enable
;
4176 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
4183 static int rtl8152_probe(struct usb_interface
*intf
,
4184 const struct usb_device_id
*id
)
4186 struct usb_device
*udev
= interface_to_usbdev(intf
);
4188 struct net_device
*netdev
;
4191 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
4192 usb_driver_set_configuration(udev
, 1);
4196 usb_reset_device(udev
);
4197 netdev
= alloc_etherdev(sizeof(struct r8152
));
4199 dev_err(&intf
->dev
, "Out of memory\n");
4203 SET_NETDEV_DEV(netdev
, &intf
->dev
);
4204 tp
= netdev_priv(netdev
);
4205 tp
->msg_enable
= 0x7FFF;
4208 tp
->netdev
= netdev
;
4211 r8152b_get_version(tp
);
4212 ret
= rtl_ops_init(tp
);
4216 mutex_init(&tp
->control
);
4217 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4218 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
4220 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4221 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4223 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4224 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4225 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4226 NETIF_F_HW_VLAN_CTAG_TX
;
4227 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4228 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4229 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4230 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4231 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4232 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4233 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4235 netdev
->ethtool_ops
= &ops
;
4236 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4238 tp
->mii
.dev
= netdev
;
4239 tp
->mii
.mdio_read
= read_mii_word
;
4240 tp
->mii
.mdio_write
= write_mii_word
;
4241 tp
->mii
.phy_id_mask
= 0x3f;
4242 tp
->mii
.reg_num_mask
= 0x1f;
4243 tp
->mii
.phy_id
= R8152_PHY_ID
;
4245 switch (udev
->speed
) {
4246 case USB_SPEED_SUPER
:
4247 case USB_SPEED_SUPER_PLUS
:
4248 tp
->coalesce
= COALESCE_SUPER
;
4250 case USB_SPEED_HIGH
:
4251 tp
->coalesce
= COALESCE_HIGH
;
4254 tp
->coalesce
= COALESCE_SLOW
;
4258 tp
->autoneg
= AUTONEG_ENABLE
;
4259 tp
->speed
= tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
;
4260 tp
->duplex
= DUPLEX_FULL
;
4262 intf
->needs_remote_wakeup
= 1;
4264 tp
->rtl_ops
.init(tp
);
4265 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
4266 set_ethernet_addr(tp
);
4268 usb_set_intfdata(intf
, tp
);
4269 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4271 ret
= register_netdev(netdev
);
4273 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4277 if (!rtl_can_wakeup(tp
))
4278 __rtl_set_wol(tp
, 0);
4280 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4281 if (tp
->saved_wolopts
)
4282 device_set_wakeup_enable(&udev
->dev
, true);
4284 device_set_wakeup_enable(&udev
->dev
, false);
4286 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4291 netif_napi_del(&tp
->napi
);
4292 usb_set_intfdata(intf
, NULL
);
4294 free_netdev(netdev
);
4298 static void rtl8152_disconnect(struct usb_interface
*intf
)
4300 struct r8152
*tp
= usb_get_intfdata(intf
);
4302 usb_set_intfdata(intf
, NULL
);
4304 struct usb_device
*udev
= tp
->udev
;
4306 if (udev
->state
== USB_STATE_NOTATTACHED
)
4307 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4309 netif_napi_del(&tp
->napi
);
4310 unregister_netdev(tp
->netdev
);
4311 cancel_delayed_work_sync(&tp
->hw_phy_work
);
4312 tp
->rtl_ops
.unload(tp
);
4313 free_netdev(tp
->netdev
);
4317 #define REALTEK_USB_DEVICE(vend, prod) \
4318 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4319 USB_DEVICE_ID_MATCH_INT_CLASS, \
4320 .idVendor = (vend), \
4321 .idProduct = (prod), \
4322 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4325 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4326 USB_DEVICE_ID_MATCH_DEVICE, \
4327 .idVendor = (vend), \
4328 .idProduct = (prod), \
4329 .bInterfaceClass = USB_CLASS_COMM, \
4330 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4331 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4333 /* table of devices that work with this driver */
4334 static struct usb_device_id rtl8152_table
[] = {
4335 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4336 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4337 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4338 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4339 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4340 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
4344 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4346 static struct usb_driver rtl8152_driver
= {
4348 .id_table
= rtl8152_table
,
4349 .probe
= rtl8152_probe
,
4350 .disconnect
= rtl8152_disconnect
,
4351 .suspend
= rtl8152_suspend
,
4352 .resume
= rtl8152_resume
,
4353 .reset_resume
= rtl8152_reset_resume
,
4354 .pre_reset
= rtl8152_pre_reset
,
4355 .post_reset
= rtl8152_post_reset
,
4356 .supports_autosuspend
= 1,
4357 .disable_hub_initiated_lpm
= 1,
4360 module_usb_driver(rtl8152_driver
);
4362 MODULE_AUTHOR(DRIVER_AUTHOR
);
4363 MODULE_DESCRIPTION(DRIVER_DESC
);
4364 MODULE_LICENSE("GPL");