via-velocity: Change DMA_LENGTH_DEF (from the VIA driver)
[deliverable/linux.git] / drivers / net / via-velocity.c
1 /*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47 #include <linux/module.h>
48 #include <linux/types.h>
49 #include <linux/init.h>
50 #include <linux/mm.h>
51 #include <linux/errno.h>
52 #include <linux/ioport.h>
53 #include <linux/pci.h>
54 #include <linux/kernel.h>
55 #include <linux/netdevice.h>
56 #include <linux/etherdevice.h>
57 #include <linux/skbuff.h>
58 #include <linux/delay.h>
59 #include <linux/timer.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/string.h>
63 #include <linux/wait.h>
64 #include <linux/io.h>
65 #include <linux/if.h>
66 #include <linux/uaccess.h>
67 #include <linux/proc_fs.h>
68 #include <linux/inetdevice.h>
69 #include <linux/reboot.h>
70 #include <linux/ethtool.h>
71 #include <linux/mii.h>
72 #include <linux/in.h>
73 #include <linux/if_arp.h>
74 #include <linux/if_vlan.h>
75 #include <linux/ip.h>
76 #include <linux/tcp.h>
77 #include <linux/udp.h>
78 #include <linux/crc-ccitt.h>
79 #include <linux/crc32.h>
80
81 #include "via-velocity.h"
82
83
84 static int velocity_nics;
85 static int msglevel = MSG_LEVEL_INFO;
86
87 /**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95 static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
96 {
97 int i;
98
99 /* Select CAM mask */
100 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
101
102 writeb(0, &regs->CAMADDR);
103
104 /* read mask */
105 for (i = 0; i < 8; i++)
106 *mask++ = readb(&(regs->MARCAM[i]));
107
108 /* disable CAMEN */
109 writeb(0, &regs->CAMADDR);
110
111 /* Select mar */
112 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
113 }
114
115
116 /**
117 * mac_set_cam_mask - Set a CAM mask
118 * @regs: register block for this velocity
119 * @mask: CAM mask to load
120 *
121 * Store a new mask into a CAM
122 */
123 static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
124 {
125 int i;
126 /* Select CAM mask */
127 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
128
129 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
130
131 for (i = 0; i < 8; i++)
132 writeb(*mask++, &(regs->MARCAM[i]));
133
134 /* disable CAMEN */
135 writeb(0, &regs->CAMADDR);
136
137 /* Select mar */
138 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
139 }
140
141 static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
142 {
143 int i;
144 /* Select CAM mask */
145 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
146
147 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
148
149 for (i = 0; i < 8; i++)
150 writeb(*mask++, &(regs->MARCAM[i]));
151
152 /* disable CAMEN */
153 writeb(0, &regs->CAMADDR);
154
155 /* Select mar */
156 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
157 }
158
159 /**
160 * mac_set_cam - set CAM data
161 * @regs: register block of this velocity
162 * @idx: Cam index
163 * @addr: 2 or 6 bytes of CAM data
164 *
165 * Load an address or vlan tag into a CAM
166 */
167 static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
168 {
169 int i;
170
171 /* Select CAM mask */
172 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
173
174 idx &= (64 - 1);
175
176 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
177
178 for (i = 0; i < 6; i++)
179 writeb(*addr++, &(regs->MARCAM[i]));
180
181 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
182
183 udelay(10);
184
185 writeb(0, &regs->CAMADDR);
186
187 /* Select mar */
188 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
189 }
190
191 static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
192 const u8 *addr)
193 {
194
195 /* Select CAM mask */
196 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
197
198 idx &= (64 - 1);
199
200 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
201 writew(*((u16 *) addr), &regs->MARCAM[0]);
202
203 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
204
205 udelay(10);
206
207 writeb(0, &regs->CAMADDR);
208
209 /* Select mar */
210 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
211 }
212
213
214 /**
215 * mac_wol_reset - reset WOL after exiting low power
216 * @regs: register block of this velocity
217 *
218 * Called after we drop out of wake on lan mode in order to
219 * reset the Wake on lan features. This function doesn't restore
220 * the rest of the logic from the result of sleep/wakeup
221 */
222 static void mac_wol_reset(struct mac_regs __iomem *regs)
223 {
224
225 /* Turn off SWPTAG right after leaving power mode */
226 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
227 /* clear sticky bits */
228 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
229
230 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
231 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
232 /* disable force PME-enable */
233 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
234 /* disable power-event config bit */
235 writew(0xFFFF, &regs->WOLCRClr);
236 /* clear power status */
237 writew(0xFFFF, &regs->WOLSRClr);
238 }
239
240 static const struct ethtool_ops velocity_ethtool_ops;
241
242 /*
243 Define module options
244 */
245
246 MODULE_AUTHOR("VIA Networking Technologies, Inc.");
247 MODULE_LICENSE("GPL");
248 MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
249
250 #define VELOCITY_PARAM(N, D) \
251 static int N[MAX_UNITS] = OPTION_DEFAULT;\
252 module_param_array(N, int, NULL, 0); \
253 MODULE_PARM_DESC(N, D);
254
255 #define RX_DESC_MIN 64
256 #define RX_DESC_MAX 255
257 #define RX_DESC_DEF 64
258 VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
259
260 #define TX_DESC_MIN 16
261 #define TX_DESC_MAX 256
262 #define TX_DESC_DEF 64
263 VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
264
265 #define RX_THRESH_MIN 0
266 #define RX_THRESH_MAX 3
267 #define RX_THRESH_DEF 0
268 /* rx_thresh[] is used for controlling the receive fifo threshold.
269 0: indicate the rxfifo threshold is 128 bytes.
270 1: indicate the rxfifo threshold is 512 bytes.
271 2: indicate the rxfifo threshold is 1024 bytes.
272 3: indicate the rxfifo threshold is store & forward.
273 */
274 VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
275
276 #define DMA_LENGTH_MIN 0
277 #define DMA_LENGTH_MAX 7
278 #define DMA_LENGTH_DEF 6
279
280 /* DMA_length[] is used for controlling the DMA length
281 0: 8 DWORDs
282 1: 16 DWORDs
283 2: 32 DWORDs
284 3: 64 DWORDs
285 4: 128 DWORDs
286 5: 256 DWORDs
287 6: SF(flush till emply)
288 7: SF(flush till emply)
289 */
290 VELOCITY_PARAM(DMA_length, "DMA length");
291
292 #define IP_ALIG_DEF 0
293 /* IP_byte_align[] is used for IP header DWORD byte aligned
294 0: indicate the IP header won't be DWORD byte aligned.(Default) .
295 1: indicate the IP header will be DWORD byte aligned.
296 In some enviroment, the IP header should be DWORD byte aligned,
297 or the packet will be droped when we receive it. (eg: IPVS)
298 */
299 VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
300
301 #define TX_CSUM_DEF 1
302 /* txcsum_offload[] is used for setting the checksum offload ability of NIC.
303 (We only support RX checksum offload now)
304 0: disable csum_offload[checksum offload
305 1: enable checksum offload. (Default)
306 */
307 VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
308
309 #define FLOW_CNTL_DEF 1
310 #define FLOW_CNTL_MIN 1
311 #define FLOW_CNTL_MAX 5
312
313 /* flow_control[] is used for setting the flow control ability of NIC.
314 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
315 2: enable TX flow control.
316 3: enable RX flow control.
317 4: enable RX/TX flow control.
318 5: disable
319 */
320 VELOCITY_PARAM(flow_control, "Enable flow control ability");
321
322 #define MED_LNK_DEF 0
323 #define MED_LNK_MIN 0
324 #define MED_LNK_MAX 4
325 /* speed_duplex[] is used for setting the speed and duplex mode of NIC.
326 0: indicate autonegotiation for both speed and duplex mode
327 1: indicate 100Mbps half duplex mode
328 2: indicate 100Mbps full duplex mode
329 3: indicate 10Mbps half duplex mode
330 4: indicate 10Mbps full duplex mode
331
332 Note:
333 if EEPROM have been set to the force mode, this option is ignored
334 by driver.
335 */
336 VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
337
338 #define VAL_PKT_LEN_DEF 0
339 /* ValPktLen[] is used for setting the checksum offload ability of NIC.
340 0: Receive frame with invalid layer 2 length (Default)
341 1: Drop frame with invalid layer 2 length
342 */
343 VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
344
345 #define WOL_OPT_DEF 0
346 #define WOL_OPT_MIN 0
347 #define WOL_OPT_MAX 7
348 /* wol_opts[] is used for controlling wake on lan behavior.
349 0: Wake up if recevied a magic packet. (Default)
350 1: Wake up if link status is on/off.
351 2: Wake up if recevied an arp packet.
352 4: Wake up if recevied any unicast packet.
353 Those value can be sumed up to support more than one option.
354 */
355 VELOCITY_PARAM(wol_opts, "Wake On Lan options");
356
357 static int rx_copybreak = 200;
358 module_param(rx_copybreak, int, 0644);
359 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
360
361 /*
362 * Internal board variants. At the moment we have only one
363 */
364 static struct velocity_info_tbl chip_info_table[] = {
365 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
366 { }
367 };
368
369 /*
370 * Describe the PCI device identifiers that we support in this
371 * device driver. Used for hotplug autoloading.
372 */
373 static const struct pci_device_id velocity_id_table[] __devinitdata = {
374 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
375 { }
376 };
377
378 MODULE_DEVICE_TABLE(pci, velocity_id_table);
379
380 /**
381 * get_chip_name - identifier to name
382 * @id: chip identifier
383 *
384 * Given a chip identifier return a suitable description. Returns
385 * a pointer a static string valid while the driver is loaded.
386 */
387 static const char __devinit *get_chip_name(enum chip_type chip_id)
388 {
389 int i;
390 for (i = 0; chip_info_table[i].name != NULL; i++)
391 if (chip_info_table[i].chip_id == chip_id)
392 break;
393 return chip_info_table[i].name;
394 }
395
396 /**
397 * velocity_remove1 - device unplug
398 * @pdev: PCI device being removed
399 *
400 * Device unload callback. Called on an unplug or on module
401 * unload for each active device that is present. Disconnects
402 * the device from the network layer and frees all the resources
403 */
404 static void __devexit velocity_remove1(struct pci_dev *pdev)
405 {
406 struct net_device *dev = pci_get_drvdata(pdev);
407 struct velocity_info *vptr = netdev_priv(dev);
408
409 unregister_netdev(dev);
410 iounmap(vptr->mac_regs);
411 pci_release_regions(pdev);
412 pci_disable_device(pdev);
413 pci_set_drvdata(pdev, NULL);
414 free_netdev(dev);
415
416 velocity_nics--;
417 }
418
419 /**
420 * velocity_set_int_opt - parser for integer options
421 * @opt: pointer to option value
422 * @val: value the user requested (or -1 for default)
423 * @min: lowest value allowed
424 * @max: highest value allowed
425 * @def: default value
426 * @name: property name
427 * @dev: device name
428 *
429 * Set an integer property in the module options. This function does
430 * all the verification and checking as well as reporting so that
431 * we don't duplicate code for each option.
432 */
433 static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
434 {
435 if (val == -1)
436 *opt = def;
437 else if (val < min || val > max) {
438 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
439 devname, name, min, max);
440 *opt = def;
441 } else {
442 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
443 devname, name, val);
444 *opt = val;
445 }
446 }
447
448 /**
449 * velocity_set_bool_opt - parser for boolean options
450 * @opt: pointer to option value
451 * @val: value the user requested (or -1 for default)
452 * @def: default value (yes/no)
453 * @flag: numeric value to set for true.
454 * @name: property name
455 * @dev: device name
456 *
457 * Set a boolean property in the module options. This function does
458 * all the verification and checking as well as reporting so that
459 * we don't duplicate code for each option.
460 */
461 static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname)
462 {
463 (*opt) &= (~flag);
464 if (val == -1)
465 *opt |= (def ? flag : 0);
466 else if (val < 0 || val > 1) {
467 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
468 devname, name);
469 *opt |= (def ? flag : 0);
470 } else {
471 printk(KERN_INFO "%s: set parameter %s to %s\n",
472 devname, name, val ? "TRUE" : "FALSE");
473 *opt |= (val ? flag : 0);
474 }
475 }
476
477 /**
478 * velocity_get_options - set options on device
479 * @opts: option structure for the device
480 * @index: index of option to use in module options array
481 * @devname: device name
482 *
483 * Turn the module and command options into a single structure
484 * for the current device
485 */
486 static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
487 {
488
489 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
490 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
491 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
492 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
493
494 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
495 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
496 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
497 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
498 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
499 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
500 opts->numrx = (opts->numrx & ~3);
501 }
502
503 /**
504 * velocity_init_cam_filter - initialise CAM
505 * @vptr: velocity to program
506 *
507 * Initialize the content addressable memory used for filters. Load
508 * appropriately according to the presence of VLAN
509 */
510 static void velocity_init_cam_filter(struct velocity_info *vptr)
511 {
512 struct mac_regs __iomem *regs = vptr->mac_regs;
513
514 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
515 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
516 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
517
518 /* Disable all CAMs */
519 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
520 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
521 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
522 mac_set_cam_mask(regs, vptr->mCAMmask);
523
524 /* Enable VCAMs */
525 if (vptr->vlgrp) {
526 unsigned int vid, i = 0;
527
528 if (!vlan_group_get_device(vptr->vlgrp, 0))
529 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
530
531 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
532 if (vlan_group_get_device(vptr->vlgrp, vid)) {
533 mac_set_vlan_cam(regs, i, (u8 *) &vid);
534 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
535 if (++i >= VCAM_SIZE)
536 break;
537 }
538 }
539 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
540 }
541 }
542
543 static void velocity_vlan_rx_register(struct net_device *dev,
544 struct vlan_group *grp)
545 {
546 struct velocity_info *vptr = netdev_priv(dev);
547
548 vptr->vlgrp = grp;
549 }
550
551 static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
552 {
553 struct velocity_info *vptr = netdev_priv(dev);
554
555 spin_lock_irq(&vptr->lock);
556 velocity_init_cam_filter(vptr);
557 spin_unlock_irq(&vptr->lock);
558 }
559
560 static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
561 {
562 struct velocity_info *vptr = netdev_priv(dev);
563
564 spin_lock_irq(&vptr->lock);
565 vlan_group_set_device(vptr->vlgrp, vid, NULL);
566 velocity_init_cam_filter(vptr);
567 spin_unlock_irq(&vptr->lock);
568 }
569
570 static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
571 {
572 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
573 }
574
575 /**
576 * velocity_rx_reset - handle a receive reset
577 * @vptr: velocity we are resetting
578 *
579 * Reset the ownership and status for the receive ring side.
580 * Hand all the receive queue to the NIC.
581 */
582 static void velocity_rx_reset(struct velocity_info *vptr)
583 {
584
585 struct mac_regs __iomem *regs = vptr->mac_regs;
586 int i;
587
588 velocity_init_rx_ring_indexes(vptr);
589
590 /*
591 * Init state, all RD entries belong to the NIC
592 */
593 for (i = 0; i < vptr->options.numrx; ++i)
594 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
595
596 writew(vptr->options.numrx, &regs->RBRDU);
597 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
598 writew(0, &regs->RDIdx);
599 writew(vptr->options.numrx - 1, &regs->RDCSize);
600 }
601
602 /**
603 * velocity_get_opt_media_mode - get media selection
604 * @vptr: velocity adapter
605 *
606 * Get the media mode stored in EEPROM or module options and load
607 * mii_status accordingly. The requested link state information
608 * is also returned.
609 */
610 static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
611 {
612 u32 status = 0;
613
614 switch (vptr->options.spd_dpx) {
615 case SPD_DPX_AUTO:
616 status = VELOCITY_AUTONEG_ENABLE;
617 break;
618 case SPD_DPX_100_FULL:
619 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
620 break;
621 case SPD_DPX_10_FULL:
622 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
623 break;
624 case SPD_DPX_100_HALF:
625 status = VELOCITY_SPEED_100;
626 break;
627 case SPD_DPX_10_HALF:
628 status = VELOCITY_SPEED_10;
629 break;
630 }
631 vptr->mii_status = status;
632 return status;
633 }
634
635 /**
636 * safe_disable_mii_autopoll - autopoll off
637 * @regs: velocity registers
638 *
639 * Turn off the autopoll and wait for it to disable on the chip
640 */
641 static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
642 {
643 u16 ww;
644
645 /* turn off MAUTO */
646 writeb(0, &regs->MIICR);
647 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
648 udelay(1);
649 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
650 break;
651 }
652 }
653
654 /**
655 * enable_mii_autopoll - turn on autopolling
656 * @regs: velocity registers
657 *
658 * Enable the MII link status autopoll feature on the Velocity
659 * hardware. Wait for it to enable.
660 */
661 static void enable_mii_autopoll(struct mac_regs __iomem *regs)
662 {
663 int ii;
664
665 writeb(0, &(regs->MIICR));
666 writeb(MIIADR_SWMPL, &regs->MIIADR);
667
668 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
669 udelay(1);
670 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
671 break;
672 }
673
674 writeb(MIICR_MAUTO, &regs->MIICR);
675
676 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
677 udelay(1);
678 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
679 break;
680 }
681
682 }
683
684 /**
685 * velocity_mii_read - read MII data
686 * @regs: velocity registers
687 * @index: MII register index
688 * @data: buffer for received data
689 *
690 * Perform a single read of an MII 16bit register. Returns zero
691 * on success or -ETIMEDOUT if the PHY did not respond.
692 */
693 static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
694 {
695 u16 ww;
696
697 /*
698 * Disable MIICR_MAUTO, so that mii addr can be set normally
699 */
700 safe_disable_mii_autopoll(regs);
701
702 writeb(index, &regs->MIIADR);
703
704 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
705
706 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
707 if (!(readb(&regs->MIICR) & MIICR_RCMD))
708 break;
709 }
710
711 *data = readw(&regs->MIIDATA);
712
713 enable_mii_autopoll(regs);
714 if (ww == W_MAX_TIMEOUT)
715 return -ETIMEDOUT;
716 return 0;
717 }
718
719
720 /**
721 * mii_check_media_mode - check media state
722 * @regs: velocity registers
723 *
724 * Check the current MII status and determine the link status
725 * accordingly
726 */
727 static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
728 {
729 u32 status = 0;
730 u16 ANAR;
731
732 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
733 status |= VELOCITY_LINK_FAIL;
734
735 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
736 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
737 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
738 status |= (VELOCITY_SPEED_1000);
739 else {
740 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
741 if (ANAR & ANAR_TXFD)
742 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
743 else if (ANAR & ANAR_TX)
744 status |= VELOCITY_SPEED_100;
745 else if (ANAR & ANAR_10FD)
746 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
747 else
748 status |= (VELOCITY_SPEED_10);
749 }
750
751 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
752 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
753 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
754 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
755 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
756 status |= VELOCITY_AUTONEG_ENABLE;
757 }
758 }
759
760 return status;
761 }
762
763 /**
764 * velocity_mii_write - write MII data
765 * @regs: velocity registers
766 * @index: MII register index
767 * @data: 16bit data for the MII register
768 *
769 * Perform a single write to an MII 16bit register. Returns zero
770 * on success or -ETIMEDOUT if the PHY did not respond.
771 */
772 static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
773 {
774 u16 ww;
775
776 /*
777 * Disable MIICR_MAUTO, so that mii addr can be set normally
778 */
779 safe_disable_mii_autopoll(regs);
780
781 /* MII reg offset */
782 writeb(mii_addr, &regs->MIIADR);
783 /* set MII data */
784 writew(data, &regs->MIIDATA);
785
786 /* turn on MIICR_WCMD */
787 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
788
789 /* W_MAX_TIMEOUT is the timeout period */
790 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
791 udelay(5);
792 if (!(readb(&regs->MIICR) & MIICR_WCMD))
793 break;
794 }
795 enable_mii_autopoll(regs);
796
797 if (ww == W_MAX_TIMEOUT)
798 return -ETIMEDOUT;
799 return 0;
800 }
801
802 /**
803 * set_mii_flow_control - flow control setup
804 * @vptr: velocity interface
805 *
806 * Set up the flow control on this interface according to
807 * the supplied user/eeprom options.
808 */
809 static void set_mii_flow_control(struct velocity_info *vptr)
810 {
811 /*Enable or Disable PAUSE in ANAR */
812 switch (vptr->options.flow_cntl) {
813 case FLOW_CNTL_TX:
814 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
815 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
816 break;
817
818 case FLOW_CNTL_RX:
819 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
820 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
821 break;
822
823 case FLOW_CNTL_TX_RX:
824 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
825 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
826 break;
827
828 case FLOW_CNTL_DISABLE:
829 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
830 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
831 break;
832 default:
833 break;
834 }
835 }
836
837 /**
838 * mii_set_auto_on - autonegotiate on
839 * @vptr: velocity
840 *
841 * Enable autonegotation on this interface
842 */
843 static void mii_set_auto_on(struct velocity_info *vptr)
844 {
845 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
846 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
847 else
848 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
849 }
850
851 static u32 check_connection_type(struct mac_regs __iomem *regs)
852 {
853 u32 status = 0;
854 u8 PHYSR0;
855 u16 ANAR;
856 PHYSR0 = readb(&regs->PHYSR0);
857
858 /*
859 if (!(PHYSR0 & PHYSR0_LINKGD))
860 status|=VELOCITY_LINK_FAIL;
861 */
862
863 if (PHYSR0 & PHYSR0_FDPX)
864 status |= VELOCITY_DUPLEX_FULL;
865
866 if (PHYSR0 & PHYSR0_SPDG)
867 status |= VELOCITY_SPEED_1000;
868 else if (PHYSR0 & PHYSR0_SPD10)
869 status |= VELOCITY_SPEED_10;
870 else
871 status |= VELOCITY_SPEED_100;
872
873 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
874 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
875 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
876 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
877 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
878 status |= VELOCITY_AUTONEG_ENABLE;
879 }
880 }
881
882 return status;
883 }
884
885
886
887 /**
888 * velocity_set_media_mode - set media mode
889 * @mii_status: old MII link state
890 *
891 * Check the media link state and configure the flow control
892 * PHY and also velocity hardware setup accordingly. In particular
893 * we need to set up CD polling and frame bursting.
894 */
895 static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
896 {
897 u32 curr_status;
898 struct mac_regs __iomem *regs = vptr->mac_regs;
899
900 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
901 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
902
903 /* Set mii link status */
904 set_mii_flow_control(vptr);
905
906 /*
907 Check if new status is consisent with current status
908 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
909 || (mii_status==curr_status)) {
910 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
911 vptr->mii_status=check_connection_type(vptr->mac_regs);
912 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
913 return 0;
914 }
915 */
916
917 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
918 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
919
920 /*
921 * If connection type is AUTO
922 */
923 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
924 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
925 /* clear force MAC mode bit */
926 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
927 /* set duplex mode of MAC according to duplex mode of MII */
928 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
929 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
930 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
931
932 /* enable AUTO-NEGO mode */
933 mii_set_auto_on(vptr);
934 } else {
935 u16 ANAR;
936 u8 CHIPGCR;
937
938 /*
939 * 1. if it's 3119, disable frame bursting in halfduplex mode
940 * and enable it in fullduplex mode
941 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
942 * 3. only enable CD heart beat counter in 10HD mode
943 */
944
945 /* set force MAC mode bit */
946 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
947
948 CHIPGCR = readb(&regs->CHIPGCR);
949 CHIPGCR &= ~CHIPGCR_FCGMII;
950
951 if (mii_status & VELOCITY_DUPLEX_FULL) {
952 CHIPGCR |= CHIPGCR_FCFDX;
953 writeb(CHIPGCR, &regs->CHIPGCR);
954 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
955 if (vptr->rev_id < REV_ID_VT3216_A0)
956 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
957 } else {
958 CHIPGCR &= ~CHIPGCR_FCFDX;
959 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
960 writeb(CHIPGCR, &regs->CHIPGCR);
961 if (vptr->rev_id < REV_ID_VT3216_A0)
962 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
963 }
964
965 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
966
967 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
968 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
969 else
970 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
971
972 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
973 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
974 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
975 if (mii_status & VELOCITY_SPEED_100) {
976 if (mii_status & VELOCITY_DUPLEX_FULL)
977 ANAR |= ANAR_TXFD;
978 else
979 ANAR |= ANAR_TX;
980 } else {
981 if (mii_status & VELOCITY_DUPLEX_FULL)
982 ANAR |= ANAR_10FD;
983 else
984 ANAR |= ANAR_10;
985 }
986 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
987 /* enable AUTO-NEGO mode */
988 mii_set_auto_on(vptr);
989 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
990 }
991 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
992 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
993 return VELOCITY_LINK_CHANGE;
994 }
995
996 /**
997 * velocity_print_link_status - link status reporting
998 * @vptr: velocity to report on
999 *
1000 * Turn the link status of the velocity card into a kernel log
1001 * description of the new link state, detailing speed and duplex
1002 * status
1003 */
1004 static void velocity_print_link_status(struct velocity_info *vptr)
1005 {
1006
1007 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1008 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1009 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1010 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1011
1012 if (vptr->mii_status & VELOCITY_SPEED_1000)
1013 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1014 else if (vptr->mii_status & VELOCITY_SPEED_100)
1015 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1016 else
1017 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1018
1019 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1020 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1021 else
1022 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1023 } else {
1024 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1025 switch (vptr->options.spd_dpx) {
1026 case SPD_DPX_100_HALF:
1027 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1028 break;
1029 case SPD_DPX_100_FULL:
1030 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1031 break;
1032 case SPD_DPX_10_HALF:
1033 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1034 break;
1035 case SPD_DPX_10_FULL:
1036 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1037 break;
1038 default:
1039 break;
1040 }
1041 }
1042 }
1043
1044 /**
1045 * enable_flow_control_ability - flow control
1046 * @vptr: veloity to configure
1047 *
1048 * Set up flow control according to the flow control options
1049 * determined by the eeprom/configuration.
1050 */
1051 static void enable_flow_control_ability(struct velocity_info *vptr)
1052 {
1053
1054 struct mac_regs __iomem *regs = vptr->mac_regs;
1055
1056 switch (vptr->options.flow_cntl) {
1057
1058 case FLOW_CNTL_DEFAULT:
1059 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1060 writel(CR0_FDXRFCEN, &regs->CR0Set);
1061 else
1062 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1063
1064 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1065 writel(CR0_FDXTFCEN, &regs->CR0Set);
1066 else
1067 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1068 break;
1069
1070 case FLOW_CNTL_TX:
1071 writel(CR0_FDXTFCEN, &regs->CR0Set);
1072 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1073 break;
1074
1075 case FLOW_CNTL_RX:
1076 writel(CR0_FDXRFCEN, &regs->CR0Set);
1077 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1078 break;
1079
1080 case FLOW_CNTL_TX_RX:
1081 writel(CR0_FDXTFCEN, &regs->CR0Set);
1082 writel(CR0_FDXRFCEN, &regs->CR0Set);
1083 break;
1084
1085 case FLOW_CNTL_DISABLE:
1086 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1087 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1088 break;
1089
1090 default:
1091 break;
1092 }
1093
1094 }
1095
1096 /**
1097 * velocity_soft_reset - soft reset
1098 * @vptr: velocity to reset
1099 *
1100 * Kick off a soft reset of the velocity adapter and then poll
1101 * until the reset sequence has completed before returning.
1102 */
1103 static int velocity_soft_reset(struct velocity_info *vptr)
1104 {
1105 struct mac_regs __iomem *regs = vptr->mac_regs;
1106 int i = 0;
1107
1108 writel(CR0_SFRST, &regs->CR0Set);
1109
1110 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1111 udelay(5);
1112 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1113 break;
1114 }
1115
1116 if (i == W_MAX_TIMEOUT) {
1117 writel(CR0_FORSRST, &regs->CR0Set);
1118 /* FIXME: PCI POSTING */
1119 /* delay 2ms */
1120 mdelay(2);
1121 }
1122 return 0;
1123 }
1124
1125 /**
1126 * velocity_set_multi - filter list change callback
1127 * @dev: network device
1128 *
1129 * Called by the network layer when the filter lists need to change
1130 * for a velocity adapter. Reload the CAMs with the new address
1131 * filter ruleset.
1132 */
1133 static void velocity_set_multi(struct net_device *dev)
1134 {
1135 struct velocity_info *vptr = netdev_priv(dev);
1136 struct mac_regs __iomem *regs = vptr->mac_regs;
1137 u8 rx_mode;
1138 int i;
1139 struct dev_mc_list *mclist;
1140
1141 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1142 writel(0xffffffff, &regs->MARCAM[0]);
1143 writel(0xffffffff, &regs->MARCAM[4]);
1144 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
1145 } else if ((dev->mc_count > vptr->multicast_limit)
1146 || (dev->flags & IFF_ALLMULTI)) {
1147 writel(0xffffffff, &regs->MARCAM[0]);
1148 writel(0xffffffff, &regs->MARCAM[4]);
1149 rx_mode = (RCR_AM | RCR_AB);
1150 } else {
1151 int offset = MCAM_SIZE - vptr->multicast_limit;
1152 mac_get_cam_mask(regs, vptr->mCAMmask);
1153
1154 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
1155 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1156 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
1157 }
1158
1159 mac_set_cam_mask(regs, vptr->mCAMmask);
1160 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1161 }
1162 if (dev->mtu > 1500)
1163 rx_mode |= RCR_AL;
1164
1165 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1166
1167 }
1168
1169 /*
1170 * MII access , media link mode setting functions
1171 */
1172
1173 /**
1174 * mii_init - set up MII
1175 * @vptr: velocity adapter
1176 * @mii_status: links tatus
1177 *
1178 * Set up the PHY for the current link state.
1179 */
1180 static void mii_init(struct velocity_info *vptr, u32 mii_status)
1181 {
1182 u16 BMCR;
1183
1184 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
1185 case PHYID_CICADA_CS8201:
1186 /*
1187 * Reset to hardware default
1188 */
1189 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1190 /*
1191 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1192 * off it in NWay-forced half mode for NWay-forced v.s.
1193 * legacy-forced issue.
1194 */
1195 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1196 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1197 else
1198 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1199 /*
1200 * Turn on Link/Activity LED enable bit for CIS8201
1201 */
1202 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
1203 break;
1204 case PHYID_VT3216_32BIT:
1205 case PHYID_VT3216_64BIT:
1206 /*
1207 * Reset to hardware default
1208 */
1209 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1210 /*
1211 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1212 * off it in NWay-forced half mode for NWay-forced v.s.
1213 * legacy-forced issue
1214 */
1215 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1216 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1217 else
1218 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
1219 break;
1220
1221 case PHYID_MARVELL_1000:
1222 case PHYID_MARVELL_1000S:
1223 /*
1224 * Assert CRS on Transmit
1225 */
1226 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1227 /*
1228 * Reset to hardware default
1229 */
1230 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
1231 break;
1232 default:
1233 ;
1234 }
1235 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
1236 if (BMCR & BMCR_ISO) {
1237 BMCR &= ~BMCR_ISO;
1238 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
1239 }
1240 }
1241
1242 /**
1243 * setup_queue_timers - Setup interrupt timers
1244 *
1245 * Setup interrupt frequency during suppression (timeout if the frame
1246 * count isn't filled).
1247 */
1248 static void setup_queue_timers(struct velocity_info *vptr)
1249 {
1250 /* Only for newer revisions */
1251 if (vptr->rev_id >= REV_ID_VT3216_A0) {
1252 u8 txqueue_timer = 0;
1253 u8 rxqueue_timer = 0;
1254
1255 if (vptr->mii_status & (VELOCITY_SPEED_1000 |
1256 VELOCITY_SPEED_100)) {
1257 txqueue_timer = vptr->options.txqueue_timer;
1258 rxqueue_timer = vptr->options.rxqueue_timer;
1259 }
1260
1261 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1262 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1263 }
1264 }
1265 /**
1266 * setup_adaptive_interrupts - Setup interrupt suppression
1267 *
1268 * @vptr velocity adapter
1269 *
1270 * The velocity is able to suppress interrupt during high interrupt load.
1271 * This function turns on that feature.
1272 */
1273 static void setup_adaptive_interrupts(struct velocity_info *vptr)
1274 {
1275 struct mac_regs __iomem *regs = vptr->mac_regs;
1276 u16 tx_intsup = vptr->options.tx_intsup;
1277 u16 rx_intsup = vptr->options.rx_intsup;
1278
1279 /* Setup default interrupt mask (will be changed below) */
1280 vptr->int_mask = INT_MASK_DEF;
1281
1282 /* Set Tx Interrupt Suppression Threshold */
1283 writeb(CAMCR_PS0, &regs->CAMCR);
1284 if (tx_intsup != 0) {
1285 vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
1286 ISR_PTX2I | ISR_PTX3I);
1287 writew(tx_intsup, &regs->ISRCTL);
1288 } else
1289 writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
1290
1291 /* Set Rx Interrupt Suppression Threshold */
1292 writeb(CAMCR_PS1, &regs->CAMCR);
1293 if (rx_intsup != 0) {
1294 vptr->int_mask &= ~ISR_PRXI;
1295 writew(rx_intsup, &regs->ISRCTL);
1296 } else
1297 writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
1298
1299 /* Select page to interrupt hold timer */
1300 writeb(0, &regs->CAMCR);
1301 }
1302
1303 /**
1304 * velocity_init_registers - initialise MAC registers
1305 * @vptr: velocity to init
1306 * @type: type of initialisation (hot or cold)
1307 *
1308 * Initialise the MAC on a reset or on first set up on the
1309 * hardware.
1310 */
1311 static void velocity_init_registers(struct velocity_info *vptr,
1312 enum velocity_init_type type)
1313 {
1314 struct mac_regs __iomem *regs = vptr->mac_regs;
1315 int i, mii_status;
1316
1317 mac_wol_reset(regs);
1318
1319 switch (type) {
1320 case VELOCITY_INIT_RESET:
1321 case VELOCITY_INIT_WOL:
1322
1323 netif_stop_queue(vptr->dev);
1324
1325 /*
1326 * Reset RX to prevent RX pointer not on the 4X location
1327 */
1328 velocity_rx_reset(vptr);
1329 mac_rx_queue_run(regs);
1330 mac_rx_queue_wake(regs);
1331
1332 mii_status = velocity_get_opt_media_mode(vptr);
1333 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1334 velocity_print_link_status(vptr);
1335 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1336 netif_wake_queue(vptr->dev);
1337 }
1338
1339 enable_flow_control_ability(vptr);
1340
1341 mac_clear_isr(regs);
1342 writel(CR0_STOP, &regs->CR0Clr);
1343 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1344 &regs->CR0Set);
1345
1346 break;
1347
1348 case VELOCITY_INIT_COLD:
1349 default:
1350 /*
1351 * Do reset
1352 */
1353 velocity_soft_reset(vptr);
1354 mdelay(5);
1355
1356 mac_eeprom_reload(regs);
1357 for (i = 0; i < 6; i++)
1358 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
1359
1360 /*
1361 * clear Pre_ACPI bit.
1362 */
1363 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1364 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1365 mac_set_dma_length(regs, vptr->options.DMA_length);
1366
1367 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1368 /*
1369 * Back off algorithm use original IEEE standard
1370 */
1371 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1372
1373 /*
1374 * Init CAM filter
1375 */
1376 velocity_init_cam_filter(vptr);
1377
1378 /*
1379 * Set packet filter: Receive directed and broadcast address
1380 */
1381 velocity_set_multi(vptr->dev);
1382
1383 /*
1384 * Enable MII auto-polling
1385 */
1386 enable_mii_autopoll(regs);
1387
1388 setup_adaptive_interrupts(vptr);
1389
1390 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1391 writew(vptr->options.numrx - 1, &regs->RDCSize);
1392 mac_rx_queue_run(regs);
1393 mac_rx_queue_wake(regs);
1394
1395 writew(vptr->options.numtx - 1, &regs->TDCSize);
1396
1397 for (i = 0; i < vptr->tx.numq; i++) {
1398 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1399 mac_tx_queue_run(regs, i);
1400 }
1401
1402 init_flow_control_register(vptr);
1403
1404 writel(CR0_STOP, &regs->CR0Clr);
1405 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1406
1407 mii_status = velocity_get_opt_media_mode(vptr);
1408 netif_stop_queue(vptr->dev);
1409
1410 mii_init(vptr, mii_status);
1411
1412 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1413 velocity_print_link_status(vptr);
1414 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
1415 netif_wake_queue(vptr->dev);
1416 }
1417
1418 enable_flow_control_ability(vptr);
1419 mac_hw_mibs_init(regs);
1420 mac_write_int_mask(vptr->int_mask, regs);
1421 mac_clear_isr(regs);
1422
1423 }
1424 }
1425
1426 static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1427 {
1428 struct mac_regs __iomem *regs = vptr->mac_regs;
1429 int avail, dirty, unusable;
1430
1431 /*
1432 * RD number must be equal to 4X per hardware spec
1433 * (programming guide rev 1.20, p.13)
1434 */
1435 if (vptr->rx.filled < 4)
1436 return;
1437
1438 wmb();
1439
1440 unusable = vptr->rx.filled & 0x0003;
1441 dirty = vptr->rx.dirty - unusable;
1442 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1443 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1444 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1445 }
1446
1447 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1448 vptr->rx.filled = unusable;
1449 }
1450
1451 /**
1452 * velocity_init_dma_rings - set up DMA rings
1453 * @vptr: Velocity to set up
1454 *
1455 * Allocate PCI mapped DMA rings for the receive and transmit layer
1456 * to use.
1457 */
1458 static int velocity_init_dma_rings(struct velocity_info *vptr)
1459 {
1460 struct velocity_opt *opt = &vptr->options;
1461 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1462 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1463 struct pci_dev *pdev = vptr->pdev;
1464 dma_addr_t pool_dma;
1465 void *pool;
1466 unsigned int i;
1467
1468 /*
1469 * Allocate all RD/TD rings a single pool.
1470 *
1471 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1472 * alignment
1473 */
1474 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
1475 rx_ring_size, &pool_dma);
1476 if (!pool) {
1477 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1478 vptr->dev->name);
1479 return -ENOMEM;
1480 }
1481
1482 vptr->rx.ring = pool;
1483 vptr->rx.pool_dma = pool_dma;
1484
1485 pool += rx_ring_size;
1486 pool_dma += rx_ring_size;
1487
1488 for (i = 0; i < vptr->tx.numq; i++) {
1489 vptr->tx.rings[i] = pool;
1490 vptr->tx.pool_dma[i] = pool_dma;
1491 pool += tx_ring_size;
1492 pool_dma += tx_ring_size;
1493 }
1494
1495 return 0;
1496 }
1497
1498 static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1499 {
1500 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1501 }
1502
1503 /**
1504 * velocity_alloc_rx_buf - allocate aligned receive buffer
1505 * @vptr: velocity
1506 * @idx: ring index
1507 *
1508 * Allocate a new full sized buffer for the reception of a frame and
1509 * map it into PCI space for the hardware to use. The hardware
1510 * requires *64* byte alignment of the buffer which makes life
1511 * less fun than would be ideal.
1512 */
1513 static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1514 {
1515 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1516 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1517
1518 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1519 if (rd_info->skb == NULL)
1520 return -ENOMEM;
1521
1522 /*
1523 * Do the gymnastics to get the buffer head for data at
1524 * 64byte alignment.
1525 */
1526 skb_reserve(rd_info->skb,
1527 64 - ((unsigned long) rd_info->skb->data & 63));
1528 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1529 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1530
1531 /*
1532 * Fill in the descriptor to match
1533 */
1534
1535 *((u32 *) & (rd->rdesc0)) = 0;
1536 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1537 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1538 rd->pa_high = 0;
1539 return 0;
1540 }
1541
1542
1543 static int velocity_rx_refill(struct velocity_info *vptr)
1544 {
1545 int dirty = vptr->rx.dirty, done = 0;
1546
1547 do {
1548 struct rx_desc *rd = vptr->rx.ring + dirty;
1549
1550 /* Fine for an all zero Rx desc at init time as well */
1551 if (rd->rdesc0.len & OWNED_BY_NIC)
1552 break;
1553
1554 if (!vptr->rx.info[dirty].skb) {
1555 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1556 break;
1557 }
1558 done++;
1559 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1560 } while (dirty != vptr->rx.curr);
1561
1562 if (done) {
1563 vptr->rx.dirty = dirty;
1564 vptr->rx.filled += done;
1565 }
1566
1567 return done;
1568 }
1569
1570 /**
1571 * velocity_free_rd_ring - free receive ring
1572 * @vptr: velocity to clean up
1573 *
1574 * Free the receive buffers for each ring slot and any
1575 * attached socket buffers that need to go away.
1576 */
1577 static void velocity_free_rd_ring(struct velocity_info *vptr)
1578 {
1579 int i;
1580
1581 if (vptr->rx.info == NULL)
1582 return;
1583
1584 for (i = 0; i < vptr->options.numrx; i++) {
1585 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1586 struct rx_desc *rd = vptr->rx.ring + i;
1587
1588 memset(rd, 0, sizeof(*rd));
1589
1590 if (!rd_info->skb)
1591 continue;
1592 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1593 PCI_DMA_FROMDEVICE);
1594 rd_info->skb_dma = 0;
1595
1596 dev_kfree_skb(rd_info->skb);
1597 rd_info->skb = NULL;
1598 }
1599
1600 kfree(vptr->rx.info);
1601 vptr->rx.info = NULL;
1602 }
1603
1604
1605
1606 /**
1607 * velocity_init_rd_ring - set up receive ring
1608 * @vptr: velocity to configure
1609 *
1610 * Allocate and set up the receive buffers for each ring slot and
1611 * assign them to the network adapter.
1612 */
1613 static int velocity_init_rd_ring(struct velocity_info *vptr)
1614 {
1615 int ret = -ENOMEM;
1616
1617 vptr->rx.info = kcalloc(vptr->options.numrx,
1618 sizeof(struct velocity_rd_info), GFP_KERNEL);
1619 if (!vptr->rx.info)
1620 goto out;
1621
1622 velocity_init_rx_ring_indexes(vptr);
1623
1624 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1625 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1626 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1627 velocity_free_rd_ring(vptr);
1628 goto out;
1629 }
1630
1631 ret = 0;
1632 out:
1633 return ret;
1634 }
1635
1636 /**
1637 * velocity_init_td_ring - set up transmit ring
1638 * @vptr: velocity
1639 *
1640 * Set up the transmit ring and chain the ring pointers together.
1641 * Returns zero on success or a negative posix errno code for
1642 * failure.
1643 */
1644 static int velocity_init_td_ring(struct velocity_info *vptr)
1645 {
1646 dma_addr_t curr;
1647 int j;
1648
1649 /* Init the TD ring entries */
1650 for (j = 0; j < vptr->tx.numq; j++) {
1651 curr = vptr->tx.pool_dma[j];
1652
1653 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1654 sizeof(struct velocity_td_info),
1655 GFP_KERNEL);
1656 if (!vptr->tx.infos[j]) {
1657 while (--j >= 0)
1658 kfree(vptr->tx.infos[j]);
1659 return -ENOMEM;
1660 }
1661
1662 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1663 }
1664 return 0;
1665 }
1666
1667 /**
1668 * velocity_free_dma_rings - free PCI ring pointers
1669 * @vptr: Velocity to free from
1670 *
1671 * Clean up the PCI ring buffers allocated to this velocity.
1672 */
1673 static void velocity_free_dma_rings(struct velocity_info *vptr)
1674 {
1675 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1676 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1677
1678 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1679 }
1680
1681
1682 static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1683 {
1684 int ret;
1685
1686 velocity_set_rxbufsize(vptr, mtu);
1687
1688 ret = velocity_init_dma_rings(vptr);
1689 if (ret < 0)
1690 goto out;
1691
1692 ret = velocity_init_rd_ring(vptr);
1693 if (ret < 0)
1694 goto err_free_dma_rings_0;
1695
1696 ret = velocity_init_td_ring(vptr);
1697 if (ret < 0)
1698 goto err_free_rd_ring_1;
1699 out:
1700 return ret;
1701
1702 err_free_rd_ring_1:
1703 velocity_free_rd_ring(vptr);
1704 err_free_dma_rings_0:
1705 velocity_free_dma_rings(vptr);
1706 goto out;
1707 }
1708
1709 /**
1710 * velocity_free_tx_buf - free transmit buffer
1711 * @vptr: velocity
1712 * @tdinfo: buffer
1713 *
1714 * Release an transmit buffer. If the buffer was preallocated then
1715 * recycle it, if not then unmap the buffer.
1716 */
1717 static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1718 {
1719 struct sk_buff *skb = tdinfo->skb;
1720 int i;
1721 int pktlen;
1722
1723 /*
1724 * Don't unmap the pre-allocated tx_bufs
1725 */
1726 if (tdinfo->skb_dma) {
1727
1728 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
1729 for (i = 0; i < tdinfo->nskb_dma; i++) {
1730 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
1731 tdinfo->skb_dma[i] = 0;
1732 }
1733 }
1734 dev_kfree_skb_irq(skb);
1735 tdinfo->skb = NULL;
1736 }
1737
1738
1739 /*
1740 * FIXME: could we merge this with velocity_free_tx_buf ?
1741 */
1742 static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1743 int q, int n)
1744 {
1745 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1746 int i;
1747
1748 if (td_info == NULL)
1749 return;
1750
1751 if (td_info->skb) {
1752 for (i = 0; i < td_info->nskb_dma; i++) {
1753 if (td_info->skb_dma[i]) {
1754 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1755 td_info->skb->len, PCI_DMA_TODEVICE);
1756 td_info->skb_dma[i] = 0;
1757 }
1758 }
1759 dev_kfree_skb(td_info->skb);
1760 td_info->skb = NULL;
1761 }
1762 }
1763
1764 /**
1765 * velocity_free_td_ring - free td ring
1766 * @vptr: velocity
1767 *
1768 * Free up the transmit ring for this particular velocity adapter.
1769 * We free the ring contents but not the ring itself.
1770 */
1771 static void velocity_free_td_ring(struct velocity_info *vptr)
1772 {
1773 int i, j;
1774
1775 for (j = 0; j < vptr->tx.numq; j++) {
1776 if (vptr->tx.infos[j] == NULL)
1777 continue;
1778 for (i = 0; i < vptr->options.numtx; i++)
1779 velocity_free_td_ring_entry(vptr, j, i);
1780
1781 kfree(vptr->tx.infos[j]);
1782 vptr->tx.infos[j] = NULL;
1783 }
1784 }
1785
1786
1787 static void velocity_free_rings(struct velocity_info *vptr)
1788 {
1789 velocity_free_td_ring(vptr);
1790 velocity_free_rd_ring(vptr);
1791 velocity_free_dma_rings(vptr);
1792 }
1793
1794 /**
1795 * velocity_error - handle error from controller
1796 * @vptr: velocity
1797 * @status: card status
1798 *
1799 * Process an error report from the hardware and attempt to recover
1800 * the card itself. At the moment we cannot recover from some
1801 * theoretically impossible errors but this could be fixed using
1802 * the pci_device_failed logic to bounce the hardware
1803 *
1804 */
1805 static void velocity_error(struct velocity_info *vptr, int status)
1806 {
1807
1808 if (status & ISR_TXSTLI) {
1809 struct mac_regs __iomem *regs = vptr->mac_regs;
1810
1811 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1812 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1813 writew(TRDCSR_RUN, &regs->TDCSRClr);
1814 netif_stop_queue(vptr->dev);
1815
1816 /* FIXME: port over the pci_device_failed code and use it
1817 here */
1818 }
1819
1820 if (status & ISR_SRCI) {
1821 struct mac_regs __iomem *regs = vptr->mac_regs;
1822 int linked;
1823
1824 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1825 vptr->mii_status = check_connection_type(regs);
1826
1827 /*
1828 * If it is a 3119, disable frame bursting in
1829 * halfduplex mode and enable it in fullduplex
1830 * mode
1831 */
1832 if (vptr->rev_id < REV_ID_VT3216_A0) {
1833 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1834 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1835 else
1836 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1837 }
1838 /*
1839 * Only enable CD heart beat counter in 10HD mode
1840 */
1841 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1842 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1843 else
1844 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1845
1846 setup_queue_timers(vptr);
1847 }
1848 /*
1849 * Get link status from PHYSR0
1850 */
1851 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1852
1853 if (linked) {
1854 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
1855 netif_carrier_on(vptr->dev);
1856 } else {
1857 vptr->mii_status |= VELOCITY_LINK_FAIL;
1858 netif_carrier_off(vptr->dev);
1859 }
1860
1861 velocity_print_link_status(vptr);
1862 enable_flow_control_ability(vptr);
1863
1864 /*
1865 * Re-enable auto-polling because SRCI will disable
1866 * auto-polling
1867 */
1868
1869 enable_mii_autopoll(regs);
1870
1871 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1872 netif_stop_queue(vptr->dev);
1873 else
1874 netif_wake_queue(vptr->dev);
1875
1876 };
1877 if (status & ISR_MIBFI)
1878 velocity_update_hw_mibs(vptr);
1879 if (status & ISR_LSTEI)
1880 mac_rx_queue_wake(vptr->mac_regs);
1881 }
1882
1883 /**
1884 * tx_srv - transmit interrupt service
1885 * @vptr; Velocity
1886 * @status:
1887 *
1888 * Scan the queues looking for transmitted packets that
1889 * we can complete and clean up. Update any statistics as
1890 * necessary/
1891 */
1892 static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1893 {
1894 struct tx_desc *td;
1895 int qnum;
1896 int full = 0;
1897 int idx;
1898 int works = 0;
1899 struct velocity_td_info *tdinfo;
1900 struct net_device_stats *stats = &vptr->dev->stats;
1901
1902 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1903 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1904 idx = (idx + 1) % vptr->options.numtx) {
1905
1906 /*
1907 * Get Tx Descriptor
1908 */
1909 td = &(vptr->tx.rings[qnum][idx]);
1910 tdinfo = &(vptr->tx.infos[qnum][idx]);
1911
1912 if (td->tdesc0.len & OWNED_BY_NIC)
1913 break;
1914
1915 if ((works++ > 15))
1916 break;
1917
1918 if (td->tdesc0.TSR & TSR0_TERR) {
1919 stats->tx_errors++;
1920 stats->tx_dropped++;
1921 if (td->tdesc0.TSR & TSR0_CDH)
1922 stats->tx_heartbeat_errors++;
1923 if (td->tdesc0.TSR & TSR0_CRS)
1924 stats->tx_carrier_errors++;
1925 if (td->tdesc0.TSR & TSR0_ABT)
1926 stats->tx_aborted_errors++;
1927 if (td->tdesc0.TSR & TSR0_OWC)
1928 stats->tx_window_errors++;
1929 } else {
1930 stats->tx_packets++;
1931 stats->tx_bytes += tdinfo->skb->len;
1932 }
1933 velocity_free_tx_buf(vptr, tdinfo);
1934 vptr->tx.used[qnum]--;
1935 }
1936 vptr->tx.tail[qnum] = idx;
1937
1938 if (AVAIL_TD(vptr, qnum) < 1)
1939 full = 1;
1940 }
1941 /*
1942 * Look to see if we should kick the transmit network
1943 * layer for more work.
1944 */
1945 if (netif_queue_stopped(vptr->dev) && (full == 0)
1946 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1947 netif_wake_queue(vptr->dev);
1948 }
1949 return works;
1950 }
1951
1952 /**
1953 * velocity_rx_csum - checksum process
1954 * @rd: receive packet descriptor
1955 * @skb: network layer packet buffer
1956 *
1957 * Process the status bits for the received packet and determine
1958 * if the checksum was computed and verified by the hardware
1959 */
1960 static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1961 {
1962 skb->ip_summed = CHECKSUM_NONE;
1963
1964 if (rd->rdesc1.CSM & CSM_IPKT) {
1965 if (rd->rdesc1.CSM & CSM_IPOK) {
1966 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1967 (rd->rdesc1.CSM & CSM_UDPKT)) {
1968 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1969 return;
1970 }
1971 skb->ip_summed = CHECKSUM_UNNECESSARY;
1972 }
1973 }
1974 }
1975
1976 /**
1977 * velocity_rx_copy - in place Rx copy for small packets
1978 * @rx_skb: network layer packet buffer candidate
1979 * @pkt_size: received data size
1980 * @rd: receive packet descriptor
1981 * @dev: network device
1982 *
1983 * Replace the current skb that is scheduled for Rx processing by a
1984 * shorter, immediatly allocated skb, if the received packet is small
1985 * enough. This function returns a negative value if the received
1986 * packet is too big or if memory is exhausted.
1987 */
1988 static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1989 struct velocity_info *vptr)
1990 {
1991 int ret = -1;
1992 if (pkt_size < rx_copybreak) {
1993 struct sk_buff *new_skb;
1994
1995 new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
1996 if (new_skb) {
1997 new_skb->ip_summed = rx_skb[0]->ip_summed;
1998 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1999 *rx_skb = new_skb;
2000 ret = 0;
2001 }
2002
2003 }
2004 return ret;
2005 }
2006
2007 /**
2008 * velocity_iph_realign - IP header alignment
2009 * @vptr: velocity we are handling
2010 * @skb: network layer packet buffer
2011 * @pkt_size: received data size
2012 *
2013 * Align IP header on a 2 bytes boundary. This behavior can be
2014 * configured by the user.
2015 */
2016 static inline void velocity_iph_realign(struct velocity_info *vptr,
2017 struct sk_buff *skb, int pkt_size)
2018 {
2019 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
2020 memmove(skb->data + 2, skb->data, pkt_size);
2021 skb_reserve(skb, 2);
2022 }
2023 }
2024
2025
2026 /**
2027 * velocity_receive_frame - received packet processor
2028 * @vptr: velocity we are handling
2029 * @idx: ring index
2030 *
2031 * A packet has arrived. We process the packet and if appropriate
2032 * pass the frame up the network stack
2033 */
2034 static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2035 {
2036 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
2037 struct net_device_stats *stats = &vptr->dev->stats;
2038 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
2039 struct rx_desc *rd = &(vptr->rx.ring[idx]);
2040 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
2041 struct sk_buff *skb;
2042
2043 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
2044 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
2045 stats->rx_length_errors++;
2046 return -EINVAL;
2047 }
2048
2049 if (rd->rdesc0.RSR & RSR_MAR)
2050 stats->multicast++;
2051
2052 skb = rd_info->skb;
2053
2054 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
2055 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
2056
2057 /*
2058 * Drop frame not meeting IEEE 802.3
2059 */
2060
2061 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
2062 if (rd->rdesc0.RSR & RSR_RL) {
2063 stats->rx_length_errors++;
2064 return -EINVAL;
2065 }
2066 }
2067
2068 pci_action = pci_dma_sync_single_for_device;
2069
2070 velocity_rx_csum(rd, skb);
2071
2072 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2073 velocity_iph_realign(vptr, skb, pkt_len);
2074 pci_action = pci_unmap_single;
2075 rd_info->skb = NULL;
2076 }
2077
2078 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
2079 PCI_DMA_FROMDEVICE);
2080
2081 skb_put(skb, pkt_len - 4);
2082 skb->protocol = eth_type_trans(skb, vptr->dev);
2083
2084 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
2085 vlan_hwaccel_rx(skb, vptr->vlgrp,
2086 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
2087 } else
2088 netif_rx(skb);
2089
2090 stats->rx_bytes += pkt_len;
2091
2092 return 0;
2093 }
2094
2095
2096 /**
2097 * velocity_rx_srv - service RX interrupt
2098 * @vptr: velocity
2099 * @status: adapter status (unused)
2100 *
2101 * Walk the receive ring of the velocity adapter and remove
2102 * any received packets from the receive queue. Hand the ring
2103 * slots back to the adapter for reuse.
2104 */
2105 static int velocity_rx_srv(struct velocity_info *vptr, int status,
2106 int budget_left)
2107 {
2108 struct net_device_stats *stats = &vptr->dev->stats;
2109 int rd_curr = vptr->rx.curr;
2110 int works = 0;
2111
2112 while (works < budget_left) {
2113 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2114
2115 if (!vptr->rx.info[rd_curr].skb)
2116 break;
2117
2118 if (rd->rdesc0.len & OWNED_BY_NIC)
2119 break;
2120
2121 rmb();
2122
2123 /*
2124 * Don't drop CE or RL error frame although RXOK is off
2125 */
2126 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2127 if (velocity_receive_frame(vptr, rd_curr) < 0)
2128 stats->rx_dropped++;
2129 } else {
2130 if (rd->rdesc0.RSR & RSR_CRC)
2131 stats->rx_crc_errors++;
2132 if (rd->rdesc0.RSR & RSR_FAE)
2133 stats->rx_frame_errors++;
2134
2135 stats->rx_dropped++;
2136 }
2137
2138 rd->size |= RX_INTEN;
2139
2140 rd_curr++;
2141 if (rd_curr >= vptr->options.numrx)
2142 rd_curr = 0;
2143 works++;
2144 }
2145
2146 vptr->rx.curr = rd_curr;
2147
2148 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2149 velocity_give_many_rx_descs(vptr);
2150
2151 VAR_USED(stats);
2152 return works;
2153 }
2154
2155 static int velocity_poll(struct napi_struct *napi, int budget)
2156 {
2157 struct velocity_info *vptr = container_of(napi,
2158 struct velocity_info, napi);
2159 unsigned int rx_done;
2160 u32 isr_status;
2161
2162 spin_lock(&vptr->lock);
2163 isr_status = mac_read_isr(vptr->mac_regs);
2164
2165 /* Ack the interrupt */
2166 mac_write_isr(vptr->mac_regs, isr_status);
2167 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2168 velocity_error(vptr, isr_status);
2169
2170 /*
2171 * Do rx and tx twice for performance (taken from the VIA
2172 * out-of-tree driver).
2173 */
2174 rx_done = velocity_rx_srv(vptr, isr_status, budget / 2);
2175 velocity_tx_srv(vptr, isr_status);
2176 rx_done += velocity_rx_srv(vptr, isr_status, budget - rx_done);
2177 velocity_tx_srv(vptr, isr_status);
2178
2179 spin_unlock(&vptr->lock);
2180
2181 /* If budget not fully consumed, exit the polling mode */
2182 if (rx_done < budget) {
2183 napi_complete(napi);
2184 mac_enable_int(vptr->mac_regs);
2185 }
2186
2187 return rx_done;
2188 }
2189
2190 /**
2191 * velocity_intr - interrupt callback
2192 * @irq: interrupt number
2193 * @dev_instance: interrupting device
2194 *
2195 * Called whenever an interrupt is generated by the velocity
2196 * adapter IRQ line. We may not be the source of the interrupt
2197 * and need to identify initially if we are, and if not exit as
2198 * efficiently as possible.
2199 */
2200 static irqreturn_t velocity_intr(int irq, void *dev_instance)
2201 {
2202 struct net_device *dev = dev_instance;
2203 struct velocity_info *vptr = netdev_priv(dev);
2204 u32 isr_status;
2205
2206 spin_lock(&vptr->lock);
2207 isr_status = mac_read_isr(vptr->mac_regs);
2208
2209 /* Not us ? */
2210 if (isr_status == 0) {
2211 spin_unlock(&vptr->lock);
2212 return IRQ_NONE;
2213 }
2214
2215 if (likely(napi_schedule_prep(&vptr->napi))) {
2216 mac_disable_int(vptr->mac_regs);
2217 __napi_schedule(&vptr->napi);
2218 }
2219 spin_unlock(&vptr->lock);
2220
2221 return IRQ_HANDLED;
2222 }
2223
2224 /**
2225 * velocity_open - interface activation callback
2226 * @dev: network layer device to open
2227 *
2228 * Called when the network layer brings the interface up. Returns
2229 * a negative posix error code on failure, or zero on success.
2230 *
2231 * All the ring allocation and set up is done on open for this
2232 * adapter to minimise memory usage when inactive
2233 */
2234 static int velocity_open(struct net_device *dev)
2235 {
2236 struct velocity_info *vptr = netdev_priv(dev);
2237 int ret;
2238
2239 ret = velocity_init_rings(vptr, dev->mtu);
2240 if (ret < 0)
2241 goto out;
2242
2243 /* Ensure chip is running */
2244 pci_set_power_state(vptr->pdev, PCI_D0);
2245
2246 velocity_give_many_rx_descs(vptr);
2247
2248 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2249
2250 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
2251 dev->name, dev);
2252 if (ret < 0) {
2253 /* Power down the chip */
2254 pci_set_power_state(vptr->pdev, PCI_D3hot);
2255 velocity_free_rings(vptr);
2256 goto out;
2257 }
2258
2259 mac_enable_int(vptr->mac_regs);
2260 netif_start_queue(dev);
2261 napi_enable(&vptr->napi);
2262 vptr->flags |= VELOCITY_FLAGS_OPENED;
2263 out:
2264 return ret;
2265 }
2266
2267 /**
2268 * velocity_shutdown - shut down the chip
2269 * @vptr: velocity to deactivate
2270 *
2271 * Shuts down the internal operations of the velocity and
2272 * disables interrupts, autopolling, transmit and receive
2273 */
2274 static void velocity_shutdown(struct velocity_info *vptr)
2275 {
2276 struct mac_regs __iomem *regs = vptr->mac_regs;
2277 mac_disable_int(regs);
2278 writel(CR0_STOP, &regs->CR0Set);
2279 writew(0xFFFF, &regs->TDCSRClr);
2280 writeb(0xFF, &regs->RDCSRClr);
2281 safe_disable_mii_autopoll(regs);
2282 mac_clear_isr(regs);
2283 }
2284
2285 /**
2286 * velocity_change_mtu - MTU change callback
2287 * @dev: network device
2288 * @new_mtu: desired MTU
2289 *
2290 * Handle requests from the networking layer for MTU change on
2291 * this interface. It gets called on a change by the network layer.
2292 * Return zero for success or negative posix error code.
2293 */
2294 static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2295 {
2296 struct velocity_info *vptr = netdev_priv(dev);
2297 int ret = 0;
2298
2299 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2300 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
2301 vptr->dev->name);
2302 ret = -EINVAL;
2303 goto out_0;
2304 }
2305
2306 if (!netif_running(dev)) {
2307 dev->mtu = new_mtu;
2308 goto out_0;
2309 }
2310
2311 if (dev->mtu != new_mtu) {
2312 struct velocity_info *tmp_vptr;
2313 unsigned long flags;
2314 struct rx_info rx;
2315 struct tx_info tx;
2316
2317 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2318 if (!tmp_vptr) {
2319 ret = -ENOMEM;
2320 goto out_0;
2321 }
2322
2323 tmp_vptr->dev = dev;
2324 tmp_vptr->pdev = vptr->pdev;
2325 tmp_vptr->options = vptr->options;
2326 tmp_vptr->tx.numq = vptr->tx.numq;
2327
2328 ret = velocity_init_rings(tmp_vptr, new_mtu);
2329 if (ret < 0)
2330 goto out_free_tmp_vptr_1;
2331
2332 spin_lock_irqsave(&vptr->lock, flags);
2333
2334 netif_stop_queue(dev);
2335 velocity_shutdown(vptr);
2336
2337 rx = vptr->rx;
2338 tx = vptr->tx;
2339
2340 vptr->rx = tmp_vptr->rx;
2341 vptr->tx = tmp_vptr->tx;
2342
2343 tmp_vptr->rx = rx;
2344 tmp_vptr->tx = tx;
2345
2346 dev->mtu = new_mtu;
2347
2348 velocity_give_many_rx_descs(vptr);
2349
2350 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2351
2352 mac_enable_int(vptr->mac_regs);
2353 netif_start_queue(dev);
2354
2355 spin_unlock_irqrestore(&vptr->lock, flags);
2356
2357 velocity_free_rings(tmp_vptr);
2358
2359 out_free_tmp_vptr_1:
2360 kfree(tmp_vptr);
2361 }
2362 out_0:
2363 return ret;
2364 }
2365
2366 /**
2367 * velocity_mii_ioctl - MII ioctl handler
2368 * @dev: network device
2369 * @ifr: the ifreq block for the ioctl
2370 * @cmd: the command
2371 *
2372 * Process MII requests made via ioctl from the network layer. These
2373 * are used by tools like kudzu to interrogate the link state of the
2374 * hardware
2375 */
2376 static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2377 {
2378 struct velocity_info *vptr = netdev_priv(dev);
2379 struct mac_regs __iomem *regs = vptr->mac_regs;
2380 unsigned long flags;
2381 struct mii_ioctl_data *miidata = if_mii(ifr);
2382 int err;
2383
2384 switch (cmd) {
2385 case SIOCGMIIPHY:
2386 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
2387 break;
2388 case SIOCGMIIREG:
2389 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2390 return -ETIMEDOUT;
2391 break;
2392 case SIOCSMIIREG:
2393 spin_lock_irqsave(&vptr->lock, flags);
2394 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2395 spin_unlock_irqrestore(&vptr->lock, flags);
2396 check_connection_type(vptr->mac_regs);
2397 if (err)
2398 return err;
2399 break;
2400 default:
2401 return -EOPNOTSUPP;
2402 }
2403 return 0;
2404 }
2405
2406
2407 /**
2408 * velocity_ioctl - ioctl entry point
2409 * @dev: network device
2410 * @rq: interface request ioctl
2411 * @cmd: command code
2412 *
2413 * Called when the user issues an ioctl request to the network
2414 * device in question. The velocity interface supports MII.
2415 */
2416 static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2417 {
2418 struct velocity_info *vptr = netdev_priv(dev);
2419 int ret;
2420
2421 /* If we are asked for information and the device is power
2422 saving then we need to bring the device back up to talk to it */
2423
2424 if (!netif_running(dev))
2425 pci_set_power_state(vptr->pdev, PCI_D0);
2426
2427 switch (cmd) {
2428 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2429 case SIOCGMIIREG: /* Read MII PHY register. */
2430 case SIOCSMIIREG: /* Write to MII PHY register. */
2431 ret = velocity_mii_ioctl(dev, rq, cmd);
2432 break;
2433
2434 default:
2435 ret = -EOPNOTSUPP;
2436 }
2437 if (!netif_running(dev))
2438 pci_set_power_state(vptr->pdev, PCI_D3hot);
2439
2440
2441 return ret;
2442 }
2443
2444 /**
2445 * velocity_get_status - statistics callback
2446 * @dev: network device
2447 *
2448 * Callback from the network layer to allow driver statistics
2449 * to be resynchronized with hardware collected state. In the
2450 * case of the velocity we need to pull the MIB counters from
2451 * the hardware into the counters before letting the network
2452 * layer display them.
2453 */
2454 static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2455 {
2456 struct velocity_info *vptr = netdev_priv(dev);
2457
2458 /* If the hardware is down, don't touch MII */
2459 if (!netif_running(dev))
2460 return &dev->stats;
2461
2462 spin_lock_irq(&vptr->lock);
2463 velocity_update_hw_mibs(vptr);
2464 spin_unlock_irq(&vptr->lock);
2465
2466 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2467 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2468 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2469
2470 // unsigned long rx_dropped; /* no space in linux buffers */
2471 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2472 /* detailed rx_errors: */
2473 // unsigned long rx_length_errors;
2474 // unsigned long rx_over_errors; /* receiver ring buff overflow */
2475 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2476 // unsigned long rx_frame_errors; /* recv'd frame alignment error */
2477 // unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2478 // unsigned long rx_missed_errors; /* receiver missed packet */
2479
2480 /* detailed tx_errors */
2481 // unsigned long tx_fifo_errors;
2482
2483 return &dev->stats;
2484 }
2485
2486 /**
2487 * velocity_close - close adapter callback
2488 * @dev: network device
2489 *
2490 * Callback from the network layer when the velocity is being
2491 * deactivated by the network layer
2492 */
2493 static int velocity_close(struct net_device *dev)
2494 {
2495 struct velocity_info *vptr = netdev_priv(dev);
2496
2497 napi_disable(&vptr->napi);
2498 netif_stop_queue(dev);
2499 velocity_shutdown(vptr);
2500
2501 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2502 velocity_get_ip(vptr);
2503 if (dev->irq != 0)
2504 free_irq(dev->irq, dev);
2505
2506 /* Power down the chip */
2507 pci_set_power_state(vptr->pdev, PCI_D3hot);
2508
2509 velocity_free_rings(vptr);
2510
2511 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2512 return 0;
2513 }
2514
2515 /**
2516 * velocity_xmit - transmit packet callback
2517 * @skb: buffer to transmit
2518 * @dev: network device
2519 *
2520 * Called by the networ layer to request a packet is queued to
2521 * the velocity. Returns zero on success.
2522 */
2523 static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2524 struct net_device *dev)
2525 {
2526 struct velocity_info *vptr = netdev_priv(dev);
2527 int qnum = 0;
2528 struct tx_desc *td_ptr;
2529 struct velocity_td_info *tdinfo;
2530 unsigned long flags;
2531 int pktlen;
2532 __le16 len;
2533 int index;
2534
2535 if (skb_padto(skb, ETH_ZLEN))
2536 goto out;
2537 pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
2538
2539 len = cpu_to_le16(pktlen);
2540
2541 spin_lock_irqsave(&vptr->lock, flags);
2542
2543 index = vptr->tx.curr[qnum];
2544 td_ptr = &(vptr->tx.rings[qnum][index]);
2545 tdinfo = &(vptr->tx.infos[qnum][index]);
2546
2547 td_ptr->tdesc1.TCR = TCR0_TIC;
2548 td_ptr->td_buf[0].size &= ~TD_QUEUE;
2549
2550 /*
2551 * Map the linear network buffer into PCI space and
2552 * add it to the transmit ring.
2553 */
2554 tdinfo->skb = skb;
2555 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
2556 td_ptr->tdesc0.len = len;
2557 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2558 td_ptr->td_buf[0].pa_high = 0;
2559 td_ptr->td_buf[0].size = len;
2560 tdinfo->nskb_dma = 1;
2561
2562 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2563
2564 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
2565 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2566 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2567 }
2568
2569 /*
2570 * Handle hardware checksum
2571 */
2572 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2573 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
2574 const struct iphdr *ip = ip_hdr(skb);
2575 if (ip->protocol == IPPROTO_TCP)
2576 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2577 else if (ip->protocol == IPPROTO_UDP)
2578 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2579 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2580 }
2581 {
2582
2583 int prev = index - 1;
2584
2585 if (prev < 0)
2586 prev = vptr->options.numtx - 1;
2587 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2588 vptr->tx.used[qnum]++;
2589 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
2590
2591 if (AVAIL_TD(vptr, qnum) < 1)
2592 netif_stop_queue(dev);
2593
2594 td_ptr = &(vptr->tx.rings[qnum][prev]);
2595 td_ptr->td_buf[0].size |= TD_QUEUE;
2596 mac_tx_queue_wake(vptr->mac_regs, qnum);
2597 }
2598 dev->trans_start = jiffies;
2599 spin_unlock_irqrestore(&vptr->lock, flags);
2600 out:
2601 return NETDEV_TX_OK;
2602 }
2603
2604
2605 static const struct net_device_ops velocity_netdev_ops = {
2606 .ndo_open = velocity_open,
2607 .ndo_stop = velocity_close,
2608 .ndo_start_xmit = velocity_xmit,
2609 .ndo_get_stats = velocity_get_stats,
2610 .ndo_validate_addr = eth_validate_addr,
2611 .ndo_set_mac_address = eth_mac_addr,
2612 .ndo_set_multicast_list = velocity_set_multi,
2613 .ndo_change_mtu = velocity_change_mtu,
2614 .ndo_do_ioctl = velocity_ioctl,
2615 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2616 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
2617 .ndo_vlan_rx_register = velocity_vlan_rx_register,
2618 };
2619
2620 /**
2621 * velocity_init_info - init private data
2622 * @pdev: PCI device
2623 * @vptr: Velocity info
2624 * @info: Board type
2625 *
2626 * Set up the initial velocity_info struct for the device that has been
2627 * discovered.
2628 */
2629 static void __devinit velocity_init_info(struct pci_dev *pdev,
2630 struct velocity_info *vptr,
2631 const struct velocity_info_tbl *info)
2632 {
2633 memset(vptr, 0, sizeof(struct velocity_info));
2634
2635 vptr->pdev = pdev;
2636 vptr->chip_id = info->chip_id;
2637 vptr->tx.numq = info->txqueue;
2638 vptr->multicast_limit = MCAM_SIZE;
2639 spin_lock_init(&vptr->lock);
2640 }
2641
2642 /**
2643 * velocity_get_pci_info - retrieve PCI info for device
2644 * @vptr: velocity device
2645 * @pdev: PCI device it matches
2646 *
2647 * Retrieve the PCI configuration space data that interests us from
2648 * the kernel PCI layer
2649 */
2650 static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
2651 {
2652 vptr->rev_id = pdev->revision;
2653
2654 pci_set_master(pdev);
2655
2656 vptr->ioaddr = pci_resource_start(pdev, 0);
2657 vptr->memaddr = pci_resource_start(pdev, 1);
2658
2659 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2660 dev_err(&pdev->dev,
2661 "region #0 is not an I/O resource, aborting.\n");
2662 return -EINVAL;
2663 }
2664
2665 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2666 dev_err(&pdev->dev,
2667 "region #1 is an I/O resource, aborting.\n");
2668 return -EINVAL;
2669 }
2670
2671 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2672 dev_err(&pdev->dev, "region #1 is too small.\n");
2673 return -EINVAL;
2674 }
2675 vptr->pdev = pdev;
2676
2677 return 0;
2678 }
2679
2680 /**
2681 * velocity_print_info - per driver data
2682 * @vptr: velocity
2683 *
2684 * Print per driver data as the kernel driver finds Velocity
2685 * hardware
2686 */
2687 static void __devinit velocity_print_info(struct velocity_info *vptr)
2688 {
2689 struct net_device *dev = vptr->dev;
2690
2691 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
2692 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
2693 dev->name,
2694 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
2695 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
2696 }
2697
2698 static u32 velocity_get_link(struct net_device *dev)
2699 {
2700 struct velocity_info *vptr = netdev_priv(dev);
2701 struct mac_regs __iomem *regs = vptr->mac_regs;
2702 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
2703 }
2704
2705
2706 /**
2707 * velocity_found1 - set up discovered velocity card
2708 * @pdev: PCI device
2709 * @ent: PCI device table entry that matched
2710 *
2711 * Configure a discovered adapter from scratch. Return a negative
2712 * errno error code on failure paths.
2713 */
2714 static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
2715 {
2716 static int first = 1;
2717 struct net_device *dev;
2718 int i;
2719 const char *drv_string;
2720 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
2721 struct velocity_info *vptr;
2722 struct mac_regs __iomem *regs;
2723 int ret = -ENOMEM;
2724
2725 /* FIXME: this driver, like almost all other ethernet drivers,
2726 * can support more than MAX_UNITS.
2727 */
2728 if (velocity_nics >= MAX_UNITS) {
2729 dev_notice(&pdev->dev, "already found %d NICs.\n",
2730 velocity_nics);
2731 return -ENODEV;
2732 }
2733
2734 dev = alloc_etherdev(sizeof(struct velocity_info));
2735 if (!dev) {
2736 dev_err(&pdev->dev, "allocate net device failed.\n");
2737 goto out;
2738 }
2739
2740 /* Chain it all together */
2741
2742 SET_NETDEV_DEV(dev, &pdev->dev);
2743 vptr = netdev_priv(dev);
2744
2745
2746 if (first) {
2747 printk(KERN_INFO "%s Ver. %s\n",
2748 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2749 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2750 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2751 first = 0;
2752 }
2753
2754 velocity_init_info(pdev, vptr, info);
2755
2756 vptr->dev = dev;
2757
2758 dev->irq = pdev->irq;
2759
2760 ret = pci_enable_device(pdev);
2761 if (ret < 0)
2762 goto err_free_dev;
2763
2764 ret = velocity_get_pci_info(vptr, pdev);
2765 if (ret < 0) {
2766 /* error message already printed */
2767 goto err_disable;
2768 }
2769
2770 ret = pci_request_regions(pdev, VELOCITY_NAME);
2771 if (ret < 0) {
2772 dev_err(&pdev->dev, "No PCI resources.\n");
2773 goto err_disable;
2774 }
2775
2776 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2777 if (regs == NULL) {
2778 ret = -EIO;
2779 goto err_release_res;
2780 }
2781
2782 vptr->mac_regs = regs;
2783
2784 mac_wol_reset(regs);
2785
2786 dev->base_addr = vptr->ioaddr;
2787
2788 for (i = 0; i < 6; i++)
2789 dev->dev_addr[i] = readb(&regs->PAR[i]);
2790
2791
2792 drv_string = dev_driver_string(&pdev->dev);
2793
2794 velocity_get_options(&vptr->options, velocity_nics, drv_string);
2795
2796 /*
2797 * Mask out the options cannot be set to the chip
2798 */
2799
2800 vptr->options.flags &= info->flags;
2801
2802 /*
2803 * Enable the chip specified capbilities
2804 */
2805
2806 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
2807
2808 vptr->wol_opts = vptr->options.wol_opts;
2809 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
2810
2811 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2812
2813 dev->irq = pdev->irq;
2814 dev->netdev_ops = &velocity_netdev_ops;
2815 dev->ethtool_ops = &velocity_ethtool_ops;
2816 netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
2817
2818 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
2819 NETIF_F_HW_VLAN_RX;
2820
2821 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
2822 dev->features |= NETIF_F_IP_CSUM;
2823
2824 ret = register_netdev(dev);
2825 if (ret < 0)
2826 goto err_iounmap;
2827
2828 if (!velocity_get_link(dev)) {
2829 netif_carrier_off(dev);
2830 vptr->mii_status |= VELOCITY_LINK_FAIL;
2831 }
2832
2833 velocity_print_info(vptr);
2834 pci_set_drvdata(pdev, dev);
2835
2836 /* and leave the chip powered down */
2837
2838 pci_set_power_state(pdev, PCI_D3hot);
2839 velocity_nics++;
2840 out:
2841 return ret;
2842
2843 err_iounmap:
2844 iounmap(regs);
2845 err_release_res:
2846 pci_release_regions(pdev);
2847 err_disable:
2848 pci_disable_device(pdev);
2849 err_free_dev:
2850 free_netdev(dev);
2851 goto out;
2852 }
2853
2854
2855 #ifdef CONFIG_PM
2856 /**
2857 * wol_calc_crc - WOL CRC
2858 * @pattern: data pattern
2859 * @mask_pattern: mask
2860 *
2861 * Compute the wake on lan crc hashes for the packet header
2862 * we are interested in.
2863 */
2864 static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
2865 {
2866 u16 crc = 0xFFFF;
2867 u8 mask;
2868 int i, j;
2869
2870 for (i = 0; i < size; i++) {
2871 mask = mask_pattern[i];
2872
2873 /* Skip this loop if the mask equals to zero */
2874 if (mask == 0x00)
2875 continue;
2876
2877 for (j = 0; j < 8; j++) {
2878 if ((mask & 0x01) == 0) {
2879 mask >>= 1;
2880 continue;
2881 }
2882 mask >>= 1;
2883 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
2884 }
2885 }
2886 /* Finally, invert the result once to get the correct data */
2887 crc = ~crc;
2888 return bitrev32(crc) >> 16;
2889 }
2890
2891 /**
2892 * velocity_set_wol - set up for wake on lan
2893 * @vptr: velocity to set WOL status on
2894 *
2895 * Set a card up for wake on lan either by unicast or by
2896 * ARP packet.
2897 *
2898 * FIXME: check static buffer is safe here
2899 */
2900 static int velocity_set_wol(struct velocity_info *vptr)
2901 {
2902 struct mac_regs __iomem *regs = vptr->mac_regs;
2903 static u8 buf[256];
2904 int i;
2905
2906 static u32 mask_pattern[2][4] = {
2907 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
2908 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
2909 };
2910
2911 writew(0xFFFF, &regs->WOLCRClr);
2912 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
2913 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
2914
2915 /*
2916 if (vptr->wol_opts & VELOCITY_WOL_PHY)
2917 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
2918 */
2919
2920 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
2921 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
2922
2923 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
2924 struct arp_packet *arp = (struct arp_packet *) buf;
2925 u16 crc;
2926 memset(buf, 0, sizeof(struct arp_packet) + 7);
2927
2928 for (i = 0; i < 4; i++)
2929 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
2930
2931 arp->type = htons(ETH_P_ARP);
2932 arp->ar_op = htons(1);
2933
2934 memcpy(arp->ar_tip, vptr->ip_addr, 4);
2935
2936 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
2937 (u8 *) & mask_pattern[0][0]);
2938
2939 writew(crc, &regs->PatternCRC[0]);
2940 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
2941 }
2942
2943 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
2944 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
2945
2946 writew(0x0FFF, &regs->WOLSRClr);
2947
2948 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2949 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2950 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2951
2952 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2953 }
2954
2955 if (vptr->mii_status & VELOCITY_SPEED_1000)
2956 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2957
2958 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2959
2960 {
2961 u8 GCR;
2962 GCR = readb(&regs->CHIPGCR);
2963 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
2964 writeb(GCR, &regs->CHIPGCR);
2965 }
2966
2967 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2968 /* Turn on SWPTAG just before entering power mode */
2969 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
2970 /* Go to bed ..... */
2971 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
2972
2973 return 0;
2974 }
2975
2976 /**
2977 * velocity_save_context - save registers
2978 * @vptr: velocity
2979 * @context: buffer for stored context
2980 *
2981 * Retrieve the current configuration from the velocity hardware
2982 * and stash it in the context structure, for use by the context
2983 * restore functions. This allows us to save things we need across
2984 * power down states
2985 */
2986 static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
2987 {
2988 struct mac_regs __iomem *regs = vptr->mac_regs;
2989 u16 i;
2990 u8 __iomem *ptr = (u8 __iomem *)regs;
2991
2992 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
2993 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2994
2995 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
2996 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
2997
2998 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
2999 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3000
3001 }
3002
3003 static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3004 {
3005 struct net_device *dev = pci_get_drvdata(pdev);
3006 struct velocity_info *vptr = netdev_priv(dev);
3007 unsigned long flags;
3008
3009 if (!netif_running(vptr->dev))
3010 return 0;
3011
3012 netif_device_detach(vptr->dev);
3013
3014 spin_lock_irqsave(&vptr->lock, flags);
3015 pci_save_state(pdev);
3016 #ifdef ETHTOOL_GWOL
3017 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3018 velocity_get_ip(vptr);
3019 velocity_save_context(vptr, &vptr->context);
3020 velocity_shutdown(vptr);
3021 velocity_set_wol(vptr);
3022 pci_enable_wake(pdev, PCI_D3hot, 1);
3023 pci_set_power_state(pdev, PCI_D3hot);
3024 } else {
3025 velocity_save_context(vptr, &vptr->context);
3026 velocity_shutdown(vptr);
3027 pci_disable_device(pdev);
3028 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3029 }
3030 #else
3031 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3032 #endif
3033 spin_unlock_irqrestore(&vptr->lock, flags);
3034 return 0;
3035 }
3036
3037 /**
3038 * velocity_restore_context - restore registers
3039 * @vptr: velocity
3040 * @context: buffer for stored context
3041 *
3042 * Reload the register configuration from the velocity context
3043 * created by velocity_save_context.
3044 */
3045 static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3046 {
3047 struct mac_regs __iomem *regs = vptr->mac_regs;
3048 int i;
3049 u8 __iomem *ptr = (u8 __iomem *)regs;
3050
3051 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3052 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3053
3054 /* Just skip cr0 */
3055 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3056 /* Clear */
3057 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3058 /* Set */
3059 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3060 }
3061
3062 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3063 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3064
3065 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3066 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3067
3068 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3069 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3070 }
3071
3072 static int velocity_resume(struct pci_dev *pdev)
3073 {
3074 struct net_device *dev = pci_get_drvdata(pdev);
3075 struct velocity_info *vptr = netdev_priv(dev);
3076 unsigned long flags;
3077 int i;
3078
3079 if (!netif_running(vptr->dev))
3080 return 0;
3081
3082 pci_set_power_state(pdev, PCI_D0);
3083 pci_enable_wake(pdev, 0, 0);
3084 pci_restore_state(pdev);
3085
3086 mac_wol_reset(vptr->mac_regs);
3087
3088 spin_lock_irqsave(&vptr->lock, flags);
3089 velocity_restore_context(vptr, &vptr->context);
3090 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3091 mac_disable_int(vptr->mac_regs);
3092
3093 velocity_tx_srv(vptr, 0);
3094
3095 for (i = 0; i < vptr->tx.numq; i++) {
3096 if (vptr->tx.used[i])
3097 mac_tx_queue_wake(vptr->mac_regs, i);
3098 }
3099
3100 mac_enable_int(vptr->mac_regs);
3101 spin_unlock_irqrestore(&vptr->lock, flags);
3102 netif_device_attach(vptr->dev);
3103
3104 return 0;
3105 }
3106 #endif
3107
3108 /*
3109 * Definition for our device driver. The PCI layer interface
3110 * uses this to handle all our card discover and plugging
3111 */
3112 static struct pci_driver velocity_driver = {
3113 .name = VELOCITY_NAME,
3114 .id_table = velocity_id_table,
3115 .probe = velocity_found1,
3116 .remove = __devexit_p(velocity_remove1),
3117 #ifdef CONFIG_PM
3118 .suspend = velocity_suspend,
3119 .resume = velocity_resume,
3120 #endif
3121 };
3122
3123
3124 /**
3125 * velocity_ethtool_up - pre hook for ethtool
3126 * @dev: network device
3127 *
3128 * Called before an ethtool operation. We need to make sure the
3129 * chip is out of D3 state before we poke at it.
3130 */
3131 static int velocity_ethtool_up(struct net_device *dev)
3132 {
3133 struct velocity_info *vptr = netdev_priv(dev);
3134 if (!netif_running(dev))
3135 pci_set_power_state(vptr->pdev, PCI_D0);
3136 return 0;
3137 }
3138
3139 /**
3140 * velocity_ethtool_down - post hook for ethtool
3141 * @dev: network device
3142 *
3143 * Called after an ethtool operation. Restore the chip back to D3
3144 * state if it isn't running.
3145 */
3146 static void velocity_ethtool_down(struct net_device *dev)
3147 {
3148 struct velocity_info *vptr = netdev_priv(dev);
3149 if (!netif_running(dev))
3150 pci_set_power_state(vptr->pdev, PCI_D3hot);
3151 }
3152
3153 static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3154 {
3155 struct velocity_info *vptr = netdev_priv(dev);
3156 struct mac_regs __iomem *regs = vptr->mac_regs;
3157 u32 status;
3158 status = check_connection_type(vptr->mac_regs);
3159
3160 cmd->supported = SUPPORTED_TP |
3161 SUPPORTED_Autoneg |
3162 SUPPORTED_10baseT_Half |
3163 SUPPORTED_10baseT_Full |
3164 SUPPORTED_100baseT_Half |
3165 SUPPORTED_100baseT_Full |
3166 SUPPORTED_1000baseT_Half |
3167 SUPPORTED_1000baseT_Full;
3168 if (status & VELOCITY_SPEED_1000)
3169 cmd->speed = SPEED_1000;
3170 else if (status & VELOCITY_SPEED_100)
3171 cmd->speed = SPEED_100;
3172 else
3173 cmd->speed = SPEED_10;
3174 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3175 cmd->port = PORT_TP;
3176 cmd->transceiver = XCVR_INTERNAL;
3177 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3178
3179 if (status & VELOCITY_DUPLEX_FULL)
3180 cmd->duplex = DUPLEX_FULL;
3181 else
3182 cmd->duplex = DUPLEX_HALF;
3183
3184 return 0;
3185 }
3186
3187 static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3188 {
3189 struct velocity_info *vptr = netdev_priv(dev);
3190 u32 curr_status;
3191 u32 new_status = 0;
3192 int ret = 0;
3193
3194 curr_status = check_connection_type(vptr->mac_regs);
3195 curr_status &= (~VELOCITY_LINK_FAIL);
3196
3197 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3198 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3199 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3200 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3201
3202 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3203 ret = -EINVAL;
3204 else
3205 velocity_set_media_mode(vptr, new_status);
3206
3207 return ret;
3208 }
3209
3210 static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3211 {
3212 struct velocity_info *vptr = netdev_priv(dev);
3213 strcpy(info->driver, VELOCITY_NAME);
3214 strcpy(info->version, VELOCITY_VERSION);
3215 strcpy(info->bus_info, pci_name(vptr->pdev));
3216 }
3217
3218 static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3219 {
3220 struct velocity_info *vptr = netdev_priv(dev);
3221 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3222 wol->wolopts |= WAKE_MAGIC;
3223 /*
3224 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3225 wol.wolopts|=WAKE_PHY;
3226 */
3227 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3228 wol->wolopts |= WAKE_UCAST;
3229 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3230 wol->wolopts |= WAKE_ARP;
3231 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3232 }
3233
3234 static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3235 {
3236 struct velocity_info *vptr = netdev_priv(dev);
3237
3238 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3239 return -EFAULT;
3240 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3241
3242 /*
3243 if (wol.wolopts & WAKE_PHY) {
3244 vptr->wol_opts|=VELOCITY_WOL_PHY;
3245 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3246 }
3247 */
3248
3249 if (wol->wolopts & WAKE_MAGIC) {
3250 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3251 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3252 }
3253 if (wol->wolopts & WAKE_UCAST) {
3254 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3255 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3256 }
3257 if (wol->wolopts & WAKE_ARP) {
3258 vptr->wol_opts |= VELOCITY_WOL_ARP;
3259 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3260 }
3261 memcpy(vptr->wol_passwd, wol->sopass, 6);
3262 return 0;
3263 }
3264
3265 static u32 velocity_get_msglevel(struct net_device *dev)
3266 {
3267 return msglevel;
3268 }
3269
3270 static void velocity_set_msglevel(struct net_device *dev, u32 value)
3271 {
3272 msglevel = value;
3273 }
3274
3275 static int get_pending_timer_val(int val)
3276 {
3277 int mult_bits = val >> 6;
3278 int mult = 1;
3279
3280 switch (mult_bits)
3281 {
3282 case 1:
3283 mult = 4; break;
3284 case 2:
3285 mult = 16; break;
3286 case 3:
3287 mult = 64; break;
3288 case 0:
3289 default:
3290 break;
3291 }
3292
3293 return (val & 0x3f) * mult;
3294 }
3295
3296 static void set_pending_timer_val(int *val, u32 us)
3297 {
3298 u8 mult = 0;
3299 u8 shift = 0;
3300
3301 if (us >= 0x3f) {
3302 mult = 1; /* mult with 4 */
3303 shift = 2;
3304 }
3305 if (us >= 0x3f * 4) {
3306 mult = 2; /* mult with 16 */
3307 shift = 4;
3308 }
3309 if (us >= 0x3f * 16) {
3310 mult = 3; /* mult with 64 */
3311 shift = 6;
3312 }
3313
3314 *val = (mult << 6) | ((us >> shift) & 0x3f);
3315 }
3316
3317
3318 static int velocity_get_coalesce(struct net_device *dev,
3319 struct ethtool_coalesce *ecmd)
3320 {
3321 struct velocity_info *vptr = netdev_priv(dev);
3322
3323 ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
3324 ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
3325
3326 ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
3327 ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
3328
3329 return 0;
3330 }
3331
3332 static int velocity_set_coalesce(struct net_device *dev,
3333 struct ethtool_coalesce *ecmd)
3334 {
3335 struct velocity_info *vptr = netdev_priv(dev);
3336 int max_us = 0x3f * 64;
3337
3338 /* 6 bits of */
3339 if (ecmd->tx_coalesce_usecs > max_us)
3340 return -EINVAL;
3341 if (ecmd->rx_coalesce_usecs > max_us)
3342 return -EINVAL;
3343
3344 if (ecmd->tx_max_coalesced_frames > 0xff)
3345 return -EINVAL;
3346 if (ecmd->rx_max_coalesced_frames > 0xff)
3347 return -EINVAL;
3348
3349 vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
3350 vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
3351
3352 set_pending_timer_val(&vptr->options.rxqueue_timer,
3353 ecmd->rx_coalesce_usecs);
3354 set_pending_timer_val(&vptr->options.txqueue_timer,
3355 ecmd->tx_coalesce_usecs);
3356
3357 /* Setup the interrupt suppression and queue timers */
3358 mac_disable_int(vptr->mac_regs);
3359 setup_adaptive_interrupts(vptr);
3360 setup_queue_timers(vptr);
3361
3362 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3363 mac_clear_isr(vptr->mac_regs);
3364 mac_enable_int(vptr->mac_regs);
3365
3366 return 0;
3367 }
3368
3369 static const struct ethtool_ops velocity_ethtool_ops = {
3370 .get_settings = velocity_get_settings,
3371 .set_settings = velocity_set_settings,
3372 .get_drvinfo = velocity_get_drvinfo,
3373 .get_wol = velocity_ethtool_get_wol,
3374 .set_wol = velocity_ethtool_set_wol,
3375 .get_msglevel = velocity_get_msglevel,
3376 .set_msglevel = velocity_set_msglevel,
3377 .get_link = velocity_get_link,
3378 .get_coalesce = velocity_get_coalesce,
3379 .set_coalesce = velocity_set_coalesce,
3380 .begin = velocity_ethtool_up,
3381 .complete = velocity_ethtool_down
3382 };
3383
3384 #ifdef CONFIG_PM
3385 #ifdef CONFIG_INET
3386 static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3387 {
3388 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3389 struct net_device *dev = ifa->ifa_dev->dev;
3390
3391 if (dev_net(dev) == &init_net &&
3392 dev->netdev_ops == &velocity_netdev_ops)
3393 velocity_get_ip(netdev_priv(dev));
3394
3395 return NOTIFY_DONE;
3396 }
3397 #endif /* CONFIG_INET */
3398 #endif /* CONFIG_PM */
3399
3400 #if defined(CONFIG_PM) && defined(CONFIG_INET)
3401 static struct notifier_block velocity_inetaddr_notifier = {
3402 .notifier_call = velocity_netdev_event,
3403 };
3404
3405 static void velocity_register_notifier(void)
3406 {
3407 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3408 }
3409
3410 static void velocity_unregister_notifier(void)
3411 {
3412 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3413 }
3414
3415 #else
3416
3417 #define velocity_register_notifier() do {} while (0)
3418 #define velocity_unregister_notifier() do {} while (0)
3419
3420 #endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3421
3422 /**
3423 * velocity_init_module - load time function
3424 *
3425 * Called when the velocity module is loaded. The PCI driver
3426 * is registered with the PCI layer, and in turn will call
3427 * the probe functions for each velocity adapter installed
3428 * in the system.
3429 */
3430 static int __init velocity_init_module(void)
3431 {
3432 int ret;
3433
3434 velocity_register_notifier();
3435 ret = pci_register_driver(&velocity_driver);
3436 if (ret < 0)
3437 velocity_unregister_notifier();
3438 return ret;
3439 }
3440
3441 /**
3442 * velocity_cleanup - module unload
3443 *
3444 * When the velocity hardware is unloaded this function is called.
3445 * It will clean up the notifiers and the unregister the PCI
3446 * driver interface for this hardware. This in turn cleans up
3447 * all discovered interfaces before returning from the function
3448 */
3449 static void __exit velocity_cleanup_module(void)
3450 {
3451 velocity_unregister_notifier();
3452 pci_unregister_driver(&velocity_driver);
3453 }
3454
3455 module_init(velocity_init_module);
3456 module_exit(velocity_cleanup_module);
This page took 0.134762 seconds and 5 git commands to generate.