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WAN: Simplify HD64572 status handling.
[deliverable/linux.git] / drivers / net / wan / hd64572.c
1 /*
2 * Hitachi (now Renesas) SCA-II HD64572 driver for Linux
3 *
4 * Copyright (C) 1998-2008 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * Source of information: HD64572 SCA-II User's Manual
11 *
12 * We use the following SCA memory map:
13 *
14 * Packet buffer descriptor rings - starting from winbase or win0base:
15 * rx_ring_buffers * sizeof(pkt_desc) = logical channel #0 RX ring
16 * tx_ring_buffers * sizeof(pkt_desc) = logical channel #0 TX ring
17 * rx_ring_buffers * sizeof(pkt_desc) = logical channel #1 RX ring (if used)
18 * tx_ring_buffers * sizeof(pkt_desc) = logical channel #1 TX ring (if used)
19 *
20 * Packet data buffers - starting from winbase + buff_offset:
21 * rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers
22 * tx_ring_buffers * HDLC_MAX_MRU = logical channel #0 TX buffers
23 * rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers (if used)
24 * tx_ring_buffers * HDLC_MAX_MRU = logical channel #0 TX buffers (if used)
25 */
26
27 #include <linux/bitops.h>
28 #include <linux/errno.h>
29 #include <linux/fcntl.h>
30 #include <linux/hdlc.h>
31 #include <linux/in.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/ioport.h>
35 #include <linux/jiffies.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/netdevice.h>
39 #include <linux/skbuff.h>
40 #include <linux/slab.h>
41 #include <linux/string.h>
42 #include <linux/types.h>
43 #include <asm/io.h>
44 #include <asm/system.h>
45 #include <asm/uaccess.h>
46 #include "hd64572.h"
47
48 #define NAPI_WEIGHT 16
49
50 #define get_msci(port) (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET)
51 #define get_dmac_rx(port) (phy_node(port) ? DMAC1RX_OFFSET : DMAC0RX_OFFSET)
52 #define get_dmac_tx(port) (phy_node(port) ? DMAC1TX_OFFSET : DMAC0TX_OFFSET)
53
54 static int sca_poll(struct napi_struct *napi, int budget);
55
56 static inline struct net_device *port_to_dev(port_t *port)
57 {
58 return port->dev;
59 }
60
61 static inline port_t* dev_to_port(struct net_device *dev)
62 {
63 return dev_to_hdlc(dev)->priv;
64 }
65
66 static inline void enable_intr(port_t *port)
67 {
68 /* enable DMIB and MSCI RXINTA interrupts */
69 sca_outl(sca_inl(IER0, port->card) |
70 (phy_node(port) ? 0x08002200 : 0x00080022), IER0, port->card);
71 }
72
73 static inline void disable_intr(port_t *port)
74 {
75 sca_outl(sca_inl(IER0, port->card) &
76 (phy_node(port) ? 0x00FF00FF : 0xFF00FF00), IER0, port->card);
77 }
78
79 static inline u16 next_desc(port_t *port, u16 desc, int transmit)
80 {
81 return (desc + 1) % (transmit ? port_to_card(port)->tx_ring_buffers
82 : port_to_card(port)->rx_ring_buffers);
83 }
84
85
86 static inline u16 desc_abs_number(port_t *port, u16 desc, int transmit)
87 {
88 u16 rx_buffs = port_to_card(port)->rx_ring_buffers;
89 u16 tx_buffs = port_to_card(port)->tx_ring_buffers;
90
91 desc %= (transmit ? tx_buffs : rx_buffs); // called with "X + 1" etc.
92 return log_node(port) * (rx_buffs + tx_buffs) +
93 transmit * rx_buffs + desc;
94 }
95
96
97 static inline u16 desc_offset(port_t *port, u16 desc, int transmit)
98 {
99 /* Descriptor offset always fits in 16 bytes */
100 return desc_abs_number(port, desc, transmit) * sizeof(pkt_desc);
101 }
102
103
104 static inline pkt_desc __iomem *desc_address(port_t *port, u16 desc,
105 int transmit)
106 {
107 return (pkt_desc __iomem *)(winbase(port_to_card(port))
108 + desc_offset(port, desc, transmit));
109 }
110
111
112 static inline u32 buffer_offset(port_t *port, u16 desc, int transmit)
113 {
114 return port_to_card(port)->buff_offset +
115 desc_abs_number(port, desc, transmit) * (u32)HDLC_MAX_MRU;
116 }
117
118
119 static inline void sca_set_carrier(port_t *port)
120 {
121 if (!(sca_in(get_msci(port) + ST3, port_to_card(port)) & ST3_DCD)) {
122 #ifdef DEBUG_LINK
123 printk(KERN_DEBUG "%s: sca_set_carrier on\n",
124 port_to_dev(port)->name);
125 #endif
126 netif_carrier_on(port_to_dev(port));
127 } else {
128 #ifdef DEBUG_LINK
129 printk(KERN_DEBUG "%s: sca_set_carrier off\n",
130 port_to_dev(port)->name);
131 #endif
132 netif_carrier_off(port_to_dev(port));
133 }
134 }
135
136
137 static void sca_init_port(port_t *port)
138 {
139 card_t *card = port_to_card(port);
140 int transmit, i;
141
142 port->rxin = 0;
143 port->txin = 0;
144 port->txlast = 0;
145
146 for (transmit = 0; transmit < 2; transmit++) {
147 u16 dmac = transmit ? get_dmac_tx(port) : get_dmac_rx(port);
148 u16 buffs = transmit ? card->tx_ring_buffers
149 : card->rx_ring_buffers;
150
151 for (i = 0; i < buffs; i++) {
152 pkt_desc __iomem *desc = desc_address(port, i, transmit);
153 u16 chain_off = desc_offset(port, i + 1, transmit);
154 u32 buff_off = buffer_offset(port, i, transmit);
155
156 writel(chain_off, &desc->cp);
157 writel(buff_off, &desc->bp);
158 writew(0, &desc->len);
159 writeb(0, &desc->stat);
160 }
161
162 /* DMA disable - to halt state */
163 sca_out(0, transmit ? DSR_TX(phy_node(port)) :
164 DSR_RX(phy_node(port)), card);
165 /* software ABORT - to initial state */
166 sca_out(DCR_ABORT, transmit ? DCR_TX(phy_node(port)) :
167 DCR_RX(phy_node(port)), card);
168
169 /* current desc addr */
170 sca_outl(desc_offset(port, 0, transmit), dmac + CDAL, card);
171 if (!transmit)
172 sca_outl(desc_offset(port, buffs - 1, transmit),
173 dmac + EDAL, card);
174 else
175 sca_outl(desc_offset(port, 0, transmit), dmac + EDAL,
176 card);
177
178 /* clear frame end interrupt counter */
179 sca_out(DCR_CLEAR_EOF, transmit ? DCR_TX(phy_node(port)) :
180 DCR_RX(phy_node(port)), card);
181
182 if (!transmit) { /* Receive */
183 /* set buffer length */
184 sca_outw(HDLC_MAX_MRU, dmac + BFLL, card);
185 /* Chain mode, Multi-frame */
186 sca_out(0x14, DMR_RX(phy_node(port)), card);
187 sca_out(DIR_EOME, DIR_RX(phy_node(port)), card);
188 /* DMA enable */
189 sca_out(DSR_DE, DSR_RX(phy_node(port)), card);
190 } else { /* Transmit */
191 /* Chain mode, Multi-frame */
192 sca_out(0x14, DMR_TX(phy_node(port)), card);
193 /* enable underflow interrupts */
194 sca_out(DIR_EOME, DIR_TX(phy_node(port)), card);
195 }
196 }
197 sca_set_carrier(port);
198 netif_napi_add(port_to_dev(port), &port->napi, sca_poll, NAPI_WEIGHT);
199 }
200
201
202 /* MSCI interrupt service */
203 static inline void sca_msci_intr(port_t *port)
204 {
205 u16 msci = get_msci(port);
206 card_t* card = port_to_card(port);
207
208 if (sca_in(msci + ST1, card) & ST1_CDCD) {
209 /* Reset MSCI CDCD status bit */
210 sca_out(ST1_CDCD, msci + ST1, card);
211 sca_set_carrier(port);
212 }
213 }
214
215
216 static inline void sca_rx(card_t *card, port_t *port, pkt_desc __iomem *desc,
217 u16 rxin)
218 {
219 struct net_device *dev = port_to_dev(port);
220 struct sk_buff *skb;
221 u16 len;
222 u32 buff;
223
224 len = readw(&desc->len);
225 skb = dev_alloc_skb(len);
226 if (!skb) {
227 dev->stats.rx_dropped++;
228 return;
229 }
230
231 buff = buffer_offset(port, rxin, 0);
232 memcpy_fromio(skb->data, winbase(card) + buff, len);
233
234 skb_put(skb, len);
235 #ifdef DEBUG_PKT
236 printk(KERN_DEBUG "%s RX(%i):", dev->name, skb->len);
237 debug_frame(skb);
238 #endif
239 dev->stats.rx_packets++;
240 dev->stats.rx_bytes += skb->len;
241 skb->protocol = hdlc_type_trans(skb, dev);
242 netif_receive_skb(skb);
243 }
244
245
246 /* Receive DMA service */
247 static inline int sca_rx_done(port_t *port, int budget)
248 {
249 struct net_device *dev = port_to_dev(port);
250 u16 dmac = get_dmac_rx(port);
251 card_t *card = port_to_card(port);
252 u8 stat = sca_in(DSR_RX(phy_node(port)), card); /* read DMA Status */
253 int received = 0;
254
255 /* Reset DSR status bits */
256 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
257 DSR_RX(phy_node(port)), card);
258
259 if (stat & DSR_BOF)
260 /* Dropped one or more frames */
261 dev->stats.rx_over_errors++;
262
263 while (received < budget) {
264 u32 desc_off = desc_offset(port, port->rxin, 0);
265 pkt_desc __iomem *desc;
266 u32 cda = sca_inl(dmac + CDAL, card);
267
268 if ((cda >= desc_off) && (cda < desc_off + sizeof(pkt_desc)))
269 break; /* No frame received */
270
271 desc = desc_address(port, port->rxin, 0);
272 stat = readb(&desc->stat);
273 if (!(stat & ST_RX_EOM))
274 port->rxpart = 1; /* partial frame received */
275 else if ((stat & ST_ERROR_MASK) || port->rxpart) {
276 dev->stats.rx_errors++;
277 if (stat & ST_RX_OVERRUN)
278 dev->stats.rx_fifo_errors++;
279 else if ((stat & (ST_RX_SHORT | ST_RX_ABORT |
280 ST_RX_RESBIT)) || port->rxpart)
281 dev->stats.rx_frame_errors++;
282 else if (stat & ST_RX_CRC)
283 dev->stats.rx_crc_errors++;
284 if (stat & ST_RX_EOM)
285 port->rxpart = 0; /* received last fragment */
286 } else {
287 sca_rx(card, port, desc, port->rxin);
288 received++;
289 }
290
291 /* Set new error descriptor address */
292 sca_outl(desc_off, dmac + EDAL, card);
293 port->rxin = next_desc(port, port->rxin, 0);
294 }
295
296 /* make sure RX DMA is enabled */
297 sca_out(DSR_DE, DSR_RX(phy_node(port)), card);
298 return received;
299 }
300
301
302 /* Transmit DMA service */
303 static inline void sca_tx_done(port_t *port)
304 {
305 struct net_device *dev = port_to_dev(port);
306 card_t* card = port_to_card(port);
307 u8 stat;
308
309 spin_lock(&port->lock);
310
311 stat = sca_in(DSR_TX(phy_node(port)), card); /* read DMA Status */
312
313 /* Reset DSR status bits */
314 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
315 DSR_TX(phy_node(port)), card);
316
317 while (1) {
318 pkt_desc __iomem *desc = desc_address(port, port->txlast, 1);
319 u8 stat = readb(&desc->stat);
320
321 if (!(stat & ST_TX_OWNRSHP))
322 break; /* not yet transmitted */
323 if (stat & ST_TX_UNDRRUN) {
324 dev->stats.tx_errors++;
325 dev->stats.tx_fifo_errors++;
326 } else {
327 dev->stats.tx_packets++;
328 dev->stats.tx_bytes += readw(&desc->len);
329 }
330 writeb(0, &desc->stat); /* Free descriptor */
331 port->txlast = next_desc(port, port->txlast, 1);
332 }
333
334 netif_wake_queue(dev);
335 spin_unlock(&port->lock);
336 }
337
338
339 static int sca_poll(struct napi_struct *napi, int budget)
340 {
341 port_t *port = container_of(napi, port_t, napi);
342 u32 isr0 = sca_inl(ISR0, port->card);
343 int received = 0;
344
345 if (isr0 & (port->phy_node ? 0x08000000 : 0x00080000))
346 sca_msci_intr(port);
347
348 if (isr0 & (port->phy_node ? 0x00002000 : 0x00000020))
349 sca_tx_done(port);
350
351 if (isr0 & (port->phy_node ? 0x00000200 : 0x00000002))
352 received = sca_rx_done(port, budget);
353
354 if (received < budget) {
355 netif_rx_complete(port->dev, napi);
356 enable_intr(port);
357 }
358
359 return received;
360 }
361
362 static irqreturn_t sca_intr(int irq, void *dev_id)
363 {
364 card_t *card = dev_id;
365 u32 isr0 = sca_inl(ISR0, card);
366 int i, handled = 0;
367
368 for (i = 0; i < 2; i++) {
369 port_t *port = get_port(card, i);
370 if (port && (isr0 & (i ? 0x08002200 : 0x00080022))) {
371 handled = 1;
372 disable_intr(port);
373 netif_rx_schedule(port->dev, &port->napi);
374 }
375 }
376
377 return IRQ_RETVAL(handled);
378 }
379
380
381 static void sca_set_port(port_t *port)
382 {
383 card_t* card = port_to_card(port);
384 u16 msci = get_msci(port);
385 u8 md2 = sca_in(msci + MD2, card);
386 unsigned int tmc, br = 10, brv = 1024;
387
388
389 if (port->settings.clock_rate > 0) {
390 /* Try lower br for better accuracy*/
391 do {
392 br--;
393 brv >>= 1; /* brv = 2^9 = 512 max in specs */
394
395 /* Baud Rate = CLOCK_BASE / TMC / 2^BR */
396 tmc = CLOCK_BASE / brv / port->settings.clock_rate;
397 }while (br > 1 && tmc <= 128);
398
399 if (tmc < 1) {
400 tmc = 1;
401 br = 0; /* For baud=CLOCK_BASE we use tmc=1 br=0 */
402 brv = 1;
403 } else if (tmc > 255)
404 tmc = 256; /* tmc=0 means 256 - low baud rates */
405
406 port->settings.clock_rate = CLOCK_BASE / brv / tmc;
407 } else {
408 br = 9; /* Minimum clock rate */
409 tmc = 256; /* 8bit = 0 */
410 port->settings.clock_rate = CLOCK_BASE / (256 * 512);
411 }
412
413 port->rxs = (port->rxs & ~CLK_BRG_MASK) | br;
414 port->txs = (port->txs & ~CLK_BRG_MASK) | br;
415 port->tmc = tmc;
416
417 /* baud divisor - time constant*/
418 sca_out(port->tmc, msci + TMCR, card);
419 sca_out(port->tmc, msci + TMCT, card);
420
421 /* Set BRG bits */
422 sca_out(port->rxs, msci + RXS, card);
423 sca_out(port->txs, msci + TXS, card);
424
425 if (port->settings.loopback)
426 md2 |= MD2_LOOPBACK;
427 else
428 md2 &= ~MD2_LOOPBACK;
429
430 sca_out(md2, msci + MD2, card);
431
432 }
433
434
435 static void sca_open(struct net_device *dev)
436 {
437 port_t *port = dev_to_port(dev);
438 card_t* card = port_to_card(port);
439 u16 msci = get_msci(port);
440 u8 md0, md2;
441
442 switch(port->encoding) {
443 case ENCODING_NRZ: md2 = MD2_NRZ; break;
444 case ENCODING_NRZI: md2 = MD2_NRZI; break;
445 case ENCODING_FM_MARK: md2 = MD2_FM_MARK; break;
446 case ENCODING_FM_SPACE: md2 = MD2_FM_SPACE; break;
447 default: md2 = MD2_MANCHESTER;
448 }
449
450 if (port->settings.loopback)
451 md2 |= MD2_LOOPBACK;
452
453 switch(port->parity) {
454 case PARITY_CRC16_PR0: md0 = MD0_HDLC | MD0_CRC_16_0; break;
455 case PARITY_CRC16_PR1: md0 = MD0_HDLC | MD0_CRC_16; break;
456 case PARITY_CRC32_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU32; break;
457 case PARITY_CRC16_PR1_CCITT: md0 = MD0_HDLC | MD0_CRC_ITU; break;
458 default: md0 = MD0_HDLC | MD0_CRC_NONE;
459 }
460
461 sca_out(CMD_RESET, msci + CMD, card);
462 sca_out(md0, msci + MD0, card);
463 sca_out(0x00, msci + MD1, card); /* no address field check */
464 sca_out(md2, msci + MD2, card);
465 sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */
466 /* Skip the rest of underrun frame */
467 sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card);
468 sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */
469 sca_out(0x3C, msci + TFS, card); /* +1 = TX start */
470 sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */
471 sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */
472 sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
473
474 /* We're using the following interrupts:
475 - RXINTA (DCD changes only)
476 - DMIB (EOM - single frame transfer complete)
477 */
478 sca_outl(IE0_RXINTA | IE0_CDCD, msci + IE0, card);
479
480 sca_out(port->tmc, msci + TMCR, card);
481 sca_out(port->tmc, msci + TMCT, card);
482 sca_out(port->rxs, msci + RXS, card);
483 sca_out(port->txs, msci + TXS, card);
484 sca_out(CMD_TX_ENABLE, msci + CMD, card);
485 sca_out(CMD_RX_ENABLE, msci + CMD, card);
486
487 sca_set_carrier(port);
488 enable_intr(port);
489 napi_enable(&port->napi);
490 netif_start_queue(dev);
491 }
492
493
494 static void sca_close(struct net_device *dev)
495 {
496 port_t *port = dev_to_port(dev);
497
498 /* reset channel */
499 sca_out(CMD_RESET, get_msci(port) + CMD, port_to_card(port));
500 disable_intr(port);
501 napi_disable(&port->napi);
502 netif_stop_queue(dev);
503 }
504
505
506 static int sca_attach(struct net_device *dev, unsigned short encoding,
507 unsigned short parity)
508 {
509 if (encoding != ENCODING_NRZ &&
510 encoding != ENCODING_NRZI &&
511 encoding != ENCODING_FM_MARK &&
512 encoding != ENCODING_FM_SPACE &&
513 encoding != ENCODING_MANCHESTER)
514 return -EINVAL;
515
516 if (parity != PARITY_NONE &&
517 parity != PARITY_CRC16_PR0 &&
518 parity != PARITY_CRC16_PR1 &&
519 parity != PARITY_CRC32_PR1_CCITT &&
520 parity != PARITY_CRC16_PR1_CCITT)
521 return -EINVAL;
522
523 dev_to_port(dev)->encoding = encoding;
524 dev_to_port(dev)->parity = parity;
525 return 0;
526 }
527
528
529 #ifdef DEBUG_RINGS
530 static void sca_dump_rings(struct net_device *dev)
531 {
532 port_t *port = dev_to_port(dev);
533 card_t *card = port_to_card(port);
534 u16 cnt;
535
536 printk(KERN_DEBUG "RX ring: CDA=%u EDA=%u DSR=%02X in=%u %sactive",
537 sca_inl(get_dmac_rx(port) + CDAL, card),
538 sca_inl(get_dmac_rx(port) + EDAL, card),
539 sca_in(DSR_RX(phy_node(port)), card), port->rxin,
540 sca_in(DSR_RX(phy_node(port)), card) & DSR_DE ? "" : "in");
541 for (cnt = 0; cnt < port_to_card(port)->rx_ring_buffers; cnt++)
542 printk(" %02X", readb(&(desc_address(port, cnt, 0)->stat)));
543
544 printk("\n" KERN_DEBUG "TX ring: CDA=%u EDA=%u DSR=%02X in=%u "
545 "last=%u %sactive",
546 sca_inl(get_dmac_tx(port) + CDAL, card),
547 sca_inl(get_dmac_tx(port) + EDAL, card),
548 sca_in(DSR_TX(phy_node(port)), card), port->txin, port->txlast,
549 sca_in(DSR_TX(phy_node(port)), card) & DSR_DE ? "" : "in");
550
551 for (cnt = 0; cnt < port_to_card(port)->tx_ring_buffers; cnt++)
552 printk(" %02X", readb(&(desc_address(port, cnt, 1)->stat)));
553 printk("\n");
554
555 printk(KERN_DEBUG "MSCI: MD: %02x %02x %02x,"
556 " ST: %02x %02x %02x %02x %02x, FST: %02x CST: %02x %02x\n",
557 sca_in(get_msci(port) + MD0, card),
558 sca_in(get_msci(port) + MD1, card),
559 sca_in(get_msci(port) + MD2, card),
560 sca_in(get_msci(port) + ST0, card),
561 sca_in(get_msci(port) + ST1, card),
562 sca_in(get_msci(port) + ST2, card),
563 sca_in(get_msci(port) + ST3, card),
564 sca_in(get_msci(port) + ST4, card),
565 sca_in(get_msci(port) + FST, card),
566 sca_in(get_msci(port) + CST0, card),
567 sca_in(get_msci(port) + CST1, card));
568
569 printk(KERN_DEBUG "ILAR: %02x ISR: %08x %08x\n", sca_in(ILAR, card),
570 sca_inl(ISR0, card), sca_inl(ISR1, card));
571 }
572 #endif /* DEBUG_RINGS */
573
574
575 static int sca_xmit(struct sk_buff *skb, struct net_device *dev)
576 {
577 port_t *port = dev_to_port(dev);
578 card_t *card = port_to_card(port);
579 pkt_desc __iomem *desc;
580 u32 buff, len;
581
582 spin_lock_irq(&port->lock);
583
584 desc = desc_address(port, port->txin + 1, 1);
585 BUG_ON(readb(&desc->stat)); /* previous xmit should stop queue */
586
587 #ifdef DEBUG_PKT
588 printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len);
589 debug_frame(skb);
590 #endif
591
592 desc = desc_address(port, port->txin, 1);
593 buff = buffer_offset(port, port->txin, 1);
594 len = skb->len;
595 memcpy_toio(winbase(card) + buff, skb->data, len);
596
597 writew(len, &desc->len);
598 writeb(ST_TX_EOM, &desc->stat);
599 dev->trans_start = jiffies;
600
601 port->txin = next_desc(port, port->txin, 1);
602 sca_outl(desc_offset(port, port->txin, 1),
603 get_dmac_tx(port) + EDAL, card);
604
605 sca_out(DSR_DE, DSR_TX(phy_node(port)), card); /* Enable TX DMA */
606
607 desc = desc_address(port, port->txin + 1, 1);
608 if (readb(&desc->stat)) /* allow 1 packet gap */
609 netif_stop_queue(dev);
610
611 spin_unlock_irq(&port->lock);
612
613 dev_kfree_skb(skb);
614 return 0;
615 }
616
617
618 static u32 __devinit sca_detect_ram(card_t *card, u8 __iomem *rambase,
619 u32 ramsize)
620 {
621 /* Round RAM size to 32 bits, fill from end to start */
622 u32 i = ramsize &= ~3;
623
624 do {
625 i -= 4;
626 writel(i ^ 0x12345678, rambase + i);
627 } while (i > 0);
628
629 for (i = 0; i < ramsize ; i += 4) {
630 if (readl(rambase + i) != (i ^ 0x12345678))
631 break;
632 }
633
634 return i;
635 }
636
637
638 static void __devinit sca_init(card_t *card, int wait_states)
639 {
640 sca_out(wait_states, WCRL, card); /* Wait Control */
641 sca_out(wait_states, WCRM, card);
642 sca_out(wait_states, WCRH, card);
643
644 sca_out(0, DMER, card); /* DMA Master disable */
645 sca_out(0x03, PCR, card); /* DMA priority */
646 sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */
647 sca_out(0, DSR_TX(0), card);
648 sca_out(0, DSR_RX(1), card);
649 sca_out(0, DSR_TX(1), card);
650 sca_out(DMER_DME, DMER, card); /* DMA Master enable */
651 }
Linux kernel - Deliverables
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